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Paper Presentation: Thermal Probe Maskless Lithography
Paper Presentation: Thermal Probe Maskless Lithography
REPORT
Thermal Probe Maskless Lithography
R Anjali
M.tech student (Nanoelectronics)
Enrollment no.77801
Special Centre for Nanoscience , Jawaharlal Nehru University JNU
Thermal Probe Maskless Lithography
R Anjali
M.tech student (Nanoelectronics)
Special Centre for Nanoscience ,Jawaharlal Nehru University JNU
Abstract— Fabrication of nanoscale devices requires mask-less techniques. Maskless techniques enable prototyping of ultimately
scaled devices and fabricating masters and mask for nanoimprint and for high-volume lithography. Thermal Probe Maskless
Lithography is one of the maskless lithography techniques with minimal substrate interference and proximity effects. It is a serial,
mask-less and direct-write lithography technique, where a cantilever structure of heatable ultra-sharp silicon tip is brought into
contact with a special resist to locally decompose and evaporate the resist.
2. PRINCIPLE OF WORKING
1
the etch rate contrast between the materials. After spin profiles that are 7−12 nm deep and do not extend to the
coating, a moderate 3-minute long soft bake is bottom of the resist. In a first step of pattern transfer
necessary to remove most of the solvent from the film. PPA layer is thinned down to a thickness of 4 ± 0.5 nm
using a 1:4 ratio O2/N2 plasma.
The probes used for heating are either resistive (Joule)
or thermoelectric (Thomson) heating. The I-V
characteristics of the resistive heating element
determine the temperature of the heater. The main
energy transport process to the substrate is conduction
through the tip. At temperatures of up to 1000 °C the
resist (polyphthalaldehyde, PPA) evaporates very
efficiently and quickly (in less than 2 µs) without
residues or contamination, leaving a tiny hole in the
resist with the same geometry as the tip.
The heat flow into the contact point between tip and
surface depends on the exact tip geometry. Because,
conical tip shape also has a thermal resistance
associated with it. Topographical patterning requires
sharp tips with a small opening angle to maximize
patterning resolution and minimize depth-dependent
pixel broadening.
Etching process begins with removal of the residual In a second step, the SiO2 in the exposed areas of the
layer of PPA below the pattern.(Fig. 2, Panel 2). Best hard-mask is removed using CHF3 RIE. Thus the
results are achieved with an oxygen plasma as etchant. original shallow relief pattern is transformed into a
Once the surface of the silicon oxide is exposed, a high carbon content polymer for the final O2 RIE
fluorocarbon etch opens the inorganic hard mask (Fig. pattern transfer.
2, Panel 3). For a SiO2 hard mask, best results are
achieved with a CHF3/Ar-based RIE.The next step is SEM imaging and Line edge roughness (LER) is
the enhancement of the aspect ratio into the organic depicted of the resultant pattern.
hard-mask layer (Fig. 2, Panel 4). If the inorganic hard
5. RESULTS AND DISCUSSION
mask is an oxide,best results are achieved with an
oxygen-based RIE.Finally, the pattern is transferred
5.1 SEM
from the organic hard mask into the substrate (Fig. 2,
Panel 5).
7. DEMERITS
CONCLUSION
Fig5.SEM micrograph for Line egde roughness [2]
The major advantage of Thermal probe maskless
W1−W14 indicate the width of the grooves in pixel lithography is its ability to operate in ambient
units. The line edge contour from the SEM image conditions and to allow in situ non-destructive
shown in Fig5 is set to the pixel positions inside the inspection. In addition to advantageous over other
grooves at 80% of the maximum intensity level. techniques, it has demonstrated an overlay accuracy of
better than 5 nm and the capability to fabricate 3D
depth profiles with nanometer scale accuracy. Recent
studies[3] showed that the resolution is highest for
shallow patterns which pose a challenge for
transferring the patterns into functional structures. In
one of their recent works they have developed and
optimized a versatile three-layer stack that is able to
transfer sub-20 nm lateral and 5 nm vertical amplitude
thermal probe maskless lithography patterns into a
substrate.
References
Fig6. Root-mean-square line edge roughness [2]
[1] C. Dislocations, “r 1982,” vol. 49, no. 1, pp.
The result showed that root mean-square (rms) line 57–61, 1982.
edge roughness (LER) is depicted in Fig6. It is
[2] L. L. Cheong et al., “Thermal Probe Maskless
consistently found 1.5 times lower values of the LER Lithography for 27.5 nm Half-Pitch Si
for the upper edge than for the lower one. Technology,” 2013.
Also the LER is lowest for the one pixel wide groove [3] Y. Kyoung et al., “Sub-10 Nanometer Feature
increasing by approximately 30% for the grooves with Size in Silicon Using Thermal Scanning Probe
a width. Hence resolution is highest for shallow Lithography,” 2017.
patterns.
Bibliography
6. MERITS [1]. Szoszkiewicz R,Okada T et al. “ High-speed,
Thermal probe maskless lithography is Closed Loop sub15 nm feature size thermochemical
Lithography process. With the tip in its cold state, the nanolithography”. Nano Letter 2007.
topography of each patterned line is read back. A [2]. Knoll AW et al. “Closed-loop high-speed 3D
second micro-heater reads the distance to the surface thermal probe nanolithography”. Proceeding
by means of heat conduction through the air. The SPIE 2014.
measured sub-nm deviations from the target are then
used as feedback for the running patterning process.
Thus, accurate control with unmatched precision of the
patterning depth and in-situ metrology are achieved.