Ex. No.

:1 Date:26/07/2019
Verification of NETWORK THEOREMS
(Thevenin’s Theorem)

Aim: To find the current across load resistor and verify Thevenin’s theorem.

Apparatus/Tool required:
ORCAD / Capture CIS --> Analog Library – R,
Source Library – Vdc, Idc &
Ground (GND) – 0 (zero)
Simulation Settings: Analysis Type - Bias Point

Circuit Diagram

Statement: Thevenin’s Theorem

It states that “Any circuit containing several voltages and resistances can be replaced with
one single voltage in series with a resistor connected across the load”.
Manual Calculations:
To Find Vth:

To Find Rth:

To Find IL:
Equivalent Circuit
Simulation Circuit:

To Find Vth:

To Find Rth:
To Find IL:
Procedure:
1. Open capture cis, create a blank project.
2. Select various circuit elements such as resistors (R) , voltage source (Vdc) and
current source(Idc) from the library.
3. For calculating Vth remove the load resistor from original circuit and calculate the
voltage across the terminals.
4. To calculate Rth ,short circuit the voltage source, open circuit the current source
and connect voltage(100V) source across the terminals and find current flowing
though the terminal. Divide applied voltage by current to get Req or Rth.
5. For calculating IL, make new circuit having Vth, Rth , RL and calculate current
flowing through the circuit. The current found will be the required IL.
6. All circuit should be grounded accordinglyto avoid errors.

Result: Current across the 20 ohm resistor is 2.22A.

Thevenin’s Theorem

Quantities Manual Simulated Result

Calculations
Vth 66.67 66.67
Rth 10 10
IL 2.22 2.22

Inference:
From the above table we can see that manual values and simulated values are same. Hence,
proved thevenin’s theorem.

Reg. No: 19BCE0289 Name: Harshit Shrivastava Date: 26/07/2019

Ex. No.:3 Date:02/08/2019
Response of RLC Series Circuit

Aim: To find the resonant frequency and the response of the series RLC circuit.

Apparatus/Tool required:
ORCAD / Capture CIS --> Analog Library – R, L & C
Source Library – Vac
Ground (GND) – 0 (zero)

Simulation Settings: Analysis Type – Transient (Time Domain)

Run to time: 20ms

Circuit Diagram:

P A R A M E T E R S :
R VAR = 200
R1R 5 L 2L2 C 1
1 2
{ R VΩA R }
200 47m H 47uF
V
I
V2
20V ac

Theory:
1. In a series RLC circuit, when the inductive reactance and capacitive
reactance becomes equal, then resonance occurs in the circuit.
2. Current will be maximum in the circuit when the the circuit is in resonance.
Formulae :

Calculation:
Model Graph:

Simulation Circuit Diagram and Output:

Procedure:-
1. Open capture cis and create blank project.
2. Design the circuit according to the circuit diagram using elements from the library.
3. Point a marker near capacitor to note the current in the circuit.
4. Create a new simulation profile. Then edit the simulation profile to convert to AC
settings such as start frequency ,end frequency and dacade.
5. Run the profile.

Result:-
1. Frequency of RLC circuit is 107.04Hz.
2. Current in the circuit will be maximum when capacitive reactance is equal to the
inductive reactance.

Inference:-
From the above data it is clear that current is AC circuit will be maximum when the circuit is
in resonance.