7.

CIRCUIT DIAGRAM

JTAG1 1 2 3 4 5 6 7 8 9 10
GUIDE HOLE
1V8_VCORE 2V8_VMEM 2V8_VEXT 2V8_VMEM 2V85_VSIM 2V8_VEXT 1V8_VRTC OJ2
OJ1 OJ3 OJ4 OJ5
VBAT NC_R6 CHRDACREF IBIAS REFPWR CRST CHGOSC
VBAT
_F_WE _W R AD6537B NC NC NC NC NC NC
TDO_0 TDO_0 C100 C101 C 1 02 C103 C104 C105 C106 C107 C108
AD6535 0 510 1.2M 0 0.1uF 0.01uF
TCK 47n 1u 47n 1u 47n 1u 47n 47n 47n
TCK
TMS TM S
T DO _ 1 TDO_1
RPWON RPWRON

M14

N11
C12

D16

K11
R15

C11
P14

F12
F14

T12
VBAT

J11

M3
M6
H6

A5

H1

A8
E3

V8

2V75_VVCXO
T3
T6
F8

L9
22 u

1V8_VCORE
TDI

2V75_VABB
C110 C 111

2V85_VSIM
TDI

2V5_VMIC
2V8_VMEM

1V8_VRTC

2V8_VEXT
A JTAGEN C109 22p 47n A

VMEM3
VMEM4
VMEM5

VSIM
JTAGEN

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8

VINT

VMEM1
VMEM2

VEXT1-1
VEXT1-2
VEXT1-3
VEXT1-4
VEXT1-5
VEXT1-6

VEXT2-1

VDDUSB

VDDRTC
C1 R104 10K
GND ADD00 ADD0
E5 2012
A D D 01 ADD1 1u C149
D3

R10
27p

T10
ADD02

G15
ADD2

C15

H15
C112

F15
A3
B3
R5
R4

N2

R2
R6
P2
F6
ADD03 ADD3

BAT100
D1 L3 TP100

SPWR1
SPWR2
ADD04 ADD4 DATA0 DATA00

GND_NET2
VBAT1-1
VBAT2-1
VBAT2-2
VBAT3-1
VBAT3-2
VBAT4
VBAT5

VBAT1
VBAT2
VBAT3
NC_R6
F5 L6 A12 P1 C113 1u
A D D 05 ADD5 DATA1 DATA01 IP IP VCORE1
G6 L1 A13 N1
ADD06 ADD6 DATA2 DATA02 IN IN VCORE2
E1 L8 A15 T3 C 114 1u
A D D 07 ADD7 DATA3 DATA03 QP QP VMEM1
G5 M1 A14 T2
ADD08 ADD8 DATA4 DATA04 QN QN VMEM2 C115 1u
F3 L5 B14 T7
ADD09 ADD9 DATA5 DATA05 AFC AFCDAC VRTC C116 1u
H8 N3 B12 T6
A D D 10 ADD10 DATA6 DATA06 TX_RAMP PA VSIM
F1 N1 H16 C117 2.2u (1608)
A D D 11 ADD11 DATA7 DATA07 VABB C118 1u
G3 P3 C120 N16
ADD12 ADD12 DATA8 DATA08 C 121 VMIC C 119 1u
G1 N6 47p D16
ADD13 ADD13 DATA9 DATA09 0.082u VVCXO
H3 P1 E15
A D D 14 ADD14 DATA10 DATA10 NC_E15 C122 1u
J6 R3 A4
ADD15 ADD15 DATA11 DATA11 VEXT1
J8 R1 B4
ADD16 ADD16 DATA12 DATA12 _RESET R 105
VEXT2
J3 N7 T1 T4 VBAT
ADD17 ADD17 DATA13 DATA13 RESET VBAT_NET
J5 P6 T13 E16
ADD18 ADD18 DATA14 DATA14 100 KEY_ROW0 KEYOUT NC_E16
J1 T1 T14 F16
ADD19 DATA15 KEYON

s
ADD19 DATA15 C123 C124 POWERKEY NC_F16
K6 R7
A D D 20 ADD20 100 p 100p RPWRON DBBON
K3 A2
ADD21 ADD21 CLKON VCXOEN
K1 T12
B ADD22 ADD22 D1 NC_T12 B
K9 A4 TP101 I NT T 15
A D D 23 ADD23 GPIO_48_ABB_IRQ NC_T15
H9 TP102 L1 R1 VBAT VCHARGE

ip
V5 CLKOUT MCLK NC_R1
TP103 NRAMCS1 E7 TP104 J2
_RAM_CS CLKOUT_GATE MCLKEN
TP105 P8 A6 TP106 M1 R3
NRAMCS2 GPO_29_ABBRESET ABBRESET VMEMSEL
TP107 N8 T5
_ROM_CS1 NROMCS1 JTAGEN GND_NET1
TP108 P9 T11 G16
_ROM_CS2 GPIO_44_NROMCS2 JTAGEN TCK TMS NC_ G16
_W R TP110 R4 L11 B2
V1 N WE GPIO_18 _TCK TCK
TP112 N L WR V12 B1 B7
_LBS U1 GPIO_19_TMS T MS NC_B7 R108 C127
TP114 P12 D100

h
NHWR TDI A1 B5 10u
_UBS GPIO_20_TDI T DI NC_B5 0 .2
TP116 P5 V13 C1 CUS02
_RD NRD GPIO_21_TDO TDO_0 TDO
B8
T4 TDO_1 VBATSENSE
_ADV
V2
NADV
GPO_0_RXON
C8 TP119 K1 U101 VCHG
A5
A7 R109 330

lc
_WAIT NWAIT RXON ISENSE
E8
BURSTCLK
V4

T5
BURSTCLK GPO_1_TXON
GPO_5 _ARSM
A7
TP120
TP121
K2
J1 TXON
ASM
AD6537BABC GATEDRIVE
A6 Q100

G S
NGPCS1 C7 4 5
13MHZ V6 GPO_6_ATSM D3 D4
3 6

i
C128 _MIDI_CS NAUXCS1 D2 D5
N9 2 7
NA _LCD_CS GPIO_42_NMAIN_LCD_CS D1 D6
V7 C6 H1 1 8
GPIO_43_NSUB_LCD_CS CSDI CSDO TPCF8102
E6 H2
C129 1000p CSDO CSDI
X100 N10 J9 L2
MC-146_12.5pF CLKIN CSFS CSFS
G2

b
TP122 P13 C5
3 4 CLKON C9 CLKON
OSCOUT
U100 BSDO
A3 F1
BSDI
BSIFS AIN3L
R13
E9 BSOFS E2 R14
A2
C
AD6527ABC C
R110

OSCIN BSDO AIN3R

10M

2 1 F9 BSDI G1 P 15
PWRON PWRON C4 BSOFS AIN2P
BSIFS D2 R15 MIC_P
V3 B1 ASDO
_RESET NRESET ASDI AIN2N MIC_N

o
32.768KHz A1 E1 P16
C130 ASDO ASDI AIN1P HEADSET_MIC_P
L18 C3 F2 R16
NA RADIO_STO GPIO_0_IRDA_TX ASFS ASFS AIN1N C131
L1 4 VREF R12
RADIO_DETECT GPIO_1_IRDA_RX NC_R12 NA
K16 A 16
SPK_RADIO_SEL GPIO_2_NIRDA_EN NC_A16 HEADSET_MIC_N
C 16
C 13 2 1u NC_C16 C133 C134 C135C136
K18 B15
K14 GPIO_3 V14 REF
RADIO_SEL GPIO_4 GPO_2 PRECHARGE 39p 39p 39p 39p
C137 1u

M
J16 T13 A10
LCD_DIM_CTRL J18 GPIO_5 GPO_3 ONNOFF C138 1u REFBB
KDS121E GPIO_6 T 14 B11 CLOSE TO AD6537B
RADIO_SDA H16 GPO_4 RF_PWR_DWN REFOUT
GPIO_7 T 15
ONNOFF RADIO_SCL J14 GPO_7
2
GPIO_8 V16 B6
RPWRON 3 H18 GPO_8 BATT_TEMP BATTYPE R 11 1 4.7
GPIO_9 V17 ANT_SW1 R112 82K D15 J1 5
PWRON GPO_9 V18 REFCHG AOUT1P REC_P
1 G16 GPO_10 A8 K15
_F_WP GPIO_10 ANT_SW3 C142 TEMP2 AOUT1N C139
D101 J13 R16 B9 R11
GPO_11
R113

100K

GPIO_11 1u AOUT2P1 39 p
DSR G18 T16 ANT_SW2 A9 TEMP1 T11 R114
_MIDI_RESET GPIO_12 G PO_16 PA_EN AUXADC2 AOUT2P2 REC_N
H1 4 T18 B1 0 T9
HOOK_DETECT GPIO_13 GPO_17 PA_BAND AUXADC1 AOUT2N1 4.7
G1 4 P16 R9
RADIO_VOL_CLK GPIO_14 GPO_18 AOUT2N2
F16 U18 S_EN L16 J16
_LCD_RESET GPIO_15 GPO_19 R140 LIGHT1 AOUT3P HEADSET_SPK_P
F18 R18 S_DATA M 15 K 16
LCD_ID GPIO_16 GPO_20 LIGHT2 AOUT3N HEADSET_SPK_N C140 C141
E18 P18 RADIO_RSSI M16 C2
SPK_SEL GPIO_17 GPO_21 S_CLK 100 LIGHT3 GPI 39p 39p
RINGTONE

AGND010
AGND011
AGND012
AGND013
AGND014
AGND015
AGND016
AGND017
AGND018
AGND019
AGND020
AGND021
AGND022
AGND023
AGND024
AGND025
AGND026
AGND027
AGND028
AGND029
AGND030
AGND031
AGND032
AGND033
AGND034
AGND035
AGND036
AGND037
D D

AGND01
AGND02
AGND03
AGND04
AGND05
AGND06
AGND07
AGND08
AGND09
E16 GPIO_33_

AGND4
AGND3
AGND2
AGND1
SGND1
SGND2
DEBUG_RX DEBUG_RX

DGND
LGND
VCHARGE C18 T9
DEBUG_TX GPIO_34_DEBUG_TX DPLUS
L10 C143 C144
B18 DMINUS
GPIO_35 39 p 39p

N15
B13
E5
E6
E7
E10
E11
E12
F5
F6
F7
F10
F11
F12
G5
G6
G7
G10
G11
G12
K5
K6
K7
K10
K11
K12
L5
L6
L7
L10
L11
L12
M5
M6
M7
M10
M11
M12
T16
L15
A11
B16
T8
R8
M2
A18
RADIO_AMP_SHDN GPIO_36
R130 VA333 C1 6 A 11
_MIDI_IRQ GPIO_37 GPIO_22
100K AVLC14S02050 A 17 J10
BATT_EPROM GPIO_38 GPIO_49
C 15 E10
RINGTONE GPIO_39 GPIO_50
K5 H10
GPIO_40 GPIO_51
T7 C10
2V8_VMEM JACK_DETECT GPIO_45 GPIO_52
R131 T8 F10
RADIO_VOL_CTRL GPIO_46 GPIO_53
100K E11 A10
R117 4.7K GPIO_55 GPIO_54
VA332 A12
AVLC14S02050 GPIO_56
G13 V9
R118 AMP_EN GPO_22_KEY_BACKLIGHT GPIO_23_SIM_RESET SIM_RST
LCD_BL_EN D1 8 V11
10 K GPO_23_LCD_BACKLIGHT GPIO_24_SIM_EN
D 15 GPIO_47_SIM_VSEL
P11
Section Date Sign & Name Sheet/Sheets
KEY_ROW0
KEY_ROW1
E 14
KEYPADROW0
KEYPADROW1
SIMCLK
SIMDATAIO
T10
V10
SIM_CLK
SIM_DATA 2004.
MODEL FG101
KEY_ROW2
A16
E13
KEYPADROW2 Designer KIM H.J. -RADIO 1/5
GPIO_55 GPIO_56 BOOT MODE
KEY_ROW3 KEYPADROW3 12.08
A 15 N18
KEY_ROW4 KEYPADROW4 USC0 USC0
L L BYPASS N14 USC1 2004.
E
L H UART BOOT KEY_COL0 F13
USC1
M16 USC2 Checked 12.08
LEE S.Y.
A14
KEYPADCOL0 USC2
N13 DRAWING
H L USB BOOT INT CLOCK
KEY_COL1
C14
KEYPADCOL1 USC3
M 18
USC3
Hermes 6527 ,Typhoon 6537B
VSSUSB

NAME
VSSRTC

KEY_COL2 USC4
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17

KEYPADCOL2 USC4 2004.

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

C13 L16
H H USB BOOT EXT CLOCK KEY_COL3
KEY_COL4
A 13
KEYPADCOL3
KEYPADCOL4
USC5
M13
USC5 Approved 12.08
KIM B.Y.
USC6 USC6
D4
E12
F7
F11
H5
H11
H13
K8
K10
K13
L13
M5
N5
N12
N16
P7
V15

P10

A9

DRAWING
Is s . Notice No. Date N a me
LG Electronics Inc. NO.
Ver.1.0
1 2 3 4 5

LGIC(42)-A-5505-10:01 LG Electronics Inc.

- 99 -

Schematics & manuals on www.mobilchips.com ___Mobilchips__

7. CIRCUIT DIAGRAM

1 2 3 4 5 6 7 8 9 10

2V5_VMIC
2V5_JACK 2V8_VEXT 2V8_VEXT

R200
1K AA
A
R201
C200 HEADSET JACK 2V8_VEXT 2V5_JACK
R202 39p
2 .2 K 1M
U200 NCP563Q25T1 C202
U201 MAX9075EXK-T 1 R203 C201
R204 4 10u
C 2 03 0.1u R 20 5 20K GND NC 2.2K 39p
VIN- 4 5
HEADSET_MIC_N
C206 3 .3 K VCC 1 2 3
C204 R206 C205 HOOK_DETECT Vin VOUT
NA 33u VIN+ 3 GND OUT
20K 39p C207 C208
2 R207
10u 10u R208
R209 MIC_P MIC200
100 0
220K
C210 C209 1
39p 39p 2
C211
R 210
(1608) L200 2.2uH J20 0 MIC_N OB4-15L42-C33L
C212 10u R211 4. 7
HEADSET_SPK_OUT_P R212 4.7 10 0 0.1u
HEADSET_MIC_P
R213 0
JACK_DETECT
(1608) L201 2.2uH
C215 10u R215 4.7 R214 C213 C 21 4

s
HEADSET_SPK_OUT_N 2.2K 39 p 3 9p
RADIO_ANT
VA201 VA200 BB
B
AVL5M02-200 AVL5M02-200
C217 C216
R216 C218 VA202 VA203 VA204

ip
39p 39p 39p L202

AVL5M02-200

AVL5M02-200

AVL5M02-200
1M C219 270nH
10p
1608
4.7uH
CLOSE TO MIC

CLOSE TO HEADSET JACK

1
Q200 IMX9T110
MIDI_KEY_BL1

lc h VBAT

6
R217
C299

5
i
1.5K NA
MIDI_KEY_BL2 RECEIVER/SPEAKER SELECTION

4
R218
C220 U202
100K NLAS4684MR2 CN200
2V8_VEXT 10u
2V8_VEXT 1 10 1 SPK_SEL OUTPUT
V+ NO2 SPK_N

b
R219 R220 R221 R222
C 10 10 2 9 2 C
10 10 SPK_P NO1 COM2
LOW RECEIVER
3 8 C298
U203 ML2871HB COM1 IN2
F2 C2 NA
IOVDD

o
ROUT A2 2V8_VEXT 4 7
LOUT SPK_SEL IN1 NC2 REC_N HIGH SPEAKER
C221 D4 B1 C222 5 6
1u DATA15 D7 DVDD 1u REC_P NC1 GND
D5
DATA14 D6
D6 B2
DATA13 D5 DGND
E6
DATA12 D4 C223
E5 E1
DATA11 D3 P0_PWMA U204 1u

M
F6 C6

2
DATA10 D2 P5_VIB MIDI_VIBRATOR NLAST4599DFT2
F5
D1

VCC
DATA09 E4 B3 R224 2V8_VEXT
D0 C224 0.022u
DATA08 AOUT
NO 6 R226 NA
20K R227 C225 0.022u RADIO_SPK_R
A3 5 COM
MIXIN
E3 NC 4 R 22 8 NA
ADD00 ILE 10K REC_P HEADSET_SPK_OUT_P
F3 B4 R229 39K HEADSET OUTPUT SELECTION

GND
_MIDI_CS CS MIXOUT R 230 NA
E2

IN
_RD C227 U205
F4 RD A1 C228 1u C226 0.022u REC_P NLAS4684MR2
_WR WR VREF 10 u RADIO_SPK_L
1

3
D1 1 10
V+ NO2 RADIO_SEL OUTPUT
2V8_VEXT _MIDI_RESET RESET A6
SPOUT+
VBAT 2 9
RADIO_SPK_R NO1 COM2 HEADSET_SPK_OUT_N
B6 LO W HEADSET_SPK
D SPOUT- SPK_RADIO_SEL R232 D
R233 NA D3 3 8
IFSEL C229 0.015u
COM1 IN2 R234
A4 VBAT R235 5.1K NA
SPVDD NA
R237 0 F1 RADIO/SPEAKER PHONE SEL 4 7
HIGH RADIO
13MHZ CLOCK C230 RADIO_SEL IN1 N C2 HEADSET_SPK_N
B5
D2 SPGND1 C231 0.015u NA R238 56K 5 6
IR Q C3 R239 5.1K HEADSET_SPK_P NC 1 GND
_MIDI_IRQ SPGND2 SPK_RADIO_SEL OUTPUT
C4
C1 SPGND3 C5
VREGC SPGND4 U206LM4890LD
C232
10 u 5 IN- VO1 6 SPK_N LO W SPEAKER PHONE
4 IN+
C233 C234 VO2 10 SPK_P
47p 47p AMP_EN 1 SHUTDOWN
HIGH RADIO PHONE
2 BYPASS VDD 8
R242

C235
56K

10u
7 NC1 GND1 3
9 NC2 GND2 11
C 236 Section Date Sign & Name Sheet/Sheets
1u
MODEL FG101
2004.
Designer 12.08 KIM H.J. -RADIO 2/5
2004.
E Checked LEE S.Y.
12.08 DRAWING
2004. NAME AUDIO/MIDI
Approved KIM B.Y.
1 2 .0 8

Iss. Notice No. Date Name DRAWING

LG Electronics Inc. NO.
Ver.1.0
1 2 3 4 5

LGIC(42)-A-5505-10:01 LG Electronics Inc.

- 100 -
 7. CIRCUIT DIAGRAM

1 2 3 4 5 6 7 8 9 10

VBAT 2V8_VMEM

VIBRATOR I/O CONNECTOR

R 301
KEY 10K END

R309
POWERKEY R304 R305 R306 R307 R308
80 VBAT 100K 100K 100K 100K 100K
6
CL R

SP320
A VCHARGE VBAT CN300
AA
25
26
R310 29
KEY_ROW0 C300 R311 NA
680 JTAGEN 1
4.7u
VA311 U 40 1 R312 NA 2

SP300
_RESET
AVLC14S02050 1 2 3 LEFT MENU MIC5255-2.85BM5 CN301 DSR R313 47 3
1 5 1 4
IN OUT
2 GND TCK R314 NA 5
R315 R316 100 6
MIDI_VIBRATOR 3 4 2 RPWRON
R317 EN BYP C301
R318 NA 7
KEY_ROW1 1.5K 1u TMS
USC0 R319 47 8

R399
680 C303

1SS352
C302

51K
R320 47 9

D300
VA302

SP301

SP302

SP303

SP304

SP305
0.01u 1u USC6
AVLC14S02050 4 5 6 UP SEL DEBUG_RX R321 47 10
TDI R322 NA 11
12
USC1 R323 47 13
R324 C304
USC2 R325 47 14
KEY_ROW2 27p R326 47 15
680 DEBUG_TX
16
SP306

SP307

SP308

SP309

SP310
VA303 R327 47
7 8 9 RIGHT SEND USC3 17

s
AVLC14S02050 R328 NA 18
TDO _1
19
B R329 47 20
R330 USC5
2V8_VMEM 21
KEY_ROW3 SIM CONNECTOR 22

ip
680 R331 47 23
USC4
SP311

SP312

SP313

SP314

SP315
VA330 VA304 R332 NA
STAR 0 SHARP DOWN 2V85_VSIM 2V85_VSIM 24
AVLC14S02050 AVLC14S02050 R333 30
BATT_EPROM R334
BATT_TEMP 27
NA
28
R335 1K
KEY_ROW4 R336

AVL5M02-200
h
C305 C306 C307

AVL14K02200
680 20K PIN DAI UART
VA305 J30 0 C309 39p 1 0p 3p
SP316

SP317

SP318

SP319
C308 C310 C311 C312 C313

VA300

VA301
AVLC14S02050 4 1 USC0 CLOCK - 27p
GND1 VCC 0.1u 1u 27p 39p 10u
5 2
R337 VPP RST SIM_RST USC1 RX RXD 2012
6 3 R338 0

lc
SIM_DATA IO CLK S IM_CLK
R339 680 VA306 VA307 VA308 VA309 VA310 10 7 TX TXD
KEY_COL0 0 GND5 GND2 USC2
AVLC14S02050 AVLC14S02050 AVLC14S02050 AVLC14S02050 AVLC14S02050 9 8
R340 680 GND4 GND3 USC4 - RTS/CTS(PC)
KEY_COL1
- CTS/RTS(PC)

i
C314 C315 USC5
R341 680 C316 C317
KEY_COL2 NA 220n 1000p NA USC6 RESET -
R342 680
KEY_COL3
R343 680

b
KEY_COL4
C C
VA331
AVLC14S02050
U300
PRECHARGE CIRCUIT

o
A1
A2
A7
A8

RD38F3050L0ZBQ0 KEY BACKLIGHT

NC1
NC2
NC3
NC4

G1 H2 VBAT
ADD01 A0 D0 DATA00
F1 H3
MEMORY ADD02
ADD03
E1
A1
A2
D1
D2
G3
DATA01
DATA02
H4
(128 + 32PSRAM) ADD04
D1
B1
A3 D3
J5 DATA03
VBA T
ADD05 A4 D4 C318 C319 C320
C1 G5 DATA04

M
ADD06 A5 D5 1u 1u 1u R344 R348
F2 J6 DATA05 R345 R346 R347 R349
ADD07 A6 D6 47
EUSY0250201 ADD08
E2
F6
A7 D7
H7
G2
DATA06
DATA07
C 32 3
C321
1u
C322
1u
47 47 47 47 47

D8 1u
(M36L0T7050T0) ADD09
ADD10
D7
A8
A9 D9
J3 DATA08 LEBB-S14H
LD300 VCHARGE VBAT
E7 G4 DATA09

R350
ADD11 A10 D10 DATA10 C324

750
B8 J4
ADD12 A 11 D11 DATA11 L D 301 0.1u
C8 H5 LD302 LD303 LD304 LD305
ADD13 A12 D12 DATA12
D8 G6 LEBB-S14H LEBB-S14H LEBB-S14H LEBB-S14H
ADD14 A13 D13 DATA13 LEBB-S14H C325
F7 H6
ADD15 A14 D14 DATA14 0.1u
E8 J7 LD306
ADD16 A15 D 15 DATA15 2012,1%
F8
ADD17 A16 R352
D2
ADD18 A17 15
D B2 R353 D
ADD19 A18 1K
B3
ADD20 A19 MIDI_KEY_BL1
E6 J1
ADD21 A20 _S_CS1

6
2V8_VMEM 1V8_VCORE B7 C5 3
ADD22 A21 S_CS2 MIDI_KEY_BL2 R355
C7 R356 2 Q401
ADD23 A 22 PRECHARGE

5
C3 2SC5585

R357
A23 1.5K

10K
D3 47K 1
A24 D6 _RAM_CS

4
3
E3 _P1_CS
A25 K2
_P2_CS K8 R370 IMX9T110

R358

R359
P_MODE _RESET

10K

20
B5 Q301
VCC11 100
L4
VCC12
B6 C2
VCC21 _R_LB _LBS C350
K6 D5
VCC22 _R_WE _W R 100p
J8 H1
VCCQ1 _R_OE _RD
K7 F3
VCCQ2 _R_UB _UBS
L3
VCCQ3
D4
VPP
Section Date Sign & Name Sheet/Sheets
K5
K4
P_VCC
S_VCC
_CE1
_CE2
K1
G8
_ROM_CS1
_ROM_CS2 MODEL
FG101
B4
VSS1
_CE3
_WP E4
K3
_F_WP
Designer 2004.
12.08 KIM H.J. -RADIO 3/5
C4 E5
VSS2 _ADV F5 _ADV
L1
VSS3 _WE _W R 2004.
E L2
VSS4 _OE1
J2
_RD
Checked 12.08 LEE S.Y.
C326 L5
VSS5 H8 DRAWING
C327
0 .1 u
C329
C328
0.1u
0.1u C330 L6
L7
VSS6
VSS7
_OE2
_RST
F4
WA I T G 7 2004.
NAME MEMORY, MMI, I/O
0.1u 0.1u L8
VSS8 CLK
C6 _WAIT
BURSTCLK
Approved 12.08 KIM B.Y.
NC9
NC8
NC7
NC6
M8
M7
M2
M1

DRAWING
Iss. Notice No. Date N a me Ver.1.0
LG Electronics Inc. NO.
1 2 3 4 5
LGIC(42)-A-5505-10:01 LG Electronics Inc.

- 101 -
7. CIRCUIT DIAGRAM

1 2 3 4 5 6 7 8 9 10

2V8_VMEM
128X128 LCD CONNECTOR CN400

1
2
FL400 CSPEMI306A 3
A A1 C1 4 C489 A
_LCD_RESET FILTER1-1 FILTER1-2 C400
A2 C2 5 22p
DATA00 FILTER2-1 FILTER2-2 1u
A3 C3 6
DATA01 A4
FILTER3-1 FILTER3-2
C4 7
DATA02 A5
FILTER4-1 FILTER4-2
C5 8
DATA03 FILTER5-1 FILTER5-2
C6
$A
V6 9
DATA04 FILTER6-1 FILTER6-2
10

G1
G2
G3
11

B1
B2
B3
12
13
FL401 CSPEMI306A 14 2V8_VMEM
A1 C1 LCD_LED_CTRL 15
DATA05 A2
FILTER1-1 FILTER1-2
C2 LCD_LED_GND
FILTER2-1 FILTER2-2 C3 16
DATA06 A3 FILTER3-1 FILTER3-2 17
DATA07 A4
FILTER4-1 FILTER4-2
C4
TP JTAG 120X120
18
ADD01 A5
FILTER5-1 FILTER5-2
C5
19
_LCD_CS

R400
A6 C6

51K
$V FILTER6-1 FILTER6-2 20 TP400 TP401
_WR
21

G1
G2
G3
22

B1
B2
B3
23
24

s
FL402 CSPEMI306A 25 2V8_VMEM
A1 C1
FILTER1-1 FILTER1-2 26
B
DATA08 A2 C2 B
FILTER2-1 FILTER2-2 27
DATA09 A3 C3
FILTER3-1 FILTER3-2 28
DATA10 A4 C4

R401
FILTER4-1 FILTER4-2

ip
29

51K
DATA11 A5 C5
DATA12 $AV6 FILTER5-1 FILTER5-2 30
C6 31
DATA13 FILTER6-1 FILTER6-2
32

G1
G2
G3
33

B1
B2
B3
34
35

h
FL403 CSPEMI306A 36
DATA14 A1 C1 37
FILTER1-1 FILTER1-2
A2 C2 38
DATA15 FILTER2-1 FILTER2-2
A3 C3 39
FILTER3-1 FILTER3-2 C4

lc
A4 F FILTER4-2 40 51K
A5 ILTER4-1 C5 41
A6
FILTER5-1 FILTER5-2
C6
LCD_ID
$V FILTER6-1 FILTER6-2 R402

G1
G2
G3
i
B1
B2
B3
b
2V8_VMEM
C C

RADIO(OPTION)

o
R421
51K

(1608) RADIO_DETECT
LCD BACKLIGHT
L700 470nH
C700 100p
RADIO_ANT R422 VBAT
100nH NA

M
100nH C701 RADIO
5p U400 TPS60230RGTR
13 8
L701 PULL UP EXISTENCE VIN VOUT LCD_LED_CTRL
270nH C401 C402
10 6
0.1u

C1+ D1 1u 47p
0.1u

C703 PULL DOWN NONEXISTENCE 5 (1608)

C702 C403 C404 D2
0.1u 4
10p 22u 220n D3
11 3
C705

C704

(2012) C1- D4
2V8_VEXT 9 2
C2+ D5 LCD_LED_GND
C706 0.1u C405 R404
1 3
220n ISET R405
2V8_VEXT 12 2
R713

C2- 12K LCD_DIM_CTRL

10

R406

220K
RADIO_RSSI PGND 1
10K
29
32
31
30

28
27
26
25

D $V 15 14 Q400 D
LCD_BL_EN 16
EN1 GND
17
EN2 BGND 2SC5585
GRF
RFIN
RFIP
CAGC

IFAGC
IFADJ
LIM2
LIM1

C707 1u
HVC376B

R488

51K
C708 100p
D700

L702 C710 C709

10u C711
18nH 1u 1 24
VRF RSSO C712 1u
2 23 U701 LM4811LD
VL O RDO 0.1u
3 22 10 1 C713 10u R701 100
C715
4
LO 2 MXIN
21 C714 1000p
V DD VOUT1 RADIO_SPK_R
1p LO 1 U700 HCCR (1608)
5 20 C716 1000p 2 9 C717 10u R702 100
6
GLO NS953 HCCL
19 C718 1u VIN1 VOUT2 RADIO_SPK_L
HVC376B

PDO AFR (1608)

D701

L703 7 18 C719 1u 3
VSS AFL BYPASS
18nH 8 17 8
X2 FPL1 VIN2 R712
7
R703 SHDN RADIO_AMP_SHDN
6
CDP1
FPL2
ADR

C720 1K
SDA
VDD

12K
STO
SCL

UP_DN
X1

0.033u 5
GN D
4 11
R711

100K

C721 CLOCK PGND C722

10
11

13
14

16
9

12

15

1u 1u Section Date Sign & Name

FG101 Sheet/
R706

R704 R705
12K

1K 1K MODEL Sheets
32.768KHz
2004.
0

2 1
R707
C723
1u
2V8_VEXT
Designer
12.08 KIM H.J. -RADIO 4/5
R708

C725 1 0M RADIO_VOL_CTRL
C724
0.47u 47n RADIO_VOL_CLK 2004.
4
E 3
MC-146_12.5pF
Checked
12.08 LEE S.Y.
C726 DRAWING
X200
18p
C727 LCD CONN,RADIO
18p NAME
C728 2004.
1u R709
R710
4.7K
Approved
12.08 KIM B.Y.
4.7K

RADIO_SDA DRAWING
RADIO_SCL Iss. Notice No. Date Name
RADIO_STO LG Electronics Inc. NO.
Ver.1.0
1 2 3 4 5
LGIC(42)-A-5505-10:01 LG Electronics Inc.

- 102 -
 7. CIRCUIT DIAGRAM

1 2 3 4 5 6 7 8 9 10

R500
TX_RAMP
C501 15K
39p

VBAT
R 501
PA_BAND GPO_17
100

A A
C 504
C506 C508 C505 C509 C510 27p
C507
0.01u 3p 18p 10p 33u
0.01u
R502
PA_EN GPO_16
100
TP502 TP501 TP500
C500 NA

25
24
23
22
21
20
19
18
C511

GND16
GND15
GND14
GND13
GND12
GND11
GND10
GND9
L50 0 27p
2.7nH
C502 9 1
DCS_PCS_OUT DCS_PCS_IN
NA C532
2 1000p
C512 C513 BAND_SELECT 13MHZ
26
C503 NA 2.2p 1.8p GND17
27 3
GND18 TX_ENABLE
28
29 GND19 4 R503 QP
30 GND20 U501 VBATT C514
KMS-507 SW500

GND21 RF3166 36 39p

31 5 R504 R505
ANT

GND22 GND QN

s
32 150 150
GND23 [6dB]
G1
G2

6
C515 VRAMP IN
RF

B B
6.8nH R506 C516
8 7
GSM_OUT GSM_IN 39p

ip
L501 R507 30 R508 IP

GND2
GND1
GND8
GND7
GND6
GND5
GND4
GND3
C543 C517 3p 180 180
[5dB] RF2V85
22p 1 0nH

11
10
17
16
15
14
13
12
RF2V85

h
C519
L550 C518
22p
1.8nH 0.022u
C523
100p

25
26

32
22

28
23
24

27

29
30
31
lc

DIAG2
XEN

VDD2
RFOD

RXQP
RFOG
DIAG1

XOUT

GND2
GND3
GND4
FL500 21
11

RFIGN
20

i
ANT RFIGP
1 19 1
GSM_RX1 1.5p RFIDN RXQN
2 2 2nH 18 2
GSM_RX2 C 524 RFIDP RXIP
LMSP7CHA-158
DCS_RX1
3 L506 17
RFIPN
U500 RXIN
3
14 DCS_RX2
4 16
RFIPP
SI4205 TXIP
4
VC2 15 5
16 5

b
VC3 PCS_RX1 1.5p GND1 TXIN
7 6 36 6
C VC1 PCS_RX2 C525 GND8 TXQP C
35 7
GND7 TXQN
15 34

SCLK

VDD1
_PDN
_SEN
DCS_PCS_TX 1.5p GND6

SDO
33

XIN
SDI
GSM_TX 17 C 5 31 L504 GND5
GND3 GND1

o
GND4 GND2 6.8nH

9
8
14
13

11
12

10
RF2V85 2V75_VVCXO
9

12 13 19
1.5p
C 54 0

1.5p C527 C528

C541 L502 C530
0.022u 22 p

M
5.6nH 1000p X500
3 1 R516
OUT VCONT AFC

100
R514
1.5p C538 15K
4 2
C542 VCC GND 1000p
C536
13MHz
2.2u

R512
ANT_SW3 GPO_10 RF2V85
C535 0
270p VBAT
RF_PWR_DWN GPIO_4
U702 MIC5255-2.85BM5 GPO_21
D S_CLK D
1 5
R515 IN OU T S_EN GPO_19
2 GPO_20
ANT_SW2 GPO_11 GND S_DATA
CLKON 3 4
C537 0 EN BYP
270p

C 533 C734 C534

10u 0.01u 10 u C730 C731 C732 C733
R517
ANT_SW1 GPO_9 (1608) 27p 27p 27p 27p
C539 0
2 70p

ANT SW CONTROL TABLE Section Date Sign & Name FG101 Sheet/Sheets
VC1 VC2 VC3
2004. MODEL
EGSM_TX L L H
Designer 12.08 KIM Y.G. -RADIO 5/5
L H L
DCS/PCS_TX 2004.
E Checked LEE S.Y.
EGSM/DCS_RX L L L 12.08 DRAWING
2004. NAME RF
PCS_Rx H L L
Approved 12.08
KIM B.Y.

Iss. Notice No. Date N a me DRAWING

LG Electronics Inc. NO.
Ver.1.0
1 2 3 4 5
LGIC(42)-A-5505-10:01 LG Electronics Inc.

- 103 -
 8. PCB LAYOUT

M o b i

- 104 -
lc h ip s

Figure 8-1 B2000 BOTTOM SIDE PCB LAYOUT

 M o b i

- 105 -
lc h ip s

Figure 8-1 B2000 TOP SIDE PCB LAYOUT

8. PCB LAYOUT