Auxiliary Power Supply for the Control IC of a Buck Converter

Ray-Lee Lin and Hung-Ming Chen

Department of Electrical Engineering
National Cheng Kung University
Tainan City, Taiwan
rayleelin@ee.ncku.edu.tw

ABSTRACT – This paper presents a charge-pump auxiliary

power supply for sourcing the control IC of a buck converter
L1
without any additional magnetic device. The prototype of a S
48V buck converter with this charge-pump auxiliary power Rs
supply is implemented to validate the performance of the +
proposed circuit. The application of the proposed charge-pump Vi PWM IC

auxiliary power supply can be extended to other converters, Co Ro Vo

such as the buck-boost and the Zeta. Vcc D1 −

I. INTRODUCTION C2 Dz

In order to supply the required DC voltage for the control

IC in a buck converter, two conventional schemes have been Fig. 2. Auxiliary winding supplies the operational power of a
developed: The independent DC voltage source and the PWM IC for a boost converter [1].
winding-type auxiliary power supply are briefly introduced
as follows.
Fig. 1 shows an independent DC voltage source that Fig. 3 shows a charge-pump (CP) type of DC voltage
supplies the required DC voltage Vcc for the pulse-width source used to supply the required DC voltage Vcc for the
modulation (PWM) IC in a typical buck converter. This control IC in a typical electronic ballast circuit [2]. This
independent DC voltage source is unpopular with the approach also utilizes a Zener regulator, which has the same
industry because of its high cost. composition and function as that shown in Fig. 2 The CP
power scheme is composed of CP capacitor C1 and two
diodes, D2 and D3. After the half-bridge begins to operate,
the CP power scheme starts to charge the DC capacitor C2
S L1
and then supplies the Zener-regulated DC voltage to the
Vi PWM IC + PWM IC.
Co Ro Vo
Vcc
D1 −
D4
+ DC
- Source

S1
Vi Rs PWMIC
Fig. 1. DC source supplies the operational power of a PWM IC
for a buck converter. C1 CB LS
Vcc
S2 Rlamp Cp
Fig. 2 shows a coupled-winding type auxiliary power D2
C2 Dz
supply to provide the required DC voltage Vcc for the PWM
IC in a typical buck converter [1]. This approach includes a D3
Zener regulator, which is composed of resistor Rs, Zener Fig. 3. Typical conventional electronic ballast circuit.
diode DZ and capacitor C2 in order to provide the starting
current of the PWM IC. After switch S begins to operate,
auxiliary coupled winding L2 starts to charge DC capacitor The concept of the CP power scheme can be further
C2 and then supplies the Zener-regulated DC voltage to the applied to the buck converter, as shown in Fig. 4. The
PWM IC. With only one additional winding on the inductor operational principles and design of the proposed auxiliary
L, this conventional coupled-inductor auxiliary power CP power supply for the buck converter’s control IC are
supply is very attractive to the industry because of its described in the following section.
cost-effectiveness.

1-4244-0136-4/06/$20.00 '2006 IEEE 2444

 Mode 1 [T0~T1]: The switch is turned on at time T0, and
D3 begins to conduct. Input current ii flows through C1 and
S L1 C2, as shown in Fig. 6. The capacitor voltages of C1 and
C2 are charged by the input voltage source.
PWM IC C1 +
Vi
D3 Rs Vo
Co Ro ii
Vcc D1
D2
−
D D
S
L1
C2 Dz
C1 +
Vi Rs PWM IC
Co Ro Vo
D3
Fig. 4. Charge-pump auxiliary power supply for the control IC of
the buck converter. D1 −
Vcc D2

C2 Dz

Fig. 6. Operation at Mode 1 of the buck converter.

II. OPERATIONAL PRINCIPLES AND DESIGN OF THE
PROPOSED AUXILIARY CHARGE-PUMP POWER
SUPPLY FOR THE BUCK CONVERTER’S CONTROL IC Mode 2 [T1~T2]: At time T1, the switch is still turned on.
The input current flows through inductor L1, output
The operational principles at steady state can be divided capacitor CO and load resistor RO, as shown in Fig. 7. The
into the following four modes, as also shown in Fig. 5. output voltage across CO is charged by the input voltage
source. The maximum inductor current [3] is expressed as
∆iL VO VO ⋅ (1 − D ) ⋅ T , (1)
I L , max = I L + = + 1
1
2 RO 1
2 ⋅ L1
S iC1 L1 where IL1 is the main inductor current,
+
V T is the switching period, and
− C1 +
Vi D3 iD3 PWM IC C1
RO is the output load resistance.
Rs Vo
Co Ro
Vcc D1 iD2 −
ii L1
D2 D D
C2 Dz S I L1
(a) C1 +
PWM IC
Vi D3 Rs Co Ro Vo
−
D1
Vcc D2
vGS C2 Dz

Fig. 7. Operation at Mode 2 of the buck converter.

vC1

Mode 3 [T2 ~ T3]: At time T2, the switch is turned off and
iD2 diode D2 starts to conduct. Main inductor current iL1 flows
through CO, D2 and C1, as shown in Fig. 8. The capacitor
iD3 voltage across C1 decreases to zero. The minimum value of
CP capacitor C1 can be obtained as shown in Equation (3):
i L1 ∆Q = C1 × ∆V = iL1 × ∆t , and (2)
∆t , (3)
C1 ≥ I L1 , max ×
iC 1 ∆VC1
t where ∆t is defined as (tf +tD(OFF)),
T0 T1 T2 T3 T4 tf is the falling time of the MOSFET, and
(b) tD(OFF) is the turn-on delay time of the MOSFET.
Fig. 5. (a) Circuit diagram and (b) waveforms in the charge-pump
auxiliary power supply of the buck converter’s control Additionally, the maximum of discharged time period ∆t is
IC.
(1-D)·T. The maximum value of CP capacitor C1 is obtained

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as shown in Equation (4). L2
C2

(1 − D )T (4) S
C1,max = I L1 , max ×
∆VC 1
C1 +
According to Equations (3) and (4), the capacitance range of D3 Rs PWMIC
PWM IC
Vi
CP capacitor C1 is expressed as shown in Equation (5). D1 Co
Ro Vo
L1 −
(t f + tD (OFF ) ) (1 − D )T (5)
I L1 ,max × ≤ C1 < I L1 ,max × Vcc
D2
∆VC1 ∆VC1
C3 Dz
i L1

S L1 Fig. 11. Auxiliary power supply for the control IC of a Zeta

C1 +
converter.
Vi D3 Rs PWM IC
Co Ro Vo IV. IMPLEMENTATION OF AND EXPERIMENTAL RESULTS
− FOR THE PROPOSED AUXILIARY POWER SUPPLY FOR
Vcc D1 D2
THE BUCK CONVERTER’S CONTROL IC
C2 Dz
A. Implementation of the Prototype Circuit
Fig. 8. Operation at Mode 3 of the buck converter.
In this paper, a 50kHz, 48V prototype buck converter
utilizing the proposed CP auxiliary power scheme is
Mode 4 [T3~T4]: The switch is still turned off at time T3, implemented to demonstrate the operation. It is regulated at
and D1 starts to conduct. The main inductor current flows 48W output power with a 90~120V input range. The power
through CO, RO, and D1, as shown in Fig. 9. The output stage circuit diagram is given in Fig. 12. Designed
voltage across CO is charged by main inductor current IL1. parameters of the proposed auxiliary power supply circuit
for a buck converter are shown in Table 1. Based on these
iL1 parameters, the proposed CP auxiliary power supply scheme
for the buck converter has been built, and the experimental
L1 results are shown as follows.
S
C1 + Table 1. Designed parameters of the proposed auxiliary power
Vi PWM IC
D3 Rs Co Ro Vo supply circuit of a buck converter.
−
COMPONENT NAME VALUES
Vcc D1
D2 Input Capacitor (Ci) 200V, 470μF
C2 Dz Charge-Pump Capacitor (C1) 2.2nF
Input Capacitor of PWM IC (C2) 25V, 22μF
Fig. 9. Operation at Mode 4 of the buck converter. Output Capacitor (CO) 100V, 100μF
Start-up Resistance (R S) 1W, 56kΩ

III. EXTENDED APPLICATION Output Resistance (RO) 48Ω

Diode (D1) IXYS 8-06H
Besides the buck converter, the proposed auxiliary power Diode (D2, D3) 1N5819
Zener Diode (D Z) 1W, 18V
supply circuit can be also applied to the buck-boost and Zeta
Main Inductor (L1) 420μH
converters, as shown in Figs. 10 and 11, respectively.
PWM IC UC3842
Switch (S) IRF740

S
D1
C1 +
Vi D3 Rs PWM IC
Co Ro Vo S L1
L1
− D3 C1
Vcc D2 Ci Rs PWM IC
+

Co Ro Vo
C2 Dz
Vcc D1 −
D2
90~120V
Fig. 10. Auxiliary power supply for the control IC of a C2 Dz
buck-boost converter.

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Fig. 12. The prototype circuit for the proposed charge-pump Fig. 14 shows the buck converter’s measured VO, IO, VC2
auxiliary power supply circuit for a buck converter. waveforms at different load conditions -- 10%, 50% and
B. Experimental Results 100% of the full load, respectively; as illustrated, the VC2,
The buck converter circuit’s measured voltage VO which is the DC voltage for the PWM control IC, is very
waveform for the output load, the current IO waveform for stable and is independent of different load conditions.
the output load, and the voltage VC2 waveform for the input
capacitor UC3842 are shown in Fig. 13. The output 10µ s / div
voltage equals 48V DC at different input voltage levels. The
capacitor voltage of C2 is well regulated at 18 V DC. Vo VO (50V / div )
10µ s / div
I O (500 mA / div )
Vo Io
VO (50V / div )
VC 2 (10V / div)
Io
I O (500 m A / d iv ) VC2
VC 2 (10V / div ) (a)
VC 2
10µ s / div
(a)
10 µ s / div
Vo
VO (50V / div )
Vo
VO (50V / div ) I O (500 m A / div )
Io
Io I O (500 m A / d iv ) VC 2 (10V / div)
VC 2 (10V / div ) VC 2
VC 2
(b)
(b)
10 µ s / div 10µs / div

Vo Vo
VO (50V / div ) VO (50V / div )
Io I O ( 5 00 m A / div )
Io I O (500 mA / div )
VC 2 (10V / div )
VC 2 (10V / div)
VC 2
VC 2
(c)
(c)
10 µ s / div Fig. 14. VO, IO, VC2 waveforms of the buck converter at different
dimming levels: (a) full load, (b) 50% of full load, and (c)
Vo 10% of full load.
VO (50V / div )
Fig. 15 shows the measured turn-off transition waveforms
Io I O ( 500 m A / div ) for VDS, IDS and switching loss PSW of main switch S in the
buck converter employing an independent DC voltage
VC 2 (10V / div ) source. These same waveforms for the buck converter’s
VC 2 auxiliary power supply circuit, but with the proposed circuit,
are shown in Fig. 16. As illustrated in the two figures, the
(d) proposed circuit leads to less turn-off switching loss on main
Fig. 13. VO, IO, VC2 waveforms of the buck converter with switch S.
different input voltage levels: (a) 90V AC, (b) 100V AC, The measured efficiency of the buck converter is shown
(c) 110V AC, and (d) 120V AC, all at the full-load in Fig. 17. At the heavy-load condition it is 93.40%; at the
condition.

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light-load condition it is 83.17%. 100
The measured input power levels of the buck converter
95
using the proposed circuit and the DC source are shown in

Efficiency(%)
Fig. 18. 90
iL1
iDS vDS 85
+ −
L1 80

+ 75
+ PWMIC
VDC Vo 48 55 60 70 80 100 120 160 240 480
VAC −C Co Ro Rl oad( Ω )
i
Vcc D1 −

VC2 Fig. 17. Efficiency of the buck converter with the proposed
auxiliary power.

(a)
60
200 ns / div 50 W/
40 W/O

Pin (W)
30
i D S (1 A / div ) v DS (50V / div ) 20
vDS,iDS 10
0
Turn − off Switching Loss
48 55 60 70 80 100 120 160 240 480
PSW (50W / div)
Rload(Ω)

Fig. 18. Measured input power levels of the buck converter with
(b) the proposed auxiliary power and DC source.
Fig. 15. (a) Circuit diagram and (b) vDS, iDS, PSW waveforms for
the buck converter’s auxiliary power supply circuit that is
a DC source, during turn-off transition. V. CONCLUSIONS
iL1
iDS This paper has proposed a new auxiliary power supply
v
+ DS − circuit for the control IC of converters. The proposed
L1
+
auxiliary power supply for the control IC of a buck
VC
− 1 + converter gains a stable operational voltage by utilizing the
VDC
+
D3 iD3 PWMIC C1
Rs
Vo new circuit. Based on the application to a buck converter,
VAC −C Ro
i
D1
Co
− buck-boost and Zeta converters are also shown to benefit
+ Vcc iD2
VC2 D2 from this circuit.
−
C2 Dz
In addition, experimental results show that the proposed
circuit achieves a lower level of turn-off switching loss.
(a) The output voltage of the buck converter is not changed by
different load sizes or input voltages. The input power of the
200 ns / div buck converter using the proposed auxiliary power circuit is
similar to that of the buck converter with a DC-source
auxiliary power supply. The efficiency of a buck converter
with the proposed auxiliary power circuit was found to be
i D S (1 A / div ) v DS (50V / div ) 93.4% at the heavy-load condition. Thus, the new
vDS ,iDS vDS ,iDS auxiliary power supply is shown to be advantageous for use
in the converter’s control IC.
Turn − off Switching Loss
PSW (50W / div )
VI. ACKNOWLEDGMENTS
(b) This work was sponsored by the National Science Council,
Fig. 16. (a)Circuit diagram and (b)vDS, iDS, PSW waveforms for the Taiwan, under Grant Number NSC 93-2213-E-006-138.
buck converter’s auxiliary power supply circuit that is the Also, this work made use of Shared Facilities supported by
proposed three-terminal charge-pump cell, during the Program of Top 100 Universities Advancement, Ministry
turn-off transition. of Education, Taiwan.

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 REFERENCES

[1] L6561 Data Sheet, STMicroelectronics, 1999.

[2] IR2166 Data Sheet, International Rectifier.
[3] Robert W. Erickson and Dragan Maksimovic,
Fundamentals of Power Electronics, Kluwer Academic,
Colorado, 2001.
[4] D. W. Hart, Introduction to Power Electronics,
Prentice-Hall, 1996.
[5] Abraham I. Pressman, Switching Power Design,
McGraw-Hall, 1999.
[6] Ray L. Lin and Fred C. Lee, “Single Power Supply
Based Transformer-less IGBT/MOSFET Gate Driver
with 100% High-Side Turn-on Duty Cycle Operation
Performance Using Auxiliary Bootstrapped Charge
Pumper,” Proc. of IEEE PESC’97, St. Louis, Missouri,
June 1997, pp.1205-1209.

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