전력공학II

2. Fault Analysis (고장 해석)

Hwachang Song

1
 Fault Analysis
• The cause of electric power system faults is
insulation breakdown
• This breakdown can be due to a variety of
different factors
– lightning
– wires blowing together in the wind
– animals or plants coming in contact with the wires
– salt spray or pollution on insulators

© Overbye & Baldick

2
 Fault Types
• There are two main types of faults
– symmetric faults: system remains balanced; these
faults are relatively rare, but are the easiest to
analyze so we’ll consider them first.
– unsymmetric faults: system is no longer balanced;
very common, but more difficult to analyze
• The most common type of fault on a three phase
system by far is the single line-to-ground (SLG),
followed by the line-to-line faults (LL), double
line-to-ground (DLG) faults, and balanced three
phase faults

© Overbye & Baldick

3
 Lightning Strike Event Sequence

1. Lighting hits line, setting up an ionized path to ground

 a single typical stroke might have 25,000 amps, with a rise
time of 10 µs, dissipated in 200 µs.
 multiple strokes can occur in a single flash, causing the
lightning to appear to flicker, with the total event lasting up to
a second.

2. Conduction path is maintained by ionized air after

lightning stroke energy has dissipated, resulting in
high fault currents (often > 25,000 amps!)

© Overbye & Baldick

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 Lightning Strike Sequence, cont’d

3. Within one to two cycles (16 ms) relays at both ends of

line detect high currents, signaling circuit breakers to
open the line
 nearby locations see decreased voltages
4. Circuit breakers open to de-energize line in an
additional one to two cycles
 breaking tens of thousands of amps of fault current is no small
feat!
 with line removed voltages usually return to near normal
5. Circuit breakers may reclose after several seconds,
trying to restore faulted line to service

© Overbye & Baldick

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Arcing fault problem
• 저전압 배전 계통에서 arcing-fault current에
의하여 Burn-down이 많이 발생하고 있음.

New York의 한 아파트 빌딩 단지에서 두

개의 480/277 V, 5000 A 인입 모선이
고장전류에 의하여 심하게 손상을 입음.
복구하는 데 장기간이 걸림 (엘리베이터,
복도 전등, 물 펌프 등을 사용할 수 없었음)
Two incoming lines with 480/277 V (5000 A)
in an apartment building area in New York, got
seriously damaged. It took a long period of
time to restore it.

Burndown damage
caused by arcing current 6
 Fault Analysis
• Fault currents cause equipment damage due to
both thermal and mechanical processes
• Goal of fault analysis is to determine the
magnitudes of the currents present during the
fault
– need to determine the maximum current to insure
devices can survive the fault Power electronic
Converters, Wind turbines

– need to determine the maximum current the circuit

breakers (CBs) need to interrupt to correctly size the
CBs From the viewpoint of
Electric utilities

© Overbye & Baldick

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 1. RL Circuit Analysis
• To understand fault analysis we need to review
the behavior of an RL circuit Why?

v(t ) =
2 V sin(ωt + α )

Before the switch is closed obviously i(t) = 0.

When the switch is closed at t=0 the current will
have two components: 1) a steady-state value
2) a transient value
© Overbye & Baldick
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 RL Circuit Analysis, cont’d
1. Steady-state current component (from standard
phasor analysis)
2 V sin(ωt + α )
iac (t ) =
Z
where Z = R 2 + (ω L) 2 = R 2 + X 2
V
I ac = (RMS value)
Z

© Overbye & Baldick

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 RL Circuit Analysis, cont’d
2. Exponentially decaying dc current component
−t
idc (t ) = C1e T From the initial value.

where T is the time constant, T = L

R
The value of C1 is determined from the initial
conditions:
2V −t
i (0) = 0 = iac (t ) + idc (t ) = sin(ωt + α − θ Z ) + C1e T
Z
2V
C1 = − sin(α − θ Z ) which depends on α
Z

© Overbye & Baldick

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Time varying current
di (t )
L + Ri
= (t ) 2V sin (ωt + α ) , t ≥ 0
dt
=
i (t ) iac (t ) + idc (t ) :Asymmetrical fault
current
2V
= sin(ωt + α − θ ) − sin(α − θ )e − t /T  A Iac: symmetrical
Z (steady-state) fault
Idc: dc offset current

Z = R 2 + (ω L ) Ω
2

−1 ω L X
=θ tan
= tan −1
R R
L X X
T= = = s
그림 7.1 R ω R 2π fR
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 RL Circuit Analysis, cont’d
Hence i(t) is a sinusoidal superimposed on a decaying
dc current. The magnitude of idc (0) depends on when
the switch is closed. For fault analysis we're just
2V
concerned with the worst case: C1 =
Z
i (t ) = iac (t ) + idc (t )
Maximum dc offset:
2V π 2V −t
α = (θ-π/2)
=
i (t ) sin(ωt − ) + e T
Z 2 Z
2V π −t
= (sin(ωt − ) + e T )
Z 2

© Overbye & Baldick

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Series R-L circuit transients
• 가장 큰 고장전류에 관심이 있음 (consider the
severest case)
Maximum dc offset: α = (θ-
=
i (t ) 2 I ac sin(ωt − π / 2) + e − t /T  A π/2)
V
I ac =
Z

Let T=X/(2πfR) and t=τ/f, then

( I ac ) + ( I dc (t ) )
2 2
=
I rms (t ) we get:

( I ac ) ( ) I rms (t ) = K (τ ) I ac [ A]
2
2 − t /T
= + 2 I ac e
K (τ=
) 1 + 2e −4πτ /( X / R )
= I ac 1 + 2e −2t /T [ A]
Asymmetry factor: K(τ)

When τ=0, 3 Iac; τ=∞, 0 13

Example
• Consider a bolted short circuit (Zf = 0) applying to a R-L
circuit with V=20kV, X=8Ω, R=0.8Ω. And CB (차단기)
opens the circuit, 3cycles after the fault.
• A) RMS ac fault current?
• B) Momentary current at τ=0.5 cycles
• C) When operating the CB, RMS asymmetrical fault
current?

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 2. Generator Modeling During Faults
• During a fault the only devices that can contribute fault
current are those with energy sources and storage
• Thus the models of generators (and other rotating
machines) are very important since they contribute the
bulk of the fault current.
• Generators can be approximated as a constant voltage
behind a time-varying reactance

Ea'

© Overbye & Baldick

15
Unloaded Synchronous Machine
• 3 phase short circuit – unloaded synchronous machine
• Oscillogram: (dc-offset은 제거됨)

고장전류는 초기에 높은 값으로부터 좀더

낮은 정상상태 값으로 감소함
이유: 고장 시 Armature MMF가 가해짐에
따라 계자 권선 (field winding) 이나
제동권선 (damper winding)에 link되지
않는 높은 reluctance paths를 따라
흐르도록 하기 때문
Armature reluctance is inversely
proportional to reluctance.
그림 7.2
Armature inductance는 초기에는 낮은
값을 그리고 점점 증가하게 됨

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 Generator Modeling, cont’d

The time varying reactance is typically approximated

using three different values, each valid for a different
time period:
X"d = direct-axis subtransient reactance
(차과도 리액턴스)

X 'd = direct-axis transient reactance

(과도 리액턴스)
Xd = direct-axis synchronous reactance
(동기 리액턴스)

Time varying L(t). How do we model it?

© Overbye & Baldick

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Generator Modeling, cont’d
• Iac can be expressed as follows:

 1 1  − t /Td''  1 1  − t /Td'
=
iac (t ) 2 Ea  '' − '  e + ' − e
 X d X d   Xd Xd 
1 
+  sin (ωt + α − π / 2 )
Xd 
Ea: terminal voltage at pre-fault state (고장전 단자전압)
t = 0일 때, Ea
= =
I ac (0) ''
I ''
: subtransient fault current
Xd
X’d에 해당하는 Ea t = ∞,
Ea
시간이 되었을 때,
I = '
'
I ad (∞=
) = I
Xd Xd
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 Generator Modeling, cont'd
The phasor current is then
 1  1 1  −
t
Td'
 RMS value
 + ' − e +
'  d  Xd Xd  
X
I ac = Ea  
− t "

 1 1  
−
 X " X '  e Td

 d d  
The maximum DC offset is
2 Ea' − t TA − t
=
I DC,max (t ) = "
e 2I '' e TA DC components can
be added.
Xd
where TA is the armature time constant ( ≈ 0.2 seconds)

DC offset current also depends on I’’ (subtransient fault current, 차과도 고장전류)

© Overbye & Baldick

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 Generator Short Circuit Currents

© Overbye & Baldick

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 Generator Short Circuit Example
• A 500 MVA, 20 kV, 3φ is operated with an internal voltage of 1.05
pu. Assume a solid 3φ fault occurs on the generator's terminal and
that the circuit breaker operates after three cycles. Determine the
fault current. Assume
= = "
X d 0.15, =
X d 0.24, '
X d 1.1 (all per unit)
= =
Td" 0.035 seconds, Td' 2.0 seconds
TA = 0.2 seconds

• 500 MVA 20kV, 60Hz 동기발전기의 X’’d=0.15, X’d=0.24, Xd=1.1 [pu]이며,

T’’d=0.035, T’d=2.0, TA=0.2 [s] 일 때, 이 발전기가 CB와 연결되어 있다고
하자.
• 이 발전기가 정격 전압보다 5% 높게 운전되고 있으며 무부하 상태에서
3상 bolted fault가 적용된 후 3cycle 후에 CB가 동작하였다.
• A) 차과도 고장전류 (subtransient fault current) [pu]?
• B) maximum dc offset function?
• C) At the operation of CB, rms asymmetrical fault current?
© Overbye & Baldick
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 Generator S.C. Example, cont'd
Substituting in the values
1  1 1  − t 2.0 
1.1 +  0.24 − 1.1  e +
I ac (t ) = 1.05  
 1 − 1  e− 0.035 t

 0.15 0.24  
=I '' I= ac (0) = 7 p.u.
1.05
0.15
500 × 106
=
I base = =
14,433 A, I '' 101,000 A
3 20 × 10 3

t
I=
DC (t ) 101 kA × 2 e
0.2 , I DC (0) = 143 k A
∴ I RMS (0) =
175 kA

© Overbye & Baldick

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 Generator S.C. Example, cont'd
Evaluating at t = 0.05 seconds for breaker opening
1  1 1  −0.05 2.0 
1.1 +  0.24 − 1.1  e +
I ac (0.05) = 1.05  
−
 1 − 1  e 0.05

 0.15 0.24 
0.035

=
I ac (0.05) = 4.92pu 71.01 kA
−0.05
I DC (0.05) =
143 × e 0.2 kA =
111 k A
I RMS (0.05)= 70.82 + 1112= 132 kA

© Overbye & Baldick

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 3. Network Fault Analysis Simplifications

• To simplify analysis of fault currents in

networks we'll make several simplifications:
1. Transmission lines are represented by their series
reactance
2. Transformers are represented by their leakage
reactances
3. Synchronous machines are modeled as a constant
voltage behind direct-axis subtransient reactance
4. Induction motors are ignored or treated as
synchronous machines (> 50HP)
5. Other (nonspinning) loads are ignored
Load current is ignored. (부하전류 무시)
© Overbye & Baldick
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 Network Fault Example
For the following network assume a fault on the
terminal of the generator; all data is per unit
except for the transmission line reactance

generator has 1.05

terminal voltage &
supplies 100 MVA
with 0.95 lag pf
19.5
Convert to per unit:=
X line = 2
0.1 per unit
138
100 25
© Overbye & Baldick
 Network Fault Example, cont'd

Faulted network per unit diagram

To determine the fault current we need to first estimate

the internal voltages for the generator and motor
For the generator VT =1.05, SG =1.0∠18.2°
*
 1.0∠18.2 
I=
Gen  =  0.952∠ − 18.2° =
E a 1.103∠7.1°
'
 1.05 
© Overbye & Baldick
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 Network Fault Example, cont'd

The motor's terminal voltage is then

1.05∠0 - (0.9044 - j 0.2973) × j 0.3
= 1.00∠ − 15.8°
The motor's internal voltage is
1.00∠ − 15.8° − (0.9044 - j 0.2973) × j 0.2
= 1.008∠ − 26.6°
We can then solve as a linear circuit:
1.103∠7.1° 1.008∠ − 26.6°
If = +
j 0.15 j 0.5
= 7.353∠ − 82.9° + 2.016∠ − 116.6 = ° j 9.09
© Overbye & Baldick
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 Fault Analysis Solution Techniques

• Circuit models used during the fault allow the

network to be represented as a linear circuit
• There are two main methods for solving for fault
currents:
1. Direct method: Use prefault conditions to solve for
the internal machine voltages; then apply fault and
solve directly
2. Superposition: Fault is represented by two opposing
voltage sources; solve system by superposition
– first voltage just represents the prefault operating
point
– second system only has a single voltage source
© Overbye & Baldick
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 Superposition Approach

Faulted Condition

Exact Equivalent to Faulted Condition

Fault is represented
by two equal and
opposite voltage
sources, each with
a magnitude equal
to the pre-fault voltage
© Overbye & Baldick
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 Superposition Approach, cont’d

Since this is now a linear network, the faulted voltages

and currents are just the sum of the pre-fault conditions
[the (1) component] and the conditions with just a single
voltage source at the fault location [the (2) component]

Pre-fault (1) component equal to the pre-fault

power flow solution
Obvious the
pre-fault
“fault current”
is zero!

© Overbye & Baldick

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 Superposition Approach, cont’d

Fault (1) component due to a single voltage source

at the fault location, with a magnitude equal to the
negative of the pre-fault voltage at the fault location.

Ig =
I (1) + I g(2) Im =
I m(1) + I m(2)
g

I f =I (1)
f + I (2)
f =+
0 I (2)
f
© Overbye & Baldick
31
 Two Bus Superposition Solution

Before the fault we had E=

f 1.05∠0°,
I (1) = 0.952∠ − 18.2° and I m(1) = −0.952∠ − 18.2°
g

Solving for the (2) network we get

Ef 1.05∠0°
(2)
Ig = = = − j7
j0.15 j0.15
E f 1.05∠0°
(2)
Im = = = − j 2.1
j0.5 j0.5
This matches
I (2)
f =− j 7 − j 2.1 =− j 9.1 what we
=
I g 0.952∠ − 18.2° − =
j 7 7.35∠ − 82.9° calculated
earlier 32
© Overbye & Baldick
 Extension to Larger Systems
The superposition approach can be easily extended
to larger systems. Using the Ybus we have
Ybus V = I
For the second (2) system there is only one voltage
source so I is all zeros except at the fault location
 M
 0  However to use this
  approach we need to
I = − I f 
  first determine If
 0 
 M  33
© Overbye & Baldick
 Determination of Fault Current

Define the bus impedance matrix Z bus as

−1
Z bus =@ Ybus V = Z busI
 M  V 1
(2) 

   
 Z11 L Z1n  0
   M
Then  M O M   − I f  =  −V f 
i-th
component
    
 Z n1 L Z nn   0   M 
 M  V (2) 
 n 
For a fault a bus i we get -If Zii = −V f

© Overbye & Baldick

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 Determination of Fault Current

Hence
Vi(1)
If =
Zii
Where
Zii @
= driving point impedance
Zij (i ≠ j ) @
= transfer point imepdance
Voltages during the fault are also found by superposition
=
Vi Vi(1) + Vi(2) Vi(1) are prefault values

© Overbye & Baldick

35
Bus impedance matrix
VF
I =''
Fi 차과도
Z ii 고장전류

− Z ki
E (2)
k = Z ki (− I ) =
''
Fi VF
Z ii
2) 1)

Z ki
Ek =Ek(1) + Ek(2) =VF − VF
Z ii
 Z ki 
= 1 −  VF
 Z ii 
• 1) 회로의 전압 Ek(1) + 2) 회로의 전압 Ek(2) 의 영향을 더해 주어야 함
(superposition principle)
• 부하전류의 영향 (전압 강하) 무시: Ignore load currents (voltage
drop as well then)
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Example

• Prefault voltage: 1.05 [pu],

(ignoring load current)
• A) 2x2 positive-sequence Zbus
matrix?
• B) In the case of bolted fault, All elements are
using Zbus, calculate 3phase expressed in [pu]
admittance
short circuit current at bus 1.
• C) During fault, calculated the
voltage of bus 2.
• D) During fault, I21?

37
 Homework#1
• Problem 7.4, 7.8, 7.14
• 2주 후 제출

© Overbye & Baldick

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