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LCD Ie h1602b
LCD Ie h1602b
LCD Ie h1602b
Contents
1. Precautions in use of LCD Modules
2. General Specification
3. Absolute Maximum Ratings
4. Electrical Characteristics
5. Optical Characteristics
6. Interface Pin Function
7. Contour Drawing & Block Diagram
8. Function Description
9. Character Generator ROM Pattern
10. Instruction Table
11. Timing Characteristics
12. Backlight Information
13. Initializing of LCM
1
1. Precautions in use of LCD Modules
(1)Avoid applying excessive shocks to the module or making any alterations or modifications to it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the components
of LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.
2. General Specification
Item Dimension Unit
Number of Characters 16 characters x 2 Lines -
Module dimension 80.0 x 36.0 x 13.2(MAX) mm
View area 66.0 x 16.0 mm
Active area 56.2 x 11.5 mm
Dot size 0.55 x 0.65 mm
Dot pitch 0.60 x 0.70 mm
Character size 2.95 x 5.55 mm
Character pitch 3.55 x 5.95 mm
LCD type STN, Positive
Duty 1/16
View direction 6 o’clock
Backlight Type LED
2
4. Electrical Characteristics
Item Symbol Condition Min Typ Max Unit
Supply Voltage For Logic VDD-VSS - 2.7 - 5.5 V
Ta=0°C - - 4.2 V
Supply Voltage For LCD VDD-V0 Ta=25°C - 3.8 - V
Ta=+50°C 3.4 - - V
Input High Volt. VIH - 2.2 - VDD V
Input Low Volt. VIL - - - 0.6 V
Output High Volt. VOH - 2.4 - - V
Output Low Volt. VOL - - - 0.4 V
Supply Current IDD VDD=5V - 1.2 - mA
5. Optical Characteristics
Item Symbol Condition Min Typ Max Unit
Contrast Ratio CR - - 3 - -
10¢ H
Cr Max
Cr = Lon / Loff 90¢ H
100¢ H
Vop
Driving Voltage(V) Tr Tf
Conditions :
Operating Voltage : Vop Viewing Angle(θ) : 0°
Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias
3
Definition of viewing angle(CR≥2)
θb
θf
ϕ = 180°X
θl
θr
ϕ = 270°X ϕ = 90°X
ϕ = 0°X
4
7. Contour Drawing &Block Diagram
80.0 0.5
1 Vss
4.95 71.2
7.55 66.0(VA) 2 Vdd
12.45 56.2(AA) 3 Vo
15.76 8.0 P2.54*15=38.1 H1 max 4 RS
12.55
11.76
2.5
2.5
5.2
5 R/W
6 E
1 16
K 7 DB0
18.3
8 DB1
36.0 0.5
11.5(AA)
16(VA)
5.08
13.08
9 DB2
31.0
26.2
10 DB3
A
11 DB4
12 DB5
4- 1.0 40.55 4- 2.5 PTH 1.6
2.5 75.0 4- 5.0 PAD 13 DB6
14 DB7
LED B/L
15 A/Vee
3.55 H1 13.2 16 K
2.95 0.6 H2 8.6
0.6
0.55
0.7
0.65
5.55
5.95
DOT SIZE
RS Com1~16
R
R/W Controller/Com Driver A
MPU B/L
K
E
DB0~DB7
HD44780
or 16X2 LCD
80 series Equivalent
or
68 series 2.Drive from pin15, pin16
Seg1~40 R R
Vdd A
B/L
Power Circuit
Seg41~80
Vo K
Bias and
VR D Seg Driver
10K~20K Vss LCM
M (Will never get Vee output frompin15)
CL1
Generator
CL2
Vee
Vdd,Vss,V1~V5
N.V.
Character located 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAMaddress 00 01 02 03 04 05 06 07 08 09 0A0B0C0D0E 0F
DDRAMaddress 40 41 42 43 44 45 46 47 48 49 4A4B4C4D4E 4F
5
8. Function Description
The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information for
display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written from
the MPU. The DR temporarily stores data to be written or read from DDRAM or CGRAM. When
address information is written into the IR, then data is stored into the DR from DDRAM or
CGRAM. By the register selector (RS) signal, these two registers can be selected.
RS R/W Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB7)
1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)
AC
AC6 AC5 AC4 AC3 AC2 AC1 AC0 1 0 0 1 1 1 0
(hexadecimal)
6
Display position DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
2-Line by 16-Character Display
7
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
patterns
Table 1.
F o r 5 * 8 d o t c h a ra c te r p a tte r n s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 * * * 0
0 0 1 * * * 0 0 0
0 1 0 * * * 0 0 0
0 1 1 * * * 0 C h a ra c te r
0 0 0 1 0 0 * * * 0 0 0 p a tte rn ( 1 )
0 0 0 0 * 0 0 0
1 0 1 * * * 0 0 0
1 1 0 * * * 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * * 0 0 0
0 0 1 * * * 0 0 0
0 1 0 * * *
0 1 1 * * * 0 0 0 0 C h a ra c te r
0 0 0 0 * 0 0 1 0 0 1 1 0 0 * * * p a tte rn ( 2 )
1 0 1 * * * 0 0 0 0
1 1 0 * * * 0 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte rn
0 0 0 * * *
0 0 1
0 0 0 0 * 1 1 1 1 1 1 1 0 0
1 0 1
1 1 0
1 1 1 * * *
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 * * * 0 0 0 0 0
0 0 1 0 * * * 0 0
0 0 1 1 * * * 0 0
0 1 0 0 * * * 0 0 0
0 0 0 0 * 0 0 0 0 0 0 1 0 1 * * * 0 0 0
0 1 1 0 * * * 0 C h a ra c te r
0 1 1 1 * * * 0 0 0 0 p a tte rn
1 0 0 0 * * * 0 0 0 0
1 0 0 1 * * * 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 C u rs o r p a tte rn
1 1 1 1 * * * * * * * *
: " H ig h "
8
9. Character Generator ROM Pattern
Table.2
Upper
4 bit
Lower LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH
4 bit
CG
RAM
LLLL (1)
LLLH (2)
LLHL (3)
LLHH (4)
LHLL (5)
LHLH (6)
LHHL (7)
LHHH (8)
HLLL (1)
HLLH (2)
HLHL (3)
HLHH (4)
HHLL (5)
HHLH (6)
HHHL (7)
HHHH (8)
9
10. Instruction Table
Instruction Code
Execution time
Instruction Description
(fosc=270Khz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
I/D = 0 : Decrement C=0 : Cursor OFF R/L = 0 : Left Shift F = 1 : 5x11 Dots
S=0 : No display shift B=0 : Blink OFF DL = 0 : 4 Bits BF = 0 : Can Accept Data
D=0 : Display OFF S/C = 0 : Cursor Move N = 0 : 1 Line ADD : DD RAM Address
* : don't care
10
11. Timing Characteristics
11.1 Write Operation
RS VIH1
VIL1
tsu1 th1
R/W
VIL1 VIL1
tw th1
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tsu2 th2
tr
VIH1 VIH1
DB0~DB7 Valid Data
VIL1 VIL1
tc
RS VIH1
VIL1
tsu th
R/W
VIH1 VIH1
tw th
tf
E VIH1 VIH1
VIL1
VIL1 VIL1
tD tDH
tr
VIH1 Valid Data VOH1
DB0~DB7 VIL1 VOL1
tc
11
VDD = 4.5V~5.5V , Ta = -30°C-85°C
12
13. Initializing of LCM
Power on
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set ( Interface is 8 bits long. Specify
0 0 0 0 1 1 N F * * the number of display lines and font. )
0 0 0 0 0 0 1 0 0 0 The number of display lines and character font
0 0 0 0 0 0 0 0 0 1 can not be changed after this point.
0 0 0 0 0 0 0 1 I/D S Display off
Display clear
Entry mode set
Initialization ends
8-Bit Ineterface
13
Power on
RS R/W DB7 DB6 DB5 DB4 BF can be checked after the following instructions.
0 0 0 0 1 0 When BF is not checked , the waiting time between
0 0 0 0 1 0 instructions is longer than execution instruction time.
0 0 N F * *
Function set ( Set interface to be 4 bits long. )
0 0 0 0 0 0 Interface is 8 bits in length.
0 0 1 0 0 0
0 0 0 0 0 0 Function set ( Interface is 4 bits long. Specify
0 0 0 0 0 1 the number of display lines and character font. )
0 0 0 0 0 0 The number of display lines and character font
0 0 0 0 I/D S can not be changed after this point.
Display off
Display clear
Entry mode set
Initialization ends
4-Bit Ineterface
14