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Sap 2 PDF
Sap 2 PDF
Sap 2 PDF
Architecture
Simple As Possible- 2
Microprocessor
Design
SAP-2 Registers
Subroutine Counter (SC)
• The subroutine counter can pitch bits for the program counter during two components run.
This occurs when a new instruction takes program control away from the PC at given it to the
SC.
Accumulator
• The two-state output goes directly to the arithmetic logic unit ALU. The three-state output
goes to the W bus. Therefore, the 12-bit accumulator word continuously drives the ALU; the
same word appears on the W bus when EA is high.
B Register
• The high LB and positive clock edge load the word on the W bus into the B register. The two-
state output of the B register drives the ALU.
8-bit address
CLK
Field
IR
EI
CON
High EI and LP
JAZ
Mnemonic for “jump the program counter if the
accumulator is zero.”
Every JAZ instruction includes the address to be
loaded into the PC.
JIM AND JIZ
JIM is the mnemonic for “jump the
program counter if the index register
is minus.” while JIZ is the mnemonic
for “jump the program counter if the
index register is zero.”
Every JIM and JIZ instruction
includes the address to be loaded
into the PC.
JAM, JAZ, JIM and JIZ are called
conditional jumps because the
program jump occurs only if certain
conditions are satisfied. JMP is
unconditional; once this instruction is
fetched, the execution cycle always
jumps the program to the specified
address.
JMS
Mnemonic for “jump to subroutine”.
Every JMS instruction must include the
starting address of the desired subroutine.
When a JMS is executed, program control
passes from the program counter to the
subroutine counter. After each subroutine
instruction is fetched, the SC is
incremented by one.
JMS is unconditional like JMP.
Example:
Describe what happens during the execution
of this program:
R0 = LDA 6
R1 = SUB 7
R2 = JAM 5
R3 = JAZ 5
R4 = JMP 1
R5 = HLT
R6 = 2510
R7 = 910
A square-root subroutine starts at address
A2 and a log subroutine at address C5.
What does the following program do?
R0 = LDA 6
R1 = JMS A2
R2 = ADD 7
R3 = JMS C5
R4 = STA 8
R5 = HLT
R6 = 40010
R7 = 8010
R8 = (ANSWER)
OPERATE INSTRUCTIONS
An operate instructions neither uses the
memory nor alters the program counter.
Instead, it operates on words already
transferred out of memory into working
registers.
These are NOP, CLA, XCH, DEX, INX, CMA,
CMB, IOR, AND, NOR, NAN, XOR, BRB,
INP, OUT, HLT
NOP
NOP mnemonic for “no operation.
During the execution of a NOP
instructions, all the phases are do
nothings. Therefore, nothing happens
when a NOP is executed.
CLA
CLA means “clear the accumulator”.
The execution of a CLA resets all
accumulator bits to zero.
XCH
XCH is the mnemonic for “exchange
accumulator and index.”
During the execution of an XCH, the words
in the accumulator and index register are
interchanged.
DEX
DEX means “decrement the index
register.”
The execution of a DEX decreases the
contents of the index register by one.
INX
INX means “increment the index register.”
This instruction adds one to the index
register.
CMA
CMA stands for “complement the
accumulator.”
The execution of a CMA inverts each bit in
the accumulator, producing 1’s
complement.
CMB
CMB stands for “complement the B
register.”
This instruction inverts each bit in the B
register, resulting in the 1’s complement.
IOR
IOR means “inclusive OR,” identical to the
OR function. The execution of an IOR will
OR the corresponding bits in the
accumulator and B register, the result
appears in the accumulator.
AND, NOR, NAN, XOR perform bitwise
operation to the content of the
accumulator and B register.
BRB
BRB is the mnemonic for “branch back”.
The BRB is used at the end of each
subroutine to get back to the main
program. BRB is to a subroutine as HLT is
to the main program.
INP
INP means “input”. This instruction is
executed in two phases. The first
execution phase loads the input register
with a word from the interface circuit. The
second execution phase transfers this
word to the accumulator.
OUT
OUT stands for “output”. When the
instruction is executed, the accumulator
word is loaded into the output register.
Op-code and Select Code
1111 XXXX XXXX
Op code
Select code
Don’t cares
To program any operate instruction, start with four
1s, follow the select code , and end with four don’t
cares.
NOP = 1111 0000 XXXX
CLA = 1111 0001 XXXX
MRIs and jump instructions use an address field but
operate instructions don’t, because all the operands
are already in the working registers.
SAP-2 Programming
Create a
program a
program that
multiplies two
integers. Use
12 and 8 for
this example.
SAP-2 Programming
Input a number from
interface circuit to
determine if it’s odd.
If the number is odd,
the computer is to
answer YES by
loading 1111 1111
1111 into the output
register. If the
number is even, the
computer is to
answer NO by loading
0000 0000 0000 into
the output register.
JMP Circuit and JMS Flag
JMP Circuit and JMS Flag
Instruction Register