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1 2 3 4 5 6 7 8

KL5A Intel Huron River Platform with Discrete GFX


01
FAN / THERMAL
EMC2103-2

A A

DDR SYSTEM MEMORY


nVIDIA
PCI-E
DDRIII-SODIMM1

27MHz
CPU PCI-Express
PG 13 N12M-GS 533p
Dual Channel DDR3 SandyBridge 0.61

Graphics Interfaces
800/1067/1333 1.5V
DDRIII-SODIMM2
rPGA 988 PG 15~19
PG 14

FDI DMI
PG 3~6
REGULATOR (DDR3)
1.5VSUS, 0.75VSMDDR_VTERM,1.5V
1.5V_GPU,1.5V_CPU
DMIX4

B
REGULATOR B
+1.05V_VTT,+1.8V
FDI DMI
SATA - HDD SATA1 150MB INT_HDMI HDMI CON
PG 20
DC/DC
PG 25
3VPCU, 5VPCU, +15V
SATA3 150MB
PG 36
SATA - CD-ROM INT_CRT CRT
PG 25 PG 21 CPU Core
SATA4 150MB PG 41
USB + eSATA
INT_LVDS
LCD CONN
Port 0 PG 25
PCI-E
PG 22 VGA Core Discrete
Speaker CougarPoint 0.7 PG 38
IHDA
PG 24 AUDIO CODEC Port 1 Port 6 Port 5
PCH
Mini PCI-E Card LAN USB 3.0
Mic in ALC269

25MHz
PG 24 (WLAN/ Wimax) Realtek VL801
(External MIC)
PAGE 27 (10/100&1G co-lay) PAGE 28
PG 24
C RTL8111E-VB-GR C
Int. MIC PAGE 23
Head-Phone out PG 24
PG 7~12 USB2.0

PG 24
Port 5 Port 1 Port 3 Port 2 Port 6
Port 4
USB2.0 Ports X1 BlueTooth Mini PCI-E Card CCD USB DB
PG 27 PG 27 PG 27 Card Reader PG 30 PG 30
LPC
RTS5139
32.768KHz
PAGE 26

7-IN-1 Card
EC Reader CONN
PG 26
IT8518

D D
PAGE 31

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom BLOCK DIAGRAM 1A

Date: Friday, October 29, 2010 Sheet 1 of 45


1 2 3 4 5 6 7 8
1

02
Power States
Table of Contents
CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION SIGNAL ACTIVE IN
1 BLOCK DIAGRAM
2 Front Page VIN 10V~+20V 22,33,35,36,37,39,40,41,42 MAIN POWER S0~S5
3-6 Sandy Bridge (CPU)
+3V_RTC +3.0V~+3.3V 07,08,11,12,32 RTC S0~S5
7-12 CougarPoint (PCH)
13 DDR3 DIMM-0-RVS(4.0H) +3VPCU +3.3V 07,08,22,23,25,30,31,32,34,35,37,38 ITE8052 POWER 3V5V_EN S0~S5
14 DDR3 DIMM-1-RVS(8.0H)
+5VPCU +5V 25,34,35,36,37,38,39,40,41 DC/DC POWER IC SOURCE 3V5V_EN S0~S5
15-19 N12M (GPU)
20 HDMI CONN +15V +15V 22,25,27,34,36,37,38,41 LARGE POWER 3V5V_EN S0~S5
21 CRT CONN
LANVCC +3.3V 23,34 LAN POWER LAN_ON
22 LCD CONN
23 LAN(RTL8111E-VB-GR) +5V_S5 +5V 11,22,25,27,28,34 PCH SUS POWER S5_ON S0~S3
24 AL269/MIC/LINE-OUT
+3V_S5 +3.3V 03,07,08,09,10,11,27,28,31,32,34 Sys Management,PCH Resume S5_ON
25 SATA HDD/ESATA/CD-ROM Well,Intel HD Audio,USB,WLAN S0~S3
26 Card Reader (RTS5139) WiMAX POWER
27 USB2.0*1/WLAN/BT
GFX_CORE +0.9V~+1.2V 15,34,39 VGA CORE POWER MAINON S0
28 USB3.0 or USB2.0
29 FAN /THERMAL +0.75V_DDR_VTT +0.75V 5,14,32 DDR3 SODIMM REFERENCE POWER SYS_PWROK S0
30 K/B, T/P 07,08,11,20,21,24,25,29,30,31,32,34,35,42
+5V +5V SLP_S3# CTRLD POWER MAINON S0
31 B TO B CON/LED
07,08,09,10,11,13,14,15,20,21,22,23,24,25,26,
32 KBC IT8518 27,28,29,31,32,34,35,39,40,41,42 SLP_S3# CTRLD POWER MAINON
A +3V +3.3V S0 A
33 Screw Hole/EMI/ESD
34 Discharge MAINON
+1.8V +1.8V 05,08,11,34,38 LVDS,NVM POWER S0
35 Charger (ISL88731)
MAINON
36 DDR3/0.75V(RT8207LGQW) +1.5V +1.5V 11,25,27,34 Mini PCIe,Express Card POWER S0
37 3V/5V (RT8206MGQW)
+1.05V_PCH +1.05V 03,05,07,08,09,11,34,36,41 PCH CORE POWER MAINON S0
38 +1.8V (HPA00835RTER)
39 GFX_CORE (OZ8117) +VCC_CORE 05,34,42 CPU CORE POWER VRON S0
40 +0.85V (OZ8117)
LCDVCC +3.3V 22 LCD Power INT_LVDS_VDDEN S0
41 +1.05_PCH (OZ8117)
42 IMVP7 2+1 (ISL95831) BAT-V +10V~+17V 35 MAIN BATTERY CHG_PBATT S0~S5
43 KL5A Power On Sequence
44 EC Tracking Record A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Front page
Date: Friday, October 29, 2010 Sheet 2 of 45
1
5 4 3 2 1

Sandy Bridge Processor (DMI,PEG,FDI)


U30A
PEG_COMP
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.
Sandy Bridge Processor (CLK,MISC,JTAG)
U30B
03
PEG_ICOMPI J22 PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
PEG_ICOMPO J21
[7] DMI_TXN0 B27 DMI_RX#[0] PEG_RCOMPO H22 SNB_IVB# N.A at SNB EDS #27637 0.7v1 BCLK A28 CLK_CPU_BCLKP [9]

MISC

CLOCKS
[7] DMI_TXN1 B25 DMI_RX#[1] PEG_RXN[0..15] [15] [8] H_SNB_IVB# C26 PROC_SELECT# BCLK# A27 CLK_CPU_BCLKN [9]
[7] DMI_TXN2 A25 DMI_RX#[2]
B24 K33 PEG_RXN0
[7] DMI_TXN3 DMI_RX#[3] PEG_RX#[0]
M35 PEG_RXN1 SKTOCC# AN34 Ra
D PEG_RX#[1] TP10 SKTOCC# D
B28 L34 PEG_RXN2 A16 CLK_DPLL_SSCLKP_R 3 4 CLK_DPLL_SSCLKP [9]
[7] DMI_TXP0 DMI_RX[0] PEG_RX#[2] DPLL_REF_CLK
B26 J35 PEG_RXN3 A15 CLK_DPLL_SSCLKN_R 1 2
[7] DMI_TXP1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK# CLK_DPLL_SSCLKN [9]

DMI
A24 J32 PEG_RXN4 R558 SW@0X2
[7] DMI_TXP2 DMI_RX[2] PEG_RX#[4] PEG_RXN5
B23 H34
[7] DMI_TXP3 DMI_RX[3] PEG_RX#[5]
H31 PEG_RXN6 TP_CATERR# AL33 R561 Rb *DIS@0/J_4
PEG_RX#[6] TP11 CATERR#
G21 G33 PEG_RXN7 R562 *DIS@0/J_4 +1.05V_PCH
[7] DMI_RXN0 DMI_TX#[0] PEG_RX#[7]
E22 G30 PEG_RXN8
[7] DMI_RXN1 DMI_TX#[1] PEG_RX#[8] Rc

THERMAL
F21 F35 PEG_RXN9
[7] DMI_RXN2
D21
DMI_TX#[2] PEG_RX#[9]
E34 PEG_RXN10
[32] EC_PECI AN33 R8 CPU_DRAMRST# [4]
DIS only SW/UMA
[7] DMI_RXN3 DMI_TX#[3] PEG_RX#[10] PECI SM_DRAMRST#
E32 PEG_RXN11
Ra NA 0 ohm

DDR3
MISC
PEG_RX#[11] PEG_RXN12
[7] DMI_RXP0 G22 D33
DMI_TX[0] PEG_RX#[12] PEG_RXN13
D22 D31
[7] DMI_RXP1
F20
DMI_TX[1] PEG_RX#[13]
B33 PEG_RXN14 [32,42] H_PROCHOT# R78 56/J_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R585 140/F_4 Rb 0 ohm NA

PCI EXPRESS* - GRAPHICS


[7] DMI_RXP2 DMI_TX[2] PEG_RX#[14] PEG_RXN15 PROCHOT# SM_RCOMP[0] SM_RCOMP_1 R128
C21 C32 A5 25.5/F_4
[7] DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXP[0..15] [15] SM_RCOMP[1]
A4 SM_RCOMP_2 R127 200/F_4 Rc 0 ohm NA
PEG_RXP0 SM_RCOMP[2]
J33
PEG_RX[0] PEG_RXP1
PEG_RX[1]
L35 [10] PM_THRMTRIP# AN32
THERMTRIP# SM_RCOMP[0] W:20mils/S:20mils/L: 500mils,
K34 PEG_RXP2
PEG_RX[2] PEG_RXP3
SM_RCOMP[1] W:20mils/S:20mils/L: 500mils,
[7] FDI_TXN0 A21 FDI0_TX#[0] PEG_RX[3] H35
H19 H32 PEG_RXP4 SM_RCOMP[2] W:15mils/S:20mils/L: 500mils,
[7] FDI_TXN1 FDI0_TX#[1] PEG_RX[4]
E19 G34 PEG_RXP5
[7] FDI_TXN2 FDI0_TX#[2] PEG_RX[5]
F18 G31 PEG_RXP6 AP29 XDP_PRDY#

Intel(R) FDI
[7] FDI_TXN3 FDI0_TX#[3] PEG_RX[6] PRDY# TP4
B21 F33 PEG_RXP7 AP27 XDP_PREQ#
[7] FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PEG_RXP8 PREQ# TP5
[7] FDI_TXN5 C20 FDI1_TX#[1] PEG_RX[8] F30
D18 E35 PEG_RXP9 AR26 XDP_TCLK
[7] FDI_TXN6 FDI1_TX#[2] PEG_RX[9] TCK TP89

PWR MANAGEMENT
E17 E33 PEG_RXP10 AR27 XDP_TMS

JTAG & BPM


[7] FDI_TXN7 FDI1_TX#[3] PEG_RX[10] TMS TP88
F32 PEG_RXP11 R584 *Short_4_NC PM_SYNC_R AM34 AP30 XDP_TRST#
PEG_RX[11] [7] PM_SYNC PM_SYNC TRST# TP8
D34 PEG_RXP12
PEG_RX[12] PEG_RXP13 C689 *0.1U/10V_4 XDP_TDI_R
[7] FDI_TXP0 A22 FDI0_TX[0] PEG_RX[13] E31 TDI AR28 TP87
C G19 C33 PEG_RXP14 AP26 XDP_TDO C
[7] FDI_TXP1 FDI0_TX[1] PEG_RX[14] TDO TP86
E20 B32 PEG_RXP15 [10] H_PWRGOOD R594 *Short_4_NC H_PWRGOOD_R AP33
[7] FDI_TXP2 FDI0_TX[2] PEG_RX[15] UNCOREPWRGOOD
[7] FDI_TXP3 G18 FDI0_TX[3]
B20 M29 PEG_TXN0_C R589 10K/J_4
[7] FDI_TXP4 FDI1_TX[0] PEG_TX#[0] PEG_TXN1_C XDP_DBRST#
[7] FDI_TXP5 C19 FDI1_TX[1] PEG_TX#[1] M32 DBR# AL35 XDP_DBRST# [7]
D19 M31 PEG_TXN2_C PM_DRAM_PWRGD_R V8
[7] FDI_TXP6 FDI1_TX[2] PEG_TX#[2] SM_DRAMPWROK
F17 L32 PEG_TXN3_C
[7] FDI_TXP7 FDI1_TX[3] PEG_TX#[3]
L29 PEG_TXN4_C AT28
PEG_TX#[4] PEG_TXN5_C R593 75/J_4 BPM#[0]
[7] FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#[5] K31 +1.05V_PCH BPM#[1] AR29
J17 K28 PEG_TXN6_C AR30
[7] FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[2]
J30 PEG_TXN7_C CPU_PLTRST# R588 43/J_4 CPU_PLTRST#_R AR33 AT30
PEG_TX#[7] PEG_TXN8_C RESET# BPM#[3]
[7] FDI_INT H20 FDI_INT PEG_TX#[8] J28 BPM#[4] AP32
H29 PEG_TXN9_C AR31
PEG_TX#[9] BPM#[5]

RV37
J19 G27 PEG_TXN10_C AT31
[7] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] PEG_TXN11_C BPM#[6]
[7] FDI_LSYNC1 H17 FDI1_LSYNC PEG_TX#[11] E29 BPM#[7] AR32
F27 PEG_TXN12_C
PEG_TX#[12] PEG_TXN13_C
PEG_TX#[13] D28

*EGA-0402
F26 PEG_TXN14_C
PEG_TX#[14] PEG_TXN15_C
PEG_TX#[15] E25
eDP_COMP A18 CPU-989P-rPGA
eDP_COMPIO PEG_TXP0_C
A17 eDP_ICOMPO PEG_TX[0] M28
INT_eDP_HPD_Q B16 M33 PEG_TXP1_C
eDP_HPD PEG_TX[1] PEG_TXP2_C +3V_S5
PEG_TX[2] M30
eDP_COMP connect to PIN A18 W:4mils/S:15mils/L: 500mils. L31 PEG_TXP3_C
PEG_TX[3] PEG_TXP4_C
eDP_COMP connect to PIN A17 W:12mils/S:15mils/L: 500mils. C15 eDP_AUX PEG_TX[4] L28
D15 K30 PEG_TXP5_C +3V_S5
eDP_AUX# PEG_TX[5]
eDP

K27 PEG_TXP6_C +1.5V_CPU


PEG_TX[6] PEG_TXP7_C C207
PEG_TX[7] J29
C17 J27 PEG_TXP8_C *0.1U/10V_4
eDP_TX[0] PEG_TX[8] PEG_TXP9_C
B
F16 eDP_TX[1] PEG_TX[9] H28 B
C16 G28 PEG_TXP10_C C582
eDP_TX[2] PEG_TX[10] PEG_TXP11_C U31 0.1U/10V_4 R109
G15 eDP_TX[3] PEG_TX[11] E28

5
F28 PEG_TXP12_C 1 5 U8 200/F_4
PEG_TX[12] PEG_TXP13_C NC VCC
C18 eDP_TX#[0] PEG_TX[13] D27 [7,36] SYS_PWROK 2
E16 E26 PEG_TXP14_C 2 4 PM_DRAM_PWRGD_Q R112 130/F_4 PM_DRAM_PWRGD_R
eDP_TX#[1] PEG_TX[14] [9,23,27,28] PLTRST# IN
D16 D25 PEG_TXP15_C R114 *0/J_4 1
eDP_TX#[2] PEG_TX[15] [7] PM_DRAM_PWRGD
F15 3 4 CPU_PLTRST#
eDP_TX#[3] GND OUT *74AHC1G09GW

3
74LVC1G07GW R111 R113 *39/J_4 3 1
CPU-989P-rPGA 0/J_4

Q13 *ME2N7002E

2
PM_DRAM_PWRGD_Q R108 *3K/F_4 MAINON# [5,34]

Processor pull-up(CPU) +1.05V_PCH


FDI Disable PEG x16 (UMA Non-stuff) DP & PEG Compensation
H_PROCHOT# R69 62/F_4
PEG_TXN[0..15] [15]
PEG_TXP[0..15] [15] +1.05V_PCH R570 24.9/F_4 PEG_COMP XDP_TDO R591 51/J_4
XDP_TMS R75 51/J_4
FDI_INT PEG_ICOMPI and RCOMPO signals should be routed within 500 XDP_TDI_R R85 51/J_4
PEG_TXP0_C C552 DIS@0.1U/10V_4 PEG_TXP0 PEG_TXN0_C C554 DIS@0.1U/10V_4 PEG_TXN0 XDP_PREQ# R79 *51/J_4
R103 *DIS@0/J_4 FDI_FSYNC0 PEG_TXP1_C C549 DIS@0.1U/10V_4 PEG_TXP1 PEG_TXN1_C C551 DIS@0.1U/10V_4 PEG_TXN1 mils typical impedance = 43 mohms PEG_ICOMPO signals should XDP_TCLK R63 51/J_4
R104 *DIS@0/J_4 FDI_FSYNC1 PEG_TXP2_C C546 DIS@0.1U/10V_4 PEG_TXP2 PEG_TXN2_C C548 DIS@0.1U/10V_4 PEG_TXN2 be routed within 500 mils XDP_TRST# R88 51/J_4
A R102 *DIS@0/J_4 FDI_LSYNC0 PEG_TXP3_C C545 DIS@0.1U/10V_4 PEG_TXP3 PEG_TXN3_C C543 DIS@0.1U/10V_4 PEG_TXN3 typical impedance = 14.5 mohms A
FDI_LSYNC1 PEG_TXP4_C C538 DIS@0.1U/10V_4 PEG_TXP4 PEG_TXN4_C C542 DIS@0.1U/10V_4 PEG_TXN4
PEG_TXP5_C C536 DIS@0.1U/10V_4 PEG_TXP5 PEG_TXN5_C C537 DIS@0.1U/10V_4 PEG_TXN5
FDI_FSYNC can gang PEG_TXP6_C C535 DIS@0.1U/10V_4 PEG_TXP6 PEG_TXN6_C C534 DIS@0.1U/10V_4 PEG_TXN6
R101 all these 4 PEG_TXP7_C C532 DIS@0.1U/10V_4 PEG_TXP7 PEG_TXN7_C C533 DIS@0.1U/10V_4 PEG_TXN7
R105 PEG_TXP8_C C529 DIS@0.1U/10V_4 PEG_TXP8 PEG_TXN8_C C530 DIS@0.1U/10V_4 PEG_TXN8 R557 10K_4 INT_eDP_HPD_Q
signals together +1.05V_PCH
*DIS@1K/F_4 *DIS@1K/F_4 PEG_TXP9_C C528 DIS@0.1U/10V_4 PEG_TXP9 PEG_TXN9_C C526 DIS@0.1U/10V_4 PEG_TXN9
and tie them with PEG_TXP10_C C524 DIS@0.1U/10V_4 PEG_TXP10 PEG_TXN10_C C525 DIS@0.1U/10V_4 PEG_TXN10 PROJECT KL5A
only one 1K PEG_TXP11_C C521 DIS@0.1U/10V_4 PEG_TXP11 PEG_TXN11_C C523 DIS@0.1U/10V_4 PEG_TXN11 R556 24.9/F_4 eDP_COMP
resistor to GND PEG_TXP12_C C520 DIS@0.1U/10V_4 PEG_TXP12 PEG_TXN12_C C519 DIS@0.1U/10V_4 PEG_TXN12
+1.05V_PCH
Quanta Computer Inc.
PEG_TXP13_C C516 DIS@0.1U/10V_4 PEG_TXP13 PEG_TXN13_C C518 DIS@0.1U/10V_4 PEG_TXN13 eDP_COMPIO and ICOMPO signals should be shorted near balls and
(DG V0.5 Ch2.2.9). PEG_TXP14_C C511 DIS@0.1U/10V_4 PEG_TXP14 PEG_TXN14_C C512 DIS@0.1U/10V_4 PEG_TXN14 Size Document Number Rev
PEG_TXP15_C C514 DIS@0.1U/10V_4 PEG_TXP15 PEG_TXN15_C C515 DIS@0.1U/10V_4 PEG_TXN15 routed with typical impedance <25 mohms Custom 1A
Sandy Bridge 1/4
Date: Friday, October 29, 2010 Sheet 3 of 45
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (DDR3) 04


U30C U30D

AB6 M_A_CLKP0 [14] [13] M_B_DQ[63:0] AE2 M_B_CLKP0 [13]


SA_CLK[0] SB_CLK[0]
[14] M_A_DQ[63:0] AA6 M_A_CLKN0 [14] AD2 M_B_CLKN0 [13]
D M_A_DQ0 SA_CLK#[0] M_B_DQ0 SB_CLK#[0] D
C5 V9 M_A_CKE0 [14] C9 R9 M_B_CKE0 [13]
M_A_DQ1 SA_DQ[0] SA_CKE[0] M_B_DQ1 SB_DQ[0] SB_CKE[0]
D5 A7
M_A_DQ2 SA_DQ[1] M_B_DQ2 SB_DQ[1]
D3 D10
M_A_DQ3 SA_DQ[2] M_B_DQ3 SB_DQ[2]
D2 C8
M_A_DQ4 SA_DQ[3] M_B_DQ4 SB_DQ[3]
D6 AA5 M_A_CLKP1 [14] A9 AE1 M_B_CLKP1 [13]
M_A_DQ5 SA_DQ[4] SA_CLK[1] M_B_DQ5 SB_DQ[4] SB_CLK[1]
C6 AB5 M_A_CLKN1 [14] A8 AD1 M_B_CLKN1 [13]
M_A_DQ6 SA_DQ[5] SA_CLK#[1] M_B_DQ6 SB_DQ[5] SB_CLK#[1]
C2 V10 M_A_CKE1 [14] D9 R10 M_B_CKE1 [13]
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
C3 D8
M_A_DQ8 SA_DQ[7] M_B_DQ8 SB_DQ[7]
F10 G4
M_A_DQ9 SA_DQ[8] M_B_DQ9 SB_DQ[8]
F8 F4
M_A_DQ10 SA_DQ[9] M_B_DQ10 SB_DQ[9]
G10 AB4 F1 AB2
M_A_DQ11 SA_DQ[10] RSVD_TP[1] M_B_DQ11 SB_DQ[10] RSVD_TP[11]
G9 SA_DQ[11] RSVD_TP[2] AA4 G1 SB_DQ[11] RSVD_TP[12] AA2
M_A_DQ12 F9 W9 M_B_DQ12 G5 T9
M_A_DQ13 SA_DQ[12] RSVD_TP[3] M_B_DQ13 SB_DQ[12] RSVD_TP[13]
F7 SA_DQ[13] F5 SB_DQ[13]
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ[14] M_B_DQ15 SB_DQ[14]
G7 SA_DQ[15] G2 SB_DQ[15]
M_A_DQ16 K4 AB3 M_B_DQ16 J7 AA1
M_A_DQ17 SA_DQ[16] RSVD_TP[4] M_B_DQ17 SB_DQ[16] RSVD_TP[14]
K5 SA_DQ[17] RSVD_TP[5] AA3 J8 SB_DQ[17] RSVD_TP[15] AB1
M_A_DQ18 K1 W10 M_B_DQ18 K10 T10
M_A_DQ19 SA_DQ[18] RSVD_TP[6] M_B_DQ19 SB_DQ[18] RSVD_TP[16]
J1 SA_DQ[19] K9 SB_DQ[19]
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ[20] M_B_DQ21 SB_DQ[20]
J4 SA_DQ[21] J10 SB_DQ[21]
M_A_DQ22 J2 AK3 M_B_DQ22 K8 AD3
SA_DQ[22] SA_CS#[0] M_A_CS#0 [14] SB_DQ[22] SB_CS#[0] M_B_CS#0 [13]
M_A_DQ23 K2 AL3 M_B_DQ23 K7 AE3
SA_DQ[23] SA_CS#[1] M_A_CS#1 [14] SB_DQ[23] SB_CS#[1] M_B_CS#1 [13]
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 SA_DQ[24] RSVD_TP[7] M_B_DQ25 SB_DQ[24] RSVD_TP[17]
N10 SA_DQ[25] RSVD_TP[8] AH1 N4 SB_DQ[25] RSVD_TP[18] AE6
M_A_DQ26 N8 M_B_DQ26 N2
M_A_DQ27 SA_DQ[26] M_B_DQ27 SB_DQ[26]
N7 SA_DQ[27] N1 SB_DQ[27]
M_A_DQ28 M10 M_B_DQ28 M4
M_A_DQ29 SA_DQ[28] M_B_DQ29 SB_DQ[28]
M9 SA_DQ[29] SA_ODT[0] AH3 M_A_ODT0 [14] N5 SB_DQ[29] SB_ODT[0] AE4 M_B_ODT0 [13]

DDR SYSTEM MEMORY B


M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A

SA_DQ[30] SA_ODT[1] M_A_ODT1 [14] SB_DQ[30] SB_ODT[1] M_B_ODT1 [13]


M_A_DQ31 M7 AG2 M_B_DQ31 M1 AD5
C M_A_DQ32 SA_DQ[31] RSVD_TP[9] M_B_DQ32 SB_DQ[31] RSVD_TP[19] C
AG6 SA_DQ[32] RSVD_TP[10] AH2 AM5 SB_DQ[32] RSVD_TP[20] AE5
M_A_DQ33 AG5 M_B_DQ33 AM6
M_A_DQ34 SA_DQ[33] M_B_DQ34 SB_DQ[33]
AK6 SA_DQ[34] AR3 SB_DQ[34]
M_A_DQ35 AK5 M_B_DQ35 AP3
M_A_DQ36 SA_DQ[35] M_B_DQ36 SB_DQ[35]
AH5 SA_DQ[36] M_A_DQSN[7:0] [14] AN3 SB_DQ[36] M_B_DQSN[7:0] [13]
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ37 AN2 D7 M_B_DQSN0
M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQSN1 M_B_DQ38 SB_DQ[37] SB_DQS#[0] M_B_DQSN1
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN1 SB_DQ[38] SB_DQS#[1] F3
M_A_DQ39 AJ6 J3 M_A_DQSN2 M_B_DQ39 AP2 K6 M_B_DQSN2
M_A_DQ40 SA_DQ[39] SA_DQS#[2] M_A_DQSN3 M_B_DQ40 SB_DQ[39] SB_DQS#[2] M_B_DQSN3
AJ8 M6 AP5 N3
M_A_DQ41 SA_DQ[40] SA_DQS#[3] M_A_DQSN4 M_B_DQ41 SB_DQ[40] SB_DQS#[3] M_B_DQSN4
AK8 AL6 AN9 AN5
M_A_DQ42 SA_DQ[41] SA_DQS#[4] M_A_DQSN5 M_B_DQ42 SB_DQ[41] SB_DQS#[4] M_B_DQSN5
AJ9 AM8 AT5 AP9
M_A_DQ43 SA_DQ[42] SA_DQS#[5] M_A_DQSN6 M_B_DQ43 SB_DQ[42] SB_DQS#[5] M_B_DQSN6
AK9 AR12 AT6 AK12
M_A_DQ44 SA_DQ[43] SA_DQS#[6] M_A_DQSN7 M_B_DQ44 SB_DQ[43] SB_DQS#[6] M_B_DQSN7
AH8 AM15 AP6 AP15
M_A_DQ45 SA_DQ[44] SA_DQS#[7] M_B_DQ45 SB_DQ[44] SB_DQS#[7]
AH9 AN8
M_A_DQ46 SA_DQ[45] M_B_DQ46 SB_DQ[45]
AL9 AR6
M_A_DQ47 SA_DQ[46] M_B_DQ47 SB_DQ[46]
AL8 AR5
M_A_DQ48 SA_DQ[47] M_B_DQ48 SB_DQ[47]
AP11 M_A_DQSP[7:0] [14] AR9 M_B_DQSP[7:0] [13]
M_A_DQ49 SA_DQ[48] M_A_DQSP0 M_B_DQ49 SB_DQ[48] M_B_DQSP0
AN11 D4 AJ11 C7
M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQSP1 M_B_DQ50 SB_DQ[49] SB_DQS[0] M_B_DQSP1
AL12 F6 AT8 G3
M_A_DQ51 SA_DQ[50] SA_DQS[1] M_A_DQSP2 M_B_DQ51 SB_DQ[50] SB_DQS[1] M_B_DQSP2
AM12 K3 AT9 J6
M_A_DQ52 SA_DQ[51] SA_DQS[2] M_A_DQSP3 M_B_DQ52 SB_DQ[51] SB_DQS[2] M_B_DQSP3
AM11 N6 AH11 M3
M_A_DQ53 SA_DQ[52] SA_DQS[3] M_A_DQSP4 M_B_DQ53 SB_DQ[52] SB_DQS[3] M_B_DQSP4
AL11 AL5 AR8 AN6
M_A_DQ54 SA_DQ[53] SA_DQS[4] M_A_DQSP5 M_B_DQ54 SB_DQ[53] SB_DQS[4] M_B_DQSP5
AP12 AM9 AJ12 AP8
M_A_DQ55 SA_DQ[54] SA_DQS[5] M_A_DQSP6 M_B_DQ55 SB_DQ[54] SB_DQS[5] M_B_DQSP6
AN12 AR11 AH12 AK11
M_A_DQ56 SA_DQ[55] SA_DQS[6] M_A_DQSP7 M_B_DQ56 SB_DQ[55] SB_DQS[6] M_B_DQSP7
AJ14 AM14 AT11 AP14
M_A_DQ57 SA_DQ[56] SA_DQS[7] M_B_DQ57 SB_DQ[56] SB_DQS[7]
AH14 AN14
M_A_DQ58 SA_DQ[57] M_B_DQ58 SB_DQ[57]
AL15 AR14
M_A_DQ59 SA_DQ[58] M_B_DQ59 SB_DQ[58]
AK15 AT14
M_A_DQ60 SA_DQ[59] M_B_DQ60 SB_DQ[59]
AL14 M_A_A[15:0] [14] AT12 M_B_A[15:0] [13]
M_A_DQ61 SA_DQ[60] M_A_A0 M_B_DQ61 SB_DQ[60] M_B_A0
AK14 AD10 AN15 AA8
M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ62 SB_DQ[61] SB_MA[0] M_B_A1
AJ15 W1 AR15 T7
M_A_DQ63 SA_DQ[62] SA_MA[1] M_A_A2 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
AH15 W2 AT15 R7
B SA_DQ[63] SA_MA[2] M_A_A3 SB_DQ[63] SB_MA[2] M_B_A3 B
W7 T6
SA_MA[3] M_A_A4 SB_MA[3] M_B_A4
V3 T2
SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
V2 T4
SA_MA[5] M_A_A6 SB_MA[5] M_B_A6
W3 T3
SA_MA[6] M_A_A7 SB_MA[6] M_B_A7
[14] M_A_BS#0 AE10 W6 [13] M_B_BS#0 AA9 R2
SA_BS[0] SA_MA[7] M_A_A8 SB_BS[0] SB_MA[7] M_B_A8
[14] M_A_BS#1 AF10 V1 [13] M_B_BS#1 AA7 T5
SA_BS[1] SA_MA[8] M_A_A9 SB_BS[1] SB_MA[8] M_B_A9
[14] M_A_BS#2 V6 W5 [13] M_B_BS#2 R6 R3
SA_BS[2] SA_MA[9] M_A_A10 SB_BS[2] SB_MA[9] M_B_A10
AD8 AB7
SA_MA[10] M_A_A11 SB_MA[10] M_B_A11
V4 R1
SA_MA[11] M_A_A12 SB_MA[11] M_B_A12
W4 T1
SA_MA[12] M_A_A13 SB_MA[12] M_B_A13
[14] M_A_CAS# AE8 AF8 [13] M_B_CAS# AA10 AB10
SA_CAS# SA_MA[13] M_A_A14 SB_CAS# SB_MA[13] M_B_A14
[14] M_A_RAS# AD9 V5 [13] M_B_RAS# AB8 R5
SA_RAS# SA_MA[14] M_A_A15 SB_RAS# SB_MA[14] M_B_A15
[14] M_A_WE# AF9 V7 [13] M_B_WE# AB9 R4
SA_WE# SA_MA[15] SB_WE# SB_MA[15]

CPU-989P-rPGA CPU-989P-rPGA

+1.5V_SUS

R123 R121 *0/J_4


1K/F_4
A A

R117 1K/F_4 CPU_DRAMRST#_R 3 1


[13,14] DDR3_DRAMRST# CPU_DRAMRST# [3]
Q15
ME2N7002E
2

[9] DRAMRST_CNTRL_PCH R138 *Short_4_NC

R122 PROJECT KL5A


C225 4.99K/F_4
0.047U/10V_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Sandy Bridge 2/4
Date: Friday, October 29, 2010 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (POWER)


CPU VGT
Sandy Bridge Processor (GRAPHIC POWER) 05
SNB 45W:24A
CPU Core Power
SNB 45W:55A,36A(TDP) U30F POWER 22uF x 12 U30G
POWER
TP82
A03 CPU VTT 22uF x 4 (Reserved)
22uF x 32 R583 100/J_4 +VCC_GFX

SENSE
LINES
SNB 45W:8.5A +VCC_GFX AT24
VAXG1 VAXG_SENSE
AK35 VCC_AXG_SENSE [42]
22uF x 3 (Non-stuff) +VCC_CORE
AT23
VAXG2 VSSAXG_SENSE
AK34
R582 100/J_4
VSS_AXG_SENSE [42]
D
+1.05V_PCH 22uF x 10 C570 C571 C572 C569
AT21
VAXG3
D
AT20
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VAXG4
22uF x 6 (Non-stuff) AT18
VAXG5 TP83
AG35 AT17
VCC1 VAXG6
AG34 AH13 AR24
VCC2 VCCIO1 VAXG7
AG33 AH10 AR23
C564 C559 C555 C175 VCC3 VCCIO2 VAXG8
AG32 AG10 AR21
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC4 VCCIO3 C169 C103 C178 C164 C144 C137 VAXG9
AG31 AC10 AR20

VREF
VCC5 VCCIO4 22U/6.3V_8 10U/6.3V_6 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VAXG10
AG30 Y10 AR18
VCC6 VCCIO5 VAXG11
AG29 U10 AR17
VCC7 VCCIO6 VAXG12 +VDDR_REF_CPU
AG28 P10 AP24 AL1 +VDDR_REF_CPU
VCC8 VCCIO7 C109 C110 C111 C112 VAXG13 SM_VREF
AG27 L10 AP23
VCC9 VCCIO8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VAXG14
AG26
VCC10 VCCIO9
J14 AP21
VAXG15
CAD Note: +VDDR_REF_CPU should
AF35 J13 AP20 have 10 mil trace width
VCC11 VCCIO10 VAXG16
AF34 J12 AP18
VCC12 VCCIO11 VAXG17
C550 C167 C556 C101
AF33
AF32
VCC13 VCCIO12
J11
H14
AP17
AN24
VAXG18 CPU MCH
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC14 VCCIO13 VAXG19
AF31
VCC15 VCCIO14
H12
C562 C567 C573 C114 C189 C184
AN23
VAXG20 SNB 45W: 10A
AF30 H11 AN21
VCC16 VCCIO15 *22U/6.3V_8 *22U/6.3V_8 22U/6.3V_8 10U/6.3V_6 10U/6.3V_6 22U/6.3V_8 VAXG21
AF29
VCC17 VCCIO16
G14 AN20
VAXG22 330uF/6mohm x 1

DDR3 -1.5V RAILS


AF28 G13 AN18
VCC18 VCCIO17 VAXG23

PEG AND DDR


AF27 G12 C120 C579 C166 C143 AN17 10uF x 6
VCC19 VCCIO18 VAXG24

GRAPHICS
AF26 F14 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 AM24 AF7 +1.5V_CPU
VCC20 VCCIO19 VAXG25 VDDQ1
AD35 F13 AM23 AF4
VCC21 VCCIO20 VAXG26 VDDQ2
AD34 F12 AM21 AF1
VCC22 VCCIO21 VAXG27 VDDQ3 C124 C172 C115 C140
C163 C142 C118 C566
AD33
VCC23 VCCIO22
F11 22uF (Reserved) AM20
VAXG28 VDDQ4
AC7
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
AD32 E14 AM18 AC4
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC24 VCCIO23 VAXG29 VDDQ5
AD31 E12 AM17 AC1
VCC25 VCCIO24 VAXG30 VDDQ6
AD30 AL24 Y7
VCC26 C541 C547 C553 C558 VAXG31 VDDQ7
AD29 E11 AL23 Y4
VCC27 VCCIO25 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 VAXG32 VDDQ8
AD28 D14 AL21 Y1
VCC28 VCCIO26 VAXG33 VDDQ9
AD27 D13 AL20 U7
VCC29 VCCIO27 VAXG34 VDDQ10 + C78
AD26 D12 AL18 U4
VCC30 VCCIO28 VAXG35 VDDQ11 C170 C171 *330U/2V_7343 C173 C81
AC35 D11 AL17 U1
VCC31 VCCIO29 C581 C578 C68 C63 VAXG36 VDDQ12 10U/6.3V_6 10U/6.3V_6 22U/6.3V_8 22U/6.3V_8
AC34 C14 AK24 P7
C VCC32 VCCIO30 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 VAXG37 VDDQ13 C
AC33 C13 AK23 P4
C560 C565 C561 C69 VCC33 VCCIO31 VAXG38 VDDQ14
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8
AC32
VCC34 VCCIO32
C12 AK21
VAXG39 VDDQ15
P1 22uF (Reserved)
AC31 C11 AK20
VCC35 VCCIO33 VAXG40
AC30 B14 AK18
VCC36 VCCIO34 VAXG41
AC29 B12 AK17
VCC37 VCCIO35 VAXG42
AC28
AC27
VCC38 VCCIO36
A14
A13
AJ24
AJ23
VAXG43 CPU SA
VCC39 VCCIO37 VAXG44
AC26
VCC40 VCCIO38
A12 AJ21
VAXG45 SNB 45W: 6A
AA35 A11 AJ20
VCC41 VCCIO39 VAXG46
AA34
VCC42 +1.05V_VTT_40 R569 *0/short_4
AJ18
VAXG47 330uF/7mohm x 1
AA33 J23 +1.05V_PCH AJ17
VCC43 VCCIO40 VAXG48
AA32 AH24 10uF x 3

SA RAIL
C119 C557 C563 C60 VCC44 VAXG49
AA31 AH23
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC45 VAXG50
AA30 AH21 M27 +0.85V
VCC46 VAXG51 VCCSA1
AA29 AH20 M26
VCC47 VAXG52 VCCSA2
AA28 AH18 L26
AA27
VCC48 R590 Ra *DIS@0/J_4 AH17
VAXG53 VCCSA3
J26 C191 C193 C540 C544
VCC49 VAXG54 VCCSA4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *10U/6.3V_6
AA26 J25
VCC50 VCCSA5
CORE SUPPLY

Y35 J24
Y34
VCC51 DIS SW VCCSA6
H26
VCC52 VCCSA7
Y33 H25
Y32
VCC53 Ra 0 ohm NA VCCSA8
VCC54

1.8V RAIL
Y31
VCC55
Y30
VCC56
Y29
C182 C574 C187 C108 VCC57
Y28
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC58
Y27 +1.8V B6 H23 VCCUSA_SENSE [40]

MISC
VCC59 VCCPLL1 VCCSA_SENSE
Y26 A6
V35
VCC60 CPU VCCPL A2
VCCPLL2
VCC61
SVID

H_CPU_SVIDALRT# + C509 VCCPLL3


V34
VCC62 VIDALERT#
AJ29
H_CPU_SVIDCLK
SNB 45W:1.2A C502 C504 C503 *330U/2V_7343 H_FC_C22 R132 10K/J_4
V33 AJ30 C22
VCC63 VIDSCLK H_CPU_SVIDDAT 10U/6.3V_6 1U/6.3V_4 1U/6.3V_4 FC_C22
V32
VCC64 VIDSOUT
AJ28 330uF/7mohm x 1 VCCSA_VID1
C24 VCCSA_SEL [40]
V31
VCC65

R133
V30
VCC66 10uF x 1
B V29 B
VCC67 CPU-989P-rPGA
V28
VCC68 1uF x 2
C575 C576 C577 C568 V27
VCC69

10K/J_4
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 V26
VCC70
U35
VCC71
U34
VCC72 Layout note: need routing 4.5A
U33
VCC73 SVID CLK
U32
U31
VCC74 together and ALERT need +1.5V_SUS +1.5V_CPU +1.5V_SUS
VCC75 +1.05V_PCH
U30
U29
VCC76 between CLK and DATA C147 0.1U/10V_4
VCC77
U28
U27
VCC78 Close to VR C162 0.1U/10V_4
VCC79
U26
C117 C83 C82 C107 VCC80 R74 C92 0.1U/10V_4
R35 8 1
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VCC81 54.9/F_4
R34 7 2
VCC82 C96 0.1U/10V_4
R33 6 3
VCC83 H_CPU_SVIDCLK R83 *Short_4_NC
R32 VR_SVID_CLK [42] 5
VCC84
R31
VCC85 3/26 DB add for Intel.
R30 Q12 Placement close to CPU.

4
VCC86 AO4496
R29 [34] MAINON_15V
VCC87
SENSE LINES

R581 100/J_4 +VCC_CORE


R28
R27
VCC88
AJ35
SVID DATA
R26
VCC89 VCC_SENSE
AJ34
VCC_SENSE [42] Place PU resistor close to CPU C104 R106
Reserved P35
VCC90
VCC91
VSS_SENSE R580 100/J_4
VSS_SENSE [42] +1.05V_PCH +1.05V_PCH *470P/50V_4 220/J_8
P34
VCC92
P33
VCC93

3
P32 B10
C93 C84 C64 P31
VCC94 VCCIO_SENSE
A10
VTT_SENSE [41] Close to VR
VCC95 VSSIO_SENSE TP78
*22U/6.3V_8 *22U/6.3V_8 *22U/6.3V_8 P30 R82 R72
VCC96 130/F_4 130/F_4
P29 [3,34] MAINON# 2
VCC97
P28
VCC98 H_CPU_SVIDDAT R73 *Short_4_NC Q14
P27 VR_SVID_DATA [42]
VCC99 2N7002K
P26
VCC100 +VDDR_REF_CPU

1
A A
R592 *0/J_8
[13,14,36] SMDDR_VREF Place PU resistor close to CPU SVID ALERT
+1.05V_PCH
3 1

CPU-989P-rPGA Q50
ME2N7002E
PROJECT KL5A
2

MAINON_15V R586 R81


100K/J_4 75/J_4
Quanta Computer Inc.
H_CPU_SVIDALRT# R80 43/J_4 VR_SVID_ALERT_L# R71 *Short_4_NC VR_SVID_ALERT# [42]
Size Document Number Rev
Custom 1A
Sandy Bridge 3/4
Date: Friday, October 29, 2010 Sheet 5 of 45
5 4 3 2 1
5 4 3 2 1

Sandy Bridge Processor (GND)


AT35
AT32
AT29
U30H

VSS1
VSS2
VSS3
VSS81
VSS82
VSS83
AJ22
AJ19
AJ16 T35
U30I

VSS161 VSS234 F22


Sandy Bridge Processor (RESERVED, CFG)
U30E 06
AT27 VSS4 VSS84 AJ13 T34 VSS162 VSS235 F19 RSVD28 L7
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 RSVD29 AG7
AT22 AJ7 T32 E27 CFG0 AK28 AE7
VSS6 VSS86 VSS164 VSS237 TP9 CFG[0] RSVD30
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24 TP7 AK29 CFG[1] RSVD31 AK2
AT16 AJ3 T30 E21 CFG2 AL26 W8
VSS8 VSS88 VSS166 VSS239 CFG[2] RSVD32
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 TP6 AL27 CFG[3]
D AT10 AJ1 T28 E15 CFG4 AK26 D
VSS10 VSS90 VSS168 VSS241 CFG5 CFG[4]
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13 AL29 CFG[5] RSVD33 AT26
AT4 AH34 T26 E10 CFG6 AL30 AM33
VSS12 VSS92 VSS170 VSS243 CFG7 CFG[6] RSVD34
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9 AM31 CFG[7] RSVD35 AJ27
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM32 CFG[8]
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM30 CFG[9]
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AM28 CFG[10]
AR16 VSS17 VSS97 AH26 P3 VSS175 VSS248 E5 AM26 CFG[11]
AR13 VSS18 VSS98 AH25 P2 VSS176 VSS249 E4 AN28 CFG[12]
AR10 VSS19 VSS99 AH22 N35 VSS177 VSS250 E3 AN31 CFG[13] RSVD37 T8
AR7 VSS20 VSS100 AH19 N34 VSS178 VSS251 E2 AN26 CFG[14] RSVD38 J16
AR4 VSS21 VSS101 AH16 N33 VSS179 VSS252 E1 AM27 CFG[15] RSVD39 H16
AR2 VSS22 VSS102 AH7 N32 VSS180 VSS253 D35 AK31 CFG[16] RSVD40 G16
AP34 VSS23 VSS103 AH4 N31 VSS181 VSS254 D32 AN29 CFG[17]
AP31 VSS24 VSS104 AG9 N30 VSS182 VSS255 D29
AP28 VSS25 VSS105 AG8 N29 VSS183 VSS256 D26
AP25 VSS26 VSS106 AG4 N28 VSS184 VSS257 D20
AP22 VSS27 VSS107 AF6 N27 VSS185 VSS258 D17 RSVD41 AR35
AP19 VSS28 VSS108 AF5 N26 VSS186 VSS259 C34 AJ31 VAXG_VAL_SENSE RSVD42 AT34
AP16 VSS29 VSS109 AF3 M34 VSS187 VSS260 C31 AH31 VSSAXG_VAL_SENSE RSVD43 AT33
AP13 VSS30 VSS110 AF2 L33 VSS188 VSS261 C28 AJ33 VCC_VAL_SENSE RSVD44 AP35
AP10 VSS31 VSS111 AE35 L30 VSS189 VSS262 C27 AH33 VSS_VAL_SENSE RSVD45 AR34
AP7 VSS32 VSS112 AE34 L27 VSS190 VSS263 C25
AP4 VSS33 VSS113 AE33 L9 VSS191 VSS264 C23
AP1 VSS34 VSS114 AE32 L8 VSS192 VSS265 C10 AJ26 RSVD5

RESERVED
AN30 VSS35 VSS115 AE31 L6 VSS193 VSS266 C1
AN27 VSS36 VSS116 AE30 L5 VSS194 VSS267 B22
AN25 AE29 L4 B19 B34
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
AE28
AE27
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
[14] SMDDR_VREF_DQ0_M3
[13] SMDDR_VREF_DQ1_M3
SMDDR_VREF_DQ0_M3
SMDDR_VREF_DQ1_M3
B4
D1
RSVD6
RSVD7
RSVD46
RSVD47
RSVD48
A33
A34
C

AN16 VSS40 VSS120 AE26 L1 VSS198 VSS271 B13 RSVD49 B35


AN13 VSS41 VSS121 AE9 K35 VSS199 VSS272 B11 RSVD50 C35
AN10 VSS42 VSS122 AD7 K32 VSS200 VSS273 B9
AN7 AC9 K29 B8 R136 R131 F25
VSS43 VSS123 VSS201 VSS274 *1K/J_4 *1K/J_4 RSVD8
AN4 VSS44 VSS124 AC8 K26 VSS202 VSS275 B7 F24 RSVD9
AM29 VSS45 VSS125 AC6 J34 VSS203 VSS276 B5 F23 RSVD10
AM25 VSS46 VSS126 AC5 J31 VSS204 VSS277 B3 D24 RSVD11 RSVD51 AJ32
AM22 VSS47 VSS127 AC3 H33 VSS205 VSS278 B2 G25 RSVD12 RSVD52 AK32
AM19 VSS48 VSS128 AC2 H30 VSS206 VSS279 A35 G24 RSVD13
AM16 VSS49 VSS129 AB35 H27 VSS207 VSS280 A32 E23 RSVD14
AM13 VSS50 VSS130 AB34 H24 VSS208 VSS281 A29 D23 RSVD15
AM10 VSS51 VSS131 AB33 H21 VSS209 VSS282 A26 C30 RSVD16 VCC_DIE_SENSE AH27
AM7 VSS52 VSS132 AB32 H18 VSS210 VSS283 A23 A31 RSVD17
AM4 VSS53 VSS133 AB31 H15 VSS211 VSS284 A20 Add for Pre-ES1 B30 RSVD18
AM3 VSS54 VSS134 AB30 H13 VSS212 VSS285 A3 B29 RSVD19
AM2 VSS55 VSS135 AB29 H10 VSS213 D30 RSVD20 RSVD54 AN35 TP85
AM1 VSS56 VSS136 AB28 H9 VSS214 B31 RSVD21 RSVD55 AM35 TP84
AL34 VSS57 VSS137 AB27 H8 VSS215 A30 RSVD22
AL31 VSS58 VSS138 AB26 H7 VSS216 C29 RSVD23 Reserved for Intel Debug
AL28 VSS59 VSS139 Y9 H6 VSS217
AL25 VSS60 VSS140 Y8 H5 VSS218
AL22 VSS61 VSS141 Y6 H4 VSS219 J20 RSVD24
AL19 VSS62 VSS142 Y5 H3 VSS220 B18 RSVD25 RSVD56 AT2
AL16 VSS63 VSS143 Y3 H2 VSS221 TP77 A19 VCCIO_SEL RSVD57 AT1
AL13 VSS64 VSS144 Y2 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS145 W 35 G35 VSS223
B AL7 VSS66 VSS146 W 34 G32 VSS224 J15 RSVD27 B
AL4 VSS67 VSS147 W 33 G29 VSS225
AL2 VSS68 VSS148 W 32 G26 VSS226
AK33 VSS69 VSS149 W 31 G23 VSS227 KEY B1 For rPGA socket, RSVD59 pin should be left NC
AK30 VSS70 VSS150 W 30 G20 VSS228
AK27 VSS71 VSS151 W 29 G17 VSS229
AK25 VSS72 VSS152 W 28 G11 VSS230
AK22 VSS73 VSS153 W 27 F34 VSS231
AK19 VSS74 VSS154 W 26 F31 VSS232
AK16 VSS75 VSS155 U9 F29 VSS233
AK13 U8 CPU-989P-rPGA
VSS76 VSS156
AK10 VSS77 VSS157 U6
AK7 VSS78 VSS158 U5
AK4 VSS79 VSS159 U3
AJ25 VSS80 VSS160 U2

CPU-989P-rPGA CPU-989P-rPGA

The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping CFG[6:5] (PCIE Port Bifurcation Straps)
CFG2 R91 1K/F_4
1 0 CFG5 R70 *1K/F_4 11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG4 R92 *1K/F_4 CFG6 R77 *1K/F_4 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
CFG2 CFG7 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
Normal Operation Lane Reversed R68 *1K/F_4
A (PEG Static Lane Reversal) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled A

CFG4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP
PROJECT KL5A
CFG7 PEG train immediately following PEG wait for BIOS training Quanta Computer Inc.
(PEG Defer Training) xxRESETB de assertion
Size Document Number Rev
Custom 1A
Sandy Bridge 4/4
Date: Friday, October 29, 2010 Sheet 6 of 45
5 4 3 2 1
5 4 3 2 1

Cougar Point (LVDS,DDI)


U17D
07
Cougar Point (DMI,FDI,PM) [22] INT_LVDS_BLON J47
M45
L_BKLTEN SDVO_TVCLKINN AP43
AP45
[22] INT_LVDS_VDDEN L_VDD_EN SDVO_TVCLKINP
U17C
[22] LVDS_BRIGHT_PWM P45 L_BKLTCTL SDVO_STALLN AM42
D SDVO_STALLP AM40 D
[3] DMI_RXN0 BC24 BJ14 [22] INT_EDIDCLK INT_EDIDCLK T40
DMI0RXN FDI_RXN0 FDI_TXN0 [3] L_DDC_CLK
[3] DMI_RXN1 BE20 AY14 [22] INT_EDIDDAT INT_EDIDDAT K47 AP39
DMI1RXN FDI_RXN1 FDI_TXN1 [3] L_DDC_DATA SDVO_INTN
[3] DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 [3] SDVO_INTP AP40
[3] DMI_RXN3 BG20 BH13 +3V R460 2.2K/J_4 T45
DMI3RXN FDI_RXN3 FDI_TXN3 [3] L_CTRL_CLK
BC12 R453 2.2K/J_4 P39
FDI_RXN4 FDI_TXN4 [3] L_CTRL_DATA
[3] DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 [3]
[3] DMI_RXP1 BC20 BG10 R469 2.37K/F_4 LVD_IBG AF37 P38 INT_HDMI_SCL [20]
DMI1RXP FDI_RXN6 FDI_TXN6 [3] LVD_IBG SDVO_CTRLCLK
[3] DMI_RXP2 BJ18 DMI2RXP FDI_RXN7 BG9 FDI_TXN7 [3] TP54 AF36 LVD_VBG SDVO_CTRLDATA M39 INT_HDMI_SDA [20]
[3] DMI_RXP3 BJ20 DMI3RXP
FDI_RXP0 BG14 FDI_TXP0 [3] AE48 LVD_VREFH

INT. HDMI
[3] DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 [3] AE47 LVD_VREFL DDPB_AUXN AT49
[3] DMI_TXN1 AW20 DMI1TXN FDI_RXP2 BF14 FDI_TXP2 [3] DDPB_AUXP AT47
[3] DMI_TXN2 BB18 BG13 AT40 INT_HDMI_HPD_Q
DMI2TXN FDI_RXP3 FDI_TXP3 [3] DDPB_HPD
[3] DMI_TXN3 AV18 BE12 [22] INT_TXLCLKOUTN INT_TXLCLKOUTN AK39

DMI
FDI

LVDS
DMI3TXN FDI_RXP4 FDI_TXP4 [3] LVDSA_CLK#
BG12 [22] INT_TXLCLKOUTP INT_TXLCLKOUTP AK40 AV42
FDI_RXP5 FDI_TXP5 [3] LVDSA_CLK DDPB_0N INT_HDMI_TXDN2 [20]
[3] DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 [3] DDPB_0P AV40 INT_HDMI_TXDP2 [20]
[3] DMI_TXP1 AY20 BH9 [22] INT_TXLOUTN0 INT_TXLOUTN0 AN48 AV45
DMI1TXP FDI_RXP7 FDI_TXP7 [3] LVDSA_DATA#0 DDPB_1N INT_HDMI_TXDN1 [20]
[3] DMI_TXP2 AY18 [22] INT_TXLOUTN1 INT_TXLOUTN1 AM47 AV46 INT_HDMI_TXDP1 [20]

Digital Display Interface


DMI2TXP INT_TXLOUTN2 LVDSA_DATA#1 DDPB_1P
[3] DMI_TXP3 AU18 [22] INT_TXLOUTN2 AK47 AU48 INT_HDMI_TXDN0 [20]
DMI3TXP LVDSA_DATA#2 DDPB_2N
AW16 FDI_INT [3] AJ48 AU47 INT_HDMI_TXDP0 [20]
FDI_INT LVDSA_DATA#3 DDPB_2P
AV47 INT_HDMI_TXCN [20]
INT_TXLOUTP0 DDPB_3N
BJ24 AV12 FDI_FSYNC0 [3] [22] INT_TXLOUTP0 AN47 AV49 INT_HDMI_TXCP [20]
DMI_ZCOMP FDI_FSYNC0 INT_TXLOUTP1 LVDSA_DATA0 DDPB_3P
[22] INT_TXLOUTP1 AM49
R280 49.9/F_4 DMI_COMP INT_TXLOUTP2 LVDSA_DATA1
+1.05V_PCH BG25 BC10 FDI_FSYNC1 [3] [22] INT_TXLOUTP2 AK49
DMI_IRCOMP FDI_FSYNC1 LVDSA_DATA2
AJ47 P46
R268 750/F_4 DMI_RBIAS LVDSA_DATA3 DDPC_CTRLCLK
BH21 AV14 FDI_LSYNC0 [3] P42
DMI2RBIAS FDI_LSYNC0 DDPC_CTRLDATA
BB10 FDI_LSYNC1 [3] AF40
FDI_LSYNC1 LVDSB_CLK#
AF39 AP47
LVDSB_CLK DDPC_AUXN

INT. DP
C AP49 C
DDPC_AUXP DDPC_HPD_PU
AH45 AT38
DSWVREN LVDSB_DATA#0 DDPC_HPD
A18 AH47
DSWVRMEN R275 *Short_4_NC RSMRST# LVDSB_DATA#1
AF49 AY47
LVDSB_DATA#2 DDPC_0N

System Power Management


AF45 AY49
SUS_PWR_ACK_R R505 *0/J_4 DPWROK LVDSB_DATA#3 DDPC_0P
C12 E22 R483 *Short_4_NC AY43
SUSACK# DPWROK DDPC_1N
AH43 AY45
LVDSB_DATA0 DDPC_1P

RV11
AH49 BA47
XDP_DBRST# PCIE_WAKE# LVDSB_DATA1 DDPC_2N
[3] XDP_DBRST# K3 B9 PCIE_WAKE# [23,27,28] AF47 BA48
C696 *1U/10V_4 SYS_RESET# WAKE# LVDSB_DATA2 DDPC_2P
AF43 BB47
LVDSB_DATA3 DDPC_3N
BB49
DDPC_3P

*EGA-0402
SYS_PWROK R514 *Short_4_NC SYS_PWROK_R P12 +3V N3 CLKRUN# CLKRUN# [32]
R516 *0/J_4 SYS_PWROK CLKRUN# / GPIO32
INT_CRT_BLU N48 M43
[21] INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
[32] EC_PWROK R486 *Short_4_NC EC_PWROK_R L22 +3V_S5 G8 LPC_PD# TP71 INT_CRT_GRE P49 M36
PWROK SUS_STAT# / GPIO61 [21] INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED T49
[21] INT_CRT_RED CRT_RED
EC_PWROK_R R504 *Short_4_NC APWROK_R L10 +3V_S5 N14 PCH_SUSCLK TP58 AT45

CRT
APWROK SUSCLK / GPIO62 DDPD_AUXN
[21] INT_DDCCLK T39 AT43
CRT_DDC_CLK DDPD_AUXP DDPD_HPD_PU
[21] INT_DDCDAT M40 CRT_DDC_DATA DDPD_HPD BH41
[3] PM_DRAM_PWRGD PM_DRAM_PWRGD B13 +3V_S5 D10 SLP_S5# TP70
DRAMPWROK SLP_S5# / GPIO63
DDPD_0N BB43
R305 33/J_4 INT_CRT_HSYNC_R M47 BB45
[21] INT_CRT_HSYNC CRT_HSYNC DDPD_0P
[32] RSMRST# RSMRST# C21 H4 PM_SLP_S4# [32] R306 33/J_4 INT_CRT_VSYNC_R M49 BF44
RSMRST# SLP_S4# [21] INT_CRT_VSYNC CRT_VSYNC DDPD_1N
DDPD_1P BE44
DDPD_2N BF42
[32] SUS_PWR_ACK R518 *Short_4_NC SUS_PWR_ACK_R K16 +3V_S5 F4 SIO_SLP_S3# [32] 20ohm for SW; DAC_IREF T43 BE42
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# DAC_IREF DDPD_2P +5V
33ohm for UMA T42 CRT_IRTN DDPD_3N BJ42
DDPD_3P BG42
[32] SIO_PWRBTN# E20 G10 SLP_A# TP66 R463
PWRBTN# SLP_A#

2
B B
1K/F_4 CougarPoint_R1P0

[32] AC_PRESENT R489 *Short_4_NC AC_PRESENT_R H20 DSW G16 TP56 INT_HDMI_HPD_Q 1 3
ACPRESENT / GPIO31 SLP_SUS# INT_HDMI_HPD [20]
R place close to PCH Q31
PM_BATLOW# ME2N7002E
E10 BATLOW# / GPIO72 +3V_S5 PMSYNCH AP14 PM_SYNC [3]
R307 150/F_4 INT_CRT_BLU R299 R301
*100K/J_4 100K/J_4
PM_RI# A10 +3V_S5 K14 SLP_LAN# TP72 R308 150/F_4 INT_CRT_GRE
RI# SLP_LAN# / GPIO29
R309 150/F_4 INT_CRT_RED
CougarPoint_R1P0

PCH Pull-high/low(CLG) System PWR_OK(CLG)


+3V_S5 +3V_RTC
DPWROK FOR DSW +3V
+3V +3V_S5 +3VPCU
+3VPCU
DDPC_HPD_PU R445 10K/J_4
CLKRUN# R246 8.2K/J_4 PM_RI# R239 10K/J_4 R269
C288 330K/J_4 DDPD_HPD_PU R288 10K/J_4
XDP_DBRST# R206 10K/J_4 PM_BATLOW# R509 8.2K/J_4 *0.1U/10V_4 +3V_DSW R265 R266
*10K_4 *10K_4 Follow PDG eDP disable guide
R209 *1K/J_4 PCIE_WAKE# R240 10K/J_4 DSWVREN D15
5

U15 +3V_S5 DPWROK


RSMRST# R276 10K/J_4 SLP_LAN# R502 *10K/J_4 2 IMVP_PWRGD [42]

3
A
[3,36] SYS_PWROK SYS_PWROK 4 R267 *RB500V-40 A

3
SYS_PWROK R515 100K/J_4 SUS_PWR_ACK R517 10K/J_4 1 EC_PWROK *330K/J_4 C301
D14 *0.1U/10V_4
AC_PRESENT R488 10K/J_4 TC7SH08FU(F) +3VPCU 2 2 add cap to
3

R261 *RB500V-40
timing tune
100K/J_4 Q27 Q28
PROJECT KL5A

1
*PDTC144EU *2N7002

1
PM_DRAM_PWRGD R493 *200/F_4 On Die DSW VR Enable
Quanta Computer Inc.
High = Enable (Default)
3/16 Change topology; 200ohm PU to +3V_S5 Size Document Number Rev
Low = Disable Custom 1A
Cougar Point 1/6
Date: Friday, October 29, 2010 Sheet 7 of 45
5 4 3 2 1
5 4 3 2 1

PCH2(CLG)
RTC Circuitry(RTC)

+3V_DSW
20mils
R107 *0/J_6
+3V_RTC
C300 18P/50V_4
Cougar Point (HDA,JTAG,SATA) 08
D9

2
1
R99 0/J_6 +3V_RTC_2
+3VPCU U17A +3V
R485 20K/J_4 RTC_RST#
+3V_RTC_1 Y3 R273

1
J2 32.768KHZ 10M/J_4 RTC_X1 A20 C38 LPC_LAD0 [27,32] IRQ_SERIRQ R510 8.2K/J_4
BAT54C C478 RTCX1 FWH0 / LAD0 ODD_PRSNT# R548 *10K/J_4
20MIL A38

LPC
LPC_LAD1 [27,32]

3
4
1U/6.3V_4 C298 18P/50V_4 RTC_X2 FWH1 / LAD1 LCD_BK_OFF# R467 10K_4
C20 B37 LPC_LAD2 [27,32]
*SHORT_ PAD1 RTCX2 FWH2 / LAD2 SATA_ACT# R205 10K_4
30mils C37 LPC_LAD3 [27,32]

2
RTC_RST# FWH3 / LAD3
D20
RTCRST# INTEL_BT_OFF# R285 10K/J_4
D36 LPC_LFRAME# [27,32]
R97 SRTC_RST# FWH4 / LFRAME#
G22
D
SRTC_RST# SRTCRST# D
1K/J_4 R480 20K/J_4 E36 LPC_DRQ#0 LPC_DRQ#0 [27]

RTC
SM_INTRUDER# LDRQ0#
+3V_RTC R477 1M/J_4 K22 +3V K36 LCD_BK_OFF LCD_BK_OFF# [22]
INTRUDER# LDRQ1# / GPIO23

1
J1
C192 C471 PCH_INVRMEN C17 V5 IRQ_SERIRQ [27,32]
INTVRMEN SERIRQ
+3V_RTC_0

1U/6.3V_4 1U/6.3V_4
*SHORT_ PAD1

2
20MIL SATA0RXN
AM3
ACZ_BITCLK_R N34 AM1
HDA_BCLK SATA0RXP

SATA 6G
AP7
ACZ_SYNC_R SATA0TXN
L34 AP5
1

BT1 HDA_SYNC SATA0TXP


SPKR T10 AM10
[24] SPKR SPKR SATA1RXN SATA_RXN1 [25]
BAT_CONN AM8
SATA1RXP SATA_RXP1 [25]
ACZ_RST#_R K34 AP11 SATA HDD
SATA_TXN1 [25]
2

HDA_RST# SATA1TXN
AP10 SATA_TXP1 [25]
SATA1TXP

[24] ACZ_SDIN0 E34 AD7


HDA_SDIN0 SATA2RXN
AD5
SATA2RXP
TP53 G34 AH5
HDA_SDIN1 SATA2TXN
AH4
HDA Bus(CLG) To Separate Codec Sync C34
SATA2TXP

IHDA
HDA_SDIN2
AB8 SATA_RXN3 [25]
SATA3RXN
C386 *22P/50V_4 by PD3 A34
HDA_SDIN3 SATA3RXP
AB10 SATA_RXP3 [25]
+5V SATA3TXN
AF3 SATA_TXN3 [25] SATA ODD
[24] ACZ_BITCLK R470 33/J_4 ACZ_BITCLK_R AF1
SATA3TXP SATA_TXP3 [25]
ACZ_SDOUT_R A36

SATA
2
R295 33/J_4 ACZ_SYNC_CODEC HDA_SDO
[24] ACZ_SYNC Y7 SATA_RXN4 [25]
SATA4RXN
Y5 SATA_RXP4 [25]
R471 33/J_4 ACZ_RST#_R ACZ_SYNC_CODEC 1 ACZ_SYNC_R SATA4RXP
[24] ACZ_RST# 3 [27] INTEL_BT_OFF# C36
HDA_DOCK_EN# / GPIO33 +3V SATA4TXN
AD3 SATA_TXN4 [25] ESATA #1
AD1 SATA_TXP4 [25]
R466 33/J_4 ACZ_SDOUT_R BOARD_ID3 SATA4TXP
[24] ACZ_SDOUT Q29 ME2N7002E TP55 N32
HDA_DOCK_RST# / GPIO13 +3V_S5
[10] BOARD_ID3 Y3
SATA5RXN
Y1
SATA5RXP
AB3
PCH_JTAG_TCK_R SATA5TXN
J3 AB1
PCH JTAG Debug (CLG) TP73
PCH_JTAG_TMS_R
JTAG_TCK SATA5TXP
H7 Y11

JTAG
+3V_S5 TP69 JTAG_TMS SATAICOMPO
C C
PCH_JTAG_TDI_R K5 Y10 SATA_COMP R492 37.4/F_4 +1.05V_PCH
TP74 JTAG_TDI SATAICOMPI
PCH_JTAG_TDO_R H1
TP75 JTAG_TDO
AB12
SATA3RCOMPO
R223 R507 R506 AB13 SATA3_COMP R491 49.9/F_4
*210/F_4 *210/F_4 *210/F_4 SATA3COMPI

PCH_JTAG_TMS_R [32] PCH_SPI_CLK PCH_SPI_CLK T3 AH1 SATA3_RBIAS R249 750/F_4


PCH_JTAG_TDI_R SPI_CLK SATA3RBIAS
PCH_JTAG_TDO_R [32] PCH_SPI_CS0# PCH_SPI_CS0# Y14
PCH_JTAG_TCK_R SPI_CS0#
R212 *10K/J_4 PCH_SPI_CS1# T1

SPI
+3VPCU SPI_CS1#
P3 SATA_ACT#
SATALED# SATA_ACT# [31]
R222 R497 R521 R244 [32] PCH_SPI_SI PCH_SPI_SI V4 +3V V14
SPI_MOSI SATA0GP / GPIO21 ODD_PRSNT# [25]
*100/F_4 *100/F_4 *100/F_4 *51/J_4
[32] PCH_SPI_SO PCH_SPI_SO U3 +3V P1 BBS_BIT0
SPI_MISO SATA1GP / GPIO19

PCH Strap Table CougarPoint_R1P0

MX25L3205DM2I-12G: AKE39FP0Z00 Pin Name Strap description Sampled Configuration


PCH Dual SPI (CLG)
W25X32VSSIG: AKE39ZP0N00 0 = Default (weak pull-down 20K) R529 *1K/J_4 SPKR
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode +3V
Socket: DG008000031
0 = "top-block swap" mode
GNT3# / GPIO55 Top-Block Swap Override PWROK R450 *1K/J_4
1 = Default (weak pull-up 20K) PCI_GNT3# [9]
+3V_PCH_SPI
U10
PCH_SPI_CS0# 1 8 INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R272 330K/J_4 PCH_INVRMEN
PCH_SPI_CLK R201 33/J_4 PCH_SPI1_CLK_R CE# VDD
6
PCH_SPI_SI R202 33/J_4 PCH_SPI1_SI_R SCK
5
B
PCH_SPI_SO R184 33/J_4 PCH_SPI1_SO_R SI B
2 7 R200 3.3K/J_4 Default weak pull-up on GNT0/1#
SO HOLD#
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK Boot Location [Need external pull-down for LPC BIOS]
3 4 GNT1# GNT0#
C268 WP# VSS C267
22P/50V_4 MX25L1605A 0.1U/10V_4 1 1 SPI R448 *1K/J_4
* BBS_BIT1 [9]

GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R247 *1K/J_4 BBS_BIT0

+3V_PCH_SPI R195 3.3K/J_4


0 = Override
HDA_SDO Flash Descriptor Security RSMRST +3V_S5 R468 *1K/J_4 ACZ_SDOUT_R
1 = Default (weak pull-up 20K)
0 = Set to Vss R238 2.2K/J_4 +1.8V
DF_TVS DMI/FDI Termination voltage PWROK R252 4.7K/J_4
1 = Set to Vcc (weak pull-down 20K) DF_TVS [10]
H_SNB_IVB# [3]
+3V +3V_PCH_SPI
0 = Disable
GPIO28 On-die PLL Voltage Regulator RSMRST# R523 *1K/J_4 PLL_ODVR_EN [10]
R199 0R 1 = Enable (Default)
+3V_S5
R197 *0R
0 = Support by 1.8V (weak pull-down) R296 1K/J_4 ACZ_SYNC_R
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 1 = Support by 1.5V +3V_S5

Should be pull-down
GPIO8 Integrated Clock Chip Enable RSMRST# (weak pull-up 20K)
0 = Default (weak pull-down 20K)
SPI_MOSI iTPM function Disable APWROK +3V R203 *1K/J_4 PCH_SPI_SI
1 = Enable

NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 20kohm)

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
C 1A
Cougar Point 2/6
Date: Friday, October 29, 2010 Sheet 8 of 45
5 4 3 2 1
5 4 3 2 1

U17B 09
BG34
U17E PERN1 SMBALERT#
BJ34
PERP1 +3V_S5 SMBALERT# / GPIO11
E12
AY7 AV32
RSVD1 PETN1 SMB_PCH_CLK
AV7 AU32 H14
RSVD2 PETP1 SMBCLK
BG26 AU3
TP1 RSVD3 SMB_PCH_DAT
BJ26 BG4 [23] PCIE_RXN2_LAN BE34 C9
TP2 RSVD4 PERN2 SMBDATA
BH25 [23] PCIE_RXP2_LAN BF34
TP3 C445 0.1U/10V_4 PCIE_TXN2_LAN_C PERP2
BJ16
TP4 RSVD5
AT10 LAN [23] PCIE_TXN2_LAN BB32
PETN2
BG16 BC8 [23] PCIE_TXP2_LAN C441 0.1U/10V_4 PCIE_TXP2_LAN_C AY32 +3V_S5

SMBUS
TP5 RSVD6 PETP2 DRAMRST_CNTRL_PCH
AH38 A12 DRAMRST_CNTRL_PCH [4]
TP6 SML0ALERT# / GPIO60
AH37 AU2 [27] PCIE_RXN3 BG36
TP7 RSVD7 PERN3 SMB_ME0_CLK
AK43 TP8 RSVD8 AT4 WLAN [27] PCIE_RXP3 BJ36 PERP3 SML0CLK C8
AK45 AT3 [27] PCIE_TXN3 C453 0.1U/10V_4 PCIE_TXN3_C AV34
TP9 RSVD9 C457 0.1U/10V_4 PCIE_TXP3_C PETN3 SMB_ME0_DAT
C18 TP10 RSVD10 AT1 [27] PCIE_TXP3 AU34 PETP3 SML0DATA G12
N30 TP11 RSVD11 AY3
D
H3 TP12 RSVD12 AT5 BF36 PERN4 D
AH12 TP13 RSVD13 AV3 BE36 PERP4
AM4 AV1 AY34 +3V_S5 C13 SML1ALERT#_R
TP14 RSVD14 PETN4 SML1ALERT# / PCHHOT# / GPIO74
AM5 TP15 RSVD15 BB1 BB34 PETP4
Y13 BA3 EC-B-02 +3V_S5 E14 SMB_ME1_CLK

PCI-E*
TP16 RSVD16 SML1CLK / GPIO58
K24 TP17 RSVD17 BB5 [28] PCIE_RXN5 BG37 PERN5
L24 BB3 [28] PCIE_RXP5 BH37 +3V_S5 M16 SMB_ME1_DAT
TP18 RSVD18 C606 *0.1U/10V_4 PCIE_TXN5_C PERP5 SML1DATA / GPIO75
AB46 TP19 RSVD19 BB7 USB3.0 [28] PCIE_TXN5
C607 *0.1U/10V_4 PCIE_TXP5_C
AY36 PETN5
AB45 BE8 BB36

RSVD
TP20 RSVD20 [28] PCIE_TXP5 PETP5
RSVD21 BD4
RSVD22 BF6 BJ38 PERN6
BG38

Controller
NV_ALE PERP6 CL_CLK1 TP68
B21 TP21 RSVD23 AV5 TP64 AU36 PETN6 CL_CLK1 M7
M20 TP22 RSVD24 AV10 AV36 PETP6
AY16

Link
TP23 CL_DAT1 TP63
BG46 TP24 RSVD25 AT8 BG40 PERN7 CL_DATA1 T11
BJ40 PERP7
RSVD26 AY5 AY40 PETN7
BA2 BB40 P10 CL_RST# TP61
RSVD27 PETP7 CL_RST1#
BE28
TP25
BC30 AT12 BE38
TP26 RSVD28 PERN8
BE32 BF3 BC38
TP27 RSVD29 PERP8
BJ32 AW38
TP28 PETN8
BC28 AY38
TP29 PETP8
BE30
TP30
BF32 +3V_S5 M10 PEG_CLKREQ#
TP31 PEG_A_CLKRQ# / GPIO47
BG32 C24 USBP0- [25] Y40
TP32 USBP0N CLKOUT_PCIE0N
AV26
TP33 USBP0P
A24 USBP0+ [25] USB/eSATA Combo #1(Phoenix debug) Y39
CLKOUT_PCIE0P
BB26 C25 USBP1- [27] +3V_S5 AB37 CLKOUT_PEG_A_N
TP34 USBP1N CLKOUT_PEG_A_N

CLOCKS
AU28 B25 USBP1+ [27] USB#0-> L port((BIOS debug) J2 AB38 CLKOUT_PEG_A_P
TP35 USBP1P PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
AY30 C26 USBP2- [31]
TP36 USBP2N
AU26 A26 USBP2+ [31]
TP37 USBP2P CLKOUT_PCIE1N
AY26
TP38 USBP3N
K28 USBP3- [27] EHCI1 AB49
CLKOUT_PCIE1N CLKOUT_DMI_N
AV22 CLK_CPU_BCLKN [3]
AV28 H28 CLKOUT_PCIE1P AB47 AU22 CLK_CPU_BCLKP [3]
TP39 USBP3P USBP3+ [27] CLKOUT_PCIE1P CLKOUT_DMI_P
AW30 E28
TP40 USBP4N PCIECLKRQ1#
USBP4P
D28 WWAN(common design reserved) M1
PCIECLKRQ1# / GPIO18 +3V
C28 USBP5- [27] AM12 CLK_DPLL_SSCLKN [3]
USBP5N CLKOUT_DP_N
USBP5P
A28 USBP5+ [27] BlueTooth CLKOUT_DP_P
AM13 CLK_DPLL_SSCLKP [3]
C29 CLKOUT_PCIE2N AA48
USBP6N CLKOUT_PCIE2P CLKOUT_PCIE2N
B29 AA47
PCI_PIRQA# USBP6P CLKOUT_PCIE2P
K40 N28 BF18 CLK_BUF_PCIE_3GPLLN
PCI_PIRQB# PIRQA# USBP7N PCIECLKRQ2# CLKIN_DMI_N
K38 M28 V10 +3V BE18 CLK_BUF_PCIE_3GPLLP
PCI

PCI_PIRQC# PIRQB# USBP7P PCIECLKRQ2# / GPIO20 CLKIN_DMI_P


H38 L30
PCI_PIRQD# PIRQC# USBP8N
G38
PIRQD# USBP8P
K30 USB(common design reserved)
G30 USBP9- [31] Y37 BJ30 CLK_BUF_BCLKN
DGPU_HOLD_RST# USBP9N CLKOUT_PCIE3N CLKIN_GND1_N
C46 +3V E30 USB #1-->R port(DB&BIOS debug) Y36 BG30 CLK_BUF_BCLKP
USB

REQ1# / GPIO50 USBP9P USBP9+ [31] CLKOUT_PCIE3P CLKIN_GND1_P


[31] RF_ON C44
REQ2# / GPIO52 +3V USBP10N
C30 USBP10- [26] USB3.0
DGPU_PWR_EN# E40 +3V A30 Card Reader A8 +3V_S5
REQ3# / GPIO54 USBP10P USBP10+ [26] PCIECLKRQ3# / GPIO25
L32 EHCI2 G24 CLK_BUF_DREFCLKN
BBS_BIT1 USBP11N CLKIN_DOT_96N
[8] BBS_BIT1 D47 +3V K32 E24 CLK_BUF_DREFCLKP
BT_DIS GNT1# / GPIO51 USBP11P CLKOUT_PCIE4N CLKIN_DOT_96P
C
[27] BT_DIS E42
GNT2# / GPIO53 +3V USBP12N
G32 EC-B-02 Y43
CLKOUT_PCIE4N
C
[8] PCI_GNT3# PCI_GNT3# F46 +3V E32 CLKOUT_PCIE4P Y45
GNT3# / GPIO55 USBP12P CLKOUT_PCIE4P
C32 AK7 CLK_BUF_DREFSSCLKN
USBP13N PCIECLKRQ4# CLKIN_SATA_N
A32 L12 +3V_S5 AK5 CLK_BUF_DREFSSCLKP
MPC_PWR_CTRL# USBP13P PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
G42
PIRQE# / GPIO2 +3V
[25,32] ODD_MDDA# ODD_MDDA# R635 *0_4 ODD_MDDA_R# G40 +3V
EXTTS_SNI_DRV0_PCH PIRQF# / GPIO3 USB_BIAS R286 22.6/F_4 CLK_PCH_14M
C42
PIRQG# / GPIO4 +3V USBRBIAS#
C33 V45
CLKOUT_PCIE5N REFCLK14IN
K45
EXTTS_SNI_DRV1_PCH D44 +3V USB port 6,7disable for HM65. V46
PIRQH# / GPIO5 CLKOUT_PCIE5P
B33 L14 +3V_S5 H45 CLK_PCI_FB C321 27P/50V_4
USBRBIAS PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
TP62 K10
PME#

2
PCI_PLTRST# C6 +3V_S5 A14 USB_OC0# USB_OC0# [27] AB42 V47 XTAL25_IN
PLTRST# OC0# / GPIO59 USB_OC1# CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT R323 Y4
+3V_S5 OC1# / GPIO40
K20 USB_OC1# [27] AB40
CLKOUT_PEG_B_P XTAL25_OUT
V49
+3V_S5 B17 USB_OC2# USB_OC2# [25] 1M/J_4 25MHZ
OC2# / GPIO41 USB_OC3#
TP37 H49 +3V_S5 C16 E6 +3V_S5

1
CLKOUT_PCI0 OC3# / GPIO42 USB_OC4# PEG_B_CLKRQ# / GPIO56 C322 27P/50V_4
TP52 H43
CLKOUT_PCI1 +3V_S5 OC4# / GPIO43
L16
CLK_PCI_FB R303 22/J_4 CLK_PCI_FB_R J48 +3V_S5 A16 USB_OC5# Y47 XCLK_RCOMP R311 90.9/F_4 +1.05V_PCH
R447 22/J_4 CLK_PCI_LPC_R CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# CLK_FLEX1 CLK_BUF_BCLKN CLK_BUF_PCIE_3GPLLN XCLK_RCOMP
[27] CLK_LPC_DEBUG K42
CLKOUT_PCI3 +3V_S5 OC6# / GPIO10
D14 V40
CLKOUT_PCIE6N
[32] CLK_PCI_8512 R446 22/J_4 CLK_PCI_EC_R H40 +3V_S5 C14 USB_OC7# CLK_25M CLK_BUF_BCLKP CLK_BUF_PCIE_3GPLLP V42
CLKOUT_PCI4 OC7# / GPIO14 CLK_48M_CARD_C CLK_BUF_DREFCLKN CLKOUT_PCIE6P
CLK_BUF_DREFCLKP [31] DIS_BULE_LED T13 +3V_S5
CougarPoint_R1P0 CLK_BUF_DREFSSCLKN PCIECLKRQ6# / GPIO45
CLK_BUF_DREFSSCLKP +3V TP51
RF1

RF2

RF3

RF4
RF5
V38 K43

FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
RV10

CLK_PCH_14M V37
CLK_PCI_FB_R CLKOUT_PCIE7P CLK_FLEX1 TP65
+3V CLKOUTFLEX1 / GPIO65
F47 EC-C-04
+3V_S5

RF7
RF8
RF9
RF10
RF11
RF12
RF13
For RF K12
*10P/50V/COG_4

*10P/50V/COG_4

*10P/50V/COG_4

*10P/50V/COG_4
*10P/50V/COG_4
PCIECLKRQ7# / GPIO46
+3V H47 CLK_25M R605 *0_4
RF6

CLKOUTFLEX2 / GPIO66 PCH_CLK25M [28]


*EGA-0402

TP57 CLK_PCH_ITPN_R AK14


TP60 CLK_PCH_ITPP_R CLKOUT_ITPXDP_N CLK_48M_CARD_C R304 22_4
AK13 +3V K49 CLK_48M_CARD [26]

*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
*10P/50V/COG_4
CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67
*10P/50V/COG_4

CougarPoint_R1P0
For RF
Please Close to U17

EC-C-01 Please Close to U17


EC-C-01

DGPU Power ON
+3V
PEG CLK detect SMBus(CLK)
B B

R313 *DIS@0_4
+3V R170
4.7K/J_4

2
+3V

R298
GFXPG [10,15]
SMB_PCH_DAT 3 1 SMB_RUN_DAT SMB_RUN_DAT [13,14] CLK Gen(CLK)
DIS@1K_4
02/20 DEL for Pre-ES1
5

1 Q19
MAINON [24,28,32,34,35,36,38,40,41]
4 ME2N7002E
[15,36,39] GFXON
2
2

U18
CPU_CLK select(CLK)
3

+3V
DIS@MC74VHC1G08DFT2G PEG_CLKREQ# 3 1
PEX_CLKREQ# [15]
2 DGPU_PWR_EN# 0 1
DIS@ME2N7002E
Q21 R143
Q30 DIS@ME2N7002E 4.7K/J_4 CPU_SEL CPU0/1=133MHz CPU0/1=100MHz

2
(default)
1

SMB_PCH_CLK 3 1 SMB_RUN_CLK SMB_RUN_CLK [13,14]


Q16
ME2N7002E

PLTRST#(CLG) +3V_S5 WLAN CLK_REQ/Strap Pin(CLG) SMBus/Pull-up(CLG)


PCI/USBOC# Pull-up(CLG) [27] CLK_PCIE_WLANN
R4391 2 0X2 CLKOUT_PCIE2N
3 4 CLKOUT_PCIE2P +3V
+3V_S5 [27] CLK_PCIE_WLANP
C290 R236 R217 *Short_4@NC PCIECLKRQ2# R208 10K/J_4 PCIE_CLKREQ_WLAN# +3V_S5
[27] PCIE_CLKREQ_WLAN#
0.1U/10V_4 10 1 USB_OC7#
USB_OC4# 9 2 USB_OC6# LAN R210 10K/J_4 PCIE_CLKREQ_LAN#
5

USB_OC1# 8 3 USB_OC0# [23] CLK_PCIE_LANN 3 4 CLKOUT_PCIE1N


PCI_PLTRST# 2 USB_OC3# 7 4 USB_OC5# [23] CLK_PCIE_LANP 1 2 CLKOUT_PCIE1P EC-B-03
4 PLTRST# USB_OC2# 6 5 R440 0X2 +3V_S5 R550
1 [23] PCIE_CLKREQ_LAN# R224 *Short_4@NC PCIECLKRQ1# 2.2K/J_4

2
10KX8
U16 R543 10K/J_4 DIS_BULE_LED EC-B-02
3

TC7SH08FU(F) R251 [18,29,32] MB_CLK1 3 1 SMB_ME1_CLK


100K/J_4 +3V
R297 USB3.0 Chip R606 10K/J_4 PCIECLKRQ4# Q46
10 1 EXTTS_SNI_DRV0_PCH ME2N7002E
9 2 DGPU_PWR_EN# [28] CLK_100_USB30_P 3 4 CLKOUT_PCIE4P
8 3 ODD_MDDA_R# 1 2 CLKOUT_PCIE4N +3V_S5
[28] CLK_100_USB30_N
R250 *0_4 PLTRST# PLTRST# [3,23,27,28] MPC_PWR_CTRL# 7 4 EXTTS_SNI_DRV1_PCH R607 0X2
BT_DIS 6 5 R546 DIS@10K/J_4 PEG_CLKREQ#
A
SW:Ra A
10KX8 PEG_CLKREQ# R547 *UMA@10K/J_4
EC-B-02
UMA:Rb R551
GPU RST#(CLG) R310 *DIS@0_4 2.2K/J_4

2
+3V
+3V
PCI_PIRQA# R443 8.2K/J_4 [15] CLK_PCIE_VGAP 3 4 CLKOUT_PEG_A_P CLK_BUF_BCLKN R283 10K/J_4 [18,29,32] MB_DATA1 3 1 SMB_ME1_DAT
PCI_PIRQB# R452 8.2K/J_4 [15] CLK_PCIE_VGAN 1 2 CLKOUT_PEG_A_N CLK_BUF_BCLKP R284 10K/J_4
PCI_PIRQC# R457 8.2K/J_4 R441 DIS@0X2 Q47
PCI_PIRQD# R459 8.2K/J_4 ME2N7002E
C436 RF_ON R438 10K/J_4
SW:Stuff CLK_BUF_PCIE_3GPLLN R482 10K/J_4
DIS@0.1U/10V_4 CLK_BUF_PCIE_3GPLLP R484 10K/J_4
UMA:Non-stuff
5

CLK_BUF_DREFCLKN R476 10K/J_4


PLTRST# 2 CLK_BUF_DREFCLKP R479 10K/J_4 +3V_S5
4 GPU_RST# [15] RF_ON R442 100K/J_4 MPC Switch Control CLK_BUF_DREFSSCLKN R512 10K/J_4
DGPU_HOLD_RST# 1 CLK_BUF_DREFSSCLKP R511 10K/J_4 R494 1K/J_4 DRAMRST_CNTRL_PCH
Low = MPC ON CLK_PCH_14M R458 10K/J_4
U19 DIS@TC7SH08FU(F) MPC_PWR_CTRL# High = MPC OFF (Default) R498 10K/J_4 SMBALERT# PROJECT KL5A
3

+3V R153 2.2K/J_4 SMB_PCH_CLK


R302 R647 *DIS@0_4 R168 2.2K/J_4 SMB_PCH_DAT Quanta Computer Inc.
DIS@100K/J_4 DGPU_HOLD_RST# R648 *10K/J_4 MPC_PWR_CTRL# R451 *1K/J_4 DIS_BULE_LED R544 100K/J_4 R241 2.2K/J_4 SMB_ME0_CLK
R495 2.2K/J_4 SMB_ME0_DAT Size Document Number Rev
R503 10K/J_4 SML1ALERT#_R Custom 1A
Cougar Point 3/6
Date: Friday, October 29, 2010 Sheet 9 of 45
5 4 3 2 1
5 4 3 2 1

10
GPIO Pull-up/Pull-down(CLG)
Cougar Point (GPIO,VSS_NCTF,RSVD) +3V_S5

U17F
LAN_DISABLE# R242 10K/J_4
S_GPIO R496 100_4 T7 +3V +3V C40 CPU_ID
BMBUSY# / GPIO0 TACH4 / GPIO68
EC_EXT_SMI# A42 +3V +3V B41 R291 1.5K/F_4 +3V
[28,32] EC_EXT_SMI# TACH1 / GPIO1 TACH5 / GPIO69 +3V
BOARD_ID1 H36 +3V +3V C41 COLOR_ENGINE_DET R608 10K_4
TACH2 / GPIO6 TACH6 / GPIO70 EC_EXT_SMI# R293 10K/J_4
D EC_EXT_SCI# BOARD_ID2 EC-B-01 EC_EXT_SCI# R462 10K/J_4 D
[32] EC_EXT_SCI# E38 TACH3 / GPIO7 +3V +3V TACH7 / GPIO71 A40

ICC_EN# C10 +3V_S5


TP103 GPIO8 EC_A20GATE R519 10K/J_4
[27] LAN_DISABLE# LAN_DISABLE# C4 +3V_S5 EC_RCIN# R508 10K/J_4
LAN_PHY_PWR_CTRL / GPIO12 TEMP_ALERT# R227 10K/J_4
HOST_ALERT#1_R BT_ON# R522 10K/J_4
G2 GPIO15 +3V_S5 A20GATE P4 EC_A20GATE [32]

PECI AU16 TP59


BOARD_ID0 U2 +3V GPIO27 R487 10K/J_4 USB30 ID: 0-->Support
SATA4GP / GPIO16 EC_RCIN#
RCIN# P5 EC_RCIN# [32] 1-->Nonsupport
GFXPG_R R228 DIS@10K/J_4

GPIO
GFXPG_R D40 +3V AY11 H_PW RGOOD [3]

CPU/MISC
TACH0 / GPIO17 PROCPWRGD
BIOS_REC T5 +3V AY10 PCH_THRMTRIP# R499 390/J_4 PM_THRMTRIP# [3]
SCLOCK / GPIO22 THRMTRIP#
EC-B-06 USB30_ID E8 GPIO24 / MEM_LED +3V_S5 INIT3_3V# T14 USB30_ID EC-B-11
+3V_S5
GPIO27 E16 DSW AY1 DF_TVS [8]
GPIO27 DF_TVS R645 *10K/J_4 USB30_ID R646 10K/J_4
[8] PLL_ODVR_EN R501 *Short_4_NC P8 +3V_S5
GPIO28
TS_VSS1 AH8
SYSTEM_ID K1 +3V
STP_PCI# / GPIO34
TS_VSS2 AK11 Board ID EC-B-04, EC-B-11
BT_ON#
[27] BT_ON# K4 GPIO35 +3V
C TS_VSS3 AH10 Board ID SYSTEM_ID ID2 ID1 ID0 ID3 C
GPIO36 V8 +3V For Function GPIO34 GPIO71 GPIO6 GPIO16 GPIO13
TP67 SATA2GP / GPIO36
TS_VSS4 AK10 Board ID use below GPIO:
FDI_OVRVLTG M5 SATA3GP / GPIO37 +3V SDV 0 0 0 0 0 BOARD_ID0
MFG_MODE N2 SLOAD / GPIO38 +3V NC_1 P37 SIV 0 0 0 1 0 BOARD_ID1
DGPU_PRSNT# SIT BOARD_ID3
M3 SDATAOUT0 / GPIO39 +3V 0 0 1 0 0
TEST_SET_UP V13 +3V BG2
3/16 Connected to GND SVT 0 0 1 1 0
SDATAOUT1 / GPIO48 VSS_NCTF_15
+3V
DG rev0.9 ID2: 0-->6 layer
[29,32] TEMP_ALERT# V3 SATA5GP / GPIO49 VSS_NCTF_16 BG48 SOVP 0 0 0 0 1
1-->8 layer
SV_DET D6 GPIO57 +3V_S5 VSS_NCTF_17 BH3
+3V

VSS_NCTF_18 BH47
R248 *10K/J_4 BOARD_ID0 R226 10K/J_4 System ID: 0-->KL5
A4 BJ4 R464 10K/J_4 BOARD_ID1 R461 *10K/J_4 1-->KL6
VSS_NCTF_1 VSS_NCTF_19 R289 10K/J_4 BOARD_ID2 R290 *10K/J_4
A44 VSS_NCTF_2 VSS_NCTF_20 BJ44
R641 10K/J_4 CPU_ID R642 *10K/J_4
A45 BJ45 R229 10K/J_4 SYSTEM_ID R230 *10K/J_4 +3V_S5 CPU_ID: 0-->35W
VSS_NCTF_3 VSS_NCTF_21
1-->45W

NCTF
A46 VSS_NCTF_4 VSS_NCTF_22 BJ46
R655 10K/J_4 BOARD_ID3 R644 *10K/J_4
A5 VSS_NCTF_5 VSS_NCTF_23 BJ5 BOARD_ID3 [8]
B B
A6 VSS_NCTF_6 VSS_NCTF_24 BJ6
R214 *DIS@0_4
B3 VSS_NCTF_7 VSS_NCTF_25 C2 SV_SET_UP
+3V B47 C48
VSS_NCTF_8 VSS_NCTF_26 High = Strong (Default) +3V
BD1 VSS_NCTF_9 VSS_NCTF_27 D1
TEST_SET_UP R540 10K/J_4 +3V
5

1 BD49 D49 R541 *0/J_4


HW PG [32,36,37,38,40,41,42] VSS_NCTF_10 VSS_NCTF_28
GFXPG_R 4 R520 *10K/J_4 SV_DET R525 100K/J_4
GFXPG_R
2 GFXPG [9,15] BE1 VSS_NCTF_11 VSS_NCTF_29 E1
U14
3

DIS@MC74VHC1G08DFT2G BE49 E49


VSS_NCTF_12 VSS_NCTF_30
BF1 VSS_NCTF_13 VSS_NCTF_31 F1 Optimus UMA
+3V_S5
BF49 VSS_NCTF_14 VSS_NCTF_32 F49 SGPIO HOST_ALERT#1_R R243 1K/J_4 Stuff R539 R527
+3V
CougarPoint_R1P0
S_GPIO R513 10K/J_4 Intel ME Crypto Transport Layer No Stuff R527 R539
R500 *0/J_4 Security (TLS) cipher suite
+3V
Low = Disable (Default)
R527 DGPU_PRSNT# R539 DIS@100K/J_4
A High = Enable *UMA@10K/J_4 A
+3V +3V +3V

R534 100K/J_4 FDI_OVRVLTG R537 *1K/F_4 GPIO36 R636 *200K/F_4 BIOS_REC R528 10K/J_4
R524 *0/J_4
MFG-TEST PROJECT KL5A
+3V
Low = Tx, Rx terminated to Quanta Computer Inc.
FDI TERMINATION LOW - Tx, Rx terminated DMI TERMINATION same voltage (DC Coupling Mode) High = Disable (Default) MFG_MODE R204 10K/J_4
VOLTAGE OVERRIDE to same voltage VOLTAGE OVERRIDE (DEFAULT) BIOS RECOVERY R225 *0/J_4 Size Document Number Rev
Low = Enable Custom 1A
Cougar Point 4/6
Date: Friday, October 29, 2010 Sheet 10 of 45
5 4 3 2 1
5 4 3 2 1

PCH5(CLG)
COUGAR POINT (POWER)
+VCCA_DAC_1_2 +3V
11
VccADAC =1mA(8mils)
U17G POWER L19 180ohm/5A Cougar Point-M (POWER)
+1.05V_PCH +1.05V_PCH_VCC R316 *0/J_8 +1.05V_VCCUSBCORE +1.05V_PCH
+1.05V_PCH
VccCORE =1.6 A(70mils) R322 C313 C316 C319
R215 0/F_1206 AA23 VCCCORE[1] VCCADAC U48 *0/J_6 0.01U/25V_4 0.1U/10V_4 10U/6.3V_6 U17J POWER R282 *Short_8_NC
AC23 VCCCORE[2]

CRT
AD21 +VCCACLK AD49 N26
C458 C461 C467 C270 VCCCORE[3] +VCCALVDS +3V R538 0/J_4 VCCACLK VCCIO[29] C460
AD23 VCCCORE[4] VSSADAC U47 +3V_S5

VCC CORE
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 AF21 VccALVDS=1mA(8mils) VCCDSW3_3= 3mA P26 1U/6.3V_4 VCCSUS3_3 = 119mA(15mils)
VCCCORE[5] R444 SW@0/J_4 R542 *0/J_4 +VCCPDSW VCCIO[30]
AF23 VCCCORE[6] +3V_DSW T16 VCCDSW3_3
AG21 P28 +3V_S5
D
AG23
VCCCORE[7] R454 Ra *DIS@0/J_4 VCCIO[31] D
VCCCORE[8] C486 PCH_VCCDSW R263 *Short_6_NC
AG24 VCCCORE[9] VCCALVDS AK36 V12 DCPSUSBYP VCCIO[32] T27
+1.05V_PCH +1.05V_PCH_VCCDPLL_EXP AG26 0.1U/10V_4
VCCCORE[10]
AG27 VCCCORE[11] VSSALVDS AK37 VCCIO[33] T29
R237 *Short_6_NC AG29 +VCC_TX_LVDS +1.8V C485 +3V_SUS_CLKF33 T38 C465
VCCCORE[12] +1.05V_PCH +VCCAPLL_CPY_PCH *0.1U/10V_4 VCC3_3[5] 0.1U/10V_4
AJ23 VccTX_LVDS=60mA(10mils)

LVDS
VCCCORE[13] L15 SW@0.1uH_8 +3V_VCCPUSB
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 VCCSUS3_3[7] T23
+1.05V_PCH +1.05V_VCCAPLL_EXP AJ27 L14 *10uH/100mA_8 BH23
AJ29
VCCCORE[15]
AM38 R465 Rb *DIS@0/J_4 VCCAPLLDMI2
T24
L13 *1uH/25mA_6 VCCCORE[16] VCCTX_LVDS[2] C442 C447 C308 R281 *Short_6_NC +VCCDPLL_CPY VCCSUS3_3[8] R262 *Short_6_NC
AJ31 VCCCORE[17] +1.05V_PCH AL29 VCCIO[14]
AP36 0.01U/25V_4 0.01U/25V_4 22U/6.3V_8 C299 V23

USB
VCCTX_LVDS[3] *10U/6.3V_6 VCCSUS3_3[9]
C296 AP37 +VCCSUS1 AL24 V24 C466
*10U/6.3V_6 AN19
VCCTX_LVDS[4] DIS SW DCPSUS[3] VCCSUS3_3[10] 0.1U/10V_4
VCCIO[28] +3V_VCCAUBG
P24
Ra 0 ohm NA VCCME(+1.05V) = ??A(??mils) C468 VCCSUS3_3[6]
BJ22 +3V_VCC_GIO +3V *1U/6.3V_4 AA19
+1.05V_PCH +1.05V_VCCIO VCCAPLLEXP Rb 0 ohm NA VCCASW[1]
T26 +VCCAUPLL R278 *Short_6_NC +1.05V_PCH
R436 *Short_6_NC +1.05V_PCH +1.05V_VCCEPW VCCIO[34]
VccIO =4.07 A(165mils) V33 AA21 VCC5REFSUS=1mA

HVCMOS
R277 0/F_1206 VCC3_3[6] VCCASW[2]
AN16 VCCIO[15] VccASW =1.61 A(70mils)
VCCDMI = 42mA(10mils) R328 0/F_1206 AA24 M26 +5V_PCH_VCC5REFSUS R294 10/F_4 +5V_S5
C455 VCCASW[3] V5REF_SUS
AN17 VCCIO[16]

Clock and Miscellaneous


C451 C462 C482 V34 0.1U/10V_4 +1.1V_VCC_DMI +1.05V_PCH AA26 D17 RB500V-40
VCC3_3[7] VCCASW[4] +3V_S5
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 C473 C456 C464 AN23 +VCCA_USBSUS C459
R481 *Short_4_NC 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 DCPSUS[4] 0.1U/10V_4
AN21 VCCIO[17] AA27 VCCASW[5]
AN24 +3V_VCCPSUS
VCCSUS3_3[1] C469
AN26 VCCIO[18]
VCCVRM = 159mA(10mils) AA29 VCCASW[6]
C472 *1U/6.3V_4
AN27 AT16 +VCCAFDI_VRM +VCCAFDI_VRM 1U/6.3V_4 AA31 V5REF= 1mA
VCCIO[19] VCCVRM[3] VCCASW[7]
C463 C306 AP21 AC26 P34 +5V_PCH_VCC5REF R292 10/F_4 +5V
1U/6.3V_4 10U/6.3V_6 VCCIO[20] C314 C318 VCCASW[8] V5REF
AP23 AT20 VCCCLKDMI = 20mA(8mils) 22U/6.3V_8 22U/6.3V_8 AC27 D16 RB500V-40 +3V
VCCIO[21] VCCDMI[1] VCCASW[9] C446
N20

DMI

PCI/GPIO/LPC
+1.1V_VCC_DMI_CCI +VCC_DMI_CCI +1.05V_PCH VCCSUS3_3[2] 1U/6.3V_4
AP24 AC29

VCCIO
VCCIO[22] VCCASW[10]
VCCSUS3_3[3] N22
AP26 AB36 L18 *10uH_8 R321 *1/F_4 AC31
VCCIO[23] VCCCLKDMI VCCASW[11] +3V_VCCPSUS R271 *Short_6_NC
Vcc3_3 =0.409 A(20mils) VCCSUS3_3[4] P20 +3V_S5
AT24 R312 0/J_4 AD29
+3V +3V_VCC_EXP VCCIO[24] C448 C315 VCCASW[12]
C
VCCSUS3_3[5] P22 VCCSUS3_3 = 119mA(15mils) C
1U/6.3V_4 *10U/6.3V_6 AD31 C470
R279 *Short_8_NC VCCASW[13] 1U/10V_4
AN33 VCCIO[25]
W21 VCCASW[14] VCC3_3[1] AA16
AN34 VCCIO[26] VCCDFTERM[1] AG16
C307 +VCCP_NAND +1.8V VCCPNAND = 200 mA(10mils) W23 W16 +3V_VCCPCORE R536 *Short_6_NC
VCCASW[15] VCC3_3[8] +3V
0.1U/10V_4
BH29 AG17 R235 *Short_8_NC W24 T34 VCCPCORE = 28mA(10mils)

DFT / SPI
VCC3_3[3] VCCDFTERM[2] VCCASW[16] VCC3_3[4] +3V
C480
W26 0.1U/10V_4
C477 VCCASW[17] C449
VCCDFTERM[3] AJ16
0.1U/10V_4 W29 0.1U/10V_4
+VCCAFDI_VRM VCCASW[18]
+VCCAFDI_VRM AP16 VCCVRM[2]
AJ17 +1.05V_PCH W31 AJ2
VCCDFTERM[4] VCCASW[19] VCC3_3[2] +3V

+1.05V_PCH R259 *0/J_8 +1.05V_VCCAPLL_FDI BG6 R535 *Short_6_NC W33


VccAFDIPLL VCCASW[20] C491
VCCIO[5] AF13
+3V_VCCME_SPI +3V VCCSPI = 20mA(8mils) 0.1U/10V_4
R233 *Short_8_NC +1.05V_VCCDPLL_FDI AP17 C474 C483 0.1U/10V_4 +VCCRTCEXT N16
VCCIO[27] DCPRTC
FDI

V1 R213 0/J_6 1U/6.3V_4 AH13 +V1.05S_SATA3 R234 *Short_8_NC +1.05V_PCH


VCCSPI VCCIO[12]
+1.05V_PCH AU20 +VCCAFDI_VRM +VCCAFDI_VRM Y49 AH14
VCCDMI[2] C275 +3V_S5 R314 *Short_6_NC VCCVRM[4] VCCIO[13] C484
1U/6.3V_4 1U/10V_4
CougarPoint_R1P0 R207 *0/J_6 AF14 ??mA(??mils)
C444 +1.05V_VCCA_A_DPL VCCIO[6]
65mA(10mils) BD47

SATA
1U/6.3V_4 VCCADPLLA +V1.1LAN_VCCAPLL L12 *10uH/100mA_8
VCCAPLLSATA AK1 +1.05V_PCH
8mA(8mils) +1.05V_VCCA_B_DPL BF47 VCCVRM= 114mA(15mils)
VCCADPLLB C280
R315 *Short_6_NC AF11 +VCCAFDI_VRM *10U/6.3V_6
+VCCDIFFCLK VCCVRM[1]
AF17 VCCIO[7]
+VCCDIFFCLKN AF33
C452 VCCDIFFCLKN[1] +1.05V_VCCIO1 R532 *Short_6_NC
AF34 VCCDIFFCLKN[2] VCCIO[2] AC16 +1.05V_PCH
1U/6.3V_4 VCCDIFFCLKN= 55mA(10mils) AG34
+1.05V_PCH VCCDIFFCLKN[3]
VCCSSC= 95mA(10mils) VCCIO[3] AC17
C479
+VCCAFDI_VRM R270 *0/J_6 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4
VCCSSC VCCIO[4]
VCCME = 1.01A(60mils)
VCCVRM: 1.8V (Destop) C475 C481 0.1U/10V_4 +VCCSST V16 +1.05V_VCCEPW
B
R317 0/J_6 *1U/6.3V_4 DCPSST B
+1.5V 1.5V (Mobile)
+1.05V_PCH R300 *0/J_6 T17 T21
+1.05V_PCH +V1.05M_VCCSUS DCPSUS[1] VCCASW[22]
V19

MISC
DCPSUS[2]
1mA(8mils)
R260 *Short_4_NC +VTT_VCCPCPU V21
VCCASW[23]

CPU
BJ8 V_PROC_IO
C294 C292 C293 T19 VCCSUSHDA= 10mA(8mils)
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 VCCASW[21]
VCCRTC<1mA(8mils) +3V_RTC R473 *0/J_4 +1.5V_SUS

RTC
A22 P32 +V3.3A_1.5A_HDA_IO R474 0/J_4

HDA
VCCRTC VCCSUSHDA +3V_S5

C304 C303 C305 CougarPoint_R1P0 C454 C450


1U/6.3V_4 0.1U/10V_4 0.1U/10V_4 *1U/6.3V_4 0.1U/10V_4

+1.05V_PCH L17 10uH/100mA +1.05V_VCCA_A_DPL

+ C312 C311
*220U/2.5V_3528 1U/6.3V_4
+3V

R326 *0/J_6
L16 10uH/100mA +1.05V_VCCA_B_DPL
R331 1/F_4 +3V_SUS_CLKF33_R L22 10uH/100mA_8 +3V_SUS_CLKF33

+ C309 C310
C325 C443 *220U/2.5V_3528 1U/6.3V_4
10U/6.3V_6 1U/10V_4
A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Cougar Point 5/6
Date: Friday, October 29, 2010 Sheet 11 of 45
5 4 3 2 1
5 4 3 2 1

PCH6(CLG)
12
U17I

AY4 H46
IBEX PEAK-M (GND) AY42
AY46
VSS[159]
VSS[160]
VSS[259]
VSS[260] K18
K26
VSS[161] VSS[261]
D AY8 VSS[162] VSS[262] K39 D
B11 VSS[163] VSS[263] K46
B15 VSS[164] VSS[264] K7
B19 VSS[165] VSS[265] L18
B23 VSS[166] VSS[266] L2
B27 VSS[167] VSS[267] L20
B31 VSS[168] VSS[268] L26
B35 VSS[169] VSS[269] L28
B39 VSS[170] VSS[270] L36
B7 VSS[171] VSS[271] L48
U17H F45 M12
VSS[172] VSS[272]
H5 VSS[0] BB12 VSS[173] VSS[273] P16
BB16 VSS[174] VSS[274] M18
AA17 VSS[1] VSS[80] AK38 BB20 VSS[175] VSS[275] M22
AA2 VSS[2] VSS[81] AK4 BB22 VSS[176] VSS[276] M24
AA3 VSS[3] VSS[82] AK42 BB24 VSS[177] VSS[277] M30
AA33 VSS[4] VSS[83] AK46 BB28 VSS[178] VSS[278] M32
AA34 VSS[5] VSS[84] AK8 BB30 VSS[179] VSS[279] M34
AB11 VSS[6] VSS[85] AL16 BB38 VSS[180] VSS[280] M38
AB14 VSS[7] VSS[86] AL17 BB4 VSS[181] VSS[281] M4
AB39 VSS[8] VSS[87] AL19 BB46 VSS[182] VSS[282] M42
AB4 VSS[9] VSS[88] AL2 BC14 VSS[183] VSS[283] M46
AB43 VSS[10] VSS[89] AL21 BC18 VSS[184] VSS[284] M8
AB5 VSS[11] VSS[90] AL23 BC2 VSS[185] VSS[285] N18
AB7 VSS[12] VSS[91] AL26 BC22 VSS[186] VSS[286] P30
AC19 VSS[13] VSS[92] AL27 BC26 VSS[187] VSS[287] N47
AC2 VSS[14] VSS[93] AL31 BC32 VSS[188] VSS[288] P11
AC21 VSS[15] VSS[94] AL33 BC34 VSS[189] VSS[289] P18
AC24 VSS[16] VSS[95] AL34 BC36 VSS[190] VSS[290] T33
AC33 VSS[17] VSS[96] AL48 BC40 VSS[191] VSS[291] P40
AC34 VSS[18] VSS[97] AM11 BC42 VSS[192] VSS[292] P43
AC48 VSS[19] VSS[98] AM14 BC48 VSS[193] VSS[293] P47
C C
AD10 VSS[20] VSS[99] AM36 BD46 VSS[194] VSS[294] P7
AD11 VSS[21] VSS[100] AM39 BD5 VSS[195] VSS[295] R2
AD12 VSS[22] VSS[101] AM43 BE22 VSS[196] VSS[296] R48
AD13 VSS[23] VSS[102] AM45 BE26 VSS[197] VSS[297] T12
AD19 VSS[24] VSS[103] AM46 BE40 VSS[198] VSS[298] T31
AD24 VSS[25] VSS[104] AM7 BF10 VSS[199] VSS[299] T37
AD26 VSS[26] VSS[105] AN2 BF12 VSS[200] VSS[300] T4
AD27 VSS[27] VSS[106] AN29 BF16 VSS[201] VSS[301] W34
AD33 VSS[28] VSS[107] AN3 BF20 VSS[202] VSS[302] T46
AD34 VSS[29] VSS[108] AN31 BF22 VSS[203] VSS[303] T47
AD36 VSS[30] VSS[109] AP12 BF24 VSS[204] VSS[304] T8
AD37 VSS[31] VSS[110] AP19 BF26 VSS[205] VSS[305] V11
AD38 VSS[32] VSS[111] AP28 BF28 VSS[206] VSS[306] V17
AD39 VSS[33] VSS[112] AP30 BD3 VSS[207] VSS[307] V26
AD4 VSS[34] VSS[113] AP32 BF30 VSS[208] VSS[308] V27
AD40 VSS[35] VSS[114] AP38 BF38 VSS[209] VSS[309] V29
AD42 VSS[36] VSS[115] AP4 BF40 VSS[210] VSS[310] V31
AD43 VSS[37] VSS[116] AP42 BF8 VSS[211] VSS[311] V36
AD45 VSS[38] VSS[117] AP46 BG17 VSS[212] VSS[312] V39
AD46 VSS[39] VSS[118] AP8 BG21 VSS[213] VSS[313] V43
AD8 VSS[40] VSS[119] AR2 BG33 VSS[214] VSS[314] V7
AE2 VSS[41] VSS[120] AR48 BG44 VSS[215] VSS[315] W17
AE3 VSS[42] VSS[121] AT11 BG8 VSS[216] VSS[316] W19
AF10 VSS[43] VSS[122] AT13 BH11 VSS[217] VSS[317] W2
AF12 VSS[44] VSS[123] AT18 BH15 VSS[218] VSS[318] W27
AD14 VSS[45] VSS[124] AT22 BH17 VSS[219] VSS[319] W48
AD16 VSS[46] VSS[125] AT26 BH19 VSS[220] VSS[320] Y12
AF16 VSS[47] VSS[126] AT28 H10 VSS[221] VSS[321] Y38
AF19 VSS[48] VSS[127] AT30 BH27 VSS[222] VSS[322] Y4
AF24 VSS[49] VSS[128] AT32 BH31 VSS[223] VSS[323] Y42
AF26 VSS[50] VSS[129] AT34 BH33 VSS[224] VSS[324] Y46
B AF27 AT39 BH35 Y8 B
VSS[51] VSS[130] VSS[225] VSS[325]
AF29 VSS[52] VSS[131] AT42 BH39 VSS[226] VSS[328] BG29
AF31 VSS[53] VSS[132] AT46 BH43 VSS[227] VSS[329] N24
AF38 VSS[54] VSS[133] AT7 BH7 VSS[228] VSS[330] AJ3
AF4 VSS[55] VSS[134] AU24 D3 VSS[229] VSS[331] AD47
AF42 VSS[56] VSS[135] AU30 D12 VSS[230] VSS[333] B43
AF46 VSS[57] VSS[136] AV16 D16 VSS[231] VSS[334] BE10
AF5 VSS[58] VSS[137] AV20 D18 VSS[232] VSS[335] BG41
AF7 VSS[59] VSS[138] AV24 D22 VSS[233] VSS[337] G14
AF8 VSS[60] VSS[139] AV30 D24 VSS[234] VSS[338] H16
AG19 VSS[61] VSS[140] AV38 D26 VSS[235] VSS[340] T36
AG2 VSS[62] VSS[141] AV4 D30 VSS[236] VSS[342] BG22
AG31 VSS[63] VSS[142] AV43 D32 VSS[237] VSS[343] BG24
AG48 VSS[64] VSS[143] AV8 D34 VSS[238] VSS[344] C22
AH11 VSS[65] VSS[144] AW14 D38 VSS[239] VSS[345] AP13
AH3 VSS[66] VSS[145] AW18 D42 VSS[240] VSS[346] M14
AH36 VSS[67] VSS[146] AW2 D8 VSS[241] VSS[347] AP3
AH39 VSS[68] VSS[147] AW22 E18 VSS[242] VSS[348] AP1
AH40 VSS[69] VSS[148] AW26 E26 VSS[243] VSS[349] BE16
AH42 VSS[70] VSS[149] AW28 G18 VSS[244] VSS[350] BC16
AH46 VSS[71] VSS[150] AW32 G20 VSS[245] VSS[351] BG28
AH7 VSS[72] VSS[151] AW34 G26 VSS[246] VSS[352] BJ28
AJ19 VSS[73] VSS[152] AW36 G28 VSS[247]
AJ21 VSS[74] VSS[153] AW40 G36 VSS[248]
AJ24 VSS[75] VSS[154] AW48 G48 VSS[249]
AJ33 VSS[76] VSS[155] AV11 H12 VSS[250]
AJ34 VSS[77] VSS[156] AY12 H18 VSS[251]
AK12 VSS[78] VSS[157] AY22 H22 VSS[252]
AK3 VSS[79] VSS[158] AY28 H24 VSS[253]
H26 VSS[254]
CougarPoint_R1P0 H30 VSS[255]
A H32 VSS[256] A
H34 VSS[257]
F3 VSS[258]

CougarPoint_R1P0
PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Cougar Point 6/6
Date: Friday, October 29, 2010 Sheet 12 of 45
5 4 3 2 1
5 4 3 2 1

DDR_RVS(DDR)
[4] M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
98
97
96
JDIM2A

A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ[63:0] [4]

+1.5V_SUS
JDIM2B
13
95 A3 DQ3 17 75 VDD1 VSS16 44
M_B_A4 92 4 M_B_DQ0 76 48
M_B_A5 A4 DQ4 M_B_DQ1 VDD2 VSS17
91 6 81 49
M_B_A6 A5 DQ5 M_B_DQ6 VDD3 VSS18
90 16 82 54
M_B_A7 A6 DQ6 M_B_DQ7 VDD4 VSS19
86 A7 DQ7 18 87 VDD5 VSS20 55
M_B_A8 89 21 M_B_DQ12 88 60
M_B_A9 A8 DQ8 M_B_DQ13 VDD6 VSS21
85 A9 DQ9 23 93 VDD7 VSS22 61
D M_B_A10 107 33 M_B_DQ14 94 65 D
M_B_A11 A10/AP DQ10 M_B_DQ10 VDD8 VSS23
84 A11 DQ11 35 2.48A 99 VDD9 VSS24 66
M_B_A12 83 22 M_B_DQ8 100 71
M_B_A13 A12/BC# DQ12 M_B_DQ9 VDD10 VSS25
119 A13 DQ13 24 105 VDD11 VSS26 72
M_B_A14 80 34 M_B_DQ11 106 127

PC2100 DDR3 SDRAM SO-DIMM


M_B_A15 A14 DQ14 M_B_DQ15 VDD12 VSS27
78 A15 DQ15 36 111 VDD13 VSS28 128

PC2100 DDR3 SDRAM SO-DIMM


39 M_B_DQ20 112 133
DQ16 M_B_DQ21 VDD14 VSS29
[4] M_B_BS#0 109 BA0 DQ17 41 117 VDD15 VSS30 134
108 51 M_B_DQ18 118 138
[4] M_B_BS#1 BA1 DQ18 VDD16 VSS31
79 53 M_B_DQ22 123 139
[4] M_B_BS#2 BA2 DQ19 VDD17 VSS32
114 40 M_B_DQ17 124 144
[4] M_B_CS#0 S0# DQ20 VDD18 VSS33
121 42 M_B_DQ16 145
[4] M_B_CS#1 S1# DQ21 VSS34
101 50 M_B_DQ19 +3V 199 150
[4] M_B_CLKP0 CK0 DQ22 VDDSPD VSS35
103 52 M_B_DQ23 151
[4] M_B_CLKN0 CK0# DQ23 VSS36
102 57 M_B_DQ25 77 155
[4] M_B_CLKP1 CK1 DQ24 NC1 VSS37
104 59 M_B_DQ30 122 156
[4] M_B_CLKN1 CK1# DQ25 NC2 VSS38
73 67 M_B_DQ27 125 161
[4] M_B_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 M_B_DQ26 R51 10K/J_4 162
[4] M_B_CKE1 CKE1 DQ27 +3V VSS40
115 56 M_B_DQ28 [14] PM_EXTTS#0 198 167
[4] M_B_CAS# CAS# DQ28 EVENT# VSS41
110 58 M_B_DQ24 [4,14] DDR3_DRAMRST# 30 168
[4] M_B_RAS# RAS# DQ29 RESET# VSS42
113 68 M_B_DQ31 172
[4] M_B_W E# WE# DQ30 VSS43
R54 10K/J_4 DIMM1_SA0 197 70 M_B_DQ29 173
R50 10K/J_4 DIMM1_SA1 SA0 DQ31 M_B_DQ37 SMDDR_VREF_DQ1_M1 R151 0/J_6 +SMDDR_VREF_DQ1 VSS44
+3V 201 SA1 DQ32 129 1 VREF_DQ VSS45 178
[9,14] SMB_RUN_CLK 202 131 M_B_DQ36 +SMDDR_VREF_DIMM 126 179
SCL DQ33 M_B_DQ34 SMDDR_VREF_DQ1_M3 R150 *0/J_6 VREF_CA VSS46
[9,14] SMB_RUN_DAT 200 SDA DQ34 141 [6] SMDDR_VREF_DQ1_M3 VSS47 184
143 M_B_DQ35 185
DQ35 M_B_DQ33 VSS48
[4] M_B_ODT0 116 ODT0 DQ36 130 2 VSS1 VSS49 189
[4] M_B_ODT1 120 132 M_B_DQ32 3 190
ODT1 DQ37 M_B_DQ39 VSS2 VSS50
140 8 195

(204P)
DQ38 M_B_DQ38 VSS3 VSS51
11 DM0 DQ39 142 9 VSS4 VSS52 196
28 147 M_B_DQ40 13
C DM1 DQ40 M_B_DQ47 VSS5 C
46 149 14
02/23 Remove 0ohm to GND 63
DM2 (204P) DQ41
157 M_B_DQ43 19
VSS6
DM3 DQ42 M_B_DQ42 VSS7
136 DM4 DQ43 159 20 VSS8
153 146 M_B_DQ45 25
DM5 DQ44 M_B_DQ41 VSS9
170 DM6 DQ45 148 26 VSS10 VTT1 203 +0.75V_DDR_VTT
187 158 M_B_DQ44 31 204
DM7 DQ46 M_B_DQ46 VSS11 VTT2
[4] M_B_DQSP[7:0] 160 32
M_B_DQSP0 DQ47 M_B_DQ51 VSS12
12 163 37 205
M_B_DQSP1 DQS0 DQ48 M_B_DQ53 VSS13 GND
29 165 38 206
M_B_DQSP2 DQS1 DQ49 M_B_DQ54 VSS14 GND
47 175 43
M_B_DQSP3 DQS2 DQ50 M_B_DQ55 VSS15
64 177
M_B_DQSP4 DQS3 DQ51 M_B_DQ48
137 164
M_B_DQSP5 DQS4 DQ52 M_B_DQ50 DDR3 SODIMM(204P,H4.0,RVS)
154 166
M_B_DQSP6 DQS5 DQ53 M_B_DQ52
171 174
M_B_DQSP7 DQS6 DQ54 M_B_DQ49
[4] M_B_DQSN[7:0] 188 176
M_B_DQSN0 DQS7 DQ55 M_B_DQ63
10 181
M_B_DQSN1 DQS#0 DQ56 M_B_DQ57
27 183
M_B_DQSN2 DQS#1 DQ57 M_B_DQ61
45 191
M_B_DQSN3 DQS#2 DQ58 M_B_DQ62
62 193
M_B_DQSN4 DQS#3 DQ59 M_B_DQ60
135 180
M_B_DQSN5 DQS#4 DQ60 M_B_DQ56
152 182
M_B_DQSN6 DQS#5 DQ61 M_B_DQ58
169 192
M_B_DQSN7 DQS#6 DQ62 M_B_DQ59
186 194
DQS#7 DQ63

DDR3 SODIMM(204P,H4.0,RVS)

Place these Caps near So-Dimm1.


B +1.5V_SUS B

C141 C102 C95 C121 C116 C106 C90 C105 C87 C98 C86 C77 C138
10u/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 10U/6.3V_8

+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
+3V +0.75V_DDR_VTT

C74 C75 C240 C230


C48 C49 C33 C34 C41 C40 C32 C35 0.1u/10V_4 2.2U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6
2.2U/6.3V_6 0.1u/10V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 *10U/6.3V_6

VREF DQ1 M1 Solution STD 4H STD 8H


+1.5V_SUS

A FOX DGMK4000090 DGMK4000122 A

R155
1K/F_4 LTK DGMK4000005 DGMK4000087

[5,14,36] SMDDR_VREF R148 *0/J_6 SMDDR_VREF_DQ1_M1 SUY DGMK4000181 DGMK4000182


PROJECT KL5A
R146 SKT DGMK0000120 DGMK4000139
1K/F_4 C228 Quanta Computer Inc.
0.1u/10V_4
Standard 8H type:DDR-C-2013310-204p-1 Size Document Number Rev
Custom 1A
DDRIII SO-DIMM-0
Date: Friday, October 29, 2010 Sheet 13 of 45
5 4 3 2 1
5 4 3 2 1

DDR_RVS(DDR)
[4] M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
JDIM1A

A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ[63:0] [4]

2.48A
+1.5V_SUS

75
76
JDIM1B

VDD1
VDD2
VSS16
VSS17
44
48
14
95 17 81 49
M_A_A4 A3 DQ3 M_A_DQ0 VDD3 VSS18
92 4 82 54
M_A_A5 A4 DQ4 M_A_DQ1 VDD4 VSS19
91 6 87 55
M_A_A6 A5 DQ5 M_A_DQ3 VDD5 VSS20
90 16 88 60
M_A_A7 A6 DQ6 M_A_DQ2 VDD6 VSS21
86 18 93 61
M_A_A8 A7 DQ7 M_A_DQ13 VDD7 VSS22
89 21 94 65
M_A_A9 A8 DQ8 M_A_DQ9 VDD8 VSS23
85 23 99 66
M_A_A10 A9 DQ9 M_A_DQ15 VDD9 VSS24
107 33 100 71
M_A_A11 A10/AP DQ10 M_A_DQ14 VDD10 VSS25
84 35 105 72
M_A_A12 A11 DQ11 M_A_DQ12 VDD11 VSS26
D 83 22 106 127 D

PC2100 DDR3 SDRAM SO-DIMM


M_A_A13 A12/BC# DQ12 M_A_DQ8 VDD12 VSS27
119 24 111 128
M_A_A14 A13 DQ13 M_A_DQ10 VDD13 VSS28
80 34 112 133
M_A_A15 A14 DQ14 M_A_DQ11 VDD14 VSS29
78 36 117 134
A15 DQ15 VDD15 VSS30

PC2100 DDR3 SDRAM SO-DIMM


39 M_A_DQ22 118 138
DQ16 M_A_DQ19 VDD16 VSS31
[4] M_A_BS#0 109 41 123 139
BA0 DQ17 M_A_DQ16 VDD17 VSS32
[4] M_A_BS#1 108 51 124 144
BA1 DQ18 M_A_DQ21 VDD18 VSS33
[4] M_A_BS#2 79 53 145
BA2 DQ19 M_A_DQ18 VSS34
[4] M_A_CS#0 114 40 +3V 199 150
S0# DQ20 M_A_DQ23 VDDSPD VSS35
[4] M_A_CS#1 121 42 151
S1# DQ21 M_A_DQ17 VSS36
[4] M_A_CLKP0 101 50 77 155
CK0 DQ22 M_A_DQ20 NC1 VSS37
[4] M_A_CLKN0 103 52 122 156
CK0# DQ23 M_A_DQ31 R49 10K/J_4 NC2 VSS38
[4] M_A_CLKP1 102 CK1 DQ24 57 +3V 125 NCTEST VSS39 161
104 59 M_A_DQ27 162
[4] M_A_CLKN1 CK1# DQ25 VSS40
73 67 M_A_DQ30 [13] PM_EXTTS#0 PM_EXTTS#0 198 167
[4] M_A_CKE0 CKE0 DQ26 EVENT# VSS41
74 69 M_A_DQ29 [4,13] DDR3_DRAMRST# 30 168
[4] M_A_CKE1 CKE1 DQ27 RESET# VSS42
115 56 M_A_DQ24 172
[4] M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ26 173
[4] M_A_RAS# RAS# DQ29 VSS44
113 68 M_A_DQ25 SMDDR_VREF_DQ0_M1 R152 0/J_6 +SMDDR_VREF_DQ0 1 178
[4] M_A_WE# WE# DQ30 VREF_DQ VSS45
R55 10K/J_4 DIMM0_SA0 197 70 M_A_DQ28 +SMDDR_VREF_DIMM 126 179
R52 10K/J_4 DIMM0_SA1 SA0 DQ31 M_A_DQ37 SMDDR_VREF_DQ0_M3 R162 *0/J_6 VREF_CA VSS46
201 SA1 DQ32 129 [6] SMDDR_VREF_DQ0_M3 VSS47 184
[9,13] SMB_RUN_CLK 202 131 M_A_DQ33 185
SCL DQ33 M_A_DQ38 VSS48
[9,13] SMB_RUN_DAT 200 SDA DQ34 141 2 VSS1 VSS49 189
143 M_A_DQ34 3 190
DQ35 M_A_DQ32 VSS2 VSS50
[4] M_A_ODT0 116 130 8 195

(204P)
ODT0 DQ36 M_A_DQ36 VSS3 VSS51
[4] M_A_ODT1 120 ODT1 DQ37 132 9 VSS4 VSS52 196
140 M_A_DQ35 13
DQ38 M_A_DQ39 VSS5
11 DM0 DQ39 142 14 VSS6
28 147 M_A_DQ44 19
02/23 Remove 0ohm to GND 46
DM1 DQ40
149 M_A_DQ47 20
VSS7
63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ46 25
VSS8
VSS9
136 159 M_A_DQ45 26 203 +0.75V_DDR_VTT
DM4 DQ43 M_A_DQ41 VSS10 VTT1
153 DM5 DQ44 146 31 VSS11 VTT2 204
170 148 M_A_DQ40 32
DM6 DQ45 M_A_DQ42 VSS12
C
187 DM7 DQ46 158 37 VSS13 GND 205 C
160 M_A_DQ43 38 206
[4] M_A_DQSP[7:0] DQ47 VSS14 GND
M_A_DQSP0 12 163 M_A_DQ54 43
M_A_DQSP1 DQS0 DQ48 M_A_DQ55 VSS15
29 DQS1 DQ49 165
M_A_DQSP2 47 175 M_A_DQ51
M_A_DQSP3 DQS2 DQ50 M_A_DQ50 DDR3 SODIMM(204P,H8.0,RVS)
64 DQS3 DQ51 177
M_A_DQSP4 137 164 M_A_DQ48
M_A_DQSP5 DQS4 DQ52 M_A_DQ49
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ53
M_A_DQSP7 DQS6 DQ54 M_A_DQ52
[4] M_A_DQSN[7:0] 188 176
M_A_DQSN0 DQS7 DQ55 M_A_DQ61
10 181
M_A_DQSN1 DQS#0 DQ56 M_A_DQ58
27 183
M_A_DQSN2 DQS#1 DQ57 M_A_DQ57
45 191
M_A_DQSN3 DQS#2 DQ58 M_A_DQ63
62 193
M_A_DQSN4 DQS#3 DQ59 M_A_DQ56
135 180
M_A_DQSN5 DQS#4 DQ60 M_A_DQ60
152 182
M_A_DQSN6 DQS#5 DQ61 M_A_DQ59
169 192
M_A_DQSN7 DQS#6 DQ62 M_A_DQ62
186 194
DQS#7 DQ63

DDR3 SODIMM(204P,H8.0,RVS)

VREF DQ0 M1 Solution +1.5V_SUS Place these Caps near So-Dimm0.


+1.5V_SUS

R147
1K/F_4

+
B SMDDR_VREF R141 *0/J_6 SMDDR_VREF_DQ0_M1 C76 C85 C97 C88 C99 C91 C139 C80 C100 C113 C94 C89 C176 C79 B
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 *10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 *330U/2V_7343 10U/6.3V_8 10U/6.3V_8

R156 C244
1K/F_4
0.1u/10V_4

+0.75V_DDR_VTT +3V +SMDDR_VREF_DIMM +SMDDR_VREF_DQ0

+1.5V_SUS
C239 C234
C46 C47 C31 C30 C43 C39 C42 C44 C72 C71
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 *10U/6.3V_6 2.2U/6.3V_6 0.1u/10V_4 0.1u/10V_4 2.2U/6.3V_6 0.1u/10V_4 2.2U/6.3V_6
R142
10K/J_4

[5,13,36] SMDDR_VREF R130 *0/J_6 +SMDDR_VREF_DIMM

R137 C224
10K/J_4 470P/50V_4

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDRIII SO-DIMM-1
Date: Friday, October 29, 2010 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1

EC-C-00

15
U28A

N12M
R576 EV@10K/F_4 +3V_GPU power up sequence
3.55A AC9
1/13 PCI_EXPRESS
AE9
+1.05V_GFX_PCIE PEX_IOVDD_01 (NC) PEX_CLKREQ PEX_CLKREQ# [9]
C188 EV@0.1U/10V/X7R_4 AD7 PEX_IOVDD_02 PEX_RST* AD9 GPU_RST# GPU_RST# [9]
C200 EV@0.1U/10V/X7R_4 AD8
C205 EV@1U/6.3V/X5R_4 PEX_IOVDD_03
AE7 PEX_IOVDD_04
C201 EV@1U/6.3V/X5R_4 AF7 AB10
PEX_IOVDD_05 PEX_REFCLK CLK_PCIE_VGAP [9]
C181 EV@4.7U/6.3V/X5R_6 AG7 AC10 R578
PEX_IOVDD_06 PEX_REFCLK* CLK_PCIE_VGAN [9]
C190 EV@10U/6.3V/X5R_8 *EV@10K/F_4
C242 EV@22U/6.3V_8 AD10 C_PEG_RX0 C146 EV@0.1U/10V/X5R_4 PEG_RXP15
PEX_TX0 PEG_RXP15 [3]
AB13 AD11 C_PEG_RX#0 C145 EV@0.1U/10V/X5R_4 PEG_RXN15
D PEX_IOVDDQ_01 PEX_TX0* PEG_RXN15 [3] D
PLACE NEAR BALLS AB16 AD12 C_PEG_RX1 C161 EV@0.1U/10V/X5R_4 PEG_RXP14 For PCIE clock request signal 07/05
PEX_IOVDDQ_02 PEX_TX1 PEG_RXP14 [3]
+1.05V_GFX_PCIE AB17 AC12 C_PEG_RX#1 C160 EV@0.1U/10V/X5R_4 PEG_RXN14
PEX_IOVDDQ_03 PEX_TX1* PEG_RXN14 [3]
C195 EV@0.1U/10V/X7R_4 AB7 AB11 C_PEG_RX2 C168 EV@0.1U/10V/X5R_4 PEG_RXP13
PEX_IOVDDQ_04 PEX_TX2 PEG_RXP13 [3]
C199 EV@0.1U/10V/X7R_4 AB8 AB12 C_PEG_RX#2 C165 EV@0.1U/10V/X5R_4 PEG_RXN13
PEX_IOVDDQ_05 PEX_TX2* PEG_RXN13 [3]
C203 EV@1U/6.3V/X5R_4 AB9 AD13 C_PEG_RX3 C159 EV@0.1U/10V/X5R_4 PEG_RXP12
PEX_IOVDDQ_06 PEX_TX3 PEG_RXP12 [3]
C208 EV@1U/6.3V/X5R_4 AC13 AD14 C_PEG_RX#3 C158 EV@0.1U/10V/X5R_4 PEG_RXN12
PEX_IOVDDQ_07 PEX_TX3* PEG_RXN12 [3] +3V_GPU
C194 EV@4.7U/6.3V/X5R_6 AC7 AD15 C_PEG_RX4 C122 EV@0.1U/10V/X5R_4 PEG_RXP11
PEX_IOVDDQ_08 PEX_TX4 PEG_RXP11 [3]
C183 EV@10U/6.3V/X5R_8 AD6 AC15 C_PEG_RX#4 C123 EV@0.1U/10V/X5R_4 PEG_RXN11
PEX_IOVDDQ_09 PEX_TX4* PEG_RXN11 [3]
C243 EV@22U/6.3V_8 AE6 AB14 C_PEG_RX5 C136 EV@0.1U/10V/X5R_4 PEG_RXP10
PEX_IOVDDQ_10 PEX_TX5 PEG_RXP10 [3] +3V
AF6 AB15 C_PEG_RX#5 C135 EV@0.1U/10V/X5R_4 PEG_RXN10
PEX_IOVDDQ_11 PEX_TX5* PEG_RXN10 [3]
PLACE UNDER BALLS AG6 AC16 C_PEG_RX6 C134 EV@0.1U/10V/X5R_4 PEG_RXP9
PEX_IOVDDQ_12 PEX_TX6 PEG_RXP9 [3]
AD16 C_PEG_RX#6 C133 EV@0.1U/10V/X5R_4 PEG_RXN9
GFX_CORE PEX_TX6* PEG_RXN9 [3]
AD17 C_PEG_RX7 C132 EV@0.1U/10V/X5R_4 PEG_RXP8 R144
PEX_TX7 PEG_RXP8 [3]
AD18 C_PEG_RX#7 C131 EV@0.1U/10V/X5R_4 PEG_RXN8 EV@10K/F_4
PEX_TX7* PEG_RXN8 [3]
AC18 C_PEG_RX8 C155 EV@0.1U/10V/X5R_4 PEG_RXP7 R145
PLACE UNDER BALLS
C663 EV@0.022U/16V/X7R_4
16.82A J10 PEX_TX8
PEX_TX8* AB18
AB19
C_PEG_RX#8
C_PEG_RX9
C154
C157
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
PEG_RXN7
PEG_RXP6
PEG_RXP7
PEG_RXN7
[3]
[3] EV@10K/F_4
VDD_01 PEX_TX9 PEG_RXP6 [3]
C664 EV@0.022U/16V/X7R_4 J12 AB20 C_PEG_RX#9 C156 EV@0.1U/10V/X5R_4 PEG_RXN6 GFXPG [9,10]
VDD_02 PEX_TX9* PEG_RXN6 [3]
C665 EV@0.022U/16V/X7R_4 J13 AD19 C_PEG_RX10 C153 EV@0.1U/10V/X5R_4 PEG_RXP5
VDD_03 PEX_TX10 PEG_RXP5 [3]
C666 EV@0.022U/16V/X7R_4 J9 AD20 C_PEG_RX#10 C152 EV@0.1U/10V/X5R_4 PEG_RXN5
VDD_04 PEX_TX10* PEG_RXN5 [3]

3
C667 EV@0.022U/16V/X7R_4 L9 AD21 C_PEG_RX11 C150 EV@0.1U/10V/X5R_4 PEG_RXP4
VDD_05 PEX_TX11 PEG_RXP4 [3]
M11 AC21 C_PEG_RX#11 C151 EV@0.1U/10V/X5R_4 PEG_RXN4 2 Q17
VDD_06 PEX_TX11* PEG_RXN4 [3]
C668 EV@0.1U/10V/X7R_4 M17 AB21 C_PEG_RX12 C130 EV@0.1U/10V/X5R_4 PEG_RXP3 EV@SST3904T116
VDD_07 PEX_TX12 PEG_RXP3 [3]
C669 EV@0.1U/10V/X7R_4 M9 AB22 C_PEG_RX#12 C129 EV@0.1U/10V/X5R_4 PEG_RXN3
PEG_RXN3 [3]

1
VDD_08 PEX_TX12*

3
C670 EV@0.1U/10V/X7R_4 N11 AC22 C_PEG_RX13 C128 EV@0.1U/10V/X5R_4 PEG_RXP2
VDD_09 PEX_TX13 PEG_RXP2 [3]
C671 EV@0.1U/10V/X7R_4 N12 AD22 C_PEG_RX#13 C127 EV@0.1U/10V/X5R_4 PEG_RXN2
VDD_10 PEX_TX13* PEG_RXN2 [3]
C672 EV@0.1U/10V/X7R_4 C_PEG_RX14 C149 EV@0.1U/10V/X5R_4 PEG_RXP1 R176 EV@10K/F_4 R171
N13
N14
VDD_11 PEX_TX14 AD23
AD24 C_PEG_RX#14 C148 EV@0.1U/10V/X5R_4 PEG_RXN1
PEG_RXP1 [3] +1.8V_GPU 2
*EV@0_4
DGPU_PWR_EN# = GFXON >> +1.05_GFX_PCIE
VDD_12 PEX_TX14* PEG_RXN1 [3]
C673
C674
EV@1U/16V/X7R_6
EV@1U/16V/X7R_6
N15 VDD_13 PEX_TX15 AE25 C_PEG_RX15
C_PEG_RX#15
C126
C125
EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4
PEG_RXP0
PEG_RXN0
PEG_RXP0 [3]
*EV@1000P/50V/X7R_4@NC C252
Q18
>> +3V_GPU_EN >> +3V_GPU
C N16 AE26 PEG_RXN0 [3] C

1
VDD_14 PEX_TX15*
C675 EV@1U/16V/X7R_6 N17 VDD_15
EV@PDTC143TT >> NVVDD =NVVDD_PG
N19
N9
VDD_16
VDD_17
>> +1.5_GPU >> +1.8V_GPU
C676 EV@22U/6.3V_8 P11 VDD_18

3
C677 EV@22U/6.3V_8 P12 VDD_19
P13 VDD_20
PLACE NEAR BALLS P14 +1.5V_GPU R194 EV@10K/F_4 2 Q20
VDD_21 EV@PDTC143TT
P15 VDD_22
P16 AE12 PEG_TXP15 *EV@1000P/50V/X7R_4@NC C259
P17
VDD_23 PEX_RX0
AF12 PEG_TXN15
PEG_TXP15 [3]
PEG_TXN15 [3]
NVVDD Maximum Settling Time

1
VDD_24 PEX_RX0* PEG_TXP14
R11 VDD_25 PEX_RX1 AG12 PEG_TXP14 [3]
R12 AG13 PEG_TXN14
VDD_26 PEX_RX1* PEG_TXN14 [3]
R13 AF13 PEG_TXP13
VDD_27 PEX_RX2 PEG_TXP13 [3]
R14 AE13 PEG_TXN13
VDD_28 PEX_RX2* PEG_TXN13 [3]
R15 AE15 PEG_TXP12
VDD_29 PEX_RX3 PEG_TXP12 [3]
R16 AF15 PEG_TXN12
VDD_30 PEX_RX3* PEG_TXN12 [3]
R17 AG15 PEG_TXP11 NVVDD
VDD_31 PEX_RX4 PEG_TXP11 [3]
R9 AG16 PEG_TXN11
VDD_32 PEX_RX4* PEG_TXN11 [3]
T11 AF16 PEG_TXP10
VDD_33 PEX_RX5 PEG_TXP10 [3]
T17 AE16 PEG_TXN10
VDD_34 PEX_RX5* PEG_TXN10 [3]
T9 AE18 PEG_TXP9
VDD_35 PEX_RX6 PEG_TXP9 [3]
U19 AF18 PEG_TXN9
U9
VDD_36
VDD_37
PEX_RX6*
PEX_RX7 AG18 PEG_TXP8
PEG_TXN9 [3]
PEG_TXP8 [3]
For power-down sequency
W10 AG19 PEG_TXN8
VDD_38 PEX_RX7* PEG_TXN8 [3]
W12 AF19 PEG_TXP7
VDD_39 PEX_RX8 PEG_TXP7 [3]
W13 AE19 PEG_TXN7
PEG_TXN7 [3] +3V_GPU +1.5V_GPU +3V_GPU GFX_CORE
VDD_40 PEX_RX8* PEG_TXP6
W18 VDD_41 PEX_RX9 AE21 PEG_TXP6 [3]
W19 AF21 PEG_TXN6
VDD_42 PEX_RX9* PEG_TXN6 [3]
W9 AG21 PEG_TXP5 D11 D10 GPIO
B VDD_43 PEX_RX10 PEG_TXP5 [3] B
AG22 PEG_TXN5
PEX_RX10* PEG_TXN5 [3]
TP16 GPU_VDD_SENSE W15 AF22 PEG_TXP4
VDD_SENSE PEX_RX11 PEG_TXP4 [3]
W16 AE22 PEG_TXN4 EV@RB500V-40 EV@RB500V-40
GND_SENSE PEX_RX11* PEG_TXN4 [3]
E15 AE24 PEG_TXP3
VDD_SENSE (NC) PEX_RX12 PEG_TXP3 [3]
E14 AF24 PEG_TXN3
GND_SENSE (GND) PEX_RX12* PEG_TXN3 [3]
AG24 PEG_TXP2 tsNVVDD<= 192us
+3V_GPU 80mA
C253
EV@4.7U/6.3V/X5R_6
A12
B12
VDD33_01
PEX_RX13
PEX_RX13* AF25
AG25
PEG_TXN2
PEG_TXP1
PEG_TXP2 [3]
PEG_TXN2 [3]
+1.05V_GFX_PCIE VDD33_02 PEX_RX14 PEG_TXP1 [3]
C241 EV@1U/6.3V/X5R_4 C12 AG26 PEG_TXN1
VDD33_03 PEX_RX14* PEG_TXN1 [3]
C249 EV@0.1U/10V/X7R_4 D12 AF27 PEG_TXP0
VDD33_04 PEX_RX15 PEG_TXP0 [3]
C174 EV@0.1U/10V/X7R_4 E12 AE27 PEG_TXN0
VDD33_05 PEX_RX15* PEG_TXN0 [3]
L7 C261 EV@0.1U/10V/X7R_4 F12
EV@BLM18PG121SN(120,2000MA)_6 VDD33_06
PLACE UNDER BALLS +3V
C678 EV@0.1U/10V/X7R_4 110mA +PEX_PLLVDD AF9 PEX_RST timing
PEX_PLLVDD +1.05V_GFX_PCIE +3V
C679 EV@1U/16V/X7R_6 12~16R572mils *EV@200_4

R318
C680 EV@4.7U/6.3V/X5R_8 AE10 R334
PLACE NEAR BALLS PEX_TSTCLK_OUT* *EV@100K/F_4
AF10 PEX_TSTCLK_OUT I/O 3.3V
+1.05V_GFX_PCIE AG9 R332
PEG_SVDD (NC) *EV@8.2K_4 +3V_GPU_EN
+3V_GPU_EN [41]
PEX_TERMP AG10 VGA_RST#
PEX_TERMP

3
*EV@330_4
C198 EV@0.1U/10V/X7R_4
C197 EV@4.7U/6.3V/X5R_6
C202 EV@1U/6.3V/X5R_4 R571 EV@U_GPU_GB1_64
EV@2.49K/F_4 2
Trise >= 100mS Tfail <=0nS

3
A 2 Q32 *EV@ME2N7002E A
Q33

1
PEG_TXP[0..15] *EV@MMBT3904
PEG_TXP[0..15] [3]

1
R340 EV@0/J_4
PEG_TXN[0..15] [9,36,39] GFXON
PEG_TXN[0..15] [3]
PEG_RXN[0..15] C326
PEG_RXN[0..15] [3]
*EV@1U/6.3V_4 PROJECT KL5A
PEG_RXP[0..15]
PEG_RXP[0..15] [3]
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N12M(PCIE I/F) 1/5
Date: Friday, October 29, 2010 Sheet 15 of 45
5 4 3 2 1
5 4 3 2 1

U28B

16
EC-C-00
2.63A +1.5V_GPU N12M
C235 EV@0.01U/16V/X7R_4 A13 2/13 FRAME_BUFFER
C237 EV@0.01U/16V/X7R_4 FBVDDQ_01 VMA_DQ0
B13 FBVDDQ_02 (FBA_D8) FBA_D0 D22 U28I
C248 EV@0.01U/16V/X7R_4 C13 E24 VMA_DQ1 N12M
FBVDDQ_03 (FBA_D10) FBA_D1 VMA_DQ2
D13 E22 13/13 GND_NC
C227 EV@0.047U/10V/X7R_4 FBVDDQ_04 (FBA_D9) FBA_D2 VMA_DQ3
D14 FBVDDQ_05 (FBA_D11) FBA_D3 D24 NC_01 C15
C245 EV@0.047U/10V/X7R_4 E13 D26 VMA_DQ4 AC11 D15
C229 EV@0.047U/10V/X7R_4 FBVDDQ_06 (FBA_D12) FBA_D4 VMA_DQ5 GND_01 NC_02 R649 EV@10K/F_4
F13 FBVDDQ_07 (FBA_D13) FBA_D5 D27 [19] VMA_DQ[63..0] AC14 GND_02 PGOOD J5
F14 C27 VMA_DQ6 AC17
C232 EV@4.7U/6.3V/X5R_6 FBVDDQ_08 (FBA_D14) FBA_D6 VMA_DQ7 GND_03
F15 FBVDDQ_09 (FBA_D15) FBA_D7 B27 [19] VMA_DM[7..0] AC2 GND_04
F16 A21 VMA_DQ8 AC20
FBVDDQ_10 (FBA_D31) FBA_D8 VMA_DQ9 GND_05
D F17 FBVDDQ_11 (FBA_D30) FBA_D9 B21 [19] VMA_WDQS[7..0] AC23 GND_06 D
F19 C21 VMA_DQ10 AC26
FBVDDQ_12 (FBA_D29) FBA_D10 VMA_DQ11 GND_07
F22 FBVDDQ_13 (FBA_D28) FBA_D11 C19 [19] VMA_RDQS[7..0] AC5 GND_08
H23 C18 VMA_DQ12 AC8
FBVDDQ_14 (FBA_D26) FBA_D14 VMA_DQ13 GND_09
H26 FBVDDQ_15 (FBA_D27) FBA_D14 D18 AF11 GND_10
J15 B18 VMA_DQ14 AF14
FBVDDQ_16 (FBA_D25) FBA_D14 VMA_DQ15 GND_11
J16 FBVDDQ_17 (FBA_D24) FBA_D15 C16 AF17 GND_12
J18 E21 VMA_DQ16 AF2
FBVDDQ_18 (FBA_D22) FBA_D16 VMA_DQ17 GND_13
J19 FBVDDQ_19 (FBA_D23) FBA_D17 F21 AF20 GND_14
L19 D20 VMA_DQ18 AF23
FBVDDQ_20 (FBA_D20) FBA_D18 VMA_DQ19 GND_15
L23 FBVDDQ_21 (FBA_D21) FBA_D19 F20 AF26 GND_16
L26 D17 VMA_DQ20 AF5
FBVDDQ_22 (FBA_D18) FBA_D20 VMA_DQ21 GND_17
M19 FBVDDQ_23 (FBA_D19) FBA_D21 F18 AF8 GND_18
N22 D16 VMA_DQ22 B11
FBVDDQ_24 (FBA_D16) FBA_D22 VMA_DQ23 FBA_CMD0 R139 EV@10K/F_4 GND_19
U22 FBVDDQ_25 (FBA_D17) FBA_D23 E16 B14 GND_20
Y22 A22 VMA_DQ24
FBVDDQ_26 (FBA_D3) FBA_D24 VMA_DQ25 FBA_CMD3 R568 EV@10K/F_4
(FBA_D4) FBA_D25 C24 B17 GND_21
D21 VMA_DQ26 B2
(FBA_D0) FBA_D26 VMA_DQ27 FBA_CMD16 R158 EV@10K/F_4 GND_22
(FBA_D2) FBA_D27 B22 B20 GND_23
[19] FBA_CMD0 G24 C22 VMA_DQ28 B23
FBA_CMD0 (FBA_D1) FBA_D28 VMA_DQ29 FBA_CMD19 R161 EV@10K/F_4 GND_24
FBA_CMD1 F27 FBA_CMD1 (FBA_D6) FBA_D29 A25 B26 GND_25
[19] FBA_CMD2 F25 B25 VMA_DQ30 B5
FBA_CMD2 (FBA_D5) FBA_D30 VMA_DQ31 FBA_CMD20 R135 EV@10K/F_4 GND_26
[19] FBA_CMD3 F26 FBA_CMD3 (FBA_D7) FBA_D31 A26 B8 GND_27
[19] FBA_CMD4 G26 U24 VMA_DQ32 E11
FBA_CMD4 (FBA_D37) FBA_D32 VMA_DQ33 GND_28
[19] FBA_CMD5 G27 FBA_CMD5 (FBA_D39) FBA_D33 V24
[19] FBA_CMD6 G25 V23 VMA_DQ34 E17
FBA_CMD6 (FBA_D38) FBA_D35 VMA_DQ35 GND_30
[19] FBA_CMD7 J25 FBA_CMD7 (FBA_D35) FBA_D35 R24 E2 GND_31
[19] FBA_CMD8 J24 T23 VMA_DQ36 E20
FBA_CMD8 (FBA_D36) FBA_D36 VMA_DQ37 GND_32
[19] FBA_CMD9 H24 FBA_CMD9 (FBA_D34) FBA_D37 R23 E23 GND_33
C [19] FBA_CMD10 H22 P24 VMA_DQ38 E26 C
FBA_CMD10 (FBA_D33) FBA_D38 VMA_DQ39 GND_34
[19] FBA_CMD11 J26 FBA_CMD11 (FBA_D32) FBA_D39 P22 E5 GND_35
[19] FBA_CMD12 G22 AC24 VMA_DQ40 E8
FBA_CMD12 (FBA_D55) FBA_D40 VMA_DQ41 GND_36
[19] FBA_CMD13 G23 FBA_CMD13 (FBA_D53) FBA_D41 AB23 H2 GND_37
[19] FBA_CMD14 J22 AB24 VMA_DQ42 H5
FBA_CMD14 (FBA_D54) FBA_D42 VMA_DQ43 GND_38
[19] FBA_CMD15 J27 FBA_CMD15 (FBA_D51) FBA_D43 W24 J11 GND_39
[19] FBA_CMD16 M24 AA22 VMA_DQ44 J14
FBA_CMD16 (FBA_D52) FBA_D44 VMA_DQ45 GND_40
FBA_CMD17 L24 FBA_CMD17 (FBA_D50) FBA_D45 W23
[19] FBA_CMD18 J23 W22 VMA_DQ46 J17
FBA_CMD18 (FBA_D49) FBA_D46 VMA_DQ47 GND_41
[19] FBA_CMD19 K23 V22 K19
FBA_CMD19 (FBA_D48) FBA_D47 VMA_DQ48 GND_42
[19] FBA_CMD20 K22 AA25 K9
FBA_CMD20 (FBA_D59) FBA_D48 VMA_DQ49 GND_43
[19] FBA_CMD21 M23 W27 L11
FBA_CMD21 (FBA_D58) FBA_D49 VMA_DQ50 GND_44
[19] FBA_CMD22 K24 W26 L12
FBA_CMD22 (FBA_D57) FBA_D50 VMA_DQ51 GND_45
[19] FBA_CMD23 M27 W25 L13
FBA_CMD23 (FBA_D56) FBA_D51 VMA_DQ52 GND_46
[19] FBA_CMD24 N27 AB25 L14
FBA_CMD24 (FBA_D60) FBA_D52 VMA_DQ53 GND_47
[19] FBA_CMD25 M26 AB26 L15
FBA_CMD25 (FBA_D61) FBA_D53 VMA_DQ54 GND_48
[19] FBA_CMD26 K26 AD26 L16
FBA_CMD26 (FBA_D62) FBA_D54 VMA_DQ55 GND_49
[19] FBA_CMD27 K27 AD27 L17
FBA_CMD27 (FBA_D63) FBA_D55 VMA_DQ56 GND_50
[19] FBA_CMD28 K25 V25 L2
FBA_CMD28 (FBA_D46) FBA_D56 VMA_DQ57 GND_51
[19] FBA_CMD29 M25 R25 L5
FBA_CMD29 (FBA_D42) FBA_D57 VMA_DQ58 GND_52
[19] FBA_CMD30 L22 V26 M12
FBA_CMD30 (FBA_D45) FBA_D58 VMA_DQ59 GND_53
V27 M13
(FBA_D47) FBA_D59 VMA_DQ60 GND_54
R26 M14
(FBA_D43) FBA_D60 VMA_DQ61 GND_55
T25 M15
(FBA_D44) FBA_D61 VMA_DQ62 GND_56
N25 M16
VMA_CLK0 (FBA_D40) FBA_D62 VMA_DQ63 GND_57
[19] VMA_CLK0 F24 N26 P19
VMA_CLK0# FBA_CLK0 (FBA_D41) FBA_D63 GND_58
[19] VMA_CLK0# F23 P2
VMA_CLK1 FBA_CLK0* GND_59
[19] VMA_CLK1 N24 P23
VMA_CLK1# FBA_CLK1 VMA_DM0 GND_60
[19] VMA_CLK1# N23 C26
FBA_CLK1* (DQM1) FBA_DQM0 VMA_DM1
B B19 P26 B
(DQM3) FBA_DQM1 VMA_DM2 GND_61
D19 P5
(DQM2) FBA_DQM2 VMA_DM3 GND_62
D23 P9
(DQM0) FBA_DQM3 VMA_DM4 GND_63
T24 T12
R164 EV@40.2/F_4 FB_CAL_PD_VDDQ (DQM4) FBA_DQM4 VMA_DM5 GND_64
+1.5V_GPU B15 AA23 T13
FB_CAL_PD_VDDQ (DQM6) FBA_DQM5 VMA_DM6 GND_65
AB27 T14
R175 EV@40.2/F_4 FB_CAL_PU_GND (DQM7) FBA_DQM6 VMA_DM7 GND_66
A15 T26 T15
FB_CAL_PU_GND (DQM5) FBA_DQM7 GND_67
T16
R169 EV@60.4/F_4 FB_CAL_TERM_GND GND_68
B16 U11
FB_CAL_TERM_GND VMA_WDQS0 GND_69
C25 U12
(WP1) FBA_DQS_WP0 VMA_WDQS1 GND_70
A19 U13
R129 *EV@60.4/F_4 FBA_DEBUG (WP3) FBA_DQS_WP1 VMA_WDQS2 GND_71
+1.5V_GPU M22 E19 U14
FBA_DEBUG0 (WP2) FBA_DQS_WP2 VMA_WDQS3 GND_72
10mA (WP0) FBA_DQS_WP3
A24
VMA_WDQS4
U15
GND_73
For debug only (WP4) FBA_DQS_WP4
T22
VMA_WDQS5
U16
GND_74
AA24 U17
(WP6) FBA_DQS_WP5 VMA_WDQS6 GND_75
AA26 U2
+1.05V_GFX_PCIE (WP7) FBA_DQS_WP5 VMA_WDQS7 GND_76
15mils width 25mA (WP5) FBA_DQS_WP7
T27 U23
GND_77
U26
L8 EV@BLM18PG300SN1D(30,1A)_6 +FB_PLLAVDD GND_78
R19 U5
PLACE UNDER BALLS FB_PLLAVDD VMA_RDQS0 GND_79
D25 V19
C681 EV@0.1U/10V/X7R_4 (RN1) FBA_DQS_RN0 VMA_RDQS1 GND_80
T19 A18
FB_DLLAVDD (RN3) FBA_DQS_RN1 VMA_RDQS2
E18 V9
(RN2) FBA_DQS_RN2 VMA_RDQS3 GND_81
AC19 B24 W11
C682 EV@1U/16V/X7R_6 FB_PLLAVDD (NC) (RN0) FBA_DQS_RN3 VMA_RDQS4 GND_82
R22 W14
C683 EV@10U/6.3V/X7R_8 (RN4) FBA_DQS_RN4 VMA_RDQS5 GND_83
Y24 W17
(RN6) FBA_DQS_RN5 VMA_RDQS6 GND_84
AA27 Y2
PLACE NEAR BALLS (RN7) FBA_DQS_RN6 VMA_RDQS7 GND_85
R27 Y23
(RN5) FBA_DQS_RN7 GND_86
Y26
GND_87
Y5
+FB_VREF1 GND_88
A A16 TP76 A
FB_VREF
EV@U_GPU_GB1_64
EV@U_GPU_GB1_64

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N12M(MEMORY I/F & GND) 2/5
Date: Friday, October 29, 2010 Sheet 16 of 45
5 4 3 2 1
5 4 3 2 1

EC-C-00

17
U28F

N12M
U28G
6/13 IFPAB N12M
IFPA_TXD0* V4
V5
IFPA_TXD0 8/13 IFPE
DVI DP
220 mA (1.05V +/- 3% ) IFPA_TXD1* AA4
AA5
+IFPD_PLLVDD N6
M6
IFPD_PLLVDD
IFPA_TXD1 TP31 IFPD_RSET
+IFPAB_PLLVDD AD5 IFPAB_PLLVDD R125
TP19 AB6 IFPAB_RSET A
D IFPA_TXD2* Y4 IFPD_AUX* D4 D
R110 W4 EV@10K_4 D3
IFPA_TXD2 IFPD_AUX
EV@10K_4

IFPA_TXD3* AB5 IFPD_L3* B4


TXC
IFPA_TXD3 AB4 D TXC IFPD_L3 B3

DATA TXD0 IFPD_L2* C4


IFPB_TXD4* V1 TXD0 IFPD_L2 C3
IFPB_TXD4 W1
TXD1 IFPD_L1* D5
+IFPDE_IOVDD H6 TXD1 E4
IFPDE_IOVDD IFPD_L1
IFPB_TXD5* W2
W3 F4
220 mA (1.8V) IFPB_TXD5 R134 TXD2
TXD2
IFPD_L0*
IFPD_L0 F5
B
+IFPAB_IOVDD V3 AA3 EV@10K_4
IFPA_IOVDD IFPB_TXD6*
IFPB_TXD6 AA2
V2 IFPB_IOVDD
R116 EV@U_GPU_GB1_64
EV@10K_4 IFPB_TXD7* AA1
IFPB_TXD7 AB1

IFPA_TXC* AD4
A IFPA_TXC AC4
CLOCK
IFPB_TXC* AB2
C B IFPB_TXC AB3 C

EV@U_GPU_GB1_64 U28D
U28H
N12M
N12M
7/13 IFPC
5/13 DACC
220 mA +IFPC_PLLVDD P6
DVI DP +DACB_VDD W5 DACB_VDD DACB_HSYNC U6
U4
IFPC_PLLVDD DACB_VSYNC
TP22 1 R5 TP23 1 R6
IFPC_RSET R115 DACB_VREF
R120 1 V6
TP21 DACB_RSET
EV@10K_4 G5 EV@10K_4 T5
IFPC_AUX* DACB_RED
G4 T4
IFPC_AUX DACB_GREEN
R4
DACB_BLUE
J4
TXC IFPC_L3* EV@U_GPU_GB1_64
H4
TXC IFPC_L3
C
K4
TXD0 IFPC_L2*
L4
285 mA (1.05V +/- 3% ) TXD0 IFPC_L2
M4
TXD1 IFPC_L1*
+IFPC_IOVDD J6 TXD1 M5
IFPC_IOVDD IFPC_L1
N4
R140 TXD2 IFPC_L0*
P4
TXD2 IFPC_L0
EV@10K_4 U28C
N12M
B
+3V_GPU
120 mA B

EV@U_GPU_GB1_64 3/13 DACA


R579 *EV@0_8 +DACA_VDD AG2 AD2 1 TP15
DACA_VDD DACA_HSYNC
AD1 TP20
DACA_VSYNC
AF1
U28E R577 DACA_VREF
60mA N12M EV@10K_4 AE1
DACA_RSET
L9 EV@BLM18EG221SN1D(220,2A)_6 +NV_PLLVDD U28J AE2 1
+1.05V_GFX_PCIE N12M DACA_RED TP14
8/13 IFPE AE3
PLACE UNDER BALLS 45mA EV@U_GPU_GB1_64 DVI DP DACA_GREEN
AD3 1
TP13
TP18
C684 EV@0.1U/10V/X7R_4 IFPE_PLLVDD DACA_BLUE
12/13 XTAL_PLL D7
C686 EV@0.1U/10V/X7R_4 IFPE_PLLVDD(DACB_VDD)
TP28 F8 G6
C687 EV@0.1U/10V/X7R_4 IFPD_RSET(DACB_RSET) IFPE_AUX* DACA_VREF
K5 F7
C685 EV@0.1U/10V/X7R_4 PLLVDD IFPE_AUX
R157
K6 EV@U_GPU_GB1_64
VID_PLLVDD EV@10K/F_4 DACA_RSET
C688 EV@22U/6.3V_8 45mA L6
SP_PLLVDD

C185 *EV@0.1U/10V/X5R_4

R100
PLACE NEAR BALLS E7
R165 EV@10K/F_4 TXC IFPE_L3*
E IFPE_L3
E6
TXC

*EV@124/F_4
CLK_27M_VGA R166 *EV@0_4 XTAL_SSIN D11 B7
XTAL_SSIN TXD0 IFPE_L2*
E9 BXTALOUT B6
XTAL_OUTBUFF TXD0 IFPE_L2
D10 E10 XTALOUT A7
XTAL_IN XTAL_OUT TXD1 IFPE_L1*
A6
R172 TXD1 IFPE_L1
EV@10K/F_4 C6
TXD2 IFPE_L0*
A D6 A
Y2 EV@27MHZ 30ppm TXD2 IFPE_L0
2 1

C254 C255 EV@U_GPU_GB1_64


EV@22P/50V_4 EV@22P/50V_4
PROJECT KL5A
STUFF PDs on XTALSSIN and
XTALOUTBUFF WHEN EXT_SS Quanta Computer Inc.
Install it when not connected to Spread spectrum device
Size Document Number Rev
Custom 1A
N12M(DISPLAY) 3/5
Date: Friday, October 29, 2010 Sheet 17 of 45
5 4 3 2 1
5 4 3 2 1

EC-C-00

N12M

11/13 MISC
U28K

Logical Strap Bit Mapping


nV FAE suggest that the device ID
for N12M-GS-S is 0x1054.-0909

PCI_DEVID[4]/SUBVENDOR +3V_GPU
18
B10 +3V_GPU A14
STRAP0 C7
ROM_CS* Rv PU-VDD PD-GND
STRAP0

*EV@20K/F_4
STRAP1 B9 A10 ROM_SI
STRAP1 ROM_SI

EV@45.3K/F_4

*EV@34.8K/F_4

EV@45.3K/F_4

*EV@10K/F_4
STRAP2 A9 C10 ROM_SO
STRAP2 ROM_SO 5K 1000 0000

*EV@4.99K/F_4

EV@10K/F_4

EV@15K/F_4

R651

R652
C9 ROM_SCLK
ROM_SCLK

R178

R174

R180

R179
For N12M Multi-level Strapping function 10K 1001 0001

R177

R181
D D
A3
R149 EV@40.2K/F_4 STRAP_REF_3V3 F11
GPIO20
A4 15K 1010 0010 STRAP0
STRAP_REF_3V3 GPIO21 ROM_SI STRAP1
R154 EV@40.2K/F_4 STRAP_REF_MIOB F10 20K 1011 0011 ROM_SO STRAP2
STRAP_REF_MIOB ROM_SCLK STRAP3
N12M-GS 25K 1100 0100 STRAP4

EV@34.8K/F_4

*EV@15K/F_4

*EV@15K/F_4
N5 1
BUFRST* TP24 30K 1101 0101

R186

R187

*EV@2K/F_4

EV@34.8K/F_4

*EV@24.9K/F_4

EV@4.99K/F_4
(Ra)

R190

EV@10K/F_4
STRAP3 F9 STRAP3 35K 1110 0110

R173

R189

R188

R653

R654
F6
GND0 45K 1111 0111
AD25 TESTMODE R96 EV@10K/F_4 4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)]
TESTMODE
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)] Default: Hynix VRAM
STRAP4 N2 15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)]
STRAP4
GND1 AC6 30K/F_4: CS33002FB13 [RES CHIP 30K 1/16W +-1%(0402)] 24.9K/F_4: CS32492FB16 [RES CHIP 24.9K 1/16W +-1%(0402)]
34.8K/F_4: CS33482FB22 [RES CHIP 34.8K 1/16W +-1%(0402)] 20K/F_4: CS32002FB29 [RES CHIP 20K 1/16W +-1%(0402)]
45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
EV@U_GPU_GB1_64
Logical Logical Logical Logical
Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
ROM_SO N12M-GS FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE 1001
ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR PCI_DEVID[5] PEX_PLL_EN_TERM 1010

N12M
ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] 0110
U28L
9/13 I2C_GPIO_THERM_JTAG STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
C R1 HDCP_SCL C
I2CA_SCL HDCP_SDA
I2CA_SDA T3 STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0110

I2CB_SCL R2 I2CB_SCL_G R563 EV@2.2K_4 +3V_GPU STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 1111
GFX_THMD- D8 R3 I2CB_SDA_G R560 EV@2.2K_4
TP30 THERMDN I2CB_SDA
STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED 0000
TP34 GFX_THMD+ D9 A2 I2CC_SCL_G R183 EV@2.2K_4 +3V_GPU
THERMDP I2CC_SCL
I2CC_SDA B1 I2CC_SDA_G R182 EV@2.2K_4 STRAP4 RESERVED RESERVED PCIE_MAX_SPEED DP_PLL_VDD33V 0011
TP17 JTAG_TCK AF3 VRAM Configuration Table
JTAG_TMS JTAG_TCK
TP80 AF4 JTAG_TMS
TP81 JTAG_TDI AG4 RAMCFG
TP12
TP79
JTAG_TDO
JTAG_TRST#
AE4
AG3
JTAG_TDI
JTAG_TDO
JTAG_TRST*
(Ra) [3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI

0001
GPIO0 N1 DGPU_PIN_N1 1 TP25 AKD5LZGTW11 0010 DDR3 64Mx16x4, 128bit, 512MB,800MHz Hynix H5TQ1G63DFR-12C PD 15K/F
GPIO1 G1 TP35 AKD5EGGT501 0011 DDR3 64Mx16x4, 128bit, 512MB,800MHz Samsung K4W1G1646G-BC12 PD 20K/F
GPIO2 C1 DPST_PW M_DGPU TP33 0101 Reserved
GPIO3 M2 DISP_ON_DGPU TP27 0110
DGPU_I2CS_SCL T1 M3 TP26 AKD5MGGTW00 0110 DDR3 128Mx16x4, 128bit, 1GB,800MHz Hynix H5TQ2G63BFR-12C PD 34.8K/F
DGPU_I2CS_SDA I2CS_SCL GPIO4 GFX_CORE_CNTRL0
T2 I2CS_SDA GPIO5 K3 GFX_CORE_CNTRL0 [39] AKD5MGGT505 0111 DDR3 128Mx16x4, 128bit, 1GB,800MHz Samsung K4W2G1646C-HC12 PD 45.3K/F
K2 GFX_CORE_CNTRL1
GPIO6 GFX_CORE_CNTRL1 [39]
GPIO7 J2 DGPU_PIN_J2 TP29
R650 EV@40.2K/F_4 T6 MULTI_STRAP_REF2_GND GPIO8 C2 DGPU_GPIO8 R191 EV@0_4 VGA_OVT#
VGA_OVT# [29,32]
W6 RFU1 (I2CE_SDA) GPIO9 M1 ALERT TP32
Y6 RFU2 (I2CE_SCL) GPIO10 D2
AA6 D1
N3
RFU3 (NC)
RFU4 (I2CD_SDA)
GPIO11
GPIO12
GPIO13
J3
J1
GPIO12

JTAG_TMS R573 *EV@10K/F_4


+3V_GPU
GPIO ASSIGNMENTS
For N12M Multi-level Strapping function GPIO14 K1
B GPIO15 F3 B
JTAG_TDI R574 *EV@10K/F_4
GPIO16 G3
G2
GPIO I/O ACTIVE USAGE
GPIO17 VGA_OVT# R192 EV@10K/F_4
GPIO18 F1
GPIO19 F2
ALERT R553 EV@10K/F_4
0 N/A N/A
EV@U_GPU_GB1_64
GFX_CORE_CNTRL0 R167 *EV@10K/F_4
1 IN N/A Hot plug detect for IFP link C
CHIP PCI_DEVID: STRAP2 2 OUT HIGH PANEL BACKLIGHT PWM
GPIO12 R163 EV@10K/F_4
N12M-GS 0x1054 0100 PU 45K/F 3 OUT HIGH PANEL POWER ENABLE
R559 *EV@0_4 GFX_CORE_CNTRL1 R287 *EV@10K/F_4

JTAG_TCK R98 *EV@10K/F_4


4 OUT HIGH PANEL BACKLIGHT ENABLE
DGPU_I2CS_SCL 1 3 MB_CLK1 [9,29,32]
JTAG_TRST# R575 EV@1K/F_4
5 OUT N/A NVVDD VID0
EV@2N7002E
R564 Q45 VRAM Type RAMCFG[0..3] ROM_SI DPST_PW M_DGPU R549 *EV@2K/F_4
6 OUT N/A NVVDD VID1
2

EV@2.2K_4
Hynix 0010 7 OUT N/A NVVDD VID2
PD 15K/F
AKD5LZGTW11 0x0A75 8 I/O LOW OVERT
+3V_GPU
Samsung 9 I/O LOW ALERT
R565
AKD5EGGT501 0x0A70 0011 PD20 K/F HDCP ROM
EV@2.2K_4 +3V_GPU 10 OUT N/A FBVREF SELECT
2

EV@2N7002E
Q48 Hynix 0110 PD 34.8K/F U11
11 OUT N/A SLI SYNC0
DGPU_I2CS_SDA AKD5MGGTW00 0x0A75 C262 *EV@0.1U/10V/X5R_4
1 3 MB_DATA1 [9,29,32] 1 A0 VCC 8 12 IN N/A PWR_LEVEL
Samsung R196 *EV@10K/F_4
A AKD5MGGT505 0x0A70 0111 PD 45.3K/F
2 A1 WP 7 13 OUT N/A THERM_LOAD_STEP_DOWN A
3 A2 SCL 6 HDCP_SCL R193 EV@2.2K_4 +3V_GPU 14 OUT N/A THERM_LOAD_STEP_UP
R566 *EV@0_4
4 5 HDCP_SDA R198 EV@2.2K_4
GND SDA
*AT88SC0808C-SU
GPU Type STRAP0 STRAP1 STRAP3 STRAP4 ROM_SO ROM_SCLK PROJECT KL5A
N12M-GS PU 45.3K/F PD 34.8K/F PD 4.99K/F PD 20K/F PU 10K/F PU 15K/F
DHCP ROM Quanta Computer Inc.
Low: Crypto ROM Size Document Number Rev
HDCP_SCL Custom 1A
Hi: I2C ROM
N12M(GPIO & STRRAPS) 4/5
Date: Friday, October 29, 2010 Sheet 18 of 45

5 4 3 2 1
1 2 3 4 5 6 7 8

EC-C-00

U12
[16] VMA_DQ[63..0]
[16] VMA_DM[7..0]
[16] VMA_WDQS[7..0]
[16] VMA_RDQS[7..0] CHANNEL A: 512MB/1024MB DDR3
U27 U9 U29
19
VREFC_VMA1 M8 E3 VMA_DQ20 VREFC_VMA1 M8 E3 VMA_DQ8 VREFC_VMA3 M8 E3 VMA_DQ45 VREFC_VMA3 M8 E3 VMA_DQ56
VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA1 VREFCA DQL0 VMA_DQ12 VREFD_VMA3 VREFCA DQL0 VMA_DQ41 VREFD_VMA3 VREFCA DQL0 VMA_DQ60
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ23 F2 VMA_DQ9 F2 VMA_DQ43 F2 VMA_DQ58
DQL2 VMA_DQ19 FBA_CMD7 DQL2 VMA_DQ15 FBA_CMD9 DQL2 VMA_DQ40 FBA_CMD9 DQL2 VMA_DQ57
[16] FBA_CMD7 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
P7 H3 VMA_DQ21 FBA_CMD10 P7 H3 VMA_DQ11 FBA_CMD24 P7 H3 VMA_DQ47 FBA_CMD24 P7 H3 VMA_DQ59
[16] FBA_CMD10 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
A P3 H8 VMA_DQ17 FBA_CMD24 P3 H8 VMA_DQ13 FBA_CMD10 P3 H8 VMA_DQ44 FBA_CMD10 P3 H8 VMA_DQ63 A
[16] FBA_CMD24 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
[16] FBA_CMD6 N2 G2 VMA_DQ22 FBA_CMD6 N2 G2 VMA_DQ10 FBA_CMD13 N2 G2 VMA_DQ46 FBA_CMD13 N2 G2 VMA_DQ61
A3 DQL6 VMA_DQ16 FBA_CMD22 A3 DQL6 VMA_DQ14 FBA_CMD26 A3 DQL6 VMA_DQ42 FBA_CMD26 A3 DQL6 VMA_DQ62
[16] FBA_CMD22 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7 P8 A4 DQL7 H7
P2 FBA_CMD26 P2 FBA_CMD22 P2 FBA_CMD22 P2
[16] FBA_CMD26 A5 A5 A5 A5
[16] FBA_CMD5 R8 FBA_CMD5 R8 FBA_CMD21 R8 FBA_CMD21 R8
A6 VMA_DQ6 FBA_CMD21 A6 VMA_DQ28 FBA_CMD5 A6 VMA_DQ37 FBA_CMD5 A6 VMA_DQ51
[16] FBA_CMD21 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7 R2 A7 DQU0 D7
[16] FBA_CMD8 T8 C3 VMA_DQ7 FBA_CMD8 T8 C3 VMA_DQ29 FBA_CMD8 T8 C3 VMA_DQ39 FBA_CMD8 T8 C3 VMA_DQ53
A8 DQU1 VMA_DQ2 FBA_CMD4 A8 DQU1 VMA_DQ26 FBA_CMD23 A8 DQU1 VMA_DQ32 FBA_CMD23 A8 DQU1 VMA_DQ49
[16] FBA_CMD4 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8 R3 A9 DQU2 C8
L7 C2 VMA_DQ4 FBA_CMD25 L7 C2 VMA_DQ25 FBA_CMD28 L7 C2 VMA_DQ36 FBA_CMD28 L7 C2 VMA_DQ54
[16] FBA_CMD25 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ1 FBA_CMD23 R7 A7 VMA_DQ27 FBA_CMD4 R7 A7 VMA_DQ33 FBA_CMD4 R7 A7 VMA_DQ48
[16] FBA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ3 FBA_CMD9 N7 A2 VMA_DQ31 FBA_CMD7 N7 A2 VMA_DQ35 FBA_CMD7 N7 A2 VMA_DQ55
[16] FBA_CMD9 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ0 FBA_CMD12 T3 B8 VMA_DQ24 FBA_CMD14 T3 B8 VMA_DQ34 FBA_CMD14 T3 B8 VMA_DQ50
[16] FBA_CMD12 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ5 FBA_CMD14 T7 A3 VMA_DQ30 FBA_CMD12 T7 A3 VMA_DQ38 FBA_CMD12 T7 A3 VMA_DQ52
[16] FBA_CMD14 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 FBA_CMD30 M7 FBA_CMD27 M7 FBA_CMD27 M7
[16] FBA_CMD30 A15 A15 A15 A15
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD29 M2 B2
[16] FBA_CMD29 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
[16] FBA_CMD13 N8 D9 FBA_CMD13 N8 D9 FBA_CMD6 N8 D9 FBA_CMD6 N8 D9
BA1 VDD#D9 FBA_CMD27 BA1 VDD#D9 FBA_CMD30 BA1 VDD#D9 FBA_CMD30 BA1 VDD#D9
[16] FBA_CMD27 M3 BA2 VDD#G7 G7 M3 BA2 VDD#G7 G7 M3 BA2 VDD#G7 G7 M3 BA2 VDD#G7 G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
J7 N9 VMA_CLK0 J7 N9 [16] VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
[16] VMA_CLK0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLK0# K7 R1 [16] VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[16] VMA_CLK0# CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
K9 R9 FBA_CMD3 K9 R9 FBA_CMD16 K9 R9 FBA_CMD16 K9 R9
[16] FBA_CMD3 CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU [16] FBA_CMD16 CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU

K1 A1 FBA_CMD0 K1 A1 FBA_CMD19 K1 A1 FBA_CMD19 K1 A1


[16] FBA_CMD0 ODT VDDQ#A1 ODT VDDQ#A1 [16] FBA_CMD19 ODT VDDQ#A1 ODT VDDQ#A1
L2 A8 FBA_CMD2 L2 A8 FBA_CMD18 L2 A8 FBA_CMD18 L2 A8
[16] FBA_CMD2 CS VDDQ#A8 CS VDDQ#A8 [16] FBA_CMD18 CS VDDQ#A8 CS VDDQ#A8
B J3 C1 FBA_CMD11 J3 C1 FBA_CMD11 J3 C1 FBA_CMD11 J3 C1 B
[16] FBA_CMD11 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9
[16] FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
[16] FBA_CMD28 L3 D2 FBA_CMD28 L3 D2 FBA_CMD25 L3 D2 FBA_CMD25 L3 D2
WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_WDQS2 F3 H2 VMA_WDQS1 F3 H2 VMA_WDQS5 F3 H2 VMA_WDQS7 F3 H2
VMA_RDQS2 DQSL VDDQ#H2 VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9

VMA_DM2 E7 A9 VMA_DM1 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 DML VSS#A9 VMA_DM3 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 B3 D3 B3 D3 B3 D3 B3
DMU VSS#B3 DMU VSS#B3 DMU VSS#B3 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 VSS#E1 VSS#E1 VSS#E1
G8 G8 G8 G8
VMA_WDQS0 VSS#G8 VMA_WDQS3 VSS#G8 VMA_WDQS4 VSS#G8 VMA_WDQS6 VSS#G8
C7 J2 C7 J2 C7 J2 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS3 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 VSS#M1 VSS#M1 VSS#M1
M9 M9 M9 M9
VSS#M9 VSS#M9 VSS#M9 VSS#M9
P1 P1 P1 P1
VSS#P1 FBA_CMD20 VSS#P1 FBA_CMD20 VSS#P1 FBA_CMD20 VSS#P1
[16] FBA_CMD20 T2 P9 T2 P9 T2 P9 T2 P9
RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMA_ZQ1 VSS#T1 VMA_ZQ2 VSS#T1 VMA_ZQ3 VSS#T1 VMA_ZQ4 VSS#T1
L8 T9 L8 T9 L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% B1 Ohms +-1% B1 Ohms +-1% B1 Ohms +-1% B1
VSSQ#B1 VSSQ#B1 VSSQ#B1 VSSQ#B1
B9 B9 B9 B9
R185 VSSQ#B9 R533 VSSQ#B9 R126 VSSQ#B9 R567 VSSQ#B9
D1 D1 D1 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8
VSSQ#D8 VSSQ#D8 VSSQ#D8 VSSQ#D8
E2 E2 E2 E2
VSSQ#E2 VSSQ#E2 VSSQ#E2 VSSQ#E2
J1 E8 J1 E8 J1 E8 J1 E8
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
C L1 F9 L1 F9 L1 F9 L1 F9 C
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
J9 G1 J9 G1 J9 G1 J9 G1
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
L9 G9 L9 G9 L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

R530 R218 R555 R159


VMA_CLK0 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4 EV@1.33K/F_4
VMA_CLK1
R211
R118
EV@162/F_4 VREFC_VMA1 VREFD_VMA1 EV@162/F_4 VREFC_VMA3 VREFD_VMA3
VMA_CLK0#
VMA_CLK1#
EV@1.33K/F_4
R531

EV@1.33K/F_4
R219

EV@1.33K/F_4
R554

EV@1.33K/F_4
R160
C507 C247
C493 C274 EV@0.1U/10V/X5R_4 EV@0.1U/10V/X5R_4
EV@0.1U/10V/X5R_4 EV@0.1U/10V/X5R_4

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU

D D
C496 EV@1U/6.3V/X5R_4 C499 EV@1U/6.3V/X5R_4 C251 EV@1U/6.3V/X5R_4 C506 EV@1U/6.3V/X5R_4
C211 EV@1U/6.3V/X5R_4 C256 EV@1U/6.3V/X5R_4 C263 EV@1U/6.3V/X5R_4 C497 EV@1U/6.3V/X5R_4
C510 EV@1U/6.3V/X5R_4 C498 EV@1U/6.3V/X5R_4 C513 EV@1U/6.3V/X5R_4 C505 EV@1U/6.3V/X5R_4
C180 EV@1U/6.3V/X5R_4 C206 EV@1U/6.3V/X5R_4 C501 EV@1U/6.3V/X5R_4 C517 EV@1U/6.3V/X5R_4

C179 EV@0.1U/10V/X5R_4 C236 EV@0.1U/10V/X5R_4 C246 EV@0.1U/10V/X5R_4 C494 EV@0.1U/10V/X5R_4 PROJECT KL5A
C286 EV@0.1U/10V/X5R_4 C495 EV@0.1U/10V/X5R_4 C260 EV@0.1U/10V/X5R_4 C257 EV@0.1U/10V/X5R_4
C508 EV@0.1U/10V/X5R_4 C527 EV@0.1U/10V/X5R_4 C531 EV@0.1U/10V/X5R_4 C271 EV@0.1U/10V/X5R_4 Quanta Computer Inc.
C522 EV@0.1U/10V/X5R_4 C272 EV@0.1U/10V/X5R_4 C258 EV@0.1U/10V/X5R_4 C226 EV@0.1U/10V/X5R_4
C250 EV@0.1U/10V/X5R_4 C285 EV@0.1U/10V/X5R_4 C500 EV@0.1U/10V/X5R_4 C273 EV@0.1U/10V/X5R_4 Size Document Number Rev
Custom 1A
N12M (DDR3) 5/5
Date: Friday, October 29, 2010 Sheet 19 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

20

+5V
D +3V D
D31
RB500V-40 CN22
20
HDMI_TX2+ SHELL1
1
D2+
2
HDMI_TX2- D2 Shield
3
R34 R14 HDMI_TX1+ D2-
4
2.2K_4 2.2K_4 D1+
5
R31 R26 HDMI_TX1- D1 Shield
6
2.2K_4 2.2K_4 HDMI_TX0+ D1-
7
D0+
8
Q5 FDV301N HDMI_TX0- D0 Shield
9
HDMI_CLK+ D0-
10
HDMI_SCL_R CK+
1 3 11
HDMI_CLK- CK Shield
12 CK-
13 CE Remote
14

2
HDMI_DDC_CLK NC
+3V 15 DDC CLK
HDMI_DDC_DAT 16 DDC DATA

2
17 GND
+5V 2 1 F1 HDMIC_5V 18
HDMI_SDA_R HP_DET +5V
1 3 19
FUSE1A6V_POLY HP DET
SHELL2 21
Q4 FDV301N CONN_HDMI

HDMI Hot-PLUG to EC and GPU

+3V

C C
R33
10K_4 +3V

HDMI_HPD_R
R37

3
10K_4

3
Q7
2N7002K

1
2 HP_DET

R35

UMA Only / HDMI Q6


2N7002K
20K/J_4

1
C602 0.1U/10V/X5R_4 HDMI_TX2+
[7] INT_HDMI_TXDP2
C598 0.1U/10V/X5R_4 HDMI_TX2-
[7] INT_HDMI_TXDN2
C597 0.1U/10V/X5R_4 HDMI_TX1+
[7] INT_HDMI_TXDP1
C594 0.1U/10V/X5R_4 HDMI_TX1-
[7] INT_HDMI_TXDN1
C590 0.1U/10V/X5R_4 HDMI_TX0+
[7] INT_HDMI_TXDP0
C588 0.1U/10V/X5R_4 HDMI_TX0-
[7] INT_HDMI_TXDN0
C587 0.1U/10V/X5R_4 HDMI_CLK+
[7] INT_HDMI_TXCP HDMI_CLK-
C586 0.1U/10V/X5R_4
[7] INT_HDMI_TXCN

B B

R28 *0_4_short HDMI_SCL_R


[7] INT_HDMI_SCL

R25 *0_4_short HDMI_SDA_R


[7] INT_HDMI_SDA

[7] INT_HDMI_HPD R30 *0_4_short HDMI_HPD_R EMI reserve for HDMI


U38
HDMI_TX2+ 1 10 HDMI_TX2+ HDMI_TX2+
HDMI_TX2- 1 10 HDMI_TX2-
2 2 9 9
3 8 R600
HDMI_TX1+ VCC GND HDMI_TX1+ *100/F_4
4 4 7 7
HDMI_TX1- 5 6 HDMI_TX1- HDMI_TX2-
5 6
*RClamp0514M_AG HDMI_TX1+
U36
HDMI_TX0+ 1 10 HDMI_TX0+ R598
HDMI_TX0- 1 10 HDMI_TX0- *100/F_4
2 2 9 9
3 8 HDMI_TX1-
HDMI_CLK+ VCC GND HDMI_CLK+
4 4 7 7
HDMI_CLK- 5 6 HDMI_CLK- HDMI_TX0+
R7 619/F_4 HDMI_TX2+ 5 6
R9 619/F_4 HDMI_TX2- *RClamp0514M_AG R596
U34 *100/F_4
R13 619/F_4 HDMI_TX1+ HDMI_DDC_DAT 1 10 HDMI_DDC_DAT HDMI_TX0-
R21 619/F_4 HDMI_TX1- HDMI_DDC_CLK 1 10 HDMI_DDC_CLK
2 2 9 9
3 8 HDMI_CLK+
R22 619/F_4 HDMI_TX0+ HDMIC_5V VCC GND HDMIC_5V
4 4 7 7
R27 619/F_4 HDMI_TX0- HP_DET 5 6 HP_DET R595
5 6 *100/F_4
R29 619/F_4 HDMI_CLK+ *RClamp0514M_AG HDMI_CLK-
HDMI_LF R32 619/F_4 HDMI_CLK- For ESD Layout note:Place close to HDMI Conn
3

A Q2 A

+5V 2 2N7002K-T1-E3
1

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
HDMI conn
Date: Friday, October 29, 2010 Sheet 20 of 45
5 4 3 2 1
A B C D E

CRT_VCC 21
D26
RB500V-40 C603

+5V 2 1 CRT_VCC_R 0.1U/10V/X5R_4

4
Layout Note: F2
4
Setting R,G,B trace C601 FUSE1A6V_POLY
impedance to 50 ohm. *VARISTOR_4

L5 BLM18BA470SN1 CRT_R1
[7] INT_CRT_RED

16
L4 BLM18BA470SN1 CRT_G1 CN19
[7] INT_CRT_GRE
CRT_CONN
6
1 11
L3 BLM18BA470SN1 CRT_B1 7
[7] INT_CRT_BLU
2 12

R5 R4 R3 C10 C7 C5 C6 C8 C9
8
3 13
ESD PROTECTION
150/F_4 150/F_4 150/F_4 9
5.6P/50V/COG_4 5.6P/50V/COG_4 5.6P/50V/COG_4 5.6P/50V/COG_4 5.6P/50V/COG_4 5.6P/50V/COG_4 4 14 D5
TP1 10 CRT_R1
5 15
*TVSS5VESPT

17
D4
CRT_G1

*TVSS5VESPT
3 3
+5V
D3
CRT_B1

*TVSS5VESPT
5

2 4 VGAVSYNC_R R1 10_4 CRTVSYNC1 L1 HB-1T1608-121JT CRTVSYNC


[7] INT_CRT_VSYNC
D1
CRTVSYNC
U1
AHCT1G125DCH Place near CRTHSYNC1 L2 HB-1T1608-121JT CRTHSYNC
*TVSS5VESPT
U37,U38 < 200 mil
C4 C1 C3 C2
C11 D2
0.1U/10V/X5R_4 *10P/50V/COG_4 *10P/50V/COG_4 10P/50V/COG_4 10P/50V/COG_4 CRTHSYNC
5

*TVSS5VESPT
2 4 VGAHSYNC_R R2 10_4
[7] INT_CRT_HSYNC
Place near CN5002 connector D28
U2 < 200 mil DDCCLK
AHCT1G125DCH
*TVSS5VESPT
2 2

+3V D27
DDCDAT

*TVSS5VESPT
R603

R601

CRT_VCC
2.2K_4

2.2K_4

R602 R604
4.7K_4 4.7K_4

1 3 DDCCLK
[7] INT_DDCCLK

Q52
2

+3V 2N7002K-T1-E3
2

1 3 DDCDAT
[7] INT_DDCDAT
1 1
Q53 C604 C605
2N7002K-T1-E3
*10P/50V/COG_4 *10P/50V/COG_4

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CRT Conn
Date: Friday, October 29, 2010 Sheet 21 of 45
A B C D E
5 4 3 2 1

+3V

22

R633

R634
LCDVCC LCDVCC

EC-B-07

2.2K_4

2.2K_4
+15V +3V R545
*Short_8@NC
CN3

G_0
D D
R216 10K_4
[32] DCR 1
3 1 LCDVCC_R
R254 LCDVCC 2
330K_4 Q26 3 G_1
+3V 4
AO3404 C269

2
R231 10U/6.3V/X5R_8 5
[7] INT_EDIDCLK 6
22_8
[7] INT_EDIDDAT 7
LCDVCC_ON
8
[7] INT_TXLOUTN0 9

RF26

RF27
[7] INT_TXLOUTP0 10
C278
11
[7] INT_TXLOUTN1 12
0.022U/25V/X7R_6
[7] INT_TXLOUTP1 13
14

*0.1U/10V/X5R_4

*0.1U/10V/X5R_4
[7] INT_TXLOUTN2 15 G_2

3
[7] INT_TXLOUTP2 16
17
[7] INT_TXLCLKOUTN 18
+5V_S5 2 2 [7] INT_TXLCLKOUTP 19
Q23 Q22 20
ME2N7002E ME2N7002E 21
R232 22
1

1
100K_4 R221 10K_4 23
[32] COLOR_ENGINE 24
[7] LVDS_BRIGHT_PWM 25
DISPON
26
27
C C
28 G_4
3

Q24
PDTC144EU GFX_PWR_SRC 29
30

G_3
[7] INT_LVDS_VDDEN 2

R257
1

100K_4 LVD-A30SFYG+

Back light
+3VPCU +3V

R264
R258 *4.7K_4 GFX_PWR_SRC R253 *Short_8@NC
VIN
10K_4
C279 C276
LID551# D13 D12 DISPON C287
[31,32] LID551#
RB500V-40 RB500V-40 0.1U/25V/X5R_6 0.1U/25V/X5R_6 *10U/25V/X5R_8

B B
C289
R220 C277
0.1U/10V/X5R_4 100K_4
*47P/50V/NPO_4

R255 2.2K_4
[7] INT_LVDS_BLON

Q25
3

PDTC144EV
R256
10K_4 C291 2 LCD_BK_OFF# [8]
*1U/10V/X5R_6
1

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
LCD Conn
Date: Friday, October 29, 2010 Sheet 22 of 45
5 4 3 2 1
5 4 3 2 1

23
LANVCC * R48 open when use RTL8105E RJ45_LINKUP#
RJ45_ACTIVITY#
R48 LAN1G@10K_4 LED3/EEDO TP3
+3VPCU TP2 EECS R62 10K_4
LANVCC R56 1K/F_4 EEDI R58 10K_4

38

14
15

37

40

31

30

32
D LANVCC U6 D

34

LED0

EECS/SCL
GPO/SMBALERT

LED3/EEDO
SMBCLK(NC)
SMBDATA(NC)

LED1/EESK

EEDI/SDA
CTRL12/VDD VDDREG

1
2
5
6
35 VDDREG
1 MDI_0+
MDIP0 MDI_0-
[34] LAN_ON 3 LANVCC 47 AVDD33 MDIN0 2
Q10 R87 48
AO6402A AVDD33 MDI_1+
*Short_8@NC 42 AVDD33 MDIP1 4
12 5 MDI_1- +3V

4
AVDD33(NC) MDIN1
27 DVDD33
39 7 MDI_2+
DVDD3 MDIP2(NC) MDI_2-
MDIN2(NC) 8
CTRL12A 36 R60
LANVCC_R REGOUT MDI_3+ 1K_4
MDIP3(NC) 10
11 MDI_3-
C62 LAN_DVDD12 45
RTL81111E MDIN3(NC)
C61 AVDD10 ISOLATEB
3 26 LAN_ISOLATEB [32]
*10U/6.3V/X5R_8 0.1U/10V/X5R_4 AVDD10 ISOLATEB
6 28 PCIE_WAKE# [7,27,28]
AVDD10(NC) LANWAKEB D6
9 33 LANVCC
AVDD10(NC) ENSWREG R59 RB500V-40
13
DVDD10 XTAL1 15K_4
29 43
DVDD10 CKXTAL1

REFCLK_N
REFCLK_P
XTAL2

CLKREQB
41 44
DVDD10(NC) CKXTAL2

PERSTB
1 2

HSON
HSOP
21 46 RSET

HSIN
HSIP

GND

GND
LAN_EVDD12 EVDD10 RSET Y1 25MHZ

R46 C37 C45

25

16
17
18
19
20

22
23

24

49
2.49K/F_4
33P/50V/NPO_4 33P/50V/NPO_4
R57 *Short_4@NC LAN_REST#
[3,9,27,28] PLTRST#
[9] PCIE_CLKREQ_LAN#

GPP_TX2N_LAN C57 0.1U/10V/X5R_4


PCIE_RXN2_LAN [9]
GPP_TX2P_LAN C53 0.1U/10V/X5R_4
PCIE_RXP2_LAN [9]

C CLK_PCIE_LANN [9] C
CLK_PCIE_LANP [9]
PCIE_TXN2_LAN [9]
PCIE_TXP2_LAN [9]

* C5116 and C5273 are for U5006 EVDD12 pin 19.

LANVCC CTRL12/VDD
CTRL12A LAN_EVDD12
R89 *Short_8@NC

C29 C56 C54 C52 C65 L6 4.7uH CTRL12A_R R53 *Short_8@NC


C66
0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 4.7U/6.3V/X5R_8 C51 C50
C58
C59 1U/6.3V/X5R_4 0.1U/10V/X5R_4
4.7U/6.3V/X5R_8 0.1U/10V/X5R_4 R61
*Short_8@NC

Note 1: The Trace length * C5110 to C5113 are for U5006 VDD33 pins-- 1, 29, 37 Place C5113 ,C5094 closed to U5006 pins44,45. LAN_DVDD12

between L1 and 8111DL's Pin and 40.


1 must be within 0.5 cm. C5
and C8 to L1 must be within C27 C26 C28 C36 C55
0.5cm. Refer to Layout guide 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4
for more detail.

B B

* C5119 to C5123 are for U5006 VDD12 pins-- 10, 13, 30, 36, 39.

Layout:All termination signal should have 20 mil trace

Tramsformer RJ45 Connector


EMI:close RJ45
U35
MDI_0- LAN_MX0- U33
12 TD4- MX4- 13
MDI_0+ 1 6 MDI_0-
MDI_0+ LAN_MX0+ IO1 IO4 C12
11 TD4+ MX4+ 14 2 GND REF 5 Orange LED
MDI_1- 3 4 MDI_1+ CN21
LAN_MCT0 R20 75/F_8 LANCT3 IO2 IO3 *0.1U/10V/X5R_4@NC
10 TCT4 MCT4 15
IP4220CZ6
MDI_1- 9 16 LAN_MX1-
TD3- MX3- R10 150_4 LAN_OLED
LANVCC 10
MDI_1+ 8 17 LAN_MX1+
TD3+ MX3+ U32 RJ45_LINKUP# 12
7 18 LAN_MCT1 R19 75/F_8 MDI_2+ 1 6 MDI_2-
TCT3 MCT3 IO1 IO4 LAN_MX0+
2 GND REF 5 1
MDI_2- 6 19 LAN_MX2- MDI_3- 3 4 MDI_3+ LAN_MX0- 2
TD2- MX2- IO2 IO3 LAN_MX1+ 3
MDI_2+ 5 20 LAN_MX2+ LAN1G@IP4220CZ6 LAN_MX2+ 4
TD2+ MX2+ LAN_MX2- 5
4 21 LAN_MCT2 R18 LAN1G@75/F_8 LAN_MX1- 6
TCT2 MCT2 LAN_MX3+ 7
MDI_3- 3 22 LAN_MX3- LAN_MX3- 8
TD1- MX1-
A MDI_3+ 2 23 LAN_MX3+ LANVCC R11 150_4 LAN_GLED 9 13 A
TD1+ MX1+ RJ45_ACTIVITY# 11
C585 0.01U/16V/X7R_4 1 24 LAN_MCT3 R17 LAN1G@75/F_8 14
TCT1 MCT1
GREEN LED
GST5009B LF
C13 RJ45
RV38 R16 C16
*0.1U/10V/X5R_4@NC
*EGA-0402 1M_8 10P/3KV/X7R_1808 EMI:close RJ45 RJ45 Connector
PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
RTL8111EL-VB
Date: Friday, October 29, 2010 Sheet 23 of 45
5 4 3 2 1
5 4 3 2 1

Codec Power(ADO)
24
R383 *0_6/S
AGND HPOUT-R

CODEC(ADO) HPOUT-L
MIC1-VREFO-L
MIC1-VREFO-R
R381

R382
*0_6/S

*0_6/S
C706,C723,C724,C712 close to IC
+5V_CODEC

L25 *Short_8_NC
60mil +5V

C389
MIC2-VREFO R384 *0_6/S C378 C395 C369 C374 C404 C401 C402
2.2U/6.3V/X5R_6 U24
Close to CODEC C380 10U/10/X7R_6
AGND
R390 *0_6/S 0.1U/10V/X5R_4 0.1U/10V/X5R_4 4.7U/10V/X5R_6 4.7U/10V/X5R_6 5 Vout Vin 1 0.1U/10V/X5R_4 *1U/10V/X5R_6 *10U/10/X7R_6
C390
C379 2.2U/6.3V/X5R_6 4 BYP
2.2U/6.3V/X5R_6 C368 *1000p/50V/X7R_4
0.1U/10V/X7R_4 C400 2 3
C375 GND EN MAINON [9,28,32,34,35,36,38,40,41]
C403 *1000p/50V/X7R_4 AGND
*1U/6.3V/X5R_4 *G916-475T1UF
+5V_CODEC
D
AGND Vset=1.242V D
AGND AGND
AGND
Close to CODEC

36

35

34

33

32

31

30

29

28

27

26

25
AGND
+5V_CODEC
Earphone(AMP) HDA Power(ADO)

VREF
CBP

CPVEE

LDO-CAP
CBN

HP-OUT-R

MIC1-VREFO-R
HP-OUT-L

MIC1-VREFO-L

MIC2-VREFO

AVSS1

AVDD1
U23

37 AVSS2 LINE1-R 24
+5V CN12
L30
38 AVDD2 LINE1-L 23 3
FBMH1608HM151_6_2A HPOUT-L R405 75/F_4 HPOUT-L1 L27 BLM18BD601SN1D_0.2A HPL 1 *Intel HDA Either +1.5V_S5 or +3V_S5
39 22 MIC1-R C373 4.7U/10V/X5R_6 MIC1_R1 4
PVDD1 MIC1-R +AZA_VDD
HPOUT-R R406 75/F_4 HPOUT-R1 L28 BLM18BD601SN1D_0.2A HPR
0.1U/10V/X5R_4

10U/6.3V/X5R_6

2
0.1U/10V/X5R_4

10U/6.3V/X5R_6

INSPKL+ 40 21 MIC1-L C372 4.7U/10V/X5R_6 MIC1_L1 5


SPK-L+ MIC1-L

RV24

RV23
C406 C408 C397 C399 LINE_JD 6
L31 *Short_8_NC

470p/50V/NPO_4
C366

470p/50V/NPO_4
C367
INSPKL- 41 20 R399 R400 +3V
SPK-L- MONO-OUT *1K_4 *1K_4

7
C393

R387
42 19 R394 20K/F_4 C394 C392
PVSS1
ALC269Q-VB6-GR JDREF
1U/6.3V/X5R_4

*EGA-0402

*EGA-0402
43 18 0.1U/10V/X7R_4

4.7U/10V/X5R_6
PVSS2 Sense-B
INSPKR- 44 SPK-R-
(LQFP-48) MIC2-R 17 MIC2-R C371 4.7U/10V/X5R_6 MIC2_R1
AGND

+5V HP-JACK-BLACK
L29

*Short_4@NC
INSPKR+ 45 16 MIC2-L C370 4.7U/10V/X5R_6 MIC2_L1
FBMH1608HM151_6_2A SPK-R+ MIC2-L
AGND AGND
Normal Open Jack
46 PVDD2 LINE2-R 15
Close to CODEC
0.1U/10V/X5R_4

10U/6.3V/X5R_6

0.1U/10V/X5R_4

GPIO0/DMIC-DATA
10U/6.3V/X5R_6

GPIO1/DMIC-CLK

EAPD 47 14
C405 C396 EAPD LINE2-L LINEOUT_JD#
C407 C398
SENSEA R391 20K/F_4 MIC1_JD#
SDATA-OUT

48 13 LINEOUT_JD#
SPDIFO Sense A
SDATA-IN

DVDD-IO

3
PCBEEP
+AZA_VDD

RESET#
BIT-CLK
DVDD1

DVSS2

SYNC
49 R392 39.2K/F_4 LINEOUT_JD#
PD#

C T_PAD C
+AZA_VDD R386 *10K_4 LINE_JD
ANALOG 2
1

10

11

12 Q40
Close to CODEC DIGITAL *2N7002E

1
PCBEEP
+AZA_VDD
C391

C382

ACZ_SDIN

AGND
10U/6.3V/X5R_6

0.1U/10V/X7R_4

ACZ_SYNC [8]
ACZ_RST# [8]
System MIC(AMP)

RV20
MIC1-VREFO-L
R404 22_4 MIC1-VREFO-R
ACZ_SDIN0 [8]

*EGA-0402
R408 22_4
ACZ_BITCLK [8]
C387 *22p/50V/NPO_4
R411 *0_4
ACZ_SDOUT [8]
R403 R407
VOLMUTE# D29 RB500V-40 4.7K_4 4.7K_4
[32] VOLMUTE# MIC1_JD# CN11
MUTE# 3
MIC1_L1 R388 1K_4 MIC1_L2 L24 BLM18BD601SN1D_0.2A MIC1_L3 1
EAPD +AZA_VDD 4
D30 *RB500V-40 MIC1_R1 R393 1K_4 MIC1_R2 L26 BLM18BD601SN1D_0.2A MIC1_R3 2

3
5

RV18

RV17
MIC1_JD 6

B EC-B-00 R385 *10K_4 MIC1_JD 2 B

7
C364 C365 R389

*EGA-0402

*EGA-0402
Q39
*2N7002E 470P/50V/X7R_4 470P/50V/X7R_4
*Short_4@NC MIC_JACK_BLACK

1
Normal Open Jack

AGND
MIC1_JD# AGND

Speaker(AMP) CN10
INSPKR+ R410 0_6 INSPKR+N
INSPKR- R409 0_6 INSPKR-N 15
INSPKL+ R402 0_6 INSPKL+N 2
INSPKL- R397 0_6 INSPKL-N 3
46

RV25

RV22 *EGA-0402

RV21

RV19
C388 R-L-SPEAKERS
INTERNAL MIC C377

*47P/50V/NPO_4
C381

*47P/50V/NPO_4
C384

*47P/50V/NPO_4 *47P/50V/NPO_4
*EGA-0402

*EGA-0402

*EGA-0402
MIC2-VREFO

R47 +3V
4.7K_4
CN1
PC BEEP C385 0.047U/10V/X7R_4
3

A
MIC2_L1 R43 1K_4 MIC2_L_R MIC_CON A
1

5
MIC2_R1 R45 1K_4 2
4

[8] SPKR 1
4 R398 100K_4 C376 0.1U/10V/X5R_4 PCBEEP
[32] PCBEEP_AD 2
C383 100P/50V/X7R_4
U22

3
C38 NC7SZ86
R396 R395 R401 10K/F_4
470P/50V/X7R_4 10K/F_4 150K/F_4
PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
ALC269/MIC/Line out
Date: Friday, October 29, 2010 Sheet 24 of 45
5 4 3 2 1
1 2 3 4 5 6 7 8

SATA HDD Connector. SATA ODD Connector.

21
22
CN16

1
1
2
HDD-->1A
+5V_ODD

C427

10U/10V/X5R_8
C426

0.1U/10V/X5R_4
120 mils

C425

0.1U/10V/X5R_4
C342

0.1U/10V/X5R_4
C343

0.1U/10V/X5R_4
C338

10U/10V/X5R_8
+5VPCU

6
Q35
AO6402A
+5V_ODD

25
3 5 4
4 +5V_HDD +5V 2
5 +3V_HDD +3VPCU 1 HDD-->1.5A(burning)
6 R437 *Short_8@NC Place caps close to C353
7 connector. C336 R370

3
8 C432 C434 0.1U/10V/X5R_4 10U/10V/X5R_8 100K_4
9 120 mils R357
A 10 +5V_HDD 0.1U/10V/X5R_4 10U/10V/X5R_8 100K_4 A
11 +15V R360 100K_4 OOD_EN_5V
12
13 Place caps close to

3
14 connector.
15 SATA_RXP1_C C320 0.01U/16V/X7R_4 SATA_RXP1 [8] 5
16 SATA_RXN1_C C317 0.01U/16V/X7R_4 SATA_RXN1 [8] Q34A
17 2N7002DW

4
6
18 SATA_TXN1_C C490 0.01U/25V_4 SATA_TXN1 [8]

1
19 SATA_TXP1_C C489 0.01U/25V_4 SATA_TXP1 [8] 2 C337
[32] ODD_EN
23 20 20 Q34B
24 2N7002DW 0.1U/25V/X5R_4

2
+3V_HDD +3V
SATA_HDD_CON R356
R429 *Short_8@NC 100K

C430 C429

0.1U/10V/X5R_4 *10U/10V/X5R_8 CN14


1 S1
0.01U/25V_4 C283 SATA_TXP3_C GND1
[8] SATA_TXP3 2
0.01U/25V_4 C284 TXP
Place caps close to [8] SATA_TXN3 SATA_TXN3_C 3
TXN
A 14 14
connector. 4
0.01U/16V/X7R_4 C341 SATA_RXN3_C GND2
[8] SATA_RXN3 5
0.01U/16V/X7R_4 C340 SATA_RXP3_C RXN
[8] SATA_RXP3 6
RXP
B
7
GND3 S7
[8] ODD_PRSNT# R365 0_4 8 P1
DP
9
+5V
+5V_ODD 10
R364 *Short_4_NC +5V
[9,32] ODD_MDDA# 11 15
MD 15
12
GND
13
B R366 GND P6 B
R363 1K/F_4 91939-0137P
10K_4

+3V

USB + E-SATA
CML1
Modify to GMT H-active 1 2 USBP0+_R USB 0
[9] USBP0+
4 3 USBP0-_R
+5V_S5 USB0PWR [9] USBP0-
U39 USB0PWR

RV4

RV3
40 mils (Iout=1A) CL-2M2012-900JT CN20
2 8
VIN1 OUT3 USB0PWR_R
3 7 1 1
VIN2 OUT2 C591 C592 USBP0-_R USB Vcc
[27,32] USB_ON 4 6 2
EN OUT1 D-

*EGA-0402

*EGA-0402
1 5 + C595 USBP0+_R 3
GND OC *470P/50V/X7R_4 0.1U/10V/X5R_4 D+
4
C593 G547G1P81U(MSOP-8) 150U/6.3V_3528 +3V GND
2

1U/10V/X5R_6
5
SATA_EN ESATA_TX4+ GND
6
ESATA_TX4- A+
7

3
R8 A-
USB_OC2# [9] 8 12
*10K_4 ESATA_RX4- GND Shield
9 13
ESATA_RX4+ B- Shield
10 14
+3V +3V B+ Shield
2 11 15
U4 U3 GND Shield
C ESATA_TX4- ESATA_RX4- C
2 4 2 4
ESATA_TX4+ IO1 VIN ESATA_RX4+ IO1 VIN Q3 E-SATA_CON
3 1 3 1
IO2 GND IO2 GND *2N7002K
E-SATA RE-DRIVER

1
*PJSR05 *PJSR05

+1.5V
C24

C15

C14

C25

Layout: Locate this IC near to conn 2~3 inch,and it can away PCH above 10 inch.
U5
*4.7U/6.3V/X5R_6

*0.1U/10V/X5R_4

4.7U/6.3V/X5R_6

0.1U/10V/X5R_4

PS8511ATQFN20GTR-QFN20 Straps notice:


1. SATA 3G-->600mV ; 0/1 BST#-->H
6
16
VCC
20 0_BST# R23 *10K_4 2. If input length is over 7 inch ; 0/1EQ-->H
VCC 0_BST# 1_BST# R38 *10K_4
10
1_BST#
Int.PH(150Kohm) : EN,0/1_BST#
17 SATA_AUTO_EN R12 10K_4 Int.PL(150Kohm) : AUTO_EN,0/1EQ,0/1_PRE
AUTOPW_EN +3V

EN AUTO_EN 0/1EQ 0/1EQ 0/1_BST# 0/1_BST#


[8] SATA_TXP4 C282 0.01U/25V_4 SATA_TXP4_C 1
IN0P OUT0P
15 ESATA_TX4+_C C17 0.01U/16V/X7R_4 ESATA_TX4+ 0/1_PRE 0/1_PRE Function
C281 0.01U/25V_4 SATA_TXN4_C 2 14 ESATA_TX4-_C C18 0.01U/16V/X7R_4 ESATA_TX4- 0 X X X X X X X
[8] SATA_TXN4 IN0M OUT0M Standby
1 0 X X X X X X disable auto power saving
C22 0.01U/16V/X7R_4 SATA_RXN4_C 4 12 ESATA_RX4-_C C19 0.01U/16V/X7R_4 ESATA_RX4-
[8] SATA_RXN4 OUT1M IN1M
X enable auto power saving
[8] SATA_RXP4 C23 0.01U/16V/X7R_4 SATA_RXP4_C 5 11 ESATA_RX4+_C C21 0.01U/16V/X7R_4 ESATA_RX4+ 1 1 X X X X X
OUT1P IN1P
RV2

RV1

RV8

RV7

D 1 X 0 X X X X X Short and medium length D


SATA_EN 7 3
EN GND
13
R39 *10K_4@NC 0_PRE GND 1
9 X X 1 X X X X
T_PAD

+3V 0_PRE Long length


*EGA-0402

*EGA-0402

*EGA-0402

*EGA-0402

18 1EQ R15 10K_4 +3V


R42 *10K_4@NC 1_PRE 1EQ 0EQ R24 10K_4
8
1_PRE 0EQ
19 +3V 1 X 0 X X Output :800~1200 mVpp
X X X
21

1 X X X X 1 X X Output :400~700 mVpp


R41 R40 PROJECT KL5A
*10K_4 *10K_4 1 X X X X X 0 X Pre-emphasis disabled
Quanta Computer Inc.
1 X X X X X X 1 Pre-emphasis enabled Size Document Number Rev
Custom 1A
SATA HDD/ESATA/CD-ROM
Date: Friday, October 29, 2010 Sheet 25 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

26
Clock Mode Note:
R9287 R9307 SD/MMC MS XD
strap
SP1 SD_D7 XD_RDY

D
48MHz SP2
SP3
SD_D6
SD_D5
XD_RE#
XD_CE# D
SP4 SD_D4 XD_WE#
R413 *10K_4 +3V 24MHz SP5
SP6
MS_BS
MS_D5
XD_CLE
XD_ALE
R412 *Short_4_NC XI SP7 MS_D1 XD_WP#
[9] CLK_48M_CARD
2 1 XO
C412 *1U/6.3V/X5R_4 12MHz SP8
SP9
MS_D4
MS_D0
XD_D0
XD_D1
SP10 MS_D2 XD_D2
Y6 *12MHZ 30ppm C409 1U/6.3V/X5R_4 12MHz SP11 MS_D6 XD_D3

MS_CD#

SD_CD#
SP12 MS_D3 XD_D4

SP15

SP14
R415 *270K_4 SP13 MS_D7 XD_D5

XO
(Crystal)

XI
R414 6.19K/F_4 RREF SP14 MS_CLK XD_D6
SP15 SD_WP XD_D7
C410 C411
*5.6P/50V_4 *5.6P/50V_4

48

47

46

45

44

43

42

41

40

39

38

37
For RTS5139
U25
SD,MS 4bit only

RREF

NC

XTLI/CLK_IN

CLK_MODE[0]
DV18

RST#

XTLO

GPIO

MS_INS#

SD_CD#

SP15

SP14
1 36 SP13
[9] USBP10- DM SP13
2 35 SP12
[9] USBP10+ DP SP12
3 34 SP11
NC SP11
4 33 SP10
NC SP10
5 32 SP9
NC SP9
C +3V 6 NC RTS5139-GR SP8 31 SP8

SP7
C

7 NC SP7 30

R423 8 29 SP6
GND SP6
0_8
9 28 SP5
NC SP5
10 27 R419 *10K_4 DV33_18
NC CLK_MODE[1]
11 3V3_IN GND 26

C418 C417 VCC_XD 12 25 SD_D2_R R416 *0_4_short SD_D2


Card_3V3 SD_D2
10U/6.3V/X5R_6 0.1U/10V/X5R_4

C416
0.1U/10V/X5R_4

SD_CMD
DV33_18
XD_CD#

SD_CLK
SD_D1

SD_D0

SD_D3
GND

SP1

SP2

SP3

SP4
13

14

15

16

17

18

19

20

21

22

23

24
SD_CMD_R
SD_CLK_R
SD_D1_R

SD_D0_R

SD_D3_R
DV33_18
XD_CD#

SP1

SP2

SP3

SP4

R422

R421

R420

R418

R417
B B

*0_4_short

*0_4_short

*0_4_short

*0_4_short

*0_4_short
C421 C422

*4.7U/6.3V/X5R_6 0.1U/10V/X5R_4

SD_CMD
SD_CLK
SD_D1

SD_D0

SD_D3
EC-B-05
7 IN1 CARD CONN
XD,MMC/SD,MS/MSP
CN9
XD_RDY 1 20 MS_D1
XD_RE# (2)XD-R/B (3)MS-DATA1 MS_BS
2 (3)XD-RE (2)MS-BS 21
XD_CE# 3 22
XD_CLE (4)XD-CE 4IN1-GND2
4 (5)XD-CLE (4)SD-VCC 23 VCC_XD
XD_ALE 5 24 SD_CLK C420 33P/25V_4
(6)XD-ALE (5)SD-CLK

C413

C415
XD_WE# 6 25 SD_D0
XD_WP# (7)XD-WE (7)SD-DAT0 XD_D2
7 (8)XD-WP (12)XD-D2 26
XD_D0 8 27 XD_D3
(10)XD-D0 (13)XD-D3

0.1U/10V/X5R_4

10U/6.3V/X5R_6
XD_D1 9 28 XD_D4
SD_D2 (11)XD-D1 (14)XD-D4 SD_D1
10 (9)SD-DAT2 (8)SD-DAT1 29
SD_D3 11 30 XD_D5
SD_CMD (1)SD-DAT3 (15)XD-D5 XD_D6
12 (2)SD-CMD (16)XD-D6 31
13 32 XD_D7
4IN1-GND1 (17)XD-D7
VCC_XD 14 (9)MS-VCC (18)XD-VCC 33 VCC_XD
MS_CLK 15 34 XD_CD#
MS_D3 (8)MS-SCLK (19)XD-CD-SW SD_WP 0.1U/10V/X5R_4
16 (7)MS-DATA3 SD-WP-SW 35
C414 MS_CD# 17 36 SD_CD# C419
A
MS_D2 (6)MS-INS SD-CD-SW A
0.1U/10V/X5R_4 18 (5)MS-DATA2
MS_D0 19 (4)MS-DATA0

SHIELD1-GND 37
SHIELD2-GND 38
SHIELD3-GND 41
SHIELD4-GND 42

R015-212-LM
PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Card Reader (RTS5159)
Date: Friday, October 29, 2010 Sheet 26 of 45
5 4 3 2 1
1 2 3 4 5 6 7 8

MiniCard WLA connector

MINICARD_PME#
+3.3V_WLAN

CN13
+3.3V_WLAN +1.5V_WLAN
27
1 WAKE# 3.3V_1 2
3 4 EC-B-08
RESERVED_1 GND0
5 RESERVED_2 1.5V_1 6
[9] PCIE_CLKREQ_WLAN# 7 CLKREQ# UIM_PWR 8 LPC_LFRAME# [8,32]
9 GND1 UIM_DATA 10 LPC_LAD0 [8,32]
[9] CLK_PCIE_WLANN 11 REFCLK- UIM_CLK 12 LPC_LAD1 [8,32]
[9] CLK_PCIE_WLANP 13 REFCLK+ UIM_RESET 14 LPC_LAD2 [8,32]
15 GND2 UIM_VPP 16 LPC_LAD3 [8,32]

A A

R427 *0_4 IRQ_SERIRQ_R 17 18


[8,32] IRQ_SERIRQ UIM_C8 GND3
R424 *0_4 19 20 WLAN_OFF_R#
UIM_C4 W_DISABLE# PLTRST#
21 GND4 PERST# 22 PLTRST# [3,9,23,28]
[9] PCIE_RXN3 23 PERn0 3.3VAUX1 24
[9] PCIE_RXP3 25 PERp0 GND5 26
27 GND6 1.5V_2 28
29 30 CLK_LPC_DEBUG_R R375 0_4
GND7 SMB_CLK LPC_LDRQ0#_R R376 0_4 CLK_LPC_DEBUG [9]
PCI-Express TX and RX [9] PCIE_TXN3 31 PETn0 SMB_DATA 32 LPC_DRQ#0 [8]
direct to connector [9] PCIE_TXP3 33 PETp0 GND8 34
35 GND9 USB_D- 36 USBP3- [9]
37 RESERVED_3 USB_D+ 38 USBP3+ [9]
[8] INTEL_BT_OFF# 39 RESERVED_4 GND10 40 TP48

RV16

RV35

RV36
41 RESERVED_5 LED_WWAN# 42
43 RESERVED_6 LED_WLAN# 44
45 RESERVED_7 LED_WPAN# 46
47 RESERVED_8 1.5V_3 48

*EGA-0402

*EGA-0402

*EGA-0402
49 RESERVED_9 GND11 50
R425 *0_4 51 52
RESERVED_10 3.3V_2

80003-1021
+3V_S5

R426 *10K_4

2
WLAN_OFF_R#
D24 RB500V-40 LAN_DISABLE# [10]

3 1 MINICARD_PME#
[7,23,28] PCIE_WAKE#
Q42
B B
*PDTC144EV R379 *0_4
Reserved for EMI
CLK_LPC_DEBUG

+1.5V_WLAN +3.3V_WLAN Place caps close to connector.


C355

*0.1U/10V/X5R_4
C362
+3.3V_WLAN +3V +1.5V_WLAN +1.5V C361 RF14 C360 C356 C357 C358 C424 C359
0.01U/16V/X7R_4 *10P/50V/COG_4 0.1U/10V/X5R_4 10U/6.3V/X5R_8
0.1U/10V/X5R_4 *0.047U/10V/X7R_4 0.1U/10V/X5R_4 0.047U/10V/X7R_4 4.7U/10V/X5R_8

Close to GND
R377 *Short_8@NC R378 *Short_4@NC

USB2.0*1
BLUETOOTH
EC-B-02 Modify to GMT H-active
+5V_S5 USB1PWR CN7
U37 +5V_S5 USB2PWR BLUE TOOTH CONN
40 mils (Iout=1A) U26
2 8 40 mils (Iout=1A) 87213-0600-6P-L
VIN1 OUT3
3 VIN2 OUT2 7 2 VIN1 OUT3 8
C USB_ON 4 6 3 7 BT_VCC C
[25,32] USB_ON EN OUT1 R610 0R_4 USB_ON VIN2 OUT2 6 BT_LED
1 GND OC 5 USB_OC0# [9] 4 EN OUT1 6 5 TP47
1 GND OC 5 USB_OC1# [9] 4 USBP5- [9]

1
C589 G547G1P81U(MSOP-8) To PCH C700 C701

C488

C487
USB3.0 : Remove 3 USBP5+ [9]
1U/10V/X5R_6 USB2.0 : Install C492 G547G1P81U(MSOP-8) + C476
1U/10V/X5R_6 2
1 BT_DIS [9]
150U/6.3V_3528

0.1U/10V/X5R_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4
R611 *0R_4

470P/50V/X7R_4
OVCUR2 [28]
Modify to GMT H active
USB3.0 : Install To USB3.0 IC C702 0.1U/10V/X5R_4
USB2.0 : Remove

Remove 0 ohm R599


+3V

USB1PWR USB1PWR_R C354 0.1U/10V/X5R_4


1

3
UBS2.0 suffer R637 & R638 C599 C600 + C596 Q38
470P/50V/X7R_4 0.1U/10V/X5R_4 ME2N7002E
USB3.0 suffer R639 & R640 150U/6.3V_3528 +15V R374 1M/F_6 2
2

DIP

3
CL-2M2012-900JT 20 mils
R638 0R_4 USBP1-_L 4 3 USBP1-_R USB 1,Left
[9] USBP1-

1
R637 0R_4 USBP1+_L 1 2 USBP1+_R 2 BT_VCC
[9] USBP1+ [10] BT_ON#
CN18 Q37
CML2 PDTC144EU
1 5

1
USB20_DN1 R639 *0R_4 USBP1-_R VDD GND5
[28] USB20_DN1 [28] USBP1-_R 2 D- GND6 6
USB20_DP1 R640 *0R_4 USBP1+_R 3 7
[28] USB20_DP1 [28] USBP1+_R D+ GND7
4 GND GND8 8

D D
RV5

RV6

USB_CONN
*EGA-0402

*EGA-0402

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
USB2.0*1/WLAN/BT
Date: Friday, October 29, 2010 Sheet 27 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

28
P3V3_USB30 P3V3_USB30
USB30_SMI#
SPI Flash ROM
EC-B-02

R612
+3.3VAUX
U40
SPICS# 1 8

3
SPISCLK CE# VDD
6
SCK

10K/F_4
Q54 SPISI 5
R643 R613 R614 +3.3VAUX SPISO SI
2 7
PLTRST# SO HOLD#
2
3 4
WP# VSS

*10K/F_4

*10K/F_4

10K/F_4
ME2N7002E EN25F05-100GIP

1
PCIE_WAKE# R615 R616 Copy From ZN7
[10,32] EC_EXT_SMI# 10K/F_4 10K/F_4
USB30_SMI#
A A
JTAGCK +3.3VAUX
[7,23,27] PCIE_WAKE#
TP91 TP90
OVCUR2 [27]
TP92 TP93 TP95 OVCUR1 R617 10K_4

PEXREXT
TP94 USB1PWR
USB3.0 PORT1
SSREXT
TESTEN

1
PLTRST_PCIE_N_USB
+3.3VAUX

+3.3VAUX

+3.3VAUX
SMDAT OVCUR2 R618 10K_4
CN23

1
1

1
1
1
1.0VL

1.0VL
SMCLK OVCUR3 R619 10K_4 1

0.1U/16V_4
1 VBUS
USBP1-_R 2

PCIE_WAKE#
USB30_SMI#
[27] USBP1-_R 2 D-
OVCUR4 R620 10K_4 USBP1+_R 3
[27] USBP1+_R 3 D+

COREPWRDN
OVCUR1
OVCUR2
OVCUR3
OVCUR4
4

JTAGCK
TESTEN
SMDAT
4 GND

SMCLK
USB30_RX1- 5
R621 R622 R623 USB30_RX1+ 5 SSRX-
6
6 SSRX+
4.7K_4 6.04K/F_4 3.01K/F_4 7
7 GND

C662
U3TXDN1 C610 0.1U/16V_4 USB30_TX1-
For debug only. U3TXDP1 C608 0.1U/16V_4 USB30_TX1+
8
9
8 SSTX-
9 SSTX+
U41 Don't connect to

13
12
11
10
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
system SMBus

13
12
11
10
ESD

VSUS33

PEXRST#
PEXWAKE#
SMI#

VSUS33

COREPWRDN#
USBHOC1#
USBHOC2#
USBHOC3#
USBHOC4#
USBHPE1#
VSUS33
VDD
VDD

TESTEN

VDD
JTAGTDI
SMDAT

JTAGTDO
SMCLK

JTAGTMS

JTAGCK
C608, C610 close to CN23
U42
C608, C610 need
Near PCIEx Slot USB30_RX1- 1 10 USB30_RX1- USB3.0 CONN
USB30_RX1+ Z1 NC USB30_RX1+
close to pin8, 9 of CN23 2 9
Z2 NC
1.0VL 67 44 +3.3VAUX 3 8 USB1PWR
VDD VSUS33 PWREN2 USB30_TX1- GND VCC USB30_TX1-
68
69
SSTX1+ USBHPE2#
43
42 PWREN3
1
1
TP96
USB30_TX1+
4
5
Z3 NC
7
6 USB30_TX1+
SUY USB3.0: DFHS09FR063
SSTX1- USBHPE3# TP97 Z4 NC
PWREN4
1.0VE 70
71
VCCA10SSRX1 USBHPE4#
41
40 SPISO
1 TP98
*RClamp0544.TBT
SUY USB2.0: DFHS04FR455
SSRX1+ SPISO SPISI msop10-4_9-5
72 39
SSRX1- SPISI SPISCLK
+3.3VAUX 73 38
VCCA33SS1 SPISCLK SPICS#
74 37
USBHP1+ SPICS#
+3.3VAUX 75 36 1.0VL
USBHP1- VDD
76 35
U3TXDP1 77
VCCA33SS1 VL800 / VL801 QFN88 VCCA33PEXTX
34 PCIE_RXN5_C
P3V3_USB30
0.1U/16V_4 C609
SSTX2+ PEXTX0- PCIE_RXN5 [9]
U3TXDN1 78 33 PCIE_RXP5_C 0.1U/16V_4 C611
B 79
SSTX2- VL800 4PORT PEXTX0+
32
PCIE_RXP5 [9]
B
1.0VE VCCA10SSRX2 VCCA33PEXM P3V3_USB30
USB30_RX1+ R624 0R_4 U3RXDP1 P3V3_USB30
USB30_RX1- R625 0R_4 U3RXDN1
80
81
SSRX2+ VL801 2PORT PEXRX0-
31
30
PCIE_TXN5 [9]
SSRX2- PEXRX0+ PCIE_TXP5 [9]
+3.3VAUX 82 29 P3V3_USB30
USB20_DP1 VCCA33SS2 VCCA33PEXRX
[27] USB20_DP1 83
USBHP2+ PEXCLK-
28 CLK_100_USB30_N [9] +15V
USB20_DN1 84 27 R658 +3V_S5
[27] USB20_DN1 USBHP2- PEXCLK+ CLK_100_USB30_P [9]
85 26 PLTRST_PCIE_N_USB
+3.3VAUX VCCA33SS2 VCCA33REG12 P3V3_USB30
86 25 PEXREXT
1.0VE VCCA10SSM PEXREXT
SSXI 87 24
SSXI VCCA33REG25 P3V3_USB30
SSXO 88 23 100K/F_4 R659
SSXO VDD 1.0VL

1
VCCA10SSRX3

VCCA10SSRX4

1M_4

1
2
5
6
VCCA33SSM

Q56
VCCA33SS3

VCCA33SS3

VCCA33SS4

VCCA33SS4

GND_PAD
VSUSUSB

Q55 AO6402A
USBHP3+

USBHP4+
USBHP3-

USBHP4-
SSREXT

SSRX3+

SSRX4+
SSTX3+

SSTX4+

PLTRST_PCIE_N_USB COREPWRDN
SSRX3-

SSRX4-

0R_4 R626 C697 1U/6.3V_4


SSTX3-

SSTX4-

PLTRST# [3,9,23,27] 2 3
GND

3
C698
ME2303T1

4
+3V_SUS
X'tal 25MHz

*0.1U/50V/X7R_6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

89

3
[34] SUSON# 2
Q57
R627 *0R_6
[9] PCH_CLK25M
Remove power for VL801 2N7002K C699
0.1U/10V/X7R_4
SSREXT

1
27P/50V_4 C612 R628 0R_6 SSXI

1
Y7
25MHz/20pF/30ppm

2
27P/50V_4 C613 SSXO
+3.3VAUX

+3.3VAUX

+3.3VAUX

+3.3VAUX

+3.3VAUX
1.0VE

1.0VE

BG625000486

XTL-5_3X3_2-3_8-1_2H

Crystal foot print must be reserved


C in case 25MHz clock from clock Power circuit (+1.05_SUS) For USB3.0 C
For +3V_S5 (Power for wake up) For +3V_RUN generator is not stable enough.
+3V_SUS +3.3VAUX +3V P3V3_USB30 +5V_S5
From M/B L34 From M/B L33 U43
C614
1U/6.3V_4 G9661-25ADJF12U
BLM18PG300SN1D BLM18PG300SN1D [9,24,32,34,35,36,38,40,41] MAINON R629 *10K/F_6 1 2 4 1 0.6A
C615 C616 C617 C618 C619 C620 C621 C622 VPP PGOOD
[32,34,36] SUSON R630 10K/F_6 2 6 P1V05_SUS
VEN VO
4.7uF/6.3V_6

0.1U/16V_4

4.7uF/6.3V_6

0.1U/16V_4

4.7uF/6.3V_6

0.1U/16V_4

4.7uF/6.3V_6

0.1U/16V_4

For USB3.0 3
+1.5V_SUS VIN
8
GND

ADJ
C625

C626
Remove SUSD turn on switch (From PCU to SUS) 9
GND NC
5

10U/6.3V_8

0.1U/50V_6
(Used +3V_S5 power plane) R1 R631

C623

C624
7
10K/F_6
0.8V

10U/6.3V_8

0.1U/50V_6
For +1.05_SUS (Power for wake up)
P1V05_SUS 1.0V 1.0VE
From M/B L35 L36 R632
R2 33K/F_6

BLM18PG300SN1D BLM18PG300SN1D 1.0VL Vout =0.8(1+R1/R2)


C627 C628 P/N:CX11P300000 L37 +3.3VAUX 1.0VL
4.7uF/6.3V_6

0.1U/16V_4

BLM18PG300SN1D C645 C646 C647 C648


C629 C630 C631 C632 C633 C634 C635 C636 C637 C638 C639 C640 C641 C642 C643 C644
0.1U/16V_4

4.7uF/6.3V_6

0.1U/16V_4

4.7uF/6.3V_6

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4
D D

Power sequence for Host. P3V3_USB30 +3.3VAUX 1.0VE

+3.3VSUS +3.3V Reset

C649 C650 C651 C652 C653 C654 C655 C656 C657 C658 C659 C660 C661
+1.0V
0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

PROJECT KL5A
Quanta Computer Inc.
5~20ms
Size Document Number Rev
50~450ms C 1A
USB3.0 *1
Date: Friday, October 29, 2010 Sheet 28 of 45
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

FAN CONTROL

+5V
29
R587 *Short_8@NC +5V_FAN
NOTE:
A C583 C580 A
NOTE: NOTE: Place C624 near U48
Place C625 near Q37 Place C623 near Q38
R93 2.05K_4 1U/10V/X5R_6 0.1U/10V/X5R_4
Q51 Q41
1

3
SST3904T116 SST3904T116
C584 C423 C73
2 2
*100P/50V/X7R_4 *100P/50V/X7R_4 2200P/50V/X7R_4
3

1
DDR3 WLAN-ONFI
+3V
+5V

R94
NOTE: 6.8K/F_4 R65 R66 R67 R76 R90 R86 R95
Place C627 near Q39 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4

17

16

15

14

13
CN17
+5V_FAN

T_PAD

TRIP_SET
DP2/DN3

DN2/DP3

SHDN_SEL
1
1

FAN_PWM
C539 C70 D8 FANSIG 2 5
B GND 12 3 6 B
2 1 RB500V-40
*100P/50V/X7R_4 2200P/50V/X7R_4 DN 4
PWM 11
Q49 2 +3V C690 C691 FAN_CON
DP

2
SST3904T116 CPU 10
3

TACH

*100P/50V/X7R_4

*100P/50V/X7R_4
3 VDD

SYS_SHDN#
SMCLK 9 1 3 MB_CLK1 [9,18,32]
4 Q11 ME2N7002E
GPIO1

SMDATA
ALERT#
+3V R84 22_4 +3V_FAN

GPIO2
R430 *Short_4@NC
SLID_CLK [31]
C67
R431 *Short_4@NC
SLID_DATA [31]
0.1U/10V/X5R_4 +3V
5

2
U7
EMC2103-2
1 3 MB_DATA1 [9,18,32]
NOTE: +3V Q9
Place C626 near U48 ME2N7002E

2
1 3
Q8 SYS_SHDN# [37,42]
ME2N7002E

RV9
C 2 1 VGA_OVT# [18,32] C
D7
*DIS@RB500V-40

*EGA-0402

MB_ALRET# R64 *0_4


TEMP_ALERT# [10,32]

D D

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
B 1A
FAN /THERMAL
Date: Friday, October 29, 2010 Sheet 29 of 45
1 2 3 4 5 6 7 8
5 4 3 2 1

30
KEYBOARD

26
CN5 KB-CON(85201-24051)
MX1

26
[32] MX1 24
MX7
[32] MX7
MX6 23 For EMI request
[32] MX6 22 +3VPCU
MY9
[32] MY9 21
MX4 CA4 CA1
[32] MX4 20
MX5 RP1 *220PX4 *220PX4
[32] MX5 19
MY0 10 1 MY3 MY11 1 2 7 8 MX7
[32] MY0 18
MX2 MY11 9 2 MY6 MY10 3 4 5 6 MX6
[32] MX2 17
MX3 MY12 8 3 MY10 MY9 5 6 3 4 MX5
D [32] MX3 16 D
MY5 MY13 7 4 MY15 MY8 7 8 1 2 MX4
[32] MY5 15
MY1 MY14 6 5
[32] MY1 14
MX0
[32] MX0 13
MY2 *10KX8 CA5 CA2
[32] MY2 12
MY4 *220PX4 *220PX4
[32] MY4 11
MY7 RP2 MY7 1 2 1 2 MX0
[32] MY7 10
MY8 10 1 MY2 MY6 3 4 3 4 MX1
[32] MY8 9
MY6 MY4 9 2 MY1 MY5 5 6 5 6 MX2
[32] MY6 8
MY3 MY5 8 3 MY0 MY4 7 8 7 8 MX3
[32] MY3 7
MY12 MY7 7 4 MY9
[32] MY12 6
MY13 MY8 6 5
[32] MY13 5
MY14 CA6 CA3
[32] MY14 4
MY11 *10KX8 *220PX4 *220PX4
[32] MY11 3
MY10 MY3 1 2 2 1 MY15
[32] MY10 2
MY15 MY2 3 4 4 3 MY14

25
[32] MY15 1 MY1 5 6 6 5 MY13
MY0 7 8 8 7 MY12

25

C
Touch pad C

CN2

4
[32] TPDATA 3
[32] TPCLK 2
1
RV30

RV29

TOUCH_PAD
0.1U/10V/X5R_4
C265

C266
0.1U/10V/X5R_4
EGA-0402

EGA-0402

B B
L11 *Short_8_NC +5V_TP C264 0.1U/10V/X5R_4
+5V

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
K/B, T/P
Date: Friday, October 29, 2010 Sheet 30 of 45
5 4 3 2 1
5 4 3 2 1

31
+3V_S5 VGA UMA/DIS SWITCH
+3V_S5 RF ON/OFF SWITCH
R36
100K_4

4
5
R380
100K_4
1 3
[32] VGA_SWITCH# SW2
SW1 DIS@VGA_SWITCH RF_SW# 1 3
[32] RF_SW#

2
C20
DIS@0.1U/10V/X5R_4 RF_SLIDE_SWITCH

2
D D
C363
0.1U/10V/X5R_4

LED1
DIS_BULE_LED# R6 DIS@100_6 DIS_BULE_LED#_R 1 2 +3V VGA
DIS@RIGHT-ANGLE-WHITE_LED

3
2
[9] DIS_BULE_LED
Q1 CAPACITANNCE BUTTON BOARD
DIS@PDTC144EU
1

LED4 20 mils
RF_ON# R478 100_6 RF_ON#_R 1 2

7
+3V
[29] SLID_CLK 6
RIGHT-ANGLE-WHITE_LED
[29] SLID_DATA 5
3

R339 PBY160808T-601Y-N_6
RF +3V
R344 PBY160808T-601Y-N_6 4
+5V 3
2 R362 *0_4
[9] RF_ON [32] MMB_SM_INT# 2
1

8
1

Q43 reserve for EC CN6 Slide bar 2.0 CONN

C692

C693

C327

C334

C335

RV31

RV12
PDTC144EU
LED2
TP LED
TP_LED# R325 100_6 TP_LED#_R 1 2
[32] TP_LED# +3V

*10P/50V/COG_4

0.1U/10V/X5R_4

0.1U/10V/X5R_4

10P/50V/COG_4

10P/50V/COG_4
C RIGHT-ANGLE-WHITE_LED C

*EGA-0402

*EGA-0402
LED5 Battery
BATLED_GREEN_LED# R472 100_6 BATLED_GREEN_LED#_R 2
[32] BATLED_GREEN_LED# C2
WHITE A 1 +3V_S5
BATLED_AMBER_LED# R475 100_6 BATLED_AMBER_LED#_R 3
[32] BATLED_AMBER_LED# C1
AMBER
RIGHT-ANGLE-LED
POWER BOARD

Power/suspend LED C302 0.1U/10V/X5R_4 CN4


LED3 +3V R274 *Short_6@NC 1
PWR_WHITE# R490 100_6 PWR_WHITE#_R 1
1 2 +3VPCU +3VPCU 2 2 11 11
[32] NBSWON# 3 3 12 12
3

RIGHT-ANGLE-WHITE_LED [32] NOVO_BTN# 4


EC-A3-02 4
5 5
[22,32] LID551# PWR_WHITE#
[32] PWR_WHITE 2 6 6
HDD [8] SATA_ACT#
7 7
NUMLED# [32] NUMLED# 8 8
CAPSLED# [32] CAPSLED# 9
1

Q44 9
10 10

C438

C428

C435

C295

C440

C439

C297

C433
PDTC144EU

RV33

RV28

RV32
Connector-FPC/FFC
B B

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4
*EGA-0402

*EGA-0402

*EGA-0402
CML3
1 2 USBP9+_R USB BOARD
[9] USBP9+
USBP9-_R
[9] USBP9- 4 3 Right CN8
USB2PWR 1
RV15

RV14

CL-2M2012-900JT USBP9-_R
2 5
C694

USBP9+_R
3 6
4
USB_CON
*EGA-0402

*EGA-0402

0.1U/10V/X5R_4

L32
A
[9] USBP2- 1 2 USBP2-_R CCD BOARD A
4 3 USBP2+_R CN15
[9] USBP2+
+3V R428 *Short_6@NC
1
RV26

RV27

CL-2M2012-900JT USBP2-_R
2 5
C695 0.1U/10V/X5R_4

USBP2+_R
3 6
4
CCD_CON
PROJECT KL5A
*EGA-0402

*EGA-0402

FOR ESD Quanta Computer Inc.


Size Document Number Rev
Custom 1A
B TO B CON/LED
Date: Friday, October 29, 2010 Sheet 31 of 45
5 4 3 2 1
5 4 3 2 1

+3.3V_EC

R351
+3VPCU RTC_VCC

R372 *0_4
+3V_RTC

32
+3VPCU

R371
*Short_8@NC IT8512_AVCC L21 BK1608HS121-T +3VPCU
MB_CLK1 R353 4.7K_4
C324 C323 L23 BK1608HS121-T +3VPCU MB_DATA1 R355 4.7K_4

0_4
MBCLK R349 2.2K_4
1000P/16V/X7R_4 1U/6.3V/X5R_4 C339 (For PLL Power) MBDATA R345 2.2K_4
BATLED_AMBER_LED# R346 *10K_4
0.1U/10V/X5R_4 BATLED_GREEN_LED# R341 *10K_4
D L20 BK1608HS121-T BL/C# R320 *10K_4 D
Layout Note: BAYSWAP# R347 10K_4
+3.3V_EC
Place all capacitors close to IT8512. TEMP_BBAT R329 10K_4

IT8512_VSTBY
D19
*DIS@RB500V-40
C328 C431 C349 C330 C329 C332 2 1 VGA_OVT# [18,29] +3V

0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4 0.1U/10V/X5R_4


TEMP_ALERT# [10,29]
R597 *DIS@0_4 HWPG R358 10K_4
[42] GFX_PWRGD
RF_SW#
RF_SW# [31]
HMOSI R336 *0_4
PCH_SPI_SI [8]
HMISO R333 *0_4
ODD_EN [25]
HSCK R330 *0_4
PCH_SPI_SO [8] POWER SWITCH/
PCH_SPI_CLK [8]
HSCE# R327 *0_4
CLK_PCI_8512
NUMLED# [31] PCH_SPI_CS0# [8] NOVO BUTTON
[9] CLK_PCI_8512
EC_PWROK [7] +3VPCU +3.3V_EC
C351

RV34

Layout Note:
+3V RTC_VCC HMOSI
net "3VPCU" and "RTC_VCC"
*15P/50V/NPO_4

HMISO
minimum trace width 12mils.
*EGA-0402

+3.3V_EC HSCK R359 R361


HSCE# 10K_4 10K_4

NBSWON# NOVO_BTN#
C347
CLKRUN# [7]
C333 C344
EMI suggestion: 0.1U/10V/X5R_4 +5V
0.1U/10V/X5R_4 0.1U/10V/X5R_4
Add a 15p bypass CAP on CLK_PCI_8512

114
121

127
11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
3
U21 IT8518

R434

R432
10 110 MBCLK

VCC

AVCC
VBAT

EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)

L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)

HMOSI/GPH6/ID6(Dn)
HMISO/GPH5/ID5(Dn)
HSCK/GPH4/ID4(Dn)
HSCE#/WUI19/GPH3/ID3(Dn)
CLKRUN#/WUI16/GPH0/ID0(Dn)
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
[8,27] LPC_LAD0 LAD0/GPM0(X) SMCLK0/GPB3(X) MBCLK [35]
9 111 MBDATA
[8,27] LPC_LAD1 LAD1/GPM1(X) SMDAT0/GPB4(X) MBDATA [35]
8 115 MB_CLK1
[8,27] LPC_LAD2 LAD2/GPM2(X) SMCLK1/GPC1(X) MB_CLK1 [9,18,29]
MB_DATA1

SM BUS
7 116
C [8,27] LPC_LAD3
22
LAD3/GPM3(X) SMDAT1/GPC2(X)
117 EC_PECI_R R354 43/J_4
MB_DATA1 [9,18,29]
EC_PECI [3]
16Mbit (2M Byte), SPI C
[22,31] LID551# LPCRST#/WUI4/GPD2(Up) PECI/SMCLK2/WUI22/GPF6(Up)
CLK_PCI_8512 13 118 +3VPCU
LPCCLK/GPM4(X) SMDAT2/WUI23/GPF7(Up) VOLMUTE# [24]

10K_4

10K_4
[8,27] LPC_LFRAME# 6
+3VPCU LFRAME#/GPM5(X)
85 COLOR_ENGINE [22]
PS2CLK0/TMB0/GPF0(Up)
[9,24,28,34,35,36,38,40,41] MAINON 17
LPCPD#/WUI6/GPE6(Dn) PS2DAT0/TMB1/GPF1(Up)
86 DCR [22] Winbond AKE38ZP0N00
89 TPCLK

PS/2
D20 RB500V-40 126
PS2CLK2/WUI20/GPF4(Up)
90 TPDATA
TPCLK [30] SST AKE28FP0K07 R343
[10] EC_A20GATE GA20/GPB5(X) PS2DAT2/WUI21/GPF5(Up) TPDATA [30]
R369
[8,27] IRQ_SERIRQ 5 MX AKE37FP0Z13 10K_4 R350
470K_4 D23 RB500V-40 SERIRQ/GPM6(X) 10K_4
[10,28] EC_EXT_SMI# 15 ECSMI#/GPD4(Up)
D22 RB500V-40
WRST_8512#
[10] EC_EXT_SCI# 23 ECSCI#/GPD3(Up) LPC U20
14 WRST# GPIO
[10] EC_RCIN# D21 RB500V-40 4 8512_SCE# 1 8
C348 KBRST#/GPB6(X) 8512_SCK R348 47_4 8512_SCK1 CE# VDD
[31] CAPSLED# 16 PWUREQ#/BBO/SMCLK2ALT/GPC7(Up) 6 SCK
ITE suggestion 8512_SI R342 47_4 8512_SI1 5 C331
0.1U/10V/X5R_4 R656 *0_4 8512_SO R352 15_4 8512_SO1 SI
PWM0/GPA0(Up) 24 PWR_WHITE [31] 2 SO HOLD# 7
25 0.1U/10V/X5R_4

[35] D/C#
[34] LAN_POWER
119
123
CRX0/GPC0(Dn)
CTX0/TMA0/GPB2(Dn) CIR
IT8518 PWM1/GPA1(Up)
PWM2/GPA2(Up)
PWM3/GPA3(Up)
PWM4/GPA4(Up)
28
29
30
H_PROCHOT#_EC
APS_LED#
GSENSOR_ON#
SUS_PWR_ACK [7]

TP46
TP45
3 WP#
MX25L1605A
VSS 4

D18 RB500V-40 DNBSWON_R 80


IT8519 PWM
PWM5/GPA5(Up) 31 PCBEEP_AD [24]
Reserved for leakage current
[7] SIO_PWRBTN# DAC4/DCD0#/GPJ4(X)
[25,27] USB_ON 104 DSR0#/GPG6(X) TACH0A/GPD6(Dn) 47 LAN_ISOLATEB [23]
[7] RSMRST# 33 GINT/CTS0#/GPD5(Up) TACH1A/TMA1/GPD7(Dn) 48 VRON [42]
TP101 88 PS2DAT1/RTS0#/GPF3(Up)
R324 *Short_4_NC 81 120
[9,25] ODD_MDDA# DAC5/RIG0#/GPJ5(X) TMRI0/WUI2/GPC4(Dn) ADIN# [35]
RV13

TP102 87 124 HWPG HWPG [10,36,37,38,40,41,42]


PS2CLK1/DTR0#/GPF2(Up) TMRI1/WUI3/GPC6(Dn)
[31] BATLED_AMBER_LED# 109 TXD/SOUT0/GPB1(Up)
[31] BATLED_GREEN_LED# 108 RXD/SIN0/GPB0(Up)
*EGA-0402

TP39 GSENSOR_Y_R 71 125 NBSWON# H_PROCHOT#_Q R373 *Short_4_NC


ADC5/DCD1#/WUI29/GPI5(X) PWRSW/GPE4(Up) NBSWON# [31] H_PROCHOT# [3,42]
[42] VCORE_IMON_EC 72 ADC6/DSR1#/WUI30/GPI6(X) UART port RI1#/WUI0/GPD0(Up) 18 SIO_SLP_S3# [7]
[42] VGT_IMON_EC 73 ADC7/CTS1#/WUI31/GPI7(X) RI2#/WUI1/GPD1(Up) 21 ACIN [35]
[31] NOVO_BTN# 35 RTS1#/WUI5/GPE5(Dn) WAKE UP

3
B [31] VGA_SWITCH# 34 PWM7/RIG1#/GPA7(Up) B
R657 0_4 107 112
[31] PWR_WHITE DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn) SUSON [28,34,36]
[7] PM_SLP_S4# 95 CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
94 H_PROCHOT#_EC 2
[31] TP_LED# CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)
8512_SCK 105 Q36
8512_SCE# FSCK R368 ME2N7002E
101 FSCE#
8512_SI 102 EXTERNAL SERIAL FLASH 100K/J_4

1
8512_SO FMOSI
103 FMISO ADC0/GPI0(X) 66 TEMP_MBAT [35]
67 TEMP_BBAT
ADC1/GPI1(X) TP41
BAYSWAP# 56 68 AD_ID [35]
BOARD_ID KSO16/SMOSI/GPC3(Dn) ADC2/GPI2(X) GSENSOR_Z_R
57 KSO17/SMISO/GPC5(Dn) ADC3/GPI3(X) 69 TP40
+3V R335 *10K_4 TP44 USB_CHARGE_ON 32 70 GSENSOR_X_R
PWM6/SSCK/GPA6(Up) ADC4/WUI28/GPI4(X) TP38

[31] MMB_SM_INT# 100 SSCE0#/GPG2(X) A/D D/A


BATT_SEL 106 SPI ENABLE
TP42 SSCE1#/GPG0(X)
76 AB_CHARGING
TACH2/GPJ0(X) TP49
MY0 36 77
KSO0/PD0 GPJ1(X) AC_PRESENT [7]
MY1 37 78
KSO1/PD1 DAC2/TACH0B/GPJ2(X) BL/C# [35]
MY2 38 79
KSO2/PD2 DAC3/TACH1B/GPJ3(X) S5_ON [34]
MY3 39
MY4 KSO3/PD3
40 KSO4/PD4 KBMX
MY5 41
MY6 KSO5/PD5
42 KSO6/PD6
MY7 43
MY8 KSO7/PD7
44 KSO8/ACK#
MY9 45
Borad ID MY10 46
KSO9/BUSY
KSO10/PE
MY11 51 2 IT8512_CK32KE
KSO11/ERR# CK32KE
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 CLOCK 128


+3VPCU MY13 KSO12/SLCT CK32K
VCORE

53 KSO13
AVSS

MY14 54
KSI4
KSI5
KSI6
KSI7

VSS

VSS
VSS
VSS
VSS
VSS

KSO14
IT8512_CK32K

MY15 55 KSO15
[30] MY[0..15]
58
59
60
61
62
63
64
65

27
49
91
113
122

75

12

R337
Y5
DIS@10K_4
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

A A
1 4
[30] MX[0..7]
R367 2 3
BOARD_ID C345 C346
*32.768KHZ
*18P/50V/COG_4 *18P/50V/COG_4
R338 0/J_4
*UMA@10K_4
C352 C350

*1U/6.3V/X5R_4 0.1U/10V/X5R_4 PROJECT KL5A


DIS =>R337 Quanta Computer Inc.
UMA=>R338 Size
Custom
Document Number Rev
1A
KBC IT8518
Date: Friday, October 29, 2010 Sheet 32 of 45
5 4 3 2 1
5 4 3 2 1

Screw for ME CPU BKT EMI


VIN +VCC_GFX 33
EC3 1 2 0.1U/50V/X7R_6

WLAN HOLE11 HOLE10 EC5 1 2 0.1U/50V/X7R_6


BKT1
C142D102N C142D102N 4 EC8 1 2 0.1U/50V/X7R_6 EC22 2200P/50V/X7R_4
D D

(PTH) 3 EC18
1 2 0.1U/50V/X7R_6 EC23 0.1U/25V/X5R_4
1

1
2 EC13
1 2 0.1U/50V/X7R_6

EC12
1 2 0.1U/50V/X7R_6

1
cpu-bracket
SMT GUIDE H=4mm PN: MBIM3001010 EC15
1 2 0.1U/50V/X7R_6

SMT NUT H=4mm PN: MBIM3002010 EC14


1 2 0.1U/50V/X7R_6

EC11
1 2 0.1U/50V/X7R_6
non-connect GND for ESD

VGA HOLE13 HOLE12 Pad for Layout mask


C41D2N DIS@C41D2N

PAD1 PAD2 PAD3


1

VIN VIN +VCC_CORE VIN


*PAD1 *PAD2 *PAD3 ESD

1
C C
SC24 *0.1U/25V/X5R_4
SMT NUT H=5.1mm PN: MBKL6001010 EC20 1 2 0.1U/50V/X7R_6 SC25 *0.1U/25V/X5R_4
PAD4 PAD5 PAD6 PAD7 SC19 *0.1U/25V/X5R_4
EC21 1 2 0.1U/50V/X7R_6

*PAD4 *PAD5 *PAD6 *PAD7

1
EC-B-10
VIN +1.5V_SUS VIN +5V_S5
VIN +1.5V_GPU
ME-other holes SC4 0.1U/25V/X5R_4
SC5 0.1U/25V/X5R_4 SC26 0.1U/25V/X5R_4
SC23 0.1U/25V/X5R_4 SC21 0.1U/25V/X5R_4 SC27 0.1U/25V/X5R_4
圓圓圓圓(8個
個個個圓)*7 for ESD SC22 0.1U/25V/X5R_4
HOLE6 HOLE4
HOLE8 HOLE5 HOLE1 HOLE7
*C41D2N *C41D2N GFX_CORE +1.5V_SUS GFX_CORE +1.5V_GPU +0.85V +1.05V_PCH

7 7 7 7
1 8 1 8 1 8 1 8 SC1 *0.1U/10V_4 SC14 *0.1U/10V_4 SC6 *0.1U/10V_4

1
2 9 2 9 2 9 2 9 SC7 *0.1U/10V_4
SC8 *0.1U/10V_4
3
4
5
6

3
4
5
6

3
4
5
6

3
4
5
6

SC10 *0.1U/10V_4
B HOLE3 SC12 *0.1U/10V_4 B
*holes_p_r276d118 *holes_p_r276d118 *holes_p_r276d118 *holes_p_r276d118
*C41D2N
HOLE2 HOLE9 +1.5V_SUS
+1.05V_PCH
SC2 *0.1U/10V_4 +0.85V
7 7
1

1 8 1 8 SC13 *0.1U/10V_4
2 9 2 9 Connect to AGND SC17 *0.1U/10V_4 SC3 *0.1U/10V_4 SC9 *0.1U/10V_4
for ESD SC18 *0.1U/10V_4 SC15 *0.1U/10V_4
3
4
5
6

3
4
5
6

SC16 *0.1U/10V_4
NPTH
*holes_p_r276d118 *holes_p_r276d118
AGND +1.05V_PCH +1.5V_SUS +VCC_CORE

SC20 *0.1U/10V_4 VIN +5V


SC11 *0.1U/10V_4

SC28 *0.1U/25V/X5R_4

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
B 1A
Screw hole/EMI/ESD
Date: Friday, October 29, 2010 Sheet 33 of 45
5 4 3 2 1
5 4 3 2 1

DISCHARGE
+3V, +5V,1.5V
34
+3VPCU +5VPCU

D +1.5V_SUS D

+15V
+5VPCU +5V +3V
PQ75 PC76 +5VPCU +1.05V_PCH +0.75V_DDR_VTT +1.8V +0.85V

5
6
7
8
AO4496(30V/10A) 10U/6.3V/X5R_8 +1.5V
PR183
PR185 1M_4 4
100K/F_4 PR186 PR182 PQ73 PC194 PC195

5
6
7
8

1
2
5
6
22_8 22_8 AO4496(30V/10A) 0.1U/10V/X7R_4 0.1U/10V/X7R_4 PR170
100K/F_4 PR171 PR174 PR177 PR176 PR179
0.5A

1
2
3
MAINON_15V 4 3 22_8 22_8 22_8 22_8 22_8
3

3
PQ32 +1.5V

3
PQ68 PQ66 PC199 AO6402A
2.9A 1.7A

1
2
3

4
2 2 PR184
3

*1M_4 PQ54 PQ57 PQ61 PQ58


ME2N7002E

ME2N7002E

2200P/50V/X7R_4
2
2 PC81 2 2 2 2 2
+3V +5V

3
MAINON 2 10U/6.3V_6

ME2N7002E

ME2N7002E

ME2N7002E

ME2N7002E
1

PC200 PC202 2 PQ62


PQ65 0.1U/10V/X7R_4 0.1U/10V/X7R_4 [9,24,28,32,35,36,38,40,41] MAINON ME2N7002E
1

1
PDTC144EU
PQ55

1
MAINON# PQ67 PDTC144EU
2N7002K

[3,5] MAINON# [5] MAINON_15V

C C

LANVCC
3V_S5, 5V_S5 B-00
+5VPCU LANVCC
+15V

+3VPCU +5VPCU
PR38
PR37 1M_4
100K/F_4 PR33
22_8
LAN_ON
LAN_ON [23]
6
5
2
1

5
6
7
8

PQ74 PQ76

3
AO6402A AO4496(30V/10A) PQ9
3 4 ME2N7002E

PC197 2 2

3
4

1
2
3
*0.1U/50V/X7R_6

2
0.6A 3.8A [32] LAN_POWER

1
PQ15

1
+3V_S5 +5V_S5 PDTC144EU PQ14
2N7002K

B PC198 PC201 B
0.1U/10V/X7R_4 0.1U/10V/X7R_4

GFX_CORE
+15V +1.5V_SUS
+5V_S5
+5VPCU +3V_S5 +5VPCU
+5VPCU
PR214
1M_4 PR96
PR50 *DIS@22_8
PR215 22_8 PR87
100K/F_4 PR216 PR217 PR51 PQ38

3
22_8 22_8 100K/F_4 *DIS@100K/F_4 *DIS@ME2N7002E
3

PQ78
3

2N7002K PQ25 2
2 PQ77 2
PR213 ME2N7002E

3
*1M_4 2 2 PQ80
ME2N7002E

ME2N7002E

1
3

+3V_GPU 2
1

2 2
1

[32] S5_ON [28,32,36] SUSON PQ40

1
*DIS@PDTC144EU
PQ79 PQ24
1

PDTC144EU PDTC144EU
SUSON# [28]

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Discharge
Date: Friday, October 29, 2010 Sheet 34 of 45

5 4 3 2 1
5 4 3 2 1

DC-IN
PF2
TR/3216FF7-R
EL6
UPB201212T-800Y-N
VA
8
PQ56
SI4825DDY-T1
1
VA1
35
7 2
5 ADPIN+ 1 2 6 3
4 EL7 5 4
3 UPB201212T-800Y-N
PR167 PQ51
2
1 220K/F_4 LTA043EUBFS8TL
1 2 1 3
PJ1 PC166 PR163

1
PC168 0.1U/50V/X7R_6 1M/J_4

1
0.1U/50V/X7R_6 PR175
D 1K/J_6 PR165 D
ADPIN- VA1 *1K_4 PQ83

2
3

3
PD17 PQ52 PC154 AOD425 1

2
P4SMAJ20A 2 *MMBT3904LT1G 0.47U/25V/X7R_8
PQ53

1
UMT1NGTN

4
3

1
PQ85 PR168 PR169
*IMD2 1 2 AD_D 1.54K_6
B-00 AD_D
1M_4 PR164
220K/F_4
VA

6
PD18
2 1 PC158
[9,24,28,32,34,36,38,40,41] MAINON 0.047U/50V/X7R_6

2
PD20 PD19
*1SS355VM *1SS355VM 1SS355VM

ACOK 3 1 88731LDO 88731CSSP

1
88731CSSN PR160
PR223 PQ63 0.01_1W_3720
10K/F_4 PDTA124EU PR178 Place these CAPs 1 2 VIN
47K_4 VIN
close to FETs
2

C-00

1P

2P
PQ59
[32] ACIN 88731LDO PR155

3
2
1
2N7002K

2 PR130 200K/F_4

1
PR224 10/F_6

1
15K/F_4 C-00 PD24

1
88731_ACIN PC127 PC213 PC214 PC221 PC107 PC109 PC220 SSM34PT PR232 PR233
1U/25V/X7R_8 0.1U/50V/X7R_6 0.1U/50V/X7R_6 PD6 + + 4 10/F_6 10/F_6
1

2
10U/25V/X6S_12

10U/25V/X6S_12

2200P/50V/X7R_4
0.1U/50V/X7R_6
*1SS355VM

2
3

PC167 VA

2
1U/25V/X7R_8 PR127

5
2.2/F_6 PR154 PQ84 88731CSSP
PQ60 2 2 1 ACOK# 88731BST 100K/F_4 AOL1413

1
2N7002K PC125
1

PR133 0.1U/50V/X7R_6
C 221K/F_4 C

28

27

2
1
PD12 PR225 PR135 88731CSSN
1

1SS355VM 1M_4 49.9K/F_4 PC130 PC120

CSSP
GND

CSSN
22 1U/10V/X5R_4 0.1U/50V/X7R_6
2

DCIN

3
88731LDO PQ64
PR180 2N7002K
88731_ACIN 2 25 100K/F_4
ACIN BOOT PR139 ACOK 2
PC132 4.7/F_6 4 PQ44
0.01U/25V/X7R_4 21 PC124 MDV1660URH
AC_OK VDDP 1U/10V/X5R_4
13
ACOK
ACIN=17.5V 26

3
2
1

1
VCC
+3VPCU 11
VDDSMB 88731DHI PL4 PR230
24
UGATE

2
CHOKE_6.8UH/4.5A(7*7*3) 0.02_1W_3720
23 88731LX 1 2 BAT-V PD15
PC147 PR153 *0_4_short PHASE 1SS355VM

2
0.1U/10V/X7R_4 MBCLK 10 20 88731DLO PC146 PC209 PC162 +3VPCU

1P

2P
SCL LGATE

1
MBDATA 9 PC161 VIN

1
SDA

2
10U/25V/X6S_12

10U/25V/X6S_12

10U/25V/X6S_12
14 19 ER7 + + +
NC PGND

0.1U/50V/X7R_6
PR152 *0_4_short PR150 *0_4_short 2.2_8

3
88731_IINP 8 18 PC203

1
[32] AD_ID ICM CSOP 1000P/50V/X7R_4

2
17 EC10 PR181
CSON PQ43 1500P/50V/X7R_4 100_4 D/C# 2
4
6 MDV1660URH PR219 +5VPCU [32] D/C# PQ82
VCOMP PR147 475K/F_4 2N7002K
PU5 100/F_4 PR222

3
2
1

5
5 ISL88731A 15 BAT-V 10K/F_4

1
NC VFB PD16 1 +
16 PR141 1SS355VM 4
PR144 NC 10/F_6
4
ICOMP +3VPCU 1 2 3 -
4.75K/F_4 88731CSOP
GND

2
NC

PC151 3 PC145 PU10

2
VREF

1
0.01U/25V/X7R_4 G1331T11U PR221
0.01U/25V/X7R_4

PC141 PR143 PR218 PR220 *0_4


7

12

3
PR151 88731REF 0.1U/50V/X7R_6 10/F_6 332K/F_4 PC204 10K/F_4

2
*8.45K/F_4 88731CSON *1000P/50V/X7R_4

1
PC149 PC142 PC140 PC138 PC148
*0.1U/10V/X7R_4 2
BL/C# [32]
0.01U/25V/X7R_4

*0.01U/25V/X7R_4

0.01U/25V/X7R_4

*1U/10V/X5R_6

B B
PQ81
Battery Low 7.5V 2N7002K

1
PR231
*SHORT-1A

GND_CHG
BAT-V PC163 PJP14
0.1U/25V/X5R_4 1827654-1

EL5 PF1 8
UPB201212T-800Y-N TR/3216FF10 G1
1 10
VBATT BT+ N
VA 1 2 2
BT+

3
EL4 SCLK
+5V +3V 4
SDATA
UPB201212T-800Y-N 5
+3VPCU BT_TH
6
PR172 GND
7 11
PR228 PC206 PC207 PR173 200/F_4 GND N
9
100K/F_4 0.1U/50V/X7R_6 0.1U/10V/X7R_4 PR166 200/F_4 G2
47K_4
[32] MBDATA
5

PR227
1 [32] MBCLK 10K/F_4
+
4 Check PN?

1
+3V 3 ADIN# [32] PD11 PD10
-
PU7
TEMP_MBAT [32]

MMPZ5232BPT(5.6V+-5%)

MMPZ5232BPT(5.6V+-5%)
PR229 PR226 G1331 PC165 PC164
2
1

16.9K/F_4 499_6

100P/50V/NPO_4

100P/50V/NPO_4

2
A
PC208 2 PC205 A
*0.1U/10V/X7R_4 0.1U/10V/X7R_4
PU8
3

LM431SACMF

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Charger (ISL88731A)
Date: Friday, October 29, 2010 Sheet 35 of 45

5 4 3 2 1
5 4 3 2 1

36
Place these CAPs
close to FETs
VIN VIN
PC65 PC63

1
+1.5V_SUS PC71 PC70 C-00

1
+ +

2200P/50V/X7R_4
0.1U/50V/X7R_6

10U/25V/X6S_12

10U/25V/X6S_12
25
+0.75V_DDR_VTT

2
1

1
PC74 PC69 PC72
TDC : 0.6A 1 24 PQ28 +1.5VSUS

GND
*0.1U/10V/X7R_4 10U/6.3V/X5R_8 10U/6.3V/X5R_8 VTTGND VTT PC61 AON6428L

5
2.2U/10V/X5R_6
D
Fs=400K D

2
+0.75V_DDR_VTT 2 23
+0.75V_DDR_VTT VTTSNS VLDOIN
PR66 PR61
PC57
0.1U/50V/X7R_6 4
TDC :18A(Imax)
*0_4 3 GND VBST 22 DDR_VBST OCP : 22A

1
2
3
C-00 2.2/F_6
4 21 DRVH
+1.5V_SUS PR65 MODE DRVH PL8
*0_4_short PCMC104T-1R0MN
5 20 DDR_LL +1.5V_SUS +1.5V_SUS
[5,13,14] SMDDR_VREF VTTREF LL

1
PR64

1
*0_4_short PC68 6 19 DRVL PC53 PC50 C-00
COMP DRVL

1
.033U/16V/X7R_4 ER4 + PC234 PC48

PR62
+ +

2
2.2_8

220U/2.5V/ESR15_7343

0.1U/10V/X7R_4
*220U/2.5V/ESR15_7343
7 18 4 4

2
NC PGND

330U/6.3V/ELEC_6344
PC60
EC6

10.2K/F_4
1
2
3

1
2
3
8 17 PQ27 1500P/50V/X7R_4

*1000P/50V/X7R_4
PR59 VDDQSNS CS_GND
AON6718L PQ26
*0_4 PR57 *AON6718L
EC-B-09 DDR_V5FILT 9 16 DDR_CS
VDDQSET CS
PR273 *0_4 8.87K/F_4
[3,7] SYS_PWROK S3 DDR_V5IN
10 S3 V5IN 15
PR52
5.1_6
PR58 100K/J_4 S3 S5 11 14 DDR_V5FILT
28,32,34,35,38,40,41] MAINON S5 V5FILT +5VPCU

PR60
PR53 B-00
1

1 2 12 13 PC51 *0_6_short
PC55 NC PGOOD 1U/10V/X5R_4 PC52
PD23 0.1UF/10V/X7R_4 1U/10V/X5R_4

10K/F_4
2

1SS355VM PU1
C C
RT8207LGQW
PR55 HWPG [10,32,37,38,40,41,42]
620K_6 PR56
PR54 0_4 *0_4_short
S5 VIN
[28,32,34] SUSON
PR249
1

PC54
*0.1U/10V/X7R_4 *SHORT-1A
2

DDR_COMP
PR63 *0_4_short

B B
DIS@AO4496(30V/10A) 4.7A
PQ30 DIS@AO4496(30V/10A) 3.55A
+1.5V_SUS +1.5V_GPU PQ21
+1.5V_GPU +15V +1.05V_PCH +1.05V_GFX_PCIE
8 3 +1.05V_GFX_PCIE +15V
7 2 8 3
6 1 7 2
5 6 1
1

PR91 PR77 PC75 PC78 PC56 PC62 PC59 5


1

1
DIS@22_8 DIS@1M_4 + + + PR46 PR47 PC46 PC45 PC47 PC40 PC38 PC128
4

1
DIS@10U/6.3V/X5R_8

DIS@10U/6.3V/X5R_8

*DIS@330U/2.5V/9m_3528

PC97 DIS@22_8 DIS@1M_4 + + +

4
DIS@10U/25V/X6S_12

DIS@10U/25V/X6S_12

DIS@10U/6.3V/X5R_8

DIS@10U/6.3V/X5R_8

*DIS@330U/2.5V/9m_3528
*DIS@0.1U/10V/X7R_4
2

DIS@10U/25V/X6S_12

DIS@10U/25V/X6S_12
3

*DIS@0.1U/10V/X7R_4
2

2
3
+5VPCU
+5VPCU
2
2
1

PR86 PQ37

1
DIS@100K/F_4 DIS@ME2N7002E PR49 PQ23
1

PC87 DIS@100K/F_4 DIS@ME2N7002E


2

3
*DIS@0.015U/50V/X7R_6 PC42

2
DIS@0.015U/50V/X7R_6
2
PR85 PD8 2
*DIS@1M_4 *1SS355VM PR48
PQ35 *DIS@1M_4
3

3
DIS@ME2N7002E MAINON 1 2 PQ20
1

PR89 DIS@ME2N7002E

1
DIS@10K_4
[38,39] NVVDD_PG 2 PQ36 2
DIS@ME2N7002E [9,15,39] GFXON
PQ22
PC96 DIS@ME2N7002E
A A
DIS@1U/6.3V_4
1

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR3/0.75V(RT8207LGQW)
Date: Friday, October 29, 2010 Sheet 36 of 45

5 4 3 2 1
5 4 3 2 1

37
D D

5V_AL

PR205
39K/F_4

3V5V_EN
[29,42] SYS_SHDN#
PR206
*0_4_short

VIN VIN

1
C-00 PC183 PC170
RF15 + + VIN VIN
10U/25V/X6S_12

10U/25V/X6S_12
*10P/50V/COG_4

1
PC184 PC169 RF16 C-00
+ +

10U/25V/X6S_12

10U/25V/X6S_12
5V_AL

*10P/50V/COG_4
PR189

2
PR187 *10/F_6
4.7/F_6

PC171 Place these CAPs


PR190 4.7U/10V/X5R_8
C
390K_4
close to FETs C

Place these CAPs PC175


PR194 *0_4_short
close to FETs

1U/10V/X5R_4
PC172 PR192 PC186 PC185

1
PC173 1U/25V/X5S_6 *0_4_short
+3VPCU

2200P/50V/X7R_4
0.1U/50VX7R_6
PC188 PC187 0.1U/50V/X7R_6
PR188 PC174 PQ69 Fs=500K

2
2

5
6
7
8
2200P/50V/X7R_4
0.1U/50V/X7R_6

*0_4 0.1U/10V/X7R_4 AO4496(30V/10A)

1
REFIN2
REF DH3 4
TDC :8A(Imax)
+5VPCU
1

PR193
OCP : 10A
Fs=400K PQ72
8
7
6
5

AO4496(30V/10A) PR195 *0_4

1
2
3
TDC : 8A(Imax) 150K/F_4 +3VPCU

8
7
6
5
4
3
2
1
4 DH5
OCP : 10A PL1

REF
LDOREFIN

VIN
NC

VCC
TON
LDO

EN_LDO
2.2UH-PCMC063T-2R2MN
LX3 1 2 OUT2
3
2
1

PR196

2
+5VPCU OUT1 9 32 REFIN2 324K/F_4
PL2 BYP REFIN2
10 31
OUT1 ILIM2

5
6
7
8

1
2.2UH-PCMC063T-2R2MN 11 30 ER8 RF17 PC192
OUT1 LX5 FB1 PU9 OUT2 SKIP *2.2_8 + PC189
1 2 12
ILIM1 SKIP#
29 PQ70

0.1U/10V/X7R_4
*10P/50V/COG_4
DDPWRGD_R 13 RT8206MGQW 28 DDPWRGD_R 4 PC190

2
POK1 POK2
2

PR201

220U/6.3V/ELEC_6344
3V5V_EN 14 27 3V5V_EN

2
EN1 EN2

4.7U/10V/X5R_8
ER9 294K/F_4 15 26 AO4712(30V,11.2A) EC16
UGATE1 UGATE2
1

8
7
6
5

PC196 PC193 RF18 PR197 *2.2_8 16 25 *1500P/50V/X7R_4

1
2
3
PHASE1 PHASE2
1

*0_4 37
PAD
0.1U/10V/X7R_4

4.7U/10V/X5R_8

LGATE1

LGATE2
*10P/50V/COG_4

+ PC191 4 DL5 36 PR200

BOOT1

BOOT2
2

PAD

PGND
PVCC
*0_4_short

GND
PAD
PAD
PAD
PC179
220U/6.3V/ELEC_6344

NC
2

EC17 PQ71 PC178 0.1U/50V_6


3
2
1

PR199 *1500P/50V/X7R_4 0.1U/50V_6 PR209

35
34
33

17
18
19
20
21
22
23
24
*0_4_short PR207 2.2/F_6
B 2.2/F_6 B
DL3

2
AO4712(30V,11.2A)
PC177
5V_AL PR198
1 0.1u/25V/X5R_4 *0_4
PR204 *0_6_short PR191

1
3 2 1 DL3 *SHORT-1A

2 PD14 PC180
2

BAT54SGP
1U/10V/X5R_4

PC176
2

0.1u/25V/X5R_4
1

PC182 1
0.1u/25V/X5R_4
1

2 PD13
BAT54SGP B-00
PR208
22_8 PR212 *0_6
2 1 +15V_ALWP 1 2 5V_AL
+15V
PR211 PR210
2

*200K/F_4 *39K/F_4 DDPWRGD_R


PC181 SKIP HWPG [10,32,36,38,40,41,42]
0.1u/25V/X5R_4 PR203
1

PR202 *0_4_short
*0_4_short
AGND_DC/DC

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
3V/5V (RT8206MGQW)
Date: Friday, October 29, 2010 Sheet 37 of 45

5 4 3 2 1
5 4 3 2 1

38
D D

+1.8V
TDC : 2A
+3VPCU_1.8V
+3VPCU +1.8V

C-00 C-00
PC160 PC159

10U/6.3V_8

0.1U/10V_4
PU6 HPA00835RTER
16 VIN PH 10

1 11 PL3
VIN PH 1UH/11A-PCMD063T-1R0MN
2 12 1 2 +1.8V_L
VIN PH PC144
PR159 PR148
15 EN BOOT 13 1 2 1 2
[9,24,28,32,34,35,36,40,41] MAINON *0_6_short
0_4
14 6 0.1U/25V_4 RF20
[10,32,36,37,40,41,42] HWPG PWRGD VSNS
1 PC152 7 3 PR162 PC210 PC212 PC211

*10P/50V/COG_4
C COMP GND 127K/F_4 C

0.1U/10V_4

10U/6.3V_8

10U/6.3V_8
R1
*0.01U/50V_4
2

8 RT/CLK GND 4

PAD
PAD
PAD
PAD
PAD
PAD
9 5 HPA00835-1.8_VFB
PR158 PR157 SS AGND

2
15K/F_4

182K/F_4

22
21
20
19
18
17
1

1
PC157 R2 PR161
PC150 100K/F_4
*100P/50V_4
2

0.01U/50V_4
2

1
1
PC156

1200p/50V_4
2 V0=0.8*(R1+R2)/R2

DIS@AO6402A
0.3A PQ19
+1.8V_GPU +1.8V +1.8V_GPU
+15V
6
B 5 4 B
2
1
PR40 PR44 PC39
DIS@22_8 DIS@1M_4 DIS@0.1U/10V_4 PC43

3
DIS@0.1U/10V_4
3

+5VPCU
2

PR41 PQ16
DIS@100K/F_4 DIS@ME2N7002E

*DIS@2200P/50V_4
1

PC41
2
PR42
*DIS@1M_4
3

PQ17
PR45 DIS@ME2N7002E
1

A DIS@0/J_4 A
2
[36,39] NVVDD_PG
PQ18
PC44 DIS@ME2N7002E PROJECT KL5A
*DIS@0.1U/10V_4
Quanta Computer Inc.
1

Size Document Number Rev


Custom 1A
+1.8V (HPA00835RTER)
Date: Friday, October 29, 2010 Sheet 38 of 45
5 4 3 2 1
5 4 3 2 1

39
Place these CAPs
close to FETs
VIN
VIN
D D

1
PC223 PC227 PC228 PC229 PC90 PC83 C-00
+5VPCU

2200P/50V/X7R_4

0.1U/50V/X7R_6

10U/25V/X6S_12

10U/25V/X6S_12

*10U/25V/X6S_12
1U/10V/X5R_4
PR240 PR105

2
1
PR126 22_6 PC110 PD22 *0_6_short
100K_4 1U/10V/X5R_4 1SS355VM

1
2
GFX_CORE

1
PQ91
AGND_VGPU AON6428L Fs=300K

5
PR100
*0_6_short PC102
TDC : 19A(Imax)

5
PC117
0.01U/25V/X7R_4
0.22U/25V/X5R_6 OCP : 34A
4

VIN
12 16 GFX_CORE_HDR
VDDP HDR GFX_CORE
B-00 C-00

1
2
3
18 15 GFX_CORE_BST
VDDA BST
PR110 PL7 B-00
0_4 0.36uH/ETQP4LR36AFC
[9,15,36] GFXON 3 17 GFX_CORE_LX GFX_CORE
ON/SKIP LX
PU3

PC233

PC58
PC113 GFX_CORE_VSET1 7 OZ8117
VSET1

0.1u/25V/X5R_4 PC232
*10P/50V/COG_4 RF21
1 2 *0.1U/25V/X5R_4 13 GFX_CORE_LDR PR97
GFX_CORE_VSET2 LDR ER5 20K/F_4 PC64 PC231
8 VSET2

1
PD21 2.2_8 + +

330U/2V/ESR9_7343

330U/2V/ESR9_7343
*1SS355VM PR235 GFX_CORE_G0 9 19 GFX_CORE_CSP 4 4
G0 CSP

1500P/50V/X7R_4

10U/6.3V_8

10U/6.3V_8
*0_4 PR119 10K/F_4

2
GFX_CORE_G1 10 20 GFX_CORE_CSN PQ29
+3V

1
2
3

1
2
3
G1 CSN

EC7
AON6718L PR90 PR248
GFX_CORE_TEST 6 11 1 2 20K/F_4 10K/J_6_NTC
TSET PG NVVDD_PG [36,38] PR88
GFX_CORE_VREF 4 1 GFX_CORE_RSP PR113 51.1/F_6
VREF RSP *0_4_short PC95
C
PQ31 C
2 GFX_CORE_RSN AON6718L 0.033U/50V/X7R_6
RSN
1

PC115
2

0.1U/25V/X5R_4 Close To VGPU Discrete

1
PR236 21 14 PC226
2

0_4 GNDA GNDP 1000P/50V/X7R_4 Power Rail Side


B-00 PR95 PR243

2
AGND_VGPU 681/F_4 1 2
1

AGND_VGPU 10_4
GFX_CORE_CSP
PR237 AGND_VGPU
GFX_CORE_CSN PR239
51/F_6

1
AGND_VGPU *SHORT-1A PC101 GFX_CORE_RSP GFX_CORE
22P/50V/NPO_4
AGND_VGPU

2
GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 +VCC_GFX_CORE PC105
0.01U//50V/X7R_4
X 0 0.925V AGND_VGPU
PR238
X 0 0.925V AGND_VGPU 51/F_6
GFX_CORE_RSN
X 1 0.925V
X 1 0.925V PC108
0.01U//50V/X7R_4

AGND_VGPU

B B

GFX_CORE_VREF
B-00

+5VPCU +5VPCU
C-00
PR79 PR80
82.5K/F_4 20K/F_4
1

C-00 GFX_CORE_VSET2 GFX_CORE_TEST


PR124 PR117 PR106 PR242

3
*10K_4 10K/F_4 *10K_4 *10K_4

1
PR247 PC217 PC219

1
*294K/F_4 1000P/50V/X7R_4 PR82 1000P/50V/X7R_4
2

GFX_CORE_G0 GFX_CORE_ACT# GFX_CORE_ACT 2 80.6K/F_4

2
2
3

PC216 PC215 C-00 PR246

1
2

*1000P/50V/X7R_4 *1000P/50V/X7R_4 PQ92 11.3K/F_4 AGND_VGPU


C-00 PR118 PR107 *ME2N7002E

1
*0_4 2 *0_4 GFX_CORE_ACT 2 AGND_VGPU
2

AGND_VGPU
3

AGND_VGPU AGND_VGPU 2 1 GFX_CORE_VSET1


1

2 PQ87 2 PQ88
[18] GFX_CORE_CNTRL0 [18] GFX_CORE_CNTRL1

3
*ME2N7002E *ME2N7002E PR78
1

1
PR125 PR244 PQ89 PR83 0_4 PC218
1

*10K_4 PQ86 *10K_4 42.2K/F_4 1000P/50V/X7R_4


GFX_CORE_ACT# 2

2
PR43 PR39
100K_4 *MMBT3904WT1G *100K_4 *MMBT3904WT1G
PQ90 AGND_VGPU
*ME2N7002E AGND_VGPU

1
A A
AGND_VGPU

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+VGPU_CORE (OZ8117)
Date: Friday, October 29, 2010 Sheet 39 of 45
5 4 3 2 1
5 4 3 2 1

40
D
VIN
VIN D

1
PC133 PC135 PC137 PC122 PC121 C-00
+5VPCU RF22

2200P/50V/X7R_4

0.1U/50V/X7R_6

10U/25V/X6S_12

*10U/25V/X6S_12
PR122 PR121

1U/10V/X5R_4

2
1
PR120 22_6 PC119 PD7 *0_6_short

*10P/50V/COG_4
100K_4 1U/10V/X5R_4 1SS355VM

1
2
2

1
AGND_0.85V +0.85V
PR131
Fs=300K
*0_6_short PC134 PQ46 TDC :6A(Imax)

5
6
7
8
PC116 0.22U/25V/X5R_6 AO4496(30V/10A)
0.01U/25V/X7R_4 OCP : 8A

VIN
12 16 +0.85V_HDR 4
VDDP HDR
B-00
18 15 +0.85V_BST
VDDA BST

1
2
3
PR129 PL5 B-00
0_4 1UH/11A-PCMD063T-1R0MN
[9,24,28,32,34,35,36,38,41] MAINON 3 17 +0.85V_LX 1 2 +0.85V +0.85V
ON/SKIP LX

1
PC123 +0.85V_VSET1 7 PU4 RF23
*0.1U/25V/X5R_4 VSET1 +0.85V_LDR
1 2 OZ8117 13 C-00

1
+0.85V_VSET2 LDR PR138 PC263 PC264 PC225 PC224
8

*10P/50V/COG_4
2

1
PD5 VSET2 ER10 100K_4 + PC222 +
*1SS355VM +0.85V_G0 9 19 +0.85V_CSP *2.2_8

*330U/2V/ESR9_7343
G0 CSP

10U/6.3V/X5R_6

0.1u/25V/X5R_4
*22U/6.3V_8
330U/6.3V/ELEC_6344
2

2
5
6
7
8
+0.85V_G1 10 20 +0.85V_CSN

1
1
PC114 G1 CSN
*1000P/50V/X7R_4 +0.85V_TEST 6 11 4 EC19
C TSET PG PR140 C

*1500P/50V/X7R_4
+0.85V_VREF 4 1 +0.85V_RSP 60.4K/F_4 PR142
VREF RSP 51.1/F_6

1
2
3
2 +0.85V_RSN PQ41 B-00
1
AGND_0.85V PC118 RSN PC136
AO4712(30V,11.2A)
0.1U/25V/X5R_4 PR115 *10K/F_4 4700P/25V/X7R_4
21 14 +3V
2
GNDA GNDP

1
1 2 PR137 PC139
HWPG [10,32,36,37,38,41,42]
2

AGND_0.85V AGND_0.85V 604/F_4 1000P/50V/X7R_4


PR114 PR234 PR116

2
*0_4_short *short *0_4_short
+0.85V_CSP
1

+0.85V_CSN AGND_0.85V

1
1
AGND_0.85V PC131 PR136
AGND_0.85V 22P/50V/NPO_4 10_4

2
VCCSA_SEL VCCUA(+0.85V) AGND_0.85V
0 0 0.9V PR134
51/F_6
0 1 0.8V +0.85V_RSP VCCUSA_SENSE [5]

PC129
0.01U//50V/X7R_4

PR132
AGND_0.85V 51/F_6
B +0.85V_RSN B

PC126
0.01U//50V/X7R_4
+0.85V_VREF

+5VPCU B-00 AGND_0.85V

PR102 PR101 GND Close To Sandy Bridge Processor


91K/F_4 36K/F_4
(POWER) Side
PR128 PR112
*10K_4 *10K_4 +0.85V_VSET1
1

+0.85V_G0 PC112 +0.85V_TEST


1000P/50V/X7R_4
3

PR109
2

2
15K/F_4
2

1
PR108 PC111
PR111 2 80.6K/F_4 1000P/50V/X7R_4
*0_4_short B-00 AGND_0.85V

2
1
3

PQ42
1

2 *ME2N7002E +0.85V_VSET2
[5] VCCSA_SEL
1

PQ45 AGND_0.85V AGND_0.85V


PR123 *MMBT3904WT1G PR103
1

*10K_4 28.7K/F_4 PC106


1000P/50V/X7R_4
2

A A

AGND_0.85V AGND_0.85V

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+0.85V (OZ8117)
Date: Friday, October 29, 2010 Sheet 40 of 45
5 4 3 2 1
5 4 3 2 1

41
D D

VIN
VIN

1
PC100 PC88 PC89 PC93 PC92 C-00
+5VPCU
RF24

2200P/50V/X7R_4

0.1U/50V/X7R_6

10U/25V/X6S_12

10U/25V/X6S_12
PR74 PR73

1U/10V/X5R_4

2
1
PR75 22_6 PC85 PD4 *0_6_short

*10P/50V/COG_4
100K_4 1U/10V/X5R_4 1SS355VM +1.05V_PCH

1
2
Fs=300K

1
AGND_1.05V_PCH PQ39 TDC :18A(Imax)
AON6428L
PR81 OCP : 22A

5
*0_6_short PC99

5
PC82 0.22U/25V/X5R_6
0.01U/25V/X7R_4

VIN
12 16 1.05VPCH_HDR 4 +1.05V_PCH
VDDP HDR
B-00
18 15 1.05VPCH_BST C-00

1
2
3
VDDA BST
PR76 PL6
0_4 0.36uH/ETQP4LR36AFC
[9,24,28,32,34,35,36,38,40] MAINON 3 17 1.05VPCH_LX +1.05V_PCH
ON/SKIP LX
1

PC86 1.05VPCH_VSET1 7 PU2


*0.1U/25V/X5R_4 VSET1 1.05VPCH_LDR
OZ8117

RF25
1 2 13

1
LDR PC77
8 PQ33 PQ34
2

VSET2

1
PD3 *AON6718L AON6718L ER6 PR94 + PC230 + PC73 PC67 PC66

5
*1SS355VM 9 19 1.05VPCH_CSP 2.2_8 20K/F_4 +

*10P/50V/COG_4
G0 CSP

10U/6.3V/X5R_6

0.1u/25V/X5R_4
2

2
330U/2V/ESR9_7343

*330U/2V/ESR9_7343
330U/6.3V/ELEC_6344
10 20 1.05VPCH_CSN
G1 CSN
4 4
C 1.05VPCH_TEST 6 11 EC9 C
TSET PG PR98 PR241

1
2
3

1
2
3

1500P/50V/X7R_4
1.05VPCH_VREF 4 1 1.05VPCH_RSP 20K/F_4 10K/J_6_NTC PR104
VREF RSP 51.1/F_6
2 1.05VPCH_RSN
RSN
1

PC84 PC103
0.1U/25V/X5R_4 PR71 *10K/F_4 0.033U/50V/X7R_6
21 14 +3V
2

GNDA GNDP

1
1 2 PC104
AGND_1.05V_PCH HWPG [10,32,36,37,38,40,42] B-00 1000P/50V/X7R_4
PR245 PR72 PR93

2
AGND_1.05V_PCH *short *0_4_short 330/F_4

1
1.05VPCH_CSP
PR99
1.05VPCH_CSN AGND_1.05V_PCH 10_4
AGND_1.05V_PCH

1
PC98

2
AGND_1.05V_PCH 22P/50V/NPO_4

2
PR92
51/F_6
AGND_1.05V_PCH 1.05VPCH_RSP VTT_SENSE [5]

PC94
0.01U//50V/X7R_4

PR84
AGND_1.05V_PCH 51/F_6
1.05VPCH_RSN

PC91
0.01U//50V/X7R_4
B B

GND Close To Sandy Bridge Processor


AGND_1.05V_PCH
(POWER) Side

DIS@AO6402A 1.14A
PQ50
+3V_GPU +3V +3V_GPU
+15V
1.05VPCH_VREF 6
5 4
B-00 2
1

1
PR145 PR149 PC155 PC143

1
PR69 PR68 DIS@22_8 DIS@1M_4 +

DIS@10U/6.3V/X5R_8
84.5K/F_4 20K/F_4 PC49

DIS@10U/25V/X6S_12
*DIS@0.1U/10V/X7R_4

2
3

1.05VPCH_VSET1 +5VPCU

2
1

PC80 1.05VPCH_TEST
PR70 1000P/50V/X7R_4

1
52.3K/F_4 PR146 PQ49
2

DIS@100K/F_4 DIS@ME2N7002E
1
1

PR67 PC79 PC153

2
80.6K/F_4 1000P/50V/X7R_4 *DIS@0.015U/50V/X7R_6
AGND_1.05V_PCH [15] +3V_GPU_EN +3V_GPU_EN
2

2
1

PR156
*DIS@1M_4
3

AGND_1.05V_PCH AGND_1.05V_PCH PD9 PQ48


*DIS@1SS355VM DIS@ME2N7002E
1

A A
AGND_1.05V_PCH MAINON 1 2 2

PQ47
DIS@ME2N7002E
1

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
C 1A
+1.05_PCH (OZ8117)
Date: Friday, October 29, 2010 Sheet 41 of 45

5 4 3 2 1
5 4 3 2 1

PD2
*1SS400 EL2 VIN

42
1 2 PR26 B-00 UPB201212T-800Y-N
2.2/J_6 VCC_GT_VIN VCC_GT_VIN
BOOT_GT
PR5

2200P/50V_4
10U/25V_1206

10U/25V_1206
100K/F_4 PC22 PC29

0.1U/50V_6
1 2 330P/50V_4 0.22U/25V/X5R_6 PQ3 PQ93
[32] VRON

PC15

PC19
AON6428L AON6428L

PC249

PC254
5

5
1 2 SHDN
[10,32,36,37,38,40,41] HWPG [5] VCC_AXG_SENSE VSS_AXG_SENSE
PR11
[5] VSS_AXG_SENSE
*0_4 PC9 UGATE_GT 4 4
100P/50V/X7R_4 PC261 PR8 PC23 B-00 C-00
1 2 330P/50V_4 2K/F_4 B-00 1000P/16V_4 PL10
D
+VCC_GFX D

1
2
3

1
2
3
[29,37] SYS_SHDN# 0.36uH
PHASE_GT
PD1
*1SS400
PR19
2.7K/F_4 PR264
1 2 +VCC_GFX Iccmax=33A

11K/F_4

5
PC14 39P/50V_4 7.5K/F_4 OCP : 40A

453/F_4
*100/F_4 *220P/50V_4

4
ER2
PC34 PC236 PC260

2.2_8
0.1U/10V_4

0.033U/16V_4
+VIN_VCC_CORE1

PC243
+ + +

330P/50V_4
ISPG

PC21

PC247

PC250
4 4

330U/2V/ESR9_7343

330U/2V/ESR9_7343

330U/2V/ESR9_7343
+5V PC13 PR17 PC17 PR22 ISNG

0.1U/10V_4
150P/50V_4 475K/F_4

1500P/50V/X7R_4
680P/50V_4 412/F_4

PC248

1
2
3

1
2
3
PR32 LGATE_GT

PR259

PR260

PR261

EC2
*0_6_short
PC5 1000P/16V_4 PR256 PQ4 PQ7
PR254

10K/J_6_NTC AON6718L AON6718L B-00


1/J_6

+5V NTC Place near the +VCC_GFX O/P Inductor

48

47

46

45

44

43
0.22U/25V_6

1
PR7 PR267 10K/F_6
8.06K/F_4 ISPG
PC30
1U/10V/X5R_4

VWG

COMPG

FBG

VSENG

RTNG

ISPG

ISNG
1

PR251 BOOT_GT ISNG PR262 1/F_4


PC242

23 40
*0_6_short VIN BOOTG
2

22 39 UGATE_GT
VDD UGG EL1
31 38 PHASE_GT PR29 UPB201212T-800Y-N
VDDP PHG 2.2/J_6 +VIN_VCC_CORE1
SHDN LGATE_GT BOOT_1 VIN
7 37
1U/10V/X5R_4
*1U/10V/X5R_4
1

VR_ON LGG PC255 PC259

2200P/50V_4
10U/25V_1206

10U/25V_1206

1
PC26
PC238

PC241

0.1U/50V_6
PGOODG 0.22U/25V/X5R_6 + +

100U/25V/105C

100U/25V/105C
2

PC2

PC1

PC6
PU11 BOOT_1 PQ1

PC12
8 25
PGOOD BOOT1

5
C +3V ISL95831HRTZ AON6428L C

2
VGT_IMON_EC 2 26 UGATE_1
[32] VGT_IMON_EC NC1 UG1
VCORE_IMON_EC 9 27 PHASE_1 UGATE_1 4
[32] VCORE_IMON_EC
2

NC2 PH1
1.91K/F_4
*1.91K/F_4

H_PROCHOT# [3,32]
LGATE_1 PL11
PR272

PR268

10 29

1
2
3
VR_HOT# LG1 0.36uH
[5] VR_SVID_ALERT# PR270 *0_4_short 5 28 PHASE_1 1 2
PC257 ALERT# VSSP1 +VCC_CORE Close to ISL9583 Vin input point
1

5
39P/50V_4 [5] VR_SVID_DATA PR271 *0_4_short 4

4
SDA

ER1
2.2_8
PR269 *0_4_short 6 36 BOOT_2

0.1U/10V_4

10U/6.3V_8
[32] GFX_PWRGD [5] VR_SVID_CLK SCLK BOOT2
4 4
35 UGATE_2
[7] IMVP_PWRGD UG2

1500P/50V/X7R_4
C-00

PC36

PC35
1
2
3

1
2
3
42 34 PHASE_2 +5V LGATE_1
NTCG PH2

EC1
11 32 LGATE_2 PQ2 PQ5
PR252 4.32K/F_4 NTC LG2
AON6718L AON6718L
NTC Place near the 24 33 PR253
27.4K/F_4
470K/J_4_NTC

PROG1 VSSP2
PR3
PR12

+VCC_CORE HS-FET *0_4_short


PR255 *16.5K/F_4 41 VSUM+ PR25 3.65K/F_6
PROG2
45W CPU
*0.1U/10V_4

12 30 VR_PWM3
PC7 VW LGATE1b/PWM3 ISEN_1 PR24 10K/F_4
Vcore Icc_MAX = 94A PR252 = OPEN
1000P/16V_4
PC10

13
COMP
VGT Icc_MAX = 33A PR255 = OPEN
3.83K/F_4

ISEN3/B2
PR2

14 49 VSUM- PR18 1/F_4

ISUMN

ISUMP
FB EP

ISEN2

ISEN1
VSEN
PR9 8.06K/F_4
RTN
35W CPU
B B
Vcore Icc_MAX = 53A PR252 = 7.87K
18

19

15

16

17

20

21
PR14 c-00 EL3
VGT Icc_MAX = 24A PR255 = 16.5K 3.09K/F_4 PR30 UPB201212T-800Y-N
PC4 22P/50V_4 2.2/J_6 +VIN_VCC_CORE2
BOOT_2 VIN
PR257

11K/F_4
+VCC_CORE

2200P/50V_4
*330P/50V_4

10U/25V_1206

10U/25V_1206
2.61K/F_4 PC31
PC253

1.1K/F_4
27.4K/F_4

0.1U/50V_6
470K/J_4_NTC

Iccmax=53A
PR28

PR27

PC3 PR6 0.22U/25V/X5R_6 PQ6

0.068U/10V_4
150P/50V_4 316K/F_4 PC11 PR15 VSUM+ AON6428L

PC18
PC239

PC252

PC240
0.1U/50V_6
0.22U/10V_6

5
NTC Place near the B-00 470P/50V_4 499/F_4 VSUM- OCP : 65A

PC245
*0.1U/10V_4
PC28

PC251

PC246

0.1U/10V_4
+VCC_GFX HS-FET

PC244
PC256 10P/50V_4 UGATE_2
PR265

PR258
4
*100/F_4

PC262 PR16 PR250


PR263
3.83K/F_4

470P/50V_4 2K/F_4 10K/J_6_NTC PL9


PR31

1
2
3
0.36uH
PHASE_2 1 2 +VCC_CORE
NTC Place near the +VCC_CORE phase 1 Inductor

5
PC24
330P/50V_4

4
ER3
PR13 330P/50V_4 PC37 PC237 PC32 PC235 PC33
PC25

2.2_8
*0_4_short + + + + +
[5] VCC_SENSE 4 4

330U/2V/ESR9_7343

330U/2V/ESR9_7343

330U/2V/ESR9_7343

330U/2V/ESR9_7343

330U/2V/ESR9_7343
1500P/50V/X7R_4
[5] VSS_SENSE

1
2
3

1
2
3
PR4 LGATE_2

EC4
*0_4_short PC27 PC20 0.22U/25V_6 C-00
1000P/16V_4 ISEN_1 PQ10 PQ8
AON6718L AON6718L
PC16 0.22U/25V_6
VCORE_IMON_EC VGT_IMON_EC ISEN_2 VSUM-
A
VSUM+ PR20 3.65K/F_6 A

PR10 PC8 PC258


27.4K/F_4 0.015U/16V/X7R_4 PR266 0.022U/16V/X7R_4 ISEN_2 PR21 10K/F_4
18.2K/F_4

VSS_SENSE VSS_AXG_SENSE VSUM- PR23 1/F_4


PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
IMVP7 2+1 (ISL95831)
Date: Friday, October 29, 2010 Sheet 42 of 45
5 4 3 2 1
5 4 3 2 1

Huron River
1 5VPCU 5VPCU
12 HWPG(All Power GOOD)
VTTPWRGOOD
ADP IN Charger
VIN 5 5V_S5 PM_DRAM_PWRGD
Circuit MAX17020ETJ+ 1 3VPCU SM_DRAMPWROK
BAT
ISL88731A AO6402A
H_PWRGOOD
UNCOREPWRGOOD
4
3VPCU
HWPG(3/5VPCU) S5_ON PLTRST#
1a
RSTIN# Madison
D 5 3V_S5 D

26
3VPCU AO6402A GPU_RST#

3VPCU 5VPCU
DGPU_HOLD_RST#

PLTRST#
DRAMPWROK
2 WRST_8512# 25 +VCC_CORE
R WRST# 6 RSMST# RSMRST#
470K GPIO
C 0.1U 7 SIO_PWRBTN# 14
PWRBTN#

3 NBSWON#
EC 8a PM_SLP_S4# SYS_PWROK
IMVP_PWRGD
VR1_READY
VRON
8b PM_SLP_S3# PWROK
MEPWROK
ITE-8518 GPIO
DGPU_PWR_EN#
PCH

0ohm
R
GPIO GFXPG_R
12 HWPG(All Power GOOD)
DELAY 99mS
13 ECPWROK

12a VRON

1a HWPG(3/5VPCU)
VIN

C C
10a HWPG(+1.5VSUS)

TPS51116REGR
9a SUSON 10a +1.5V_SUS VIN
10b +1.05V_VTT

10d
0.75VSMDDR_VTERM
OZ8115
LDO 11b HWPG(+1.05V_VTT)

10c +1.5VCPU_PG
5VPCU VIN
10b +1.05_PCH
HWPG(All Power GOOD)

10a 5VSUS
AO6402A OZ8115
11b HWPG(+1.05V_VTT)

3VPCU
VIN
10b +1.8V

10a 3VSUS
AO6402A
OZ8115
11b HWPG(+1.8V)

9b MAINON
VIN
10b +0.85V
B B

VIN
OZ8115
20a 11b HWPG(+0.85V)
19c GFX_CORE
19a
DGPU_PWR_EN# MAX8792
5VPCU
19b
10b +5V

AON7410
GFXPG_1V_EN

1.5VSUS

+1V_GFX_PCIE 3VPCU
LDO
10b +3V
RT9018B
AON7410

+3V
1.5VSUS
+3.3V_DELAY
+1V_PCIE_PG

10b +1.5V
AO6402A
AO6402A
1.5VSUS
A A
22a
+1.5V_GPU
1.5VSUS
TPCA8030-H
10b +1.5VCPU
10c +1.5VCPU_PG
AO6402A Delay
+1.8V
PROJECT KL5A
HWPG
23a 12
24 GFXPG_R Quanta Computer Inc.
+1.8V_GPU
AO6402A Delay Size Document Number Rev
DGPU_PWROK A2
Power Sequence diagram 1A

Date: Friday, October 29, 2010 Sheet 43 of 45


5 4 3 2 1
5 4 3 2 1

KL5A / Z370 Huron River Schematic EC Tracking Record A ( for SDV --> SIV,B )August 5, 2010
EC # Page CMVC# Description Date Part Affected
B-00 24 Separate D25 to two single Diodes. 0816,1100 D25
D B-01 10,22 Add Color Engine detect pin(PCH GPIO 70). 0816,1100 U17 D

B-02 9,27,28 Reserve USB3.0 solution for LC request. 0816,1500 U41


B-03 9 Modify PH of PCIE_CLKREQ_WLAN/LAN# to +3V for avoiding leakage current. 0816,1500 U17
B-04 10 Make Board ID table for BIOS control. 0816,1500
B-05 26 Modify sch of card reader. 0818,1500 U25, CN9
B-06 10 NC R526 for boot issue. 0824,1500 R526
B-07 22 Add 2.2K PH for LVDS EDID used. 0824,1500 R633, R634
B-08 27 Correct the debug pin defition 0825,1400 CN13
B-09 36 Add SYS_PWROK connect to the net "S3" for S3 issue 0825,1400 PU1
SC1,SC2,,SC3,SC4,SC5,
C SC6,SC7,SC8,SC9,SC10, C

B-10 33 Add some capacitors for ESD 0902,1900 SC11,SC12,SC13,SC14,SC15,


SC16,SC17,SC18,SC19,SC20,
SC21,SC22,SC23,SC24,SC25,
SC26,SC27,C28
B-11 10 add USB30_ID at GPIO24 & add GPIO13 for ID3 0907,1200 U17

B B

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
EC Tracking Record A
Date: Friday, October 29, 2010 Sheet 44 of 45
5 4 3 2 1
5 4 3 2 1

KL5A / Z370 Huron River Schematic EC Tracking Record B ( for SIV to SIT )September 8, 2010
EC # Page CMVC# Description Date Part Affected
C-00 15-19 GPU change to N12M-GS 0908,1000 U28
RF1,RF2,RF3,RF4,RF5,
D D
9,22,27, RF6,RF7,RF8,RF9,RF10,
C-01 37,38,39, Add RF soultion 0913,1300 RF11,RF12,RF13,RF14,RF15,
40,41 RF16,RF17,RF18,RF20,RF21,
RF22,RF23,RF24,RF25,RF26,
RF27
C-02 31 Change LED3 power from +3V_S5 to +3VPCU for Power LED always bright 0925,1100 LED3
R87,R253,R217,R224,R274,
3,4,7,8, R339,R344,R351,R375,R376,
C-03 10,20,23 R377,R378,R387,R397,R402,
Remove 0 ohm 1011,1700
,24, R409,R410,R423,R424,R425,
R428,R429,R437,R430,R431,
C
R545,R587 C
C-04 9 Remove U13 for delete 27Mhz clock signal form PCH 1015,1400 U13

B B

A A

PROJECT KL5A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
EC Tracking Record A3
Date: Friday, October 29, 2010 Sheet 45 of 45
5 4 3 2 1
www.s-manuals.com

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