Anti-fuse Programming Technology

An alternative to SRAM and flash-based technologies is anti-fuse programming technology. The

primary advantage of anti-fuse programming technology is its low area. Also this technology has lower
on resistance and parasitic capacitance than other two programming technologies. Further, this technology
is non-volatile in nature. There are however significant disadvantages associated with this programming
technology. For example, this technology does not make use of standard CMOS process. Also, anti-fuse
programming technology based devices cannot be reprogrammed. In this section, an overview of three
commonly used programming technologies is given where all of them have their advantages and
disadvantages. Ideally, one would like to have a programming technology which is reprogrammable, non-
volatile, and that uses a standard CMOS process. Apparently, none of the above presented technologies
satisfy these conditions. However, SRAM-based programming technology is the most widely used
programming technology. The main reason is its use of standard CMOS process and for this very reason,
it is expected that this technology will continue to dominate the other two programming technologies.

Unlike reconfigurable SRAM-based FPGAs, antifuse-based solutions are one-time programmable

(OTP). With SRAM solutions, if a design change is necessary, then an upgrade can be made at the last
minute before launch, or if the system is designed for it, even in space. This reprogram ability comes at a
significant price, since the volatile nature of the reprogrammable memory used to configure SRAM
FPGAs is responsible for their intrinsic radiation softness and the extra system complexity required to
counteract that softness. With antifuse, it is not possible to reconfigure the FPGA once it has been
programmed and soldered to the board, although in most mission-critical applications it is very unlikely
that late-breaking design changes will be encountered.

In many ways, ASICs have a greater similarity to antifuse-based devices than they have to SRAM
solutions. Historically, SRAM FPGA density has far exceeded antifuse, which has limited antifuse-based
FPGAs to bus applications where reliability was paramount and smaller densities were acceptable.
However, the latest generation of radiation-tolerant antifuse products from Actel, called the RTAX-S
family, have closed this gap significantly and now offer up to two million equivalent system gates,
enabling designers to consider antifuse FPGAs for both bus and payload applications.

When comparing FPGA alternatives, important advantages of antifuse include the inherent nonvolatility
and the lack of mandatory device configuration at every power-up. Like ASICs, it is this live-at-power-up
capability that makes antifuse a true single-chip solution. As such, antifuse FPGAs simplify board-level
design and minimize weight and board space. Gone is the need for PROMs to store the bit stream or a
CPLD to control the boot-up of the board. Further, additional circuitry or processor routines are not
required to capture brownout or power glitch information since the configuration cannot be erased. Once
the FPGA design is complete, no further effort is needed to design all the support circuitry into the
system, nor is additional time wasted debugging all the possible power-up scenarios.
In addition, antifuse FPGAs do not suffer from in-rush current issues, as do their SRAM counterparts.
This power-up friendly profile simplifies the system design, allows the power supply to be properly sized
to the dynamic current requirements of the system and eliminates the need for a complex FPGA and
board boot-up scheme.