Lect # 06, Floyd, CH # 06 - Adder, Subtractor, Multiplier, Comparator PDF

Digital
Fundamentals
Tenth Edition
Floyd
Chapter 6
© 2008 Pearson Education

Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Functions of Chapter - 6
Combinational Logic
• The three basic logic functions AND, OR, and NOT
can be combined to form various other types of
more complex logic functions, such as:
– comparison,
– arithmetic,
– code conversion,
– encoding/decoding,
– data selection,
– counting, and
– storage
Floyd, Digital Fundamentals, 10th ed DLDby Dr. Muhammad TahaJilani

© 2009 Pearson Education, Upper Saddle River, NJ207458. All Rights Reserved
Functions of Combinational Logic
• Applications of Combinational Logic
Floyd, Digital Fundamentals, 10th ed © 2009 Pearson Education, Upper Saddle River, NJ307458. All Rights Reserved
Summary
Half-Adder
Basic rules of binary addition are performed by a
Inputs Outputs
half adder, which has two binary inputs (A and B)
A B Cout S
and two binary outputs (Carry out and Sum).
0 0 0 0
0 1 0 1
The inputs and outputs can be summarized on a 1 0 0 1
truth table. 1 1 1 0
The logic symbol and equivalent circuit are:
S S
A S
A
Cout
B Cout B
Summary
Half-Subtractor
Summary
Full-Adder
Inputs Outputs
By contrast, a full adder has three binary A B Cin Cout S

0 0 0 0 0
inputs (A, B, and Carry in) and two binary 0 0 1 0 1
outputs (Carry out and Sum). The truth table 0 1 0 0 1
summarizes the operation. 0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
S S
A S A S
B
B Cout Cout
Cin
Half Adder Vs Full Adder
Full-Adder Summary Inputs Outputs
A B Cin Cout S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
A full-adder can be constructed from two half adders as shown:

S S
A A S A S Sum
S
B B Cout B Cout
A
Cin Cout
B
Cout
Summary
Full-Adder S S 0 Sum
1 A S 1 A S
0 B Cout 0 B Cout 1
For the given inputs, determine 1 Cout

the intermediate and final outputs 1
of the full adder.
The first half-adder has inputs of 1 and 0;
therefore the Sum =1 and the Carry out = 0.
The second half-adder has inputs of 1 and 1; therefore the
Sum = 0 and the Carry out = 1.
The OR gate has inputs of 1 and 0, therefore the final carry
out = 1.
Summary
Full-Adder
Notice that the result from the previous example can be

read directly on the truth table for a full adder.
Inputs Outputs
A B Cin Cout S
S S 0 Sum
0 0 0 0 0 1 A S 1 A S
0 0 1 0 1
0 1 0 0 1 1
0 1 1 1 0 0 B Cout 0 B Cout
1 0 0 0 1
1 0 1 1 0 1 Cout
1 1 0 1 0
1 1 1 1 1 1
Summary
Full-Subtractor
Full-Subtractor
Summary
Full-Adder
Inputs Outputs
• 1-bit Addition / Subtraction is performed A B Cin Cout S

0 0 0 0 0
using a full adder circuit, 0 0 1 0 1
0 1 0 0 1
• What if we want to add / Subtract words 0 1 1 1 0
of more then a bit? 1 0 0 0 1
1 0 1 1 0
• Let say 4-bit Addition / Subtraction 1 1 0 1 0
1 1 1 1 1
• or a Byte (8-bit) Addition / Subtraction.
S
A S
B
Cout
Cin
Full Adder
Summary
Parallel Adders Modification, Look a Head Carry
Full adders are combined into parallel adders that can add binary
numbers with multiple bits. A 4-bit adder is shown.
A4 B4 A3 B3 A2 B2 A1 B1
C0
A B Cin A B Cin A B Cin A B Cin
Cout S Cout S Cout S Cout S
C4
C3 C2 C1
S4 S3 S2 S1
The output carry (C4) is not ready until it propagates through all of the
full adders. This is called ripple carry, delaying the addition process.
Summary
Parallel Adders
The logic symbol for a 4-bit parallel adder is shown. This 4-bit adder
includes a carry in (labeled (C0) and a Carry out (labeled C4).
S
1 1
Binary 2 2 4-bit
number A 3 3 sum
4 4
1
Binary 2
number B 3
4
Input Output
C0 C4
carry carry
The 74LS283 is an example. It features look-ahead carry, which adds

logic to minimize the output carry delay. For the 74LS283, the
maximum delay to the output carry is 17 ns.
Summary
Parallel Subtractor
Summary
Binary Multiplication
Simply use AND Gate !
Summary
4-Bit Binary Multiplication
Summary
COMPARATOR
CIRCUIT
• Comparator
–Comparator is a logic circuit that performed magnitude comparison.
–It compares two quantities and indicates whether they are equal or not
• Comparator
– Three possibilities, while comparing
• Equal
Greater than
• Not Equal
Lessthan
• Comparator
– Inequality - 1-bit Comparator
• Truth table
• Comparator
–Equality for 2-bit
• In order to compare binary numbers containing two bits each, an additional
exclusive-NOR gate is necessary.
• LSBs of both numbers are compared by G1

• MSBs by gate G2.
• If equal, output of each XNOR gate is 1.
• If not , a 0 generates at output.
• At the end, an AND gate is High when both
G1 and G2 are High.
• Comparator
–Inequality
• But how to compare for more than
1-bit numbers?
• To determine an inequality of large
binary numbers, A and B, you first
examine the highest-order bit in
each number.
• The general procedure used in a
comparator is to check for an
inequality in a bit position, starting
with the highest-order bits (MSBs).
2-bit Comparator using Blocks of 1-bit Comparator
• Implement 4-bit Comparator using 2-bitComparators?
• Comparator
– Inequality – n-bit comparator
• Example – 4-bit Comparator:
A3 A2 A1 A0 B3 B2 B1 B0 Checking
MSB bit
1 0 0 1 0 0 1 1 order
Note :
Since,A3 > B3
When such an inequality is found in
highes order number, any other
A >B inequalities
t in lower-order bit positions
must be ignored because it is
possible for an opposite indication to
occur
• Comparator
– Inequality
• Exercise
A= 0110
B =0011
The A > B output is 1

and other both outputs are0
• Design a 4-bit Comparator ?
1-bit comparator
“Unequal” outputs can use

the same gates that are
needed to generate the
“equal” output
• 4-bit Comparator
• 8-bit Comparator
Summary
Representation of numbers on ICs

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Digital

© 2008 Pearson Education

Floyd, Digital Fundamentals, 10th ed DLDby Dr. Muhammad TahaJilani

The logic symbol and equivalent circuit are:

By contrast, a full adder has three binary A B Cin Cout S

Half Adder Vs Full Adder

A full-adder can be constructed from two half adders as shown:

For the given inputs, determine 1 Cout

Notice that the result from the previous example can be

• 1-bit Addition / Subtraction is performed A B Cin Cout S

A B Cin A B Cin A B Cin A B Cin

Cout S Cout S Cout S Cout S

The 74LS283 is an example. It features look-ahead carry, which adds

Simply use AND Gate !

• LSBs of both numbers are compared by G1

The A > B output is 1

“Unequal” outputs can use

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