LAB REPORT: 02

DIGITAL SYSTEM DESIGN

NAME: ESHA SADIA NASIR

ASFA ALI MASOOD

DEGREE: CE-38-A

SUBMITTED TO: Mam AYESHA AMBAREEN.

TASK 01:
module tki(dt,clk,rest,y);
input [3:0] dt;
input clk,rest;
output [7:0] y;
reg [7:0] Y;
wire [7:0] temp;
assign temp=Y+dt;
assign y=Y;
always @(posedge clk , negedge rest)
begin
if(rest==0)
begin
Y<=0;
end
else begin
Y<=temp;
end
end
endmodule

TASK 02:
CODE:

module fir(x, h0, h1, h2, y, clk, rst_n);

input [3:0] x, h1, h2, h0 ;

input clk, rst_n ;

output [7:0] y ;

reg [3:0] r1, r2 ;

wire [7:0] r3, r4, r5, temp ;

assign r3 = h0 * x ;
assign r4 = h1 * r1 ;

assign r5 = h2 * r2 ;

assign temp = r3+ r4;

assign y = temp + r5;

always@(posedge clk, negedge rst_n)

begin

if (rst_n == 0)

begin

r1 <= 0;

r2 <= 0;

end

else begin

r1 <= x;

r2 <= r1;

end

end

endmodule

==================================================================================