Digital DDS generator with AD9850 chip DDS from SQ5RWQ - AVT 3111

Description of the model presented during the III Meetings of Shortwaves

in the Kampinos National Park.

Generators tuneable in radio communication are used, among others in laboratory and service instruments, as a source of
reference signals and also as VFO or BFO receivers and transmitters. Typical system solutions are classic LC or RC generators,
often stabilized by PLL phase loop (or simpler FLL or DAFC loops) or complex synthesizers, based on mixing and duplicating
reference signals. These systems are characterized by one or more features limiting their practical usefulness. These features
include: low frequency stability, low spectral purity of the generated signals and limited range and step of obtained frequencies. A
very good alternative for the mentioned groups of devices is the DDS (Direct Digital Synthesis) generator, which uses the
principle of playback of on-the-fly calculated samples of the generated signal by means of a DAC (Digital-to-Analog Converter)
with a constant the frequency produced by the high-stability quartz generator. These solutions have been well-known in
electronics for many years, but quite recently they came "under thatch" due to inexpensive integrated DDS synthesizers,
e.g. the popular AD9850 chip. Analog Devices. A complete synthesizer module with an AD9850 system, a stabilized generator
and an LC low-pass filter can be purchased, for example, on a well-known auction site for less than PLN 50.

Fig. 1. A universal module of the DDS generator with Rys. 2. Funkcjonalny schemat blokowy AD9850
the AD9850 circuit

The sample module is shown in Figure 1 (there are at least two functional approximations on the market) - the outputs are
in the form of two rows of 10-pin "gold pin" connectors. Pairs of outputs of signals generated (sinusoidal and rectangular -
in counter phases) are marked with blue triangles. In turn, red triangles are control inputs (frequency and phase programming
of generated waveforms) and power supply, which for the convenience of connection were repeated on both sides of the
module. The programming process can be carried out in a serial or parallel method. Using the faster parallel method, the
D0..D7 pins are actively used (programming is done by passing four 8-bit control words to the AD9850 chip).

The internal structure of AD9850 is shown in Figure 2. A duplicated (serial and parallel) interface for frequency and phase
programming is located in the bottom left of the flowchart. When using the system as a normal freely tuned generator (e.g.
by the operator's hand as a VFO in the transceiver), a slower serial transfer requiring fewer connections is enough (parallel
programming from nature will be about 8 times faster, which can be useful when the DDS system is wanted) use as part of
the FSK or PSK modem. In the left upper part of the block diagram AD9850, the layout responsible for computing samples of
the generated signal is outlined and next to the right a 10-bit DAC converter is shown. Sinusoidal signals (in counter phase)
at the DAC transducer outputs should be given to low-pass filters, eliminating the phenomenon of so-called aliasing,
characteristic of discrete time processing. One of the filtered sinusoidal signals can then be given to the input of the fast

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analog comparator built into AD9850 (in the lower right corner of the diagram in Fig. 2), which generates two rectangular
waveforms in opposite phases on the outputs. In the used DDS generator module, the reference voltage level for the
comparator is regulated by means of a mounting potentiometer (blue square element in the bottom part of Fig. 1). This
adjustment should be made very accurately, because it affects the fill factor (symmetry) of the obtained rectangular signals.

Fig. 3. The generator's electrical diagram

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The AD9850 integrated circuit can be operated with a VDD supply voltage from 3.3 to 5V, with the maximum clock frequencies
FS and the separated thermal losses PT being respectively: 155 mW at 110 MHz and 380 mW at 125 MHz (a slight heating of
the operating system is felt). The value of SFDR (Spurious-Free Dynamic Range) declared by the manufacturer, which is the
ratio of the amplitude of the useful output signal to the strongest interfering signal (the measure of the accuracy of signal
reproduction by the DAC), at a frequency of a sinusoidal signal equal to 40 MHz, is better than 50 dB, which should be
considered satisfactory in most radio amateur applications. However, it must be clearly emphasized here that at such a low
ratio of the F = 40 MHz frequency to the Fs = 125 MHz sampling frequency of 0.32, sampling is too rare for the quality of the
time domain signal mapping to be sufficient for most applications. In practice, using only the LC low-pass filter, implemented in
the described DDS module, we are able to obtain sinusoidal and rectangular waveforms of unquestioning quality (based on
observations using an amateur digital oscilloscope) only in the range of up to several MHz. With higher requirements for
spectral purity of the generated signal, it is worth to use additional LC lowpass filters (for a sinusoidal waveform) or phase
signal filtration for rectangular waveforms - e.g. using a PLL phase loop. However, the solution, which in the author's opinion
should be considered the most effective, when we want to use our DDS as a VFO generator for several radio bands, is the
use of dedicated bandpass filters (with good quality) for sinusoidal waveforms and provide only the so-filtered signal on the
input of the comparator (internal AD9850 or external) forming rectangular waveforms, which may be useful, among others
in SDR systems with digitally switched analog keys.

Fig. 4. Generator PCB

In the presented application, the tunable DDS generator has focused on the maximum simplicity of the solution, allowing to
maintain a low cost of execution without limiting the possibilities of further development. The electrical scheme of the device is
shown in Figure 3. The user has the entire available tuning range of the DDS module (U3) - up to 40 MHz max., Programmable in
steps from 1 Hz to 1 MHz, changed every decade. To change the step, use two "+/- DF" monostable switches (SW1, SW3)
and the frequency change is made by turning the mechanical 24-pulse / revolution (SW2) encoder. The whole is controlled
by the popular ATmega8 microcontroller (U2), clocked with an internal 8 MHz RC generator. Information about the frequency
generated, the set control step and (optionally) the level of the sinusoidal output voltage is ensured by a typical 16 × 2
alphanumeric LCD display (U5). The system has been designed to be used in various applications - both as part of another
device (e.g. VFO) as well as an independent service and laboratory generator. For this purpose, the project also includes the
possibility of using an integrated voltage stabilizer (U1) and output amplifiers - buffers for the integrated DDS module. For
both digital outputs, this function is performed by 74HCT04 (U4) and for a sinusoidal signal - a broadband analog amplifier
with transistors BC547B and BC557B (Q1 and Q2). Both optional output signal buffering systems significantly protect the
DDS module against the effects of short circuits and overvoltages on the outputs and also provide output impedance close
to 50 Ω in a wide range of generated frequencies. Additionally, when using the amplifier-buffer for a sinusoidal signal, it is
possible to adjust and measure the level of the output voltage as well as its reading on the LCD display.

Figure 4 shows a project of a single-sided PCB with dimensions of approx. 75 × 100 mm, made in the through-hole assembly
technique (THT). It was thought that fragments dedicated to peripheral systems can be cut off from the main part of the
PCB (e.g. through a precise incision and breakage) and placed in a convenient part of the housing of the designed device.
The plate also provides numerous gold pin connectors (J1-J13), some of which are designed to connect the required device
modules (J3-J4, J5-J6) and others are optional. For example, when a stabilized and filtered + 5V power supply is available in
the device being built, the U1 stabilizer with C1..C3 capacitors can be bypassed and the system fed directly via the J2

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connector. On the other hand, giving up both buffering systems for output signals as well as regulation and measurement
of sinusoidal voltage, we can get the output signals straight from J11 and J12 or J7 (after bridging pins 1 and 2 in the J12
terminal and after reversed polarity of the C16 capacitor).

Exemplary modular generator design

The last one shows an example of the described DDS device as a workshop generator - in the full system version and with
separate control modules and LCD display. The connection of the adjustment potentiometer for a sinusoidal signal was
made with a double, thin coaxial cable 50 Ω, similar to outputting the output signals to the BNC 50 Ω sockets on the rear
panel of the instrument. The device with its own LM7805 voltage regulator (or its equivalent), equipped with a small heat
sink, works well with any 7..12V / 0.5A DC power supply. Photo 6 shows an example of a front panel with a set of control
elements and an LCD display.

The described DDS generator, despite its simplicity, met with considerable interest of the constructors' colleagues, for
whom suggestions and urgings are now developed richer versions, adapted to work with the computer (via the USB
interface), as an independent sinusoidal generator VFO or BFO for older TRX- models, digital signal generator for
quadrature I / Q processing in SDR devices, independent wobbulator and wobbuloscope (useful e.g. in the tuning of HF
input filters or IF filters) as well as an auxiliary generator for semi-automatic antenna boxes.

Adam Sobczyk SQ5RWQ

sq5rwq@gmail.com