Function Code Application Manual PDF

Symphony Plus - Harmony
S+ Engineering for Harmony

Function Code Application Manual
Symphony Plus
NOTICE
This document contains information about one or more ABB products and may include a description of
or a reference to one or more standards that may be generally relevant to the ABB products. The pres-
ence of any such description of a standard or reference to a standard is not a representation that all of
the ABB products referenced in this document support all of the features of the described or referenced
standard. In order to determine the specific features supported by a particular ABB product, the reader
should consult the product specifications for the particular ABB product.
ABB may have one or more patents or pending patent applications protecting the intellectual property in
the ABB products described in this document.
The information in this document is subject to change without notice and should not be construed as a
commitment by ABB. ABB assumes no responsibility for any errors that may appear in this document.
Products described or referenced in this document are designed to be connected and to communicate
information and data through network interfaces, which should be connected to a secure network. It is the
sole responsibility of the system/product owner to provide and continuously ensure a secure connection
between the product and the system network and/or any other networks that may be connected.
The system/product owners must establish and maintain appropriate measures, including, but not limited
to, the installation of firewalls, application of authentication measures, encryption of data, installation of
antivirus programs, and so on, to protect these products, the network, its system, and interfaces against
security breaches, unauthorized access, interference, intrusion, leakage, and/or theft of data or informa-
tion.
ABB performs functionality testing on the products and updates that we release. However system/product
owners are ultimately responsible for ensuring that any product updates or other major system updates
(to include but not limited to code changes, configuration file changes, third-party software updates or
patches, hardware change out, and so on) are compatible with the security measures implemented. The
system/product owners must verify that the system and associated products function as expected in the
environment in which they are deployed.
In no event shall ABB be liable for direct, indirect, special, incidental or consequential damages of any
nature or kind arising from the use of this document, nor shall ABB be liable for incidental or consequential
damages arising from use of any software or hardware described in this document.
This document and parts thereof must not be reproduced or copied without written permission from ABB,
and the contents thereof must not be imparted to a third party nor used for any unauthorized purpose.
The software or hardware described in this document is furnished under a license and may be used, cop-
ied, or disclosed only in accordance with the terms of such license. This product meets the requirements
specified in EMC Directive 2014/30/EU and in Low Voltage Directive 2014/35/EU.
TRADEMARKS
Symphony is a registered or pending trademark of ABB S.p.A.
All rights to copyrights, registered trademarks, and trademarks reside with their respective owners.
Copyright © 2014 ABB.
All rights reserved.
Release: May 2017

Document Number: 2VAA000844R0001 J
TABLE OF CONTENTS - i
TABLE OF CONTENTS
1. Function Generator...................................................................................... 1-1

1.1 Explanation ....................................................................................................... 1-2
1.1.1 High and Low Limits................................................................................... 1-3
1.2 Applications ...................................................................................................... 1-3
2. Manual Set Constant Signal Generator) .................................................... 2-1

2.1 Applications ...................................................................................................... 2-1
2.1.1 Scaler ......................................................................................................... 2-1
2.1.2 Set Point..................................................................................................... 2-1
3. Lead/Lag ....................................................................................................... 3-1

3.1 Explanation ....................................................................................................... 3-1
3.1.1 Lag Function .............................................................................................. 3-1
3.1.2 Lead Function ............................................................................................ 3-2
3.2 Applications ...................................................................................................... 3-2
4. Pulse Positioner ....................................................................................... 4-1

4.1 Explanation ....................................................................................................... 4-1
4.1.1 Cycle Time ................................................................................................. 4-2
4.1.2 Stroke Rate ................................................................................................ 4-2
4.2 Applications ...................................................................................................... 4-2
5. Pulse Rate..................................................................................................... 5-1

5.1 Explanation ....................................................................................................... 5-1
5.2 Applications ...................................................................................................... 5-1
6. High/Low Limiter.......................................................................................... 6-1
7. Square Root.................................................................................................. 7-1

7.1 Applications ...................................................................................................... 7-1
8. Rate Limiter .................................................................................................. 8-1

8.1 Explanation ....................................................................................................... 8-1
8.2 Applications ...................................................................................................... 8-1
9. Analog Transfer............................................................................................ 9-1

9.1 Explanation ....................................................................................................... 9-1
9.2 Applications ...................................................................................................... 9-2
10. High Select ................................................................................................. 10-1

10.1 Applications .................................................................................................... 10-1
11. Low Select ...................................................................................................11-1

TABLE OF CONTENTS - ii
11.1 Applications .................................................................................................... 11-1
12. High/Low Compare .................................................................................... 12-1

12.1 Applications .................................................................................................... 12-1
13. Integer Transfer.......................................................................................... 13-1

13.1 Applications .................................................................................................... 13-1
14. Summer (4-Input) ....................................................................................... 14-1
15. Summer (2-Input) ....................................................................................... 15-1

15.1 Applications .................................................................................................... 15-1
16. Multiply ....................................................................................................... 16-1
17. Divide .......................................................................................................... 17-1
18. PID Error Input ........................................................................................... 18-1

18.1 Explanation ..................................................................................................... 18-1
18.2 Applications .................................................................................................... 18-3
19. PID (PV and SP).......................................................................................... 19-1

19.1 Explanation ..................................................................................................... 19-1
19.2 Examples ......................................................................................................... 19-2
24. Adapt........................................................................................................... 24-1

24.1 Applications .................................................................................................... 24-1
25. Analog Input (Periodic Sample)................................................................ 25-1

25.1 Applications .................................................................................................... 25-2
26. Analog Input/Loop ..................................................................................... 26-1

26.1 Applications .................................................................................................... 26-2
30. Analog Exception Report .......................................................................... 30-1

30.1 Explanation ..................................................................................................... 30-1
30.1.1 Exception Reports.................................................................................... 30-1
30.1.2 Alarm Reports .......................................................................................... 30-2
31. Test Quality................................................................................................. 31-1

31.1 Applications .................................................................................................... 31-1
32. Trip .............................................................................................................. 32-1
33. 33 Not .......................................................................................................... 33-1
34. Memory ....................................................................................................... 34-1

TABLE OF CONTENTS - iii
34.1 Applications .................................................................................................... 34-1
35. Timer ........................................................................................................... 35-1

35.1 Explanation ..................................................................................................... 35-1
36. 36 - Qualified OR (8-Input)......................................................................... 36-1

36.1 Applications .................................................................................................... 36-1
37. AND (2-Input).............................................................................................. 37-1
38. AND (4-Input).............................................................................................. 38-1
39. 39 OR (2-Input) ........................................................................................... 39-1
40. OR (4-Input) ................................................................................................ 40-1
41. Digital Input (Periodic Sample)................................................................. 41-1

41.1 Examples ......................................................................................................... 41-2
42. Digital Input/Loop ...................................................................................... 42-1

42.1 Examples ......................................................................................................... 42-2
45. Digital Exception Report ........................................................................... 45-1

45.1 Explanation ..................................................................................................... 45-1
45.2 Examples ......................................................................................................... 45-2
48. Analog Exception Report with High/Low Alarm Deadband ................... 48-1
48.1 Explanation ..................................................................................................... 48-1
48.1.2 Alarm Reports .......................................................................................... 48-2
50. Manual Set Switch ..................................................................................... 50-1
51. Manual Set Constant ................................................................................. 51-1
52. 52 Manual Set Integer ................................................................................ 52-1

52.1 Examples ......................................................................................................... 52-1
55. Hydraulic Servo.......................................................................................... 55-1

55.1 Explanation ..................................................................................................... 55-3
55.1.1 Outputs..................................................................................................... 55-3
55.1.2 Specifications ........................................................................................... 55-6
57. Node Statistics Block ................................................................................ 57-1

57.1 Explanations ................................................................................................... 57-3
57.1.1 Specifications ........................................................................................... 57-3
TABLE OF CONTENTS - iv
58. Time Delay (Analog) .................................................................................. 58-1

58.1 Explanation ..................................................................................................... 58-1
58.1.1 Specifications ........................................................................................... 58-1
58.2 Applications .................................................................................................... 58-2
58.2.1 Fixed Time Delay ..................................................................................... 58-2
58.2.2 Variable Time Delay ................................................................................. 58-3
58.2.3 System Modeling......................................................................................58-3
59. Digital Transfer........................................................................................... 59-1

59.1 Applications .................................................................................................... 59-1
61. Blink ............................................................................................................ 61-1

61.1 Applications .................................................................................................... 61-1
62. Remote Control Memory ........................................................................... 62-1

62.1 Explanations ................................................................................................... 62-1
62.1.1 Specifications ........................................................................................... 62-1
62.1.2 Control Station Control............................................................................. 62-2
62.2 Applications .................................................................................................... 62-3
63. Analog Input List (Periodic Sample) ........................................................ 63-1

63.1 Explanation ..................................................................................................... 63-2
63.1.1 Specifications ........................................................................................... 63-2
64. Digital Input List (Periodic Sample) ......................................................... 64-1

64.1 Explanation ..................................................................................................... 64-2
64.1.1 Specifications ........................................................................................... 64-2
65. Digital Sum With Gain ............................................................................... 65-1

65.1 Applications .................................................................................................... 65-1
66. Analog Trend .............................................................................................. 66-1

66.1 Explanations ................................................................................................... 66-1
66.1.1 Specifications ........................................................................................... 66-1
66.2 Applications .................................................................................................... 66-2
67. Digital Exception Report with Alarm Deadband...................................... 67-1

67.1 Explanation ..................................................................................................... 67-1
67.2 Examples ......................................................................................................... 67-2
68. Remote Manual Set Constant (REMSET)................................................. 68-1

68.1 Explanation ..................................................................................................... 68-1
69. Test Alarm................................................................................................... 69-1

TABLE OF CONTENTS - v
79. Control Interface Slave.............................................................................. 79-1

79.1 Explanation ..................................................................................................... 79-2
79.1.1 Outputs..................................................................................................... 79-2
79.1.2 Specifications ........................................................................................... 79-2
80. Control Station ........................................................................................... 80-1

80.1 Explanation ..................................................................................................... 80-4
80.1.1 Outputs..................................................................................................... 80-4
80.1.2 Specifications ........................................................................................... 80-4
80.2 Applications .................................................................................................... 80-9
81. Executive .................................................................................................... 81-1

81.1 Explanation ..................................................................................................... 81-1
81.1.1 Outputs..................................................................................................... 81-2
82. Segment Control ........................................................................................ 82-1

82.1 Explanation ..................................................................................................... 82-2
82.1.1 Specifications ........................................................................................... 82-2
82.1.2 Outputs..................................................................................................... 82-5
83. Digital Output Group ................................................................................. 83-1

83.1 Explanation ..................................................................................................... 83-2
83.1.1 Specifications ........................................................................................... 83-2
84. Digital Input Group .................................................................................... 84-1

84.1 Explanation ..................................................................................................... 84-1
84.1.1 Specifications ........................................................................................... 84-1
85. Up/Down Counter....................................................................................... 85-1

85.1 Explanation ..................................................................................................... 85-1
85.1.1 Specifications ........................................................................................... 85-1
85.2 Reset................................................................................................................ 85-2
85.3 Normal ............................................................................................................. 85-2
85.4 Alarm ............................................................................................................... 85-3
85.5 Applications .................................................................................................... 85-3
86. Elapsed Timer ............................................................................................ 86-1

86.1 Explanation ..................................................................................................... 86-1
86.1.1 Specifications ........................................................................................... 86-1
86.1.2 Outputs..................................................................................................... 86-2
86.2 Applications .................................................................................................... 86-3
87. Digital Logic Station Interface .................................................................. 87-1

TABLE OF CONTENTS - vi
88. Digital Logic Station .................................................................................. 88-1

88.1 Explanation ..................................................................................................... 88-2
88.1.1 Specifications ........................................................................................... 88-2
88.1.2 Outputs..................................................................................................... 88-2
88.2 Applications .................................................................................................... 88-3
89. Last Block................................................................................................... 89-1
90. Extended Executive ................................................................................... 90-1

90.1 Explanation ..................................................................................................... 90-2
90.1.1 Specifications ........................................................................................... 90-2
90.1.2 Outputs..................................................................................................... 90-4
90.2 Example ........................................................................................................... 90-5
90.2.1 Function Block Configuration Required for Time Synchronization ........... 90-5
91. BASIC Configuration (BRC-100/200)........................................................ 91-1

91.1 Explanation ..................................................................................................... 91-1
91.1.1 Specifications ........................................................................................... 91-1
91.1.2 Outputs..................................................................................................... 91-2
91.2 Application ...................................................................................................... 91-2
92. Invoke BASIC ............................................................................................. 92-1

92.1 Explanation ..................................................................................................... 92-1
92.1.1 Example 1 ................................................................................................ 92-1
92.1.2 Example 2 ................................................................................................ 92-2
93. BASIC Real Output .................................................................................... 93-1

93.1 Application ...................................................................................................... 93-1
94. BASIC Boolean Output.............................................................................. 94-1
95. Module Status Monitor .............................................................................. 95-1

95.1 Explanation ..................................................................................................... 95-2
95.1.1 Specifications ........................................................................................... 95-2
96. Redundant Analog Input ........................................................................... 96-1

96.1 Explanation ..................................................................................................... 96-1
96.1.1 Specifications ........................................................................................... 96-1
96.2 Logic Flow....................................................................................................... 96-2
96.3 Applications .................................................................................................... 96-2
97. Redundant Digital Input ............................................................................ 97-1

97.1 Applications .................................................................................................... 97-1
98. Slave Select ................................................................................................ 98-1

98.1 Specifications ................................................................................................. 98-1
98.2 Applications .................................................................................................... 98-3
TABLE OF CONTENTS - vii
99. Sequence of Events Log ........................................................................... 99-1

99.1 Explanation ..................................................................................................... 99-1
99.1.1 Specifications ........................................................................................... 99-1
99.1.2 Outputs..................................................................................................... 99-2
100. Digital Output Readback Check ............................................................. 100-1

100.1 Explanation ...................................................................................................100-2
101. Exclusive OR ............................................................................................ 101-1
102. Pulse Input/Period ................................................................................... 102-1

102.1 Explanation ...................................................................................................102-1
102.1.1 Specifications .........................................................................................102-2
102.1.2 Outputs...................................................................................................102-2
103. Pulse Input/Frequency ............................................................................ 103-1

103.1 Explanation ...................................................................................................103-1
103.1.1 Specifications .........................................................................................103-2
103.1.2 Outputs...................................................................................................103-2
104. Pulse Input/Totalization........................................................................... 104-1

104.1 Explanation ...................................................................................................104-1
104.1.1 Specifications .........................................................................................104-2
104.1.2 Outputs...................................................................................................104-2
109. Pulse Input/Duration................................................................................ 109-1

109.1 Explanation ...................................................................................................109-1
109.1.1 Specifications .........................................................................................109-1
109.1.2 Outputs...................................................................................................109-2
110. Rung (5-Input) ...........................................................................................110-1

110.1 Explanation ................................................................................................... 110-1
110.1.1 Specifications ......................................................................................... 110-2
110.1.2 Outputs................................................................................................... 110-2
110.2 Applications .................................................................................................. 110-3
110.2.1 Specifications ......................................................................................... 110-3
111. Rung (10-Input) ......................................................................................... 111-1

111.1 Explanation ................................................................................................... 111-2
111.1.1 Specifications ......................................................................................... 111-2
111.1.2 Outputs................................................................................................... 111-3
111.2 Applications .................................................................................................. 111-3
112. Rung (20-Input) .........................................................................................112-1

112.1 Explanation ................................................................................................... 112-2
112.1.1 Specifications ......................................................................................... 112-3
TABLE OF CONTENTS - viii
112.1.2 Outputs................................................................................................... 112-3

112.2 Applications .................................................................................................. 112-3
114. BCD Input ..................................................................................................114-1

114.1 Explanation ................................................................................................... 114-1
114.1.1 Specifications ......................................................................................... 114-2
114.1.2 Outputs................................................................................................... 114-3
114.2 Example ......................................................................................................... 114-3
115. BCD Output ...............................................................................................115-1

115.1 Explanation ................................................................................................... 115-1
115.1.1 Specifications ......................................................................................... 115-2
115.1.2 Output .................................................................................................... 115-3
115.2 Examples ....................................................................................................... 115-3
116. Jump/Master Control Relay .....................................................................116-1

116.1 Explanation ................................................................................................... 116-1
116.1.1 Specifications ......................................................................................... 116-1
116.1.2 Output .................................................................................................... 116-2
116.2 Applications .................................................................................................. 116-2
117. Boolean Recipe Table...............................................................................117-1

117.1 Explanation ................................................................................................... 117-2
117.1.1 Specifications ......................................................................................... 117-2
117.1.2 Output .................................................................................................... 117-2
117.2 Applications .................................................................................................. 117-2
118. Real Recipe Table .....................................................................................118-1

118.1 Explanation ................................................................................................... 118-2
118.1.1 Specifications ......................................................................................... 118-2
118.1.2 Output .................................................................................................... 118-2
118.2 Applications .................................................................................................. 118-2
119. Boolean Signal Multiplexer ......................................................................119-1

119.1 Explanation ................................................................................................... 119-1
119.1.1 Specifications ......................................................................................... 119-1
119.1.2 Output .................................................................................................... 119-2
119.2 Applications .................................................................................................. 119-2
120. Real Signal Multiplexer............................................................................ 120-1

120.1 Explanation ...................................................................................................120-1
120.1.1 Specifications .........................................................................................120-1
120.1.2 Output ....................................................................................................120-2
TABLE OF CONTENTS - ix
121. Analog Input/Cnet .................................................................................... 121-1
122. Digital Input/Cnet ..................................................................................... 122-1
123. Device Driver ............................................................................................ 123-1

123.1 Explanation ...................................................................................................123-1
123.1.1 Specifications .........................................................................................123-2
123.1.2 Outputs...................................................................................................123-4
123.2 Applications ..................................................................................................123-4
123.3 Distributed Recipe Handling .....................................................................123-12
123.3.1 Storing Recipe Data .............................................................................123-12
123.4 Recipe Handling for a Fixed Batch Sequence .........................................123-13
124. Sequence Monitor.................................................................................... 124-1

124.1 Explanation ...................................................................................................124-2
124.1.1 Specifications .........................................................................................124-3
124.1.2 Outputs...................................................................................................124-5
124.2 Applications ..................................................................................................124-5
125. Device Monitor ......................................................................................... 125-1

125.1 Explanation ...................................................................................................125-1
125.1.1 Specifications .........................................................................................125-2
125.1.2 Output ....................................................................................................125-2
125.2 Applications ..................................................................................................125-3
126. Real Signal Demultiplexer....................................................................... 126-1

126.1 Explanation ...................................................................................................126-1
126.1.1 Select Mode ...........................................................................................126-1
126.1.2 Integer Mode ..........................................................................................126-1
126.1.3 BCD Mode..............................................................................................126-2
126.2 Applications ..................................................................................................126-3
128. Slave Default Definition........................................................................... 128-1

128.1 Explanation ...................................................................................................128-2
129. Multistate Device Driver .......................................................................... 129-1

129.1 Explanation ...................................................................................................129-3
129.1.1 Specifications .........................................................................................129-4
129.1.2 Outputs...................................................................................................129-7
129.2 Applications ..................................................................................................129-8
132. Analog Input/Slave................................................................................... 132-1

132.1 Explanation ...................................................................................................132-2
132.1.1 Specifications .........................................................................................132-2
132.2 Application ....................................................................................................132-4
TABLE OF CONTENTS - x
133. Smart Field Device Definition ................................................................. 133-1

133.1 Explanation ...................................................................................................133-1
133.1.1 Specifications .........................................................................................133-1
133.2 Application ....................................................................................................133-6
133.3 Type AVS Positioner Application ................................................................133-7
133.4 Flowmeter Application .................................................................................133-8
134. Multi-Sequence Monitor .......................................................................... 134-1

134.1 Explanation ...................................................................................................134-3
134.1.1 Specifications .........................................................................................134-4
134.1.2 Outputs...................................................................................................134-6
134.2 Applications ..................................................................................................134-6
135. Sequence Manager .................................................................................. 135-1

135.1 Explanation ...................................................................................................135-2
135.1.1 Specifications .........................................................................................135-3
135.1.2 Outputs...................................................................................................135-4
135.2 Applications ..................................................................................................135-4
136. Remote Motor Control ............................................................................. 136-1

136.1 Explanation ...................................................................................................136-2
136.1.1 Normal Operation of the Remote Motor Control ....................................136-2
136.1.2 Abnormal Operation ...............................................................................136-2
136.1.3 Pulsed Outputs.......................................................................................136-2
136.1.4 Specifications .........................................................................................136-3
136.1.5 Outputs...................................................................................................136-3
137. C and BASIC Program Real Output With Quality.................................. 137-1
138. C or BASIC Program Boolean Output With Quality.............................. 138-1
139. Passive Station Interface ........................................................................ 139-1

139.1 Explanation ...................................................................................................139-2
139.1.1 Specifications .........................................................................................139-2
139.1.2 Outputs...................................................................................................139-3
139.2 Application ....................................................................................................139-4
140. Restore...................................................................................................... 140-1

140.1 Specifications ...............................................................................................140-2
140.2 Module Memory Utilization ..........................................................................140-3
140.3 Memory Usage Equations............................................................................140-6
140.4 Applications ..................................................................................................140-6
141. Sequence Master ..................................................................................... 141-1

141.1 Specifications ...............................................................................................141-2
TABLE OF CONTENTS - xi
141.2 Applications ..................................................................................................141-3
142. Sequence Slave........................................................................................ 142-1

142.1 Specifications ...............................................................................................142-2
143. Invoke C .................................................................................................... 143-1

143.1 Applications ..................................................................................................143-2
144. C Allocation .............................................................................................. 144-1
145. Frequency Counter/Slave........................................................................ 145-1
146. Remote I/O Interface ................................................................................ 146-1

146.1 Explanation ...................................................................................................146-3
146.1.1 Specifications .........................................................................................146-3
146.2 RMP/RSP Memory Usage Calculation (Expander Bus).............................146-5
146.3 Applications ..................................................................................................146-6
147. Remote I/O Definition .............................................................................. 147-1

147.1 Explanation ...................................................................................................147-2
147.1.1 Specifications .........................................................................................147-2
147.2 RIO02 RMP/RSP Memory Usage Calculation (Expander Bus) .................147-3
147.3 Applications ..................................................................................................147-4
148. Batch Sequence ....................................................................................... 148-1

148.1 Explanation ...................................................................................................148-2
148.1.1 Specifications .........................................................................................148-2
148.1.2 Outputs...................................................................................................148-3
148.1.3 Run-Time Fault Code Explanation .........................................................148-3
148.2 Application ....................................................................................................148-6
149. Analog Output/Slave................................................................................ 149-1

149.1 Explanation ...................................................................................................149-2
149.1.1 Specifications .........................................................................................149-2
149.2 Applications ..................................................................................................149-3
150. Hydraulic Servo Slave ............................................................................. 150-1

150.1 Explanation ...................................................................................................150-2
151. Text Selector............................................................................................. 151-1

151.1 Specifications ...............................................................................................151-2
152. Model Parameter Estimator .................................................................... 152-1

152.1 Explanation ...................................................................................................152-2
152.2 Specifications ...............................................................................................152-2
TABLE OF CONTENTS - xii
152.3 Applications ..................................................................................................152-2
153. Inferential Smith Controller (ISC) Parameter Converter....................... 153-1

153.1 Explanation ...................................................................................................153-2
153.2 Applications ..................................................................................................153-4
154. Adaptive Parameter Scheduler............................................................... 154-1

154.1 Explanation ...................................................................................................154-1
154.1.1 Specifications .........................................................................................154-2
154.2 Applications ..................................................................................................154-2
155. Regression ............................................................................................... 155-1

155.1 Explanation ...................................................................................................155-2
155.1.1 Specifications .........................................................................................155-4
155.1.2 Outputs...................................................................................................155-6
155.2 Applications ..................................................................................................155-7
155.2.1 Regression Block Application Considerations........................................155-8
156. Advanced PID Controller......................................................................... 156-1

156.1 Explanation ...................................................................................................156-3
156.1.1 Specifications .........................................................................................156-3
156.1.2 Outputs...................................................................................................156-5
156.2 Classical PID Controller...............................................................................156-7
156.3 Noninteracting PID Controller .....................................................................156-9
156.4 Manual Reset PID Controller .....................................................................156-10
156.5 Applications ................................................................................................156-12
157. General Digital Controller ....................................................................... 157-1

157.1 Explanation ...................................................................................................157-2
157.1.1 Specifications .........................................................................................157-2
157.1.2 Output ....................................................................................................157-3
157.2 Application ....................................................................................................157-3
160. Inferential Smith Controller..................................................................... 160-1

160.1 Explanation ...................................................................................................160-1
160.1.1 Specifications .........................................................................................160-3
160.2 ISC Structure.................................................................................................160-4
160.3 Applications ..................................................................................................160-5
161. Sequence Generator................................................................................ 161-1

161.1 Explanation ...................................................................................................161-2
161.1.1 Specifications .........................................................................................161-4
161.1.2 Outputs...................................................................................................161-5
161.2 Applications ..................................................................................................161-6
TABLE OF CONTENTS - xiii
162. Digital Segment Buffer ............................................................................ 162-1

162.1 Explanation ...................................................................................................162-1
163. Analog Segment Buffer ........................................................................... 163-1

163.1 Explanation ...................................................................................................163-1
165. Moving Average ....................................................................................... 165-1

165.1 Explanation ...................................................................................................165-1
165.1.1 Specifications .........................................................................................165-2
165.1.2 Output ....................................................................................................165-2
166. Integrator .................................................................................................. 166-1

166.1 Explanation ...................................................................................................166-1
166.1.1 Specifications .........................................................................................166-2
166.1.2 Outputs...................................................................................................166-2
167. Polynomial................................................................................................ 167-1
168. Interpolator ............................................................................................... 168-1

168.1 Explanation ...................................................................................................168-2
168.2 Applications ..................................................................................................168-3
169. Matrix Addition ......................................................................................... 169-1

169.1 Explanation ...................................................................................................169-2
170. Matrix Multiplication ................................................................................ 170-1

170.1 Explanation ...................................................................................................170-2
171. Trigonometric ........................................................................................... 171-1
172. Exponential............................................................................................... 172-1
173. Power ........................................................................................................ 173-1
174. Logarithm ................................................................................................. 174-1
177. Data Acquisition Analog.......................................................................... 177-1

177.1 Explanation ...................................................................................................177-2
177.1.1 Specifications .........................................................................................177-2
177.1.2 Outputs...................................................................................................177-9
177.2 Applications ................................................................................................ 177-11
178. Data Acquisition Analog Input/Loop ...................................................... 178-1

178.1 Explanation ...................................................................................................178-1
178.1.1 Specifications .........................................................................................178-1
178.1.2 Outputs...................................................................................................178-2
TABLE OF CONTENTS - xiv
178.2 Applications ..................................................................................................178-3
179. Enhanced Trend ....................................................................................... 179-1

179.1 Explanation ...................................................................................................179-2
179.1.1 Specifications .........................................................................................179-2
179.2 Applications ..................................................................................................179-6
184. Factory Instrumentation Protocol Handler............................................ 184-1

184.1 Explanation ...................................................................................................184-2
184.1.1 Specifications .........................................................................................184-2
184.2 FIP Variable Input/Output Types..................................................................184-3
184.3 Application ....................................................................................................184-5
185. Digital Input Subscriber .......................................................................... 185-1

185.1 Explanation ...................................................................................................185-2
185.1.1 Specifications .........................................................................................185-2
185.2 Applications ..................................................................................................185-3
186. Analog Input Subscriber ......................................................................... 186-1

186.1 Explanation ...................................................................................................186-2
186.1.1 Specifications .........................................................................................186-2
186.2 Applications ..................................................................................................186-3
187. Analog Output Subscriber ...................................................................... 187-1

187.1 Explanation ...................................................................................................187-2
187.1.1 Specifications .........................................................................................187-2
187.2 Applications ..................................................................................................187-4
188. Digital Output Subscriber ....................................................................... 188-1

188.1 Explanation ...................................................................................................188-2
188.1.1 Specifications .........................................................................................188-2
188.2 Applications ..................................................................................................188-3
190. User Defined Function Declaration ........................................................ 190-1

190.1 Explanation ...................................................................................................190-1
191. User Defined Function One..................................................................... 191-1
192. User Defined Function Two..................................................................... 192-1
193. User Defined Data Import........................................................................ 193-1

193.1 Explanation ...................................................................................................193-1
193.1.1 Specifications .........................................................................................193-2
193.1.2 Outputs...................................................................................................193-2
193.2 Applications ..................................................................................................193-2
TABLE OF CONTENTS - xv
194. User Defined Data Export........................................................................ 194-1

194.1 Explanation ...................................................................................................194-1
194.1.1 Specifications .........................................................................................194-1
194.1.2 Outputs...................................................................................................194-3
194.2 Exception Report Data .................................................................................194-4
194.3 Application Programs ..................................................................................194-5
194.4 HSI - Text String Element .............................................................................194-7
194.5 C Language Program ...................................................................................194-8
198. Auxiliary Real User Defined Function.................................................... 198-1
199. Auxiliary Digital User Defined Function ................................................ 199-1
201. Data Point Definition................................................................................ 201-1

201.1 General Description .....................................................................................201-1
201.2 Outputs ..........................................................................................................201-1
201.3 Specifications ...............................................................................................201-2
201.4 Explanation ...................................................................................................201-2
201.5 Specifications ...............................................................................................201-3
201.6 Outputs ..........................................................................................................201-4
202. Remote Transfer Module Executive Block (INIIT12) ............................. 202-1

202.1 Applications ..................................................................................................202-2
202.1.1 Serial Data Channel Operation ..............................................................202-2
202.1.2 Half Duplex Operation............................................................................202-2
202.1.3 Full Duplex Operation ............................................................................202-5
202.1.4 Serial Line Quality Management ............................................................202-6
203. INIPT02 Executive Block ......................................................................... 203-1

203.1 Explanation ...................................................................................................203-6
203.1.1 Specifications .........................................................................................203-6
203.2 Applications ..................................................................................................203-8
203.2.1 Serial Data Channel Operation ..............................................................203-8
203.2.2 Half Duplex Operation............................................................................203-8
203.2.3 Full Duplex Operation ..........................................................................203-10
205. Analog Input List/CW800 (Periodic Sample) ......................................... 205-1

205.1 Explanation ...................................................................................................205-2
205.1.1 Specifications .........................................................................................205-2
206. Digital Input List/CW800 (Periodic Sample) .......................................... 206-1

206.1 Explanation ...................................................................................................206-2
206.1.1 Specifications .........................................................................................206-2
207. Module Status Monitor/CW800 ............................................................... 207-1

TABLE OF CONTENTS - xvi
207.1 Explanation ...................................................................................................207-1

207.1.1 Specifications .........................................................................................207-1
210. Sequence of Events Slave ...................................................................... 210-1

210.1 Explanation ...................................................................................................210-4
210.1.1 Outputs...................................................................................................210-4
210.1.2 Specifications .........................................................................................210-4
211. Data Acquisition Digital............................................................................211-1

211.1 Explanation ................................................................................................... 211-2
212. Data Acquisition Digital Input/Loop ....................................................... 212-1

212.1 Explanation ...................................................................................................212-1
212.1.1 Specifications .........................................................................................212-1
212.1.2 Outputs...................................................................................................212-2
215. Enhanced Analog Slave Definition......................................................... 215-1

215.1 Explanation ...................................................................................................215-1
215.1.1 Specifications .........................................................................................215-1
215.1.2 Outputs...................................................................................................215-2
215.2 Applications ..................................................................................................215-3
216. Enhanced Analog Input Definition ......................................................... 216-1

216.1 Explanation ...................................................................................................216-3
216.1.1 Specifications .........................................................................................216-3
216.1.2 Outputs...................................................................................................216-4
216.2 Applications ..................................................................................................216-4
217. Enhanced Calibration Command ........................................................... 217-1

217.1 Explanation ...................................................................................................217-1
217.1.1 Specifications .........................................................................................217-1
217.1.2 Outputs...................................................................................................217-3
218. Phase Execution ...................................................................................... 218-1

218.1 Explanation ...................................................................................................218-2
218.1.1 Specifications .........................................................................................218-2
218.1.2 Outputs...................................................................................................218-2
218.1.3 Run-Time Fault Codes ...........................................................................218-3
218.2 PHASEX Function Block Configuration Example .....................................218-6
219. 219 Common Sequence .......................................................................... 219-1

219.1 Explanation ...................................................................................................219-2
219.1.1 Specifications .........................................................................................219-2
219.2 Function Block Outputs ...............................................................................219-3
TABLE OF CONTENTS - xvii
219.3 Application ....................................................................................................219-3
220. 220 Batch Historian ................................................................................. 220-1

220.1 Explanation ...................................................................................................220-2
220.1.1 Specifications .........................................................................................220-2
220.1.2 Outputs...................................................................................................220-4
221. I/O Device Definition ................................................................................ 221-1

221.1 Explanation ...................................................................................................221-4
221.2 Application ....................................................................................................221-6
222. Analog In/Channel ................................................................................... 222-1

222.1 Explanation ...................................................................................................222-4
222.1.1 Specifications .........................................................................................222-4
222.1.2 Outputs.................................................................................................222-12
222.2 Applications ................................................................................................222-12
223. Analog Out/Channel ................................................................................ 223-1

223.1 Explanation ...................................................................................................223-3
223.1.1 Specifications .........................................................................................223-3
223.1.2 Outputs...................................................................................................223-6
223.2 Applications ..................................................................................................223-6
224. Digital In/Channel.................................................................................... 224-1

224.1 Explanation ...................................................................................................224-3
224.1.1 Specifications .........................................................................................224-3
224.1.2 Outputs...................................................................................................224-5
224.2 Application ....................................................................................................224-6
225. Digital Out/Channel.................................................................................. 225-1

225.1 Explanation ...................................................................................................225-3
225.1.1 Specifications .........................................................................................225-3
225.1.2 Output ....................................................................................................225-5
225.2 Applications ..................................................................................................225-5
226. Test Status................................................................................................ 226-1

226.1 Explanation ...................................................................................................226-1
226.1.1 Specifications .........................................................................................226-1
226.1.2 Function Code 146 Status Conditions....................................................226-2
226.1.5 Function Codes 222 and 223 Status Conditions....................................226-6
226.1.6 Function Codes 224 and 225 Status Conditions....................................226-7
TABLE OF CONTENTS - xviii

226.1.10 Function Code 247 Status Conditions..................................................226-10
227. Gateway .................................................................................................... 227-1

227.1 Specifications ...............................................................................................227-3
227.2 Outputs ........................................................................................................227-10
228. Foreign Device Definition........................................................................ 228-1

228.0.1 Specifications .........................................................................................228-3
228.0.2 Outputs...................................................................................................228-9
228.1 Application ................................................................................................228-9
229. Pulse In/Channel ...................................................................................... 229-1

229.1 Explanation ...................................................................................................229-3
229.1.1 Specifications .........................................................................................229-3
229.1.2 Outputs...................................................................................................229-6
229.2 Application ....................................................................................................229-6
229.2.1 PI01 Example.........................................................................................229-7
241. DSOE Data Interface ................................................................................ 241-1

241.1 Explanation ...................................................................................................241-1
241.1.1 Specifications .........................................................................................241-1
242. DSOE Digital Event Interface .................................................................. 242-1

242.1 Explanation ...................................................................................................242-3
242.1.1 Specifications .........................................................................................242-3
243. Executive Block (SEM01/11) ................................................................... 243-1

243.1 Explanation ...................................................................................................243-1
243.1.1 Specifications .........................................................................................243-1
244. Addressing Interface Definition.............................................................. 244-1

244.1 Explanation ...................................................................................................244-1
244.1.1 Specifications .........................................................................................244-1
245. Input Channel Interface ........................................................................... 245-1

245.1 Explanation ...................................................................................................245-1
245.1.1 Specifications .........................................................................................245-1
246. Trigger Definition ..................................................................................... 246-1

246.1 Explanation ...................................................................................................246-2
246.1.1 Specifications .........................................................................................246-2
247. Condition Monitoring............................................................................... 247-1

TABLE OF CONTENTS - xix
247.1 Explanation ...................................................................................................247-4

247.1.1 Specifications .........................................................................................247-4
247.1.2 Outputs...................................................................................................247-8
247.2 Status Conditions .........................................................................................247-9
247.2.1 Configuration..........................................................................................247-9
247.2.2 Operational...........................................................................................247-10
248. Turbine I/O Device Definition .................................................................. 248-1

248.1 Explanation ...................................................................................................248-3
A. List of Function Codes ................................................................................ A-1

A.1 Introduction...................................................................................................... A-1
A.2 Cross Reference - Numerical Listing with Controller Support ................ A-2
A.3 Cross Reference - Alphabetical .................................................................. A-8
A.4 Cross Reference - Categorization................................................................ A-13
B. Symphony Plus SPC700 Control Processor ............................................. B-1

B.1 Memory Utilization and Execution Times...................................................... B-1
B.2 Memory Usage Equations............................................................................... B-7
B.3 Function Blocks - SPC700 .............................................................................. B-8
B.4 Module Status Information ............................................................................. B-9
C. Symphony Plus HC800 Control Processor ............................................... C-1

C.1 Memory Utilization and Execution Times...................................................... C-1
C.2 Memory Usage Equations............................................................................... C-7
C.3 Function Blocks............................................................................................... C-8
C.4 Module Status Information ............................................................................. C-9
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 .................. D-1

D.1 Memory Utilization and Execution Times...................................................... D-1
D.2 Memory Usage Equations............................................................................... D-7
D.3 Function Blocks - BRC-300/400/410 and HPG800 ........................................ D-9
D.4 Module Status Information ........................................................................... D-10
E. Harmony Bridge Controller (BRC-100/200) ............................................... E-1

E.1 Memory Utilization and Execution Times...................................................... E-1
E.2 Memory Usage Equations............................................................................... E-7
E.3 Function Blocks - BRC-100/200 ..................................................................... E-8
E.4 Module Status Information ........................................................................... E-10
F. Harmony Area Controller (HAC) ................................................................. F-1

F.1 Memory Utilization and Execution Times.......................................................F-1
F.2 Memory Usage Equations................................................................................F-7
F.3 Function Blocks - HAC.....................................................................................F-8
F.4 Module Status Information ..............................................................................F-9
TABLE OF CONTENTS - xx
G. Multi-Function Processors (IMMFP11/12)..................................................G-1

G.1 Memory Utilization and Execution Times...................................................... G-1
G.2 Memory Usage Equations............................................................................... G-6
G.3 Function Blocks - IMMFP11/12 ....................................................................... G-7
G.4 Module Status Information ............................................................................. G-8
H. Sequence of Events Monitor (INSEM01 and INSEM11/SPSEM11)........... H-1

H.1 Memory Utilization........................................................................................... H-1
H.2 Module Status Information ............................................................................. H-1
I. Communications Modules Status Bytes and Data Bits ............................ I-1

I.1 Introduction........................................................................................................ I-1
I.2 CP700 Communications Processor Module Status Information .................. I-1
I.3 CP800 Communications Processor Module Status Information .................. I-4
I.4 INICT03/03A/13 and INICT12 Cnet to Computer Transfer Modules............... I-7
I.5 INIET800 and SPIET800 Cnet to Computer Transfer Modules ...................... I-9
I.6 INIIT03 and INIIT13/SPIIT13 Local Transfer Module ..................................... I-11
I.7 INNPM11/22, INNPM12 and SPNPM22 Network Processing Modules ........ I-12
I.7.1 Cnet Mode................................................................................................. I-13
I.7.2 Plant Loop Mode .......................................................................................I-14
I.8 PNI800 Plant Network Interface 800 Module ................................................. I-15
I.9 SPIPT800 INFI-NET to PN800 Transfer Module ............................................. I-17
I.10 Module Status Information - Gateway Module IOR800 and IOR810 ........... I-19
J. Point Quality Definition ............................................................................... J-1

J.1 General Description ......................................................................................... J-1
J.2 Individual Analog Inputs .................................................................................. J-1
J.3 Group Analog Inputs ........................................................................................J-1
J.4 Group Analog Outputs ..................................................................................... J-1
J.5 Digital I/O ........................................................................................................... J-1
J.6 Peer-to-Peer and Module Bus I/O.................................................................... J-1
K. Console Engineering Unit Descriptions .................................................... K-1

K.1 Engineering Unit Descriptions Tables ........................................................... K-1
LIST OF TABLES - i
LIST OF TABLES
Table 24-1 Conversions Performed by the Adapt Block .............................................. 24-1

Table 34-1 Power Up or Controller Reset Truth Table ................................................. 34-1
Table 34-2 Normal Operation Truth Table ................................................................... 34-1
Table 37-1 2-Input AND Truth Table ............................................................................ 37-1
Table 38-1 4-Input AND Truth Table ............................................................................ 38-1
Table 39-1 2-Input OR Truth Table .............................................................................. 39-1
Table 40-1 4-Input OR Truth Table .............................................................................. 40-1
Table 55-1 Module Status Bit Map .............................................................................. 55-4
Table 55-2 LVDT Status .............................................................................................. 55-5
Table 55-3 Position Feedback Options ....................................................................... 55-7
Table 61-1 Truth Table for Output Values .................................................................... 61-1
Table 62-1 RCM Input to Output Relationship ............................................................ 62-1
Table 69-1 Outputs from Test Alarm Block .................................................................. 69-1
Table 80-1 Track Behavior of the Station Block ..........................................................80-4
Table 82-1 Total Segment Checkpoint Utilization ........................................................ 82-3
Table 90-1 Available PC View Tag Names .................................................................. 90-5
Table 101-1 Exclusive OR Truth Table ........................................................................101-1
Table 114-1 BCD to Real Conversion Format ............................................................. 114-1
Table 114-2 BCD to Real Conversion Example .......................................................... 114-2
Table 115-1 Module Output Capacity .......................................................................... 115-1
Table 115-2 Real to BCD Conversion Format ............................................................. 115-2
Table 115-3 Real to BCD Conversion Example 1 ....................................................... 115-3
Table 115-4 Real to BCD Conversion Example 2 ....................................................... 115-4
Table 123-1 Override Permissive/State Specifications ...............................................123-2
Table 123-2 Recipe Contents ....................................................................................123-13
Table 126-1 Integer Mode Input to Output Relationship .............................................126-2
Table 126-2 Each Group of Outputs Represents Two Real Digits ..............................126-2
Table 126-3 Sample Outputs of a Real Signal Demultiplexer Block ...........................126-3
Table 129-1 Truth Table for Selection of Output Masks in Auto Mode ........................129-3
Table 129-2 Four-Digit Feedback Mask ......................................................................129-4
Table 133-1 Specification S3 Engineering Units .........................................................133-3
Table 140-1 Save Action .............................................................................................140-2
Table 140-2 BRC-100/200/300/400 and IMMFP11/12 Additional NVRAM
and Checkpoint Utilization Byte Size ......................................................140-3
Table 140-3 HAC Additional NVRAM and Checkpoint Utilization Byte Size ...............140-4
Table 141-1 Output Descriptions .................................................................................141-3
Table 142-1 Output Descriptions .................................................................................142-3
Table 146-1 Block Inputs to be Reserved ...................................................................146-4
Table 146-2 Example S4 Calculation ..........................................................................146-5
Table 147-1 Function Blocks Supported by Remote I/O Definition
Block (Expander Bus) .............................................................................147-2
LIST OF TABLES - ii
Table 147-3 RMP Shared Memory Usage ..................................................................147-3

Table 147-2 Function Blocks Supported by Remote I/O Definition
Block (Hnet/HN800) ................................................................................147-3
Table 148-1 BSEQ Run-Time Fault Codes .................................................................148-3
Table 151-1 HSI Color Codes .....................................................................................151-2
Table 161-1 Definition of Step Inputs for Sequence Generator Blocks .......................161-4
Table 168-1 Interpolator Block Determines Steam Properties ....................................168-3
Table 177-1 Quality State Override Bit Map ................................................................177-3
Table 177-2 16 Bit Map ...............................................................................................177-3
Table 177-3 16 Bit Binary Number ..............................................................................177-4
Table 177-4 Bit Map ....................................................................................................177-6
Table 177-5 Alarm Thresholds ....................................................................................177-7
Table 177-7 Output N+1 Bit Map ...............................................................................177-10
Table 178-1 Status Bits at Current Block Address ......................................................178-2
Table 178-2 Extended Status Bit Map .........................................................................178-2
Table 178-3 Example DAANG Settings ......................................................................178-4
Table 185-1 Input Group Identification ........................................................................185-3
Table 186-1 Input Group Identification ........................................................................186-3
Table 187-1 Output Group Identification .....................................................................187-3
Table 188-1 Output Group Identification .....................................................................188-2
Table 194-1 Input Control Specification <S2> .............................................................194-2
Table 194-2 Data Export Function Block Operation ....................................................194-2
Table 194-3 Input Status Specification <S3> ..............................................................194-3
Table 194-4 Block Status Output N+1 .........................................................................194-4
Table 201-1 Block Numbers for INFI-NET ...................................................................201-2
Table 201-2 Example IPT Module Configuration .........................................................201-3
Table 202-1 Settings for Figure 202-2 Configuration ..................................................202-4
Table 202-2 Settings for Figure 202-3 Configuration ..................................................202-5
Table 203-1 Outputs ....................................................................................................203-1
Table 203-2 Specifications ..........................................................................................203-3
Table 203-3 Specification Settings for Figure 203-2 Configuration .............................203-9
Table 203-4 Specification Settings for Figure 203-3 Configuration ........................... 203-11
Table 211-1 S1 Status Bit Map ................................................................................... 211-3
Table 211-2 Valid Combinations for S1 ....................................................................... 211-4
Table 211-3 Permit Input Bit Map ................................................................................ 211-4
Table 211-4 Selected Input Bit Map ............................................................................ 211-5
Table 211-5 Bits 0 and 1 Valid Combinations for S6 ................................................... 211-6
Table 211-6 Mode Time Parameters ........................................................................... 211-8
Table 211-7 Alarm Mode Control Bit Map ................................................................... 211-9
Table 211-8 Time Parameters for Alarm Modes ........................................................ 211-13
Table 211-9 S14 Bit Map ........................................................................................... 211-14
Table 211-10 Valid Combination for S14 ..................................................................... 211-14
LIST OF TABLES - iii
Table 211-11 Extended Status Bit Map ....................................................................... 211-16

Table 212-1 Decoded Extended Status Bit Map .........................................................212-2
Table 215-1 Function Code 216 at Block Address 90 .................................................215-3
Table 215-2 Function Code 215 at Block Address 100 ...............................................215-4
Table 218-1 PHASEX Run-Time Fault Codes .............................................................218-3
Table 219-1 Function Code 219 Specification Settings for Figure 219-2 ....................219-4
Table 221-1 Analog Input Block ..................................................................................221-7
Table 221-2 Analog Output Block ...............................................................................221-8
Table 221-3 Control Input/Output ................................................................................221-8
Table 221-4 Digital Input Block ...................................................................................221-9
Table 221-5 Digital Input/Output Block ......................................................................221-10
Table 221-6 Digital Output Block ............................................................................... 221-11
Table 222-1 Mapping PROFIBUS Data Type to Channel Type .................................222-10
Table 222-2 Example Cold Junction Compensation Values using
the Same S26 Value for all Channels ....................................................222-12
Table 222-3 Function Code 221 at Block Address 1000 ...........................................222-13
Table 226-1 Function Code 146 Status Conditions .....................................................226-2
Table 226-4 Function Codes 222 and 223 Status Conditions .....................................226-6
Table 226-5 Function Codes 224 and 225 Status Conditions .....................................226-7
LIST OF TABLES - iv

Table 226-9 Function Code 247 Status Conditions ...................................................226-10
Table 228-1 FC 228 S2 Parameters ...........................................................................228-4
Table 228-2 Modules Supported by FC 228 S2 Parameters ......................................228-5
Table 228-4 CI850 IEC 61850 S2 Parameter List .......................................................228-7
Table 228-5 SCI200 IEC 60870-5-104 S2 Parameters List ........................................228-7
Table 228-3 FC 228 S2 Specification Settings for SENSOR and PSMODE ...............228-7
Table 245-1 Information Format for Specifications S3 through S18 ...........................245-2
Table 247-1 Truth Table for Dual Voting Settings ........................................................247-6
Table A-1 Numerical Listing with Controller Support .................................................. A-2
Table A-2 Alphabetical Listing .................................................................................... A-8
Table A-3 Adapt ........................................................................................................ A-13
Table A-4 Advanced Functions ................................................................................. A-14
Table A-5 BASIC Language ..................................................................................... A-14
Table A-6 Batch Functions ....................................................................................... A-14
Table A-7 Batch Language ....................................................................................... A-15
Table A-8 C Language .............................................................................................. A-15
Table A-9 Communications ...................................................................................... A-15
Table A-10 Computing ................................................................................................ A-15
Table A-11 Controlway/Module Bus/CW800 and Peer-to-Peer Network I/O .............. A-16
Table A-12 Control Function Blocks ........................................................................... A-16
Table A-13 Exception Report ...................................................................................... A-16
Table A-14 Executive .................................................................................................. A-17
Table A-15 Factory Instrumentation Protocol ............................................................. A-17
Table A-16 Field I/O .................................................................................................... A-17
Table A-17 Harmony I/O and Foreign Devices (PROFIBUS & HART) ....................... A-17
Table A-18 Harmony Bridge Controller Executive ...................................................... A-18
Table A-19 Ladder Logic ............................................................................................ A-18
Table A-20 Logic ......................................................................................................... A-18
Table A-21 I/O Expander Bus ..................................................................................... A-18
Table A-22 Restore ..................................................................................................... A-19
Table A-23 Sequence Command ............................................................................... A-19
Table A-24 Sequence of Events ................................................................................. A-19
Table A-25 Signal Select ............................................................................................ A-19
Table A-26 Signal Status ............................................................................................ A-20
Table A-27 Station ...................................................................................................... A-20
Table A-28 Text Selector ............................................................................................ A-20
Table A-29 Trend ........................................................................................................ A-20
Table A-30 Trip ........................................................................................................... A-20
Table A-31 User Defined Function ............................................................................. A-20
Table B-1 SPC700 Memory Utilization and Execution Times ..................................... B-1
LIST OF TABLES - v
Table B-2 SPC700 Module ......................................................................................... B-8

Table B-3 Byte and Bit Description - SPC700 ............................................................ B-9
Table B-4 Byte Description - SPC700 ...................................................................... B-10
Table C-1 HC800 Module Memory Utilization and Execution Times .......................... C-1
Table C-2 HC800 Module Function Code Blocks ....................................................... C-8
Table C-3 HC800 Module Status Byte and Data Bit Description ................................ C-9
Table C-4 HC800 Status Byte Description ............................................................... C-10
Table D-1 BRC-300/400/410 and HPG800 Memory Utilization and
Execution Times ......................................................................................... D-1
Table D-2 FC221 Execution Times ............................................................................. D-7
Table D-3 BRC-300/400/410 and HPG800 Modules .................................................. D-9
Table D-4 Bit Description - BRC-300/400/410 and HPG800 .................................... D-10
Table D-5 Byte Description - BRC-300/400/410 and HPG800 ................................. D-10
Table E-1 BRC-100/200 Memory Utilization and Execution Times ............................ E-1
Table E-2 FC221 Execution Times ............................................................................. E-7
Table E-3 BRC-100/200 Module ................................................................................. E-8
Table E-4 Bit Description - BRC-100/200 ................................................................. E-10
Table E-5 Byte Description - BRC-100/200 .............................................................. E-10
Table H-1 Available Module Configuration Memory .................................................... H-1
Table H-2 Module Memory Utilization for Function Codes ......................................... H-1
Table H-3 Bit Description - INSEM01 and SEM11 ...................................................... H-1
Table H-4 Byte Description - INSEM01 ...................................................................... H-2
Table I-1 CP700 Module Status Byte and Data Bit Description .................................. I-1
Table I-2 CP700 Communications Processor Module Status Bit Descriptions ........... I-2
Table I-3 CP800 Module Status Byte and Data Bit Description .................................. I-5
Table I-4 CP800 Communications Processor Module Status Bit Descriptions ........... I-5
Table I-5 INICT03/03A, INICT13 and INICT12 Status Bytes ...................................... I-7
Table I-6 INICT03/03A, INICT13 and INICT12 Status Bits ......................................... I-8
Table I-7 IET800 Status Bytes .................................................................................... I-9
Table I-8 IET800 Status Bits ..................................................................................... I-10
Table I-9 IIT03/13 Status Bytes ................................................................................. I-11
Table I-10 IIT03/13 Status Bits .................................................................................... I-12
Table I-11 INNPM11/12 and NPM22 Cnet Mode Status Bytes ................................... I-13
Table I-12 INNPM11/12/22 Cnet Mode Status Bits ..................................................... I-13
Table I-13 INNPM12 Status Bytes (Plant Loop Mode) ................................................ I-14
Table I-15 PNI800 Status Bytes .................................................................................. I-15
Table I-14 INNPM12 Status Bits (Plant Loop Mode) ................................................... I-15
Table I-16 PNI800 Status Bits ..................................................................................... I-16
Table I-17 SPIPT800 Status Byte Description ............................................................ I-17
Table I-18 SPIPT800 Status Bit Descriptions .............................................................. I-18
Table I-19 Byte and Bit Description - IOR800/810 ...................................................... I-19
Table I-20 Byte Description - IOR800/810 .................................................................. I-20
LIST OF TABLES - vi
1. Function Generator
1. Function Generator
This function2VAA000844R0001 J2VAA000844R0001 J approximates a nonlinear output to input relationship. The input
range is divided into five sections and a linear input to output relationship is set up for each of the five sections. This function
then computes an output that is related to the input according to the five linear relationships.
S1 (1)
F (X ) N
NOTES:
1. When function code 1 is used as a shaping algorithm for function code 222 (analog in/channel), its tunable specifications are
not adaptable.
2. When function code 1 is used as a shaping algorithm, it can not at the same time also be used as a logic function because the
block output will not respond to the specification S1 input. Function code 1 should not be referenced by function blocks other than
function code 177 or function code 222 blocks utilizing it as a shaping algorithm.
3. Multiple instances and combinations of function code 177 and 222 function blocks can utilize the same function code 1 func-
tion block as a shaping algorithm. The function code 1 shaping algorithm function block is not required to be in the same segment
as the function code 177 or function code 222 blocks.
Outputs
Blk Type Description
N R Output value of function
Specifications
Spec Tune Default Type Range Description

S1 N 5 I Note 1 Block address of input
S2 Y 4 E6 R Full Input coordinate
S3 Y 0.000 R Full Output coordinate for S2
NOTE:
1. Maximum values are:
9,998 for the SPC700, BRC-100/200/300, and IMMFP11/12
31,998 for the HC800, BRC-400/410, HPG800 and HAC
2VAA000844R0001 J 1-1
Explanation 1. Function Generator
1.1 Explanation
To set up this function, first determine what the output should be for a given range of input and draw a graph to show this
relationship. Divide the graphed relationship into five sections, preferably into sections where straight lines can closely
approximate the graph as shown in Figure 1-1.
Y AXIS
S13 (Y6) 15
S11 (Y5) 13
S9 (Y4) 9
OUTPUT
S7 (Y3) 5
S5 (Y2) 2
S3 (Y1) 1
X AXIS
2 6 10 12 18 30
(X1) (X2) (X3) (X4) (X5) (X6)
S2 S4 S6 S8 S10 S12
INPUT T01575A
Figure 1-1 Graph of Input Versus Output
The coordinates of the end points of the sections are used as entries for S2 through S13. The even-numbered
specifications are the X-axis coordinates and the odd-numbered are the Y-axis coordinates. Consequently, when the X-axis
input value is at S2, the output will be the value of S3 as shown in the graph. This divides the graph into five linear (straight-
line) sections, with each section having its own particular slope as shown in Figure 1-2.
Y AXIS
S13 (Y6) 15
S11 (Y5) 13
S9 (Y4) 9
OUTPUT
S7 (Y3) 5
S5 (Y2) 2
S3 (Y1) 1
0
X AXIS
2 6 10 12 18 30
(X1) (X2) (X3) (X4) (X5) (X6)
S2 S4 S6 S8 S10 S12
INPUT
T01576A
Figure 1-2 Sectioned Input-Output Graph
If the input value is between two X-axis points, the output will be determined by the equation:
 Y n – Yn – 1 
Block Output =  Y n – 1  + ------------------------------   X – X n – 1 
 X n – Xn – 1 
where:
X = Present input value.
Xn = X-axis specification point just to the right of
the present input value.
Xn-1 = X-axis specification point just to the left of
the present input value.
Yn = Y-axis coordinate that corresponds to Xn.
Yn-1 = Y-axis coordinate that corresponds to Xn-1.
1-2 2VAA000844R0001 J
1. Function Generator High and Low Limits
 Yn =
Slope of the particular graph segment
– Yn – 1 
-----------------------------
-
between (Xn,Yn) and (Xn-1,Yn-1). This is the
 Xn – Xn – 1 
unit output change per unit input change.
X – Xn-1 = Amount that the input is above the next
lower specification point.
For example, suppose the graph shown in Figure 1-1 is a graph of desired output values for input values. These values may
represent any engineering units.
First, the graph is divided into five sections as shown in Figure 1-2. The coordinates of the end points of these segments are
then entered into the module.
Suppose the input <S1> to the function block represented by Figure 1-2 is six units. This corresponds to point S4.
Therefore, the output will be two units (S5). If the input is ten units (which corresponds to S6), the output will be five units
and so on. If the input is between six units and ten units (for example, seven units), the output is determined according to
the function equation. The values for the equation become:
Xinput =7
Xn = S6 = 10
Xn-1 = S4 = 6
Yn = S7 = 5
Yn-1 = S5 = 2
The equation becomes:
 S7 – S5 
Output = S5 + -----------------------   7 – S4 
 S6 – S4 
5–2
= 2 + ---------------   7 – 6 
10 – 6
= 2.75
1.1.1 High and Low Limits
If the input <S1> goes higher than the S12 value, the output will remain at the S13 value for the high limit. If the input goes
below the S2 value, the input will remain at the S3 value for the low limit.
1.2 Applications
Five possible applications of function generators are illustrated in Figures 1-3, 1-4, 1-5, 1-6 and 1-7. Figures 1-6 and 1-7
illustrate the use of multiple function generators to achieve good resolution when representing a complex function.
FL O W
OR S1 (1 ) S1
F (X)
D E M AN D N S2  (K) (1 5 )
N
S IG N A L
TR A N S M ITTE R
T 01 57 7 A
Figure 1-3 Programming Set Point or Bias
GAIN = 1.0
SET POINT
S1
 (K)
OUTPUT (15) S1 (1)
S2 F(X)
N N
INPUT
NOISEBAND
TRANSMITTER
GAIN = 0.3 T01578A
Figure 1-4 Noise Filter
2VAA000844R0001 J 1-3
Applications 1. Function Generator
Figure 1-5 Obtain an Adaptive Gain for a Nonlinear Process
1 00
90 S PE C IF IC ATIO N S E TT IN G S
80
F (X ) 1 F( X) 2
70
S1 = BL O CK S1 = BLO CK
60
IN PU T IN P U T
50 S2 =0 S2 = 50
40 S3 = 100 S3 = 0
S4 = 10 S4 = 60
30
S5 = 90 S5 = 30
20 S6 = 20 S6 = 70
10 S7 = 70 S7 = 50
0 S8 = 30 S8 = 80
0 10 20 30 40 50 60 70 80 90 1 00 S9 = 30 S9 = 50
S1 0 = 40 S 10 = 90
S1 1 = 20 S 11 = 40
F( X) 1 F( X) 2 S1 2 = 50 S 12 = 100
S1 3 =0 S 13 = 70
S1 (1 ) S1
F (X) 1
N S2
(14)
S3  N
S4
IN P U T
S1 (1 )
F (X) 2
N
T 0 1 5 80 A
Figure 1-6 Greater Curve Resolution - Two Function Generators
100
S PE C IF IC ATIO N SE TT IN G S
90
80 F (X ) 1 F (X ) 2 F (X ) 3 F (X ) 4
70
S 1 = B LO C K S1 = BLO CK S 1 = B LO C K S1 = BLO CK
60 IN P U T IN P U T IN P U T IN P U T
50 S2 = 0 S2 = 25 S2 = 50 S2 = 75
40 S3 = 0 S3 = 18 S3 = 48 S3 = 80
30 S4 = 5 S4 = 30 S4 = 55 S4 = 80
S5 = 5 S5 = 20 S5 = 55 S5 = 87
20
S6 = 1 0 S6 = 35 S6 = 60 S6 = 85
10 S7 = 7 S7 = 25 S7 = 55 S7 = 95
0 S8 = 1 5 S8 = 40 S8 = 65 S8 = 90
0 10 20 30 40 50 60 70 80 90 1 00 S9 = 1 0 S9 = 40 S9 = 70 S9 = 97
S 10 = 2 0 S10 = 45 S 10 = 7 0 S10 = 95
S 11 = 1 5 S11 = 42 S 11 = 7 5 S11 = 98
F( X) 1 F( X) 2 F (X) 3 F( X) 4 S 12 = 2 5 S12 = 50 S 12 = 7 5 S12 = 100
S 13 = 1 8 S13 = 48 S 13 = 8 0 S13 = 100
A N AL O G S1 (1) S1
B LO C K IN PU T F (X) 1
N N S2
(10 )
S3 N
S4
S1 (1)
F (X) 2
N
S1 (1)
F (X) 3 N
S1 (1)
F (X) 4 N
T 01 5 81 A
Figure 1-7 Greater Curve Resolution - Four Function Generators
1-4 2VAA000844R0001 J
2. Manual Set Constant Signal Generator) Applications
2. Manual Set Constant Signal Generator)

The output of the manual set constant is an analog signal developed within the function that is equal to <S1>. This function
provides a tunable output value in engineering units.
Outputs
(2 )
A N
N R User selected constant
Specifications
S1 Y 0.000 R Full Output value in engineering units
2.1 Applications
2.1.1 Scaler
Figure 2-1 illustrates how to use the manual set constant as a scaler. In the example, the transmitter has a range of 200 to
700 pounds per square inch. The range is scaled up 200 pounds per square inch by setting the manual set constant to 200.
The summer adds <S1> and <S2> to provide an output range of 400 to 900 pounds per square inch.
PT
2 0 0 -7 0 0
p si
S1 O U T PU T = S 1 + S 2
A
(2 ) S2  (K) (1 5)
N
OR
N 4 0 0 -9 0 0 p si
S 3 = 1 (G AIN O F S 1 )
S 1 = 20 0 S 4 = 1 (G AIN O F S 2 )
T 01 5 82 A
Figure 2-1 Scaler Configuration
2.1.2 Set Point
Figure 2-2 illustrates how to use the manual set constant for a set point configuration. The transmitter range is ten to 20
inches of water. The desired set point (output of the summer block) is 15 inches of water. By setting the manual set constant
to -15, the summer subtracts <S2> from <S1>. Thus, when <S1> equals 15 inches of water, output N of the summer block
equals zero inches of water which shows the level has reached set point.
Figure 2-2 Set Point Configuration
2VAA000844R0001 J 2-1
Set Point 2. Manual Set Constant Signal Generator)
2-2 2VAA000844R0001 J
3. Lead/Lag Explanation
3. Lead/Lag
The output of a lead/lag function code equals the product of the time function and the input value. Specifications S3 and S4
provide lead (S3) or lag (S4) functions. Function code 3 also serves as a lead/lag filter.
Outputs
S1
S2 F (t)
(3 ) Blk Type Description
N
N R Output value with lead/lag function applied
Specifications
S2 N 0 I Note 1 Block address of track switch signal:

0 = track
1 = release
S3 Y 0.000 R Full Time constant T1 (lead) sec
S4 Y 0.000 R Full Time constant T2 (lag) sec

NOTE:
3.1 Explanation
Function code 3 causes the output of the function block to lead or lag changes in the input signal <S1>. The following
equation describes the operation:
S3   S1 –  S1 L  dt   S1 – Y L 
Y = Y L + -------------------------------------------
- + ----------------------------------
S4 + dt S4 + dt
where:
<S1> = Present input value.
<S1L> = Value of the input on the previous cycle.
S3 = Value of time constant T1 (lead) in
seconds.
S4 = Value of time constant T2 (lag) in seconds.
Y = Present output value.
YL = Value of the output on the previous cycle.
= dtModule cycle time (seconds).
The S2 term enables or disables this function. If <S2> is a logic 0, then the output equals the input <S1>. If <S2> is a logic
1, the lead or lag function is implemented.
3.1.1 Lag Function
To select the lag function, leave S3 at its initial value (0) and enter a number for S4. The equation then becomes:
dt   S1 – Y L 
Y = Y L + ---------------------------------
-
S4 + dt
S4 is the time constant term. This is the time required for the output of this function to reach 63.2 percent of the input value.
At the end of five time constants the output will reach approximately 99 percent of the input value. To calculate the S4 term
needed for the output to equal the input in a certain number of seconds (t), use the following equation:
2VAA000844R0001 J 3-1
Lead Function 3. Lead/Lag
t
S4 = ---
5
where:
S4 = Time constant term for function code 3.
t =
Number of seconds for the output to reach about
99 percent of the input value.
5 = Number of time constants required for the output
to reach about 99 percent of the input value.
For example, for the output to reach the input level in 30 seconds, the S4 term needed would be:
S4 = 30
------ = 6
5
3.1.2 Lead Function
To select only a lead function, leave S4 at its initial value of zero and enter a number for S3.
The equation then becomes:
 S3   S1 –  S1 L   +  dt   S1 – Y L  
Y = Y L + ----------------------------------------------------------------------------------------------
dt
where:
<S1> = Present input value.
<S1L> = Value of the input on the previous cycle.
S3 = Time constant T1 (lead) in seconds.
S4 = Time constant T2 (lag) in seconds.
Y = Present output value.
YL = Value of the output on the previous cycle.
= dt Module cycle time (seconds).
The output is set to the value that the input will be in (S3) seconds if it continues to change at the same rate as it did during
the last cycle. The lead function is essentially equal to the derivative function except that the block output eventually equals
the input if the input remains constant long enough. The output of a derivative function is zero when the input is not
changing.
3.2 Applications
Figures 3-3 and 3-4 illustrate some general input and output signal shapes for a function code 3 used as a lag filter and as
a lead filter respectively. The input signals shown in Figures 3-1 and 3-2 are ideal waveforms for electronic circuits. Actual
outputs and inputs vary because Symphony function codes are preprogrammed algorithms.
IN P U T
S IGN A L S
(A ) S1 (A )
(3 )
S2 F(t)
N
B L O C K A D D R ES S
OF
(B ) T R A C K S W IT C H (B )
S IGN A L
IN P U T S IGN A L S ( S1 ) OU TP U T S IG N A LS (N )
T 01 5 8 4 A
Figure 3-1 Lag Filter
3-2 2VAA000844R0001 J
3. Lead/Lag Applications
IN P U T
S IGN A L S
(A ) S1 (A )
(3 )
S2 F(t)
N
B L O C K A D D R ES S
OF
(B ) T R A C K S W IT C H (B )
S IGN A L
IN P U T S IGN A L S ( S1 ) OU TP U T S IG N A LS (N )
T 01 5 8 5 A
Figure 3-2 Lead Filter
Figures 3-3 and 3-4 are simplified examples of using function code 3 in boiler applications. Figure 3-3 shows function code
3 used as a lag to delay decreases in air flow for a load decrease. Figure 3-4 shows function code 3 used as a lead/lag to
compensate for drum level shrink and swell due to changes in steam flow.
B OIL E R S1
DE M AN D S2 A IR
(1 0 )
S3 F L OW
260 D E M AN D
S4
S1
A IR F L O W (3 )
S2 F (t)
C O N T RO L 25 0
IN AU T O
LAG
T 01 5 86 A
Figure 3-3 Lag to Delay Decreases in Air Flow on a Load Decrease
PID
D R U M LE VE L S2 (1 9 )
S E T P O IN T SP
S1 15 0
D R U M LE VE L PV
S3
TR
S4 S1 F E E DW ATE R
 (K )
TS (1 5 )
S2 FLOW
170 S ET PO IN T
S1 (3 )
S T E A M FL O W
S2 F (t)
F E E DW AT E R FL O W 160
C O N T RO L IN AU TO
LEAD
L AG
T 01 5 8 7 A
Figure 3-4 Lead/Lag to Compensate for Drum Level Shrink and Swell
2VAA000844R0001 J 3-3
Applications 3. Lead/Lag
3-4 2VAA000844R0001 J
4. Pulse Positioner Explanation
4. Pulse Positioner
The pulse positioner (PULPOS) function code is not supported with any I/O Gateway; that
is, any H-Net or HN800 module that is configured using function code 227. This includes
the IOR800/IOR810 and PDP800 modules. Attempting to connect this function code to
any digital output channel connected through an I/O Gateway (function code 227) will
result in the I/O Gateway module not starting up.
S800 I/O will cause these modules to enter error mode.
The pulse positioner (PULPOS) function code compares two analog input signals and produces output pulses that are
proportional in time duration to the difference between these two analog signals. Both inputs are expressed as a percentage
of the total range or span of the process parameter. Any difference is converted to a timed forward or reverse boolean
output. The time duration of the boolean signal is proportional to the percent error and the specified stroke time. There are
provisions for specifying the error dead band and the cycle time.
The PULPOS function code uses two consecutive block addresses. For correct operation, block addresses N and N+1
should be sent directly to two digital output blocks in the same I/O module. This is accomplished by using any digital output
(such as function code 79, 83, 225, etc.) for the Harmony controllers.
Outputs N and N+1 of function code 4 must be in the same I/O group of function code 83 (digital output group).
Outputs

PU LPO S
S1
I
(4 ) N B Output value of timed raise (forward pulse)
S2 N
P
N+1
N+1 B Output value of timed lower (reverse pulse)
Specifications
S1 N 5 I Note 1 Block address of set point signal
S2 N 5 I Note 1 Block address of feedback signal
S3 Y 0.000 R Full Forward stroke rate (%/sec)
S4 Y 0.000 R Full Reverse stroke rate (%/sec)
S5 Y 0.000 R Full Deadband (%) – absolute deadband
S6 Y 0.000 R Full Cycle time (secs)

NOTE:
4.1 Explanation
The output of the pulse position function is a series of pulses having pulse durations proportional to the difference between
the desired set point value input signal <S1> and the actual value feedback signal <S2>. These two signals are expressed
in percent of total range or span of the process parameter. <S1> and <S2> are typically scaled to the same engineering unit
to obtain proper operation.
This function block produces two outputs. Output N generates a signal when the measured process value is less than the
desired output. Output N+1 generates a signal when the measured process value is greater than the desired value. The
assigned block number (N) references the first output which is a forward or increase output. The next consecutive block
number (N+1) references the second output which is a reverse or decrease output. If this block drives a digital I/O module,
both outputs must be directed to the same group on the I/O module and must use consecutive I/O module outputs.
The difference between the desired value signal <S1> and the actual value (feedback) signal <S2> is called the error
signal. Specification S5 is the deadband; that is, the amount of error that is allowed before a correction is necessary. If <S2>
is less than <S1> by an amount greater than the deadband, there will be a forward output. To determine the forward output
pulse widths use the calculation:
2VAA000844R0001 J 4-1
Cycle Time 4. Pulse Positioner
 S1 –  S2 seconds

Forward output pulse duration = -----------------------------
S3
If S1 S2 > S5

Forward output pulse OFF time = (S6) – (forward output pulse duration)
 S2 –  S1
Reverse output pulse duration = -----------------------------
S4
If S2  S1 > S5

Reverse output pulse OFF time = (S6) – (reverse output pulse duration)
where:
<S1 > Value of set point signal
<S2> Value of feedback signal
S3 Value of forward stroke rate (percent per
second)
S4 Value of reverse stroke rate (percent per
second)
S5 Value of deadband (percent)
S6 Cycle time (seconds)
NOTES:
1. Forward and reverse output pulse durations are computed to the nearest ten-millisecond minimum for Harmony controllers.
2. If output blocks N and N+1 are not directly connected to a digital output, the forward and reverse output pulse durations are
set to module segment time.
4.1.1 Cycle Time
Cycle time (S6) sets the time between calculations, or how often this function is calculated. It delays the processing of the
block.
4.1.2 Stroke Rate
The stroke rates (S3 and S4) are entered in units of percent per one second. The stroke rate sets the length of time that the
forward or reverse signal remains high for each percent of error (when error is greater than deadband). If S3 is set to ten
percent per second and the deadband is set to two percent, then the forward output will be held high one second for every
ten percent error, or until the next cycle, whichever comes first. If there is 90 percent error above the deadband when S3 is
ten percent per second, then the forward output remains high for nine seconds or until the cycle ends. The minimum pulse
duration is ten milliseconds and the smallest incremental pulse length possible is ten milliseconds.
90%
Forward output pulse duration = ----------------------------- = 9 sec
10% per sec
If 90% > 2
4.2 Applications
Figure 4-1 shows how the pulse position function code can control a pulse type valve positioner. The PULPOS function
block is internally automatic, but there are no provisions for operator intervention. Using the PID (function code 19) and the
M/A (function code 80) control loop allows selecting a desired set point for operation in the auto mode. The control loop then
regulates the set point signal to the PULPOS function block to maintain a constant valve position based on the valve
position feedback.
In manual mode, the PULPOS function block set point is directly selected via manipulation of the control output value. In
either manual or auto mode, the PULPOS function block controls the field device based on the specification settings and
4-2 2VAA000844R0001 J
4. Pulse Positioner Applications
the relationship exhibited between <S1> and <S2>. The PULPOS function block pulses a raise or lower output signal to
adjust for errors.
D E S IR E D FL O W
P R O C E S S VA R IA B L E
(TO TA L F L O W ) D E S IR E D VA LV E
P O S IT IO N
C ISI/O M /A
(7 9 ) M FC /P
N S1 (8 0)
PV SP PULPO S
N +1 P ID S2 N +1 S1 (4 )
SP O I
N +2 S2 (1 9) S3 N S2 N
SP A A P
N +3 S1 N S4 N +2 N +1
PV TR C/R
N +4 S3 S5 N +4
S10 TR TS C
S4 N +3
TS
S 18 MI C -F
N +5
N +5 S 19 AX
S 11 S 20 C /R
S 21 LX
N +6 S 22 CX
N +7 S 24 HAA
N +8 S 25 P U L S E R A IS E
S15 LAA
S 26 HAD
S16 PU LSE LOW ER
S 27 L DA
S17 (3 3)
S1 S 28
S18 NOT AO
N S 29 T R S2
N +9 S 30 T R PV
T
F E E D B AC K
R EFER ENC E
VA LV E P O S IT IO N F E E D B A C K
VA LV E P U LS E P O S IT IO N S IG N A L
VA LV E P U L S E P O S IT IO N S IG N A L
T 01 58 8A
Figure 4-1 PULPOS Controlling a Pulse Valve Positioner
NOTES:
1. The outputs of the PULPOS must go to the same device definition function code when used in BRC-100 or HAC controllers.
2. The control stations should be configured to display the position feedback on the output bar graph.
2VAA000844R0001 J 4-3
Applications 4. Pulse Positioner
3. For BRC-100 and HAC controllers with firmware earlier than D0, a maximum of two pulse positioner function blocks can be
configured in each Harmony I/O block (that is, DIO-400, CIO-100). Figure 4-2 demonstrates how the pulse positioner function
code can control a pulse type valve positioner using a Harmony CIO-100 block. The following conditions must be met for this
configuration:
D E S IR E D F L OW
D E S IR E D VA LV E
P O S IT IO N
M /A
M F C /P
S1 (80 )
PV SP P U LP O S
P ID S2 N +1 S1 (4 )
SP O I
S2 (1 9 ) S3 N S2 N
SP A A P
S1 N S4 N +2 N +1
PV TR C/R
S3 S5 N +4
TR TS C
S4 N +3
TS
S18 MI C-F
N +5
S19
AX
S20 C /R
S21 LX
S22 CX
S24 HAA
S25 P U L S E R A IS E
LAA
S26 HAD
S27 P U LS E L O W E R
L DA
S1 (33 ) S28
N OT AO
N S29 T R S2
S30 T R PV
T
PROCESS
VA R IA B LE F E E D B AC K
(TO TA L F L O W ) R E FE R E N C E
VA LV E P O S IT IO N F E E D B A C K
IO C /A IN
S9 S H PG IO D /D E F
S18 (2 2 2 ) S2
S IM AI C H 01
S25 N S3
S PAR E C H 02
S4
C H 03
S5
C H 04
S6
C H 05
IO C /A IN S7
C H 06
S9 S H PG S8
S18 (2 2 2 ) C H 07
S IM AI S9
N C H 08
S25 S PAR E S 10
C H 09
S 11
C H 10
S 12
C H 11
S 13
IO C /D O U T C H 12
S2 S 14
DO C H 13
S9 (22 5 ) S 15
S IM DO C H 14
S15 N S 16
S PAR E C H 15
S 17
C H 16
S 18
C H 17
S 19
C H 18
IO C /D O U T S 20
C H 19
S2 DO S 21
C H 20
S9 (22 5 ) S 22
S IM DO C H 21
S15 N S 23
S PAR E C H 22
S 24
C H 23
S 25
C H 24
S 26
P E RM IT
S 29
C JR
S 31
S PAR E
S 33
S PAR E
(2 21 ) P R IM A RY
N S TAT US
B AC K UP
N +1 S TAT US
OVR /S IM
N +2
S PA R E
N +3
R ES E RV E D
N +4 VA LV E P U LS E P O S ITIO N S IG N A L
VA LV E P U LS E P O S ITIO N S IG N A L
T 0 38 6 3A
Figure 4-2 CIO-100 Configuration
• The pulse positioner function block, its associated digital output function blocks (FC225), and the device definition
function block (FC221) must all reside in the same segment control block.
• The pulse positioner function block must be connected directly to a pair of digital output function blocks (FC225).
• The pulse positioner function block and its associated pair of digital output function blocks must be assigned to the
same device definition function block (FC221).
4-4 2VAA000844R0001 J
5. Pulse Rate Explanation
5. Pulse Rate
This function accepts an analog input in engineering units/ time and produces a pulsed output signal where the pulse rate is
proportional to the analog input.
The output of this function block must be directly connected to a digital output. Use function code 79 or 83 for the Harmony
controllers.
Outputs

S1 (5 )
PU LSE
N
N B Repetitive pulse output having a duration
proportional to the analog input
Specifications
S1 N 5 I Note 1 Block address of input signal
S2 Y 0.000 R Full Scaling parameter (units/pulse)
S3 Y 0.000 R Full Low cutoff (no output below value)

NOTE:
This function code is not supported for use with S800 I/O. Attempting to connect this
function code to S800 I/O will cause the IOR800 to enter error mode.
5.1 Explanation
The <S1> input is an analog signal representing rate in terms of engineering units per unit of time. The S2 term sets the
number of input engineering units that produce a 50 millisecond output pulse. The number of output pulses is according to
the equation:
X
Number of output pulses per second = -----
-
S2
where:
X = Maximum value of input signal <S1>.
S2 = Value of scaling parameter (units per pulse).
Suppose the input signal represents zero to 100 gallons per second. It is necessary to obtain one output pulse for every 100
gallons. To accomplish this, set S2 to 100.00. If the input signal is 100 gallons per second, the output is one pulse per 100
gallons or one pulse per second. If the input signal decreases to 50 gallons per second, the output would be one pulse
every two seconds, and so on. If the input flow rate is in units per minute or units per hour, then S2 must be scaled
accordingly. The application section gives the procedure for determining S2.
The output pulses are always 50 milliseconds in duration, and the minimum time between pulses is 50 milliseconds so there
is a limit of ten pulses per second.
5.2 Applications
The output of this function may be used to drive a counter via a digital output. To implement this function to drive a counter,
follow these steps:
1. Determine the maximum flow rate for the input. Although this function always calculates the number of output
pulses by units per second, flows in units per hour and units per minute may be used in the equation given in
Step 5 because a factor can be inserted to adjust the scaling.
2. Determine the maximum input value to the pulse rate function at maximum flow.
2VAA000844R0001 J 5-1
Applications 5. Pulse Rate
3. Determine the counter capacity as follows:
n
10
Maximum counts per hour = --------------------------------------------------------------------------
-
minimum reset time in hours
where:
n = Number of digits of the counter.
Divide the results of this equation by 60 to obtain counts per minute or by 3600 to obtain counts per second.
The minimum reset time should generally be more than 24 hours.
4. Determine the desired output in terms of counts (or pulses) per hour (assuming the flow rate remains at
maximum). Choose the desired counts per time to be less than what was determined in Step 3. It is generally
best to make the output differ from the input by a factor of some power of ten (10, 100, 1000 etc.).
5. Calculate the S2 scaling factor using the following equation:
 S1 maximum flow 3600 sec

S2 = -------------------------------------------------------------------------------------------------------------------  -----------------------
desired output counts per hour at max. flow hour
where:
<S1>
= Value of input signal (units per second).
This equation is to be used when the flow rate is units per hour. When the flow rate is in terms of units per minute, use 60
seconds per minute in place of the 3600 seconds per hour and substitute the units of minutes for units of hours in the
equation. If the input flow rate is in seconds, omit the conversion factor entirely and use units of seconds for the terms.
Figure 5-1 shows one example of function code 5 used to obtain a count of total pounds of flow. In this example, the range
of the flow is zero to 500,000 pounds per hour:
1. The maximum flow rate is 500,000 pounds per hour.
2. The input range is zero to 500, so the maximum input is 500.
3. The counter to be used has six digits and the counter should not reset in less than 24 hours. So the maximum
count per hour allowable is:
n
10
Max. counts per hour = --------------------------------------------------------------
min. reset time in hours
6
10
= --------
24
1 000 000
= --------------------------- = 41 667 counts per hour
24
4. The desired counts for maximum flow is 500. This means each count will represent 1,000 pounds. This is
considerably less than the counter capacity for 24 hours determined in Step 3.
A I/I
A N ALO G psi (121) S1 (7)
VAL U E 20 1  202
DOGR P
S1 (5) S4 (8 3)
P U LS E
20 3 S5 236
S6
S7
S8
S9
S 10
S 11
S PE C IFIC ATIO N S
FU N C T IO N FU N C T IO N FU N C T IO N FU N C T IO N
C O D E 27 CODE 7 CODE 5 CO DE 83
S 1 = 202
S1 = 0 S 1 = 201
S 2 = 360 0 S 4 = 206
S 2 = 500 ,00 0 S 2 = 707 .10 7
S3 = 0
T 02 0 28 A
Figure 5-1 Count Total Pounds of Flow
5-2 2VAA000844R0001 J
5. Pulse Rate Applications
5. The scaling factor is:
value of <S1> at max. flow

S2 = --------------------------------------------------------------------------------------------------
desired output counts/hr at max. flow
500 3600 sec
= -----------------------------------  -----------------------
500 counts/hr hour
= 3600
2VAA000844R0001 J 5-3
Applications 5. Pulse Rate
5-4 2VAA000844R0001 J
6. High/Low Limiter
6. High/Low Limiter
This block limits the output signal to a range that lies between a specified high and low limit. The output equals the input
<S1> when the input is between the limits. Output N equals the high limit when the input is higher than the high limit and
equals the low limit when the input is lower than the low limit.
Outputs
S1 (6 ) Blk Type Description

N
N R Output value equals input value unless the input
reaches the low or high limit. Then, the output value
assumes the value of the limit.
Specifications
S2 Y 4 E6 R Full Value of high limit
S3 Y -4 E6 R Full Value of low limit

NOTE:
6.0.0.1 Applications
Figure 6-1 shows a limiter used to limit the bias range. The flow transmitter input range is zero to 300 gallons per minute.
The bias value for this example is +20 gallons per minute but the high limit should not exceed 320 gallons per minute. By
using the configuration shown, the 20 gallons per minute bias is achieved without exceeding the maximum limit.
FT
0-300
gpm
S1
 (K)
(15) S1 (6)
S2
301 302
S3 = 1 S2 = 320
(2) S4 = 1 S3 = 0
A 300
S1 = 20
320
300
280
260
240
220
200
180
FUNCTION CODE 6
OUTPUT (gpm) 160
140
FLOW
120
TRANSMITTER
100
80
60
40
FUNCTION CODE 2
20
0
0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300
INPUT
T01590A
Figure 6-1 Limit a Bias Range
2VAA000844R0001 J 6-1
6. High/Low Limiter
Figure 6-2 shows function code 6 used to limit the input to a divider function. This is necessary in many applications to
prevent unprocessable quotients (i.e., divide by zero), especially when <S2> is very small.
0 -5 %
S1
(1 7)
S2
3 01
S1 (6 )
0 -1 % S3 = 1
300
S2 = 1
S 3 = 0 .0 0 1
T 01 591 A
Figure 6-2 Limiting Input to a Divider
6-2 2VAA000844R0001 J
7. Square Root Applications
7. Square Root
This function computes the square root of the input signal in engineering units. The output equals a factor (k) times the
square root of the input. The equation for this function is:
Y = S2  S1
where:
<S1> = Input value. S1 (7 )
S2 = Gain value (k) in engineering units. N
Y = Output value (Y = 0 if <S1>  0).
NOTES:
1. When function code 7 is utilized as a shaping algorithm for function code 222 (analog in/channel), its tunable specifications
are not adaptable.
2. When function code 7 is used as a shaping algorithm, it can not at the same time also be used as a logic function because the
block output will not respond to the specification S1 input. Function code 7 should not be referenced by function blocks other than
function code 222 utilizing it as a shaping algorithm.
3. Multiple instances of function code 222 function blocks may utilize the same function code 7 function block as a shaping algo-
rithm. The function code 7 shaping algorithm function block is not required to be in the same segment as the function code 222
blocks.
Outputs
N R Output value equals square root of input value

multiplied by the gain value (k)
Specifications
S2 Y 1.000 R Full Gain value (k) in engineering units (EU)

NOTE:
7.1 Applications
Specification S2 is the gain (k) applied to the value  S1 and can be any real number. It is used to scale an input signal to
a meaningful or easy to work with output signal. Figure 7-1 shows an example of how function code 7 can be used. In the
example, a flow rate of zero to 50,000 pounds per hour is being measured by a differential pressure transducer whose
output range is zero to 200 inches of water. The flow is a function of the square root of the differential pressure multiplied by
some constant (k). The equation for this example is:
Flow = k diff. pressure
If it is known that the flow is 50,000 pounds per hour at a transmitter output indicating 200 inches of water differential
pressure, the required constant (k) can be calculated as follows:
50,000 pounds per hour = k 200
50,000 pounds per hour = k (14.142)
50 000
------------------ = k
14 142
2VAA000844R0001 J 7-1
Applications 7. Square Root
k = 3,535.534
A I/I 0
0-20 0 (1 21 ) S1 (7) TO
in. H O
2 2 01  3 00 5 0,00 0
lb/hr
S 2 = 35 35 .53 4
5 0,0 00
4 5,0 00
4 0,0 00
3 5,0 00
3 0,0 00
lb /h r 2 5,0 00
2 0,0 00
1 5,0 00
1 0,0 00
5,0 00
0
0 20 40 60 80 100 12 0 1 40 160 1 80 20 0
in . H O 2
T 02 026 A
Figure 7-1 Converting a Pressure Signal to a Flow Rate
Many nonlinear inputs need to be converted to linear outputs. Figure 7-2 illustrates converting a nonlinear pressure signal to
a linear flow signal using function code 7.
 PR ES S U R E
TR A N S M ITTE R
N O N LIN E A R A I/I
P R ES S U R E (1 21) S1 (7 ) LINE AR F LO W
20 1  3 00
S 2 = 10
PR ES S U R E F LO W
100 100
90 90
80 80
70 70
60 60
% 50 % 50
40 40
30 30
20 20
10 10
0 0
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 9 0 1 00
% %
T 0202 7A
Figure 7-2 Converting a Nonlinear Pressure Input to a Linear Flow Output
7-2 2VAA000844R0001 J
8. Rate Limiter Explanation
8. Rate Limiter
The output of this block equals the input until the input rate of change exceeds the limit value (S3 and S4). When the rate of
change of the input is greater than the limit, the output changes at the rate established by the limit until the output equals the
input.
Outputs
S1
S2
N
N R Output rate equals input rate until the input rate exceeds
the rate limit. Then, the output rate equals the limit.
Specifications

0 = track
1 = release
S32 Y 0.000 R Full Increase rate limit (1/sec)
S42 Y 0.000 R Full Decrease rate limit (1/sec)

NOTES:
2. S3 and S4 must be positive numbers.
8.1 Explanation
Function code 8 limits the rate of change of the output according to preset limits. To activate this function set <S2> to a
logic 1. With <S2> set to a logic 0, the output is the same as the input.
Specification S3 is the rate limit of an increasing input signal in engineering units per second. As long as the input rate of
increase is less than S3, the output equals the input. When the rate at which the input increases exceeds the setting of S3,
the output changes at the rate set by S3 as long as the input rate of increase remains greater. Specification S4 limits the
output rate of decrease when the input rate of decrease is greater than S4.
8.2 Applications
Figure 8-1 illustrates how to use the rate limiter for bumpless transfer. In the example, the M/A station sends an automatic
(logic 1) or manual (logic 0) signal to <S2> of the rate limiter. When in automatic, function code 8 limits the rate of change to
2VAA000844R0001 J 8-1
Applications 8. Rate Limiter
the set point. For example, placing the station in automatic may cause a drastic change in set point demand. The rate limiter
slows the increase or decrease set point demand to the station providing a bumpless transfer from manual to automatic.
M /A
P ID M F C/P
S2 (1 9) S1 (8 0) S1
SP PV SP (8 )
P R O C ES S S1 2 00 S2 211 S2
PV SP O 220
VAR IA B L E S3 S3 210
TR A A
S4 S4 212
TS TR C /R S3 = 1
S5 214
TS C S4 = 1
S5 = 1.00 0 S18 213
MI C -F
S6 = 1.00 0 S19 215
S7 = 0.00 0 AX
S8 = 0.00 0 S20
C /R
S9 = 10 5.0 0 S21 S6 = 5
LX S7 = 9.2E +1 8
S10 = -5.0 0 0 S22
S11 = 0 CX S8 = -9.2 E+ 18
S12 = 0 S24 S9 = 9.2E +1 8
HAA
S25 S10 = 10 0.0 0
L AA
S11 = 0.00 0
S26
H ad S12 = 0
S27 LDA S13 = -5.0 0 0
S28 S14 = 0.00 0
AO
S29 S15 = 0
T R S2 S16 = 25 5
S30 T
T R PV S17 = 0
S23 = 0
S31 = 60 .0 0 0
T 01 59 4 A
Figure 8-1 Limit the Rate of Change of the Set Point
8-2 2VAA000844R0001 J
9. Analog Transfer Explanation
9. Analog Transfer
This function selects one of two inputs depending on boolean input <S3>. The output of function code 9 equals the input
determined by the state of input <S3>. There are two time constants to provide smooth transfer in both directions.
Outputs
S1
(9 )
S2
T N
S3
N R Output equals one of two possible inputs
Specifications
S1 N 5 I Note 1 Block address of first input
S2 N 5 I Note 1 Block address of second input
S3 N 0 I Note 1 Block address of transfer signal:

0 = output equals <S1>
1 = output equals <S2>
S4 Y 0.000 R Full Transfer to input 1 time constant/sec
S5 Y 0.000 R Full Transfer to input 2 time constant/sec

NOTE:
9.1 Explanation
Specification S3 is the block address of the transfer signal that selects which input (<S1> or <S2>) transfers to the output. If
<S3> is a logic 0, then <S1> will be transferred to the output. If <S3> is a logic 1, <S2> will be transferred to the output.
When the transfer block changes the input selected, the output level changes to the new input level exponentially over a
period of five time constants when the transfer time constant (S4 and S5) is set to a value other than zero. After five time
constants, the output tracks the selected input.
Specifications S4 and S5 are time constant terms. They specify the time required for the previous output value to reach 63.2
percent of the present input value. The output will essentially match the new input value after five time constants have
passed. To calculate S4 or S5 so that the output equals the input in a certain number of seconds (t), use the following
equation:
S4 or S5 = --t-
5
where:
S4 or S5 = Time constant term for function code 9.
t = Transfer time. The number of seconds for
the output to match the input value. A
common transfer time is ten seconds.
5 = The number of time constants required for
the output to match the input value.
For example, if the required output must match the <S1> level 30 seconds after a transfer, and match the <S2> level in 15
seconds after a transfer:
t 30
S4 = --- = ------ = 6.0
5 5
t 15
S5 = --- = ------ = 3.0
5 5
2VAA000844R0001 J 9-1
Applications 9. Analog Transfer
9.2 Applications
Figure 9-1 shows how function code 9 can be used as an analog memory. In this example the output tracks <S1> when the
<S3> digital input is a logic 0. The output value holds at its last level when the <S3> input is a logic 1.
Figure 9-1 Analog Transfer Function Used as a Memory Function
Figure 9-2shows how function code 9 can be used as a manual to automatic transfer switch. When <S3> of function code 9
equals 0, the auto signal for the M/A block equals the analog input (<S1>) of function code 9. When <S3> of function code
9 equals 1, the auto input signal tracks the output of the M/A station.
M /A
A N A L O G IN P U T M F C /P
S1 (8 0 )
PV SP
S1 S2 N+1
SP O
S2 (9 ) S3 N
D IG ITA L T 500
A A
N+2
S3 S4
TRA NS FE R TR C /R
S5 N+4
S IG N A L TS C
S 4 = 10 0 S18 N+3
MI C -F
S 5 = 10 0 S19 N+5
AX
S20
C /R
S21
LX
S22
CX
S24
HAA
S25
L AA
S26
H DA
S27
L DA
S28
AO
S29
TRS2
S30
TRPV T
T 02 02 5 A
Figure 9-2 Manual to Auto Transfer Switch
9-2 2VAA000844R0001 J
10. High Select Applications
10. High Select

This function selects and outputs the input with the highest algebraic value.
Outputs
S1
S2
S3
(1 0 ) Blk Type Description
N
S4
N R Output equals the highest of the four inputs
Specifications
S3 N 8 I Note 1 Block address of third input
S4 N 8 I Note 1 Block address of fourth input

NOTE:
10.1 Applications
The most common use of function code 10 is to select the highest value. Function code 10 can also be used to memorize
the highest value over a period of time.
To memorize the highest value over a period of time (time is set with S3 of function code 9), use function code 10 with
function code 9 as shown in Figure 10-1. Create a loop with the output of function code 10 as an input for function code 9,
and the output of function code 9 as one input to function code 10. Function code 9 tracks the output of function code 10.
The output of function code 9 feeds back to function code 10, thus, memorizing the value of the input with the highest
algebraic value. This continues until S3 of function code 9 switches the input signal from <S2> to <S1>.
IN P U T
S IG N A L
IN P U T 1 (+ 1 ) S1
S1
IN P U T 2 (+ 2 ) S2 (1 0 ) S2 (9 ) O U TPU T
IN P U T 3 (+ 3 ) S3 220
T
S3 225 (+ 4 )
IN P U T 4 (+ 4 ) S4
S 4 = 10
S 5 = 10
D IG ITAL
TR A N S FER
S IG N A L
T 01 59 7 A
Figure 10-1 Memorize a High Value Over a Period of Time
2VAA000844R0001 J 10-1
Applications 10. High Select
10-2 2VAA000844R0001 J
11. Low Select Applications
11. Low Select

This function selects and outputs the input with the lowest algebraic value.
Outputs
S1
S2 (1 1 )
S3 N
S4 N R Output equals the lowest of the four inputs
Specifications

NOTE:
11.1 Applications
As well as selecting the lowest input value (common application), function code 11 can be used to memorize the lowest
value over a period of time.
To memorize the lowest value over a period of time (set with S3 of function code 9), use function code 11 with function
code 9 as shown in Figure 11-1. Create a loop with the output of function code 11 as an input to a function code 9 block and
the output of function code 9 as an input to the function code 11 block. By selecting the output of the block executing
function code 11 as the value that function code 9 tracks, the output of function code 11 feeds back into function code 11. As
a result, this yields the same value as the output of function code 11 for the period of time that it is the input with the smallest
algebraic value.
IN P U T
S IG N A L
IN P U T 1 (+ 7 ) S1
S1
IN P U T 2 (+ 4 ) S2
(1 1 ) S2 (9 ) O U TPU T
IN P U T 3 (+ 9 ) S3 T
220 S3 225 (+ 2 )
IN P U T 4 (+ 2 ) S4
S 4 = 10
S 5 = 10
D IG ITAL
TR A N S FER
S IG N A L
T 01 59 8 A
Figure 11-1 Memorize a Low Value Over a Period of Time
2VAA000844R0001 J 11-1
Applications 11. Low Select
11-2 2VAA000844R0001 J
12. High/Low Compare Applications
12. High/Low Compare

This function has two outputs. When the input is equal to or exceeds the high limit, output N equals logic 1. When the input
is equal to or less than the low limit, output N+1 equals logic 1. If the value of the input is between the assigned limits, both
outputs are a logic 0.
NOTE: This block uses two consecutive addresses for the outputs.
Outputs

H //L
S1 (1 2 )
H
N N B High alarm output:
0 = high limit not reached
L
N+1
1 = high limit reached
N+1 B Low alarm output:

0 = low limit not reached
1 = low limit reached
Specifications
S2 Y 0.000 R Full Value of alarm point/high limit
S3 Y 0.000 R Full Value of alarm point/low limit

NOTE:
12.1 Applications
Figure 12-1 shows function code 12 used as a signal monitor. In this example the signal shows tank level and function
code 12 activates high (eight feet) and low (two feet) level alarms.
H //L
TA N K LEV EL S1 (1 2 )
H L E VE L H IG H
0 -1 0 ft. H 2 O 22 0
L L E VE L L OW
22 1
S2 = 8
S3 = 2
T01 59 9 A
Figure 12-1 Signal Monitor
2VAA000844R0001 J 12-1
Applications 12. High/Low Compare
Function code 12 may also be used to indicate when the difference between two related signals is more or less than desired
as shown in Figure 12-2. In this example air flow is subtracted from fuel flow by using function code 15, and function code
12 monitors the difference. If the difference exceeds a preset value, it will cause the appropriate alarm to be activated.
NOTE: It is not necessary for the high alarm value in function code 12 (S2) to be greater than the low alarm value (S3). In the
example illustrated in Figure 12-2, if S2 of function code 12 = -1, and S3 = +1, the high and low outputs will both be logic 1 when
fuel and air flows are within ±1 of each other.
FU E L FLO W
S1
H //L
 (K)
(15) S1 (12)
S2 H LE VE L H IG H
220 225
L LE VE L LO W
226
S3 = 1 S 2 = -1
S 4 = -1 S3 = 1
A IR FLO W
T 01 60 0 A
Figure 12-2 Monitor the Relationship Between Two Signals
12-2 2VAA000844R0001 J
13. Integer Transfer Applications
13. Integer Transfer

This function provides a means for switching integer values. When <S3> equals zero, the output equals <S1>. When <S3>
equals one, the output equals <S2>.
NOTE: This is different from the analog transfer (function code 9), which has an optional transfer time feature.
Outputs
S1
S2 (1 3 ) Blk Type Description
T-IN T
S3 N
N I Output equals one of two possible inputs
Specifications
S3 N 0 I Note 1 Block address of transfer signal:

0 = S1
1 = S2
NOTE:
13.1 Applications
A common use for function code 13 is to dynamically modify integer parameters. Figure 13-1 illustrates using function code
13 with function codes 52 and 24 to change the set point tracking option in a manual/auto station. An output from a remote
control memory (RCM) block (function code 62) to <S3> of function code 13 determines which input (zero for <S1> or one
for <S2>) is sent to the adapt block. Function code 24 adapts <S30> of the (function code 80) to the value received from the
function code 13 block.
For example, when the output of the RCM equals zero, the output of function code 13 equals <S1> (one) causing <S30> of
the control station to be adapted to set point track option one (track the process variable).
M/A
(5 2) M FC /P
A-IN T (8 0 )
12 0 S1
PV SP
S2 N+1
SP O
S1 = 1 S3 N
A A
S4 N+2
S1 TR C /R
S5 N+4
(5 2) S2 (1 3 ) S1 (24 ) TS C
A-IN T T-IN T A DA PT S18 N+3
12 5 S3 135 140 MI C -F
S19 N+5
AX
S20
S1 = 2 S 2 = 1 45 C /R
S21
S 3 = 14 LX
S22
S1 RCM (6 2) CX
S S24
13 0 HAA
S2 S25
P
LAA
S3 S26
R H DA
S4 S27
O
LDA
S5 S28
I
AO
S6 S29
F TRS2
S7 S30
A TRPV T
S8 = 1
T 02 0 24A
Figure 13-1 Dynamic Adaptive Control Strategy
2VAA000844R0001 J 13-1
Applications 13. Integer Transfer
13-2 2VAA000844R0001 J
14. Summer (4-Input)
This function computes the algebraic sum of up to four inputs with unity gain.
The output equation is:
Output (EU)  <S1>  <S2>  <S3>  <S4>
Outputs
S1
S3 S N
S4 N R Output value is the algebraic sum of the four input signals
Specifications

NOTE:
2VAA000844R0001 J 14-1
14-2 2VAA000844R0001 J
15. Summer (2-Input) Applications
This function performs a weighted sum of two inputs. By choosing the proper gains and inputs this block can perform
proportional, bias or difference functions. It also can be used as a scaler for non-zero based signals by referencing the
second input to a constant block.
The following equation describes the operation of this function:
Output  (<S1> S3)  (<S2>  S4)
Outputs
S1
 (K)
(1 5 )
S2
N
N R Output value is the weighted algebraic sum of the two

input signals
Specifications
S3 Y 1.000 R Full Gain parameter of first input
S4 Y 1.000 R Full Gain parameter of second input

NOTE:
15.1 Applications
Besides performing proportional, bias or difference functions, this code also can be used for scaling. By referencing the
second input to a constant block or to a manual set constant block (function code 2), a non-zero based signal can be
scaled.
The example in Figure 15-1 shows how to scale an input with a range of 200 to 500 engineering units to give an output of
ten to 110 engineering units.
The S3 constant is calculated using the equation:
S = Output Span
---------------------------------
<S1> Span
110 – 10
= ------------------------
500 – 200
= 0.333
Fixed block four connects to S2 to give it a constant value of -1.0. Specification S2 could be set to any fixed value by using
function code 2, but this approach requires more memory than using a fixed block. Since <S2> and S4 are both constants
in this example, they can be considered as a unit. The following equation determines the value for the product of <S2> and
S4:
<S2> S4 = Output min. – (<S1> min. S3 min.)

In this example then:
<S2>  S4 = 10 - [(200)(0.333)] = -56.667
2VAA000844R0001 J 15-1
Applications 15. Summer (2-Input)
<S2> and S4 could then be set to any allowable value that will give the product of -56.667. In our example, <S2> is set to
-1.000 so S4 is set to 56.667.
INPUT
200-500 EU
-1.000
S1 DESIRED
(15)
FIXED
BLOCK
S2  (K) 220
OUTPUT
10-110 EU
4
S3 = 0.333
S4 = 56.667
T01619A
Figure 15-1 Scaler
15-2 2VAA000844R0001 J
16. Multiply
16. Multiply
This function performs a multiplication of two input signals (<S1> by <S2>) with the result multiplied by a constant gain
parameter (S3).
Output (EU) = S3   <S1>  <S2> 
Outputs

S2 X
N
N R Output value is the weighted product of the two input
signals
Specifications
S3 Y 1.000 R Full Gain parameter

NOTE:
2VAA000844R0001 J 16-1
16. Multiply
16-2 2VAA000844R0001 J
17. Divide
17. Divide
This function causes one input <S1> to be divided by a second input <S2> and the quotient to be multiplied by a constant
(S3).
S1 
Output (EU) = S3  -----------
S2 
Outputs
S1
(1 7 )
S2 N
N1 R Output value is the weighted quotient of the two input

signals
NOTES:
1. If S2 is set to 0, the output (N) is the largest value possible within the controller
(e.g., 4.0 E06).
Specifications
S3 Y 1.000 R Full Output gain parameter

NOTE:
2VAA000844R0001 J 17-1
17. Divide
17-2 2VAA000844R0001 J
18. PID Error Input Explanation
18. PID Error Input

This function provides proportional, integral and derivative actions on an error signal developed from the process variable
(PV) and set point (SP) inputs. The block has three inputs and one output. Besides the error input, there are track reference
and track switch input signals. If the track switch <S4> is a zero, the output follows the track reference signal <S3>. This
provides for smooth control transfers from manual to automatic mode. The parameters for this function block include an
overall gain constant (S5), a proportional constant (S6), an integral constant (S7) and a derivative gain constant (S8).
Outputs
PID
S1 (1 8 )
S2
TR
N Blk Type Description
S3
TS
N R Output is PID signal in engineering units (EU)
Specifications
S1 N 5 I Note 1 Block address of error signal
S2 N 1 I 0 or 1 Reserved
S3 N 5 I Note 1 Block address of track reference signal

0 = track
1 = release
S5 Y 1.000 R Full (K) gain multiplier
S6 Y 1.000 R Full (KP) proportional constant
S7 Y 0.000 R 0 - 9.2 E18 (KI) integral constant (1/min)
S8 Y 0.000 R Full (KD) derivative constant (min)
S9 Y 105.000 R Full High output limit
S10 Y -5.000 R Full Low output limit

NOTE:
18.1 Explanation
This function operates on the input error signal according to the equation:
Output (%)  S5  [<S1> (S6  S7I  S8D)]

where:
I = dt
d
D = -----
dt
2VAA000844R0001 J 18-1
Explanation 18. PID Error Input
The purpose of the gain multiplier (S5) is to convert or scale the output. Typically it is used to convert the output to percent
for input to a station or output to a field device. Figure 18-1 shows an example.
M/A
MFC/P
S1 (80)
PV SP TO OUTPUT
PID S2 226
S1 PID SP O FEEDWATER
(18) 225
 (K)
XMTTR (15) S1 S2 (19) S3
S2 SP A A
205 S3 210 S1 220 S4 227
TR PV TR C/R
S4 S3 S5 228
TS TR TS C
S3 = -1 S4 S18 229
TS MI C-F
A S4 = +1 S19 230
AX
S20
C/R
S21
LX
S22
STEAM 0-2000 psi CX
FLOW S24
HAA
S25
LAA
S26
Had
S27
LDA
S28
AO
S29
TRS2
S30
TRPV
T
T01620A
Figure 18-1 Scaling the Output
To calculate S5 in engineering units, use the equation:
DESIRED span
S5 = ---------------------------------------------
CURRENT span
To calculate S5 in percent, use the equation:
DESIRED max. – DESIRED min.

S5 = ---------------------------------------------------------------------------------------
S1 max. – S1 min.
or
100 – 0
S5 = ------------------------------------------------
S1 max. – S1 min.
If the signal range is zero to 100 percent, the possible range of the error signal is -100 to +100 percent. Use the following
equation to determine the gain multiplier S5:
100
S5 = ---------------------
 S1 span 
For example, if the range of an error signal is zero to 50 cubic feet per second, then determine S5 as follows:
100
S5 = --------------- = 2
50 – 0
NOTE: When a negative output is anticipated, the low limit (S10) must be adjusted in a negative direction to encompass the limits
of the output signal range.
18-2 2VAA000844R0001 J
18. PID Error Input Applications
18.2 Applications
Figure 18-2 illustrates a PID error input block used to calibrate a demand value with an error value. By using function code
18 versus function code 19, the error input to S1 can be reported to a console.
ERROR TO DISPLAY,
OTHER LOGIC, ETC. M/A
MFC/P
S1 (80)
PV SP TO OUTPUT
S2 216
S1 PID SP O
(18)
 (K)
(15) S1 S3 215
S2 A A
208 S3 210 S4 217
TR TR C/R
S4 S5 218
TS TS C
S3 = -1 S18 219
MI C-F
S4 = 1 S2 = 0 S19 220
AX
PV S20
S5 = DESIRED SPAN C/R
CURRENT SPAN S21
LX
S6 = 0.75 S22
CX
S7 = 0.8 S24
S8 = 0.0 HAA
S25
S9 =105.0 LAA
S10 = -5 S26
HAD
S11 =0 S27
S12 =0 LDA
S28
AO
S29
TRS2
S30
TRPV
T
T01621A
Figure 18-2 Application
2VAA000844R0001 J 18-3
Applications 18. PID Error Input
18-4 2VAA000844R0001 J
19. PID (PV and SP) Explanation
19. PID (PV and SP)
This function provides proportional, integral and derivative action on an error signal developed from the process variable
(PV) and set point (SP) inputs. The block has four inputs and one output. Besides the PV and the SP inputs, there are track
reference and track switch input signals. If the track switch <S4> is a zero, the output will follow the track reference signal
<S3>. This provides smooth control transfers from manual to automatic mode. The parameters for the function block
include an overall gain multiplier (S5), a proportional constant (S6), an integral constant (S7) and a derivative gain constant
(S8).
Outputs
P ID
S2 (1 9)
SP
S1 N
S3
PV Blk Type Description
TR
S4
TS
N R Output is PID signal in engineering units (EU)
Specifications
S1 N 5 I Note 1 Block address of process variable input
S2 N 5 I Note 1 Block address of set point
S3 N 5 I Note 1 Block address of track reference signal

0 = track
1 = release
S5 Y 1.000 R Full (K) gain multiplier
S6 Y 1.000 R Full (KP) proportional constant
S7 Y 0.000 R 0 - 9.2 E18 (KI) integral constant (1/min)
S8 Y 0.000 R Full (KD) derivative constant (min)
S11 Y 0 B 0 or 1 Set point change:

0 = normal
1 = integral only (KI  0)
S12 Y 0 B 0 or 1 Controller action on error:

0 = reverse acting on error
1 = direct acting on error
NOTE:
19.1 Explanation
This function supports two modes: direct and reverse. The function is in the direct mode when S12 is a logic 1 and in the
reverse mode when S12 is a logic 0.
Direct Mode
(S4 = 1 and S12 = 1)
The set point <S2> subtracts from the process variable input <S1>.
2VAA000844R0001 J 19-1
Examples 19. PID (PV and SP)
Reverse Mode
(S4 = 1 and S12 = 0)
The process variable input <S1> is subtracted from the set point <S2>.
Refer to Figure 19-1 for an illustration of the PID algorithm for function code 19.
S5
The purpose of the gain multiplier (S5) is to convert or scale the output. Typically it is used to convert the output to percent
for input to a station or output to a field device. Figure 19-2 shows an example.
To calculate S5 in engineering units, use the equation:
DESIRED SPAN-
S5 = ----------------------------------------------
CURRENT SPAN
To calculate S5 in percent, use the equation:
100
S5 = -------------------------------------------------------
-
  S1 max  –   S1 mi n 
For example, with the function in the direct mode, the range of the process variable signal is zero to 200 cubic feet per
second and the maximum control output is 100 percent.
The gain multiplier (S5) is determined as follows:
100
S5 = ----------------------
 200 – 0 
S5 = 0.5
Controller Start-Up
(Block 10 – start-up in progress = 1)
PIDOutput = <S3>
Manual Mode
(S4 = 0)
PIDOutput = <S3>
High and Low Output Limits (S9 and S10)
Specifications S9 and S10 set the limits of the output block value (N). The default values of S9 and S10 provide an output
range of -5.000 to +105.000. When a negative output is anticipated, the low output limit (S10) must be adjusted in a
negative direction to encompass the limits of the output signal range.
Set Point Change (S11)
Set point modifier. This specification defines the action taken on a set point change. A normal setting results in a jump in the
control output due to the proportional contribution created by a set point change. When set to integral only on set point
change, the proportional and derivative contributions of the error are not applied with set point changes. This action
eliminates the jump in the control output and results in an integral only action on a change in set point.
0 = normal
1 = integral only on set point change
19.2 Examples
Figure 19-1 illustrates the PID algorithm for function code 19. Figure 19-2 shows how the PID block is typically used with a
station in a control loop.
19-2 2VAA000844R0001 J
19. PID (PV and SP) Examples
Notes for Figure 19-1

Note 1 - Bias
The bias term is either equal to the value of the combined proportional plus integral term calculated when Ki was last set to
a value greater than zero (normal reset), or it is equal to the value of the track reference (external reset or tracking).
SP –S P
REVERSE D IR E C T
P R O P O R T IO N A L
P L U S B IA S
(S E E N O T E 1)
D IR E C T +
PV + +
 ERROR
K *K P P R O P O RT IO N A L O N LY

–P V R E V E R S E
O U TP U T
+
(S E E N O TE 3 )
TR AC K
R E FE R E N C E TR AC K
P R O P O R TIO N A L R E LE A S E
P L U S IN T E G R A L
(W H E N K I > 0 ) (S E E
B IA S N O TE 3)
(W H E N K I  0)
(S E E N O TE 3) (S E E N OT E 1 ) KI  0
K *K I * t +
IN T E G R A L
O N LY O N 60 KI > 0

EXTERNAL RESET
S E T P O IN T (S E E N O T E 2 ) +
CHAN GE OR
TR AC K IS E N A B L E D
+
NO RM AL KI  0 IN TE R N A L
+ IN T E G R A L
 
ER ROR -1
C A LC U LATIO N Z
KI > 0 +
+
NO RM AL R ESET
K *K P (S E E N O TE 2)
D E LTA 60 *K *K A *K D
ERROR 6 0*K *K D + K A * t
+ (S E E N OT E 3 )
+
ERRO R
  D E R IVAT IV E
– +
-1 60 *K *K D -1
Z 6 0*K *K D + K A * t
Z
T01 62 2A
Figure 19-1 PID (PV and SP)
Note 2 - Normal Reset, Auto Selected External Reset, and External Reset
When Ki is less than zero (proportional plus integral), the internal value of the integral term is determined based on the PID
reset mode specified in S5 of function code 82.
When S5 equals zero (normal reset), the PID calculates the value of the internal integral by summing the proportional term
with the previous value of the internal integral.
2VAA000844R0001 J 19-3
Examples 19. PID (PV and SP)
When S5 equals two (external reset), the PID sets the value of the internal integral to the value of the current track
reference.
M/A
MFC/P
(80) CONTROL
S1 SP
PV OUTPUT
PID S2 32
SP O
PROCESS S2 (19) S3 31
VARIABLE SP A A
S1 30 S4 33
PV TR C/R
S3 S5 35
TR TS C
S4 S18 34
TS MI C-F
S19 36
AX
S5 = 1.0 S20 C/R
S6 = 1.0 S21
S7 = 2.0 LX
S8 = 0.0 S22 CX
S9 = 105.0 S24 HAA
S10 = -5.0 S25
S11 =0 LAA
S12 =0 S26 Had
S27 LDA
S28 AO
S29 TRS2
S1 (33) S30 T
NOT 37
TRPV
S6 =5
S7 = 90.0
S8 = 10.0
S9 = 5.0
S10 = 100.0
S11 = 0.0
S12 =0
S13 = -5.0
S14 = 0.0
S15 =0
S16 = 255
S17 =0
S23 =0
S31 = 60.0
T01623A
Figure 19-2 PID Control with Deviation
When S5 equals one (auto selected external reset), the PID sets the value of the internal integral to the value of the current
track reference only if the value of the PID output from the previous execution period does not match the current track
reference value. Otherwise, the PID calculates the internal integral value as if it were set for normal reset. The auto select
external reset mode only applies when Ki is less than zero. When Ki is greater than zero (proportional only), the auto
selection is disabled.
Note 3 - Range Limiting
The track reference, the proportional plus integral term, and the output are all range limited based on the high and low limits
specified in S9 and S10 respectively. The high and low range limits for the derivative term are:
Derivative high limit = output high limit – output low limit
Derivative low limit = output low limit – output high limit
19-4 2VAA000844R0001 J
24. Adapt Applications
24. Adapt
This function allows the adaptation of a tunable parameter in the system (most tunable parameters may be modified during
execution). It permits configuration of dynamic versus static loop gains in control schemes. All gains and time constants are
tunable parameters. Therefore, using this function, you can set gains and time constants to fit current process operating
states.
NOTE: Tunable alarm specifications in exception report function blocks are not adaptable (e.g., function code 30, S5 and S6).
The adapt function block output value has no significance. The adapted specification is modified only during execution, and
the original parameter that is stored in nonvolatile random access memory (NVRAM) is not modified. Thus, the revised
specification is not accessible via any of the operator interface devices unless the adapt input is read. Adapted block inputs
are read by reading the output of the block preceding the block of interest.
Outputs
(2 4 )
S1
A DA P T N
N N/A No significance
Specifications
S2 N 0 I Note 1 Address of block containing specification to be

adapted
Note 2
S3 N 0 I 0 - 64 Specification number of specification to be adapted

NOTES:
2. The block address of the block to be adapted must be greater than the block address of the Adapt
block.
The adapt function code has been enhanced to support cross type conversions for modules. The block internally converts
the input value to the type of value required by the adapted block specification type. Table 24-1 shows the type of
conversions performed. If the input type matches the output type, no conversion is performed. The specification value is
changed to match the input value exactly when no type conversion is performed.
Table 24-1 Conversions Performed by the Adapt Block
Adapted Specification Type

Input
Type
Integer
of S1 Boolean Real Integer (0 to 255)
(-32768 to +32767)
Boolean Direct 0  0.0, 0  0, 0  0,

conversion 1  1.0 11 11
Real < 1.0  0, Direct conversion  0.0  0, -32768.0  -32768,

 1.0  1 0.0 to 255.0  0 to 255 -32768.0 to +32767.0 
 255.0  255 -32768 to +32767,
 +32767.0 +32767
Integer Not allowed Not allowed Not allowed Direct conversion
24.1 Applications
Figures 24-1, 24-2 and 24-3 illustrate some uses of the adapt function code.
2VAA000844R0001 J 24-1
Applications 24. Adapt
Figures 24-1 and 24-2 show the input to an adapt block as the result of a function defined by function code 1. If the function
varies with time, the adapted parameter also varies with time. The same is true for functions of pressure, temperature, tank
level, etc. This arrangement makes variable control of tunable parameters possible, allowing compensation for gains
inherent in a process.
In Figure 24-1, the high output limit S9 of a function code 19 block varies as a function of x as defined in a function code 1
block.
PID
S2 (19)
SP
S1 (1) S1 (24) S1 230
F(X) ADAPT PV
210 220 S3
TR
S4
TS
S2 = 0 S2 = 230
S3 = 0 S3 = 9 S5 = 1.000
S4 = 10 S6 = 1.000
S5 = 10 S7 = 0.000
S6 = 20 S8 = 0.000
S7 = 20 S9 = 105.000
S8 = 30 S10 = -5.000
S9 = 30 S11 = 0
S10 = 40 S12 = 0
S11 = 40
S12 = 50
S13 = 50
T01628A
Figure 24-1 Creation of a Sliding Limiter or Index
In Figure 24-2, an adapt block adapts with proportional constant S6 of a function code 19 block to the value received from a
function code 1 block, allowing the modification of the proportional constant with changes in a specified parameter, x.
P ID
S2 (1 9 )
SP
S1 (1 ) S1 (2 4 ) S1 230
F (X ) A DA P T PV
210 22 0 S3
TR
S4
TS
S2 = 0 S2 = 230
S3 = 0 S3 = 6 S5 = 1 .0 0 0
S4 = 100 S6 = 1 .0 0 0
S5 = 100 S7 = 0 .0 0 0
S8 = 0 .0 0 0
S9 = 1 0 5 .0 0 0
S 10 = -5 .00 0
S 11 = 0
S 12 = 0
T 0 16 29 A
Figure 24-2 Achieve Variable Controller Proportional Constant
Figure 24-3 shows the use of an adapt block in conjunction with a function code 9 block to set a value to one of two
constants, depending on an external condition. The input to the adapt block can be a linear signal or a selected fixed signal.
Figure 24-3 Select One of Two Input Values
24-2 2VAA000844R0001 J
25. Analog Input (Periodic Sample)
25. Analog Input (Periodic Sample)
In the BRC controller the analog input function code acquires an analog input signal from another module in the same PCU
node via the Controlway/module bus. This analog input signal is updated at periodic intervals. The update time is specified
by the periodic I/O sampling period (S13) of the segment control block located in the module containing function code 25.
The HAC controller uses FC25 to acquire an analog input signal from another HAC controller via the peer-to-peer network.
Specification S8 in FC 57 node statistics block is used to specify the maximum number of destination nodes to which the
HAC controller may communicate. This analog input signal is updated at periodic intervals. The update time is specified by
the periodic I/O sampling period (S13) of the segment control block located in the module containing function code 25.
To ensure that the signal is successfully acquired from the source node/module, the analog signal generates a point quality
flag. To test the quality of the signal, include a function code 31 (test quality) block in the configuration. The output of the test
quality block can be used as an input to other digital processing blocks. Refer to Appendix J, for a definition of point quality.
This function code is not supported with HC800 or SPC700 controllers. See function code 205.
NOTE: A block defined as an analog input reads a value for any existing analog output from a function block configured in the
source node/module. No additional configuration in the source node/module is required
The number of FC25s configured in a BRC or HAC controller is limited only by memory usage and bus loading (i.e. - will
they fit in the configuration and can the bus (Controlway or PNET) handled the requested number of point updates).
Multiple FC25 inputs may be configured in the same controller having the same source block address
.
Outputs
AI/B
(25)
N
N R Output value and quality. Quality:

0 = good
1 = bad
Specifications
S1 N 0 I Note 1 Requested module address
S2 N 0 I Note 2 Requested block address

NOTES:
1. Range values are:
0-31 for the BRC-100, IMMFP11/12
1-250 for the HAC
9,998 for the BRC-100/200/300 and IMMFP11/12
31,998 for the BRC-400/410, HPG800, and HAC
2VAA000844R0001 J 25-1
Applications 25. Analog Input (Periodic Sample)
25.1 Applications
Figure 25-1 and 25-2 shows how to use function code 25 to transport an analog value from one module to another module
via the Controlway or module bus. The function code 31 (test quality) block optionally monitors point quality.
CONTROLWAY ADDRESS 6
PID TO OTHER
AI/B S2 (19) ANALOG
SP
CONTROLWAY (25) S1 (7) S1 215 PROCESS
PV BLOCKS
ADDRESS 3 205 210 S3
BLOCK 210 TR
S4
TS
S1 = 3 S2 = 10
S2 = 210 S5 = 1.000
S6 = 1.000
C AI/B S7 = 0.000
CONTROLWAY (25) S8 = 0.000
ADDRESS 4
O S9
206 = 105.000
BLOCK 210 N S10 = -5.000
T S1 S11 =0
R S1 = 4 S2 S12 =0 TO DIGITAL
(31) OUTPUT OR
O S2 = 210 S3 TSTQ
220 PROCESSING
L S4 BLOCK
W DI/B
CONTROLWAY A (41)
ADDRESS 5
BLOCK 210 Y 207
S1 = 5
S2 = 210
TO OTHER
DI/B ANALOG
CONTROLWAY PROCESS
ADDRESS 7 (41)
BLOCKS
BLOCK 210 208
S1 = 7
S2 = 210
TEST QUALITY
(FUNCTION CODE 31)
OUTPUT TRUTH TABLE
S1 S2 S3 S4 OUT
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 1 1 1
T01631A
Figure 25-1 Acquire an Analog Signal from Another Module (BRC-100 only)
25-2 2VAA000844R0001 J
25. Analog Input (Periodic Sample) Applications
PE ER -TO -P EE R AD D R ES S 6
PID TO OT H E R
AI/B S2 (1 9 ) A N AL O G
SP
N O DE (2 5) S1 (7 ) S1 215 PRO CESS
PV BLOC KS
A DDR ESS 3 205 210 S3
B LOCK 210 TR
S4
TS
S1 = 3 S 2 = 10
S 2 = 2 10 S5 = 1 .0 0 0
S6 = 1 .0 0 0
AI/B S7 = 0 .0 0 0
N O DE (2 5) S8 = 0 .0 0 0
A DDR ESS 4 206 S9 = 1 05 .0 0 0
B LOCK 210 S 10 = -5 .0 0 0
S1 S 11 = 0
S1 = 4 S 12 = 0 TO D IG ITA L
S2
S 2 = 21 0 (3 1 ) O U T PU T O R
S3 T STQ P R O C E S S IN G
220
S4 BLOC K
D I/B
NO D E (4 1 )
A D D R E SS 5
BLOC K 210 20 7
S1 = 5
S 2 = 210
TO OTHER
DI/B ANALOG
NO DE PROCESS
A D D R E SS 7 (4 1)
BLOCKS
BLOC K 210 208
S1 = 7
S2 = 210
TE S T Q U A L IT Y
(F U N C T IO N C O D E 3 1 )
O U T P U T TR U T H TA B L E
S1 S2 S3 S4 OU T
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 1 1 1
T 02 2 5 2 A
Figure 25-2 Acquire an Analog Signal from Another Module (HAC only)
2VAA000844R0001 J 25-3
Applications 25. Analog Input (Periodic Sample)
25-4 2VAA000844R0001 J
26. Analog Input/Loop
26. Analog Input/Loop

The analog input/loop function code acquires analog signals via the communication highway in the same control network.
The input points are located in other Harmony control units (HCUs) and must have an exception report defined using the
analog exception report function code (FC 30). Updates are on an exception report basis. Exception report intervals are
specified in the executive block or the segment control block. Use function code 121 for communication to other control
networks.
To ensure that the signal is successfully acquired from the Controlway/module bus, the analog signal generates a point
quality flag. To test the quality of the signal, include a function code 31 in the configuration. The quality of the point cannot
be used as an input to any other type of block. However, the output of the test quality block, representing the quality, can be
used as an input to other analog processing blocks. Refer to Appendix J, for a definition of point quality.
Use function code 69 to test the alarm associated with the analog input/loop function block.
AI/L Outputs
(2 6 )
N
N R Analog output value

NOTES:
1. Function code 26 cannot connect to a function code 30 in a different Cnet
control network. Use function code 121 to connect with another loop.
2. If a controller utilizes an imported analog value from the loop in several
instances, the function blocks that utilize this analog value must be connected to
one analog input/loop function block that handles the importation of this point. It is
not possible to import exception reports from a particular address to more than
one destination analog input/loop function block within a single controller
configuration. Loop, PCU, Module, and Block number must be unique for each
import FC in the controller among ALL import FCs (i.e. - FC 26/121 & 42/122).
Multiple loop inputs from the same source address per PCU are supported as
long as they are not from a single controller in that PCU.
3. Output N is updated each segment scan, which also updates the internal XR
value which is sent out based on the MIN/MAX/Alarm/SigChange.
Specifications
S1 N 0 I 0 - 31 Requested module address
S3 N 0 I 0 - 249 Requested node address

NOTE:
2VAA000844R0001 J 26-1
Applications 26. Analog Input/Loop
26.1 Applications
Figure 26-1 illustrates using function code 26 to acquire an analog value from another node. The Cnet connects the analog
output signal in node one to the analog input in node two.
NOD E 1 NODE 2
M OD ULE ADD RESS 5 C NET M OD ULE ADD RESS 2
S1
S2 TO D IG ITA L O U T P U T
(31)
S3 T ST Q OR
6 10 P RO C E S S IN G B LO C K
S4
A I/L
S1 (30) (26) TO O T H E R A N A LO G
AO /L
5 00 6 00 P R O C E S S IN G B LO C K S
S1 = 5
A N A LO G VA LU E S 2 = 5 00
G E N E R AT E D IN S3 = 1
NODE 1
T 0 4 2 12 A
Figure 26-1 Acquire an Analog Value from Another Node
26-2 2VAA000844R0001 J
30. Analog Exception Report Explanation
30. Analog Exception Report

The analog exception report function code allows an analog value to be sent on the communication highway if the value
changes outside a configured deadband. This function also generates an alarm if the high or low limit values are reached.
The analog exception report is transmitted after a time limit that is configured in the modules executive or segment control
block.
This function does not perform any conversion of its input. Specifications S3 and S4 (zero and span of input) are used
internally, and significant change (S7) is used to report to other Harmony control units (HCUs) or operator interface devices.
Specification S2 (engineering units) is used for reporting to these higher level devices.
To ensure that the signal is successfully transferred, the analog signal generates a point quality flag. To test the quality of
the signal, include a function code 31 in the configuration. The quality of the point cannot be used as an input to any other
type of block. The analog output value can be used as an input to any analog processing block. Refer to Appendix J, for a
definition of point quality.
Outputs
S1 (30)
AO/L
N R Analog output value and quality
Specifications
S2 N 0 I 0 - 255 Engineering unit identifier
S3 N 0.000 R Full Zero of <S1> in engineering units
S4 N 100.000 R Full Span of <S1> in engineering units
S5 Y2 100.000 R Full High alarm point limit value
S6 Y2 0.000 R Full Low alarm point limit value
S7 N 1.000 R Full Significant change (% of span)

NOTES:
2. All alarm limits are tunable, but not adaptable. Function code 24 cannot be used to adapt the value
of alarm limits.
30.1 Explanation
30.1.1 Exception Reports
An exception report is returned to the bus interface module or network processing module following a report poll message if
a report enable message has been received for the block number. This requires that an analog input block (function code
26 or 121) be configured in some other HCU, or as a point from a network interface unit, or as a tag defined in a console,
referencing the output of the analog exception report block.
An exception report will occur when:
tr  tmax
where:
tr = Time since last report.
tmax = Maximum report time for this point as specified
by the executive block or the segment control
block.
or
2VAA000844R0001 J 30-1
Alarm Reports 30. Analog Exception Report
S7  S4
 S1 –  S1 1  ------------------- and t r  t mi n
100
where:
<S1> = Current value of input.
<S11> = Last reported value of input.
S4 = Span of input in engineering units.
S7 = Significant change in percent.
tmin = Minimum report time for this block as
specified by the executive or segment
control block.
30.1.2 Alarm Reports
An alarm report is returned to the bus interface or network processing module following a report poll message if:
1. A report enable message has been received for the block number.
and
2. The low or high alarm set point is exceeded.
An alarm report occurs when:
1. <S1>  S5, and current status  high alarm.
2. <S1>  S6, and current status  low alarm.
3. (S6  DB)  <S1>  (S5 – DB), and current status  normal.
where:
S5 = Value of high alarm limit.
S6 = Value of low alarm limit.
DB Alarm = deadband  S4
--------------------------------------------------------
100
S4 = Span of input in engineering units.
Alarm deadband is defined in the executive segment control block for the harmony controllers. The executive or segment
control block defines the alarm deadband for all high/low alarm reports on the module specified. Alarm deadbands prevent
an excessive number of alarm reports when values are hovering around the alarm limit.
4. Time limit (Tmax) generates an exception report after a time interval configured in the executive or segment
control block.
30-2 2VAA000844R0001 J
30. Analog Exception Report Alarm Reports
A sample input, with alarm and exception reports identified, is plotted in Figure 30-1.
HIGH ALARM LIMIT (S5) = 90

LOW ALARM LIMIT (S6) = 10
ALARM DEADBAND = 2.5 %
SIGNIFICANT CHANGE (S7) = 5 %
Y = OUTPUT OF FUNCTION CODE BLOCK 30
100
HIGH LIMIT
1 DEADBAND = 2.5 %
90
80
2 5%
70 SIGNIFICANT
CHANGE > 5 %
60 3
50
Y
tmin
40
30
20 5
DEADBAND = 2.5 %
10
LOW LIMIT 4
0
TIME
1 Y GOES INTO HIGH ALARM STATE AND AN ALARM REPORT IS GENERATED.
2 Y GOES INTO NORMAL STATE AND AN ALARM REPORT IS GENERATED.
3 Y EXCEEDS SIGNIFICANT CHANGE AND AN EXCEPTION REPORT IS GENERATED.
4 Y GOES INTO LOW ALARM STATE AND AN ALARM REPORT IS GENERATED.
T01636A
Figure 30-1 Analog Exception Report Input with Alarm and Exception Reports
2VAA000844R0001 J 30-3
Alarm Reports 30. Analog Exception Report
30-4 2VAA000844R0001 J
31. Test Quality Applications
31. Test Quality

The test quality function code checks the point quality of up to four inputs. It is a four input logical OR function that sets the
output to a logic 0 if all tested points are good, and to a logic 1 if one or more tested inputs are bad.
Analog and digital I/O and Cnet inputs can be tested for quality. Quality is not propagated through module function blocks.
All internal points will have good quality.
Outputs
S1 Blk Type Description

S2
(31)
S3 T ST Q
N
N B Point quality:
S4 0 = all inputs good
1 = at least 1 input bad
Specifications

NOTE:
Function code 31 may be used with any Harmony function code with a quality output.
31.1 Applications
The example shown in Figure 31-1 shows four analog points transferred from Controlway addresses three, four, five and
seven into Controlway address six. The test quality block checks the point quality of all four analog points. If one or more of
2VAA000844R0001 J 31-1
Applications 31. Test Quality
the points are bad quality, the output of the test quality block (block 220) is a logic 1. When all points are good, the output is
a logic 0.
PID TO OTHER
AI/B S2 (19) ANALOG
SP
PV BLOCKS
BLOCK 210 TR
S4
TS
S1 = 3 S2 = 10
S2 = 210 S5 = 1.000
S6 = 1.000
C AI/B S7 = 0.000
ADDRESS 4
O S9
206 = 105.000
BLOCK 210 N S10 = -5.000
T S1 S11 =0
R S1 = 4 S12 =0 TO DIGITAL
S2
(31) OUTPUT OR
O S2 = 210 S3 TSTQ
220 PROCESSING
L S4 BLOCK
W DI/B
CONTROLWAY A (41)
ADDRESS 5
BLOCK 210 Y 207
S1 = 5
S2 = 210
TO OTHER
DI/B ANALOG
CONTROLWAY PROCESS
ADDRESS 7 (41)
BLOCKS
BLOCK 210 208
S1 = 7
S2 = 210
TEST QUALITY
(FUNCTION CODE 31)
OUTPUT TRUTH TABLE
S1 S2 S3 S4 OUT
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 1 1 1
T01631A
Figure 31-1 Test the Quality of Analog and Digital Inputs
31-2 2VAA000844R0001 J
32. Trip
32. Trip
The trip function code disables a controller by internally forcing it into the error mode when the input is a logic 1. When the
controller goes to error mode, the machine fault timer times out, stopping all communication with the controller. All outputs
go to their default value when the timer times out. Analog values go to zero percent, 100 percent, or hold, depending on the
output's hardware configuration. All logic outputs for controllers go to logic 0. Harmony rack I/O modules have software
configured logic states (function code 128).
NOTE: This function code is used to support Harmony rack I/O modules only.
When function code 32 trips the controller, reset the controller by pressing the reset pushbutton on the front of the controller.
After the controller is reset, it will be in error mode. A Composer workstation or Conductor console will display the number of
the block that tripped the controller, allowing the control strategy to be checked to determine the reason for the trip. To place
the controller in execute mode after an error, place it in configure mode and then in execute mode.
NOTE: The cause of the trip must be corrected or the controller will not remain in execute mode.
Outputs

S1 (32)
T R IP
N
N B Module status:
0 = normal operation
1 = module disabled
Specifications

NOTE:
2VAA000844R0001 J 32-1
32. Trip
32-2 2VAA000844R0001 J
33. 33 Not
33. 33 Not
Function code 33 performs a logical negation of the input (the output is the opposite of the input).
Outputs
(33)
S1
NOT Blk Type Description
N
N B When input equals 1, output equals 0

When input equals 0, output equals 1
Specifications

NOTE:
2VAA000844R0001 J 33-1
33. 33 Not
33-2 2VAA000844R0001 J
34. Memory Applications
34. Memory
This function memorizes its previous output when both inputs are logic 0. Specification S1 is the set (S) input, and S2 is the
reset (R) input. When both inputs have the value logic 1, the output assumes the override state specified by S4.
Specification S3 is the initial state flag. The value specified in <S3> will be the output after power up or a controller reset.
Table 34-1 shows that the initial state depends solely on the value of <S3>. The values of <S1>, <S2> and S4 have no
effect on initial output.
Table 34-2 shows the output for all other input combinations.
Outputs
S1 (3 4 )
S
N
S2
R Blk Type Description
S3
I N B Refer to Tables 34-1 and 34-2
Specifications
S1 N 0 I Note 1 Block address of set input
S2 N 0 I Note 1 Block address of reset input
S3 N 0 I Note 1 Block address of initial state
S4 N 0 B 0 or 1 Override value:
0 = reset
1 = set
NOTE:
Table 34-1Power Up or Controller Reset Truth Table
Inputs Override Initial Output

S4 <S3> N
<S1> <S2>
0 0 X 0 0
Table 34-2 Normal Operation Truth Table
Inputs Override Initial Output

S4 <S3> N
<S1> <S2>
0 0 X X No change from previous output
1 0 X X 1
0 1 X X 0
1 1 0 X 0
1 1 1 X 1
34.1 Applications
This function code creates deadbands and retains signals. Figure 34-1 shows how to control a fan in the following manner:
1. When air temperature reaches 21°C, the fan will turn on.
2. When air temperature goes below 15°C, the fan will shut off.
2VAA000844R0001 J 34-1
Applications 34. Memory
3. The fan will turn on when it receives a logic 1 signal, and it will turn off when it receives a logic 0 signal.
4. Use a function code 12 (high/low compare) block to activate the <S1> (S) input when the air temperature
reaches or exceeds 21°C. Use the same function code 12 block to activate the <S2> (R) input when air
temperature is 15°C or lower. Figure 34-1 illustrates this configuration.
If T  21C, <S1>=1, <S2>=0, output=1, fan turns on.
If T is between 15° and 21°C (15°C < T < 21°C), <S1>=0, <S2>=0, output = no change from previous output (1), fan
remains on.
If T  15°C, <S1>=0, <S2>=1, output=0, fan shuts off.
H//L S1 (34)
S
S1 (12) 225
H
220 S2
L R
221
O
S2 = 21 C S3
S3 = 15 OC I
S4 = 0
T01637A
Figure 34-1 Regulatory Control
34-2 2VAA000844R0001 J
35. Timer Explanation
35. Timer
The timer function code performs timing, pulsed timing, or timed out delay functions. The timing mode is specified by S2
and the duration of time delay is specified by S3. Figure 35-1 shows output shapes for each mode of operation.
Outputs
S1 (35) Blk Type Description

T D -D IG N
N B Logic state defined for pulse, timing or timed out delay
functions
Specifications
S2 N 0 I 0-2 0 = pulse output

1 = timed out
2 = timing
00X = normal
10X = time during start up period
NOTE: The tens digit is not used and must be set to
0
S3 Y 0.000 R Full Time delay in secs

NOTE:
35.1 Explanation
Pulse Output Mode

In the pulse output mode, the output becomes logic 1 whenever the input becomes logic 1. If the input returns to logic 0
before the time delay (S3) ends, the output will remain logic 1 for the entire interval. If the input remains a logic 1 after the
time delay expires, the output will return to a logic 0 at the end of the time delay, and remain a logic 0 until there is another
0 to 1 transition of the input. Despite how long the input value remains in the logic 1 state, the output remains in the logic 1
state for the duration of the time delay specified in S3. The characteristic of the pulse output mode is often called one shot.
Timed Out Mode

In the timed out mode, the input must remain logic 1 for longer than the time delay before the output will track it. The output
will remain logic 0 if the input pulse duration is shorter than the time delay, and will become logic 1 only if the input remains
logic 1 for a period of time exceeding the time delay. It will then track the input.
Timing Mode
In the timing mode, the output tracks the input for the length of the time delay, but transitions to logic 0 at the end of the time
delay, despite the input value. The output becomes a logic 1 whenever the input becomes a logic 1. If the input returns to
2VAA000844R0001 J 35-1
Explanation 35. Timer
logic 0 before the specified time delay ends, then the output also returns to logic 0. If the input remains a logic 1 after the
specified time delay, the output will return to logic 0 at the end of the time delay.
S2 = 0 S2 = 1 S2 = 2
PULSE OUTPUT (P) TIMED OUT (TO) TIMING (T)
CASE 1: ELAPSED TIME < S3
INPUT
OUTPUT
S3 S3 S3
CASE 2: ELAPSED TIME > S3
INPUT
OUTPUT
S3 S3 S3
T01638A
Figure 35-1 Output Shapes Obtained in the Three Timing Modes
35-2 2VAA000844R0001 J
36. 36 - Qualified OR (8-Input) Applications
36. 36 - Qualified OR (8-Input)

The qualified OR function code monitors the status of up to eight digital inputs and produces an output signal based upon
conditions set by S9 and S10. The output is a logic 1 or 0 and is based upon the number of inputs being less than, equal to,
or greater than the number specified in S9 and the condition set by S10.
Outputs
S1
S2
S3
S4 N B Output equals:
(36)
S5 Q OR N Logic 0 when:
S6 No. of logic 1 inputs < S9
S7
S8
Logic 1 when:
S10 = 0 and no. of logic 1 inputs  S9
or
S10 = 1 and no. of logic 1 inputs = S9
Specifications
S5 N 0 I Note 1 Block address of fifth input
S6 N 0 I Note 1 Block address of sixth input
S7 N 0 I Note 1 Block address of seventh input
S8 N 0 I Note 1 Block address of eighth input
S9 N 0 I 0-8 Number of inputs that must equal logic 1
S10 N 0 B 0 or 1 Select inputs:

0 = no. of logic 1 inputs  S9
1 = no. of logic 1 inputs = S9
NOTE:
36.1 Applications
This function can monitor a group of devices to determine if a certain number of the devices are operational at any given
time. Figure 36-1 illustrates the use of function code 36 to monitor the number of pumps running and limit demand when
less than two are operational. The output of the qualified OR block serves as a transfer signal for an analog transfer block.
2VAA000844R0001 J 36-1
Applications 36. 36 - Qualified OR (8-Input)
If less than two pumps are running, the output of the analog transfer block will be the constant identified in the manual set
constant block, and if two or more pumps are running, the output equals the input from the process.
(2)
A
215
S1
INPUT S1 = 50.000
S2 (9)
FROM T
PROCESS S3 225
S1
S2
S4 = 0.000
S3 S5 = 0.000
S4
(36)
S5 QOR
220
S6
S7
S8
PUMP STATUS
S9 = 2
S10 = 0
T01639A
Figure 36-1 Signal Regulation Based on the Number of Pumps Operational
36-2 2VAA000844R0001 J
37. AND (2-Input)
37. AND (2-Input)

The 2-input AND function code performs the logical AND function. The output is logic 1 when both inputs are logic 1.
Outputs

S1 A (37)
S2 N
N N B Refer to truth table (Table 37-1)
D
Table 37-1 2-Input AND Truth Table
Inputs
Output
N
S1 S2
0 0 0
0 1 0
1 0 0
1 1 1
Specifications

NOTE:
2VAA000844R0001 J 37-1
37. AND (2-Input)
37-2 2VAA000844R0001 J
38. AND (4-Input)
38. AND (4-Input)

The 4-input AND function code performs the logical AND function. The output is logic 1 when all the inputs are logic 1.
Outputs
S1
S2 A (38) Blk Type Description
S3 N
N
S4 D N B Refer to truth table (Table 38-1)
Table 38-1 4-Input AND Truth Table
Inputs Inputs
Output Output
N N
<S1> <S2> <S3> <S4> <S1> <S2> <S3> <S4>
0 0 0 0 0 1 0 0 0 0
0 0 0 1 0 1 0 0 1 0
0 0 1 0 0 1 0 1 0 0
0 0 1 1 0 1 0 1 1 0
0 1 0 0 0 1 1 0 0 0
0 1 0 1 0 1 1 0 1 0
0 1 1 0 0 1 1 1 0 0
0 1 1 1 0 1 1 1 1 1
Specifications

NOTE:
2VAA000844R0001 J 38-1
38. AND (4-Input)
38-2 2VAA000844R0001 J
39. 39 OR (2-Input)
39. 39 OR (2-Input)
The 2-input OR function code performs the logical OR function. The output is logic 1 if either or both of the inputs (<S1> and
<S2>) are logic 1. The output is logic 0 when both inputs are logic 0.
Outputs
S1
(39)
S2 OR
N B Refer to truth table (Table 39-1)
Table 39-1 2-Input OR Truth Table
Inputs Output
N
<S1> <S2>
0 0 0
0 1 1
1 0 1
1 1 1
Specifications

NOTE:
2VAA000844R0001 J 39-1
39. 39 OR (2-Input)
39-2 2VAA000844R0001 J
40. OR (4-Input)
40. OR (4-Input)
The 4-input OR function code is used to perform the logical OR function. The output is logic 1 when one or more inputs
equal logic 1. When no inputs equal logic 1, the output is logic 0.
Outputs
S1
S2
(40) Blk Type Description
S3 OR
N
S4 N B Refer to truth table (Table 40-1)
Table 40-1 4-Input OR Truth Table
Inputs Inputs
Output N Output N
<S1> <S2> <S3> <S4> <S1> <S2> <S3> <S4>
0 0 0 0 0 1 0 0 0 1
0 0 0 1 1 1 0 0 1 1
0 0 1 0 1 1 0 1 0 1
0 0 1 1 1 1 0 1 1 1
0 1 0 0 1 1 1 0 0 1
0 1 0 1 1 1 1 0 1 1
0 1 1 0 1 1 1 1 0 1
0 1 1 1 1 1 1 1 1 1
Specifications

NOTE:
2VAA000844R0001 J 40-1
40. OR (4-Input)
40-2 2VAA000844R0001 J
41. Digital Input (Periodic Sample)
41. Digital Input (Periodic Sample)

In the BRC controller, the digital input function code acquires a digital input signal from another module in the same PCU
node via the Controlway/module bus. This digital input signal is updated at periodic intervals. The update time is specified
by the periodic I/O sampling period (S13) of the segment control block located in the module containing function code 41.
In the HAC controller, the digital input (periodic sample) function code acquires digital signals via the Controlway/module
bus from other master modules. The input points must be in the same process control unit (PCU) node. The signal is
updated at periodic intervals depending on the periodic I/O sampling period that is specified in the segment control block for
the Harmony controllers.
The HAC controller uses FC 45 to acquire a digital input signal from another HAC controller via the peer-to-peer network.
Specification S8 in FC 57 is used to specify the maximum number of destination nodes the HAC controller may
communicate with. The signal is updated at periodic intervals depending on the periodic I/O sampling period that is
specified in the segment control block for the Harmony controllers.
To ensure that the signal is successfully acquired from the source node/module, the digital signal generates a point quality
flag. To test the quality of the signal, include a function code 31 in the configuration. The output of the test quality block can
be used as an input to other digital processing blocks to provide signal quality information. Refer to Appendix J, for a
source node/module. No additional configuration in the source node/module is required.
they fit in the configuration and can the bus (Controlway or PNET) handled the requested number of point updates). Multiple
FC41 inputs may be configured in the same controller having the same source block address.
Outputs
D I/B Blk Type Description

(41)
N
N B Output value and quality. Quality:
0 = good
1 = bad
Specifications
S1 N 0 I 0 - 31 Source module address
S2 N 0 I Note 1 Source block address

NOTE:
31,998 for the BRC-400/410, HPG800 and HAC
2VAA000844R0001 J 41-1
Examples 41. Digital Input (Periodic Sample)
41.1 Examples
Figure 41-1 and 41-2 illustrates the configuration required to test the point quality from a digital input (periodic sample)
function code.
PID TO OTHER
AI/B S2 (19) ANALOG
SP
PV BLOCKS
BLOCK 210 TR
S4
TS
S1 = 3 S2 = 10
S2 = 210 S5 = 1.000
S6 = 1.000
C AI/B S7 = 0.000
ADDRESS 4
O S9 = 105.000
N 206
BLOCK 210 S10 = -5.000
T S1 S11 =0
R S1 = 4 S12 =0 TO DIGITAL
S2 (31)
O S2 = 210 OUTPUT OR
S3 TSTQ PROCESSING
L 220
S4 BLOCK
W DI/B
CONTROLWAY A (41)
ADDRESS 5
BLOCK 210 Y 207
S1 = 5
S2 = 210
TO OTHER
DI/B ANALOG
CONTROLWAY PROCESS
ADDRESS 7 (41)
BLOCKS
BLOCK 210 208
S1 = 7
S2 = 210
TEST QUALITY
(FUNCTION CODE 31)
OUTPUT TRUTH TABLE
S1 S2 S3 S4 OUT
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 1 1 1
T01631A
Figure 41-1 Acquire a Digital Signal from Another Module (BRC-100 only)
41-2 2VAA000844R0001 J
41. Digital Input (Periodic Sample) Examples
P E E R -TO -P E E R AD D R E S S 6
P ID TO O TH E R
AI/B S2 (19 ) A N A LO G
SP
NO DE (25) S1 (7) S1 21 5 P RO C E S S
PV B LO C K S
ADD RESS 3 20 5 210 S3
B L OC K 2 10 TR
S4
TS
S1 = 3 S2 = 1 0
S 2 = 2 10 S5 = 1.000
S6 = 1.000
AI/B S7 = 0.000
N OD E (25) S8 = 0.000
A DDR ESS 4 20 6 S9 = 105.0 00
B LO C K 210 S1 0 = -5.000
S1 S1 1 = 0
S1 = 4 S2 S1 2 = 0 TO D IG ITA L
S 2 = 21 0 (31) O U TP U T O R
S3 TSTQ P RO C E S S IN G
22 0
S4 B LO C K
D I/B
NO DE (41)
A DDRE SS 5
B LO C K 210 20 7
S1 = 5
S 2 = 210
TO OTHER
D I/B ANALOG
NO DE PROCESS
A D D R E SS 7 (4 1)
BLOCKS
B L O C K 2 10 208
S1 = 7
S 2 = 210
TE S T Q U A L ITY
(F U N C TIO N C O D E 31)
O U TP U T TR U TH TA B LE
S1 S2 S3 S4 OUT
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 1 1 1
T 02 252 A
Figure 41-2 Acquire a Digital Signal from Another Module (HAC only)
2VAA000844R0001 J 41-3
Examples 41. Digital Input (Periodic Sample)
41-4 2VAA000844R0001 J
42. Digital Input/Loop
42. Digital Input/Loop

The digital input/loop function code acquires digital signals via the communication highway in the same loop. The input
points are located in other Harmony control units (HCUs) and must have an exception report defined (e.g., digital exception
report, function code 45). Updates are on an exception report basis. Exception report intervals are specified in the executive
block or the segment control block. Use function code 122 for communication to other loops.
To ensure that the module successfully acquires a signal from another node, the digital signal generates a point quality flag.
To test the quality of the signal, include a function code 31 in the configuration. The quality of the point cannot be
determined by any other type of block. The output of the test quality block can be used as an input to other digital
processing blocks to provide signal quality information. Refer to Appendix J, for a definition of point quality.
Outputs
D I/L
N
N B Value of the function block output and quality
NOTES:
1. Function code 42 cannot connect to a function code 45 in a different Cnet
loop. Use function code 122 to connect with another loop.
2. If a module utilizes an imported digital value from the loop in several
instances, the function blocks that utilize this digital value must be connected to
one digital input/loop function block that handles the importation of this point. It is
not possible to import exception reports from a particular address to more than
one destination digital input/loop function block within a single module
configuration. Loop, PCU, Module, and Block number must be unique for each
import FC in the controller among ALL import FCs (i.e. - FC 26/121 & 42/122).
Multiple loop inputs from the same source address per PCU are supported as
long as they are not from a single controller in that PCU.
3. Output N is updated each segment scan, which also updates the internal XR
value which is sent out based on the MIN/MAX/Alarm/SigChange.
Specifications
S1 N 0 I 0 - 31 Requested module address
S3 N 0 I 1-250 Requested node address

NOTE:
2VAA000844R0001 J 42-1
Examples 42. Digital Input/Loop
42.1 Examples
Figure 42-1 illustrates the configuration required to test point quality. Input to a function code 42 block must come from a
function code 45 block.
LO O P A D D R E S S 10 LO O P A D D R E S S 15
M O D U LE A D D R E S S 5 CN E T M O D U LE A D DR E S S 7
S1
S2 TO D IG ITA L O UT P U T
(31 )
S3 TSTQ OR
81 PRO C E SSING BL O C K
S4
D I/L
S1 (4 5) (42 ) TO O T HE R D IG ITA L
D O /L
22 0 2 20 PR O C ES SIN G BLO CK S
S1 = 5
S2 = 4 20
S3 = 1 0
T0421 1B
Figure 42-1 Configuration Required to Test Point Quality
42-2 2VAA000844R0001 J
45. Digital Exception Report Explanation
45. Digital Exception Report

The digital exception report function code exception reports <S1>. Specification S2 defines the alarm state.
Exception reports are activated by a report enable signal from the module bus. The maximum number of exception reports
allowed depends on the controller configuration. The number of exception reports is defined in the executive block of the
controller.
Outputs
S1 (4 5 )
D O /L
N
N B Value of exception report
Specifications
S2 N 2 I 0-2 Alarm state:

0 = logic 0 alarm state
2 = no alarm state defined
NOTE:
45.1 Explanation
Exception Reports
An exception report returns to the module bus following a report poll message if a report enable message has been
received for the block number. Use digital input/loop block (function code 42) or digital input/Cnet (function code 122) to
import this data to another PCU. To import this data to a console the point must be added to the tag list.
An exception report occurs when:
1. <S1> = <S1>L and tr > tmin
where:
<S1>L = Last reported value of input.
tmin = Minimum report time for the block as
specified by the executive block or the
segment control block.
or
2. tr > tmax
where:
tmax = Maximum report time for the block as specified
block.
An alarm report returns to the bus interface module following a report poll message if a report enable message has been
received for the block number.
3. <S1>  S2, current status  normal, and S2  2
where:
2VAA000844R0001 J 45-1
Examples 45. Digital Exception Report
S2 = Alarm state:
0 = alarm when <S1> = 0
2 = no alarm
45.2 Examples
Figure 45-1 illustrates an example configuration for a digital exception report function code.
U P /D N
M OTO R S1 (85)
U V
S TA RT S2 150 S1 (45)
D H
151
D O /L TO H S I
S3 155
R L
S4 152
H
S 5 = 0.000
S 6 = 100.000
S 7 = -9.2E + 18 T0 20 30B
Figure 45-1 Example Digital Exception Report Configuration
45-2 2VAA000844R0001 J
48. Analog Exception Report with High/Low Alarm Deadband Explanation
48. Analog Exception Report with High/Low Alarm Deadband

The analog exception report with high/low alarm deadband function code allows an analog value to be sent on the
communication highway if the value changes outside a configured deadband. This function also generates an alarm if the
high or low limit values are reached. The analog exception report is transmitted after a time limit that is configured in the
module’s executive or segment control block.
This function does not perform any conversion of its input. Specifications S3 and S4 (zero and span of input) are used
internally, and significant change (S7) is used to report to other Harmony control units (HCUs) or operator interface devices.
Specification S2 (engineering units) is used for reporting to these higher level devices.
To ensure that the signal is successfully transferred, the analog signal generates a point quality flag. To test the quality of
the signal, include a function code 31 in the configuration. The quality of the point cannot be used as an input to any other
type of block. The analog output value can be used as an input to any analog processing block. Refer to Appendix J, for a
Use function code 69 to test the alarm associated with the analog exception report with high/low alarm deadband function
block.
Outputs
S1
AOLDB
(48) Blk Type Description
N
N R Analog output value and quality
Specifications
S3 N 0.000 R Full Zero of <S1> in engineering units
S4 N 100.000 R Full Span of <S1> in engineering units
S5 Y2 100.000 R Full High alarm point limit value in engineering units
S6 Y2 0.000 R Full Low alarm point limit value in engineering units
S7 N 1.000 R Full Significant change in engineering units
S8 Y 1.000 R Full High alarm deadband in engineering units
S9 Y 1.000 R Full Low alarm deadband in engineering units

NOTES:
9,998 for the SPC700 and BRC-300
31,998 for the HC800, BRC-400/410, HPG800
2. All alarm limits are tunable, but not adaptable. Function code 24 cannot be used to adapt the values
of alarm limits.
48.1 Explanation
An exception report is returned to the bus interface module or network processing module following a report poll message if
a report enable message has been received for the block number. This requires that an analog input block (function code
26 or 121) be configured in some other HCU, or as a point from a network interface unit, or as a tag defined in a console,
referencing the output of the analog exception report block.
An exception report will occur when:
tr  tmax
2VAA000844R0001 J 48-1
Alarm Reports 48. Analog Exception Report with High/Low Alarm Deadband
where:
tmax = Maximum report time for this point as specified
block.
or
 S1 –  S1 1  S7 and t r  t mi n
where:
<S11> = Last reported value of input.
S7 = Significant change in engineering units.
tmin = Minimum report time for this block as
specified by the executive or segment
control block.
48.1.2 Alarm Reports
An alarm report is returned to the bus interface or network processing module following a report poll message if:
1. A report enable message has been received for the block number.
and
2. The low or high alarm set point is exceeded.
1. <S1>  S5, and current status  high alarm.
2. <S1>  S6, and current status  low alarm.
3. (S6  S9)  <S1>  (S5 – S8), and current status  normal.
where:
S5 = Value of high alarm limit.
S6 = Value of low alarm limit.
S8 = High alarm deadband in engineering units
S9 = Low alarm deadband in engineering units
4. Time limit (Tmax) generates an exception report after a time interval configured in the executive or segment
control block.
48-2 2VAA000844R0001 J
48. Analog Exception Report with High/Low Alarm Deadband Alarm Reports
A sample input, with alarm and exception reports identified, is plotted in Figure 48-1.
HIGH ALARM LIMIT (S5) = 90

LOW ALARM LIMIT (S6) = 10
HIGH ALARM DEADBAND (S8) = 2.5
LOW ALARM DEADBAND (S9) = 2.5
SIGNIFICANT CHANGE (S7) = 5
Y = OUTPUT OF FUNCTION CODE BLOCK 48
100
HIGH LIMIT
1 HIGH ALARM DEADBAND = 2.5
90
80
2 5
70 SIGNIFICANT
CHANGE > 5
60 3
50
Y
tmin
40
30
20 5
LOW ALARM DEADBAND = 2.5
10
LOW LIMIT 4
0
TIME
1 Y GOES INTO HIGH ALARM STATE AND AN ALARM REPORT IS GENERATED.
3 Y EXCEEDS SIGNIFICANT CHANGE AND AN EXCEPTION REPORT IS GENERATED.
4 Y GOES INTO LOW ALARM STATE AND AN ALARM REPORT IS GENERATED.
T01636B
Figure 48-1 Analog Exception Report with High/Low Alarm Deadband and Exception Reports
2VAA000844R0001 J 48-3
Alarm Reports 48. Analog Exception Report with High/Low Alarm Deadband
48-4 2VAA000844R0001 J
50. Manual Set Switch

This function provides an adjustable boolean output, either logic 1 or logic 0. This function enables the engineer or
technician to turn devices ON or OFF through an operator interface device (e.g., Conductor NT HSI). Specification S1 is a
tunable parameter that can be changed while the module is executing.
Outputs
(50)
O N /O F F Blk Type Description
N
N B Output value equals S1
Specifications
S1 Y 0 B 0 or 1 Desired output value
2VAA000844R0001 J 50-1
50-2 2VAA000844R0001 J
51. Manual Set Constant

The manual set constant function code provides an adjustable real value that is not tunable. It performs the same function
as function code 2, except that function code 51 is not tunable.
Outputs
(5 1 )
A-R E AL
N
N R Output value equals S1
Specifications
S1 N 0.000 R Full Desired output value
2VAA000844R0001 J 51-1
51-2 2VAA000844R0001 J
52. 52 Manual Set Integer Examples
52. 52 Manual Set Integer

The manual set integer function code provides a tunable integer constant.
Outputs
A-IN T
(52)
N
N I Output value equals S1
Specifications
S1 Y 0 I Full Integer constant specified
52.1 Examples
Function code 52 is commonly used with function codes 13 and 24 to dynamically modify integer parameters. Figure 52-1 is
an example of how to use the manual set integer to change the set point tracking option in a station. The value in the remote
control memory block (function code 62) determines which input the function code 13 block reads (<S3> equals zero for
<S1>, and <S3> equals one for <S2>). The adapt block (function code 24) adapts S30 of the control station (function
code 80) to the value received from the integer transfer block (function code 13). When the S3 input (output from the remote
control memory) equals zero, the output of the integer transfer block equals its S1 input (one). Thus, S30 of the station
adapts to set point track option one (track the process variable).
M /A
(5 2) M FC /P
A-IN T (8 0 )
120 S1
PV SP
S2 N +1
SP O
S1 = 1 S3 N
A A
S4 N +2
S1 TR C /R
S5 N +4
(52 ) S2 (1 3 ) S1 (24 ) TS C
A-IN T T-I N T ADA PT S18 N +3
125 S3 135 140 MI C -F
S19 N +5
AX
S20
S1 = 2 S 2 = 145 C/R
S21
S 3 = 14 LX
RC M S22
S1 (6 2) CX
S S24
130 HA A
S2 S25
P
LAA
S3 S26
R
HDA
S4 S27
O
L DA
S5 S28
I
AO
S6 S29
F
T RS 2
S7 S30
A T RP V T
S8 = 1
T 02 0 29 A
Figure 52-1 Dynamically Modify an Integer Parameter
2VAA000844R0001 J 52-1
Examples 52. 52 Manual Set Integer
52-2 2VAA000844R0001 J
55. Hydraulic Servo
55. Hydraulic Servo

The hydraulic servo function code defines startup, run-time, calibration, mode select, and failure mode specifications for the
IMHSS03 Hydraulic Servo Module. This function code is used as an interface to the BRC-100 and HAC controllers.
Individual block addresses are specified by this function code to provide position demand, calibration function and mode
select parameters.
The function block has ten outputs. The outputs display valve position, module status, process control status, as well as the
status of the components within the turbine control loop such as servo coil status and linear variable differential transformer
(LVDT) status.
Outputs

H S S03
S6
% PD %P
(55) N R Percent or volts actuator position with quality
S7 N
NS D /A
S8 N+1
SS S 1C 1 N+1 R IMHSS03 D/A converter output with quality (expressed as
S9 N+2
S 10
CC S 1C 2
N+3 percent of span)
CT S 2C 1
S 11 N+4
S 12
MS S 2C 2
N+5 N+2 R Servo 1 coil 1 output current in percent, or volts, with qual-
HS S LV S T
S 13
M A N LV D T S T
N+6 ity
S 14 N+7
N /A
N+3 R Servo 1 coil 2 output current in percent, or volts, with qual-
ity

ity

ity
N+6 R Module status
N+7 R LVDT status
N+8 B Module hardware status:

0 = good
1 = bad
N+9 B Module communication and watchdog timer status:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Module bus address of module
S2 N 0 I 0-5 Output device select:

0 = output 1 active servo output, output 2 unused
1 = output 1 unused, output 2 active servo output
2 = output 1 active servo, output 2 redundant
servo output
3 = output 1 active servo, output 2 redundant
servo at 20% standby
4 = output 1 active 4-20 mA I/H converter output
5 = output 1 active 20-160 mA I/H converter output
S3 N 0 I 0-4 LVDT select:

0 = input 1 LVDT, input 2 unused
1 = input 1 unused, input 2 LVDT
2 = input 1 primary LVDT, input 2 backup LVDT
3 = input 1 backup LVDT, input 2 primary LVDT
4 = input 1 LVDT I/H display only, input 2 4-20 mA
contingency error monitor
2VAA000844R0001 J 55-1
55. Hydraulic Servo
Specifications (Continued)
S4 N 0 I 0-3 Output action on LVDT error:

0 = valve closes to 0% position:
0 V in servo mode
4 mA in 4-20 mA mode
1 = valve opens to 100% position:
max V in servo mode
2 = valve remains at current position (I/H mode only)
3 = valve moves to null position (I/H mode only)
S5 N 1.0 R 0.0 or LVDT frequency select in KHz:

0.4-15.0 0.0 = DC LVDT mode
S6 N 5 I 0 - 9998 Block address of the percent position demand
S7 N 5 I 0 - 9998 Block address of LVDT null check mode select:

0 = do not stop calibration at null point
1 = stop at null for primary LVDT
2 = stop at null for secondary LVDT
S8 N 6 I 0 - 9998 Block address of calibration stroke time select (in secs)
S9 N 6 I 0 - 9998 Block address of calibration cycles count (1.0 to 8.0)
S10 N 5 I 0 - 9998 Block address of calibration type select:

0 = full calibration. Record both 0% and 100%
calibration values
S10 N 5 I 0 - 9998 1 = 0% calibration. Record only 0% LVDT value

(cont.) 2 = 100% calibration. Record only 100% LVDT value
S11 N 0 I 0 - 9998 Block address of calibrate mode enable:

0 to 1 transition = calibrate
S12 N 0 I 0 - 9998 Block address of calibrate GO/HOLD select:

0 = hold
1 = go
S13 N 0 I 0 - 9998 Block address of hard manual mode select:

0 = auto mode
1 = hard manual mode
S14 N 0 I 0 - 9998 Spare boolean block address parameter
S15 Y 0 I 0-3 Block output display units:

0 = output N in percent, outputs N+2 to N+5 in per-
cent
1 = output N in volts, outputs N+2 to N+5 in percent
2 = output N in percent, outputs N+2 to N+5 in volts
3 = output N in volts, outputs N+2 to N+5 in volts
55-2 2VAA000844R0001 J
55. Hydraulic Servo Explanation
S16 Y 1 I 0 - 31 Demodulator gain constant:

0 = auto-tuning enabled
1 = 2.0 12 = 36.3 23 = 87.7
2 = 4.0 13 = 40.0 24 = 93.6
3 = 5.9 14 = 44.0 25 = 100.9
4 = 7.8 15 = 48.8 26 = 108.0
5 = 10.0 16 = 52.0 27 = 118.0
6 = 11.8 17 = 54.9 28 = 126.2
7 = 16.0 18 = 61.5 29 = 132.0
8 = 21.1 19 = 64.2 30 = 141.3
9 = 24.7 20 = 69.8 31 = 152.0
10 = 28.3 21 = 72.0
11 = 32.0 22 = 78.6
S17 Y 1 I 0 - 31 Control gain proportional constant:

0 or 1 = 1.0 12 = 18.1 23 = 43.8
2 = 2.0 13 = 20.0 24 = 43.8
3 = 2.9 14 = 22.0 25 = 50.4
4 = 3.9 15 = 24.4 26 = 54.0
5 = 5.0 16 = 26.0 27 = 59.4
6 = 5.9 17 = 27.4 28 = 63.1
7 = 8.0 18 = 30.7 29 = 66.0
8 = 10.5 19 = 32.1 30 = 70.6
9 = 12.3 20 = 34.9 31 = 76.0
10 = 14.1 21 = 36.0
11 = 16.0 22 = 39.3
S18 Y -10.0 R Full LVDT 1 differential voltage at 0% actuator position
S19 Y +10.0 R Full LVDT 1 differential voltage at 100% actuator position
S20 Y -10.0 R Full LVDT 2 differential voltage at 0% actuator position
S21 Y +10.0 R Full LVDT 2 differential voltage at 100% actuator position
S22 Y 5.0 R 0 - 100 Contingency deadband in percent
S23 Y 0.0 R Full Spare real parameter
55.1 Explanation
55.1.1 Outputs
N
Percent actuator position with quality. This output displays actuator position read from the LVDT or position feedback
device. Quality will be displayed as bad in the event of an A/D error, a bus transmission error, or an LVDT error (i.e., a
primary or secondary error if using one LVDT, or error on both LVDTs when operating with redundant LVDTs). Otherwise,
the quality will indicate good.
N+1
IMHSS03 D/A converter output. This output displays the D/A converter output value as a percent of span. This is the
position demand signal feedback to generate an error signal. A hardware controller manipulates the error signal to produce
the control output signal. This output value can be used as a guide to match to the BRC-100 position demand and bring the
IMHSS03 module out of hard manual mode. Quality will be displayed as bad in the event of a D/A, A/D or bus transmission
error. Otherwise, the quality will indicate good.
2VAA000844R0001 J 55-3
Outputs 55. Hydraulic Servo
N+2
Servo 1, coil 1 control output. This output displays the IMHSS03 analog control output signal to servo valve 1, coil 1,
expressed as a percent of span. Quality will be displayed as bad in the event of an A/D error, bus transmission error,
shorted output, or opened output. The output is good quality otherwise.
NOTE: This output block will display a value of zero with good quality when defined as unused by S2.
N+3
N+4
N+5
N+6
Module status is converted into a real output as an integer with the bit map shown in Table 55-1.
Table 55-1 Module Status Bit Map
Bit Binary Weight Description
0-1 1 Calibration/automatic tuning command status:

0 = CAL/ATOP command in progress
1 = CAL/ATOP command complete. No command issued
2 = Calibration failure
3 = Demodulator gain auto-tune failure
2 4 Servo outputs in bypass mode
3 8 Module mode:
0 = auto
1 = hard manual
4 16 Contingency/actuator positioning error:

0 = no error
1 = error
5 32 A/D error:
0 = no error
1 = error
6 64 D/A error:
0 = no error
1 = error
7 128 DPRAM error:

0 = no error
1 = error
8-23 — Reserved
Bits 0-1
Status of calibration or automatic tuning command.
55-4 2VAA000844R0001 J
55. Hydraulic Servo Outputs
0 = A calibration or automatic tuning is in process.

1 = The command has been correctly completed or the command has never been issued.
2 = An error has occurred during a calibration operation. It indicates one of three causes. The 100
percent voltage value was less than the zero percent voltage value for the LVDTs. An LVDT failure
occurred during calibration. Refer to S17, S18, S19 and S20 for additional information on calibration
failures.
3 = A demodulator gain auto-tune failure. If using redundant LVDTs, the LVDTs do not match and
cannot be configured for redundant operation. The auto-tuning procedure has picked the best values
for the primary LVDT as selected in S3. The backup LVDT is considered failed. Redundant LVDT
operation is only available if the backup LVDT is replaced and the auto-tune procedure is performed
again.
Bit 2
The servo outputs are bypassed (grounded) due to an I/O error that interferes with positioning. These errors include opened
and shorted LVDTs and DA errors.
Bit 3
Module mode. This output indicates the mode of the IMHSS03 module. A value of zero at this bit indicates automatic mode;
a one value indicates hard manual mode.
Bit 4
Contingency actuator positioning error. This bit is one if the measured actuator position deviates beyond an established
deadband from the position set point established in the IMHSS03 module. Otherwise, this bit value is zero.
Bit 5
A/D error. This bit value is one if the error is associated with the A/D converter on the IMHSS03 module. Otherwise, this bit
value is zero.
Bit 6
D/A error. This bit value is one if the error is associated with the D/A converter on the IMHSS03 module. Otherwise, this bit
value is zero.
Bit 7
DPRAM error. This bit value is one if a DPRAM error is detected on the IMHSS03 module. Otherwise, this bit value is zero.
N+7
LVDT status. The LVDT status is converted into a real output as an integer with the bit map shown in Table 55-2.
Table 55-2 LVDT Status
0 1 Active LVDT or position feedback device:

0 = LVDT 1
1 = LVDT 2
1 2 LVDT 1 primary:
0 = good
1 = bad
2 4 LVDT 1 secondary 1:
0 = good
1 = bad
0 = good
1 = bad
4 16 LVDT 2 primary:
0 = good
1 = bad
0 = good
1 = bad
2VAA000844R0001 J 55-5
Specifications 55. Hydraulic Servo
Table 55-2 LVDT Status (Continued)
0 = good
1 = bad
7 128 LVDT at null point:

0 = not at null
1 = at null
8-23 — Reserved
Bit 0
Active LVDT or position feedback device. This bit indicates which LVDT is being used to determine the percent actuator
position. A zero bit value indicates that input one is currently selected; a bit value of one indicates that input two is currently
selected. In the event of an error to both LVDTs in a redundant LVDT situation, this output will display the most recently
functioning LVDT.
Bit 1
LVDT 1 primary 1 status. This bit value will be one in the event of a primary failure of LVDT 1 (i.e., no signal present on
either of the LVDT 1 secondary outputs). Otherwise, this bit value will be zero.
Bit 2
LVDT 1 secondary 1 status. This bit value will be one in the event of an LVDT 1 secondary 1 failure. Otherwise, this bit value
will be zero.
Bit 3
will be zero.
Bit 4
LVDT 2 primary status. This bit value will be one in the event of a primary failure of LVDT 2 (i.e., no signal present on either
of the LVDT 2 secondary outputs). Otherwise, this bit value will be zero.
Bit 5
will be zero.
Bit 6
will be zero.
Bit 7
LVDT at null point. During calibration, this bit value is one when the 50 percent (null) valve position is reached for the
selected LVDT or position feedback device. Otherwise, this bit value is zero. This bit is always a zero value during both
turbine control and hard manual modes of operation.
N+8
Module hardware status. This output will display a one if the module has encountered a fatal error and stopped operation.
Otherwise, a value of zero is displayed.
N+9
Module communication and watchdog timer status. This output will display a one if the communications between the
module and the BRC-100 controller are lost. Otherwise, a value of zero is displayed.
55.1.2 Specifications
S1
Module bus address of the IMHSS03 Hydraulic Servo Module.
S2
Defines the type and configuration of turbine control valve which will be driven by the IMHSS03 module. There are six
available options:
0 = One hydraulic servo valve connected to output 1. Servo 2 output currents (N+4 and N+5) will
display a value of zero with good quality.
1 = One hydraulic servo valve connected to output 2. Servo 1 output currents (N+2 and N+3) will
display a value of zero with good quality.
55-6 2VAA000844R0001 J
55. Hydraulic Servo Specifications
2 = Redundant hydraulic servo valves used, both with active control signals.
3 = Redundant hydraulic servo valves used, output 1 as primary and output 2 as secondary (20
percent standby signal).
4 = I/H converter mode (four to 20 milliamps) connected to output 1. Servo 2 output currents (N+4
and N+5) and servo 1 coil 2 output current (N+3) will display a value of zero with good quality.
5 = I/H converter mode (20 to 160 milliamps) connected to output 1. Servo 2 output currents (N+4
and N+5) and servo 1 coil 2 output current (N+3) will display a value of zero with good quality.
S3
Selects the position feedback input configuration to be used. Table 55-3 describes the available options.
Table 55-3 Position Feedback Options
Spec Value Input 1 Input 2
0 LVDT No connection
1 No connection LVDT
2 Primary LVDT Backup LVDT
3 Backup LVDT Primary LVDT
4 LVDT (display only in 4-20 mA transmitter (contingency

I/H mode) error only in I/H mode)
S4
Defines the action to be taken in the event of total LVDT failure. Total LVDT failure is defined as a failure of one LVDT in a
single LVDT configuration or both LVDTs in a redundant LVDT configuration.
If operating in the servo valve mode, this specification can be set to ground (outputs disabled) or output the maximum signal
(100 percent) to the outputs in the event of a total LVDT failure.
NOTE: Control of the valve position is impossible without position feedback information.
The outputs are either grounded or driven to 100 percent to avoid large swings in the valve position due to control loss. The
adjustment of the servo valve spool determines the speed in which the servo valve closes or opens. If 100 percent is
selected, the outputs disabled light does not illuminate in the event of an error.
If a total failure of the LVDT occurs, the output is driven based upon selection made in this specification. The options are as
follows:
0 = Valve closes to a zero percent position. Grounded outputs in the servo valve mode are four
milliamps in the four to 20 milliamp mode, or 20 milliamps in the 20 to 160 milliamp mode.
1 = Valve opens to 100 percent position. Outputs to maximum in the servo valve mode are 20
milliamps in the four to 20 milliamp mode, or 160 milliamps in the 20 to 160 milliamp mode.
2 = Valve remains at its current position. Control maintained. I/H mode only.
3 = Valve moves to a null position. I/H mode only.
In either mode, if the LVDT error is a failure of one secondary, the module can be calibrated to return to normal operation.
S5
LVDT frequency selected (in kilohertz) from 0.4 kilohertz to 15.0 kilohertz. If a DC LVDT is used, a value of zero must be
entered for this specification.
S6
Block address of the percent position demand requested. Quality of the position demand block is ignored.
S7
Block address of the LVDT null mode selected. When this specification is set to one or two and calibration is enabled, the
valve ramps to and holds at the LVDT null point for the primary or backup LVDT, respectively.
0 = Do not stop calibration at LVDT null point.
2VAA000844R0001 J 55-7
1 = Stop calibration operation at the null point of the primary LVDT.

2 = Stop calibration operation at the null point of the backup LVDT.
In servo valve mode, the LVDT null point is defined to be the valve position where the LVDT secondaries have equal
voltage, usually close to a 50 percent valve position. In the I/H converter mode, the LVDT null point is the 50 percent output
value (i.e., 12 milliamps for the four to 20 milliamp mode and 90 milliamps for the 20 to 160 milliamp mode).
S8
Block address of the calibration stroke time. This specification indicates the time in seconds for the valve to be driven from
a zero percent actuator position to a 100 percent actuator position. Stroke times normally used for calibration are 30
seconds, 60 seconds, 35 minutes (2,100 seconds) and 70 minutes (4,200 seconds). Minimum stroke time is 30 seconds.
S9
Block address of the calibration cycles count. This specification determines the number of calibration cycles to be
performed during the calibration operation. The calibration operation can perform from one to eight cycles (1.0 to 8.0).
S10
Block address of the calibration type select. This specification selects whether a full calibration will be performed or only the
100 percent LVDT voltage or zero percent LVDT voltage will be recorded.
0 = Full calibration. Record both zero and 100 percent values.

1 = Zero percent calibration. Record only the zero percent LVDT value.
2 = 100 percent calibration. Record only the 100 percent LVDT value.
S11
Block address of the calibrate mode enable. A transition of this input block value from a zero to a one begins the calibration
process.
0 = Do not calibrate or terminate calibration.

1 = Begin calibration (when tuned from a zero to a one).
S12
Block address of the calibrate GO/HOLD select.
0 = Hold. Pause calibration execution.

1 = Go. Execute calibration procedure.
S13
Block address of the hard manual mode select. Hard manual mode can be forced by setting this specification to a one.
When this specification is reset to a zero, the module will return to automatic operation if the 0 - 9998 position demand (S6)
equals IMHSS03 D/A output value (N+1).
S14
Spare boolean block address parameter.
S15
Selects whether the LVDT feedback (output block N) is displayed as a voltage or a percentage.
0 = Output N in percent, outputs N+2 to N+5 in percent

1 = Output N in volts, outputs N+2 to N+5 in percent
2 = Output N in percent, outputs N+2 to N+5 in volts
3 = Output N in volts, outputs N+2 to N+5 in volts
S16
Defines the demodulator gain constant used by the IMHSS03 module. This value can be zero or an integer from one to 31.
If zero is selected, the IMHSS03 module automatically selects the optimal demodulator gain value based on the highest
non-saturated demodulator gain value measured on the IMHSS03 module. If this option is selected, the optimal
demodulator gain value is automatically written into S16.
A non-zero number in this specification directs the IMHSS03 module to use the corresponding table value as the
demodulator gain constant and the automatic tuning operation is not performed. Refer to the specifications table for the list
of available gain constant values.
NOTE: If a change is made to the demodulator gain value, the proportional gain values must be adjusted (i.e., the user-selectable
proportional gain values). Afterwards, an LVDT calibration must be performed.
55-8 2VAA000844R0001 J
55. Hydraulic Servo Specifications
S17
Defines the proportional gain constant used by the IMHSS03 module. The value shown in the specifications table is used as
the proportional gain constant.
S18
LVDT differential voltage at zero percent actuator position for LVDT 1. This value is set by the operator or can be overwritten
for both LVDTs automatically by performing a calibration operation.
S19
LVDT differential voltage at 100 percent actuator position for LVDT 1. This value is set by the operator or can be overwritten
S20
LVDT differential voltage at zero percent actuator position for LVDT 2. This value is set by the operator or can be overwritten
S21
LVDT differential voltage at 100 percent actuator position for LVDT 2. This value is set by the operator or can be overwritten
S22
Contingency deadband in percent. The contingency error bit indicates an error when the valve cannot be driven to the
position demand plus or minus this contingency deadband.
S23
Spare real parameter.
2VAA000844R0001 J 55-9
55-10 2VAA000844R0001 J
57. Node Statistics Block

The node statistics block combines the functionality of node performance statistic outputs and last block along with
extended executive block functions. The function code is part of the HAC controller default block configuration at blocks
31,999 through 32,025. The terminating executive function code replaces the last block function code 89 in the default
configuration. The output indicates the options configuration including the module network type, time-stamping, I/O Hnet
cable length, peer-to-peer Hnet cable length, and revision checking. The node performance statistics are included as the
block outputs of this function code.
NOTE: This function code is supported only on the HAC controller.
Outputs
NODE Blk Type Description

STAT (5 7 )
L AS T B LK
S PA R E
31,999 R Options configuration
L O O P B/S Network type
L O O P M /S XXX3 = Cnet with time-stamping
IN B/S
I/O Hnet cable length
O U T B /S
IN M /S
XX0X = 4000m
O U T M /S XX1X = 9000m
IN XR /S XX2X = 7000m
O U T X R /S XX3X = 5000m
IN G M I/S
XX4X = 2600m
O U T G M I/S
U T IL% XX5X = 1600m
B /S F R O M N IO XX6X= 1300m
B /S TO N IO XX7X= 1100m
M /S FR O M N IO
Peer-to-peer Hnet cable length
M /S TO N IO
B /S F R O M P N E T
X0XX = 4000m
B /S TO P N E T X1XX = 9000m
M /S FR O M P N E T X2XX = 7000m
M /S TO PN E T
X3XX = 5000m
X4XX = 2600m
X5XX = 1600m
X6XX = 1300m
X7XX = 1100m
Revision check
0XXX = Revision check disabled
1XXX = Revision check enabled
32,000 R Reserved
32,001 R Total number of bytes transmitted by the node per second
32,002 R Total number of messages transmitted by the node per

second.
32,003 R Total number of bytes received by the node per second.
32,004 R Total number of bytes sent by the node per second.
32,005 R Total number of messages received by the node per second.
32,006 R Total number of messages sent by the node per second.
32,007 R Total number of exception reports received by the node per

second.
32,008 R Total number of exception reports sent by the node per

second.
32,009 R Total number of GMI messages received by the node per

second.
32,010 R Total number of GMI messages sent by the node per

second.
2VAA000844R0001 J 57-1
Outputs (Continued)
32,011 R Percentage of node’s module processing power currently

being used.
32,012 R Number of bytes transferred per second on the expander

bus from the NIO to the communication module.

bus from the communication module to the NIO.
32,014 R Number of messages transferred per second on the

expander bus from the NIO to the communication module.

expander bus from the communication module to the NIO.

bus from the PNET to the communication module.

bus from the communication module to the PNET.

expander bus from the PNET to the communication module.

expander bus from the communication module to the PNET.
32,020 R Reserved
32,021 R Reserved
32,022 R Reserved
32,023 R Reserved
32,024 R Reserved
32,025 R Reserved
Specifications
S1 N NULL E90 String 0 - 32 chars Reserved for future use
S21 N 20000 R 10,008 - Amount of memory (in bytes) allocated for

400,000 XR routes connected to this module and the
number of HCUs on the system.
S3 Y 0.0 R FULL Reserved for future use
S7 Y 0 INT FULL Reserved for future use
57-2 2VAA000844R0001 J
57. Node Statistics Block Explanations
S82 N 0 INT 0-4 Maximum number of destination nodes con-

nected through the peer-to-peer network. A
value of zero disables the peer-to-peer
channel status reporting for stand-alone
HAC units. A value of zero has no effect on
the peer-to-peer channel status reporting of
redundant HAC units.
S9 N 0.0 R FULL Reserved for future use
S10 N 0.0 R FULL Reserved for future use

NOTE:
1. The amount of memory needed = (18 x number of export routes) + (18 x number of HCUs on the
system).
2. Setting this value too low results in the module entering error mode with a configuration error (type 0x6 -
data type conflict).
57.1 Explanations
S1
Reserved for future use.
S2
The amount of memory (in bytes) allocated for XR routes connected to this module and the number of HCUs in the system.
Failure to allocate sufficient memory will prevent the establishment of some XR routes.
S3-S7
S8
Defines the maximum number of HAC nodes that can be referenced by peer-to-peer network function blocks (FC 25, FC
41, FC 63, FC 64, FC 95) in the HAC function block configuration. Setting this value too low results in the module entering
error mode with a configuration error (type 0x6 - data type conflict).
NOTE: When utilizing FC 95 to monitor the module status of the backup HAC (FC 95, S4 = 1X), S8 of FC 57 must be set to
account for the backup as a separate node.
S9-S10
2VAA000844R0001 J 57-3
Specifications 57. Node Statistics Block
57-4 2VAA000844R0001 J
58. Time Delay (Analog) Explanation
58. Time Delay (Analog)
The time delay function code provides a pure delay on an analog signal. It can be used to create fixed or variable time
delays, or model systems that represent dynamic time delays.
Outputs
S1
D EL AY
S2 (5 8 )
R
S3
TS
N R Time delayed function of input
Specifications
S1 N 5 I Note 1 Block address of input (X)
S2 N 6 I Note 1 Block address of rate input (R, in units/sec)

0 = track
1 = release
S4 N 0.000 R Full Length of queue (L, in units)
S5 N 1 I 1 - 32767 Number of intervals (N)

Note 2
NOTES:
2. Excludes COMxx modules. The range for these modules is 1-255.
58.1 Explanation
S1 – <X>
Block address of the input.
S2 – <R>
Block address of rate input in units per second.
S3 – <T>
Block address of track switch signal.
0 = track input
1 = release
When <S3> = 0, it initializes all n elements of the memory to the input value:
Then M1 = M2 = ...Mn = <S1>, and elapsed time since the last sample = 0.
There is no time delay.
If <S3> = 1, then:
S4
Time Delay = -----------
S2 
Time Interval (TI) = Time Delay

------------------------------
S5
Elapsed Time = ET + t
2VAA000844R0001 J 58-1
Applications 58. Time Delay (Analog)
where:
ET Time since last sample in seconds
t Time since last algorithm execution in seconds
TI Internal input sample time in seconds
Mi Memory locations where input values are stored
during the time delay
If ET  TI:
Mi = Mi  1, for i = 0 to n
Mn = output value, and M1 = <S1>
Elapsed time = ET – TI
S4 – L
(Length of queue) Length of the queue in units. The queue is the number of units over which the time delay is effective.
S5 – N
(Number of intervals) Number of times, from one to 190, that the input is to be sampled. Determine N by dividing the time
delay (TD) by the desired sampling frequency.
58.2 Applications
58.2.1 Fixed Time Delay
For a fixed time delay, the rate input, <S2>, is constant. The time delay between output and input varies only with S4. It is
directly proportional to S4. For example, simulate the time delay for flow through a pipe. Assume a required time delay of
two minutes with input sampling desired every five seconds. Select the default value of 1.0 (found in fixed block six) for
<S2> since rate is constant for fixed delays.
<S2> = Rate in units per second = 1.0
S4 = Length of the queue in units
S5 = Number of intervals
Time = 2 minutes = 120 seconds
Delay
TD = 120 seconds
TD = -----------
S4
S2 
120 S4-
= ------
1.0
S4 = 120 units = Length of queue

For input sampling every five seconds:
TD
N = --------------
5 sec
120 sec
= --------------------
5 sec
= 24 intervals
Figure 58-1 is an illustration of this example.
T/N
IN P U T O U TPU T
0 1 2 3 N
L
T 01 65 1 A
Figure 58-1 Fixed Time Delay Example

58-2 2VAA000844R0001 J
58. Time Delay (Analog) Variable Time Delay
58.2.2 Variable Time Delay
Variable time delays may be dynamically adjusted by changing the value of <S2>. Using a function code 9 block, as
illustrated in Figure 58-2, the two fixed input rates can be switched. In the fixed time delay example, when <S2> equals 1.0,
the time delay, S4/<S2> equals 120 seconds. By changing <S2> to 2.0, the time delay becomes 60 seconds, and the timing
interval, TD/N equals 2.5 seconds. Changing the rate input <S2> while holding all other parameters constant changes the
timing interval. Faster rates produce more frequent input sampling, and slower rates produce less frequent input sampling
for the same number of intervals.
(2 )
A
15 0
S1 S1 D E LAY
S2 (13 ) S2 (58 )
T-IN T R
S3 16 0 S3 165
(2 ) TS
A
15 5
LO G IC S IG NA L
C ON T RO LL IN G
TR A CK S W ITC H
T 01 65 2 A
Figure 58-2 Variable Time Delay
58.2.3 System Modeling
The analog time delay block may be used to model a physical system that represents a dynamic time delay. For example,
an oil pipeline may have a measurement device at a different location than the indicator/controller. With this function code,
a measurement can be taken. This function code delays sending the value to the controller until the element of oil reaches
the controller. Specification 4 may be specified in feet, <S2> in feet per second, and N to establish the needed resolution.
If S4 = 100 feet and <S2> varies from ten feet per second to 20 feet per second, then TD will vary between ten seconds and
five seconds.
If sampling is required every 0.5 seconds to achieve the needed resolution, then:
N = longest time delay-

-----------------------------------------------
0.5 sec
10 sec
= ------------------
0.5 sec
= 20 intervals
The longest time delay can present a worst case scenario. No matter what the time delay, the input will be sampled 20 times
over that period to ensure adequate resolution.
For the shortest time delay, the sampling intervals will be:
5 sec
------------------------------ = 0.25 second
20 intervals
In most cases, the delay in a process consists of more than a pure time delay (deadtime). There is usually an additional
time lag that may be a first, second, or higher order lag. In general, the process responds to a second order lag response.
This can be simulated accurately by using a time delay and a first order lag. If necessary, another first order lag function
2VAA000844R0001 J 58-3
System Modeling 58. Time Delay (Analog)
block can be added. Figure 58-3 shows a graphic representation of a function and a simulated response. Figure 58-4
illustrates the configuration required to simulate the response shown in Figure 58-3.
IN P U T
O U T PU T
T YP IC AL
R E SPO N S E
F IR ST O R D ER
SIM U LAT E D R ES PO N S E
T IM E
T 01 65 4 A
Figure 58-3 First Order Simulated Response to Typical Time Delay
S1 D E L AY
S2 (5 8 ) S1
R (3 ) S1
S3 150 S2 F (t) (3 )
TS 155 S2 F (t) 160
T 0165 3 A
Figure 58-4 Response Simulation Configuration
58-4 2VAA000844R0001 J
59. Digital Transfer Applications
59. Digital Transfer

This function code selects one of two digital inputs, depending on a transfer switch signal. The state of the transfer switch
<S3> is determined externally, either by automatic control or by an operator.
Outputs
S1
S2 (5 9 )
T-D IG
S3 N Blk Type Description
N B Value of selected input
Specifications

0 = <S1>
1 = <S2>
NOTE:
59.1 Applications
Function code 59 can control equipment based on the status of other equipment or digital inputs. Figure 59-1 illustrates a
safety feature.
S2 = 0
S1 = 1
S1
INPUTS FROM S2
S1
4 PRIMARY S3 TO
PUMPS S2 (59)
S4 T-DIG RESERVE
(36) S3 165
S5 QOR 160 PUMP
S6
S7
S8
S9 = 3
S10 = 1
T01655A
Figure 59-1 Safety Configuration
The controlled reserve pump must activate if less than three of four primary pumps are functioning. The function code 59
block controls the status of the reserve pump.
<S1> = 1 (on), and <S2> = 0 (off)

The transfer switch is the output of a qualified OR block. If less than three pumps are operating, then the output of the
qualified OR block will be at zero. That output is the <S3> input to the digital transfer block. A zero input for <S3> causes
<S1> to be the output from the block. When <S1> equals one (on), the pump activates. When three or more of the pumps
are operational, the pump will be turned off.
2VAA000844R0001 J 59-1
Applications 59. Digital Transfer
59-2 2VAA000844R0001 J
61. Blink Applications
61. Blink
The blink function code generates a pulsating output signal. When <S1> and <S2> are logic 1, the output toggles between
logic 1 and logic 0. The duration of either the logic 0 or logic 1 state is dependent on the cycle time of the block. The
duration of either logic state is limited to be no less than 0.2 second. Output N equals <S1> until <S1> and <S2> equal one,
then output N blinks. Refer to Table 61-1 for all possible output values.
Outputs
S1
(6 1 )
S2 BL IN K
N
N B Refer to Table 61-1
Specifications

NOTE:
Table 61-1 Truth Table for Output Values
Inputs
Output N
S1 S2
0 0 0
0 1 0
1 0 1
1 1 Blink
61.1 Applications
Figure 61-1 shows how to use function code 61 for alarm indication. The source receives the alarm signal and sends the
signal to a blink block and a timer block. The timer block outputs a boolean signal. In this example, the timer is the timed out
option. If the length of the input pulse is greater than or equal to the timing interval (S3 of function code 35), a logic 1 will be
output for the length of the pulse once it has exceeded the timing interval. If the length of the pulse is shorter than the timing
interval, a logic 0 will be the output. The output of the timer block is the <S1> input for a memory block. An external alarm
acknowledgment signal is the <S2> input to the memory block. The acknowledge signal is logic 0 if the alarm has not been
acknowledged and logic 1 if it has.
If the point is in alarm, a logic 1 signal will be sent to both the blink and timer blocks. The duration of the logic 1 signal is
longer than the timing interval, so the output of the timer block is a logic 1. If the alarm has not been acknowledged, then the
S2 input to the memory block will be a logic 0. When <S1> equals logic 1 and <S2> equals logic 0, the output of the memory
block is a logic 1. Thus, both inputs to the blink block are logic 1 and the output will toggle between logic 1 and logic 0.
Once the alarm is acknowledged, the output of the memory block goes to logic 0, causing the output of the blink block to
track the <S1> input. When the point comes out of alarm, both inputs to the blink block will be logic 0, and the output will be
logic 0.
2VAA000844R0001 J 61-1
Applications 61. Blink
The OR (function code 39) forces the blink action to remain active and in alarm until the alarm is acknowledged whether or
not the alarm signal is still present. If the signal is still in alarm when acknowledged, the value remains alarmed but the
blinking action stops.
A L ARM S IG N A L :
1 = A LA R M
0 = N O R M AL S1
(3 9 )
S2 OR
170
S1
(6 1)
S2 BL IN K
1 75
S1 (3 5) S1 (3 4 )
T D-D IG 160
S
165
S2
R
S2 = 1
S 3 = 0 .2 5 0
S3
I
A C KN O W LE D G E S IG N A L : S4 = 0
1 = A C KN O W LE D G E
0 = U N A C K N OW L ED G E
T 01 656 A
Figure 61-1 Alarm Indication
61-2 2VAA000844R0001 J
62. Remote Control Memory Explanations
62. Remote Control Memory

The remote control memory (RCM) function code is a set/reset flip-flop memory accessible by a console, control station,
Batch 90 or computer via a network interface unit (NIU).
The output is determined from the inputs S, R and P as shown in Table 62-1 and Figure 62-1.
Table 62-1 RCM Input to Output Relationship
RCM (6 2 )
S R P Output N
S1
S
S2 N
S3
P
0 0 X Last
R
S4 O
S5 I
1 0 1 1
S6 F
S7 A 0 1 X 0
1 1 1 Override <S4>
NOTE:
S = Local set <S1>, or remote set (console or network
interface unit)
R = Local reset <S3>, or remote reset (console or network
interface unit)
P = Set permissive <S2>
X = Either logic 0 or logic 1 (does not care)
Specifications
S1 N 0 I Note 1 Block address of local set signal
S2 N 1 I Note 1 Block address of set permissive signal:

0 = no permissive
1 = permissive
S3 N 0 I Note 1 Block address of local reset signal
S4 N 0 I Note 1 Block address of override signal:

0 = reset override
1 = set override
S5 N 0 I Note 1 Block address of initialize signal:

0 = reset
1 = set
S6 N 0 I Note 1 Block address of feedback signal
S7 N 0 I Note 1 Block address of alarm signal
S8 N 0 I 0 - 255 Type parameter

NOTE:
62.1 Explanations
S1 – SET
Block address of the local set input.
2VAA000844R0001 J 62-1
Control Station Control 62. Remote Control Memory
S2 – PERM
Block address of the set permissive input. Specification <S2> must equal logic 1 for the remote control memory block to act
on any set, local or remote input.
S3 – RES
Block address of local reset input.
S4 – OVR
Block address of override input. If <S1>, <S2> and <S3> equal logic 1, the output tracks <S4>.
S5 – INIT
Block address of the input referenced upon power up or resetting of the module.
If <S5> = 0, N = 0
If <S5> = 1, N = 1
S6 – FB
Block address of the feedback signal. It is affected by the output of the RCM block and transmits a status signal to the
console or network interface unit. It can be feedback from an internal or external logic input.
S7 – ALRM
Block address of the alarm input. This transmits a status signal to the console or network interface unit. Logic 1 is an alarm
state.
S8 – TYPE
Switch type parameter. With S6 and S7, it defines the configuration of pushbutton displays shown on display screens.
0 = output indicator
1 = no indicator
2 = output and feedback indicators
3 = feedback indicator only
62.1.2 Control Station Control
The operator can initiate two types of pushbutton commands from a control station: pulse commands and sustained
commands. The commands are either pulse set and pulse reset, or sustain set and sustain reset. The type of
commands selected depends on the configuration of the control station.
There are two types of inputs to the block: logic set/reset inputs and the operator initiated remote set/reset inputs from the
console. Commands from a control station are logic commands because they enter the RCM block from other blocks in the
module. Commands from a console are not logic commands because they enter the RCM block directly from the console.
Logic inputs from control stations or configuration override operator initiated inputs from a console. The module acts on the
remote (from operator interface station, etc.) and logic (<S1>, <S3>) commands as shown by the equivalent circuit in Figure
62-2 2VAA000844R0001 J
62. Remote Control Memory Applications
62-1, and outputs the proper value. Logic commands always override remote commands, and sustain commands override
pulse commands.
PERMISSIVE (S2)
A
LOGIC SET (S1) N S
OR D
TD-DIG
R
KEYBOARD PULSE
OR BATCH 90
RESET
LOGIC RESET (S3)
A
OR
TD-DIG N
D
PULSE
A
N NOT
D
RESET
SET
A
N NOT
OVERRIDE (S4)
D
INITIALIZE (S5)
OUTPUT ON MODULE INITIALIZATION
NOT FEEDBACK (S6)
ALARM (S7) TO DISPLAY ON OIU
T01658B
Figure 62-1 Internal Logic of RCM Block
Pulse Set
Causes the internal set signal to go to logic 1 for one cycle, provided there is no contradictory logic or sustain command
issued.
Pulse Reset
Causes the internal reset signal to go to logic 1 for one cycle, provided there is no contradictory logic or sustain command
issued.
Sustain Set
Causes the internal set signal to go to logic 1 and remain there as long as the sustain set is in effect or until a contradictory
logic command is issued.
Sustain Reset
Causes the internal reset signal to go to logic 1 and remain there as long as the sustain reset is in effect or until a
contradictory logic command is issued.
Red Tag
Commands flag controls that are under maintenance. A red tag, remove red tag, or get red tag status can be requested. All
red tag commands have a 16 bit non-zero key as an identifier. The module maintains up to three keys for every pushbutton
block, allowing the establishment of up to three red tags. The red tag functions act only as labels, and do not interfere with
module operations. The red tag function does not provide positive lock-out of equipment operation. The red tag function
only inhibits control at the console when it inhibits operator commands.
62.2 Applications
Figure 62-2 illustrates the module logic and circuits required to control a motor with a function code 62 block. When a start
signal is received (either logic or remote), the circuit is completed, energizing the motor start relay and closing the normally
2VAA000844R0001 J 62-3
Applications 62. Remote Control Memory
open seal switch. When the start signal returns to logic 0 after one cycle, the closed switch completes the circuit keeping the
motor turned on until a stop signal breaks the circuit.
S TA RT
(R E M O T E)
S TA RT
STOP STOP (L O G IC ) M O TO R STA R T
(R E M O T E ) (L O G IC ) R E LAY
M O TO R STAR T SE A L C O N TAC T
(C O N TA C T C LO S E S W H E N M O TO R S TA R T S)
P ER M IS S IVE
A
S TA R T N S
REM OTE
T D -D IG D
OR
R
P U L SE
S TA RT
LO G IC
STOP
T D -D IG A
R E M O TE OR
N
D
P U L SE
STOP
LOGIC A
N NOT
D
A
N NO T
O V E R R ID E
D
NOT
T 01 65 9A
Figure 62-2 Logic and Circuitry of RCM Block Used for Motor Control
62-4 2VAA000844R0001 J
63. Analog Input List (Periodic Sample)
63. Analog Input List (Periodic Sample)

In the BRC controller, the analog input list (periodic sample) function code acquires the data values of eight analog points in
a single Controlway/module bus message. The source module and destination module must be located in the same
process control unit. Input data consists of analog signals and qualities. Data transfer between the source module and
destination module is via the module bus. The address and block number of the source module and the update time are
configurable parameters.
The HAC controller uses function code 63 to acquire the data values of eight analog points in a single peer-to-peer network
message. Input data consists of analog signals and qualities. Data transfer between the source module and destination
module is via the peer-to-peer network. The address and block number of the source node and the update time are
configurable parameters.
Output data consists of real numbers corresponding to the analog data received, and point quality indicators. To ensure that
the signal is successfully transferred, the analog signal generates a point quality flag. To test the quality of the signal,
include a function code 31 in the configuration. The quality of the point cannot be used as an input to any other type of
block. The analog output value can be used as an input to any analog processing block. Refer to Appendix J, for a
FC63 inputs may be configured in the same controller having the same source block address
Outputs
A IL/B
(63)
N+ 1 N R <S3>
N+ 2 N+1 R <S4>
N+ 3 N+2 R <S5>
N+ 4 N+3 R <S6>
N+ 5 N+4 R <S7>
N+ 6 N+5 R <S8>
N+ 7 N+6 R <S9>
N+7 R <S10>
Specifications
S1 N 1.0 R Full Sample period (in seconds)
S2 N 0 I Note 1 Source node/module address
S3 N Note 2 I Note 3 Source block address (N)
S4 N Note 2 I Note 3 Source block address (N+1)
2VAA000844R0001 J 63-1
Explanation 63. Analog Input List (Periodic Sample)

NOTES:
1-250 for the HAC
2. Default values are:
9,999 for the BRC-100, IMMFP11/12
2 for the HAC
4. Outputs are updated each segment scan, which also update the internal XR values which are sent out
based on the MIN/MAX/Alarm/SigChange.
63.1 Explanation
S1 – MBUPD
(Sample period) Defines the update rate for the Controlway/module bus or peer-to-peer network message inputs. Sample
period is specified in seconds. Specification S1 is tunable. The system allows tuning the value shown for the sample period,
however, the original sample period will be retained. To change it the module must be placed in configure mode.
S2 – SMAD
(Source node/module address) In the BRC-100 controller, the address of the node/module containing the eight values
desired. The address of the source module must be between zero and 31 inclusive.
In the HAC controller, S2 is the Cnet address of the HAC controller node that this function code is sampling data from via
the peer-to-peer network. This node address must be between 1-250.
S3
Block address for output block N.
S4
Block address for output block N+1.
S5
S6
S7
S8
S9
S10
63-2 2VAA000844R0001 J
64. Digital Input List (Periodic Sample)
64. Digital Input List (Periodic Sample)

The digital input list (periodic sample) function code acquires data describing eight digital points in a single message. The
source module and destination module must be located in the same process control unit. Input data consists of digital
signals and qualities. Data transfer between the source and destination module is via the Controlway/module bus. The
address and block number of the source module, and the update time are configurable parameters.
The HAC controller uses function code 64 to acquire the data values of eight digital points in a single peer-to-peer network
message. Input data consists of analog signals and quantities. Data transfer between the source module and destination
module is via the peer-to-peer network. The address block number of the source node and the sample time are configurable
parameters.
Output data consists of boolean numbers corresponding to the digital data received and input point quality indicators. To
ensure that the signal is successfully transferred, the digital signal generates a point quality flag. To test the quality of the
signal, include a function code 31 in the configuration. The quality of the point cannot be used as an input to any other type
of block. The digital output value can be used as an input to any digital processing block. Refer to Appendix J, for a
FC64 inputs may be configured in the same controller having the same source block address
Outputs
D IL/B Blk Type Description

(64)
N
N B <S3>
N+1
N+1 B <S4>
N+2
N+2 B <S5>
N+3
N+3 B <S6>
N+4
N+4 B <S7>
N+5
N+5 B <S8>
N+6
N+6 B <S9>
N+7
N+7 B <S10>
Specifications
S1 N 1.0 R Full Sample period (in seconds)
S2 N 0 I Note 1 Source node/module address
S3 N Note 2 I Note 3 Source block address (N)
2VAA000844R0001 J 64-1
Explanation 64. Digital Input List (Periodic Sample)
Specifications

NOTES:
1-250 for the HAC
2. The default values are: 9,999 for the BRC-100, IMMFP11/12
2 for the HAC
9,998 for the BRC-100/200/300, and IMMFP11/12
4. Outputs are updated each segment scan, which also update the internal XR values which are sent out
64.1 Explanation
S1 – MBUPD
(Sample period) Defines the update rate for the Controlway/module bus or peer-to-peer network message inputs. The
sample period is specified in seconds. The system allows tuning of the value shown for the sample period. However, the
original sample period will be retained. To change it, the module must be placed in configure mode.
S2 – SMAD
(Source node/module address) In the BRC-100 controller, the address of the module in the same PCU containing eight
values desired. The address of the source module must be between zero and 31.
In the HAC controller, S2 is the Cnet node address of the HACO1 controller node that this function code is sampling data
from via the peer-to-peer network. This node address must be between one and 250.
S3
S4
S5
S6
S7
S8
S9
S10
64-2 2VAA000844R0001 J
65. Digital Sum With Gain Applications
65. Digital Sum With Gain

This function code computes a weighted sum of four boolean inputs using the following equation:
Output  S5<S1>  S6<S2>  S7<S3>  S8<S4>

It can be used to initiate a control action based on the number of boolean inputs that have a status of logic 1. These inputs
could represent the status of pumps, valves, motors, etc.
S1 Outputs
S2
(65)
S3 D SU M
N
N R S5<S1> + S6<S2> + S7<S3> + S8<S4>
Specifications
S1 N 0 I Note 1 Block address of <S1>
S5 Y 1.000 R Full Gain parameter for <S1>

NOTE:
65.1 Applications
Figure 65-1 shows how to use function code 65 to determine flow rates from a digital indication of pump status. In the
example, each operating pump provides a constant flow rate of 20 gallons per minute. An operating pump provides an
output of logic 1. Specifications <S1> through <S4> provide the pump status inputs while S5 through S8 are pump flow
rates. When pumps one, three and four are operating, the output is as follows.
Output  S5 <S1>  S6 <S2>  S7 <S3>  S8 <S4>
 20 gal (1) 20 gal (0) 20 gal (1) 20 gal (1)

------------------------- + ------------------------- + ------------------------- + -------------------------
min min min min
60 gal
 ----------------
min
Function code 65 can also be used for binary to real conversion. Binary to real conversion changes digital signals to analog
signals (i.e., counters). Specifications <S1> through <S4> provide the binary inputs. Specifications S5 through S8 weight
the inputs to achieve the desired real output. For example:
<S1> and <S4> = logic 1

<S2> and <S3> = logic 0
S5 = 1.0
S6 = 2.0
2VAA000844R0001 J 65-1
Applications 65. Digital Sum With Gain
S7 = 4.0
S8 = 8.0
Output= S5 <S1> + S6 <S2> + S7 <S3> + S8 <S4>
= 1.0(1) + 2.0(0) + 4.0(0) + 8.0(1)
= 9.0
D IL/B
(64 ) S1
150 TO O T HE R
S2
(65 ) A NAL O G
S3 DSUM P RO CE S SIN G
160
S4 M OD U LE S
151
S 5 = 20
S 6 = 20
152 S 7 = 20
28 = 20
153
154
155
156
157
T01 66 0A
Figure 65-1 Determine Flow Rates From a Digital Indication of Pump Status
65-2 2VAA000844R0001 J
66. Analog Trend Explanations
66. Analog Trend

The analog trend function code is part of the Symphony distributed trending package. It performs initial data compression
for operator consoles and open access systems at the module level.
Trend data can be gathered in two ways, normal or fast, depending on the desired resolution. Specification S3 selects the
trend resolution. Normal trending mode gathers trend data every 60 seconds. Fast trending is every 15 seconds.
Specification S2 selects the trend mode. Over the collection period each value collected is the sample, mean, minimum,
maximum or sum of the input value <S1>.
Output data consists of the last value saved.
Outputs
S1 (6 6 )
T R EN D N
N R Last value saved
Specifications
S1 N 5 I Note 1 Block address of analog input
S2 N 1 I 0-4 Trend mode:

0 = sample
1 = mean
2 = minimum
3 = maximum
4 = sum
S3 N 0 I 0 or 1 Trend resolution2:
0 = normal
1 = fast
NOTES:
2. Fast trending requires a higher amount of module utilization than normal trending. Specification S3
cannot be changed during the on-line configuration mode.
66.1 Explanations
S1 – BLKADR
Block address of the analog input to be trended.
S2
(Trend mode) Sets the trend mode during the collection period (S3). Each value collected is the sample, mean, minimum,
maximum, or sum for the point.
0 = sample; current point saved every 15 or 60 seconds

1 = mean; arithmetic mean value of all points over the trending interval
2 = minimum; minimum point value over trending interval
3 = maximum; maximum point value over trending interval
4 = sum; sum of all values collected over trending interval
S3
(Trend resolution) Sets the trend interval.
2VAA000844R0001 J 66-1
Applications 66. Analog Trend
0 = normal; every 60 seconds

1 = fast; every 15 seconds
NOTE: Fast trending requires a higher amount of module utilization than normal trending.
66.2 Applications
To trend values, configure both an analog exception report and a trend block for each point trended. Figure 66-1 shows a
sample analog trending configuration. Figure 66-2 shows a sample digital trending configuration. The block outputs go to
the communication highway and have assigned tag names in the operator interface station. Both outputs must be
configured for each point for display purposes.
To create a trend database and a tag database, refer to the human system interface configuration instruction. These
instructions have sections titled Trends and Tag Database that will provide the necessary instructions to create the trend
and tag databases.
PV S1 (3 0) HS I: TAG N AM E
A O/L
N
CO M M U N ICATIO N
HIGH W AY TO H S I
A N D OT H ER NO D ES
S1 (6 6) HS I: TAG N AM E
T R EN D
N
T 02 0 33 A
Figure 66-1 Configuration for Trending an Analog Point
0.0
5
S1
(9 ) (6 6 ) H S I: TA G N A M E C O M M U N IC AT IO N
S2 S1
1.0 T T R EN D H IG H W AY T O H S I
6 S3 N N A N D OT H ER N O D E S
H S I: TAG N A M E
S1
RCM (6 2 )
S
S2 N
P
S3 R
S4 O
S5 I
S6 F
S7 A
T 02 0 34 A
Figure 66-2 Configuration for Trending a Digital Point
66-2 2VAA000844R0001 J
67. Digital Exception Report with Alarm Deadband Explanation
67. Digital Exception Report with Alarm Deadband

The digital exception report function code exception reports <S1>. Specification S2 defines the alarm state. Specification S3
defines the alarm deadband time in seconds. After the alarm state is set, the <S1> value must exit the defined alarm state
for the time period specified by S3 for the alarm state to be cleared. The S3 timer restarts on each entry into the alarm state.
Exception reports are activated by a report enable signal from the module bus. The maximum number of exception reports
allowed depends on the controller configuration.
Use function code 69 to test the alarm associated with the digital exception report with alarm deadband function block.
Outputs

S1 (67)
DOLDB N
N B Value of exception report
Specifications
S2 N 2 I 0-2 Alarm state:

2 = no alarm state defined
S3 Y 0.000 R Full Alarm deadband time period in seconds
S4 Y 0.000 R Full Spare

NOTE:
9,998 for the SPC700 and BRC-300
31,998 for the HC800, BRC-400/410 and HPG800
67.1 Explanation
An exception report returns to the module bus following a report poll message if a report enable message has been
received for the block number. To import this data to another PCU requires programming a digital input/loop block (function
code 42) or digital input/Cnet (function code 122) in another node referencing the output of the function code 67 block. To
import this data to a console the point must be added to the tag list.
An exception report occurs when:
1. <S1> = <S1>L and tr > tmin and S2 = 2
where:
<S1>L = Last reported value of input.
tmin = Minimum report time for the block as
specified by the executive block or the
segment control block.
or
1. tr > tmax and S2 = 2

where:
tmax = Maximum report time for the block as specified
block.
2VAA000844R0001 J 67-1
Examples 67. Digital Exception Report with Alarm Deadband
2. <S1>  S2, current status  normal, and S2  2 and S3 0.000
If S3 is not 0.000, then the alarm deadband time holds the alarm state active. <S1> must exit the alarm state specified by S2 for the
time specified in S3 for the alarm state to be cleared. The S3 timer restarts on each entry into the alarm state.
where:
S2 = Alarm state:
2 = no alarm
67.2 Examples
Figure 67-1 illustrates an example configuration for a digital exception report function code
Figure 67-1 Example Digital Exception Report With Alarm Deadband Configuration
67-2 2VAA000844R0001 J
68. Remote Manual Set Constant (REMSET) Explanation
68. Remote Manual Set Constant (REMSET)

The remote manual set constant (RMSC) function code allows the value of a constant to be entered to the control scheme
via a console (i.e., operator interface station) or other device such as the plant computer via a network interface unit.
When the function block receives this command, an exception report is generated to notify the operator or computer that the
value has changed. An exception report is also sent on the loop at the maximum exception report time; or if in the track
mode, the value of S6 exceeds the significant change parameter of the segment or module, whichever applies.
High and low limits may be set to guard against unreasonable values. Specifications S2 and S3 select the high and low
limits and also set the span for significant change. Specification S4 specifies the output value of the controller in normal
mode
(S5 = 0) on initial startup. The S4 value is updated via a console and is output from the block after a mode change to
execute or a reset of the module.
Specifications <S5> and <S6> are the block addresses of the track switch and track reference values. The RMSC block can
be forced to output the value from <S6> when the track switch <S5> goes to one. An exception report is generated each
time the track switch activates or deactivates.
Outputs
S5
(6 8 )
S6 R EM SE T
N R Last value entered for S4 when <S5> = 0, or value of <S6>

when <S5> = 1
Specifications
S1 N 0 I Full Engineering unit identifier
S2 N 100.000 R Full High limit
S3 N 0.000 R Full Low limit
S4 N 0.000 R Full Initial output value after addition, modification,

power up of block
S5 N 0 I Note 1 Block address of track switch:

0 = normal
1 = track
S6 N 5 I Note 1 Block address of track value

NOTE:
68.1 Explanation
Figure 68-1 shows an example of a configuration to enable operator intervention in case of temperature transmitter failure.
The test quality block (function code 31) outputs a zero as long as the transmitter input is good. The NOT block (function
code 33) inverts this to a one and the REMSET output tracks the transmitter until the transmitter fails. At that time, the
REMSET is released to the operator.
S1
S2 (3 1 ) (3 3 )
S1 S5
S3 T S TQ N NOT (6 8 )
N S6 REMSE T
S4 N
P R OC E SS S1 = 3 OR 4
T E M P E R AT U R E S2 = 20 0 .0
S3 = 0.0
S4 = 0.0 0 0
T 01 6 6 3 A
Figure 68-1 Configuration for Operator Intervention
2VAA000844R0001 J 68-1
Explanation 68. Remote Manual Set Constant (REMSET)
68-2 2VAA000844R0001 J
69. Test Alarm
69. Test Alarm

The test alarm function code tests the alarm status of a designated input signal. It can test the alarm state on any block
output that has a defined quality or alarm, including exception reports, station blocks, and device drivers.
There are two separate boolean outputs. Table 69-1 shows the different output descriptions for the types of blocks
monitored. Note that for control stations, S2 selects the type of alarm monitored (absolute or deviation). Alarm status is zero
equals no alarm, one equals alarm.
Outputs
T STA LM
(6 9 )
H
L
N+1
N B High alarm indicator:

0 = no alarm
1 = alarm
N+1 B Low alarm indicator:

0 = no alarm
1 = alarm
Specifications
S1 N 0 I Note 1 Block number to be tested for alarms
S2 N 0 I 0-2 Alarm condition tested for:

0 = absolute alarms
1 = deviation alarms (stations only)
2 = device drivers
NOTE:
Table 69-1 Outputs from Test Alarm Block
Outputs
Input Type
N N+1
Boolean Alarm 0
Real High alarm Low alarm
FC 80 High alarm Low alarm

(type selected with S2) (type selected with S2)
FC 123, 129 Alarm Mode:

0 = manual
1 = auto/remote
2VAA000844R0001 J 69-1
69. Test Alarm
69-2 2VAA000844R0001 J
79. Control Interface Slave
79. Control Interface Slave

Use the control interface slave function code to interface a Harmony controller to a control I/O module. Control I/O modules
have four analog inputs, two analog outputs, three digital inputs, and four digital outputs. This function code defines the
characteristics of that I/O module and how the system responds to an I/O module failure.
Outputs
(7 9 )
C IS I/O Blk Type Description
N
N+1 N R Analog input 1
N+2
N+3 N+1 R Analog input 2
N+4
S10
N+2 R Analog input 3
N+5
S11
N+3 R Analog input 4
N+6
N+7 N+4 R Analog output 1 feedback
N+8
S15
N+5 R Analog output 2 feedback
S16
S17
S18
N+6 B Digital input 1
N+9 N+7 B Digital input 2
N+8 B Digital input 3
N+9 B I/O module status flag: 0 = good, 1 = bad
The control system must be carefully evaluated to establish

default values that will prevent personal injury and/or property
damage in case of module failure.
WARNING
Specifications
S1 N 0 I 0 - 63 Control interface I/O module address
S2 N 0.000 R Full Analog input 1 zero in engineering units
S3 N 0.000 R Full Analog input 1 span in engineering units
S10 N 2 I 0 - 2046 Block address of analog output 1
S11 N 2 I 0 - 2046 Block address of analog output 2
S12 N 2 I 0-2 Digital input 1 logic sense
S15 N 2 I 0 - 2046 Block address of digital output 1
2VAA000844R0001 J 79-1
Explanation 79. Control Interface Slave
S19 N 0 I 0, 1, 100, Failure action (lack of I/O module response or bad

or 101 analog input reference voltage):
XX0 = trip module
XX1 = continue to operate
I/O module status flag (bad status indication):
0XX = set I/O module status flag output N+9 to
bad when the CIS module fails or is in
error mode
1XX = set I/O module status flag output N+9 to
bad when the I/O module fails or there is
a bad quality on one of the module's I/O
points
79.1 Explanation
79.1.1 Outputs
This block provides analog and digital I/O on the same board. The final output is an I/O module status flag, which shows the
status of the control I/O module.
0 = good
1 = bad
Analog output feedbacks (N+4 and N+5) provide feedback to M/A stations (function code 80) that have hardware stations
with bypass capabilities. This feedback signal provides an alignment reference for the software logic, before establishing
control of the process when exiting from bypass or configure mode (bumpless transfer).
NOTE: If S19 equals zero, and if there is a bad or unwired input, then the control module is tripped.
S1 – IOSLV
(Control I/O module address) I/O module address set by the address dipswitch on the I/O module. Available addresses
are zero through 63.
S2 to S9
(AIZn and AISPn) Set the zero and span values for four analog inputs. If an analog value goes below the zero value or
exceeds the span by more than five percent, it will produce a bad quality output. A specified span other than zero (default)
for an unused analog input produces a bad quality signal for that input.
S10 – AO1
Block address of input for analog output one.
S11 – AO2
Block address of input for analog output two.
S12 to S14 - DIn

Set the logic sense for three digital inputs. Digital inputs can be defined for direct or reverse acting logic operations. These
are defined as follows:
0 = reverse acting (logic 0 = closed, logic 1 = open)

1 = direct acting (logic 0 = open, logic 1 = closed)
2 = unused input
79-2 2VAA000844R0001 J
79. Control Interface Slave Specifications
S15 to S18 - DOn

Block addresses of the inputs for the four digital outputs.
S19 – FAIL
Value defines the module response in case of control I/O module failure. Lack of I/O module response or a bad analog input
reference voltage will cause a transfer to error mode.
Specification S19 also determines which failure conditions cause the I/O module status flag output N+9 to go to logic 1
(bad).
X X X
Failure Action
0 = trip control module
1 = continue operation
Reserved for Future Use
I/O Module Status Flag
0 = selects the I/O module status flag output N+9 to equal logic 1
(bad quality) when the I/O module is failed or in error mode.
1 = selects the I/O module status flag output N+9 to equal logic 1
(bad quality) when the control I/O module is in error mode
or a defined I/O point (AI, AO, DI or DO) is bad quality.
2VAA000844R0001 J 79-3
Specifications 79. Control Interface Slave
79-4 2VAA000844R0001 J
80. Control Station
80. Control Station

There are three types of stations, each controllable through a digital (NDCS03) or analog (IISAC01) control station and/or a
human system interface (HSI). The types include basic, cascade and ratio stations.
A basic station generates a set point (SP) and provides manual/automatic transfers, control output adjustments in manual
control mode, and set point adjustments in automatic control mode.
A cascade station provides the same functions as a basic station plus an additional mode that allows the set point to be
controlled by external input signal <S2>.
A ratio station provides the same functions as a basic station, but differs from the cascade station in its method of set point
generation while in the ratio mode. The wild variable <S2> multiplied by a ratio adjustment factor (ratio index) determines
the set point output while in ratio mode. The initial ratio index value is calculated by the station to maintain the current set
point output value when the station is placed into the ratio mode. While in the ratio mode, the ratio index value is displayed
in place of the set point value and can be adjusted (ramped up or down) by the operator to obtain the desired set point
output.
Station control allows changing the mode, set point, ratio index and control output of a control station by manipulating a
control station element.
The control output (CO) value during startup is configurable. If S16 defines a DCS station (S16 equals zero through seven)
or SAC station (S16 equals zero through 63), then the control output during startup tracks the displayed control output on
the DCS station or SAC station. If a communication failure exists for the station (or S16 equals 255), then the control output
tracks the CO track signal <S4> during startup.
NOTE: Valid station addresses are zero through 63 and 100 through 163 for Harmony controllers at 40 kilobaud.
The associated analog output (AO) <S28> generates auto-bypass when the AO has bad quality and communicates this
state to the control interface module analog output.
NOTES:
1. The maximum ratio for the wild variable is ten when using a DCS station and 100 when using a SAC station. The minimum
practical ratio is 0.05.
2. The local SAC/DCS link communication baud rate is set by the hundreds digit S3 of the extended executive block (function
code 90, block 20) for Harmony controllers. The remote SAC link located on CIO-100 Harmony I/O blocks is not affected by the S3
specification setting.
Outputs

M /A
M F C /P
S1 (8 0 ) N R Control output (0% to 100%)
PV SP
S2 N+1
S3
SP O
N N+1 R Set point
A A
S4 N+2
TR C /R
S5
TS C
N+4 N+2 B Automatic mode flag:
N+3
S18
MI C -F
N+5
0 = manual
S19
S20
AX 1 = automatic
C /R
S21
S22
LX
N+3 B Level flag:
CX
S24
HAA 0 = local
S25
L AA 1 = computer
S26
H DA
S27
S28
L DA N+4 B Cascade/ratio mode flag:
S29
AO
0 = basic
TRS2
S30
TRPV T 1 = cascade/ratio
N+5 B Computer status flag:

0 = computer OK
1 = computer failed
2VAA000844R0001 J 80-1
80. Control Station
Specifications
S1 N 5 I Note 1 Block address of input to be displayed on the PV

scale of a station (can be used for SP track S30)
S2 N 5 I Note 1 Block address of SP track signal (S29 SP track

switch)
S3 N 5 I Note 1 Block address of auto signal
S4 N 5 I Note 1 Block address of control output track signal (TR)
S5 N 0 I Note 1 Block address of control output track switch (TS):

0 = no track
1 = track
S6 N 5 I 1, 2, 3, Initial mode of station after startup:

5, 6, 7 1 = computer, manual
or 8 2 = computer, auto
3 = computer, cascade/ratio
5 = local, manual
6 = local, auto
7 = local, cascade/ratio
8 = previous mode
S7 Y2 9.2 E 18 R Full PV high alarm point in engineering units
S8 Y2 -9.2 E 18 R Full PV low alarm point in engineering units
S9 Y2 9.2 E 18 R Full PV-SP deviation alarm point in engineering units

(for console only)
S10 N 100.000 R Full Signal span of PV in engineering units
S11 N 0.000 R Full Zero value of PV in engineering units
S12 N 0 I Full PV engineering units identifier (for console only)
S13 N -5.000 R Full Signal span of SP in engineering units
S14 N 0.000 R Full Zero value of SP in engineering units
S15 N 0 I Full SP engineering units identifier (for OIS console only)
S16 N 255 I Full Control station address:

0 - 7 = DCS station
0 - 63 = SAC station
254 = passive station
255 = no station
S17 N 0 I 0-7 Mode of system default if the computer fails while

the loop is under computer control:
0 = computer (auto/manual mode unchanged)
1 = computer, manual
2 = computer, auto
3 = computer, cascade/ratio
4 = local (auto/manual mode unchanged)
5 = local, manual
6 = local, auto
7 = local, cascade/ratio
S18 N 0 I Note 1 Block address of the transfer to manual signal:

0 = no transfer
1 = transfer to manual and hold
80-2 2VAA000844R0001 J
80. Control Station
S19 N 0 I Note 1 Block address of the transfer to auto signal:

0 = no transfer
1 = transfer to auto and hold
S20 N 0 I Note 1 Block address of the transfer to cascade/ratio signal:

0 = no transfer
1 = transfer to cascade/ratio and hold
S21 N 0 I Note 1 Block address of the transfer to local signal:

0 = no transfer
1 = transfer to local and hold
S22 N 0 I Note 1 Block address of the transfer to computer signal:

0 = no transfer
1 = transfer to computer and hold
S23 N 0 I 0-4 Station type:

0 = basic with set point
1 = basic without set point
2 = basic with bias
3 = ratio
4 = cascade
S24 N 0 I Note 1 Block address of external high absolute alarm flag:

0 = no alarm
1 = high absolute alarm
S25 N 0 I Note 1 Block address of external low absolute alarm flag:

0 = no alarm
1 = low absolute alarm
S26 N 0 I Note 1 Block address of external high deviation alarm flag:

0 = no alarm
1 = high deviation alarm
S27 N 0 I Note 1 Block address of external low deviation alarm flag:

0 = no alarm
1 = low deviation alarm
S28 N 2 I Note 1 Block address of analog output associated with this

station
S29 N 0 I Note 1 Block address of switch to have SP track <S2>:

0 = no track
1 = track <S2>
S30 N 0 I Note 1 Block address of switch to have SP track <S1> (PV):

0 = no track
1 = track <S1>
S31 N 60.000 R Full Computer watchdog time period (in secs)

NOTES:
2. Specification is tunable, but not adaptable.
2VAA000844R0001 J 80-3
Explanation 80. Control Station
80.1 Explanation
80.1.1 Outputs
N
Control output expressed in percent. The station mode and the control output auto <S3> input determine the control output.
N+1
Set point expressed in engineering units. The input to <S2> and the station mode determine the set point output.
N+2
Mode indicator.
0 = manual
1 = automatic
N+3
Level indicator.
0 = local
1 = computer
N+4
Station mode indicator.
0 = basic
1 = cascade/ratio
N+5
Computer status flag.
0 = computer OK
1 = computer failed, station mode dependent on S17
S1 – PV
Block address of the input to be displayed on the PV scale of a station (can be used for SP track S30). This input drives the
control station process variable indicator (in engineering units).
S2 – SPT
Set point track signal. For stations in basic mode, S2 is an external set point track signal. For stations in the cascade mode,
<S2> is the cascade input. For stations in ratio mode, <S2> is the uncontrolled or wild variable. Table 80-1 shows the track
behavior of the station block.
NOTE: For stations in ratio mode, the wild variable must be limited to positive numbers, and the set point range must be a positive
number. Low limits on either signal must not be less than zero.
Table 80-1 Track Behavior of the Station Block
Station Mode Manual Auto Cascade Ratio
Basic A A — —
Cascade A A B —
Ratio A A — C
NOTE:
A = When the station tracks and what it tracks depends on <S29> and <S30>. Specification S29
indicates when <S2> should be tracked, and <S30> indicates when <S1> should be tracked. If
both indicate tracking, <S29> takes precedence.
B = Specification S2 is tracked unconditionally and the station displays <S2>.
C = Specification S2 multiplied by the ratio index (displayed in digital set point display), is tracked
unconditionally and the product of <S2> and the ratio index displays on the station bar graph.
80-4 2VAA000844R0001 J
80. Control Station Specifications
S3 – CO AUTO
Block number whose output value is the control output when the station is in automatic mode (usually the output of a PID
block).
S4 – CO TRACK
Block number whose output is the control output when the station is tracking (<S5> equals one). Specification S4 also
provides a reference for the station control output when the module completes its startup mode, if an active hard station is
not present.
S5 – CO SWITCH
Block number whose output value determines whether the control output is to track <S4>.
0 = no tracking
1 = track
NOTE: Both the MAN and AUTO lights on the digital control station (NDCS01) light when the module is in the control output over-
ride mode (tracking). For the NDCS03 station, just the track light is displayed. The manual/auto status flag does not change when
in override state. The actual operating state is saved and will be restored when the track flag goes to zero (normal). This note is
not applicable to the analog control station (IISAC01).
S6 – SMODE
Initial mode of the station after startup. For the configurable startup period after power up/reset/switch to execute mode, the
station will be in local manual mode. After the startup period expires, the mode is as indicated by S6 unless overridden by
<S18> to <S22>. Specifications <S18> through <S22> change the station mode and control level through logic. Any of
these specifications override S6. When adding a station block with S6 set to previous mode (eight), the actual mode will be
local manual until modified by the operator or logic. When selecting computer or local cascade ratio, cascade or ratio
control will be implemented depending on S23 (station type).
1 = computer manual
2 = computer auto
3 = computer cascade/ratio
5 = local manual
6 = local auto
7 = local cascade/ratio
8 = previous mode
S7 – PVH
Sets the engineering units value of the process variable that a high alarm generates and displays on the Human System
Interface (HSI).
S8 – PVL
Sets the engineering units value of the process variable that a low alarm generates and displays on the control station or
HSI.
S9 – PVDEV
Engineering units value of allowed deviation between the process variable and set point. A high deviation alarm generates
when the process variable is greater than the set point and the value of the difference between the two is greater than or
equal to S9. A low deviation alarm generates when the process variable is less than the set point and the value of the
difference between the two is greater than or equal to S9. These alarm conditions report to the HSI.
S10 – PVSPAN
Sets the signal span of the process variable in engineering units.
S11 – PVZERO
Zero value of the process variable in engineering units.
S12 – PVEU
Process variable engineering units identifier, used by the HSI.
S13 – SPSPAN
Sets the signal span of set point in engineering units. When left at default, set point span equals span defined by S10. The
default setting for S13 is -5.000. It should be noted that HSIs will display the PV span (S10) for the set point span (S13). The
2VAA000844R0001 J 80-5
Specifications 80. Control Station
Harmony controllers use the PVSPAN (S10) and PVEU (S12) for both the process variable and set point as long as the set
point span is set to the default value.
NOTE: Some DCS stations will not function correctly using the -5.000 default value. If a problem exists, set S13 and S14 the same
as S10 and S11.
S14 – SPZERO
Zero value of set point in engineering units.
S15 – SPEU
Set point engineering units identifier, used by the HSI.
S16 – DCSADR
Set S16 to the control station address (254 equals passive station and 255 equals no station). Valid station addresses are
zero through seven and 100 through 107 for DCS stations, and zero through 63 and 100 through 163 for SAC stations.
Addresses 100 through 163 represent actual station addresses of zero to 63. If selecting addresses 100 through 163, the
Harmony controllers will not report the status of the control station in the module status or module problem reports. In all
other respects, station operation remains unchanged. This specification must be set to 254 when a passive station interface
(function code 139) S1 points to this function code.
NOTE: Valid station addresses are zero through 63 and 100 through 163 for the Harmony I/O CIO-100 and for Harmony control-
lers at 40 kilobaud.
S17 – CFAIL
Defines the mode the station will default to in the event of a computer failure while it is under computer control. When
selecting computer or local cascade/ratio, the station assumes cascade or ratio control depending on S23.
0 = computer manual/auto mode unchanged

1 = computer manual
2 = computer auto
3 = computer cascade/ratio
4 = local manual/auto mode unchanged
5 = local manual
6 = local auto
7 = local cascade/ratio
S18 through S22

Block addresses that change the station mode and control level through logic. If more than one (<S18> through <S22>) are
set, <S18> takes precedence over <S19>, which takes precedence over <S20>, etc. If the station is in manual mode,
<S20> places the station in automatic and cascade/ratio mode simultaneously. When both <S21> and <S22> are set,
<S21> overrides <S22>.
NOTE: When one or more inputs to <S18> through <S22> equal one, the station displays the interlock state. The station is locked
in a particular mode. The output cannot be changed by the operator unless S18 equals one. Inputs <S18> through <S22> are typ-
ically driven by fault logic that places the control loop in a known condition when a failure is detected. Removing an interlock state
leaves the current mode unchanged, but allows the operator to change the mode.
S18 – MANXFR
Block address of the transfer to manual signal.
0 = no transfer
1 = transfer to manual
S19 – AUTOXFR
Block address of the transfer to auto signal.
0 = no transfer
1 = transfer to auto
S20 – CSRXFR
Block address of the transfer to cascade/ratio signal. This specification transfers to cascade or ratio control depending on
the type of station selected with S23.
0 = no transfer
1 = transfer to cascade/ratio
80-6 2VAA000844R0001 J
80. Control Station Specifications
S21 – LOCLXFR
Block address of the transfer to local signal.
0 = no transfer
1 = transfer to local
S22 – CMPXFR
Block address of the transfer to computer signal.
0 = no transfer
1 = transfer to computer
S23 – STNTYP
Provides a choice between several station types for normal operation. The definition of <S2> depends on S23. The value of
S23 also determines whether cascade or ratio control is adopted when S6, S17 and <S20> are set to cascade/ratio (refer to
S6). This specification will not be fully operational until the HSI display strategies are modified. Until that time, only zero,
three and four are valid type specifications.
0 = basic with set point

1 = basic without set point (presently not implemented)
2 = basic with bias (presently not implemented)
3 = ratio
4 = cascade
S24 through S27

Block addresses that provide a mechanism for external absolute and deviation alarming. Specifications S24 and S25 can
be used for end of travel alarms. Specifications S24 through S27 are logical ORed with their respective internal alarms,
defined by S7 through S9, to determine the alarm states presented to the operator.
S24 – EHALRM
Sets the external high absolute alarm flag.
0 = no alarm
1 = high absolute alarm
S25 – ELALRM
Sets the external low absolute alarm flag.
0 = no alarm
1 = low absolute alarm
S26 – EHDALRM
Sets the external high deviation alarm flag.
0 = no alarm
1 = high deviation alarm
S27 – ELDALRM
Sets the external low deviation alarm flag.
0 = no alarm
1 = low deviation alarm
S28 – AOBLK
Analog output block number associated with the station. Use this specification for proper operation of bypass logic. When
S28 equals zero or two, it is not used. Any setting other than zero or two must be a block number of the control interface
module (CIS) function code 79, the analog output/slave (ASO) function code 149, the analog output/channel (AO/CH)
function code 223, or the device definition (DD) function code 221.
NOTES:
1. Only the physical AO from function code 79 is referenced to check the quality of the AO for auto bypass when the quality is
bad. When using function code 79, S28 should reference output block N+4 or N+5, not output block N.
2VAA000844R0001 J 80-7
Specifications 80. Control Station
2. When specification S28 is connected to block output number four of a device definition (function code 221) function block, the
bypass logic of the control station (function code 80) function block operates in the same manner as when specification S28 is set
to zero or two. The operational difference between referencing the device definition function block and setting specification S28 to
zero or two is that when specification S28 references the device definition function block, the control station function block inter-
faces to a SAC station attached to a control I/O (CIO) block.
3. When specification S28 is connected to the block output of an analog output/channel (function code 223) function block and
specification S16 specifies a valid SAC address, the control station function block interfaces to a SAC station attached to a control
I/O block.
4. When an analog out/channel (function code 223) function block is placed into simulation (specification S15 of function code
223 set to 1) its associated control station function block will place its SAC station (auto-bypass enabled) into bypass operation
with its demand output set to the last non-simulated control output value and function code 223 will not set the suspect bit. The
auto-bypass SAC station will remain in bypass operation until the simulation option is disabled and the current control output value
is set to match the control output value that was in effect prior to the simulation.
5. The IISAC01 analog control station bypass function takes a higher precedence in the control of the analog output field ele-
ment it shares in common with the CIO 100 block. This means that the bypass functionality takes precedence over function code
223 undefined, override, simulation, and normal modes of operation. It also takes precedence over function code 79 undefined
and normal modes of operation.
6. Specification S28 may be connected to an analog output channel (function code 223) that is associated with an AOT analog
output channel. In this application an IISAC01 is not used and S16 is set to 254 or 255. The station (function code 80) function
block will transfer to manual only if both redundant AOT Harmony I/O blocks experience failures on that particular channel.
Specification S28 provides a way to automatically monitor the CIO block/CIS module or AOT block/ASO module output
channel. Should the CIO block/CIS module or AOT block/ASO module detect a fault on the current output, the station
transfers to manual. If using a control station with a CIO block/CIS module, selecting auto-bypass on the station causes it to
transfer to bypass when the output faults.
NOTE: The HSI does not indicate that the station is in bypass or locked in manual (as it does if S18 equals one).
S29 – SPTRCK
Block address of the analog output set point track signal. This determines the track behavior of the set point in conjunction
with <S30>. Specification S29 indicates when <S2> should be tracked, and <S30> indicates when <S1> should be tracked.
If both indicate tracking, <S29> overrides <S30>. If this specification equals one, it will cause the set point to track <S2>
whether the station is in manual or automatic mode. This specification is not applicable when the station is in cascade mode
because the cascade input uses none of the internal station logic for control.
0 = no track
1 = track <S2>
S30 – PVTRCK
Block address of the process variable track signal. It determines the track behavior of the set point in conjunction with
<S29>. Specification <S29> indicates <S2> should be tracked, and <S30> indicates <S1> should be tracked. If both
indicate tracking, <S29> overrides <S30>. When <S30> equals one, it causes the set point to track <S1> whether the
station is in automatic or manual mode. This specification is not applicable when the station is in cascade mode because
the cascade input uses none of the internal station logic for set point control.
0 = no track
1 = track <S1>
S31 – CMPWDG
Computer watchdog time-out interval times computer communications when a station is under computer control. Timing
starts when a computer OK message goes from the network interface to the module, signifying that the computer received
all information transmitted from the module. The timer is reset by each subsequent OK message from the network interface
and station variable settings.
For example, if the station is switched from manual to computer control, a message will be sent to the network interface,
which will generate an OK message and initiate timing. If the elapsed time between OK messages exceeds the value of
S31, the timer times out. The control mode is then determined by the value of S17 (computer watchdog time-out option) in
the station. If the computer replies to a module message before the time interval is over, the timer resets itself and begins
timing again with the next communication. The interval is selected in seconds, with a default value of 60 seconds. An
interval value of 0.0 disables the computer watchdog time-out feature.
80-8 2VAA000844R0001 J
80. Control Station Applications
80.2 Applications
Figure 80-1 illustrates a single input, single output control loop run by a control station in basic mode (function code 79).
This configuration uses a PID block for error correction. The process variable and the control output interface with the field
devices through a control interface module block. If station parameters such as process variable, set point, and control
output are to be trended, an AO/L block is not necessary because the current values are obtained from the station
exception report. The exception reports are on the loop without an AO/L block. Only a trend block (function code 66 or 179)
is necessary.
Figure 80-2 shows how an auto bypass capable hardstation is configured to operate on the remote SAC link of a CIO block
using function code 221, function code 223, and function code 80 function blocks interfaced to CIO/SAC01 hardware.
Figure 80-3 shows how an indicating only hardstation is configured to operate on the remote SAC link of a CIO block using
function code 221, function code 223, and function code 80 function blocks interfaced to CIO/SAC01 hardware.
C IS I/O
(7 9 )
280
281
282
M/A 283
MF C /P 284
S1 (8 0 ) S 10
PV SP
PID S2 27 1
SP O
S2 (1 9) S3 27 0 285
S1 SP A A S1 1
(3 ) S1 260 S4 27 2
S2 F (t) PV TR C /R
250 S3 S5 27 4
TR TS C 286
S4 S 18 27 3
TS MI C -F 287
S 19 27 5
AX 288
S 20 S1 5
1 C AU SE S STATIO N TO
C /R
S 21 S1 6
G O TO C IS FE ED BAC K LX
S 22 S1 7
(S 2 8 ) O N M O DU L E CX
LAG D O ES N O T G O ING TO EX EC U TE . S 24 S1 8
HAA
W O R K IF N O T OT H ER W IS E , OU TP U T S 25
TU R N E D O N . W O UL D G O TO ZE RO L AA
S 26 289
DE FAU LT IS Z ER O. IF IT W AS A SO FT O IS Had
S TATIO N O N LY. S 27 L DA
S 28
AO
S 29 TRSE
S 30 T
TRPV
S1 (6 6 ) TO O IS
T REN D 290
O R O THE R
C O N SO LE
T 01 72 7 A
Figure 80-1 Single Input, Single Output Control Loop with Auto Bypass
2VAA000844R0001 J 80-9
Applications 80. Control Station
S1 M /A IO D /D E F
(3 ) M F C /P S2
S2 F(t) (8 0 )
CH01
1 N S1 S3
PV SP CH02
S2 N+1 S4
A P ID SP O CH03
S2 (1 56 ) S3 N S5
SP CO A A CH04
S1 N S4 N+2 S6
L AG D O E S N O T PV BI TR C /R CH05
W O R K IF N O T S3 N +1 S5 N+4 S7
TR BD TS C CH06
TU RN ED O N . S4 N +2 S18 N+3 S8
D E FAU LT IS Z E R O . TF MI C -F CH07
S5 S19 N+5 S9
R AX CH08
S6 S20 S10
FF C /R CH09
S7 S21 S11
N /A LX CH10
S8 S22 S12
N /A CX CH11
S9 S24 S13
II H AA CH12
S10 S25 S14
DI LA A CH13
S26 S15
H DA CH14
S27 S16
LD A CH15
S28 S17
AO CH16
S29 S18
T RS 2 CH17
S30 S19
T RP V T CH18
S20
CH19
S21
CH20
S22
CH21
S23
CH22
IO C /A IN S24
S9 CH23
S HP G S25
S 18 (2 2 2 ) CH24
S IM AI S26
S 25 P E R M IT
S PA R E S29
CJR
S31
S PA R E
S33
S PA R E
IO C /AO U T (2 2 1 ) P R IM A RY
S2 N S TATU S
AO B AC K UP
S14 (22 3 ) N +1 S TATU S
SIM AO
S21 OVR /S IM
SPA R E N +2
SPA R E
N +3
R ES E RVE D
N +4
T 0 08 1 0C
Figure 80-2 Single Input, Single Output Control Loop with Auto Bypass
S1 M /A IO D /D E F
(3 ) M FC /P S2
S2 F (t) N (8 0 )
CH01
1 S1 S3
CH02
PV SP
S2 N+1 S4
A P ID SP O CH03
S2 (1 5 6 ) S3 N S5
SP CO A A CH04
S1 N S4 N+2 S6
L AG D O E S N OT PV BI TR C /R CH05
W O R K IF N OT S3 N+1 S5 N+4 S7
TR BD TS C CH06
TU R N E D O N . S4 N+2 S 18 N+3 S8
D EFAU LT IS Z E RO . TF MI C -F CH07
S5 S 19 N+5 S9
R AX CH08
S6 S 20 S 10
FF C /R CH09
S7 S 21 S 11
N /A LX CH10
S8 S 22 S 12
N /A CX CH11
S9 S 24 S 13
II HAA CH12
S1 0 S 25 S 14
DI LAA CH13
S 26 S 15
H DA CH14
S 27 S 16
L DA CH15
S 28 S 17
AO CH16
S 29 S 18
TRS2 CH17
S 30 S 19
TRPV T CH18
S 20
CH19
S 21
CH20
S 22
CH21
S 23
CH22
IO C /A IN S 24
S9 CH23
SHPG S 25
S 18 (2 2 2 ) CH24
S IM AI S 26
S 25 P E R M IT
S PA R E S 29
CJR
S 31
S PA R E
S 33
IO C /AO U T S PA R E
S2 (2 2 1 ) P R IM A RY
AO
S1 4 (2 2 3 ) N S TAT U S
S IM AO BACKUP
S2 1
S PA R E
N +1 S TAT U S
O V R /S IM
N +2
S PA R E
N +3
R E S E RV E D
N +4
T 0 0 81 1 C
Figure 80-3 Single Input, Single Output Control Loop without Auto Bypass
80-10 2VAA000844R0001 J
81. Executive Explanation
81. Executive
The executive function code resides in fixed block zero of a control module. It selects the output mode of the light emitting
diodes (LED) on the front panel of the control module. The LEDs display the status of the control module or an internal
memory location. The executive function code has 15 output blocks numbered zero through 14. Fixed blocks zero through
nine are fixed values.
Outputs
EX EC Blk Type Description

M F C /P
(8 1 )
SU
10 0 B Logic 0
MEM
11
PT
12 1 B Logic 1
REV
13
N /A
14 2 B 0 or 0.000
3 R -100.000
4 R -1.000
5 R 0.000
6 R 1.000
7 R 100.000
8 R -9.2 E18
9 R 9.2 E18
10 B Startup in progress flag:

0 = no
1 = yes
11 R Memory display value
12 R System free time (%)
13 R Revision level
14 R Reserved
Specifications
S1 Y 0 I 0 or 1 Front plate LED display mode:

0 = normal (i.e., module status)
1 = display memory (for diagnostic purposes only)
S2 Y 0 I 0 - 255 Memory display address (most significant byte)
S3 Y 0 I 0 - 255 Memory display address (middle byte)
S4 Y 0 I 0 - 255 Memory display address (least significant byte)
81.1 Explanation
The front panel display of the controller provides diagnostic information that describes the CPU operating condition,
additional memory operating information, and additional operating information on the entire module. The product instruction
for this controller provides a full description of diagnostic codes.
2VAA000844R0001 J 81-1
Outputs 81. Executive
81.1.1 Outputs
Output blocks zero through nine are various system constants and are described in the output table. Output blocks ten
through 13 provide module status information.
10
(Startup in progress flag) Logic 1 for the startup period specified by S4 of function code 90 when the module is in execute
mode. When startup is successful, this signal reverts to logic 0, and remains at logic 0 as long as the module is in execute
mode.
0 = no
1 = yes
11
(Memory display value) Either the memory address selected with S2 through S4 or the current module status, depending
on which option was selected with S1.
12
(System free time in percent) Percentage of free time left in the control module.
Free time  1 – total module utilization
13
(Revision level) Four digit number identifying the module nomenclature, hardware revision level, and firmware revision
level as illustrated below.
X X XX
Firmware revision level. X X = nth revision released
(e.g., XX = D_0).
Hardware revision level. X = 0, 1, 2, etc.
Module nomenclature:
5 = BRC-100
8 = HAC
14
81-2 2VAA000844R0001 J
82. Segment Control
82. Segment Control

The segment control function code groups subsequent blocks into a scan cycle executed at a specified rate and priority.
Each module can support up to eight segment control blocks. Each segment control block provides five outputs. Block
address 15 contains one permanently configured segment control block. The other seven are configurable.
NOTE: Online configuration allows changing the function block configuration during controller execution without interrupting the
control process. For the HAC only, function code 82 can not be added or deleted via online configuration.
Outputs
SE G C R M Blk Type Description

(8 2 )
PT
N
ET
N+1 N R Elapsed time of previous cycle in units set by S1
UF
N+2
DR
N+3 N+1 R Elapsed time of current cycle in units set by S1
CT
N+4
N+2 R Processor utilization (%)
N+3 R Checkpoint overrun count number (number of cycles over

that are specified in S4)
N+4 R Cycle time overrun in units set by S1
Specifications
S1 N 1 I 01, 02, 11, Segment attributes; tune and modify lock (1X, 2X and
12, 21, 22, 3X can be unlocked with switch combinations via
31 or 32 special operations)
Tune:
0X = tune and modify allowed
1X = tuning not allowed
2X = modify lock
3X = tune and modify lock
Target period time units:
X1 = seconds
X2 = minutes
S2 Y 0.250 R Full Target period (seconds or minutes as specified by S1)
S3 N 0 I 0 - 255 Segment priority (0 = lowest). Can not be modified

through online configuration.
S4 N 1 I 0 - 32,767 Checkpoint period (number of cycles per checkpoint)
S5 N 0 I 0, 1, or 2 PID reset mode:

0 = normal reset
1 = auto selected external reset
2 = external reset
S6 N 10.000 R Full PID maximum derivative gain
S7 N 1.000 R 0.0 - Minimum report time for all exception reports in this
9.2 E18 segment (seconds or minutes as specified by S1)
S8 N 60.000 R 0.0 - Maximum report time for all exception reports in this
9.2 E18 segment (seconds or minutes as specified by S1)
S9 N 2.000 R 0.0 - Significant change parameter for all control loop (i.e.,
9.2 E18 station) exception reports in this segment (in percent of
span)
S10 N 1.000 R 0.0 - Alarm deadband for all high and low alarm reports in
9.2 E18 this segment (in percent of span)
2VAA000844R0001 J 82-1
Explanation 82. Segment Control
S11 N 1.000 R 0.0 - Alarm deadband for all deviation alarm reports in this
9.2 E18 segment (in percent of span)
S12 N 0.000 R Full Reserved
S13 N 1.000 R 0.0 - Periodic I/O sampling period for this segment
9.2 E18 (in seconds). This is a multiple of the extended execu-
tive block (function code 90, block 20, S2)
S14 Y 9.2 E18 R 0.0 - Segment cycle time alarm limit (seconds or minutes as
9.2 E18 specified by S1)
S15 N 0 I 0 or 1 Auto sequencing:

0 = off
1 = on
82.1 Explanation
The segment control block divides the set of function blocks configured in a module into subsets (segments), and specifies
the operating parameters for each segment individually. A segment starts with the block number of a segment control block
and ends at the next higher numbered segment control block or last block. For example, if there is a segment control block
configured in block 1000, the block numbers would be divided into two segments. The first segment would contain blocks 15
through 999, and the second segment would contain blocks 1000 through the last configurable block. Fixed block 15
contains one permanently configured segment control block, which also occupies blocks 16, 17, 18 and 19. Blocks 15
through 19 cannot be used for any other purpose nor can they be deleted. Up to seven additional segment control blocks
can be placed at any configurable block number location greater than 30.
S1 – TUNIT
(Segment attributes) Defines the tuning and modification option and execution cycle time units for the segment. If the tens
digit is a zero, then all tunable parameters in the segment may be tuned or modified.
NOTE: When multiple segments are used, leave enough free time to run all of the segments.
XX
Ones digit
X1 = seconds
X2 = minutes
Tens digit
0X = tuning allowed
1X = tuning not allowed
2X = modified lock
3X = tune and modify lock
If the tens digit is a one, change is not permitted to tunable parameters in the segment. This software lock ensures that
tunable parameters in a critical segment cannot be changed while the module is online to the process.
NOTE: The lock option does not affect adaptable functions. Outside segments adapt into segments that are locked.
If the tens digit is a two, modification of the block numbers within this segment is prohibited. This includes the addition of
new functionality. Tuning can be performed while in this state. To access logic in this segment, it is necessary to initialize the
NVRAM or perform the segment lock special operation.
If the tens digit is a three, tuning and modification to logic in this segment are prohibited. To gain access to logic in this
segment, it is necessary to initialize NVRAM or perform the segment lock special operation.
The time units parameter defines the measurement of time units of the segment execution cycle. Specification S2 defines
the desired length of the execution cycle.
S2 – CYCTIM
Sets the target segment execution cycle in time units selected with the ones digit of S1. In each segment, blocks execute in
a predefined order, selected with S15. A cycle consists of one execution of the blocks plus any idle time (cycle time
82-2 2VAA000844R0001 J
82. Segment Control Specifications
remaining after the cycle has been executed). Cycle time is the length of time from the start of one cycle to the start of the
next cycle.
NOTE: S2 can be set less than 20 msec, but the checkpoint period (S4) must be adjusted upward such that the following condition
is true:
S2 x S4 >= 20 msec
When S2 is less than the segment execution time (e.g., S2 is set to zero), the rule is:
segment execution time x S4 >= 20 msec
S3 – SPRI
(Segment priority) Assigns execution priorities to up to eight active segments. An active segment is one that is ready to
run or is running. If two or more segments are active, the processor will run the highest priority segment. Segment priorities
should be selected from zero to seven with zero being the lowest priority segment.
NOTE: The segment priority can not be modified through online configuration.
S4 – CHKPER
Applies to redundant module configurations. Checkpointing is the mechanism which keeps the backup module state current
with that of the primary module. Checkpointing is the action of initially copying the configuration (once at startup) and after
that all significant dynamic data (block outputs, partial results of chained calculations, integration counts, etc.) to the backup
module as a block of data. This is essential for the bumpless takeover by the backup should the primary module fail.
The smooth transfer from primary to backup control is the result of the execution rate (time) of the segment, the frequency
of the checkpointing operation, and the process dynamics. The actual failover from the primary to the backup occurs in ten
milliseconds or less. The checkpointing operation governs the offset or data age between the primary and backup module.
The frequency of checkpoint is a multiple of the segment execution time. The default setting for S4 is one. This specifies a
checkpoint operation each segment cycle (250 milliseconds). With S4 set to four, the checkpoint operation occurs every
fourth segment cycle (one second).
Large configurations have the potential of the backup being many cycles behind the primary when the transfer time exceeds
the segment execution rate. This is especially true when using multiple segments.
To compute the time required to checkpoint the dynamic data of a given segment in an Harmony controller, divide the sum
of the individual function blocks checkpoint utilization by 1,000,000 (IMMFP03 and BRC controllers) or 22,000
(IMMFP11/12 controllers) bytes per second. The resultant time is the minimum checkpoint time (in seconds). This time must
be divided by the selected execution rate of the segment rounded upward to the nearest whole number and configured as
the checkpoint period (S4).
NOTE: Refer to function code 140 for checkpoint utilization information.
For example, suppose a given configuration contains the function blocks shown in Table 82-1
Table 82-1 Total Segment Checkpoint Utilization
Function Checkpoint Total

Quantity
Code Utilization Utilization
82 1 36 36
90 1 52 52
156 40 40 1,600
80 40 68 2,720
221 20 46 920
222 80 54 4,320
223 40 54 2,160
224 80 54 4,320
225 80 54 4,320
179 20 1400 28,000
9 40 14 560
33 40 2 80
37 80 2 160
39 80 2 160
30 40 14 560
Total Utilization = 49,968
With a segment cycle time of 0.25 second, calculate the checkpoint period (S4):
total utilization 49 968

t = -------------------------------------- = ---------------------------
 bytes per sec  1 000 000
2VAA000844R0001 J 82-3
Specifications 82. Segment Control
t = 0.049968 sec. (time for one set of data)
checkpoint period = 0.049968

---------------------- = 0.199872
0.25
round up to next integer S4 = 1

NOTES:
1. Programs such as C language or BASIC must be accounted for when calculating S4.
2. When S2 is set to less than 20 msec, then S4 must be adjusted upward such that the following condition is true:
S2 x S4 >= 20 msec
When S2 is less than the segment execution time (e.g., S2 is set to zero), the rule is: segment execution time x S4 >= 20 msec
S5 – XRES
(PID reset mode: 0 = normal reset, 1 = auto selected external reset, 2=external reset) Affects all function code 18
and 19 blocks in the segment. When S5 equals one, the internal memory of function code 18 and 19 blocks in the segment
follows the track input, despite the status of the track/release flag. A change in input is modified by proportional and
derivative action, and added to the track signal. This combined signal is the output. This prevents reset windup, which may
occur in batch systems where controllers may be monitoring control variables but not performing any control action during
the current step. In other words, the output of the PID block is not used in the current process step. The controller receives
the signal, takes action to correct the error, sees no result, and takes action to correct the error again. As long as the
controller receives no results from its control action, it continues to try to correct the error. When the controller goes into
service on some other step of the process, it winds up so far beyond the value of the controlled variable that it cannot
control it. The external reset option allows controller alignment while it is not being used for control functions.
Refer to Examples in the section describing function code 19 for a more detailed explanation of the effect of each value.
S6 – PID GAIN
(PID maximum derivative gain) Limits the derivative gain value in all PID blocks in the segment.
S7 – MINXTM
Defines the minimum report time for all exception reports in the segment. Minimum exception reporting time prevents
loading on the communication highway. Exception reports will not be sent on the communication highway at each minimum
exception report interval unless a value has changed by more than the operator defined significant change (S9) since the
last exception report. The default value is one second.
S8 – MAXXTM
Defines the maximum interval between updates of information sent on the communication highway. If the value of a point
has not exceeded the significant change (S9) over this time period, a report of its value will automatically be sent on the
communication highway. The default value is 60 seconds.
S9 – SIGCHG
Significant change parameter for all communication highway exception reports in this segment except those with their own
significant change parameters (i.e., function code 30), expressed as percent of span. It defines the percent of span a point
value must change to cause an exception report to be generated.
S10 – HLALMDB
Alarm deadband for all high/low alarm reports in this segment, expressed as percent of span. Alarm deadbands prevent
excessive alarm reports when values are hovering around the alarm limit.
S11 – DVALMDB
Alarm deadband for all deviation alarm reports in this segment expressed as a percent of span. Alarm deadbands prevent
excessive alarm reports when values are hovering around the alarm limit. Deviation alarm deadbands are for stations only,
since only stations have deviation alarms.
S12
Reserved.
S13 – MBUS
(Periodic I/O sampling period for this segment: expressed in seconds) A multiple of the base periodic I/O sampling
period, which the extended executive function code 90 (S2) defines. This specification defines the rate at which this
segment samples/updates data across the peer-to-peer network or the Controlway/module bus.
82-4 2VAA000844R0001 J
82. Segment Control Outputs
S14 – CYCALM
Segment cycle time alarm limit, expressed in seconds. If segment cycle time exceeds this number, block N+4 will output the
cycle time overrun in units set by S1.
S15 – SEQUEN
(Auto sequencing signal: 0 = off, 1 = on) If this specification equals one, the module finds and saves the most logical
execution order of the function blocks and will execute them in that order, despite block numbers. Auto sequencing helps
prevent loopbacks. Loopbacks occur when a block requires the output of a higher numbered block to complete its
execution. The segment must then go through two or more execution cycles before the output of the first block is correct. If
the auto sequencing function is off (zero), blocks are executed in ascending numerical order.
82.1.2 Outputs
N
Elapsed time of the previous execution cycle in S1 units. The elapsed time includes any segment idle time. If the time
required to execute the blocks within the segment is less than the requested cycle time, the remainder is idle time spent
waiting before starting the next cycle. Any idle time is available for lower priority segments. This output verifies that the cycle
time specified by S2 is met.
N+1
Elapsed time of the current execution cycle in S1 units. This elapsed time does not include any segment idle time. It is a
measure of the actual runtime of the blocks within the segment, plus the block runtime of all higher priority segments. This
output verifies that the segment is running. A continual upward ramp indicates that the segment is not running. This occurs
when higher priority segments consume all the processor time, or when a basic program is waiting for operator input, in an
infinite loop, or aborted because of some error condition.
N+2
Processor utilization in percent. This output represents the proportional amount of total module utilization time (100 percent
- system free time at block 12) that is used by this segment. This amount of time should be less than 100 percent by a
nominal percentage (i.e., ten to 15 percent) dependent on the configuration.
N+3
Checkpoint overrun count number. The number of cycles executed over that are specified by S4. This output verifies that
the checkpoint period is met. A continual upward ramp indicates that the segment is never getting the link for dynamic data
transfer. A cyclic ramp indicates that dynamic data transfer is occurring, but not at the requested rate. Depending on the
overrun, this may be an acceptable situation. If not, then the checkpoint period of the segment or the next highest priority
segment must be increased until no overrun occurs.
N+4
Cycle time overrun in units specified by S1. If cycle time exceeds that set by S14, the overrun will be output from this block.
This output enables the program logic to take specific action based on a given cycle time alarm limit being exceeded.
Two items must be considered when configuring multiple segments. First, each segment should run within the requested
cycle time. Second, ensure that the dynamic data of each segment is sent to the backup module within the requested
checkpoint period. Achieving this usually involves fine tuning the segment, because the cycle time and checkpoint period of
each segment are affected by all segments above it in priority.
To determine if a segment is running within its requested cycle time, observe outputs N and N+1. If output N+1 is continually
ramping up, then the segment is not running. This occurs when higher priority segments consume all the processor time, or
when a C or basic program is in an infinite loop, waiting for operator input, or aborted because of some error condition. If
output N is greater than the requested cycle time set by S2 (when more than one segment exists), the segment is
consuming more processor time than the requested period. In this case, cycle time must be increased until the segment
output N is equal to the time it really takes to execute the segment.
To determine if a segment checkpoint period is occurring within the requested time period, observe output N+3. If N+3 is
continually ramping up, then the checkpointing (refer to S4) of dynamic data is not occurring. This happens when higher
priority segments demand all the link time, or if the segment is not running. If N+3 has a cyclic ramp, then the dynamic data
is being sent to the backup module, but not at the requested rate. Depending on the amount of overrun, this may be an
acceptable situation. If it is not acceptable, then the checkpoint period of this or the next highest priority segment must be
increased until no overrun occurs.
2VAA000844R0001 J 82-5
Outputs 82. Segment Control
82-6 2VAA000844R0001 J
83. Digital Output Group
83. Digital Output Group

This block writes a group of eight outputs to an IMDSO14 or IMDSO15 digital module.
Outputs
DO GRP
S4
S6
S7 N B Status of output group:
S8
0 = good
S9
S10
1 = bad (I/O module failed to respond)
S11
Specifications
(8 3 )
S1 N 0 I 0 - 63 Expander bus I/O module address of digital I/O

module
S2 N 0 I 0 - 120 I/O module definition = hold + type + group

Hold: (defaults set with function code 128):
0XX = go to default values on loss of control
module
1XX = hold I/O module output on loss of control
module
Type:
X0X = IMDSM05
X1X = IMDSO04, IMDSO14, IMDSO15
CSC01 group settings:
XX0 = outputs 0 - 7
XX1 = outputs 8 - 15
S3 N 0 I 0, 1, 2, 4 Action on I/O module failure:

1 = continue to operate
2 = continue to operate for 1 cycle after I/O
module fails (LIO status set)
4 = continue to operate after I/O module fails
(LIO status disabled)
S4 N 0 I Note 1 Block address of value for first output
S5 N 0 I Note 1 Block address of value for second output
S6 N 0 I Note 1 Block address of value for third output
S7 N 0 I Note 1 Block address of value for fourth output
S8 N 0 I Note 1 Block address of value for fifth output
S9 N 0 I Note 1 Block address of value for sixth output
S10 N 0 I Note 1 Block address of value for seventh output
S11 N 0 I Note 1 Block address of value for eighth output

NOTE:
The control system must be carefully evaluated to estab-

lish default values that will prevent personal injury and/or
property damage in the case of module failure.
2VAA000844R0001 J 83-1
Explanation 83. Digital Output Group
83.1 Explanation
S1 – SLVADR
Address of the digital I/O module (zero to 63).
S2 – SLVDEF
I/O module definition = hold  type  group
NOTE: The hundreds digit must be the same for both output groups on IMDSM05 and IMDSO14 modules.
XXX
Group = Defines which group of outputs from the I/O module is being
handled by this block. IMDSO01/02/03/15 modules can only have a
group value of zero because they have only one group of outputs.
IMDSM05 and IMDSO14 modules can accommodate 16 outputs.
XX0 = outputs zero to seven
XX1 = outputs eight to 15
Type = Type of I/O module
X0X = IMDSM05 (default setting)
Hold = Defines action taken by block on loss of control module.
Defaults set with function code 128, except for the IMDSM05 whose
defaults are set with hardware switches. For the IMDSM05, refer to
the installation section of the Digital I/O Slave Module (IMDSM05)
instruction.
0XX = go to default values on loss of control module
1XX = hold I/O module outputs on loss of control module
S3 – TRIP
Defines the action of the control module in the event of an I/O module failure.

2 = continue to operate for 1 cycle after I/O module fails (LIO status set)
4 = continue to operate after I/O module fails (LIO status disabled)
NOTE: Only a 0 or 1 may be specified for firmware revisions prior to K_0. The full range is supported on BRC300/400/410 or
HPG800 modules for firmware revisions K_0 or later.
S4 – S11
Block addresses of the values of the eight I/O module outputs. Specification S4 is the block address of the value for the first
output, S5 is the block address of the value for the second output, etc.
83-2 2VAA000844R0001 J
84. Digital Input Group Explanation
84. Digital Input Group

The digital input group function code reads a group of eight inputs from an IMDSI12, IMDSI13, IMDSI14, IMDSI15, or
IMDSI22 digital module.
To ensure that the signals successfully transfer across the controlway/module bus, the signal generates a point quality flag.
To test the quality of the signal, include a function code 31 in the configuration. The quality of the signal cannot be
determined by any other type of block. However, the output of the test quality block can be used as an input to other digital
processing blocks to provide signal quality information. Refer to Appendix J, for a definition of point quality.

damage in case of module failure.
WARNING
Outputs

D IG R P
(8 4 ) N B Output 1 with quality
N
N+1 N+1 B Output 2 with quality
N+2
N+3
N+2 B Output 3 with quality
N+4
N+5
N+7
Specifications
S1 N 0 I 0 - 63 Expander bus I/O module address
S2 N 0 I 0 or 1 Input group:
0 = inputs 1 - 8, group A
1 = inputs 9 - 16, group B
S3 N 0 I 0 or 1 Action on I/O module failure:

84.1 Explanation
S1 – SLVADR
I/O module associated with this block (zero through 63).
S2 – GROUP
Input group. Digital I/O modules can handle two groups of eight inputs. Input group is identified by the following:
0 = inputs 1 through 8
1 = inputs 9 through 16
S3 – TRIP
Defines the action of the control module in the event of I/O module failure.

2VAA000844R0001 J 84-1
Specifications 84. Digital Input Group
84-2 2VAA000844R0001 J
85. Up/Down Counter Explanation
85. Up/Down Counter

The up/down counter function code is a digital counter with separate inputs for incrementing and decrementing the counter.
The count updates on a logic 0 to logic 1 (positive) transition on either input.
External logic can be used to hold or reset the count. The counter can be set to an initial value upon start-up or following
reset.
This function has high and low alarm features. Each drives a separate output when the input exceeds the alarm value.
Outputs
U P /D N
U V
S2 N
D H
S3
R L
N+1 N R Contents of counter (upper limit is ±1.677 E7)
S4 N+2
H
N+1 B High alarm status:
0 = no alarm
1 = count has reached high limit
N+2 B Low alarm status:

0 = no alarm
1 = count has reached low limit
Specifications
S1 N 0 I Note 1 Block address of up trigger
S2 N 0 I Note 1 Block address of down trigger
S3 N 0 I Note 1 Block address of reset flag:

0 = run
1 = reset
S4 N 1 I Note 1 Block address of hold flag:

0 = hold
1 = release
S5 Y 0.000 R Full Value of count on reset
S6 Y 9.2 E18 R Full High alarm value
S7 Y -9.2 E18 R Full Low alarm value

NOTE:
85.1 Explanation
The contents of the counter output N is dependent on the reset input, hold input, and the up and down triggers. The reset
input overrides all other inputs. Three types of operations are possible: normal, reset and alarm.
S1 – UPTRIG
Block address of up trigger. A zero to one transition of <S1> increments the counter by one.
S2 – DNTRIG
Block address of down trigger. A zero to one transition of <S2> decrements the counter by one.
S3 – RESET
Block address of reset input.
2VAA000844R0001 J 85-1
Reset 85. Up/Down Counter
0 = run
1 = reset
S4 – HOLD
Block address of the hold input.
0 = hold
1 = release
When <S4> equals zero, the counter remains fixed at the current value despite <S1> and <S2>. When <S4> equals one,
the counter releases to respond to <S1> or <S2>.
S5 – COUNT
Value of count on reset. When <S3> equals one, the count goes to the number specified by S5.
S6 – HIALRM
High alarm value. If the value of N equals or exceeds <S6>, output N+1 equals one, signifying a high alarm state. If the
reset input <S3> is 1 indicating reset, output N+1 equals zero indicating high alarm cleared.
S7 – LOALRM
Low alarm value. If the value of N equals or falls below <S7>, output N+2 equals one, signifying a low alarm state. If the
reset input <S3> is 1 indicating reset, output N+2 equals zero indicating low alarm cleared.
85.2 Reset
If <S3> = 1, then Y = S5 and N+1 = 0

If <S3> = 0, then High and Low alarm status (N+1/N+2) are set as described in Alarm.
where:
<S3> = Value of reset input:
0 = run
1 = reset
S5 = Value of count on reset.
Y = Current value of count.
85.3 Normal
If previous <S1> = 0 and current <S1> = 1, then
Y = previous Y+1
If previous <S1> = current <S1>, then
Y = previous Y
If previous <S2> = 0 and current <S2> = 1, then
Y = previous Y - 1
If previous <S2> = current <S2>, then
Y = previous Y
If <S4> = 0, then
Y = previous Y, despite <S1> and <S2>.

where:
<S1> Value of up input.
=
<S2> Value of down input.

=
85-2 2VAA000844R0001 J
85. Up/Down Counter Alarm
<S4> Value of hold input:

= 0 = hold
1 = release
Y Current value of count.
=
85.4 Alarm
If Y  S6 and <S3> = 0, then:
N+1 = 1
else N+1 = 0
If Y  S7 and <S3> = 0, then
N+2 = 1
else N+2 = 0
where:
Y = Current value of count.
N+1 = High alarm indicator:
0 = normal
1 = high alarm
N+2 = Low alarm indicator:
0 = normal
1 = low alarm
85.5 Applications
Up/down counters count events and enable alarms or trigger events when alarm values are reached.
Figure 85-1 shows an example of the counter used to alert the operator of service requirements. The motor must be
removed from service and rebuilt after performing 100 starts. This configuration increments the counter each time the motor
starts. The high alarm limit is 100 (starts). When N equals the high alarm limit <S6>, output N+1 equals one. Output N+1
goes to a digital output over the loop function block causing an exception report to be sent to the communication highway.
This triggers a service required display on the console.
U P /D N
M O TO R S1 (8 5 )
U V
S TA R T S2 150 S1 (4 5 )
D H
151
D O /L 155
TO H S I
S3
R L
S4 152
H
S 5 = 0.0 0 0
S 6 = 10 0 .0 0 0
S 7 = -9 .2 E +1 8 T 020 30 B
Figure 85-1 Up/Down Counter Maintenance Requirement Alert
2VAA000844R0001 J 85-3
Applications 85. Up/Down Counter
85-4 2VAA000844R0001 J
86. Elapsed Timer Explanation
86. Elapsed Timer

The elapsed timer function code measures elapsed time. This is especially useful for batch control applications, and may be
used for maintenance purposes such as operating time measurements. Time units are configurable to seconds, minutes,
hours or days with S3. The timer performs either up or down timing functions, and can be held to a particular value or reset
to a specified initial value by external logic.
Outputs
ET IM ER
H V
S1 N
R A
N+1 N R Current value of timer (always positive)
N+1 B Time alarm indicator:

0 = alarm time not reached
1 = alarm time reached
Specifications

0 = run
1 = reset

0 = hold
1 = release
S3 N 0 I 0-3 Units of time:

0 = seconds
1 = minutes
2 = hours
3 = days
S4 Y 0.000 R 0.0 - 9.2 E18 Value of time alarm
S5 Y 0.000 R 0.0 - 9.2 E18 Value of timer on reset
S6 N 0 I 000, 001, Up/down indicator:

100 or 101 XX0 = up
XX1 = down
Tune/adapt reset timer:
0XX = reset timer upon tune or adapt operation
1XX = do not reset timer upon tune or adapt
operation
NOTE: Tens digit is not important
NOTE:
86.1 Explanation
The elapsed timer function code provides a timer with up and down timing functions, automatic reset and hold functions
based on external logic functions, and alarm indication if the count reaches a preset alarm value. The reset function
overrides all other inputs.
S1 – RESET
Block address of the reset input. When <S1> equals one, the timer resets to the value specified by S5.
2VAA000844R0001 J 86-1
Outputs 86. Elapsed Timer
0 = run
1 = reset
S2 – HOLD
Block address of the hold input. When <S2> equals zero, output N remains at the current value, despite the value of the
up/down indicator (S6).
0 = hold
1 = release
S3 – TIME
Sets the units of time.
0 = seconds
1 = minutes
2 = hours
3 = days
S4 – TALRM
Value of the time alarm. If this value is reached, output N+1 equals one. Specification S3 sets the time alarm time units.
S5 – TIMRES
Sets the value of the timer on a reset. If <S1> goes to one, the timer goes to the value selected with S5. This value is in the
units of time selected with S3.
S6 – IND
Up/down indicator. The ones digit of this specification defines the direction of timing. The hundreds digit resets the timer on
a tune or adapt operation.
X X X
Timing Direction
0 = up
1 = down
Not Used
Reset Timer
0 = reset time on tune or adapt
1 = no reset
86.1.2 Outputs
N
Current value of the timer. The timer output is based on an internal ten millisecond resolution timer. However, the actual
output updates once every segment cycle. Output N is calculated in reset or normal operation.
Reset:
If <S1> = 1, then
N = S5 despite <S2>
where:
N = Current value of timer.

Normal Operation:
Hold count:
If <S1> = 0 and <S2> = 0, then
N = previous N
Increase count:
If <S1> = 0, <S2> = 1, and S6 = XX0, then
N = previous N + elapsed time since last run

Decrease count:
If <S1> = 0, <S2> = 1, and S6 = XX1, then
86-2 2VAA000844R0001 J
86. Elapsed Timer Applications
N = previous N - elapsed time since last run

Tune/Adapt:
If S6 = 0XX and S5 is tuned, then
N = S5, regardless of <S2>

If S6 = 1XX and S5 is tuned, then
N = previous N  elapsed time since last run

where:
N = Current value of timer.
or
N = S5 when <S1> = 1.
N+1
Alarm indicator. This output indicates when the timer value reaches or exceeds the alarm value specified in S4.
Alarm
If S6 = XX0 and Y  S4, then
N+1 = 1
If S6 = XX0 and Y < S4, then
N+1 = 0
If S6 = XX1, and Y  S4, then
N+1 = 1
If S6 = XX1, and Y > S4, then
N+1 = 0
where:
Y = Current value of timer.
86.2 Applications
Figure 86-1 shows an example of the elapsed timer being used to calculate the average power consumption over a demand
period of 15 minutes. The elapsed timer counts up from zero minutes to 15 minutes, and resets itself to zero minutes when
the timer reaches 15. Power is integrated and divided by elapsed time to determine average power consumption per unit of
time.
P OW E R
0.0 5
S1 (166)

PV
S3 15 5
IC Q
S1 (33) S4 15 6
NOT 15 0
TS
S2 = 1 (M IN U TE )
S5 = 9.2E + 18
S6 = -9.2E+ 18
S7 = 1
S8 = 0
S9 = 0.0
ET IM ER S1 AV ER AG E P O W E R
(17)
S2 (86) S2 C O N SU M E D P ER
1 H V 16 5
U N IT TIM E
1 S1 1 60
R A
1 61
S3 = 1
S3 = 1 ( M IN U TE )
S4 = 15
S5 = 0
S6 = 0 T 0 1 7 28 A
Figure 86-1 Determining Average Power Consumption Over Time
2VAA000844R0001 J 86-3
Applications 86. Elapsed Timer
86-4 2VAA000844R0001 J
87. Digital Logic Station Interface

The digital logic station (DLS) interface function code specifies the IMDSM05 Digital Slave Module as an interface device
between the digital logic station and a module. Each IMDSM05 module can interface with up to eight digital logic stations.
Outputs

(8 7 )
D LS I N
N B I/O module status flag:
0 = good
1 = bad (I/O module failed to respond)
Specifications
S1 N 0 I 0 - 63 Expander bus I/O module address of IMDSM05
2VAA000844R0001 J 87-1
87-2 2VAA000844R0001 J
88. Digital Logic Station
88. Digital Logic Station
The digital logic station (DLS) function code configures a digital logic station for use with a module. Each DLS station
provides one group of eight inputs and two groups of eight outputs to a module.
Outputs
D LS
(8 8 )
S2
S3 N
S4 N+1 N B Value of pushbutton 1: 0 = open, 1 = closed
S5 N+2
S6 N+3 N+1 B Value of pushbutton 2: 0 = open, 1 = closed
S7 N+4
S8 N+5 N+2 B Value of pushbutton 3: 0 = open, 1 = closed
S9 N+6
N+7
S10
ST
N+8
N+3 B Value of pushbutton 4: 0 = open, 1 = closed
S11
S12
S13
S14
S15 N+5 B Value of pushbutton 6: 0 = open, 1 = closed
S16
S17 N+6 B Value of pushbutton 7: 0 = open, 1 = closed
S18
N+8 B DLS status flag: 0 = good, 1 = bad

NOTE: The pushbutton outputs are pulsed or maintained depending on the digital
logic station address specified with S1. An address of 0 to 7 provides a pulsed
output. An address of 100 to 107 provides a maintained output.
Specifications
S1 N 0 I 0 - 107 Logic station address:

0 - 7 = pulse
100 - 107 = maintained
S2 N 0 I Note 1 Block address of logic station interface.
S3 N 0 I Note 1 Block address, output 0,group A
S11 N 0 I Note 1 Block address, output 0,group B
2VAA000844R0001 J 88-1
Explanation 88. Digital Logic Station

NOTES:
1. Maximum values are: 1023 for IMLMM02
2046 for NMFC01/02, IMMFC05, and IMMPC01
9998 for IMMFC03/04, IMMFP01/02/03/04, and BRC-100/200/300
31998 for BRC-400
88.1 Explanation
The internal logic of the digital logic station provides either a one cycle pulse or a maintained input (as long as the
pushbutton is depressed) for all eight pushbuttons. Specification S1 selects the input type for the entire group.
Each pushbutton has two LEDs associated with it, but independent from it. Thus, the combination can be used for either
related events or independently.
If parallel control is desired from a console, the digital logic station can be configured in combination with a remote control
memory (function code 62) or device driver (function code 123) block. Control is gained from the station or the console.
S1 – LSADR
Specification S1 is the digital logic station address. Each DLS station has an address which is set with a three position
dipswitch on the station. Valid hardware addresses are zero through seven. With this specification, specify the address as
zero to seven or 100 to 107, depending on the type of pushbutton outputs desired.
If the station is addressed from zero to seven (true address), the pushbutton outputs are a pulse output. When a pushbutton
is pressed, the associated output goes to a one for one cycle, then returns to zero.
If the station is addressed from 100 to 107 (true address plus 100), the pushbutton outputs are maintained. When a
pushbutton is pressed, the associated output goes to a logic 1 and remains there until the pushbutton is released.
S2 – LSI
Specification S2 is the block address of logic station interface. This specification identifies the function code 87 block
providing the interface between the digital logic station and its IMDSM05 module.
S3 to S18 - A0 to B7
Specifications S3 through S18 are the block addresses of the output values for output groups A and B. These values are
displayed on the LEDs on the front plate of the digital logic station. A logic 0 output turns the LED off, and a logic 1 output
lights the LED.
88.1.2 Outputs
N through N+7
Outputs N through N+7 are the values of pushbutton inputs one through eight.
0 = open
1 = closed
N+8
Output N+8 is the digital logic station status flag.
0 = good
1 = bad
88-2 2VAA000844R0001 J
88. Digital Logic Station Applications
88.2 Applications
Figure 88-1 shows a typical configuration of function code 88 used in conjunction with function codes 87 and 35.
(8 7) TO OTH E R LO G I C
DL SI N
S1 = 0
DLS (8 8) (3 5) S TOP C O M M A N D
S2 S1
PA F A M TR S TO P S1 ( 39) S3
TD - D IG
N
S2 OR S4
S5 S2 = 0
S6 S 3 = 0 .0
T R IP P E D S1 S7
( 39)
S2 OR S8 S1 (3 5)
S9
TD - D IG
N
S 10
ST
S 11 S2 = 0
S1 ( 39) S 3 = 0 .0
S 12
S2 OR S 13
S 14 S1 (3 5)
S 15 TD - D IG N
S1 S 16
( 39)
S2 OR S 17 S2 = 0
S 18 S 3 = 0 .0
S1 = 0 S1 (3 5) C LO S E C O M M A N D
S1 ( 39) TD - D IG
N
S2 OR
S2 = 0
S 3 = 0 .0
S1 ( 39)
S2 OR S1 (3 5) S TA RT C O M M A N D
TD - D IG N
PA F A O U T L
S2 = 0
D M P C LO S E D S1 ( 39) S 3 = 0 .0
S2 OR
S1 (3 5)
TD - D IG N
PA F A O U T L
M TR OV L S1 ( 39)
S2 OR S2 = 0
S 3 = 0 .0
S1 (3 5)
PA F A M TR R U N S1
( 39)
TD -D IG
N
S2 OR
S2 = 0
S 3 = 0 .0
N OT P S1 ( 39)
S2 OR S1 (3 5) OP E N C O M M A N D
TD -D IG
N
S2 = 0
S1 S 3 = 0 .0
( 39)
S2 OR
S1 (3 5)
TD - D IG N
S1 ( 39)
S2 OR S2 = 0
S 3 = 0 .0
S1 ( 39)
S2 OR
S1 ( 39)
S2 OR
PA F A O U T L
D M P OP E N S1 ( 39)
S2 OR
N OT P S1 ( 39)
S2 OR
L A M P TE S T TO OTH E R LO G I C
T01 7 29 A
Figure 88-1 Typical Digital Logic Station Configuration
2VAA000844R0001 J 88-3
Applications 88. Digital Logic Station
88-4 2VAA000844R0001 J
89. Last Block
89. Last Block

The last block function code marks the end of the function block configuration space. The last block function code is a fixed
block located in the highest available block number of the module. The last block cannot be deleted. Additional last blocks
cannot be added to the configuration.
NOTE: This function code is supported only by the BRC-100/200 and the IMMFP11/12 controllers.
In Symphony systems, the last block function code has one output. The output indicates the special operations options
configuration including the module network type, time-stamping, Hnet cable length, and revision checking. Special
operations are documented in the installation section of the individual controller's product instruction.
Outputs
(8 9 )
S1 LA ST
BL O C K
0 - 9999 R Special operations options configuration
Network type
X0X0 = Plant loop
X0X1 = Cnet
X0X3 = Cnet with time-stamping
Hnet cable length (BRC-100/200 only)
X00X = 1200m
X02X = 3000m
X03X = 2000m
X04X = 800m
Revision check (BRC-100/200 only)
00XX = Revision check disabled
10XX = Revision check enabled
Specifications
S1 N 0 I -32,768 - 32,767 Reserved integer
2VAA000844R0001 J 89-1
89. Last Block
89-2 2VAA000844R0001 J
90. Extended Executive
90. Extended Executive

The extended executive block function code defines variables that affect module operations. Function code 90 (FC90) sets
system operation characteristics for modules. Use FC90 with FC81 (executive) and FC82 (segment control) to define
module operations. FC90 resides in fixed block 20 and occupies ten function blocks (20 through 29).
Outputs
EX E X EC Blk Type Description

M F C /P
S1 (9 0 )
H
20
20 R Time of day, hours
M
21
S
22 21 R Time of day, minutes
VT
23
Y
24 22 R Time of day, seconds
MO
25
D
26 23 B Time/date/synchronization flag:
DW
N /A
27 • 0 = time/date invalid
28
N /A
29 • 1 = time/date valid
24 R Calendar, year (0 - 99)
25 R Calendar, month (1 - 12)
26 R Calendar, day (1 - 31)
27 R Calendar, day of week (1 - 7, Sunday = 1)
28 R Reserved
29 R Reserved
Specifications
S1 N 0 I Note 1 Block address of configure mode lockout flag:

• 0 = configure mode allowed
• 1 = configure mode locked out
S2 N 0.250 R 0 to Base periodic I/O sampling period for module (in sec)
9.2 E18
S3 Y2 • BRC300/400/410: 0 I 00000 to Redundancy configuration flag and DCS/SAC interface link:

• HC8007: 20000 22111 • XXXX0 = redundancy configuration flag: no redundancy
• XXXX1 = redundancy configuration flag: redundancy6,7
• XXX0X = module goes to error mode on I/O module trip3
• XXX1X = module halts on I/O module trip
• XX0XX = 5 kbaud DCS/SAC link
• XX1XX = 40 kbaud SAC link
• X0XXX = RS-232 mode4
• X1XXX = RS-485 mode
• X2XXX = both RS-232 and RS-485 modes4
• 0XXXX = expander bus only5
• 2XXXX = both Harmony Net and expander bus, or HN800
S4 Y 15.000 R 0 to Module startup time (in secs)

9.2 E18
S5 N 0.250 R 0 to Logic station poll rate (in secs)

9.2 E18
2VAA000844R0001 J 90-1
Explanation 90. Extended Executive
S6 N 0 I 0 or 1 SYNC: Selects the source of the time stamps for SOE data.
0 = controller uses SOE time stamps for SOE data.
• SPC700 and HC800 controllers use the SOE port to get the
time through Simple Network Time Protocol (SNTP).
• BRC100/200/300/400/410, HAC, and IMMFP11/12
controllers get the time through the SPSET01 Sequence of
Events Time Sync module from SynchroLink.
• BRC100/200/300/400/410 and IMMFP11/12 controllers get
the time through a serial link to a Rochester Recorder.
1 = controller uses PN800 network time or INFI-NET network time
for SOE data.
• SPC700 and HC800 controllers use PN800 time for SOE
data.
• BRC100/200/300/400/410, HAC, and IMMFP11/12
controllers use INFI-NET time for SOE data.
NOTES:
2. Only the redundancy configuration flag and the module mode on I/O module trip selections are tunable.
3. I/O trip (function code 32) is applicable only to Harmony rack I/O modules (expander bus).
4. Applies to the serial port on the controllers, not the SAC/DCS station link.
5. Modification of the I/O interface type out of expander bus only mode is not permitted unless the Harmony net hardware is installed properly.
This setting is not valid for HN800 installations.
6. Redundant BRC-300 controllers on Hnet must be configured for redundancy when used in systems containing NPM22 modules.
7. The redundancy configuration flag must be set to 1 (XXXX1) when using HC800 controllers in a redundant configuration.
90.1 Explanation
S1 – LOCK
Block address of configure mode lockout flag.
0 = configure mode allowed
1 = configuration locked
The default value of S1 is block address zero, which provides unlocked configuration. A logic 1 locks the configuration.
Unless S1 is a block address of a tunable block, once locked, a configuration cannot be unlocked. To change a locked
configuration, the module must be initialized and reconfigured.
NOTE: An engineering lock action may be implemented by using a tunable block as the input to S1. This way the configuration
may be unlocked by authorized persons through tuning the appropriate block.
S2 – IOTIME
Base peer-to-peer network or Controlway/module bus I/O period in seconds. This specification defines the rate at which the
module samples/updates data across the peer-to-peer network or Controlway/module bus. Specification S13 in the
segment control block (function code 82) specifies the I/O period for each segment. If S2 equals two seconds, and S13 (for
a particular segment) equals four seconds, the I/O for that segment is read every four seconds. Specification S13 for each
segment control block should be a multiple of S2, because S2 defines the fastest peer-to-peer network or
Controlway/module bus update time. For example, if S2 equals two and S13 equals 0.5, sample I/O will only be read every
two seconds.
90-2 2VAA000844R0001 J
90. Extended Executive Specifications
S3 – BACKUP
Provides a redundant module configuration flag, sets the module mode on an I/O module trip, sets the DCS interface link
data rate, the serial port mode, and the I/O interface control.
Specification S3 Parameters
Position
Description
X X X X X
X Redundancy configuration flag

• 0 = no redundant module
• 1 = module is part of redundant configuration
The redundancy configuration flag:
• Must be properly configured to ensure the correct operation of the backup status
(BAC) and redundancy link channel failure (R1F and R2F) indications in the
HC800, BRC-100, and HAC controller module status.
• Setting is reflected in the redundancy expected (RDEXP) indication in the
controller status. It is also reflected in the backup configured (BKCFG) indication
in the HC800 and HAC network processor module status.
X Module mode on I/O module trip

• 0 = error mode on I/O module trip
• 1 = halt module on I/O module trip
X Local DCS interface link data rate

• 0 = 5 kbaud DCS/SAC link
• 1 = 40 kbaud SAC link Harmony controller
X Serial port mode

• 0 = RS-232 mode (both ports)
• 1 = RS-485 mode (terminal port, printer port disabled)
X I/O Interface Control

• 0 = expander bus only
• 2 = both Hnet and expander bus, or HN800
The I/O interface control:
• Must be properly configured in order to ensure the correct operation of the Hnet
channel failure and relay fault indications in the controller module status.
• Must be properly configured in order to ensure the correct operation of the Hnet
channel failure fault indications in the controller module status.
• Is not permitted to be configured as (0XXXX) expander bus only mode if
Harmony I/O and Foreign Devices (HART and PROFIBUS) function blocks
(Table A-17) exist in the configuration, or if HN800 is connected.
S4 – START
Module startup time in seconds. Upon startup of the module, fixed block ten in the module has an output of logic 1 for the
length of time specified here. This shows that the startup has been initiated and is proceeding correctly.
S5 – LPOLL
Defines the rate (in seconds) at which logic stations are polled for information.
2VAA000844R0001 J 90-3
Outputs 90. Extended Executive
S6 – SYNC
Selects the source of the time stamps for SOE data.
• 0 = controller uses SOE time stamps for SOE data.
– SPC700 and HC800 controllers use the SOE port to get the time through Simple Network Time Protocol
(SNTP).
– BRC100/200/300/400/410, HAC, and IMMFP11/12 controllers get the time through the IMSET01
Sequence of Events Time Sync module from SynchroLink.
– BRC100/200/300/400/410 and IMMFP11/12 controllers get the time through a serial link to a Rochester
Recorder.
The N+1 output of Function Code 241 will indicate:
• The IMSET01 module status (BRC100/200/300/400/410, HAC, and IMMFP11/12):
the controller is communicating with the IMSET01 module and is getting the time
through SynchroLink, unless a Rochester Recorder is used for SOE data.
• The SOE port status (SPC700 and HC800): the port is operational and getting time
from an SNTP server.
• 1 = controller uses PN800 network time or INFI-NET network time for SOE data.
– SPC700 and HC800 controllers use PN800 time for SOE data.
– BRC100/200/300/400/410, HAC, and IMMFP11/12 controllers use INFI-NET time for SOE data.
The N+1 output of Function Code 241 should mirror Function Code 90 block output 23,
which indicates if the PN800 network time or INFI-NET network time has been synced.
90.1.2 Outputs
20
Displays the hour of the time of day.
21
Displays the minutes of the time of day.
22
Displays the seconds of the time of day.
23
Displays the time and date synchronization flag. The synchronization flag shows if the module is time-synchronized with the
system. The module receives system time from the network processing module or bus interface module on startup. Output
23 is a logic 0 until the module receives the current time.
0 = time/date invalid
1 = time/date valid
24
Displays the calendar year (0 to 99).
25
Displays the calendar month (1 to 12).
26
Displays the calendar day (1 to 31).
27
Displays the day of the week:
1 = Sunday
2 = Monday
3 = Tuesday
4 = Wednesday
5 = Thursday
6 = Friday
7 = Saturday
90-4 2VAA000844R0001 J
90. Extended Executive Example
28 and 29
Reserved.
90.2 Example
90.2.1 Function Block Configuration Required for Time Synchronization
To collect continuous data correctly in a batch configuration, all elements of the system (Batch Historian, PC View, Human
System Interface (HSI), Harmony controllers and Cnet/PN800) must share a system-wide time system. The control system
must have a time master, such as Conductor NT or S+ Operations HSI, to generate a system-wide time base. The PC View
synchronizes with the control system through six tags configured within the Harmony controller. Those six tags (within the
controller) are analog exception report function block (FC30) outputs from an extended executive block that are also
defined within the PC View tag data base. Figure 90-1 shows an example of the function block configuration required for
time-synchronization. The tag names are shown in Table 90-1.
EX EX E C
M FC /P
S1 (9 0 ) S1 (3 0 ) H O U RS (0 - 2 3)
H AO /L 560
20
M
21
S
22
VT
23
Y
24 S1 (3 0 ) M IN UT ES (0 - 5 9)
MO AO /L
25 561
D
26
DW
27
N/A
28
N/A
29 S1 (3 0 ) S EC O ND SS (0 - 5 9)
A O/L TH E S IX AO /L B LO C KS
562 TO T H E LE F T G EN ER AT E
SIX EX C EP T IO N R E PO RTS
TH AT C O N N EC T TO TH E
PC V DATA B AS E . TH E P C V
W ILL U S E T HE SE TAGS TO
S1 (3 0 ) YEAR (0 - 99) TIM E-S YN C H W ITH T H E
A O/L M O DU L E.
563
S1 (3 0 ) M ON T H (1 - 1 2)
AO /L
564
S1 (3 0 ) DAY (1 - 3 1)
AO /L 565
T 01 730 A
Figure 90-1 Configuration Required for PC View Time-Synchronization
Table 90-1 Available PC View Tag Names
Tag Name Description
N90HOUR Current system hours (output 20)
N90MIN Current system minutes (output 21)
N90SEC Current system seconds (output 22)
N90YR Current system year (output 24)
N90MN Current system month (output 25)
2VAA000844R0001 J 90-5
Function Block Configuration Required for Time Synchronization 90. Extended Executive
Table 90-1 Available PC View Tag Names
Tag Name Description
N90DAY Current system day (output 26)

NOTE: Only one module, in any process control unit on
the communication highway, needs to be configured with
time synchronization tags for Batch Historian. The address
of the function blocks and their meaning must match the
correct tag name.
90-6 2VAA000844R0001 J
91. BASIC Configuration (BRC-100/200) Explanation
91. BASIC Configuration (BRC-100/200)

The BASIC configuration function code defines the amount of NVRAM and RAM memory allocated to the BASIC program.
It also defines BASIC operating modes. This function code provides one output that the BASIC program sets using the
BOUT command. The MFC BASIC Programming Language Reference provides complete instructions for programming
the module with BASIC. Only one BASIC configuration function block can be configured per module.
NOTE: This function code is supported only on the BRC-100/200 and the IMMFP11/12 controllers.
Outputs
BA SC F G
(9 1 )
N
N R The BOUT command in the BASIC program sets output N
Specifications
S1 N 1 I 0 or 1 Action on BASIC error:

0 = trip module
1 = write error data to terminal and suspend BASIC
S2 N 1 I 0 or 1 Load/run flag:
0 = auto startup on restart
1 = manual startup on restart
S3 N 1 I Note 1 BASIC string space allocation in 1-kbyte increments (NVRAM)
S4 N 1 I Note 2 BASIC data space allocation in 1-kbyte increments (RAM)
S5 N 1 I 0-63 BASIC program space allocation in 1-kbyte increments (NVRAM)

NOTES:
1. Maximum value is S3 + S5  414.
2. Maximum values is S3 + S4 + S5  1530.
91.1 Explanation
S1 – ERROR
Sets the action taken on a BASIC error.
0 = trip module
1 = write error to data terminal and suspend BASIC
The error writes to the printer or display screen designated in the BASIC program as the data terminal, and the BASIC
program stops.
S2 – LRFLAG
Load/run flag. It defines the action to be taken by the BASIC interpreter when an invoke BASIC function block is executed.
If zero, then the BASIC program contained in EEROM automatically loads into RAM and executes. If one, then the BASIC
interpreter prompts for further action.
0 = auto startup of the invoke BASIC block

1 = manual startup at the invoke BASIC block
S3 – STRSPC
BASIC string space allocation defined in one kilobyte increments. BASIC string space is allocated in RAM memory.
Estimate the amount of required string space from the program's declarations section.
S4 – DATSPC
Sets the BASIC data space allocation defined in one kilobyte increments. Data consists of independent variables and
constants. BASIC data space is allocated in RAM memory. Estimate the amount of required data space from the program's
declarations section.
2VAA000844R0001 J 91-1
Outputs 91. BASIC Configuration (BRC-100/200)
S5 – PGMSPC
Sets the BASIC program space allocation defined in one kilobyte increments. The program consists of a group of functions
that perform specified actions and return values depending on the value of one or more independent variables. BASIC
program space is allocated in both NVRAM and RAM memory. The amount of BASIC program space is the BASIC program
file size.
91.1.2 Outputs
N
Any value from the BASIC program. The BASIC program specifies output N using the BOUT command.
91.2 Application
Figure 91-1 shows a sample of a BASIC program in a module.
BL O C K S 3 1-499 BL O CK S 5 01 -2 04 6
AI/B BA SRO
(91) AI/L (92) (93 ) (2)
BA SC F G IN V BA S A
30 D I/B 5 00 5 40 5 45
D I/L 5 41
AN ALO G LO G IC 5 42 S 1 = 40
D IG ITA L LO G IC
5 43
........
BA SB O
(94)
5 50
5 51
5 52
5 53
........
AO /L
D O /L
BA SIC
BIN BO U T
PR O G RA M
M IL LISE C O N D C LO C K T 01 7 31 A
Figure 91-1 Typical BASIC Configuration
Step 1
Place function code 91 (configure BASIC) in block 30. Placement of this function code is user selected.
S1 = 1
Write any errors to the data terminal and suspend BASIC.
S2 = 1
BASIC interpreter prompts for action before running the program. BASIC provides a ready reply when addressed by a dumb
terminal or personal computer. Specification S2 equals one while it is being programmed. After programming is complete,
change S2 to zero. When S2 equals zero, the program runs automatically on module power up.
S3 = 1 = 1k of string space allotted.

S4 = 5 = 5k of data space allotted.
S5 = 10 = 10k of program space allotted.
Step 2
Place function code 92 (invoke BASIC) in block 500. Placement of this function code is user selected.
S1 = 1
This block invokes BASIC when executed. Control returns to the next numbered block when BASIC exits.
Step 3
Place the module in execute mode. The ready reply shows on the display. Enter the BASIC statements. Remember to save
the BASIC program before changing S2 in block 30 to zero.
91-2 2VAA000844R0001 J
92. Invoke BASIC Explanation
92. Invoke BASIC

The invoke BASIC function code causes the controller BASIC interpreter to execute. If automatic load/run has been
selected in the configure BASIC function block, the interpreter runs the program. Otherwise it prompts for further action.
This block must be in the same segment as the configure BASIC block. A function block segment can contain multiple
invoke BASIC blocks, each of which will initiate execution of the BASIC program. This function code provides one output
that is selected in the BASIC program with the BOUT command. Figure 92-1 shows a sample BASIC configuration.
Reference the MFC BASIC Programming Language Reference for instructions on programming with BASIC.
NOTE: This function code is supported only on the BRC-100 and the IMMFP11/12 controllers.
Outputs
(9 2 )
IN V BA S N
N R The BOUT command in the BASIC program sets output N
Specifications
S1 Y 0.000 R Full Initiates execution of the BASIC program by pro-

viding a value for SYSVAR
92.1 Explanation
This block initiates execution of the BASIC program by assigning a value to the BASIC variable SYSVAR. SYSVAR is then
either an input to the BASIC program itself or selects the entry point of a BASIC program as shown by examples one and
two. Figure 92-1 shows a typical controller BASIC configuration.
B LO C K S 3 1-499 BL O C K S 5 01 -204 6
A I/B B A SR O
(91) A I/L (92 ) (93) (2 )
BA SC F G 30
IN V BA S A
D I/B 500 54 0 54 5
D I/L 54 1
A N A LO G LO G IC 54 2 S1 = 40
D IG ITA L LO G IC
54 3
........
BA S B O
(9 4)
55 0
55 1
55 2
55 3
........
A O /L
D O /L
BA S IC
BI N BO U T
PR O G R A M
M IL LISE C O N D C LO C K T01 7 31A
Figure 92-1 Typical BASIC Configuration
92.1.1 Example 1
When SYSVAR is an input, assume:
S1 equals 2 and the first function containing SYSVAR is:

100 A = SYSVAR * 10,
the program begins executing at line 100 and A equals 20.
If there are more than one invoke BASIC block configured, the value of S1 can remain the same or be different in each one.
2VAA000844R0001 J 92-1
Example 2 92. Invoke BASIC
For example, if the second invoke BASIC block has S1 equals three, then A equals 30 for that particular iteration of the
program, etc.
92.1.2 Example 2
SYSVAR selects the entry point of a BASIC program:
10 ON SYSVAR GOTO 100...

Every time the program receives a value for SYSVAR, it goes to line 100 and begins execution. When using SYSVAR in this
manner (as a trigger), its value is unimportant.
92-2 2VAA000844R0001 J
93. BASIC Real Output Application
93. BASIC Real Output

The BASIC real output function code provides a means of transmitting real data values from the BASIC, Batch 90 and
C Language programs to other function blocks. There are no specifications for this block. The BOUT command in the
program defines the four outputs. Figure 0-1 shows a sample BASIC configuration. Refer to the MFC BASIC Programming
Language Reference for instructions on programming with BASIC.
Outputs
BA SR O Blk Type Description

(9 3 )
N
N+1
N R Program command BOUT sets the output value
N+2
N+3 N+1 R
N+2 R
N+3 R
Specifications
S1 N 0 I Full Not used
93.1 Application
Syntax:
BOUT <block number>, <value> BOUT 40, 4.75

where:
<block number = Valid integer block number
> configured in the target module.
<value> = Arithmetic expression stored as the
block output.
2VAA000844R0001 J 93-1
Application 93. BASIC Real Output
BL O C K S 3 1-4 99 B L O C K S 5 01 -204 6
AI/B BA S R O
(9 1) AI/L (92) (93) (2)
BA SC F G IN V B A S A
30 D I/B 5 00 5 40 54 5
D I/L 5 41
AN ALO G L O G IC 5 42 S 1 = 40
D IG ITA L L O G IC
5 43
........
BASBO
(94)
550
551
552
553
........
AO /L
D O /L
B A S IC
BIN BO U T
PR O G R A M
M IL LISE C O N D C LO C K T 01 7 3 1 A
Figure 0-1. Typical BASIC Configuration
93-2 2VAA000844R0001 J
94. BASIC Boolean Output

The BASIC boolean output (BASBO) function code provides a means of transmitting boolean data values from BASIC,
Batch 90, or C Language to other function blocks. There are no specifications for this block. The BOUT command in the
program defines the four outputs.
For instructions on programming the modules, refer to:

• MFC BASIC Programming Language Reference.
• Batch 90 and User Defined Function (UDF) Programming Language Reference.
• C Utility Program.
Outputs
BA SB O
(9 4 )
N
N+1
N+2
N B Program command BOUT sets the output value
N+3
N+1 B
N+2 B
N+3 B
Specifications
2VAA000844R0001 J 94-1
94-2 2VAA000844R0001 J
95. Module Status Monitor
95. Module Status Monitor

This function code monitors the status of a designated node or module. A module either monitors the status of itself or
another module in the same HCU, or another HAC controller on the same peer-to-peer network (HAC only). Function code
95 monitors selected bits from one of the five or 16 module status bytes. Specification S3 identifies the status byte, and S5
through S12 identify the bits to be monitored. Module mode can be monitored by selecting S4 equals one. If the
communication status of the target module is good, it sets the output quality to good, and outputs a logical ORed value. The
values of the selected bits in the status byte determine the logical ORed output. If the communication status of the target
module is bad, it sets the output quality to bad and the output value is a logic 1. This block generates a problem report when
a communication failure exists.
This function code is only partially supported with HPC800 and SPC700 controllers.
Outputs
(9 5 )
M O D ST N
N B Selected quality and value:

0 = good
1 = bad
Specifications
S1 Y 0.000 R Note 1 Sample period (in seconds)
S2 N 0 I Note 2 Target node/module address
S3 Y 0 I 0 - 4 or Module status byte number (refer to Appendix I

0 - 15 and note following S3 explanation)
S4 Y3 0 I 00,01,10 Configuration flags:

or 11 Target offline detection flag:
X0 = no
X1 = yes
Target rank (HAC only)
0X = monitor primary module status
1X = monitor backup module status4
S5 Y 0 I 0 or 1 Bit 0 of selected monitored byte:

0 = no
1 = yes

0 = no
1 = yes

0 = no
1 = yes

0 = no
1 = yes

0 = no
1 = yes

0 = no
1 = yes
2VAA000844R0001 J 95-1
Explanation 95. Module Status Monitor

0 = no
1 = yes

0 = no
1 = yes
NOTES:
1. The range is the positive real value range, however the practical lower limit is determined by the Base
periodic I/O sampling period defined in the extended executive (FC 90, block 20, S2).
2. Range values are: 0-31 for the BRC-100, IMMFP11/12
1-250 for the HAC
3. The tens digit of S4 is non tunable.
4. Valid only when S2 is configured to monitor the same node address as the controller in which the
function code 95 resides.
95.1 Explanation
S1 – MBRD
Peer-to-peer network or the Controlway/module bus read time in seconds. This defines the frequency of reading the module
status byte. The system allows tuning of the value shown for the update period. However, the original peer-to-peer network
or Controlway/module bus sample period will be retained. To change the update period, the module must be placed in
configure mode.
S2 – MADR
Address of the target module.
NOTE: Setting S2 to the same node/module address as the node/module address of the controller in which the FC 95 resides
causes FC 95 to monitor the module status of that controller directly without generating any peer-to-peer network or Control-
way/module bus message traffic.
NOTE: HPC800 and SPC700 controller usage: FC 95 may only be used to monitor status of the HPC800 and SPC700 controllers
in which the FC 95 resides. It cannot be used to monitor the status of other modules. Use FC 207 and FC 226 to monitor the status
of other modules.
S3 – SBYTE
Module status byte number. This defines which of the five or 16 module status bytes (numbered from zero to four or zero to
15) will be monitored.
NOTE: The correct value for S3 can be obtained by subtracting one from the byte numbers found in the appendix for the controller
being used.
Refer to proper controller appendix for more information on module status bytes.
S4 – OFFDET
Identifies if module mode status is part of the information monitored.
0 = no
1 = yes
When the ones digit of S4 equals one, a signal identifying module mode is part of the input to the logical OR to produce the
output. The signal is a zero when the module is in execute mode, and a one when the module is in configure or error mode.
In the HAC controller, the tens digit of S4 allows the user to specify which controller of a redundant pair of HACs is to be
monitored.
0X = Monitor primary module status.

1X = Monitor backup module status. Valid only when S2 is configured to monitor the same node
address as the controller in which the function code 95 resides.
NOTE: When utilizing FC95 to monitor the module status of the backup HAC (FC95, S4 = 1X), S8 of FC57 must be set to account
for the backup as a separate node.
95-2 2VAA000844R0001 J
95. Module Status Monitor Specifications
S5 through S12
BIT0 to BIT7
Bit selection inputs for the eight bits in the module status monitored byte.
If: BITn = 0, the bit is not monitored

If: BITn = 1, the bit is monitored
This function code logically ANDs S5 through S12 with the eight bits of the module status byte. The values resulting from
that action are then logically ORed to produce the output value. The equivalent circuit in Figure 95-2 illustrates this action. If
the values are:
Figure 95-1 Example Bit Values
The values are logically ORed, producing an output of logic 1 since at least one of the inputs equals logic 1.
B IT 0 A
(37 )
S5 N
D
B IT 1 A
(37)
S6 N
D
B IT 2 A
(37)
S7 N
D
B IT 3 A
(37)
S8 N
D
O U TPU T
OR VAL U E =
0 OR 1
B IT 4 A
(37)
S9 N
D
B IT 5 A
(37)
S 10 N
D M OD UL E
M OD E
S TATU S
IF D E SIR ED
B IT 6 A
(37)
S 11 N
D
B IT 7 A
(37)
S 12 N
D
T 01 73 3A
Figure 95-2 Equivalent Circuit
2VAA000844R0001 J 95-3
Specifications 95. Module Status Monitor
95-4 2VAA000844R0001 J
96. Redundant Analog Input Explanation
96. Redundant Analog Input

The redundant analog input (REDAI) function code is a transfer between a pair of redundant analog signals. An external
logic select input <S3> controls the transfer. The output value is equal to the input value selected with <S3>.
Function code 96 checks the difference between the two inputs and the rate of change of the selected input. Output quality
is bad if the quality of the selected input is bad, if the rate of change exceeds the rate limit specified by S5, or if the
difference between the two inputs is larger than S4. To test the quality of the signal, include a function code 31 (test quality)
block in the configuration. The quality of the point cannot be used as an input to any other type of block. However, the
output value can be used as an input to other blocks. Refer to Appendix J, for a definition of point quality.
Outputs
R EDA I
S1 (9 6 )
1
S2 N
S3
2 Blk Type Description
S
N R Output N = <S1> if <S3> = 0

Output N = <S2> if <S3> = 1
Specifications
S3 N 0 I Note 1 Block address of select input; 0 = <S1>, 1 = <S2>
S4 Y 9.2 E18 R Full Deviation limit (same units as <S1> and <S2>)
S5 Y 9.2 E18 R Full Rate limit (same units as <S1> and <S2> per sec)
S6 Y 9.2 E18 R Full Rate error deadband (same units as <S1> and
<S2>)
NOTE:
96.1 Explanation
S1 – X1
Block address of first input.
S2 – X2
Block address of second input.
S3 – SELCT
Block address of select input. The value in this block determines which input (<S1> or <S2>) is the output.
0 = output <S1>
1 = output <S2>
S4 – DEV
Maximum deviation permitted between <S1> and <S2>. This applies when both <S1> and <S2> are good quality.
S5 – RATE
Maximum allowable rate of change per second for the selected input (same units as <S1> and <S2> per second). If the rate
of change minus S6 exceeds S5, output quality is bad.
2VAA000844R0001 J 96-1
Logic Flow 96. Redundant Analog Input
S6 – DBAND
Defines the deadband for the rate limit. When the rate exceeds the rate limit plus S6, output quality is bad. The deadband
prevents excessive bad quality readings when the rate is hovering around the limit.
96.2 Logic Flow
If <S3> = 0; output value and quality = <S1> with quality

If <S3> = 1; output value and quality = <S2> with quality
If <S1> and <S2> quality = good, and <S1> – <S2> > S4;
output quality = 1 (bad)
If rate of change of output > S5 + S6; output quality = 1 (bad)
where:
<S1> = Value of first input.
<S2> = Value of second input.
<S3> = Value of select input.
0 = <S1>.
1 = <S2>.
S4 = Deviation limit.
S5 = Rate limit.
S6 = Rate deadband.
96.3 Applications
Function code 96 relies on external logic to select and output one of two redundant analog inputs. Figure 96-1 shows the
configuration for the output of a function code 98 controlling the selection. When the active module in the slave select block
changes from module one to module two, the active input to the redundant analog input block switches from the first input
<S1> to the second input <S2>. Configuring the blocks so that inputs one and two are received from modules one and two,
respectively, ensures that if one module goes bad, the redundant analog input automatically switches to the good module.
R E D U N DA N T
A N ALO G IN P U TS
R E DA I
S1 (96) OUTPUT
1
S2 165 VALU E
SL S E L 2
S1 (98) S3
SL 3
S2 160
I
S3 161
S4
S5
S6
S7
S8
S9
T 01 73 4 A
Figure 96-1 Choosing Between Redundant Analog Inputs
96-2 2VAA000844R0001 J
97. Redundant Digital Input Applications
97. Redundant Digital Input

The redundant digital input function code selects and transfers a pair of redundant boolean signals. An external logic select
input <S3> controls the transfer. The output value is equal to the input value selected with <S3>.
Function code 97 monitors the action of the two inputs <S1> and <S2>. Output quality is bad if the quality of the selected
input is bad or if there is a difference between the two inputs when both have good quality. To test the quality of the signal,
include a function code 31 in the configuration. The quality of the point cannot be used as an input to any other type of
block. However, the output value can be used as an input to other blocks. Refer to Appendix J, for a definition of point
quality.
Outputs
R ED D I
S1 (9 7 )
1
S2
2
S3
S
N B Output N = <S1> if <S3> = 0
Output N = <S2> if <S3> = 1
Specifications
S3 N 0 I Note 1 Block address of select input; 0 = <S1>, 1 = <S2>

NOTE:
97.1 Applications
Function code 97 depends on external logic to select and output one of two redundant boolean inputs. The configuration
shown in Figure 97-1 illustrates the output of a function code 98 controlling the selection. If the active module in the function
code 98 changes from module one to module two, then the active input in the function code 97 block switches from input
one to input two. Configuring the blocks so that inputs one and two correspond to modules one and two ensures that if one
module goes bad, the input from the other module will automatically be read.
R ED U NDA NT
D IG ITAL IN P UT S
R E DD I
S1 (96 ) OU T PU T
1
S2 1 55 VALU E
SLSE L 2
S1 (9 8) S3
SL 3
S2 15 0
I
S3 15 1
S4
S5
S6
S7
S8
S9
T0173 5A
Figure 97-1 Choose Between Redundant Digital Signals Based on Module Quality
2VAA000844R0001 J 97-1
Applications 97. Redundant Digital Input
97-2 2VAA000844R0001 J
98. Slave Select Specifications
98. Slave Select

The slave select function code monitors a pair of redundant I/O module function blocks. Specification S9 is a toggle input
that switches from one module to the other when both modules are good.
The block has two outputs, select (N) and interlock (N+1). The select output identifies the active module, and the interlock
indicates when both modules are bad.
Outputs
SL SEL Blk Type Description

S1 (9 8 )
SL
N
S2
I N B Module selected:
S3 N+1
S4
0 = module 1
S5 1 = module 2
S6 Initial value is zero. Value changes only if the active module
S7 is bad and the inactive module is good, or if both modules
S8
are good and the toggle input makes a 0 to 1 transition.
S9
N+1 B Interlock:
0 = one or both modules good
1 = both modules bad
Specifications
S1 N 0 I Note 1 Block address of boolean status for module 1
S3 N 0 I Note 1 Block address of I/O, boolean or real with quality, for

module 1

module 1

module 2

module 2
S9 N 0 I Note 1 Block address of toggle input (if both modules are

good, a 0 to 1 transition on this input changes state of
the select output)
NOTE:
98.1 Specifications
S1 – STTSA1
Block address of the boolean status for module one. Each module has a status associated with it that defines if the I/O
carried by the module is valid. Function codes 79 and 83 provide the module status outputs.
S2 – STTSB1
Block address of the boolean status for module one. There are two status specifications for each module because
IMDSO14 handles two groups of eight outputs. Function code 83 provides the status on groups of eight points only.
Therefore, if redundant modules are to be monitored, there must be a function code 83 block configured for each group of
2VAA000844R0001 J 98-1
Specifications 98. Slave Select
eight outputs. A similar configuration exists for IMDSI12, IMDSI13, IMDSI14, IMDSI15, and IMDSI22 modules used for
inputs. If either <S1> or <S2> goes to one, control transfers to module two.
S3 – QIOA1
Block address of the I/O quality for module one. Specifications S3 and S4 define the blocks containing the boolean or real
I/O for module one. If the quality of <S3> or <S4> goes bad, control will be transferred to module two, providing it is good
quality. If both modules are bad quality, the output is the value from module one, but output N+1 equals logic 1 (both
modules are bad). Figure 98-1 shows how to transfer an active I/O module if an analog output goes bad.
S4 – QIOB1
Block address of the I/O quality for module one (same as S3).
S5 – STTSA2
Block address of the boolean status for module two (refer to S1 description).
S6 – STTSB2
Block address of the boolean status for module two (refer to S2 description).
S7 – QIOA2
Block address of the quality for module two (refer to S3 description).
CISI/O
(79)
220
221
222
223
224
ANALOG OUTPUT 1 S10
225
ANALOG OUTPUT 2 S11
226
227
S15
S16
S17
S18 SLSEL
S1 (98)
SL
229 S2 260
I
S3 261
S4
S5
S6
S7
S8
S9
CISI/O
(79)
240
241
242
243
244
ANALOG OUTPUT 1 S10
(50)
245
ON/OFF
255
ANALOG OUTPUT 2 S11
246
247
248
S15
S16
S17
S18
249
T01737B
Figure 98-1 Transfer Active I/O Module if an Analog Output Goes Bad
98-2 2VAA000844R0001 J
98. Slave Select Applications
S8 – QIOB2
Block address of the quality for module two (refer to S3 description).
S9 – TOGGLE
Block address of the toggle input. If both modules are good, a logic 0 to 1 transition of <S9> transfers control to the standby
module.
98.2 Applications
Figure 98-2 shows the configuration of a slave select block controlling the redundant analog input (function code 96). The
analog input selected depends on the module selected in the slave select. This configuration also shows the interlock (N+1)
forcing the output value to a predetermined safe value in the event that both modules are bad.
IN P U T F R O M M O D U L E 1
IN P U T F R O M M O D U L E 2
R E DA I
S1 (96 ) S1
1
S2 2 05 S2 (1 3) O U TP U T
SL SE L 2 T-IN T
S1 (98 ) S3 S3 2 15 VAL U E
SL 3
S2 2 00
I
S3 2 01
S4
S5 S AF E VA LU E
S6
S7 (2)
A
S8 2 10
S9
T 01 740 A
Figure 98-2 Controlling an Analog Output
2VAA000844R0001 J 98-3
Applications 98. Slave Select
98-4 2VAA000844R0001 J
99. Sequence of Events Log Explanation
99. Sequence of Events Log

This block enables a module to communicate with a sequential events recorder (SER). The sequence of events (SOE) log
buffers event data received from the SER recorder for human system interface (HSI) access. Five types of SOE logs can be
generated: standard, summary, prefault, postfault and snapshot. Each SOE log holds only one type of report, and the report
includes data on all points configured in the SER recorder to be that type. Each block is independent and relies only on a
common serial link to acquire event data. The SOE log function code specifies buffer size and the age of the event data in
the buffer. Configure a single block for each log type, buffer size and age.
The sequence of events log sets local I/O module status to bad and generates a module problem report when the sequence
of events recorder global I/O status is bad (i.e., input check failure). Output block N remains good quality on this failure.
Outputs
SO E LO G
(9 9 )
N B Events logged flag:
N
0 = no
1 = yes
Specifications
S1 N 0 I 0-4 Qualifier for sequence of events recorder data received

buffer storage:
0 = standard
1 = summary
2 = prefault
3 = postfault
4 = snapshot
S2 N 256 I 0 - 3,500 Number of events that fit in buffer:

buffer size = 9(S2+1)
S3 N 360 I 0 - 32,767 Age of event data (in secs) before discarded from buffer
99.1 Explanation
Function code 99 provides a communication link between the SER recorder and an interface device such as a console or
computer. Data cannot be sent directly from the recorder to interface devices. The interface must be configured to print the
event data received from the module. See the operators manual for the interface device to determine how to configure it to
receive sequence of events data. Each sequence of events log in the module has an associated sequence of events
configuration in the interface device. The sequence of events log is an exception report block with the same report type and
size as a remote control memory (function code 62) exception report. The remote control memory command from the
interface device requests a summary report.
NOTE: Dedicate the module used for sequence of events reporting to SER functions only. It cannot be configured for redundancy,
BASIC, C language, batch or user defined functions.
The SER recorder is capable of handling up to 512 I/O points. The SER recorder defines point report types for all points.
There are five report types available (standard, summary, prefault, postfault and snapshot).
S1 – LOG TYPE
Qualifier for SER recorder event data buffer storage.
0 = standard
1 = summary
2 = prefault
2VAA000844R0001 J 99-1
Outputs 99. Sequence of Events Log
3 = postfault
4 = snapshot
Standard
The standard type reports any standard SER recorder point change of state. Changes from normal-to-alarm or from alarm-
to-normal result in a time-tagged report generated for that point. The results are stored in the module for the length of time
specified by S3.
Summary
The summary report is generated on an operator demand from the interface device. This is a time-tagged report listing all
SER recorder points that are not normal (i.e., inactive, deleted from scan, or in alarm). A remote control memory display
type should be configured in the interface device to force the output of this function code to a one to request this summary
data collection.
Prefault
The prefault mode stores the points when they change state. Up to 1,000 predefined events and a specified time window
(up to 24 hours) limit the data stored. For example, this report can be configured to list the last 50 events prior to the prefault
trigger, or all events occurring up to ten minutes before the prefault trigger. The trigger is a false to true signal resulting from
an event or a series of events. When the trigger occurs, all of the stored data reports, with the oldest stored data reported
first. The memory then begins saving new data. The new data will not be reported until the trigger outputs a false to true
signal again.
Postfault
The postfault mode reports points when they change state, but only after the postfault trigger turns true. These points will be
reported until the postfault trigger turns false, or the operator cancels the postfault state.
Snapshot
Snapshot inputs are typically a group of related points. These points, like any point in the system, can be in the alarm,
normal, deleted, or inactive state at any one time. When the snapshot trigger turns true, a report generates detailing the
status of the designated snapshot points in numerical point order. Another report generates the next time the snapshot
trigger outputs a false to true signal.
All points defined in the SER recorder as a certain type will be saved in the buffer of the sequence of events log defined as
the same type. For example, if this log is a standard log (zero), all points defined in the SER recorder as standard are sent
to this buffer.
S2 – EVENT NO.
Number of events that fit in the buffer. Each log has a separate buffer that holds a specific number of point values. The
buffer is in RAM memory, and the buffer size determines RAM memory utilization.
buffer size  9(S2  1)
S3 – AGE
Maximum age in seconds of the event data in the buffer. After data has been in the buffer for this length of time, it is
removed from the buffer. The buffer age is reset to zero every time an event for the specified log occurs.
A new and unique buffer age time is attached to each event saved in the buffer. Older events are therefore removed from
the buffer before newer events when their buffer age time expires. Any data stored in the buffer is guaranteed to stay in the
buffer for the configured age time.
Specifications S2 and S3 are closely related to the interface device configuration. These parameters control the amount of
data the interface device can receive when a trip occurs. The interface device must be configured to provide a fast enough
data transfer rate to remove the event data from the buffer before S3 is reached. Once S3 is reached, the data is erased.
99.1.2 Outputs
N
Events logged flag.
0 = no
1 = yes
Output N shows whether the buffer currently contains data received from the SER recorder. The output goes to one every
time information is fed to the block from the SER recorder, and returns to zero when all the data has aged (S3) and is
erased.
If multiple or oscillating events occur, the new data is saved in the buffer with a new age time (S3). Then, the output remains
a one until all new data in the buffer is aged. If new data continues to filter in at a period less than S3, the output never goes
to zero.
NOTE: A console report will not print until this output goes to zero.
99-2 2VAA000844R0001 J
100. Digital Output Readback Check
100. Digital Output Readback Check

This function code checks the operation of a digital output group. It compares the digital output values with those typically
read back via a digital input group.
Outputs
D O R EA D
S1 (1 00 )
S2 N
S4
S5 N B Status:
S6
0 = all digital outputs match digital inputs
S7
S8 1 = one or more digital outputs do not match digital inputs
S9
S10
S11
S12
S13
S14
Specifications
S15
S16
S1 N 0 I Note 1 Block address of DO value 1
S2 N 0 I Note 1 Block address of DI readback value 1

NOTE:
2VAA000844R0001 J 100-1
Explanation 100. Digital Output Readback Check
100.1 Explanation
Figure 100-1 illustrates the internal logic of function code 100. Function code 100 performs internal exclusive OR functions
on eight digital output and digital input pairs. The exclusive ORs require that both inputs be the same for the output to equal
logic 0. If the inputs to the exclusive OR are not the same, the output equals logic 1.
S1
S2 XOR
S3
S4 XOR
S5
S6 XOR
S7 0 = O U TP UT A ND
S8 XOR INP U T R E AD B AC K
VALU E S MAT CH
OR
S9
XOR 1 = O NE OR
S 10
M O RE VA LU E S
M ISM ATC HE D
S 11
S 12 XOR
S 13
S 14 XOR
S 15
S 16 XOR
T01741 A
Figure 100-1 Internal Logic
100-2 2VAA000844R0001 J
101. Exclusive OR
101. Exclusive OR
The exclusive OR function code performs the logical exclusive OR function of two inputs. Function code 101 gives an
output of logic 1 when one of two inputs equals logic 1, but not when both equal logic 1 or logic 0.
Outputs
S1 (1 0 1 )
S2 XO R
N
N B Refer to Table 101-1
Table 101-1 Exclusive OR Truth Table
<S1> <S2> Output N
0 0 0
0 1 1
1 0 1
1 1 0
Specifications

NOTE:
2VAA000844R0001 J 101-1
101. Exclusive OR
101-2 2VAA000844R0001 J
102. Pulse Input/Period Explanation
102. Pulse Input/Period

The pulse input/period function code interfaces a controller to a selected channel of an IMDSM04 pulse input I/O module.
The IMDSM04 module conditions, converts and processes pulse inputs into analog signals. It has eight input channels
whose inputs can be processed in three modes: period, frequency or totalization. Function code 102 processes a signal in
the period mode. Function codes 103 and 104 process signals in the frequency and totalization modes, respectively.
Function code 109 processes the duration of the input pulses. Each input channel must have one and only one pulse input
block configured.
Outputs
PIP ER Blk Type Description

(1 0 2 )
H
N
P
N+1 N R Period (seconds) gain
L
N+2
ST
N+3 N+1 B Period high alarm:
0 = no alarm
1 = high alarm
N+2 B Period low alarm:

0 = no alarm
1 = low alarm
N+3 B I/O module communication status:

0 = good
1 = bad
Specifications
S2 N 1 I 1-8 Selected channel
S3 N 0 B 0 or 1 Pulse trigger level:

0 = low to high transitions
1 = high to low transitions
S4 N 1 I 1-6 Expected period range:

1 = 0.1 msec - 6.553 secs,  0.1 msec
2 = 1.0 msec - 65.53 secs,  1.0 msec
3 = 10.0 msecs - 655.3 secs,  10.0 msecs
4 = 0.1 sec - 6.553 ksecs,  0.1 sec
5 = 1.0 sec - 65.53 ksecs,  1.0 sec
6 = 10.0 secs - 655.3 ksecs,  10.0 secs
S5 Y 1.000 R Full Gain
S7 Y -9.2 R Full Low alarm value

E18
102.1 Explanation
In the period mode, a counter measures the time between input pulses. Specification S4 configures the expected period
range. There are six ranges available with range one having the highest resolution and range six having the lowest
resolution. The pulse trigger transition can be configured to respond to either the rising or falling portion of the signal with
S3. Specification S5 scales the determined period. The determined period is tested against specified high (S6) and low (S7)
alarm values.
2VAA000844R0001 J 102-1
Specifications 102. Pulse Input/Period
S1 – SLVADR
Expander bus I/O module address of the IMDSM04 module. Valid addresses are zero to 63.
S2 – CHNL
Identifies the input channel being monitored. IMDSM04 modules have eight input channels. Refer to the IMDSM04 Pulse
Input Module product instruction to identify the channel associated with each input.
S3 – PTRIG
Defines the type of signal transition that triggers the counter response.
0 = response on low to high transitions

1 = response on high to low transitions
S4 – RANGE
Defines the range within which the period of the input pulse is expected to fall. There are six period ranges. Resolution
decreases from range one to six.
1 = 0.1 millisecond to 6.553 seconds,  0.1 millisecond

2 = 1.0 millisecond to 65.53 seconds,  1.0 millisecond
3 = 10.0 milliseconds to 655.3 seconds,  10.0 milliseconds
4 = 0.1 second to 6.553 kiloseconds,  0.1 second
5 = 1.0 second to 65.53 kiloseconds,  1.0 second
6 = 10.0 seconds to 655.3 kiloseconds,  10.0 seconds
NOTES:
1. If the period of the input pulse becomes larger than the expected range, output N goes to zero. This can be used to indicate a
loss of input signal.
2. If the input pulse becomes smaller than the expected range, the output oscillates between 0.0 and the smallest measurable
period for the selected range.
S5 – K
Defines the gain multiplier. The gain multiplier is the value used to scale the output to a value that is meaningful to the
system.
S6 – HALRM
Value of the output that causes the high alarm output to go to one. Specification S6 is dependent on the values chosen with
S4 and S5.
Output = period(gain)
S7 – LALRM
Value of the output that causes the low alarm output to go to one. Specification S7 is dependent on the values chosen with
S4 and S5.
Output = period(gain)
S8
Reserved.
102.1.2 Outputs
N
Real value representing the period (in seconds) times the gain.
NOTES:
1. If the period of the input pulse becomes larger than the expected range, output N goes to zero. This can be used to indicate a
loss of input signal.
2. If the input pulse becomes smaller than the expected range, the output oscillates between 0.0 and the smallest measurable
period for the selected range.
102-2 2VAA000844R0001 J
102. Pulse Input/Period Outputs
N+1
High alarm indicator.
0 = no alarm
1 = high alarm
N+2
Low alarm indicator.
0 = no alarm
1 = low alarm
N+3
I/O module communication status.
0 = good
1 = bad
I/O modules are bad if:
• There is an illegal I/O module response.
• There is no I/O module response.
or
• An input pulse has not been received.
2VAA000844R0001 J 102-3
Outputs 102. Pulse Input/Period
102-4 2VAA000844R0001 J
103. Pulse Input/Frequency Explanation
103. Pulse Input/Frequency

The pulse input/frequency function code interfaces a controller to a selected channel of an IMDSM04 Pulse Input Module.
The IMDSM04 module conditions, converts and processes pulse inputs into analog signals. It has eight inputs that can be
processed in three modes: period, frequency and totalization. Function code 103 configures a signal to output a frequency
value. Function codes 102 and 104 process signals in the period and totalization modes, respectively. Function code 109
processes the duration of the input pulses. Each input channel must have only one pulse input block configured.
Outputs
PIF R E Q Blk Type Description

(1 0 3 )
F
N
H
N+1 N R Frequency (Hz)  gain
L
N+2
ST
N+3 N+1 B Frequency high alarm:
0 = no alarm
1 = high alarm
N+2 B Frequency low alarm:

0 = no alarm
1 = low alarm

0 = good
1 = bad
Specifications

S4 N 1 I 1-6 Expected frequency range:

1 = 0.15 mHz - 10 mHz,  0.01 mHz
2 = 1.5 mHz - 100 mHz,  0.1 mHz
3 = 15 mHz - 1.0 Hz,  1 mHz
4 = 0.1 Hz - 6.55 kHz,  0.1 Hz
5 = 1.0 Hz - 50 kHz,  1.0 Hz
6 = 10.0 Hz - 50 kHz,  10.0 Hz
S7 Y -9.2 E18 R Full Low alarm value
103.1 Explanation
In the frequency mode, a counter records the number of input pulses or cycles that occur per second. The expected
frequency range is configurable with S4. There are six frequency ranges available with range one having the highest
resolution ( 0.15 millihertz) but smallest span, compared to range six with the lowest resolution (10.0 hertz) but largest
span. The pulse trigger transition can be configured to respond to either the rising or falling portion of the signal with S3.
The determined frequency is scaled with S5 and tested against specified high and low alarm values specified by S6 and S7.
2VAA000844R0001 J 103-1
Specifications 103. Pulse Input/Frequency
S1 – SLVADR
Expander bus I/O module address of the IMDSM04 module. Valid addresses are zero through 63.
S2 – CHNL
S3 – PTRIG

S4 – RANGE
Defines the range within which the frequency of the input pulses is expected to fall. There are six frequency ranges shown
below. Resolution decreases from range one to six.
1 = 0.15 millihertz to 10 millihertz,  0.01 millihertz

2 = 1.5 millihertz to 100 millihertz,  0.1 millihertz
3 = 15 millihertz to 1.0 hertz,  1.0 millihertz
4 = 0.1 hertz to 6.55 kilohertz,  0.1 hertz
5 = 1.0 hertz to 50 kilohertz,  1.0 hertz
6 = 10.0 hertz to 50 kilohertz,  10.0 hertz
If the frequency goes above the expected range (ranges one through six), the output stops with the last valid frequency and
the I/O module communication status becomes a logic 1. This also occurs on ranges one, two and three if the frequency
goes below the expected range.
S5 – K
Defines the gain multiplier. Gain scales the output to a useful value.
S6 – HALRM
High alarm output (N+1 equals logic 1). Specification S6 is dependent on the values chosen with S4 and S5.
Output = frequency(gain)
S7 – LALRM
Low alarm output (N+2 equals logic 1). Specification S7 is dependent on the values chosen with S4 and S5.
Output = frequency(gain)
S8
Reserved.
103.1.2 Outputs
N
Real value representing the frequency (in hertz) times the gain.
N+1
High alarm.
0 = no alarm
1 = high alarm
N+2
Low alarm.
0 = no alarm
1 = low alarm
N+3
103-2 2VAA000844R0001 J
103. Pulse Input/Frequency Outputs
0 = good
1 = bad
The I/O module is marked bad if:
• There is an illegal I/O module response or no I/O module response.
• No pulses have been received yet.
• The frequency exceeds the expected range.
• The frequency goes below the expected range for S4 equal to one, two or three.
2VAA000844R0001 J 103-3
Outputs 103. Pulse Input/Frequency
103-4 2VAA000844R0001 J
104. Pulse Input/Totalization Explanation
104. Pulse Input/Totalization

The pulse input/totalization function code interfaces a controller to a selected channel of an IMDSM04 pulse input slave
module. The IMDSM04 module conditions, converts and processes pulse inputs into analog signals. It has eight inputs that
can be processed in three modes: period, frequency and totalization. Function code 104 configures a signal to output a
totalized value. Function codes 102 and 103 process signals in the period and frequency modes, respectively. Function
code 109 processes the duration of the input pulses. Each input channel must have only one pulse input block configured.
Outputs
PITO T
S6 (1 0 4 ) Blk Type Description
R T
S7 N
H A
N+1 N R Current totalized value  gain
ST
N+2
N+1 B Totalized value alarm:
0 = no alarm
1 = alarm

0 = good
1 = bad
Specifications

module

S4 Y 0.000 R Full Starting value
S5 N 0 I 0 or 1 Totalization direction:
0 = positive
1 = negative

0 = continue totalization
1 = reset totalization

1 = hold accumulated total
S8 Y 0 B Full Automatic reset on alarm limit flag:

0 = off
1 = when alarm, reset to S4 + alarm overrun
S9 Y 1.000 R 0 - 9.2 E18 Gain
S10 Y 9.2 E18 R Full Alarm limit

NOTE:
104.1 Explanation
In the totalization mode, an internal counter records the number of input pulses up to 1.9  1019 or until the counter resets.
The trigger transition level, totalization direction, and starting value are configurable. The reset input sets the totalizer to the
2VAA000844R0001 J 104-1
Specifications 104. Pulse Input/Totalization
starting value. This is useful for reset events based on time. An automatic reset on alarm can be specified. This allows for
the totalizer to be set to the starting value plus the alarm overrun when an alarm condition occurs. This can be used for
reset events based on accumulated totals since the count is not lost. A configurable alarm limit determines alarm
conditions. A hold input provides temporary stop totalization, and a gain parameter provides a scaled output.
S1 – SLVADR
I/O module expander bus address of the IMDSM04 module. Valid addresses are zero through 63.
S2 – CHNL
S3 – PTRIG

S4 – STRT
Initial value of the count on startup and function code reset. Specification S4 plus the alarm overrun is the value of the count
after an alarm if the alarm limit flag is set to automatic reset.
S5 – DIR
Direction of the count.
0 = positive
1 = negative
S6 – RST
Block address of the reset flag.
1 = reset count to starting value (S4)
S7 – HOLD
Block address of the accumulated total hold flag. When a hold flag (logic 1) releases (logic 0), the counter resumes counting
without resetting.
0 = continue totalization (normal)

1 = hold accumulated total
S8 – AUTO
Automatic reset on alarm flag. This value determines the counter action when the alarm limit is reached. The counter can
either continue counting beyond the alarm limit, or reset the counter to S4 plus alarm overrun.
0 = off
1 = reset to S4 plus alarm overrun when alarm limit is exceeded
NOTE: Alarm overrun is the current count reset to the difference between the counter and the alarm limit. This allows the block to
correctly detect the next alarm without losing track of the true counts.
S9 – K
Defines the gain multiplier. Gain scales the output to a useful value. A negative gain does not affect the output.
S10 – ALRM
Alarm limit. When the alarm limit is reached, the N+1 output becomes a logic 1, signaling the system that the totalized value
is in alarm.
104.1.2 Outputs
N
Current totalized value times gain.
104-2 2VAA000844R0001 J
104. Pulse Input/Totalization Outputs
N+1
Total value alarm indicator.
0 = no alarm
1 = alarm
N+2
0 = good
1 = bad
I/O modules are bad if:
• There is an illegal I/O module response.
• There is no I/O module response.
• There is an IMDSM04 counter overflow (count > 1.9  1019).
or
• There is a counter overflow.
NOTE: A counter overflow indicates the counter input is transitioning too fast for the configured scan rate of the segment running
the function code. This is a false indication of a bad I/O module and this indication should be considered when configuring this
block.
2VAA000844R0001 J 104-3
Outputs 104. Pulse Input/Totalization
104-4 2VAA000844R0001 J
109. Pulse Input/Duration Explanation
109. Pulse Input/Duration

The pulse input/duration function code interfaces a controller to a selected channel of an IMDSM04 Pulse Input Slave
Module. Function code 109 specifies the duration of the input pulses. The IMDSM04 module conditions, converts and
processes pulse inputs into analog signals. It has eight input channels whose inputs can be processed in three modes
(period, frequency and totalization). Function codes 102, 103 and 104 process signals in the period, frequency and
totalization modes, respectively. Each input channel must have one and only one pulse input block configured.
Outputs
PID U R Blk Type Description

(1 0 9 )
O
N
H
N+1
N R Pulse duration (seconds)  gain
L
N+2
ST
N+3 N+1 B Pulse duration high alarm:
0 = no alarm
1 = high alarm
N+2 B Pulse duration low alarm:

0 = no alarm
1 = low alarm

0 = good
1 = bad
Specifications
S3 N 0 B 0 or 1 Pulse trigger level (start of duration measurements):

S4 N 1 I 1-6 Expected pulse duration range:

1 = 0.1 msec to 6.55 secs
2 = 1.0 msec to 65.5 secs
3 = 10.0 msecs to 655.4 secs
4 = 0.1 sec to 6,553.5 secs
5 = 1.0 sec to 65,535 secs
6 = 10.0 secs to 655,350 secs
S6 Y 9.2 E+18 R Full High alarm value
S7 Y -9.2 E+18 R Full Low alarm value
S8 Y 0.000 R Full Reserved
109.1 Explanation
The pulse input/duration function code specifies an expected pulse duration. It outputs the duration (multiplied by a gain,
S5) of the last pulse to occur during the configured pulse duration range S4. If no pulse occurs, the output remains at the
last non-zero value. It provides alarms if the pulse input exceeds the selected high and low limits. The trigger transition level
(begin count on low-to-high or high-to-low transition) and gain for the output can be selected.
S1 – SLVADR
Expander bus I/O module address of IMDSM04 module. Valid addresses are zero to 63.
2VAA000844R0001 J 109-1
Outputs 109. Pulse Input/Duration
S2 – CHNL
S3 – PTRIG

S4 – RANGE
Defines the expected range of the pulse duration. The ranges are:
1 = 0.1 millisecond to 6.55 seconds

2 = 1.0 millisecond to 65.5 seconds
3 = 10.0 milliseconds to 655.4 seconds
4 = 0.1 second to 6,553.4 seconds
5 = 1.0 second to 65,535 seconds
6 = 10.0 seconds to 655,350 seconds
If the input pulse duration is greater than the expected range, output block N freezes with the last valid pulse duration and
the I/O module communication status changes to a one (bad).
S5 – K
Defines the gain multiplier: the value that scales the output to a useful value for control purposes.
S6 – HALRM
Pulse duration high alarm. When the measured pulse duration exceeds this value, output N+1 equals one.
S7 – LALRM
Pulse duration low alarm value. When the measured pulse duration is less than this value, output N+2 equals one.
S8
Reserved.
109.1.2 Outputs
N
Pulse duration (seconds) times the gain.
N+1
Pulse duration high alarm indicator.
0 = no alarm
1 = pulse duration has exceeded high alarm limit set by S6
N+2
Pulse duration low alarm indicator.
0 = no alarm
1 = pulse duration is shorter than low alarm limit set by S7
N+3
0 = good
1 = bad
I/O module is marked bad if:
• There is an illegal or no I/O module response.
• No pulses have been received yet.
• The pulse duration exceeds the expected range.
109-2 2VAA000844R0001 J
110. Rung (5-Input) Explanation
110. Rung (5-Input)

Function code 110 implements a rung of a Ladder logic program (relay type). It accepts five boolean input signals and
performs a fundamental operation on each input in sequential order. After each input is operated on, the resulting value
goes to the top of the stack. The output of the rung block is the value on the top of the stack unless S1 forces it to another
value.
Outputs
RNG5
S8 N
S9 N B Output value determined by S1 and value on top of stack
S10 If S1 = 0, output = value on top of stack
S11
If S1 = 1, output = previous value of output
If S1 = 2, output = logic 0
Specifications
S1 Y 0 I 0-3 Output descriptor:

0 = normal
1 = hold previous value
2 = force output to logic 0
S2 Y 0 I 0 - 242 Operation performed on input 1
S7 N 0 I Note 1 Block address of input 1

NOTE:
110.1 Explanation
This block accepts five boolean inputs, performs a specified fundamental operation on each input in turn, and provides an
output dependent on the results of the operations and the output mode selected with S1.
The controller takes a Ladder program entered on a human system interface (HSI) and translates it to a group of rung
blocks internally (refer to the Ladder Programming (SLAD) product instruction for operating instructions). Any changes
made to the Ladder program after the conversion are easily saved by downloading them to the controller. This ensures that
all information is in the proper format when it is processed.
The function code that the rung is translated to depends on the number of inputs to the rung. This is automatically defined in
the Harmony controllers by the PC90 Ladder programmer. Figures 110-1 and 110-2 illustrate how to use the rung function
codes (110, 111, 112) without the PC90 Ladder programmer.
AND, OR and PUT operations are performed sequentially on inputs one through five as specified with S2 through S6. The
PUT operation places the specified value on top of a stack of values. The result of the most current operation always goes
to the top of the stack. The value resulting from operation one is placed on a stack that has an initial value of one in the
2VAA000844R0001 J 110-1
Specifications 110. Rung (5-Input)
harmony controllers. Operation two is then performed, and the resulting value becomes the value on top of the stack, and
so on through operation five. Once all operations have been performed, the controller reads S1 to determine the output
value. If it is zero, the value from the top of the stack (the result of operation five) is the output. Otherwise, the output is
overridden and forced to zero or one or held from the previous output. The value on the top of the stack reverts to the initial
value at the beginning of each controller execution cycle, so the first operation should always be a PUT to ensure that the
operations are performed on the desired values.
S1 – OUT
(Output descriptor) Defines the output:
0 = Normal output. The value of the output will be the value on top of the stack when all operations
on inputs are complete.
1 = Hold previous output. The value of the output will be the previous output value, regardless of the
value on top of the stack.
2 = Force output to logic 0. The value of the output will be logic 0 regardless of the value on top of
the stack.
the stack.
S2 to S6 – F1 to F5
Identify:
1. The operation to be performed on the input.
2. The input value the operation is performed on.
3. The input override.
Specification information for S2 through S6 is in the format:
X X X
Operation
XX0 = PUT value on top of stack
XX1 = AND value with value on top of stack
XX2 = OR value with value on top of stack
State of Input Acted On
X0X = use value from stack (0 or 1)
X1X = use logical state of input (0 or 1)
X2X = use logical state of inverted input (0 or 1)
X3X = perform operation when input makes a 0 to 1 transition (1)
Override Indicator
0XX = no input override
1XX = force input to logic 1
S7 to S11 –
IN1 to IN5
Block addresses of inputs one through five.
110.1.2 Outputs
N
Dependent on value on top of the stack and the value of S1.
• If S1 = 0, output = value on top of the stack.
• If S1 = 1, output = previous value of output, regardless of the value on top of the stack.
• If S1 = 2, output = logic 0, regardless of the value on top of the stack.
• If S1 = 3, output = logic 1, regardless of the value on top of the stack.
110-2 2VAA000844R0001 J
110. Rung (5-Input) Applications
110.2 Applications
Figures 110-1 and 110-2 illustrate the operations the Ladder programmer performs internally. Ladder logic uses the logic
states of various inputs to drive devices. Figure 110-1 is one rung of a Ladder program. Figure 110-2 is the AND/OR logic
representing that rung. The specifications list shows the information entered by the operator in order to implement this logic
in a controller when not using the Ladder programmer. The Ladder programmer translates the Ladder logic created by the
operator directly into rung function blocks that can be downloaded to a controller.
(1 ) (2) (4) (5)

O U T PU T
(3 ) T 01 74 2 A
Figure 110-1 Four-Input Logic Rung
(1 ) A
S7
(2 ) N
S8 OR A
D
N O U TPU T
D
(3 )
S9
(4)
S 10 NO T
(5 )
S 11 T 01 7 43 A
Figure 110-2 AND-OR Logic Representation of Ladder Rung in Figure 110-1
S1 – 0
Output value on top of stack.
S2 – 010
No input override, use logical state of input, PUT value on top of stack.
S3 – 011
No input override, use logical state of input, AND with value on top of stack.
S4 – 012
No input override, use logical state of input, OR with value on top of stack.
S5 – 021
No input override, use logical state of inverted input, AND with value on top of stack.
S6 – 011
No input override, use logical state of input, AND with value on top of stack.
S7
Block address of input one.
S8
Block address of input two.
S9
Block address of input three.
2VAA000844R0001 J 110-3
Specifications 110. Rung (5-Input)
S10
Block address of input four.
S11
Block address of input five.
The circuit is complete when input five equals one and input four equals zero, and either inputs one and two, or input three
is true (Fig. 110-2).
110-4 2VAA000844R0001 J
111. Rung (10-Input)

Function code 111 implements a rung of a Ladder logic program (relay type). It accepts ten boolean input signals and
value.
Outputs
R N G 10
S12 (1 1 1 )
S13 N
S14
S15
S16
N B Output value determined by S1 and value on top of stack.
S17 If S1 = 0, output = value on top of stack
S18 If S1 = 1, output = previous value of output
S19 If S1 = 2, output = logic 0
S20
S21
Specifications
S1 Y 0 I 0-3 Output descriptor:

0 = normal
2VAA000844R0001 J 111-1
Explanation 111. Rung (10-Input)

NOTE:
111.1 Explanation
This block accepts ten boolean inputs, performs a specified fundamental operation on each input in turn, and provides an
output dependent on the results of the operations and the output mode selected with S1.
The controller internally translates a Ladder program entered on an engineering work station or another programming
terminal and translates it to a group of rung blocks (refer to the Ladder Programming (SLAD) product instruction for
operating instructions). Any changes made to the Ladder program after the conversion are easily saved by downloading
them to the controller. This ensures that all information is in the proper format when it is processed.
the controller by the PC90 Ladder programmer. Refer to function code 110 for an example of using the rung function codes
(110, 111, 112) without the PC90 Ladder programmer.
AND, OR and PUT operations are performed sequentially on inputs one through ten as specified with S2 through S11. The
to the top of the stack. The value resulting from operation one is placed on a stack with an initial value of one in the
Harmony controllers. Operation two is then performed, and the resulting value becomes the value on top of the stack, and
so on through operation ten.
Once all operations have been performed, the controller reads S1 to determine the output value. If it is zero, the value from
the top of the stack (the result of operation ten) is the output. Otherwise the output is overridden and forced to zero or one
or held from the previous output. The value on the top of the stack reverts to the initial value at the beginning of each
controller execution cycle. The first operation should always be a PUT to ensure that the operations are performed on the
desired values.
S1 – OUT
the stack.
the stack.
S2 to S11 – F1 to F10
Identify:
• The operation to be performed on the input.
• The input value the operation is performed on.
• The input override.
111-2 2VAA000844R0001 J
111. Rung (10-Input) Outputs

X X X
Operation
Override Indicator
NOTE: The operation on the first input should always be a PUT (xx0).
S12 to S21 –
IN1 to IN10
Block addresses of inputs one through ten.
111.1.2 Outputs
N
If S1 = 0, output = value on top of the stack.
If S1 = 1, output = previous value of output, regardless of the value on top of the stack.
If S1 = 2, output = logic 0, regardless of the value on top of the stack.
111.2 Applications
Refer to the example in function code 110.
2VAA000844R0001 J 111-3
Applications 111. Rung (10-Input)
111-4 2VAA000844R0001 J

Function code 112 implements a rung of a Ladder logic program (relay type). It accepts 20 boolean input signals and
value.
Outputs
R N G 20
S22 (1 1 2 )
S24
S25 N B Output value determined by S1 and value on top of stack.
S26
If S1 = 0, output = value on top of stack
S27
S28
If S1 = 1, output = previous value of output
S31
S32
S33
S34
S35 Specifications
S36
S37
S38
S39
S40
S41 S1 Y 0 I 0-3 Output descriptor:
0 = normal
2VAA000844R0001 J 112-1
Explanation 112. Rung (20-Input)

NOTE:
112.1 Explanation
This block accepts 20 boolean inputs, and performs a specified fundamental operation on each input in turn. The block then
provides an output dependent on the results of the operations and the output mode selected with S1.
The controller takes a Ladder program entered on an engineering work station or another programming terminal and
translates it to a group of rung blocks internally (refer to the Ladder Programming (SLAD) product instruction for operating
instructions). Any changes made to the Ladder program after the conversion are easily saved by downloading them to the
controller. This ensures that all information is in the proper format when it is processed.
the controller by the PC90 Ladder programmer. Using the rung function codes (110, 111, 112) without the PC90 Ladder
programmer is illustrated in function code 110.
AND, OR and PUT operations are performed sequentially on inputs one through 20 as specified with S2 through S21. The
to the top of the stack. The value resulting from operation one is placed on a stack with an initial value of one in the
Harmony controllers. Then, operation two is performed, and the resulting value becomes the value on top of the stack, and
so on through operation 20. Once all operations have been performed, the controller reads S1 to determine the output
value. If it is zero, the value from the top of the stack (the result of operation 20) is the output. Otherwise the output is
overridden and forced to zero or one or held from the previous output. The value on the top of the stack reverts to the initial
112-2 2VAA000844R0001 J
112. Rung (20-Input) Specifications
value at the beginning of each controller execution cycle, so the first operation should always be a PUT to ensure that the
operations are performed on the desired values.
S1 – OUT
the stack.
the stack.
S2 to S21 – F1 to F20
Identify:
• The operation to be performed on the input.
• The input value the operation is performed on.
• The input override.
X X X
Operation
Override Indicator
S22 to S41 –
IN1 to IN10
Block addresses of inputs one through 20.
112.1.2 Outputs
N
If S1 = 0, output = value on top of the stack.
If S1 = 1, output = previous value of output, regardless of the value on top of the stack.
112.2 Applications
Refer to the example in function code 110.
2VAA000844R0001 J 112-3
Applications 112. Rung (20-Input)
112-4 2VAA000844R0001 J
114. BCD Input Explanation
114. BCD Input

The BCD input block reads a boolean input from an IMDSI12 or IMDSI22 module in a binary coded decimal (BCD) format,
and converts it to a real output with quality.
Outputs
BC D IN
(1 1 4 ) Blk Type Description
N
N R Real value  gain
Specifications
S1 N 0 I 0 - 63 Expander bus I/O module address of digital I/O

module
S2 N 1 I 1-4 Zone containing ones digit of input:

Zones 1 and 2 are in group B
Zones 3 and 4 are in group A
Input number on I/O module:
1 = 1 to 4 (B) (S4 can be any value)
2 = 5 to 8 (B) (S4 must be =<3)
3 = 1 to 4 (A) (S4 must be =<2)
4 = 5 to 8 (A) (S4 must be set to 1)
S3 N 0 I 0 or 1 Module action on I/O module failure:

S4 N 1 I 1-4 Number of digits in converted value
S5 N 1.000 R Full Gain multiplier
114.1 Explanation
Each I/O module provides 16 inputs divided into two groups of eight as illustrated in Table 114-1. The two groups are
divided into four zones, with each zone containing four inputs.
Table 114-1 BCD to Real Conversion Format
Description Group A Group B
Position Zone 4 Zone 3 Zone 2 Zone 1

8765 4321 8765 4321
Inputs 1001 0010 1000 0101
Internal BCD to Real Conversion
Position 1000s 100s 10s 1s
Outputs 0 3 8 5
2VAA000844R0001 J 114-1
Specifications 114. BCD Input
Table 114-2 shows an example where:

• S2 = 2. The 1s digit is found in Zone 2.
• S4 = 2. The output value is two digits (Zones 2 and 3).
Table 114-2 BCD to Real Conversion Example

8765 4321 8765 4321
Inputs 1010 0110 0001 1001
Position 10s 1s
Outputs 6 1
Figure 114-1 shows the binary coding of the four inputs in each zone. The boolean values convert internally to BCD values
from zero to nine. A true input for any character in a zone causes the integer number associated with that character to be
output. If the inputs of a zone are 0 1 1 1, the output is 4217. BCD values greater than nine are invalid since each zone
provides only one digit of the output value.
8421
XX X X
Z O NE N
E X A M P LE : IN P U T = 0 11 1
O U TP U T = 4 + 2 + 1 = 7
T 0 1 74 4 A
Figure 114-1 Binary Coding of Inputs
Specification S2 selects the zone that the ones digit of the BCD value will be read from. This arrangement enables a two-
digit integer to convert to only one group of inputs from any given I/O module, freeing the other inputs for other configuration
uses. Specification S4 sets the number of digits the integer internally generates. Specifications S2 and S4 define the size
and location of the integer.
S1 – SLVADR
Expander bus I/O module address of the digital input I/O module that carries inputs to be converted. Valid addresses are
zero to 63.
S2 – ZONE
Sets the zone containing the ones digit of the output. Zones 3 and 4 reside in Group A, and Zones 1 and 2 reside in Group
B.
S3 – TRIP
Defines the action of the control module on I/O module failure.

1 = continue operating
S4 – DNUM
Number of digits in converted value (one to four).
S5 – K
Gain multiplier. This real value is multiplied by the integer number generated by the conversion to provide a real output used
for control purposes.
114-2 2VAA000844R0001 J
114. BCD Input Outputs
114.1.2 Outputs
N
Binary coded decimal value times gain, and quality.
114.2 Example
If the inputs to the BCD input function block are:

S2 = 1. Ones digit is found in zone 1.
S4 = 3. Output value is three digits (zones 1, 2 and 3).
S5 = 1.0. Gain is 2.0.
Then, the inputs to the I/O module are:

Position 8765 4321 8765 4321
Outputs 0 3 8 5
Integer value = 385

Output value = 385  2.0 = 770.0
NOTE: Even though some of the inputs in zone four are true (logic 1), the conversion does not use them (S2 equals one and S4
equals three).
2VAA000844R0001 J 114-3
Example 114. BCD Input
114-4 2VAA000844R0001 J
115. BCD Output Explanation
115. BCD Output

This block converts a real input to boolean outputs by converting the input to binary coded decimal (BCD) format. The input
can be scaled with a gain factor, then truncated to an integer value before the BCD conversion occurs. After conversion, the
outputs write to an IMDSO14 or IMDSO15 module.
Outputs
BC D O U T
S4
ST
N
N B I/O module status:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Expander bus I/O module address of I/O module receiving

outputs of function code 115
S2 N 0 I 0 - 120 I/O module definition: hold + type + group

Hold:
Type:
X0X = IMDSO15 module
X1X = IMDSO14 module
Group:
XX0 = outputs 0 to 7 (group A)
XX1 = outputs 8 to 15 (group B)
S3 N 0 I 0 or 1 Module action on I/O module failure:

S4 N 5 I Note 1 Block address of real value to be converted to boolean
S5 N 1.000 R Full Gain multiplier
S6 N 2 I 2 or 4 Number of digits to process

NOTE:
115.1 Explanation
This block converts real values to boolean outputs that are written to the output groups of an IMDSO14 or IMDSO15 module
in BCD format. The real input is multiplied by the gain factor, then truncated to an integer value up to 9999. Specification S6
specifies the size of the integer value. The value can be defined to have either two or four digits. A two digit integer
translates to eight boolean outputs. A four digit integer translates to 16 boolean outputs. Table 115-1 shows module output
capacity for all I/O modules used with this function code.
Table 115-1 Module Output Capacity
Module Outputs
IMDSO14 Two groups of eight
IMDSO15 One or two groups of eight
2VAA000844R0001 J 115-1
Specifications 115. BCD Output
Table 115-2 shows how each input digit provides four boolean outputs in BCD format for a maximum of 16 boolean
outputs.
Table 115-2 Real to BCD Conversion Format
Inputs X X X X
Internal Real to BCD Conversion
Position 8765 4321 8765 4321
Outputs Zone 4 Zone 3 Zone 2 Zone 1
An internal binary conversion is performed on each input digit, providing a 1 output for each power of two represented in the
digit, and a 0 output for each power of two not represented in the digit. For example, if the ones digit of the input is five, the
boolean output representing it is 0101, since 50(8)1(4)0(2)1(1). Figure 115-1 illustrates the binary breakdown.
Figure 115-1 Binary Conversion
S2 selects which group of outputs the converted ones and tens digits go to. If four digits are to be processed (S6=4,
IMDS014 modules only), the hundreds and thousands digits write to the group not selected (S2; group definition). For
example, if S2=xx1, then the hundreds and thousands digits write to group A. Within a group, the least significant digit
occupies outputs four through one, and the most significant digit occupies outputs eight through five.
S1 – SLVADR
Expander bus I/O module address of the I/O module that boolean outputs write to. Valid addresses are 0 to 63.
S2 – SLVDEF
I/O module definition.
X X X
Group. Defines which group of I/O module outputs the ones and tens
digits of the converted input will be written to. The hundreds and
thousands digits will be written to the group not specified here.
IMDSO15 modules can only have a group value of zero because
they have only one group of outputs.
XX0 = Outputs 0 to 7 (Group A)
XX1 = Outputs 8 to 15 (Group B)
Type. Type of I/O module outputs write to.
X0X = IMDSO15
X1X = IMDSO14
Hold. Defines the output on loss of control module.
S3 – TRIP
Defines action of control module on I/O module failure.

115-2 2VAA000844R0001 J
115. BCD Output Output
S4 – BCDINP
Block address of BCD value to be converted to boolean outputs.
S5 – K
Value of the gain multiplier used to scale a real input before truncation and conversion.
S6 – DNUM
Number of processed BCD digits. This number must be set to two or four. Three digit inputs must be specified as four.
115.1.2 Output
N
Status of the I/O module.
0 = good
1 = bad
115.2 Examples
To convert 1293.6 to boolean outputs, set the specifications (refer to Table 115-3):
S2 = 001, on loss of control module goes to default values, module type is IMDSO15, and group B
contains ones and tens digits.
S5 = 1.0, scaling value is 1.0.
S6 = 4, four real digits of input will be converted to BCD format, therefore the output is 16 boolean
digits.
Real input value = 1293 (after scaling and truncation)
Table 115-3 Real to BCD Conversion Example 1
Inputs 1 2 9 3

8765 4321 8765 4321
Outputs 0001 0010 1001 0011
2VAA000844R0001 J 115-3
Examples 115. BCD Output
To convert 457.2 to boolean outputs, set the specifications (refer to Table 115-4):
S2 = 001, on loss of control module go to default values, module type is IMDSO15, and group B
contains ones and tens digits.
S5 = 1.0, scaling value is 1.0.
S6 = 4, 4 real digits of input will be converted to BCD format, therefore the output is 16 boolean
digits. Although the input has only three digits, select four because S6 must be either a two or a four.
Real input value = 0457 (after scaling and truncation).
Table 115-4 Real to BCD Conversion Example 2
Inputs 0 4 5 7

8765 4321 8765 4321
Outputs 0000 0100 0101 0111
115-4 2VAA000844R0001 J
116. Jump/Master Control Relay Explanation
116. Jump/Master Control Relay

The jump/master control relay function code can be used as a jump or master control relay (MCR) function. Function code
116 transfers control past a series of blocks. Both functions transfer control from the jump/MCR block to a destination block
specified with S2. Blocks between the jump/MCR block and its destination do not execute, but hold their previous values.
The destination block number must be greater than the block number of the jump/MCR block where the transfer originated.
Transfer across segment boundaries is not permitted.
Specification S3 sets the block to either jump or MCR. The jump function bypasses all blocks between the jump/MCR block
and the destination block. The MCR function bypasses all blocks between the jump/MCR block and the destination block,
and it de-energizes (zeros) the outputs of all rung blocks (i.e., function codes 110, 111 and 112) with normal outputs (S1
equals zero), that lie between the jump/MCR block and the destination block. Rung blocks without normal outputs (S1 not
equal to zero) hold their previous output values.
Outputs
S1 JU M P (1 1 6 ) Blk Type Description

(M C R ) N
N B <S1> = 0 = jump/MCR activated
<S1> = 1 = jump/MCR not activated, all blocks executed
Specifications
S1 N 0 I Note 1 Block address of control signal:

0 = jump/MCR function activated
1 = normal control
S2 N 0 I Note 1 Block address of destination block for jump/MCR

command
S3 N 0 I 0 or 1 Function selector:
0 = jump
1 = MCR
NOTE:
116.1 Explanation
S1 – TRIP
Block address of the control input signal. This determines whether control is normal or if the jump/MCR function is activated.
0 = jump/MCR function activated – S3 selects the function implemented (jump or MCR)

1 = jump/MCR not implemented
S2 – DEST
Block address of destination block that jump/MCR function extends to. Normal block execution resumes with the function in
this block.
S3 – FUNC
Defines which function the jump/MCR block performs.
0 = jump – bypasses all blocks between the jump/MCR block and the destination block
1 = MCR – bypasses all blocks between the jump/MCR block and the destination block and de-
energizes the outputs of rung blocks with normal outputs between the jump/MCR block and
destination block
2VAA000844R0001 J 116-1
Output 116. Jump/Master Control Relay
116.1.2 Output
N
Displays <S1>.
0 = jump/MCR implemented
1 = jump/MCR not implemented, all blocks executed
116.2 Applications
Figure 116-1 shows the implementation of a jump/MCR block.

If S3 = 0 of the jump/MCR block at 200, the jump functionality is being used. In this example, S2 = 220. Therefore when S1
toggles from 1 to 0, the jump is activated and functions between blocks 201 and 219 are no longer executed. The outputs of
these function blocks are held at whatever their last value was before the jump was activated. The blocks located outside of
201 through 219 will continue operating as normal, that is the up/down counter (FC 85) at block 195 will continue counting
and supplying output as normal, as well as the summer block (FC 15) at 200.
If S3 = 1 of the jump/MCR block at 200, the MCR functionality is used. In this case, when S1 toggles from 1 to 0, a jump is
still activated to the destination block as specified by S2 (block 200 in this example) but also, the MCR that is associated at
block 200 is disengaged. This means if any rung blocks (that is, FC 110, FC 111, or FC 112) are being jumped, their outputs
will all go to 0, as expected if an MCR in that rung was disengaged. Other function codes that are jumped will have their
outputs held, as they would have if S3 = 0, that is 201 through 208 will hold the Boolean value of the last input even as that
input changes.
Figure 116-1 Jump/MCR Block Implementation
116-2 2VAA000844R0001 J
117. Boolean Recipe Table
117. Boolean Recipe Table

The boolean recipe table function code uses an externally generated value to select a parameter value from a recipe table.
Blocks linked together, each containing up to ten boolean parameter values, make up the recipe table.
The first block in the link list is the group master. The master accepts the select input and is able to search the other blocks
in the link list to find the selected parameter. The ten parameters in the master block are zero through nine. The range of
parameters associated with the next block in the link list is ten through 19, and so on. The recipe value selected is always
output from the master block. The outputs of all other blocks in the series remain unused.
This function code also includes an edit function that allows editing of selected parameters.
The recipe table function codes (117, 118) allow for recipe handling within the digital control system, eliminating the need for
a centralized computer to store batch recipes.
Outputs
R E C IPB
S11 (1 1 7 )
PS
N
S13
ES
S14
S15
EPS
N B Parameter value selected. If the parameter number
EV
selected is invalid, the value of the nearest valid parameter
is the output.
Specifications
S1 Y 0 B 0 or 1 Value of parameter 0
S11 N 5 I Note 1 Block address of parameter select input
S12 N 0 I Note 1 Block address of next recipe block

(0 = no more recipe blocks)
S13 N 0 I Note 1 Block address of edit signal:

0 = normal mode
1 = edit mode
S14 N 5 I Note 1 Block address of edit parameter selector
S15 N 0 I Note 1 Block address of edit value

NOTE:
2VAA000844R0001 J 117-1
Explanation 117. Boolean Recipe Table
117.1 Explanation
S1 – P0
Value of parameter zero. If the block defined is not the master block for a particular recipe table, then S1 defines the value
of parameter n+0 where n equals the position of the block in the list of blocks making up the recipe table. For example, if the
block defined is the first block after the master block, then S1 defines value ten.
S2 to S10 – P1 to P9
Values of parameters one through nine. If the block defined is not the master block for a particular recipe table, then S2 to
S10 define the value of parameters n+1 to n+9 where n equals the position of the block in the list of blocks making up the
recipe table. For example, if the block defined is the third block after the master block, then S2 defines value 31.
S11 – SEL
Block address of externally generated parameter selection signal. The number in this block selects the value from the
recipe table that is output from the boolean recipe table block. If the input to the parameter selection block is a real number,
it is rounded to the nearest integer before being used for selection. If several blocks are linked in series, the parameter
selection signal <S11> should be defined only in the first block in the series, since the master block searches the other
blocks in the series for the selected parameter value.
S12 – NXT
Block address of next recipe block in group. A value of zero for this specification indicates that there are no more recipe
blocks in the group.
S13 – ESIG
Block address of edit signal. When this value is a one, the block is in edit mode. In edit mode, the value of the parameter
selected by S14 changes to the value defined in S15. When the value is a zero, the block operates in the normal operating
mode.
S14 – EPAR
Block address of the block containing the number of the parameter that changes when the block is in edit mode.
S15 – EVAL
Block address of the value that replaces the current value of the parameter specified in S14 when the block is in edit mode.
117.1.2 Output
N
Value of the parameter selected for output.
The value of the selected parameter is always output from the first (master) block in a series of boolean recipe table blocks.
The outputs of all other blocks in the series are unused.
If the parameter selected is invalid, the value of the valid parameter numerically closest to it will be output. For example: if
there are 30 parameters specified (one to 30), and parameter 47 is requested, the value of parameter 30 will be output.
Likewise, if parameter -3 is requested, the value of parameter zero will be output.
117.2 Applications
Boolean recipe table blocks can be used with real recipe table blocks to control batch processes. Real recipe tables can be
used to set ingredient quantity, and boolean recipe tables can define the operating states of the various devices used in the
process for each step. The batch processing example found in function code 123 illustrates the use of recipe table blocks.
117-2 2VAA000844R0001 J
118. Real Recipe Table
118. Real Recipe Table

The real recipe table function code uses an externally generated value to select a parameter value from a recipe table.
Blocks linked together, each containing up to ten real parameter values, make up the recipe table.
The first block in the link list is the group master. The master accepts the select input and is able to search the other blocks
in the link list to find the selected parameter. The ten parameters in the master block are zero through nine. The range of
parameters associated with the next block in the link list is ten through 19, and so on. The recipe value selected is always
output from the master block. The outputs of all other blocks in the series remain unused.
This function code also includes an edit function that allows editing of a selected parameter.
The recipe table function codes (117, 118) allow for recipe handling within the digital control system. This eliminates the
need for a centralized computer to store batch recipes.
Outputs
R EC IPR
S11 (1 1 8 )
S13
PS
ES
S14
EPS
S15
EV
N R Parameter value selected. If the parameter number
selected is invalid, the value of the nearest valid parameter
is the output.
Specifications
S1 Y 0.000 R Full Value of parameter 0
S11 N 5 I Note 1 Block address of parameter select input
S12 N 0 I Note 1 Block address of next recipe block (next function code 118)
0 = no more recipe blocks
S13 N 0 I Note 1 Block address of edit signal:

0 = normal mode
1 = edit mode
S14 N 5 I Note 1 Block address of edit parameter selector
S15 N 5 I Note 1 Block address of edit value

NOTE:
2VAA000844R0001 J 118-1
Explanation 118. Real Recipe Table
118.1 Explanation
S1 – P0
Value of parameter zero. If the block defined is not the master block for a particular recipe table, then S1 defines the value
of parameter n+0 where n equals the position of the block in the list of blocks making up the recipe table. For example, if the
block defined is the first block after the master block, then S1 defines value ten.
S2 to S10 – P1 to P9
Values of parameters one through nine. If the block defined is not the master block for a particular recipe table, then S2 to
S10 define the value of parameters n+1 to n+9 where n equals the position of the block in the list of blocks making up the
recipe table. For example, if the block defined is the third block after the master block, then S2 defines value 31.
S11 – SEL
Block address of externally generated parameter selection signal. The number in this block selects the value from the
recipe table that is output from the real recipe table block. If the input to the parameter selection block is a real number, it is
rounded to the nearest integer. If several blocks are linked in series, the parameter selection signal <S11> should be
defined only in the first block in the series, since the master block searches the other block in the series for the selected
parameter value.
S12 – NXT
Block address of next recipe block in group. A value of zero for this specification indicates that there are no more recipe
blocks in the group.
S13 – ESIG
Block address of edit signal. When this value is a one, the block is in edit mode, and the value of the parameter selected by
S14 changes to the value defined in S15. When the value is a zero, the block operates in normal mode.
S14 – EPAR
Block address of the block containing the parameter number that changes when the block is in edit mode.
S15 – EVAL
Block address of the value that replaces the current value of the parameter specified in S14 when the block is in edit mode.
118.1.2 Output
N
Value of the parameter selected for output. The value of the selected parameter is always output from the first (master)
block in a series of real recipe table blocks. The outputs of all other blocks in the series are unused.
If the parameter selected is invalid, the value of the valid parameter numerically closest to it will be output. For example: if
there are 30 parameters specified (one to 30), and parameter 47 is requested, the value of parameter 30 will be output.
Likewise, if parameter -3 is requested, the value of parameter zero will be output.
118.2 Applications
Real recipe table blocks can be used to handle both fixed batch sequences and variable batch sequences. In a fixed batch
sequence, the order in which the steps are executed remains fixed from recipe to recipe, but the amounts of ingredients and
the conditions under which they are added may vary. In a variable batch sequence, the order of step execution changes
from recipe to recipe, as well as the amounts of ingredients and the conditions in which they are added. Refer to the
applications section of the function code 123 description for an example of a real recipe table used in a batch process.
118-2 2VAA000844R0001 J
119. Boolean Signal Multiplexer Explanation
119. Boolean Signal Multiplexer

The boolean signal multiplexer function code selects a boolean signal from a group of inputs, and provides this signal as the
block output. Any number of boolean signal multiplexer blocks can be joined to multiplex any number of signals. Each block
contains ten boolean inputs.
The first block in the link list is the group master. The master accepts a select input and searches the other blocks in the link
list to find the selected input. The ten values in the master block are zero through nine. The range of parameters associated
with the next block in the link list is ten through 19, and so on. If several blocks are in series, the output always comes from
the first block in the series. The outputs of the rest of the blocks in the series are unused.
Outputs
BM U X
S1 (1 1 9 )
S2 N
S4
S5 N B Input value selected. If the input number selected is invalid,
S6 the value of the nearest valid parameter is the output.
S7
S8
S9 Specifications
S10
S11
S11 N 5 I Note 1 Block address of input select signal
S12 N 0 I Note 1 Block address of next block (next function code 119)
0 = no more multiplexer blocks
NOTE:
119.1 Explanation
S1 – IN0
Block address of input zero. If the defined input is not in the master block for a particular input group, then S1 is the block
address of input n  10 where n equals the position of the block in the list of blocks making up the link list. For example, if
the defined block is the first block after the master block, then S1 defines input ten.
Input zero is reserved for executed stop (E-STOP) in batch operations. The normal starting input is input one which is <S2>.
S2 to S10 – IN1 to IN9

Block addresses of inputs one through nine. If the defined input is not the master block for a particular input group, then S2
to S10 define the block addresses of inputs n 10 + 1 to n 10 + 9 where n equals the position of the block in the list of
2VAA000844R0001 J 119-1
Output 119. Boolean Signal Multiplexer
blocks making up the input group. For example, if the defined input is in the third block after the master block, then S2 is the
block address of input 31.
S11 – SEL
Block address of the externally generated input selection signal. The number in this block selects the input from the input
group that is the block output. If the input to this block is a real number, it is rounded to the nearest integer. If more than one
block is in series, the input selection signal is the master block only, since it searches all other blocks in the series for the
selected parameter.
S12 – NXT
Block address of next input block in group. A value of zero for this specification indicates that there are no more input blocks
in the group.
119.1.2 Output
N
Selected input. The selected input is output from the master block. When several boolean signal multiplexer blocks are in
series, the value selected for the output is the output from the master block. The outputs of the rest of the blocks in the
series are unused.
If an invalid value is selected, the value of the parameter numerically closest to it is the output. For example, if there are 30
specified inputs, and input 47 is requested, then the value of input 30 will be output. Likewise, if the selected value is -3, the
value of input zero will be output.
119.2 Applications
Batch control uses signal multiplexers to select one input from a group, based on an externally generated signal. Refer to
the applications section of function code 123 for an example of a boolean signal multiplexer used in a batch process.
119-2 2VAA000844R0001 J
120. Real Signal Multiplexer Explanation
120. Real Signal Multiplexer

The real signal multiplexer function code selects a real signal from a group of inputs, and provides this signal as the block
output. Any number of real signal multiplexer blocks can be joined to multiplex any number of signals. Each block contains
ten real inputs.
The first block in the link list is the group master. The master accepts a select input and searches the other blocks in the link
list to find the selected input. The ten values in the master block are zero through nine. The range of parameters associated
with the next block in the link list is ten through 19, and so on. If several blocks are in series, the output always comes from
the first block in the series. The outputs of the rest of the blocks in the series are unused.
Outputs
RMUX
S1 (1 2 0 )
S3
S4 N R Input value selected. If the input number selected is invalid,
S5
the value of the nearest valid parameter is the output.
S6
S7
S8 Specifications
S9
S10
S11 Spec Tune Default Type Range Description
S11 N 5 I Note 1 Block address of input select signal
S12 N 0 I Note 1 Block address of next block (next function code 120)
0 = no more multiplexer blocks
NOTE:
120.1 Explanation
S1 – IN0
Block address of input zero. If the defined input is not in the master block for a particular input group, then S1 is the block
address of input n  10 where n equals the position of the block in the list of blocks making up the link list. For example, if
the defined block is the first block after the master block, then S1 defines input ten.
S2 to S10 – IN1 to IN9

Block addresses of inputs one through nine. If the defined input is not the master block for a particular input group, then S2
to S10 define the block addresses of inputs n  10  1 to n  10  9 where n equals the position of the block in the list of
blocks making up the input group. For example, if the defined input is in the third block after the master block, then S2 is the
block address of input 31.
2VAA000844R0001 J 120-1
Output 120. Real Signal Multiplexer
S11 – SEL
Block address of the externally generated input selection signal. The number in this block selects the input from the input
group that is the block output. If the input to this block is a real number, it is rounded to the nearest integer. If more than one
block is in series, the input selection signal is the master block only, since it searches all other blocks in the series for the
selected parameter.
S12 – NXT
Block address of next input block in group. A value of zero for this specification indicates that there are no more input blocks
in the group.
120.1.2 Output
N
Selected input. The selected input is output from the master block. When several real signal multiplexer blocks are in series,
the value selected for the output is the output from the master block. The outputs of the rest of the blocks in the series are
unused.
If an invalid value is selected, the value of the parameter numerically closest to it is the output. For example, if there are 30
specified inputs, and input 47 is requested, then the value of input 30 will be output. Likewise, if the selected value is -3, the
value of input zero will be output.
120-2 2VAA000844R0001 J
121. Analog Input/Cnet

The analog input/Cnet function code acquires an analog input from another module in a different node via Cnet. If the
source node is a process control unit, the input must come from an analog exception report block (function code 30), an
analog in/channel (function code 222), or an analog out/channel (function code 223). If the remote node is a network
interface unit, the input must come from an analog report index. Updates are on an exception report basis. The executive
block for the controller module and the segment control block for the harmony controllers modules specify the exception
report intervals.
To ensure that the signal is successfully acquired from Cnet, the analog signal generates a point quality flag. To test the
quality of the signal, include a function code 31 in the configuration. The quality of the point cannot be used as an input to
any other type of block. However, the output of the test quality block, representing the quality, can be used as an input to
other processing blocks. Refer to Appendix J, for a definition of point quality.
Outputs
AI/I
(1 2 1 )
N
N R Analog output value, quality and alarm state
Specifications
S3 N 0 I 0 - 250 Source node address
S4 N 0 I 0 - 250 Source loop address
S5 N 0 I 0-2 Input block type. Defines the type of remote block

address that is being referenced:
0=function code 30
1=function code 222
2=function code 223
S6 N 0.000 R Full Spare
S7 N 0 I Note 1 Spare
NOTES:
2. Loop, PCU, Module, Block must be unique for each import FC in the controller among ALL import FCs
(i.e. - FC 26/121 and 42/122). Multiple loop inputs from the same source address per PCU are
supported as long as they are not from a single controller in that PCU.
3. Output N is updated each segment scan, which also updates the internal XR value which is sent out
2VAA000844R0001 J 121-1
121-2 2VAA000844R0001 J
122. Digital Input/Cnet

The digital input/Cnet function code acquires a digital input from another module in a different node via Cnet. If the source
node is a process control unit, the input must come from a digital exception report block (function code 45), a digital
in/channel (function code 224), or a digital out/channel (function code 225). If the remote node is a network interface unit,
the input must come from an analog report index. Updates are on an exception report basis. Segment control blocks in
Harmony controllers specify exception report intervals.
To ensure that the signal is successfully acquired from the Cnet, the digital signal generates a point quality flag. To test the
quality of the signal, include a function code 31 in the configuration. The quality of the point cannot be used as an input to
any other type of block. However, the output of the test quality block, representing the quality, can be used as an input to
other analog processing blocks. Refer to Appendix J, for a definition of point quality.
NOTE: If a module utilizes an imported digital value from the loop in several instances in its configuration, the function blocks that
utilize that digital value must be connected to only one digital input/Cnet block. Exception reports from the same (loop, node, mod-
ule and block) address cannot be imported to more than one destination within a single module configuration.
Outputs

D I/I
(122)
N N B Digital output value, quality and alarm state
Specifications
S4 N 0 I 0 - 250 Source loop address
S5 N 0 I 0-2 Input block type. Defines the type of remote block

address that is being referenced:
0=function code 45
1=function code 224
2=function code 225
NOTES:
2. Loop, PCU, Module, and Block number must be unique for each import FC in the controller among
ALL import FCs (i.e. - FC 26/121 & 42/122). Multiple loop inputs from the same source address per
PCU are supported as long as they are not from a single controller in that PCU.
3. Output N is updated each segment scan, which also updates the internal XR value which is sent out
based on the MIN/MAX/Alarm/SigChange
2VAA000844R0001 J 122-1
122-2 2VAA000844R0001 J
123. Device Driver Explanation
123. Device Driver

Function code 123 interfaces the control system to a field device. It provides control and accepts feedback from its assigned
control device. It normally receives a control input from the sequencing logic and sets the control output equal to the control
input when the block is in auto. The control output then goes to the associated device.
The device driver also accepts up to two feedback inputs from the field that define the actual status of the device. The
control output status represents the status of the device, determined from the feedback inputs as good, bad, or waiting. A
waiting output is generated when the feedback waiting time has not elapsed after a state change. The device driver
generates an exception report indicating output and alarm when:
• The device driver output changes or
• The device driver generates an alarm or
• The Tmax for exception reporting is exceeded.
Device drivers can be used in batch and continuous control systems to control and observe a device. Any boolean signal
can drive a device driver. It also can be operated from a console, or an output can be unconditionally set with interlock
logic.
Outputs
D D R IV E
S1 (1 2 3 )
CI O
S2 N
S3
FB1 ST
N+1 Blk Type Description
FB2
S5
OP
S6
OS
N B Control output
N+1 R Control output status:

0.0 = good
1.0 = bad
2.0 = waiting
Specifications
S1 N 0 I Note 1 Block address of control input
S2 N 0 I Note 1 Block address of feedback input 1
S4 Y 0 I 0 - 101 Control output status override signal
S5 N 1 I Note 1 Block address of output override permissive
S6 N 0 I Note 1 Block address of override output
S7 Y 0 I 0 - 11 Feedback status mask output = 0
S8 Y 0 I 0 - 11 Feedback status mask output = 1
S9 Y 0.000 R Full Feedback waiting time (secs)
S10 N 0 I 0 - 255 Device driver display type

NOTE:
123.1 Explanation
The device driver, used with the other batch processing blocks, implements batch control. Normally, a sequence generator
drives a device driver block by setting S1 to the output block address of the sequence generator block. The device driver
may be controlled manually (from the console) or unconditionally set. The states of the output override and permissive
specifications indicate whether manual control from the console or remote control using unconditional logic is permitted.
Table 123-1 identifies the permitted control modes for various states of the override specifications S4 through S6.
2VAA000844R0001 J 123-1
Specifications 123. Device Driver
Table 123-1 Override Permissive/State Specifications
Control Output Value of Output Override Permitted Control

Control Output Status
Status Override (S4) Permissive <S5> Control Mode Output
Console Override Control (S6) = 0
XX0 0 Auto <S1> Normal

Manual <console> Normal
XX1 0 Auto <S1> Forced good or waiting

Manual <console> Forced good or waiting
Remote Override Control (S6) 0
XX0 1 Remote <S6> Normal
XX1 1 Remote <S6> Forced good or waiting
When the output of the block specified in S5 is one and S6 is zero, manual override from the console is permitted.
Specification S6 unconditionally sets the output of the device driver when S6 is configured to any block address greater
than zero. The boolean output of the block referenced by S6 sets the output of the device driver. This feature precludes
manual override of the device from the operator console. When S5 equals zero, only automatic control is permitted.
The control output status is dependent on the feedback inputs, feedback waiting time, and the feedback status masks.
Feedback status masks provide signals defining the normal states of the feedback inputs corresponding to the control
outputs of zero (S7) and one (S8). If the values of the feedback signals do not match those of the feedback status masks for
a given control output, an exception report generates and goes to the console. The exception report contains the value of
the control output (zero or one) and an alarm indicator. When an operator command or logic overrides the control output
status, the control output status goes to zero. This allows sequence logic to proceed normally. However, alarms still
generate, exception report, and display on the console.
For example, when the device driver controlling an on/off valve generates an alarm, the sequence monitor block executes a
fault step (e.g., shutdown). If the operator determines that the valve is working correctly, but the position feedback is not
correct for some reason, the fault status can be overridden from the console by tuning the ones digit of S4 to a value of one.
This overrides the control status output of the device driver and the sequence monitor block operates as if the device is
acting correctly. The block address value specified by S6 determines whether control is set unconditionally or whether the
operator has control. An external alarm message will still be transmitted to the console to indicate to the operator that the
device is malfunctioning, but the sequence can be restarted or used repeatedly. The console can be used to configure both
dynamic graphic displays and faceplate displays that allow access to all of the analog controllers, pushbutton stations and
device drivers in the system.
S1 – C1
(Block address of control input) A sequence generator block outputs up to eight boolean values for each step in a
process. This output is called a mask. It represents the states of eight devices for each step of the process. Each of those
eight values can be the control input for a different device driver block. The values are output from the sequence generator
block in blocks N through N+7. The device driver block accesses the values if S1 is the block number of the sequence
generator output defined for control of the associated device.
A block address of zero (default) for S1 configures the function code for Batch language only.
S2 – FEED1
(Block address of feedback input 1) Signals from the field that define the actual state of the device. The values of the
feedback inputs are compared with feedback status masks to determine the control output status. If the feedback inputs do
not match the feedback status masks for a given control output, an alarm is generated and the control output status is set to
1.0 (bad).
S3 – FEED2
(Block address of feedback input 2) Signals from the field that define the actual state of the device. The values of the
feedback inputs are compared with feedback status masks to determine the control output status. If the feedback inputs do
123-2 2VAA000844R0001 J
123. Device Driver Specifications
not match the feedback status masks for a given control output, an alarm is generated and the control output status is set to
1.0 (bad).
S4 – COSOV
(Control output status override) Refer to Table 123-1. When the hundreds digit equals one, the control output status is
good as soon as the feedbacks match the feedback status mask.
X X X
Ones digit
0 = feedback determines control output status
1 = control output status is 0.0 (good) or 2.0 (waiting)
Hundreds digit
1 = early good status enable
NOTE: Early recognition of feedback cancels the feedback waiting time (S16) once feedback conditions have been met. This can
result in bad status and alarm prior to feedback waiting time time-out.
S5 – OOPER
(Block address of output override permissive) When the output override permissive input value is a logic 1, the device
driver control output can be controlled by a console (manual mode) or by external logic (remote mode) referenced by S6.
When the output override permissive input is a logic 0, the device driver control output is controlled by the control input
(automatic mode) referenced by S1. Refer to Tables 123-1 and 123-2 for more information.
S6 – OVOLIT
(Block address of override input) Determines whether the override state selected is manual or remote.
S6 = 0 and <S5> = 1, permitted control mode is auto or manual.

S6 0 and <S5> = 1, permitted control mode is remote.
S7 – FDMSK0
(Feedback status mask output for control output of zero) The value found in this block defines the normal state of the
feedback inputs corresponding to a control output of zero. If control output is a zero and the feedback inputs to the device
driver do not agree with S7, an exception report with alarm is generated. The ones digit is feedback input one and the tens
digit is feedback input two.
X X
feedback input 1 (S2)
S8 – FDMSK1
(Feedback status mask output for control output of 1) Defines the normal state of the feedback inputs corresponding to
a control output of one. If control output is a one and the feedback inputs to the device driver do not agree with S8, an
exception report with alarm is generated. The ones digit is feedback input one and the tens digit is feedback input two.
X X
S9 – FDWAIT
(Feedback waiting time) Defines the time in seconds that the device driver waits before comparing the feedback inputs
with the feedback status masks after a change of state. For example, if the device driver controls a valve, feedback waiting
time is the valve stroke time. This ensures that measurements taken when the device is changing position or starting up are
not used for control or indication.
S10 – DISPLAY
(Device driver display type) The console provides the capacity to create dynamic graphic and faceplate displays. This
specification defines the display type used to represent this particular device. There is a special faceplate display created
especially for the device driver block called the device driver mimic. Refer to the console instruction for display types.
0 = output and feedback indicators
2VAA000844R0001 J 123-3
Outputs 123. Device Driver
123.1.2 Outputs
N
(Control output) Drives the device associated with the device driver block. The control output is normally the control (auto)
input received from a sequence generator block. Control outputs can be overridden by inputs from the console (manual) or
unconditionally set to a value with interlock logic (remote). Specifications S4 through S6 define the override state, as shown
in Table 123-1.
N+1
(Control output status) Output from the device driver to a device monitor block to inform the control system of the current
state of the driven device.
0.0 = good
1.0 = bad
2.0 = waiting
A good output means that the feedback waiting time has elapsed and the inputs from the field agree with the feedback
status masks defined in S7 and S8 as the normal states for a particular control output.
A bad output means that the feedback waiting time has elapsed and the inputs from the field do not agree with the feedback
status masks for a particular control output.
A waiting output means that the feedback waiting time has not elapsed, and no comparisons between inputs from the field
and feedback status masks has been made yet.
Control output status can be overridden and forced good when S4 equals XX1. If a device driver mimic display is configured
in the console, it indicates an override state with OVR in the center of the bottom line of the display.
123.2 Applications
Device driver blocks can be used in batch and continuous processes to control a piece of equipment from the console or to
receive feedback on the state of the equipment. The following example shows a device driver used in a typical batch
application. The example illustrates how all the batch function blocks interact in a batch process. These blocks can also be
used for sequential control.
To be effective, a distributed batch control system should be partitioned for group control of interdependent unit operations.
All interdependent unit operations should be controlled from a single module. Each independent unit operation should be
located in a separate controller. This method maximizes system reliability and ensures control system integrity.
Figure 123-1 shows a simple process requiring batch control capabilities. Reactants drawn from several storage tanks go
into two batch chemical reactors. After the batch reaction is complete, the products transfer from the reactors to an
intermediate storage tank, process through a liquid/liquid extractor, and then purify in a distillation column. This process is
characterized by several interconnected unit operations, all of which must function properly in the proper sequence for the
process to operate.
COM P ONE NT
A
S TO R AG E TA N K
COM P ONE NT
B
S TO R AG E TA N K
CO M PONE NT
C
S TO R AG E TA N K
R E AC TO R 1 R E A C TO R 2
H O L D IN G
TA N K
IN TE R M ED IATE
S TO R A G E TA N K
P RO D U C T
D IS TILL AT IO N
C O LU M N L IQ U ID /L IQ U ID
E X T R A C TO R
S O LV E N T
R A FF IN AT
S TO R AG E
Figure 123-1 Sample Batch Application
123-4 2VAA000844R0001 J
123. Device Driver Applications
Figure 123-2 shows typical partitioning of the example batch control system. Separate controllers are provided for each
reactor, for reactant distribution, for liquid/liquid extraction, and for distillation. With the partitioning shown, if the control
system for one of the batch reactors stops operation, the other reactor operates and the rest of the process continues to
operate until immediate storage depletes, allowing time for the replacement of the malfunctioning component. If using a
single controller for the entire process, the process would shut down abruptly, perhaps unsafely. It would stay shut down
until the malfunction could be diagnosed and corrected.
C O N TRO LLER 1
C O M P O N ENT
A C O NTRO LLER C O NTRO LLER
S TOR AG E TANK 2 3
C O M P O N ENT
B
S TOR AG E TANK
CO M PO N ENT
C
S TOR AG E TANK
CO N TRO LLER 5 R EAC TO R 1 R EAC TO R 2
H O LD IN G
TA NK
C O N TRO LL ER 1
IN TER M ED IAT E
S TO RAG E TANK
P RO DU CT
DIS TILLAT ION
CO LU MN LIQ UID /LIQU ID
E XT R AC TOR
SO LV EN T
RA FFINATE
S TOR AG E
T 01 7 50 A
Figure 123-2 Partitioning of Sample Control System
Once the control system is effectively partitioned, each batch operation can be defined by identifying the devices used, the
steps required for the batch sequence, the recipe parameters used, and the emergency actions required.
The basic approach to batch control is to create sequence control logic that generates a unique output state pattern for
each step in a sequence. This logic must automatically and continuously verify that all of the devices are operating as
directed. In this way, the process divides into a series of easy to construct auxiliary logics linked together through the
sequence control logic.
To develop batch control logic:
1. The devices associated with control of the batch reactor must be identified. These devices include analog
measurement sensors, modulating control valves, and discrete devices such as motors and on/off valves.
Discrete device status feedback, such as motor starter holding contacts and valve limit switches, should also be
considered. The analog and discrete devices associated with the example batch reactor are shown in Figure
123-3.
2. A written description of the batch sequence must be prepared. This description should divide the sequence into
a series of steps and fully describe both the actions taken during each step and the feedback required before the
sequence can proceed. Use the following steps for the example batch sequence:
Step 1
Clean reactor. Open FV4, start M1 and P1, and set TIC-2 set point equal to recipe parameter A. Go to Step 2 when reactor
is 80 percent full.
Step 2
Empty reactor. Open FV5. When reactor is less than five percent full, start ten minute timer. When timer times out, go to
Step 3.
2VAA000844R0001 J 123-5
Applications 123. Device Driver
Step 3
Feed component A. Close FV5 and open FV1. Set FIC-1 set point equal to recipe parameter B. Integrate flow until the total
amount added is greater than the amount indicated by recipe parameter C. Go to Step 4.
C O M P O N EN T A
FV1
W ATE R
FT FV 4
1
CO MPON ENT B
FV2 FC V-1 M1 FC V-2
TT
2
C O LD
W ATE R
R E TU R N
C O M P O N EN T C
FV3
R E AC TO R 1
C O LD W AT ER
S U PP LY
P1 LT
2
FV 5
T 0 1 7 51 A
Figure 123-3 Control Devices Associated with Example Batch Reactor
Step 4
Feed component B. Close FV1 and open FV2. Set TIC-2 set point equal to recipe parameter D. Integrate flow until total
amount added is greater than the amount indicated by recipe parameter E. Go to Step 5.
Step 5
Feed component C. Close FV2 and open FV3. Integrate flow until total amount added is greater than the amount indicated
by recipe parameter F. Go to Step 6.
Step 6
Cook reactants. Close FV3. Ramp reactor temperature up to recipe parameter G at a constant rate. When TT-2 is greater
than recipe parameter G, go to Step 7.
Step 7
Empty reactor. Open FV5. When reactor level is below five percent, start ten minute timer. When timer times out, go to
Step 8.
Step 8
Cue operator to review and print out batch report. After operator acknowledges that he has done this, go to Step 1.
NOTE: The process is not a continuous batch sequence. The process ends at Step 8, and requires operator action to restart the
batch sequence.
3. The recipe parameters must be defined. These parameters should be selected to allow variations in time,
temperature and relative amounts of reactants from recipe to recipe. The example batch reactor has seven
recipe parameters:
1 - starting reactor temperature

2 - rate of addition of components to reactor (set point of FIC-1)
3 - amount of component A to add to reactor
4 - reactor temperature for the addition of components B and C
5 - amount of component B to add to reactor
6 - amount of component C to add to reactor
7 - reaction temperature
123-6 2VAA000844R0001 J
4. The actions required upon device failure must be defined. One emergency action may be defined for a device
failure in any step, or separate emergency actions may be defined for device failures in each step. For this
example, a general fail safe condition exists for response to any device failure.
Step 0
E-STOP (executed stop). P1 and M1 are left running, and all valves are set to fail safe position. This step executes when
the operator manually initiates an E-STOP, or the controller detects a device failure.
Figures 123-4 through 123-10 show the configuration used to achieve the control. Figure 123-4 shows the logic that
controls the discrete devices. Figures 123-5 through 123-10 show the auxiliary logic required to implement each step. Cross
referencing between the sequence definition and these figures provides a good indication of the flexibility and options
available for implementing batch control.
In Figure 123-4, the device drivers control and monitor the discrete control devices used in the example. The example batch
reactor has five on/off valves, a pump and an agitator. The on/off valves have two limit switches and require a maximum of
five seconds for full travel. The states of the limit switches are used as the feedback indicators, and feedback waiting time is
five seconds to ensure that the valve has finished changing positions before the feedback values confirm valve operation.
The pump and agitator motor have only one feedback signal, and require a maximum of two seconds to confirm operation.
The feedback waiting time for those devices will be defined as two seconds.
NOTE: Output N is Step 0 indicator. Input S1 to BMUX is Step 0 trigger.
The device driver has two outputs, a boolean output that drives the field device, and a real output that indicates if the field
device is in the correct state based on the input and feedback values. The real output goes to a device monitor block that
collects the outputs from all the device driver blocks and outputs a combined status for the process.
All device driver blocks connect to a device monitor block. Each device monitor block monitors the status of up to eight
device driver blocks. It is, in effect, a specialized logic OR block. If any input to the device monitor block is bad or waiting,
then the output is bad or waiting.
C O N T RO L IN P U T
CO NTROL OU TPUT C O N T RO L O U T P U T
DD R IV E S TAT U S S TAT U S
S1 (1 2 3 ) SE Q M O N SE Q GE N
CI O D E VM O N S1 (1 6 1 )
S2 N S1 (12 5 ) S2 (1 2 4 ) CAS 1
FB1 ST CS JT S2 N
S3 N +1 S2 N S3 N +1 T 2
FB2 T J# S3 N+1
S5 S3 S4 N SH 3
OP SH S4 N+2
S6 S4 S5 TH 4
OS SAT S5 N+3
S5 S6 R 5
ES S6 N+4
S6 S7 J 6
SN S7 N+5
S7 S8 J# 7
SA P S8 N+6
S8 D 8
N+7
S9 CS
N+8
S10 T
N+9
S11 STP
N+10
S12 STE P
T R IG G E R
S13
F E E D B AC K S14
IN P U T S S15
S16
S TEP N UM BE R
BM U X RDEMUX
S1 (1 1 9 ) S1 (1 2 6 )
1
S2 N N
2
S3 N+1
3
S4 N+2
4 S T E P IN D IC ATO R S TO
S T E P T R IG G E R S S5 N+3
5 AU X IL IA RY L O G IC S
FR O M AU X IL IA R Y S6 N+4
6
L O G IC S N+5
S7 7
S8 N+6
8
S9 N+7
S 10
S 11
T 01 7 62 A
Figure 123-4 Logic Diagram for Example Batch Reactor
The output of the device monitor block is the control output status for the whole process. That value (good, bad or waiting)
goes to a sequence monitor block. The sequence monitor block controls step execution. It determines which steps are to be
executed and when. It selects the next step to be executed based on the value from the device monitor and a step trigger
value. The sequence monitor block can be configured to act on either or both inputs. Each step is defined by three
specifications: the next normal step, the next fault step, and a stop type. If the input from the device monitor block is bad
(any field device not in proper state), the sequence monitor block will select a fault step (Step 0 in the example) to be
2VAA000844R0001 J 123-7
executed next. If the input is good, the step chosen depends on the three specifications and the step selection
configuration.
The number of the next step to be executed and a boolean step trigger are sent from the sequence monitor block to a
sequence generator block. Each sequence generator block includes an array of up to eight outputs that can be used to
control device driver blocks. The sequence monitor block (in its most commonly used form), with step type 00, initiates
execution of the next step when the step trigger is on and the status of all devices for the batch unit is good.
The sequence monitor and sequence generator blocks are also used to control and monitor the auxiliary logics that must be
executed with each step. In the sample configuration, when the sequence generator block initiates a step, the output mask
for that step goes to the device driver blocks, and the step number goes to a real signal demultiplexer block. The real signal
demultiplexer block converts the real step number value to a series of boolean outputs which are used to select the auxiliary
logic corresponding to the current step. If the real input is a one, then outputs zero and two through seven will be zeros, and
output one will be a one. Thus, the auxiliary logic corresponding to Step 1 will be initiated.
Figure 123-5 illustrates the auxiliary logic for Step 1. Step 1 includes opening FV4, starting M1 and P1, setting TIC-2 set
point equal to recipe parameter A, and going to Step 2 when the reactor is 80 percent full. The output mask controls FV4,
S TE P 1 D E S C R IPT IO N : VA LV E F V-4 IS O PE N E D AN D AG ITATO R M 1

A N D P U MP P 1 AR E S TA RTE D. T IC -2 IS S E T TO R EC IP E PA R A ME TE R A
(S H O W N B E L OW ). S T EP 1 T R IG G E R IS E N E R G IZ E D W H EN TA N K
LE V E L IS A B OV E 80 % . T H IS W IL L C AU S E ST E P 2 TO B E E X E C U T E D.
S TE P 1 IN D IC ATO R
H //L S1 A (3 7) S T E P 1 T R IG G E R
S1 (1 2) S2 N
LT-2 H N
N D
L
N+1 C U R R E N T TIC -2
S ET P O IN T
M /A
M F C /P
S1 (8 0) O U TP U T TO
PV SP F C V-2
S2 N+1
SP O
S3 N
A A
PID S4 N+2
TR C /R TIC -2 TA K E S TH E S ET PO IN T
S2 (19 ) S5 N+3 FR O M R E C IP E VA LU E A , D O R G .
SP TS C
S1 N S 18 N+4 TH E C O R R EC T VA LU E IS
TT-2 PV MI C-F S E LE C T E D W IT H A M U LTIPL E X ER .
S3 S 19 N+5
TR AX IF S T E P 1 , 4 O R 6 IS B EIN G
S4 S 20 C /R E X E C U TE D, T H E N TH E C O N T RO L
TS
S 21 L O O P R EA D TH E C O R R E C T
LX
S 22 VA LU E A S TH E S ET PO IN T.
CX
S 24 HA A
S 25 L AA
S 26 HDA
S 27 L DA
S 28 AO
S 29 T RS2
S 30 T RPV T
R A M P R ATE
S1 (24 )
ADA PT
N
T H E P U R PO S E O F T H E PU LS E
(T D -D IG ) IS T W O F O LD :
F IR S T, IT P U TS TH E C O N T RO L LE R
RMUX IN AU T O M ATIC. SE C O N D LY, IT
S1 (1 20 ) S1 F O R C E S TH E M /A S TATIO N TO
R E C IP E VAL U E A (8)
S2 N S2 T R AC K TH E VA L U E F RO M T H E
N R M U X BLO C K . T H IS D R IVE S T IC -2
S3 TO T H E C O R R E C T S E T P O IN T.
S4
R E C IP E VAL U E B
S5
S6
R E C IP E VAL U E C
S7
1
S8
S9
S10
S11
S T E P 1 IN D IC ATO R
S1
S T E P 4 IN D IC ATO R S2
(40 ) S1 (3 5)
S3 OR T D -D IG
N N
S T E P 6 IN D IC ATO R S4
T01 7 63A
Figure 123-5 Auxiliary Logic for Step 1 in Example
M1 and P1; the auxiliary logic controls the set point and reactor level measurements.
123-8 2VAA000844R0001 J
The step number (one) goes to a real signal multiplexer, which outputs input value number one. Input value number one is
a recipe value A, the starting reactor temperature. That value goes through a rate limiter and the rate the temperature
ramps up (defined using an adapt block). The output rate then goes to a manual/auto station as the set point, and PID
control is performed based on that set point and the current temperature read from a temperature indicator (TT-2).
The digital timer block shown at the bottom of Figure 123-5 serves two purposes. When a step requiring a change in reactor
temperature executes, the time ensures that the controller is in automatic, and it forces the manual/auto station to track the
temperature value from the real signal multiplexer block. This drives the current set point to the correct value for each step.
The digital timer is configured as a pulse to put the controller into auto and then to go off. This removes a lock in auto
condition and allows putting the controller into manual from keyboard.
The logic at the top of Figure 123-5 illustrates the step trigger which signals the completion of Step 1. A tank level value
goes to a high/low compare block. When the tank level exceeds the high limit (in this case 80 percent) the high alarm output
goes to one. This value is ANDed with the Step 1 indicator from the real signal demultiplexer to create a step trigger. When
the high alarm output goes to one, the output of the AND block goes to one also. That zero to one transition of the output of
the AND block is the step trigger shown in Figure 123-4 signaling the completion of the auxiliary logic for Step 1.
The values of all the completion step triggers go to a boolean signal multiplexer block that selects one of ten input signals
and provides it as the output. The signal is selected with an input select signal. Figure 123-4 illustrates that the input select
signal is the step number output from the sequence generator block (in this example one). Therefore, the value output from
the boolean signal multiplexer block is the value of the completion flag for Step 1. The output of the boolean signal
multiplexer block is the step trigger input for the sequence monitor block. When that value makes a zero to one transition,
the sequence monitor selects the next step in the process. This arrangement ensures that the current step runs to
completion before the next step is initiated.
NOTE: All step logics have the same structure. They are triggered by a step indicator and when the step logic is complete a step
trigger generates. All device checking (to ensure correct operation) is done automatically via the device drivers through the device
monitors by the sequence monitor.
Figures 123-6 through 123-10 illustrate the auxiliary logics associated with Steps 2 through 8 in the example process.
NOTE: Although not specifically shown in the drawings, all integrators have a default value of block address five for S3. This
means the integrators track zero when not active. When active, they start from an initial value of zero.
2VAA000844R0001 J 123-9
Recipe values A through G are selected from seven real recipe table blocks as shown in Figure 123-10. A remote manual
set constant block is used by the operator to select one of ten real values for each recipe value, enabling the operator to fine
tune a recipe and create several products with one set of equipment.
S TE P 2 : M AIN S E Q U E N C E C O N TR O L O PE N S FV-5 TO
E M PT Y R E AC TO R . W H EN R E AC TO R IS BE LO W 5% ,
A 10 M IN U T E E L A PS E D T IM E R IS STAR T E D. W H E N 10
M IN U TE S H AVE PAS S ED, S T E P 2 C O M P LET IO N TR IG G E R
IS EN E R G IZ E D. TH IS D R IV ES M AIN S E Q U E N C E
C O N T RO L S TO S TE P 3.
E TIM E R
H //L S1 (86)
S1 (12 ) S1 A (37) H V S TE P 2 T R IG G E R
LT-2 H S1 (35) S2 N
N S2 N T D -DIG R A
L N N N+1
N+1 D
O N E S H OT PU LS E
TO R ES E T E LAP S E D
S TE P 3 : TH E F LOW O F C OM P O N E N T A IS IN T EG R ATE D. TIM E R
W H EN TO TA L FL OW IS G R E ATE R T H AN R E C IP E VA L U E C ,
S TE P 3 TR IG G E R IS E N E R G IZ E D. TH IS C AU S E S S TE P 4
TO BE G IN E X E C U TIO N .
S1 (1 66)
H //L

FT-1 PV S TE P 3 T R IG G E R
S3 N S1 (12)
S TE P 3 IN D IC ATO R IC Q H
S4 N+1 N
TS L
N+1
R E C IPE VALU E C (24 )

S1
A DA P T N
M /A
M F C /P
(80 ) O U TP U T TO
S1 PV SP
N+1 F C V-1
P ID S2 SP O
S2 (19) S3 N
SP A A
S1 N S4 N+2
FT-1 PV TR C /R FIC -1 R EC E IV ES ITS S ET P O IN T FR O M
S3 S5 N+4 R E C IPE VALU E B . W H E N ST EP 3, 4 O R 5
TR TS C
S4 S 18 N+3 IS BE IN G E X EC U TE D, TH E C O N TR O L
TS MI C -F
S 19 N+5 LO O P IS P LAC ED IN AU TO M AT IC . W H EN
AX OT H ER STE P S A R E E X E C U TE D TH E
S 20 C /R LO O P IS P LAC ED IN M A N UA L AN D TH E
S 21 LX O U TPU T IS C LO SE D.
(2) S 22
A CX
N S 24 HA A
S 25 L AA
R E C IPE VALU E B
S 26 HDA
S 27 L DA
S 28 AO
S 29 TR S2
S 30 TR PV T
S1
S2 O N E S H OT PU LS E TO
(40) S1 (33) S1 (35) C L O S E VA LV E A N D P U T
S3 OR NOT T D -DIG C O N TRO L LO O P IN
N N N
S TE P 5 IN D IC ATO R S4 M A N UAL
T 01 7 64 A
Figure 123-6 Auxiliary Logic for Steps 2 and 3
123-10 2VAA000844R0001 J
H //L S T E P 4 T R IG G E R
S1 (16 6 ) S1 (1 2 )

F T-1 PV H
S3 N
IC Q L
S4 N +1
TS
S T E P 4 : TH E F L OW O F C O M P O N E N T B IS
IN TE GR AT E D U N T IL IT IS G R EATE R TH A N
R E C IPE VA LU E E . TH E S T EP 4 T R IGG E R
R E C IPE VA LU E E IS EN E R G IZ ED, C AU S IN G S TE P 5 TO B E
S1 (2 4 )
ADAPT E XE C U TE D.
H //L S T E P 5 T R IG G E R
S1 (1 6 6 ) S1 (1 2)

F T-1 PV H
S3 N
IC Q L
S4 N+1
TS
S T E P 5 : T H E FL OW O F C O M P ON E N T C IS
IN T E G R AT E D U N T IL IT IS G R EAT E R TH A N
R E C IP E VA L U E F. T H E S TE P 5 T R IG GE R
R E C IPE VAL U E F IS E N E R G IZ ED, C AU S IN G S TE P 6 TO B E
S1 (2 4 ) E X E C U T E D.
ADAPT
T 01 7 6 5 A
STE P 6 IN DICATO R
S1 A (37 ) S TEP 6 TR IG G E R
S2 N
N
D
H //L
S1 (12 )
TT-2 H
N
L S TEP 4: THE FLO W O F C O M P O N E NT B IS
N +1
INTE G R ATE D U NT IL IT IS G R EATE R TH A N
RE C IPE VALU E E . TH E ST EP 4 T RIG G ER
IS ENE R G IZED, C AU SING S TE P 5 TO BE
RE C IPE VALU E 6 E XEC UTE D
S1 (24)
ADA P T
THIS L O G IC ADJ US TS T HE RA M P R AT E O F
(2 )
A TIC -2 IN S TE P 6. THE TR AN SF ER B LO C K W IL L
N O U TPU T A LO W VA LUE W HICH L IM ITS THE
RAT E AT W HICH THE SET PO INT CA N B E
CH AN G E D. W HE N A NY S TE P BUT 6 IS B EIN G
EXE C UTE D, A H IG H VA LU E IS O UT PU T FRO M
S1 THE TRA N SF ER BL O CK. T HE RE S ULT IS RA M P RAT E
FO R TIC -2
(2) S2 (9) IN S TA NT C HA NG E IN TH E SE T PO IN T O F TIC -2.
A T
N S3 N
STE P 6 IN DICATO R
STE P 7 IN DICATO R
S1 A (35)
S TEP 7 TR IG G E R
(37 ) S 1
S2 N T D -D IG
N N
D
H //L ST EP 7: E M P TY R E AC TO R BY O P E NING FV-5.

S1 (12) W H EN RE ACTO R LE VE L IS BE LO W 5% , S TART
LT-2 H
10 M INU TE T IM E R. W H E N 10 M IN U TES IS UP,
N
L ST EP 7 TR IG G ER W ILL B E EN ER G IZ ED
N +1
CAU SIN G EX E CU TIO N O F S TE P 8
T01 7 66 A
S TE P 8 IND ICATO R (45 )

S1
D O /L 2 31
S1 A (3 7) S TE P 6 T RIG G E R
S1 RC M (62 ) S2 N
S N
S2 N D
P
S TE P 8 : A B AT CH TICK E T IS PR INT E D
S3
R O U T. TH E O PE R ATOR IS A SK E D T O
S4 AC K NOW LE D GE TH AT IT IS PR IN T ED
O
S5 O U T. H E DO E S T HIS TH RO U GH THE
I S1 (3 5)
S6 T D -D IG R C M B L OC K . T HE S EQU E NC E W ILL
F N A DVAN C E TO T H E NE X T N O R MA L S TE P.
S7 N OT E TH AT T H IS IS ST E P 1 W H IC H W ILL
A
IN IT IATE TH E BATCH S E QU E NC E AG AIN .
T 01 767 A
Figure 123-9 Auxiliary Logic for Step 8
2VAA000844R0001 J 123-11
Distributed Recipe Handling 123. Device Driver
S5 R E C IP R R EC IPE VA LU E A
(68 ) S11 (1 18 )
S6 REMSET N
PS
S13
ES
S14
EP S
S15
EV
R E C IP R R EC IPE VA LU E B
S11 (11 8)
PS
S13
ES
S14
E PS
S15
EV
R E C IP R R E CIPE VALU E C
S11 (1 18 )
PS
S13
ES
S14
EP S
S15
EV
R E C IP R R E C IP E VALU E D
S11 (11 8)
PS
S13
ES
S14
E PS
S15
EV
R E C IP R R EC IPE VA LU E E
S11 (11 8)
PS
S13
ES
S14
E PS
S15
EV
R E C IP R R E C IPE VAL UE F
S11 (11 8)
PS
S13
ES
S14
E PS
S15
EV
R E C IP R R E CIPE VALU E G
S11 (1 18 )
PS
S13
ES
S14
EP S
S15
EV
T 01 7 68 A
Figure 123-10 Recipe Tables for Example Process
123.3 Distributed Recipe Handling
Depending on the memory requirements for the actual batch control configuration, recipes can be stored in the same
module as the control configuration, or in another module located either on the same Controlway/module bus or in a
different process control unit on the communications highway.
This distributed recipe handling capability generally eliminates the requirement for a centralized computer to store batch
recipes, and its associated costs, project complications, and operational unreliabilities. Further, recipe storage can be
expanded incrementally as the need arises by simply adding another module to the control system.
123.3.1 Storing Recipe Data
A specialized function block has been provided in the module to simplify recipe handling. The real recipe table function
block (RECIPR, function code 118) stores up to ten values of one recipe parameter. The output of the RECIPR block
corresponds to the parameter value for the recipe number input to the RECIPR block. The RECIPR block can be used to
change the value of any variable parameter from recipe to recipe. Further, the RECIPR block can change which steps are
used for preparation of a batch, and the order that the steps are executed.
RECIPR blocks can be linked together in parallel (each block receives the recipe number as an input), with each block
storing up to ten values for each of the recipe parameters. If more than ten values are required for each parameter, the
RECIPR blocks can be linked together in series to provide the necessary number of values for each parameter (the second
block is slaved to the first, the third is slaved to the second, etc.). Consequently, a batch process requiring eight recipes,
each with five parameters, requires five RECIPR blocks to store the recipe data. A batch process requiring 28 recipes each
with five parameters, requires 15 RECIPR blocks (two slave blocks connected to each of five master blocks).
123-12 2VAA000844R0001 J
123. Device Driver Recipe Handling for a Fixed Batch Sequence
123.4 Recipe Handling for a Fixed Batch Sequence
In a fixed batch sequence, the order in which the steps are accomplished remains fixed from recipe to recipe, but the
amounts of ingredients and the conditions they are added in may vary. The following lube oil blending example illustrates
how fixed-sequence recipes can be edited. Table 123-2 shows the contents of a series of recipes.
Table 123-2 Recipe Contents
Parameter Description
1 Percent component A in blend
2 Percent component B in blend
3 Percent component C in blend
4 Percent component D in blend
5 Percent component E in blend
6 Percent component F in blend
7 Maximum flow rate of blend
8 Parameter number of component to be used for viscosity trim
9 Viscosity set point (SUS) for blend
10 Total amount of blend production (barrels)
Each of these parameters is stored in a RECIPR block. The recipe is stored in ten RECIPR blocks tied together in parallel.
The module configuration logic required to manipulate and store this recipe is shown in Figure 123-11.
NOTES:
1. Each RECIPR block contains one of the recipe parameters.
2. REMSET blocks load the new values into the RECIPR function blocks. These blocks show the current value of the recipe
parameter before any changes are entered.
3. The recipe being selected for use is from the REMSET at block address 1000.
4. The RCM at block address 907 is used to write the new values into the RECIPR blocks through REMSETs at block addresses
908 through 917.
5. In this configuration, both the REMSET that selects the recipe parameter for editing and RCM that writes the new parameter
value to the RECIPR block are interlocked to allow editing of the recipe only during Step 1 of the batch sequence. Without this
interlock, the recipe can be edited at any time during the execution of the batch.
2VAA000844R0001 J 123-13
Recipe Handling for a Fixed Batch Sequence 123. Device Driver
6. After the recipe is edited, it can be downloaded to the RECIPR blocks by triggering the RCM at block address 907 from the
console.
S1 S1 H //L
(1 5) S1 (12) S 1 A (3 7) S 1
S2
T
(9 ) S2  (k ) 9 19
H 920
S2 N 9 22 N OT
(3 3) S1 (3 9) R E C IP E T R A C K
S3 9 18 L 921 9 23 S2 OR
D 924
R E C IP E T R A C K 1 NOT S TEP 1
NOT S TEP 1
S TE P 1 R E C IP R
IN D IC AT O R S1 (33) S5 S 11 (118) R E C IP E V AL U E A
NO T 9 99
(68) PS 100 1
S6 R E M SE T 100 0 R E C IP E T R AC K S 13
ES
S 14
S5 (6 8) E PS
S 15
R E C IP E VA LU E A S6 R E M S E T 908 EV
S1 RC M (6 2)
S 9 07
S2 R E C IP R
P (118) R E C IP E V AL U E B
S3 S 11
R (35) PS 100 2
S4 S1 S 13
S5
O T D -D IG 9 25 S 14
ES
I S5 E PS
S6 (6 8) S 15
F R E C IP E VA LU E B S6 R E M S E T 909 EV
S7
A
R E C IP R
S 11 (118) R E C IP E V AL U E C
PS 100 3
S 13
ES
S 14
S5 E PS
(6 8) S 15
R E C IP E VA LU E C S6 R E M S E T 910 EV
R E C IP R
NOTE S : S 11 (118) R E C IP E V AL U E D
1. T H IS PA G E A LLO W S E N TE R IN G R E C IP E VA LU E S PS 100 4
S 13
F O R IT E M S A T H R O U G H G . R E C IP E IT E M S C A N B E ES
S 14
C H A N G E D O N LY D U R IN G ST E P 1. D E F IN IT IO N S O F S5 E PS
(6 8) S 15
T H E R EC IP E IT E M S A R E : R E C IP E VA LU E D S6 R E M S E T 911 EV
R E C IP E A = P E R C E N TAG E O F A IN F IN A L P R O D U C T
R E C IP E B = P E R C E N TAG E O F B IN F IN A L P R O D U C T R E C IP R
S 11 (118) R E C IP E V AL U E E
R E C IP E C = P E R C E N TA G E O F C IN FIN A L P R O D U C T PS
S 13 100 5
R E C IP E D = P E R C E N TA G E O F D IN FIN A L P R O D U C T ES
R E C IP E E = P E R C E N TAG E O F E IN F IN A L P R O D U C T S 14
S5 E PS
R E C IP E F = P E R C E N TAG E O F F IN F IN AL P R O D U C T (6 8) S 15
R E C IP E VA LU E E S6 R E M S E T 912 EV
R E C IP E G = M A XIM U M F LO W O F P RO D U C T
C A S C A D E LO O P S E L E C T = C A S C A D E D LO O P 1 - 6 R E C IP R
A IC SE T P O IN T = D ES IR E D V IS C O S IT Y O F P R O D U C T S 11 (118) R E C IP E V AL U E F
PS
TO TA L F LO W = T OTAL IZ E D A M O U N T O F P R O D U C T S 13 100 6
ES
S 14
S5 E PS
2. T H IS L O G IC A LL O W S V IE W IN G T H E R E C IP E (6 8) S 15
VA L U E S A N D E D IT IN G T H E R E C IP E O N -L IN E . R E C IP E VA LU E F S6 R E M S E T 913 EV
3. T H IS A L LO W S C H A N G IN G A R E C IP E O N LY W H E N R E C IP R
IN S TE P 1. T H E R E M S E T TR A C K S IT S E LF W H E N S 11 (118) M A X F LO W
PS 100 7
N O T IN S T E P 1. S 13
ES
S 14
4. A R E C IP E C A N B E E D IT E D O N LY W H E N IN S T E P 1. S5 E PS
(6 8) S 15
M A X F LO W S6 R E M S E T 914 EV
R E C IP R CA SC AD E
S 11 (118) L O O P S EL E C T
PS 100 8
S 13
ES
S 14
C AS CA D E S5 E PS
(6 8) S 15
L O O P S EL E C T S6 R E M S E T 915 EV
R E C IP R
S 11 (118) A IC SE T P O IN T
PS
S 13 100 9
ES
S 14
S5 E PS
(6 8) S 15
A IC S E T P O IN T S6 R E M S E T 916 EV
R E C IP R
S 11 (118) TO TA L F LO W
PS 101 0
S 13
ES
S 14
S5 (6 8) E PS
S 15
T OTA L F LO W S6 R E M S E T 917 EV
T 01 76 9A
Figure 123-11 Fixed-Sequence Batch Control Example with Online Editing
123-14 2VAA000844R0001 J
124. Sequence Monitor
124. Sequence Monitor

The sequence monitor function code controls the execution of a sequence generator block by selecting the order of step
execution in a process based on system and external inputs. The sequence monitor block performs a logic action based on
the value of the control status input from a device monitor block and a boolean step trigger input. Depending on the value of
the control status input, the next step can be a fault step or a normal step determined by internal logic. The sequence
monitor block can be placed in either automatic or semi-automatic mode, and includes hold/initialize and executed stop (E-
STOP) inputs. Each sequence monitor block handles up to eight steps. If more than eight steps are required, a number of
sequence monitor blocks can be chained together in series with S1. The sequence monitor block defines step type, next
step, and fault values for each step.
SE Q MO N Outputs
S2 (1 2 4 )
CS JT
S3 N+1
T J#
N
S4 SH Blk Type Description
S5 S AT
S6
S7
ES N R Jump step number
SN
S8 SAP
N+1 B Jump step trigger
Specifications
S1 N 0 I Note 1 Block address of next sequence monitor block asso-

ciated with this sequence of steps:
0 = no more blocks
S2 N 5 I Note 1 Block address of control status input
S3 N 0 I Note 1 Block address of step trigger
S4 N 0 I Note 1 Block address of hold/initialize input (hold current

step on 0 to 1 transition of input)
S5 N 0 I Note 1 Block address of semi-automatic trigger (initiate next

step on a 0 to 1 transition of input)
S6 N 0 I Note 1 Block address of E-STOP input (block will be reset to

Step 0 when <S6>=1)
S7 N 5 I Note 1 Block address of initial step number (reset step)
S8 Y 1 I Note 1 Block address of semi-automatic permissive:

<S8> = 0 = semi-automatic mode allowed
<S8> = 1 = semi-automatic mode not allowed
S9 Y 0 I 0 - 22 Step 1 type:
0X = permit hold and semi-automatic modes
1X = permit hold only
2X = permit no option
X0 = advance when <S2> = 0.0 and <S3> = 1only
X1 = advance when <S2> = 0.0
X2 = advance when <S3> = 1 only
S10 Y 0 I 0 - 22 Step 2 type
S11 Y 0 I 0 - 22 Step 3 type
S12 Y 0 I 0 - 22 Step 4 type
S13 Y 0 I 0 - 22 Step 5 type
S14 Y 0 I 0 - 22 Step 6 type
S15 Y 0 I 0 - 22 Step 7 type
S16 Y 0 I 0 - 22 Step 8 type
2VAA000844R0001 J 124-1
Explanation 124. Sequence Monitor
S17 Y 0.000 R Full Step to execute after Step 1 if input is good
S25 Y 0.000 R Full Step 1 fault step (control status input bad)
NOTE:
124.1 Explanation
The sequence monitor block uses the values of two inputs to determine the next step number in a batch process. The first
input is the control status input read from a device monitor block. This input defines the current state of the devices that the
sequence generator block controls. This input can be 0.0 (good), 1.0 (bad), or 2.0 (waiting). If even one device is bad, this
input is marked bad (value equals 1.0). The second input is the step trigger. The step trigger is dependent on the current step
and the results of auxiliary logic associated with the device in question.
Each step of a batch sequence often requires auxiliary logic to perform functions in addition to activating/deactivating discrete
devices (i.e., change controller set points, totalize flow, etc.). Figure 124-1 shows how this auxiliary logic ties into the batch
execution configuration. The auxiliary logic executes according to the current step number read from the sequence generator
124-2 2VAA000844R0001 J
124. Sequence Monitor Specifications
block. The current step number input then selects from the results of that auxiliary logic the boolean signal that will be output to
the sequence monitor block as the step trigger.
CO N T RO L INPU T
C O N T RO L O U T PU T C O N TRO L OU T PUT
S TAT U S S TAT US
D DR IV E
S1 (1 23 ) D E VM O N SEQ M ON SE Q G E N
CI O
S2 N S1 (1 25 ) S2 (12 4 ) S1 (1 6 1 )
FB1 ST CS JT C AS 1
S3 N+1 S2 N S3 N +1 S2 N
FB2 T J# T 2
S5 S3 S4 N S3 N+ 1
OP SH SH 3
S6 S4 S5 S4 N+ 2
OS S AT TH 4
S5 S6 S5 N+ 3
ES R 5
S6 S7 S6 N+ 4
SN J 6
S7 S8 S7 N+ 5
SAP J# 7
S8 S8 N+ 6
D 8
S9 N+ 7
CS
S10 N+ 8
T
S11 N+ 9
STP
FE E D BAC K S12 N+ 1 0
IN P UT S S13
S14
S15
S16
S T E P T R IG GE R
S1 (3 5 ) S1 (3 3)
T D -DIG NO T
N N
S TE P N UM B ER
S TA RT /R ES U M E
F LAG F RO M
AU XILIA RY L O G IC
BM UX RD E M U X
S1 (1 19 ) S1 (1 2 6 )
1
S2 N N
2
S3 N+1 S TE P
3
S4 N+2 IN D ICATO RS
S TE P 4 TO
S5 N+3
T RIG G ER S 5 AU XIL IA RY
F RO M S6 N+4 L O G IC S
6
AU XIL IARY S7 N+5
7
L O G IC S N+6
S8
8
S9 N+7
S10
S11
S TART /R ES U M E S T E P (N O N-Z E RO )
F R OM AUXIL IA RY L O GIC T01 7 70 A
Figure 124-1 Sequence Monitor Block Used in a Batch Operation
The values of the step trigger and the control status input are tested against several operator defined parameters to
determine which step executes next.
The sequence monitor block has both a next step and a fault step for each step number. When the control status input is
bad (1.0), this function automatically selects the fault step number. The fault step number goes to the sequence generator
block if the step type requires a good status input to continue with the sequence. If the control status input is good (0.0), or
waiting (2.0), the output depends on the step type defined in the specification descriptions.
The sequence monitor block can operate in either an automatic or semi-automatic mode. In the automatic mode, the
sequence is dependent on the values of the control status input and the step trigger. In the semi-automatic mode, the
sequence is dependent on the values of the control status input, the step trigger, and the semi-automatic step trigger. The
operator must activate the semi-automatic step trigger manually to proceed with the sequence as one of the conditions to
go to the next step. The block can be placed in semi-automatic mode only if both the semi-automatic permissive and step
type specifications permit it.
NOTE: For the sequence monitor to begin execution from Step 0, the old/initialize input <S4> must toggle from one to zero while
the value of <S7> dictates the beginning step number to execute.
S1 – NXT
Block address of next sequence monitor block in the series of blocks used to execute the sequence. If this value equals
zero, there are no more blocks in the sequence. Each sequence monitor block can accommodate eight steps of a
2VAA000844R0001 J 124-3
Specifications 124. Sequence Monitor
sequence. If the sequence contains more than eight steps, sequence monitor blocks can be linked in a series, with the last
step of the first block initializing the first step of the next block, etc. Therefore, Steps 1 through 8 in the second sequence
monitor block are Steps 9 through 16 in the sequence.
S2 – CSI
Block address of control status input (typically a device monitor block). The value in this block represents the control status
of all the devices in the control loop. The output of this block is good when all the inputs are good, bad when any one input
is bad, and waiting if any input is waiting for a reply from a device driver block and no inputs are bad. This value and the
value of the step trigger are used to select the next step in the sequence. When the control status input is bad, the fault
value for the next step is automatically output if the step type is one that requires a good status to continue with the
sequence. If the control status input is good or waiting, output depends on the step type (S9) for the current step.
0.0 = good
1.0 = bad
2.0 = waiting
NOTE: Any step trigger (S3) or semi-automatic mode trigger (S5) that occurs while the control status input is 2.0 (waiting) is
remembered and therefore acted upon when the control status input becomes 0.0 (good).
S3 – STEP
Block address of step trigger. The value in this block, used with the control status input, selects the next step in the control
sequence. Auxiliary logic used for the batch process generates the step trigger. The sequence monitor recognizes the
trigger when it goes from a zero to one state and when it is held high in its one state.
S4 – HOLD
Block address of hold/initialize value. The sequence monitor block can hold the sequence at certain steps. The
hold/initialize function is active only when the step type specification is configured to permit it.
1 = the sequence holds at the current step.

1 to 0 transition = the sequence monitor block begins execution with the initial step specified by S7.
0 = sequence is in run mode.
NOTE: To enable the sequence monitor to resume running from the current step after the hold, it is necessary to feed the jump
step number output N into input S7.
S5 – SEMI
Block address of semi-automatic mode trigger. When the semi-automatic mode is permitted by step type (S9) and the semi-
auto permissive (S8), the operator must change this value from zero to one as one of the conditions for initiation of the next
step of the sequence.
S6 – E-STOP
Block address of E-STOP (executed stop) input. The E-STOP specification drives the sequence to Step 0 (the reset step)
whenever it has a value of one. The block referenced by this specification is normally a remote control memory function
block used as an E-STOP. Thus, reserve the disable mask (Step 0) in sequence generator blocks driven by the sequence
monitor block for E-STOP.
S7 – INIT
Block address of initial step number. When the block is initialized by a one to zero transition of <S4>, the sequence begins
with the step identified in this block.
S8 – PERM
Block address of the semi-automatic permissive. When the value in the block is a zero, the semi-automatic mode is
permitted unless step type (S9) overrides it.
<S8> = 0, semi-automatic mode permitted.

<S8> = 1, automatic mode permitted.
124-4 2VAA000844R0001 J
124. Sequence Monitor Outputs
S9 – TYPE1
Step 1 type. Each step type is made up of two digits. The ones digit defines the states of the control status input and step
trigger necessary for the block to initiate the next step of the sequence. The tens digit identifies the control options available
to the operator for the step.
X X
Control status input state and step trigger.
X0 = advance when <S2> = 0.0 and <S3> = 1
X1 = advance when <S2> = 0.0
X2 = advance when <S3> = 1
Control options.
0X = permit hold and semi-automatic modes
1X = permit hold
2X = permit no option
S10 to S16 –
TYPE2 to TYPE8
Step types for Steps 2 through 8 defined in S9.
S17 to S24 –
STEP1 to STEP8
Define the number of the step the system should execute after Step n (n equals one to eight) is completed when the block
is operating normally.
S25 to S32 -
FAULT1 to FAULT8
Define the number of the fault step the system should execute after Step n (n equals one to eight) is completed when the
block receives a bad (1.0) input from the device monitor block and step type requires a good control status input.
124.1.2 Outputs
N
(Jump step number) Identifies the number of the step performed at the conclusion of the current step.
N+1
(Jump step trigger) Upon a zero to one transition of output N+1, initiates a step jump in the sequence generator block.
The sequence generator block then executes the step identified by the jump step number. A zero to one transition of this
value occurs when the sequence monitor block proceeds to the next step in the sequence (when the conditions defined by
the step type specification are met). This output makes a one to zero transition one segment cycle after the zero to one
transition.
124.2 Applications
Refer to function code 123 for an example of the sequence monitor block used in a batch process. Sequence monitor
blocks can also be used for sequential control.
2VAA000844R0001 J 124-5
Applications 124. Sequence Monitor
124-6 2VAA000844R0001 J
125. Device Monitor Explanation
125. Device Monitor

The device monitor block takes the control status outputs from up to 16 device drivers or device monitors to provide a
common control output status. The control output status can be sent to another device monitor block, or to a sequence
monitor block that determines the next step in a process. When all inputs are good (0.0), the output is good (0.0). When any
input is bad (1.0), the output is bad (1.0). When any input is waiting (2.0) and no input is bad (1.0), the output is waiting.
Outputs
D EV M O N
S2 N
S3 N R Control output status:
S4 0.0 = good
S5
1.0 = bad
S6
S7
2.0 = waiting
S8
S9 Specifications
S10
S11
S12
S13
S14
S15 S1 N 5 I Note 1 Block address of CO status 1
S16
S2 N 5 I Note 1 Block address of CO status 2

NOTE:
125.1 Explanation
The device monitor block monitors a group of control output status values. It reads those values from a device driver or
other device monitor block and outputs a value dependent on the values of the inputs.
For example, if a sequence generator block defines output states for ten field devices, the device monitor block associated
with that control loop receives the control output status for the devices and generates a common output. That output goes to
the sequence monitor block controlling the step output of the sequence generator block. The sequence monitor block then
uses that information to select the next step in the process. It is used as a feedback from the field to alert the system of an
abnormal state of the field devices.
2VAA000844R0001 J 125-1
Specifications 125. Device Monitor
Figure 125-1 illustrates this control scheme. If a control loop controls more than 16 devices, the output of additional device
monitor blocks can be fed into another device monitor block to establish a common output. Therefore, no matter how many
devices are being controlled by a single sequence generator block, the control output status can be reduced to one value
representing all inputs.
D D R IV E D E VM O N SE Q M O N SE Q G E N
S1 (1 23) S1 (12 5) S 2 (1 24) S1 (16 1)
CI O CS JT CA S 1
S2 N S2 N S3 N+1 S2 N
F B1 ST T J# T 2
S3 N+1 S3 S4 N S3 N +1
F B2 SH SH 3
S5 S4 S5 S4 N +2 TO OTH E R
OP S AT TH 4
S6 S5 S6 S5 N +3 D E VIC E
OS ES R 5
S6 S7 S6 N +4 D R IV ER
SN J 6 B LO C K S
S7 S8 S7 N +5
D D R IV E S AP J# 7
S8 S8 N +6
S1 (1 23) D 8
CI O S9 N +7
S2 N CS
F B1 ST S10 N +8
S3 N+1 T
F B2 S11 N +9
S5 BM U X ST P
OP S12 S1 (11 9) N + 10
S6 N
OS S13 S2
S14 S3
D D R IV E S15 S4 RDEMUX
S1 (1 23) S16 S5 S1 (12 6)
CI O 1
S2 N S6 N
F B1 ST 2
S3 N+1 S7 N +1
F B2 3
S5 S8 N +2
OP FROM 4
S6 S9 N +3 TO
OS
AU X IL IA RY 5
N +4 AU XILIA RY
L O G IC S S 10
6 LO G IC S
S 11 N +5
D D R IV E 7
N +6
S1 (1 23) 8
CI O N +7
S2 N
F B1 ST
S3 N+1
F B2
S5
OP
S6
OS
D D R IV E
S1 (1 23)
CI O
S2 N
F B1 ST
S3 N+1
F B2
S5
OP
S6
OS
D D R IV E
S1 (1 23)
CI O
S2 N
F B1 ST
S3 N+1
F B2
S5
OP
S6
OS
D D R IV E
S1 (1 23) TO FIE L D
CI O
S2 N D E V IC E
F B1 ST
S3 N+1
F B2
S5
OP
S6
OS
F E E D B AC K IN P U T S
F R O M FIE LD D E VIC E T 01 7 7 1 A
Figure 125-1 Controlling Multiple Field Devices
S1 to S16 –
COS1 to COS16
Block addresses of the device drivers control status output or the device monitor block containing the control output status
values for other monitored devices.
125.1.2 Output
N
Control output status based on the control output status of the devices monitored by the device monitor block.
0.0 = all inputs good
125-2 2VAA000844R0001 J
125. Device Monitor Applications
1.0 = any input bad

2.0 = no inputs bad and at least one input waiting
NOTE: Only one input must be bad for the output to be bad.
125.2 Applications
Device monitor blocks can be used to control any system that requires the output of a group of devices be a certain value
before a control step is implemented. Refer to function code 123 for an example of the device monitor block used in a batch
control process.
2VAA000844R0001 J 125-3
Applications 125. Device Monitor
125-4 2VAA000844R0001 J
126. Real Signal Demultiplexer Explanation
126. Real Signal Demultiplexer

The real signal demultiplexer function code outputs boolean signals based on a real input value. The real value can be
converted to boolean values in three modes (select, integer and BCD). An unlimited number of real signal demultiplexer
blocks may be linked together in the select mode (demultiplex the real input into the required number of boolean outputs).
Up to four blocks may be linked together in the integer and BCD modes for demultiplexing. The first block in the link list is
the group master. The master accepts the input signal and drives the outputs for the group.
Outputs
RDEMUX Blk Type Description

S1 (1 2 6 )
1
N
2
N+1 N B Output 0 (least significant bit)
3
N+2
4
5
N+3 N+1 B Output 1
N+4
6
7
N+5
N+2 B Output 2
N+6
8
N+7
N+3 B Output 3
N+4 B Output 4
N+5 B Output 5
N+6 B Output 6
N+7 B Output 7 (most significant bit)
Specifications
S1 N 5 I Note 1 Block address of select input
S2 N 0 I 0-2 Conversion mode:

0 = select (unlimited number of blocks in link list)
1 = integer (maximum of 4 blocks in link list)
2 = BCD (maximum of 4 blocks in link list)
S3 N 0 I Note 1 Block address of next block in link list

NOTE:
126.1 Explanation
126.1.1 Select Mode
In the select mode, the block output is all zeros and a one in the position specified by the real input. For example, if the real
input is a seven, the eighth boolean output is a one and all others are zeros. In this mode, an unlimited number of real signal
demultiplexer blocks can be linked together. If <S1> is less than zero, output zero equals one. If <S1> is greater than the
maximum, the last output is set. If a number outside of the available range (for example, zero through seven in the case of
a master) is selected, the nearest output is set. For example, if the number selected is -1, the zero output changes to a one.
126.1.2 Integer Mode
The integer mode converts the real input to a binary bit pattern. For example, if the input is 135, the binary output is
1000111, since 135128421. The least significant digit is output zero of the master block. This is true no matter how
many blocks are in the link list. Table 126-1 shows the integer mode input to output relationship.
2VAA000844R0001 J 126-1
BCD Mode 126. Real Signal Demultiplexer
Up to four real signal demultiplexer blocks can be linked together in the integer mode, allowing the conversion of any real
number up to 4.2  109 to binary digits.
Table 126-1 Integer Mode Input to Output Relationship
Output MSB Real to Binary LSB
Output Number 7 6 5 4 3 2 1 0
Weighted Decimal Value 128 64 32 16 8 4 2 1
Boolean Outputs Example: 135 = 1 0 0 0 0 1 1 1
126.1.3 BCD Mode
The BCD mode converts the real input to BCD digits. Each digit of the real number converts to four boolean digits by writing
the real digit as the sum of the first four powers of two (eight, four, two, one). For example, if the real digit is a six, the
boolean outputs for that digit are 0110 since 60(8)1(4)1(2)0(1). Table 126-2 shows how each group of outputs
represents two real digits.
Up to four real signal demultiplexer blocks can be linked together in the BCD mode allowing for the conversion of any real
number up to eight digits in length. The least significant digit is always represented by outputs zero through three of the
master block, no matter how many blocks are linked in series. Figure 126-2 and Table 126-3 show this arrangement.
Table 126-3 shows sample outputs for each of the three modes. There are two blocks in the link list. Outputs zero through
seven are from the group master, and outputs eight through 15 are from the second block.
Table 126-2 Each Group of Outputs Represents Two Real Digits
Output MSB Real to Binary LSB
Output number 7 6 5 4 3 2 1 0
Weighted decimal value Tens Digit Ones Digit
8 4 2 1 8 4 2 1
Boolean outputs example: 06 0 0 0 0 0 1 1 0
W EIG H TE D
VALU E S O U T PU TS
R DE M UX
< S1> = 1234 S1 (12 6)
1 1 0
< S2> = 2 N
2 2 0
(B C D M O D E ) N+1 4
3 4 1
N+2
4 8 0
N+3
5 1 1
N+4
6 2 1
N+5 3
7 4 0
N+6
8 8 0
N+7
R DE M UX
S1 (12 6)
1 1 0
N
2 2 1
N+1 2
3 4 0
N+2
4 8 0
N+3
5 1 1
N+4
6 2 0
N+5 1
7 4 0
N+6
8 8 0
N+7
T 01 77 2A
Figure 126-1 Output Values in the BCD Mode
126-2 2VAA000844R0001 J
126. Real Signal Demultiplexer Applications
Table 126-3 Sample Outputs of a Real Signal Demultiplexer Block
MSB Output Number LSB

Conversion
Input Value
Type
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6 Select 0 1 0 0 0 0 0 0
(master only)
Integer 0 0 0 0 0 1 1 0
BCD 0 0 0 0 0 1 1 0
15 Select 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
(both blocks)
Integer 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
BCD 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1
1234 Integer 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0
(both blocks)
BCD 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
126.2 Applications
Real signal demultiplexer blocks can be used for a variety of control purposes. Figure 126-2 shows how, in the select mode,
the boolean outputs can be used to trigger execution of auxiliary logic sequences in a batch process.
In the select mode, the real signal demultiplexer block converts the real step number input from the sequence generator
block into a series of boolean outputs. The boolean outputs act as triggers for the auxiliary logic associated with the
sequence. A value of one is output as the trigger for the auxiliary logic associated with the current step, initiating the
execution of that logic.
S E Q GE N
S1 (1 61)
CA S 1
S2 N R DE M UX
T 2 S1 (126)
S3 N +1 1
SH 3 N
S4 N +2 2
TH 4 N+1
S5 N +3 3
R 5 N+2
FROM S6 N +4 4
J 6 N+3 TO
S EQ U E N C E N +5
S7 5 AU XILIA RY
M O N ITO R J# 7 N+4
S8 N +6 6 LO G IC S
BLOCK D 8 N+5
N +7 7
CS N+6
N +8 8
T N+7
N +9
S TP
N + 10
T 01 7 73 A
Figure 126-2 Recipe Selection
2VAA000844R0001 J 126-3
Applications 126. Real Signal Demultiplexer
126-4 2VAA000844R0001 J
128. Slave Default Definition
128. Slave Default Definition

The slave default definition function code provides the default values for function blocks that interface with digital I/O
modules (that is, BCD output, FC 115, or Digital Output Group, FC 83). The default values of up to two function codes are
definable. When providing default values for FC 83s, use specifications 2 through 9 and (if necessary) 19 through 26. When
providing default values for FC 115s, use specifications 2 through 17 and (if necessary) 19 through 34.
Outputs
(1 2 8 )
D IG D EF
N R 0.0 (no useful output)
Specifications
S1 N 0 I Note 1 Block number of first digital I/O Used with

module function block function code
83
S2 N 0 B Full Default state for output 1 or
function code
S3 N 0 B Full Default state for output 2 115
S4 N 0 B Full Default state for output 3
S10 N 0 B Full Default state for output 9 Used with

function code
S11 N 0 B Full Default state for output 10 115 only
2VAA000844R0001 J 128-1
Explanation 128. Slave Default Definition
S18 N 0 I Note 1 Block number of second digital Used with

I/O module function block function code
83
S19 N 0 B Full Default state for output 1 or
function code
S20 N 0 B Full Default state for output 2 115
S27 N 0 B Full Default state for output 9 Used with

function code
S28 N 0 B Full Default state for output 10 115 only

NOTE:
128.1 Explanation
Function code 128 selects the default values for all outputs associated with any type of DSO module. If the control module
goes bad, then the outputs can be forced to the default values until the module can be replaced or repaired.
The BCD output (function code 115) selects the failover to default settings for each group of eight outputs. Specification S2
of function code 115 defines the I/O module. If the hundreds digit of S2 equals logic 0, then the outputs go to the default
values as configured by function code 128 on loss of the control module. Setting the hundreds digit to logic 1 holds the
current output. Function code 128 provides default values for a maximum of two DSO modules. If one or both of the
modules have eight outputs, then outputs one through eight are the default values, and outputs 9 through 16 remain
unused.
128-2 2VAA000844R0001 J
129. Multistate Device Driver

The multistate device driver (MSDD) function code provides a means of controlling field equipment (i.e., variable speed
motor) or control schemes that have more than one control mode. The MSDD block provides four state controls with
feedback. Two control inputs or an operator input selects one of four output masks for control action. The output masks
provide three boolean signals simultaneously to the actual control logic. The MSDD block accepts four boolean feedback
inputs that define the actual state of the control scheme. A control output status signal from the MSDD block can interface to
sequencing logic to trigger the next step in a process. The control output status represents the status of the controlled
process as defined by the feedback inputs and a feedback wait time. Control output status can be good (0.0), bad (1.0), or
waiting (2.0).
NOTE: Because commands are buffered during module startup, some time may elapse between an operator action and the exe-
cution of that action during startup. The elapsed time is determined by the startup period specified by S4 of function code 90, and
it is dependent on the startup in progress flag being set to 1 in function code 81.
The MSDD block is exception reported. Exception reports contain states: output, feedback, alarm; and statuses: control
output and mode. An exception report generates when the block output mask changes, the block generates an alarm, a
feedback input changes state, or Tmax for exception reporting expires.
Outputs
M S DVD R
S1
I1 1
(1 2 9 )
S2 N
I2 2
S3 N+1
F1 3
N+2
N B Control output 1
S4 F2 ST
S5 N+3
S6
F3
N+1 B Control output 2
F4
S25 0
N+2 B Control output 3
N+3 R Control output status:

0.0 = good
1.0 = bad
2.0 = waiting
Specifications
S1 N 0 I Note 1 Block address of control input 1
S2 N 0 I Note 1 Block address of control input 2
S7 N 0 I 000 - 111 Default mask
S8 N 0 I 000 - 111 Output mask 1
S9 N 0 I 000 - 111 Output mask 2
S10 N 0 I 000 - 111 Output mask 3
S11 Y 0 I 0000 - 2222 Feedback corresponding to output mask 1. Each digit

can be:
0 = input should be 0
2 = input could be 0 or 1
2VAA000844R0001 J 129-1

can be:

can be:
S14 Y 0 I 0-142 Control output status override:

Status override:
XX0 = none
XX1 = output status
XX2 = output status and alarm
Control override:
X0X = go to manual mode and default control
outputs
X1X = hold current mode and control outputs
X2X = go to manual mode and hold current control
outputs
X3X = go to auto mode and set outputs as selected
by current control inputs
X4X = go to manual mode and set outputs as
selected by operator interface device
Operation:
0XX = normal operation
1XX = early good status enable
S15 Y 1 B 0 or 1 Manual mode permissive:

0 = no
1 = yes
S16 Y 0.000 R 0 - 9.2 E18 Feedback waiting time (seconds)
S17 Y 0.000 R 0 - 9.2 E18 Fault waiting time
S18 N 0 I 0 - 255 MSDD display type
S19 Y 1 I 2, 3, 23 Next allowable mask numbers from output mask 1 in

manual mode

manual mode

manual mode
S22 Y 0.000 R 0 - 9.2 E18 Length of pulsed outputs (if 0, sustained outputs)
S23 N 1 B Full Initial mode:

0 = manual
1 = auto
S24 Y 0 R Full Startup track flag:

0 = no track during startup
1 = control outputs track control inputs during
startup
129-2 2VAA000844R0001 J
129. Multistate Device Driver Explanation
S25 N 0 I Note 1 Block address of control override

NOTE:
129.1 Explanation
The MSDD block controls output logic or other control schemes that can be operated in more than one state, for example,
variable speed mixers and motors. The output state depends on two control input signals or an operator input. The values of
these signals determine which of four output masks will be sent to the controlled process. Each output mask provides three
user-defined boolean signals that drive the process.
The user defines the output masks based on which state the process should be in for given combinations of inputs. The
user also defines feedback masks corresponding to the output masks. The block compares the feedback inputs from the
process with the feedback mask containing normal feedback values for a given output mask. If the feedback inputs do not
match the feedback mask within the feedback waiting time, an alarm generates and is exception reported. Table 129-1
defines the output and feedback masks selected with various combinations of control inputs. Figure 129-1 illustrates how
the block interprets the feedback masks.
Table 129-1 Truth Table for Selection of Output Masks in Auto Mode
Control Input
Corresponding Next Allowable State Mask
Mask Selected
Feedback Mask (Manual Mode Only)
1 <S1> 2 <S2>
0 0 Default mask (S7) None None
0 1 Output mask 1 (S8) Feedback mask 1 (S11) Next state mask 1 (S19)
C ON T RO L
IN P U T S
M S DVD R
S1 (12 9 )
I1 1
S2 N
I2 2
S3 N +1
0 F1 3
S4 N +2
1 F2 ST
S5 N +3
0 F3
S6 F4
0
S25 0
T 01 77 4 A
Figure 129-1 Relationship Between Feedback Inputs and Feedback Masks
If the control inputs are: <S1> = 0, <S2> = 1, then output mask one (S8), feedback mask one (S11),
and next state mask one (S19) are implemented.
2VAA000844R0001 J 129-3
Specifications 129. Multistate Device Driver
If feedback mask one (S11) = 0100, then the values of S3, S4, S5 and S6 must correspond to S11 as
shown in Figure 129-1 to produce a good control output status (N+3).
NOTE: All feedback masks (S11-S13) are a four-digit number (X1,X2, X3, X4) in which each digit is either a zero, one or two, and
corresponds to a single feedback input (see Specification 11 explanation for more information). Table 129-2 illustrates this
relationship.
Table 129-2 Four-Digit Feedback Mask
4-Digit Value of S11, S12, or S12 X1 X2 X3 X4

Compared with
Input number 1 2 3 4
Specification number of input <S3> <S4> <S5> <S6>
This block supports both automatic and manual modes. The user selects the initial mode with S23. In automatic mode, two
boolean inputs from the control system select the mask that drives the outputs as shown in Table 129-1. The default mask
may not be manually initiated. To operate the device in manual mode, the manual mode permissive (S15) must be one
(yes).
Auto/manual status may be monitored internally by using the test alarm function (function code 69). Figure 129-2 shows this
simplified configuration. A control output status value is generated based on the feedback inputs, feedback waiting time,
and feedback masks. If the value of any feedback input does not match the value of the feedback mask for a given output
mask, an exception report generates and goes to the console, and the control output status value will be set to bad (1.0)
unless overridden. The control output status can have one of three values (0.0 = good, 1.0 = bad, or 2.0 = waiting).
A L AR M IN DICAT IO N
0 = N O AL A RM
M S DV D R TS TALM
(1 2 9 ) (6 9) 1 = A LAR M
S1 I1 1 H
S2 1000 1007
I2 2 L
S3 1001 1008 M O D E IN DICAT IO N
F1 3
S4 1002 S 1 = 1 0 00 (M S D D BL O CK ) 0 = M A N UA L
F2 ST 1 = A UTO
1003 S2 = 2 (M S D D T YP E )
S5 F3
S6 F4
S 25 O
T 01 77 6 A
Figure 129-2 Auto/Manual Status Monitored with Test Alarm Block
The user can set a fault wait timer to allow a delay between the time the exception report indicates an alarm, and when the
control output status reflects that alarm. The exception reported alarm occurs first. This provides a fixed interval of time
during which the control output status can be overridden. The control output status override forces the control output to the
good state. Specification S14 implements the control output status override (no override, override output status only, or
override output status and alarm). Selecting override status and alarm disables exception report alarms.
A pulse output timer allows the selection of pulsed or maintained control outputs. When S22 is a non zero value, the outputs
are pulsed to the selected output mask state for the time period selected, then set back to the default mask state. When S22
is zero, the outputs are sustained.
S1 – CI1
Block address of control input one.
S2 – CI2
Block address of control input two.
NOTE: A block address of zero (default) in both S1 and S2 enables using this block with batch language only.
S3 – FB1
Block address of feedback input one. The feedback inputs are signals from the field that define the actual state of the
device. The values of the feedback inputs are compared to the feedback status masks to determine the control output
status. If the feedback inputs do not match the feedback status masks for given control outputs, an exception report with
alarm generates.
129-4 2VAA000844R0001 J
129. Multistate Device Driver Specifications
S4 – FB2
Block address of feedback input two. Refer to S3 – FB1 for an explanation.
S5 – FB3
Block address of feedback input three. Refer to S3 – FB1 for an explanation.
S6 – FB4
Block address of feedback input four. Refer to S3 – FB1 for an explanation.
S7 – DMASK
Default output mask. The default output mask is a value consisting of three boolean digits that control the output logic. This
is configurable, and can be any combination of zeros and ones. This output mask will be sent to the output logic when the
control inputs are both zero. The output mask configuration is shown as follows:
X X X
Ones digit state of output N+2
Tens digit state of output N+1
Hundreds digit state of output N
S8 – MASK1
Output mask one. This value consists of three boolean digits that control the output logic. It can be configured as any
combination of zeros and ones. This output mask is sent to the output logic when control inputs one and two are zero and
one in that order (in auto mode) or the operator depresses the state one pushbutton (in manual mode). Refer to S7 –
DMASK for output mask configuration.
S9 – MASK2
Output mask two. This value consists of three boolean digits that control the output logic. It can be configured as any
combination of zeros and ones. This output mask is sent to the output logic when control inputs one and two are one and
zero, respectively (in auto mode) or the operator depresses the state two pushbutton (in manual mode). Refer to S7 –
DMASK for output mask configuration.
S10 – MASK3
Output mask three. This value consists of three boolean digits that control the output logic. It can be configured as any
combination of zeros and ones. This output mask is sent to the output logic when control inputs one and two are both one
(in auto mode) or the operator depresses the state three pushbutton (in manual mode). Refer to S7 – DMASK for output
mask configuration.
S11 – FDMSK1
Feedback corresponding to output mask one. This value consists of four digits that identify the normal state of the feedback
inputs when output mask one is the control. See Table 129-2 for four-digit feedback masks.
X X X X
Feedback input 4 (S6)
Feedbackinput 1 (S3)
S12 – FDMSK2
Feedback corresponding to output mask two. This value consists of four boolean values which identify the normal state of
the feedback inputs when output mask two is the control. See Table 129-2 for four-digit feedback masks. Refer to S11 –
FDMSK1 for output mask configuration.
S13 – FDMSK3
Feedback corresponding to output mask three. This value consists of four boolean values which identify the normal state of
the feedback inputs when output mask three is the control. See Table 129-2 for four-digit feedback masks. Refer to S11 –
FDMSK1 for output mask configuration.
S14 – COSOV
Control output status override. This value defines the override type currently implemented. The control output status
override forces the control output to good, regardless of the feedback inputs and masks when the ones digit is set to a one
2VAA000844R0001 J 129-5
Specifications 129. Multistate Device Driver
or two. The alarm status is also overridden when the ones digit is set to a two. The tens digit overrides control output status
and dictates block control only when <S25> is a logic 1.
X X X
Status override
0 = no override.
1 = override output status only. Alarms are still exception reported
to console.
2 = override output status and alarm (disable exception report alarms).
Control override
0 = go to manual mode (if manual mode permissive) and default
control outputs.
1 = hold current mode and control outputs. If outputs are pulsed, go
to default control outputs.
2 = go to manual mode (if permitted) and hold current control outputs.
If outputs are pulsed, go to default control outputs.
3 = go to auto mode and set control outputs as selected by the
current control inputs (S1 and S2).
4 = go to manual mode (if permitted) with current control outputs.
Only applicable when S25 = 1. Control status will be forced to good
while S25 = 1. If outputs are pulsed, go to default control outputs.
Operator requests to change state are allowed subject to next
allowable state (S19, S20, S21) constraints. Requests to change
mode to auto are refused.
Operation - early recognition of feedbacks
0 = normal operation - wait for duration of S16.
1 = early good status enable. When the hundreds digit is set to one,
the control output status is set to good as soon as the feedbacks
indicate this condition.
NOTE: Early recognition of feedback cancels the waiting time (S16)
once feedback conditions have been met. This can result in bad status
and alarm prior to feedback waiting time time-out.
NOTE: Early recognition of feedback cancels the feedback waiting time (S16) once feedback conditions have been met. This can
result in bad status and alarm prior to feedback waiting time time-out.
S15 – MPERM
Sets the manual mode permissive. This tunable value defines if manual mode is permitted. This specification has no
influence on other specifications within this function code, and the output masks are never tunable while the feedback
masks are always tunable.
• 0 = manual not permitted (auto mode only)
• 1 = manual mode permitted (auto or manual mode)
NOTE: If S15 changes from one to zero, then the block is forced to auto mode when S25 is a zero.
S16 – FDWAIT
Feedback waiting time. This value defines the time in seconds that the MSDD block waits before comparing the feedback
inputs with the feedback masks. For example, if the block controls a variable speed motor, the feedback waiting time is the
time it takes the motor to ramp from stopped to its top speed. This ensures that measurements taken while the device is
starting up or changing speeds are not used for control or indication. If at the end of the feedback time the feedbacks are
not correct, then an alarm generates if not overridden by S14.
NOTES:
1. Without early good recognition implemented (S14 = 0xx), the check for feedback follows the formula S22  S16  check for
feedback.
2. With early good recognition implemented (S14 = 1xx) updated control output status is updated after S22  S16 expires or
good feedback is met. Early good feedback cancels the feedback waiting time after the feedbacks match the state mask.
Example 1
Check for feedback at 5 seconds (S16 = 5). Maintained outputs (S22 = 0).
S22 + S16 = check feedback
0 + 5 = 5 seconds
129-6 2VAA000844R0001 J
129. Multistate Device Driver Outputs
Example 2
Check for feedback at 2 seconds (S16 = 2). Pulse output of 3 seconds (S22 = 3).
S22 + S16 = check feedback
3 + 2 = 5 seconds
S17 – FLTWAIT
Fault waiting time. This value defines the delay in seconds between an exception reported alarm and when the control
output status indicates the fault condition to the rest of the control system. This allows a fixed interval of time during which
the control output status override may be activated.
S18 – DDIS
MSDD display type. The console provides the capacity to create dynamic graphic and faceplate displays. This specification
defines the console display type that represents the particular device. Custom displays can be created with the graphic
display builder. Refer to S+ Operations Harmony User Guide (2VAA001550*) for information on building displays.
S19 – NXT1
Next allowable mask number for output mask one in manual mode. When the block is in manual mode, the operator selects
the output mask by pressing the appropriate state pushbutton from the operator console. Table 129-1 identifies the masks
selected for different combinations of inputs. This specification identifies which masks can be implemented after mask one.
It is used to keep the operator from accidentally upsetting the process. For example, if S19 equals 23 or 32, then the
operator can go to state two or state three directly.
Example:
S19 = 23 Either state two or three can be selected next.

S20 = 1 Only state one can be selected next.
S21 = 1 Only state one can be selected next.
S20 – NXT2
Next allowable mask number for output mask two in manual mode. Refer to S19 – NXT1 for an explanation of NXT. If S20
equals 13 or 31, then the operator can go to state one or state three directly.
S21 – NXT3
Next allowable mask number for output mask three in manual mode. Refer to S19 – NXT1 for an explanation of NXT. If S21
equals 12 or 21, then the operator can go to state one or state two directly.
S22 – PULSE
Length of the pulsed outputs in seconds. Output masks can be pulsed or sustained. If S22 is not equal to zero, the outputs
are pulsed to the selected output state (determined by control inputs one and two or a console) for the length of time
selected with S22, then set back to the default state (S7). If S22 equals zero, then the outputs are sustained.
S23 – INIT
Initial mode. This value defines the operating mode at startup.
0 = manual
1 = automatic
S24
Startup track flag. When this value is set to 0.0, the initial values for the control outputs are determined by S23 during
startup. When this value is set to 1.0, the initial values for the control outputs will track the control input values regardless of
the S23 setting. This specification is used when the state of function code 129 block must be synchronized with the state of
an external process at the startup of the controller.
S25 – COVRD
Control override. When this input is one, the control status is forced good (0.0). The mode and output state control are
selected with the tens digit in the control override definition specified by the control status override (S14).
129.1.2 Outputs
N
Control output one. The three control outputs are grouped together to form output masks. Each control output is user
configurable (zero or one). The control outputs are defined during configuration based on the function the control device is
to perform for different combinations of control inputs. During execution, the values of the control inputs or an operator
2VAA000844R0001 J 129-7
Applications 129. Multistate Device Driver
action determines the control output mask selected. This value is the current value of control output one being used for
control.
N+1
Control output two. This value is the current value of control output two being used for control. Refer to output N
explanation.
N+2
Control output three. This value is the current value of control output three being used for control. Refer to output N
explanation.
N+3
Control output status. This value is output from the MSDD block to a sequence monitor block or other control logic to inform
the control system of the current state of the driven device.
0.0 = good
1.0 = bad
2.0 = waiting
Good - feedback waiting time has elapsed or the inputs from the field agree with the feedback mask which corresponds to
the current output mask.
Bad - feedback waiting time has elapsed and one or more inputs from the field do not agree with the feedback mask
corresponding to the current output mask.
Waiting - feedback waiting time has not elapsed, and no comparisons between field inputs and feedback masks have been
made yet.
NOTE: A logic 1 at S25 forces this output to 0.0 (good). This overrides a bad status (1.0). During output state transition, N+3
momentarily pulses from 0.0 to 2.0 then back to 0.0.
129.2 Applications
Figure 129-3 shows a sample faceplate. Figure 129-4 shows how to use function code 129 to control a variable speed
motor. The allowable state transitions are off to low, low to high, low to off, high to low, and high to off.
H IG H HI SPD
L OW LO S P D
OFF S TO P P D
T 01 77 8 A
Figure 129-3 Sample Faceplate
129-8 2VAA000844R0001 J
129. Multistate Device Driver Applications
Figure 129-4 Controlling a Variable Speed Motor
2VAA000844R0001 J 129-9
Applications 129. Multistate Device Driver
129-10 2VAA000844R0001 J
132. Analog Input/Slave
132. Analog Input/Slave

The analog input/slave function code reads five analog inputs from an IMFEC12 Analog Input Slave or an IMFEC11 Field
Bus Slave. Three analog input/slave function codes are required to utilize all 15 input channels on the module. When these
function blocks are linked, only the status output of the primary block will be functional.
Function code 132 is also used with ABB FSK smart protocol and FSK bus applications. In the case of bus mode and
multivariable bus mode applications, three instances of function code 132 are needed whenever there are 15 variables.
This function block has six outputs. The first five are the inputs from the analog input module. The sixth output is the status
of the analog input module.
The control system must be carefully evaluated to establish default

values that will prevent personal injury and/or property damage in
case of module failure.
WARNING
Outputs

AIS/
FBS N R First analog input in engineering units
S2 (132)
ST
1
N +5 N+1 R Second analog input in engineering units
N
2
3
N +1
N+2 R Third analog input in engineering units
N +2
4
N +3
5
N +4
N+3 R Fourth analog input in engineering units
N+4 R Fifth analog input in engineering units
N+5 B Input module status:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Input module address
S2 N 2 I Note 1 Block address of next analog input module
S3 N 0 I 0 or 1 Continue on input module error:

0 = trip master module
S4 N 0 I 0-5 Input signal type of first input:

0 = 4 - 20 mA; also for digital mode
1 = 1 - 5 VDC
2 = -10 - +10 VDC
3 = 0 - +1 VDC
4 = 0 - +5 VDC
5 = 0 - +10 VDC
S5 Y 0.000 R Full Engineering unit zero for first input
S6 Y 0.000 R Full Engineering unit span for first input
S7 N 0 I 0-5 Input signal type of second input:

1 = 1 - 5 VDC
2 = -10 - +10 VDC
3 = 0 - +1 VDC
4 = 0 - +5 VDC
5 = 0 - +10 VDC
8 Y 0.000 R Full Engineering unit zero for second input
S9 Y 0.000 R Full Engineering unit span for second input
2VAA000844R0001 J 132-1
Explanation 132. Analog Input/Slave
S10 N 0 I 0-5 Input signal type of third input:

1 = 1 - 5 VDC
2 = -10 - +10 VDC
3 = 0 - +1 VDC
4 = 0 - +5 VDC
5 = 0 - +10 VDC
S11 Y 0.000 R Full Engineering unit zero for third input
S12 Y 0.000 R Full Engineering unit span for third input
S13 N 0 I 0-5 Input signal type of fourth input:

1 = 1 - 5 VDC
2 = -10 - +10 VDC
3 = 0 - +1 VDC
4 = 0 - +5 VDC
5 = 0 - +10 VDC
S14 Y 0.000 R Full Engineering unit zero for fourth input
S15 Y 0.000 R Full Engineering unit span for fourth input
S16 N 0 I 0-5 Input signal type of fifth input:

1 = 1 - 5 VDC
2 = -10 - +10 VDC
3 = 0 - +1 VDC
4 = 0 - +5 VDC
5 = 0 - +10 VDC
S17 Y 0.000 R Full Engineering unit zero for fifth input
S18 Y 0.000 R Full Engineering unit span for fifth input
S19 N 0.000 R Full Spare parameter

NOTE:
132.1 Explanation
S1
Address of the analog input module.
S2
Block address of the next analog input block. The first block in the list is the master block. The rest of the blocks are under
its control. Use the default value for the last block.
S3
Can be set to allow the module to continue to operate if there is an input module problem.
0 = trip master module

132-2 2VAA000844R0001 J
132. Analog Input/Slave Specifications
S4
Defines the input signal type of the first input from the module.
0 = 4 to 20 milliamps, also used for FSK digital mode

1 = 1 to 5 VDC
2 = -10 to +10 VDC
3 = 0 to +1 VDC
4 = 0 to +5 VDC
5 = 0 to +10 VDC
S5
Defines the low limit of the first input in engineering units.
S6
Defines the range of the first input in engineering units. If this specification is set to zero, the input is considered unused.
NOTE: For any channel that is connected to an AVS smart positioner the low limit (S5) must be set to zero and the range value
(S6) must equal 100. However, if the normal operating range of any of the outputs are expected to include numbers less than -5 or
more than +105, the range value (S6) should equal 1 and the output of that channel should be treated as a normalized value. To
unormalize the value, send the output of the block into a multiply block and multiply by 100. This is to get around the bad quality
state which is automatically generated by function code 132 when the value is outside the -5 to +105 range.
S7 through S18
Define the input signal type, low limit and range for the other channels on the analog input module.
S19 and S20

Spare parameters.
2VAA000844R0001 J 132-3
Application 132. Analog Input/Slave
132.2 Application
Figure 132-1 shows analog input blocks linked together. The inputs must be numbered consecutively.
NOTE: Block numbering is critical when configuring analog inputs from transmitters. The block numbers for the three analog
input/slave function codes must be numbered consecutively and the 15 field device definition function codes associated with the
inputs must be numbered consecutive immediately following the inputs.
A IS / A IS /
FB S FBS
S2 (1 32 ) S2 (1 32 )
ST S M A RT ST S M ART
70 05 S1 (13 3) 7 01 1 S1 (1 33 )
1 1
70 00 S7 7 0 18 7 00 6 S7 70 23
2 T 2 T
70 01 7 00 7
3 3
70 02 TO PR OC E SS 7 00 8 TO P RO CE S S
4 4
70 03 CO N T RO L 7 00 9 C O NT RO L
5 CO N F IG UR AT IO N 5 C O NF IG U RATIO N
70 04 7 01 0
S M A RT S M ART
S1 (13 3) S1 (1 33 )
S7 7 0 19 S7 70 24
T T
TO PR OC E SS TO P RO CE S S
CO N T RO L C O NT RO L
S M A RT S M ART
S1 (13 3) S1 (1 33 )
S7 7 0 20 INP U TS S7 70 25 IN PU T S
T T
1 T H RO UG H 5 6 TH RO U GH 1 0
S M A RT S M ART
S1 (13 3) S1 (1 33 )
S7 7 0 21 S7 70 26
T T
S M A RT S M ART
S1 (13 3) S1 (1 33 )
S7 7 0 22 S7 70 27
T T
A IS /
FBS
S2 (13 2)
ST SM ART
7 0 17 S1 (1 33 )
1
7 0 12 S7 7 02 8
2 T
7 0 13
3
7 0 14 TO P RO C ES S
4
7 0 15 C O N TR OL
5 C O N FIG U R AT IO N
7 0 16
SM ART
S1 (1 33 )
S7 7 02 9
T
TO P RO C ES S
C O N TR OL
SM ART
S1 (1 33 )
S7 7 03 0 IN P UT S
T
1 1 T H RO UG H 1 5
TO P RO C ES S
C O N TR OL
SM ART
S1 (1 33 )
S7 7 03 1
T
TO P RO C ES S
C O N TR OL
N OTE :
IF T HE INP U T IS NOT
SM ART
S1 (1 33 )
A B AIL E Y SM A RT DE V IC E
T HE C O RR E SP O ND ING S7 7 03 2
T
F C 13 3 IS NOT R E QU IR ED.
TO P RO C ES S
C O N TR OL
T0 13 7 9A
Figure 132-1 Linking Optional Smart Transmitters
132-4 2VAA000844R0001 J
133. Smart Field Device Definition Explanation
133. Smart Field Device Definition

The smart field device definition function code implements Bailey FSK smart transmitters, smart positioners, and other
Bailey smart field devices with defined specifications. The controller verifies the configuration of the field device at startup.
Three specifications can be modified while the controller is in execute mode. In execute mode, the controller gets and
monitors the value of the process variable defined in this function code.
Outputs

SM ART
(1 3 3 )
S1
N B Transmitter status:
S7
T 0 = good
1 = bad
Specifications
S1 N 2 I Note 1 Block address of field device input
S2 N 0 I 0 - 2000 Field device definition
S3 N 0 I Full Engineering units of field device
S4 Y 0.000 R 0.0 - 32.0 Damping time (secs)
S5 N 0 I 0 - 12 Mode definitions
S6 Y 0 I 0-6 Operation select:

0 = normal
1 = zero up (uses operation trigger <S7>)
2 = zero down (uses operation trigger <S7>)
3 = span up (uses operation trigger <S7>)
4 = span down (uses operation trigger <S7>)
5 = fix output (fix position of type AVS positioner)
6 = download configuration
S7 N 0 I Note 1 Block address of operation trigger
S8 Y 0.000 R Full Percentage of fixed output/position
S9 Y 0 I 0 - 100 Communication select (all) and temperature com-

pensation definition (TBN only)
S10 N 0 I 0 - 17 Field device output definition
S12 Y 0 I 1 - 255 Field device address or channel number
S13 Y 0.000 R Full Lower range
S14 Y 0.000 R Full Upper range

NOTE:
9,998 for the BRC-100/200, and IMMFP11/12
31,998 for the HAC
133.1 Explanation
S1
Block address of the input. This input must be linked to the analog input/slave block (function code 132).
2VAA000844R0001 J 133-1
Specifications 133. Smart Field Device Definition
S2
Field device definition.
Field Device Type:
000 = unused
100 = PTS transmitter (pressure)
2XX = EQS transmitter (temperature)
3XX = AVS positioner
400 = BCN transmitter (pressure)
5XX = EQN transmitter (temperature)
6XX = TBN 580 transmitter (pH)
700 = TBN 581 transmitter (ORP/pION)
800 = TBN 480 transmitter (conductivity)
9XX = magnetic flowmeter 50XM/SM/XE
10XX = vortex flowmeter 10VT
11XX = vortex flowmeter 50VM
12XX = variable area flowmeter
13XX = mass flowmeter
where:
XX = sensor type
BCN, PTS, TBN 581, and TBN 480
00 = sensor type not applicable
XX = sensor type (continued)

Smart EQS and EQN transmitter (temperature)
01 = mV input thermocouple 18 = 3 wire RTD ()
02 = dual RTD ( 19 = 3 wire RTD (100 , 385)
03 = 2 wire RTD () 20 = 3 wire RTD (100 , 392)
04 = unused 21 = type D thermocouple nonlinear 1
05 = type B thermocouple 22 = type B thermocouple nonlinear1
06 = type E thermocouple 23 = type E thermocouple nonlinear1
07 = type J thermocouple 24 = type J thermocouple nonlinear1
08 = type K thermocouple 25 = type K thermocouple nonlinear1
09 = type R thermocouple 26 = type R thermocouple nonlinear 1
10 = type S thermocouple 27 = type S thermocouple nonlinear1
11 = type T thermocouple 28 = type T thermocouple nonlinear1
12 = type C thermocouple 29 = type C thermocouple nonlinear 1
13 = type N thermocouple 30 = type N thermocouple nonlinear 1
14 = dual RTD (100 , 385) 31 = 4 wire RTD (100 , 385)2
15 = dual RTD (100 , 392) 32 = 4 wire RTD (100 , 392)2
16 = 2 wire RTD (100 , 385) 33 = 4 wire RTD ()2
17 = 2 wire RTD (100 , 392)
1
EQN only; 2EQS only
Smart TBN 580 transmitter (pH)
40 = standard 42 = Ir02
41 = antimony 43 = reserved
Smart AVS positioner (digital multidrop mode only):
00 = position feedback (%) 09 = differential pressure
01 = setpoint (%) 10 = output pressure 1
07 = deviation (%) 11 = output pressure 2
08 = supply pressure
Flowmeters (digital multidrop mode only):
00 = Volume flow or mass flow rate
03 = Process or tube temperature (vortex/50VM or mass)
10 = Totalizer 1
11 = Totalizer 2
NOTES:
1. Every type AVS positioner connected to the bus must have the first channel be position feedback. Specification S3 through
the end are ignored on all channels other than position feedback. The engineering units of position feedback channel dictate the
units used to report all pressures. Valid units for these pressures are psi and bars.
2. A maximum of five variables may be configured for any one type AVS positioner or other future multivariable device.
3. Every flowmeter connected to the bus must have the first channel be volume flow or mass flow rate. Specification S3 through
the end are ignored on all channels other than volume flow or mass flow rate.
133-2 2VAA000844R0001 J
133. Smart Field Device Definition Specifications
S3
Engineering units of the field device. Table 133-1 lists the available engineering units for specification S3.
Table 133-1 Specification S3 Engineering Units
Engineering Engineering
Value Field Device Type Value Field Device Type
Units Units
0 Undefined Any, TBN480 39 USGal/h 50XM/SM/XE
1 C EQS or EQN (temperature) 40 User-defined 50XM/SM/XE
2 F EQS or EQN (temperature) 41 l/s 10VT (actual)
3 K EQS or EQN (temperature) 42 l/m 10VT (actual)
4 mV EQS or EQN (temperature) 43 l/h 10VT (actual)

or TBN 581 (ORP/pION)
5  EQN or EQS 44 igps 10VT (actual)
10 % None 45 igpm 10VT (actual)
11 Reserved Reserved 46 igph 10VT (actual)
12 Reserved Reserved 47 igpd 10VT (actual)
13 Reserved Reserved 48 usgps 10VT (actual)
14 Reserved Reserved 49 usgpm 10VT (actual)
15 Reserved Reserved 50 usgph 10VT (actual)
20 Inches H2O BCN, PTS (pressure) 51 usmgd 10VT (actual)
21 mm H2O BC 52 ft3/s 10VT (actual)
22 mm of mercury BCN, PTS (pressure) 53 ft3/m 10VT (actual)
23 psi BCN, PTS, AVS (pressure) 54 ft3/h 10VT (actual)
24 mPascals BCN, PTS (pressure) 55 ft3/d 10VT (actual)
25 kPascals BCN, PTS (pressure) 56 m3/s 10VT (actual)
26 Bar BCN, PTS, AVS (pressure) 57 m3/m 10VT (actual)

3
27 mBar BCN, PTS (pressure) 58 m /h 10VT (actual)
28 cm H2O BCN, PTS (pressure) 59 m3/d 10VT (actual)
29 kg per square cm BCN, PTS (pressure) 61 bbl/s 10VT (actual)
30 pH TBN 580 (pH) 62 bbl/m 10VT (actual)
31 l/s 50XM/SM/XE 63 bbl/h 10VT (actual)
32 l/m 50XM/SM/XE 64 bbl/d 10VT (actual)
33 l/h 50XM/SM/XE 65 g/s 10VT (mass)
34 m3/s 50XM/SM/XE 66 g/m 10VT (mass)
35 m3/m 50XM/SM/XE 67 g/h 10VT (mass)
36 m3/h 50XM/SM/XE 68 kg/s 10VT (mass)
37 USGal/s 50XM/SM/XE 69 kg/m 10VT (mass)
38 USGal/m 50XM/SM/XE 70 kg/h 10VT (mass)
71 t/m 10VT (mass) 75 lb/m 10VT (mass)
72 t/h 10VT (mass) 76 lb/h 10VT (mass)
2VAA000844R0001 J 133-3
Specifications 133. Smart Field Device Definition
Table 133-1 Specification S3 Engineering Units (Continued)
Engineering Engineering
Value Field Device Type Value Field Device Type
Units Units
73 t/d 10VT (mass) 77 lb/d 10VT (mass)
74 lb/s 10VT (mass)
NOTE: TBN 480 devices must be configured for engineering units of 0.
S4
Defines the damping time and is adjustable from 0.0 to 32.0 seconds (0.0 to 5.0 seconds for AVS devices). The damping
time is defined as the time required for an analog or digital response to a step input change to reach approximately 62% of
its final value.
S5
Mode definition.
X X
Fail Mode (n/a to 50XM/SM/XE)
X0 = fail low
X1 = hold current values (n/a to flowmeters)
X2 = fail high
Initialize Mode
0X = initialize low (50XM/SM/XE: two forward ranges)
(10VT: process fluid = gas)
1X = initialize high (50XM/SM/XE: one forward and one
reverse range)
(10VT: process fluid = liquid)
NOTE: Specification S5 is not applicable to the type AVS positioner. The type AVS positioner must be connected to the actuator
such that an open (0 current) input provides the desired failure and initial position (0 or 100%). Specification S5 should always be
00.
S6
Operation select.
0 = normal
1 = zero up (uses operation trigger <S7>)
2 = zero down (uses operation trigger <S7>)
3 = span up (uses operation trigger <S7>)
4 = span down (uses operation trigger <S7>)
5 = fix output (fix position of type AVS positioner)
6 = download configuration
The operation select input allows the modification of the field device calibration. To adjust calibration:
1. Select level to adjust with S6 (S6=1, 2, 3 or 4).
2. Trigger the adjustment with <S7>. Each zero to one transition of <S7> changes the selected operation by
approximately 0.025%. This allows adjustment of the 4 mA or 20 mA value when the span is at 0% or 100%.
Operation select can also fix the transmitter output or positioner internal set point at the percentage defined by S8. Setting
S6 to five fixes the output. Setting S6 to zero resumes normal operation. The field device receives the downloaded
configuration when S6 is set to six. When installing a new field device, this operation forces the field device configuration to
match the defined specifications.
For type AVS positioner, zero and span adjusts the 4-20 mA position output option.
S7
Block address of the operation trigger. Each zero to one transition changes the selected operation (S6) by approximately
0.025%.
S8
Value of the fixed output (percentage). Refer to S6.
S9
Temperature compensation definition for TBN transmitters and communication select function for all field devices.
133-4 2VAA000844R0001 J
133. Smart Field Device Definition Specifications
X X X
Temperature compensation algorithm (TBN58x only)
XX0 = manual
XX1 = nernstian
XX2 = auto solution
XX3 = pure water
Temperature compensation sensor type and units (TBN58x only)
X0X = none
X1X = Balco wire and °F
X2X = Balco wire and °C
Communication select (all field devices)
0XX = communication to transmitter enabled (online)
1XX = communication to transmitter disabled (offline)
NOTE: Although specification S9 is tunable, tuning it does not affect field device configuration, only communication select.
S10
Transmitter output or positioner input characterization and normal/reverse definition.
X X
Output (common) only valid for EQS is linear and function
generator
X0 = output is linear with respect to input
X1 = output is the square root of the input
X2 = 32 power flow mode AVS: square
X3 = 52 power flow mode AVS: equal percentage
X4 = function generator
X5 = volumetric (special tank) PTS (AVS: quick opening)
X6 = volumetric (flat end tank) (AVS: quick opening)
X7 = spare
Magflow 50XM/SM/XE settings
Flow direction Response speed Digital Filter
X0 = forward/reverse normal off
X1 = forward/reverse normal on
X2 = forward/reverse fast off
X3 = forward/reverse fast on
X4 = forward only normal off
X5 = forward only normal on
X6 = forward only fast off
X7 = forward only fast on
Vortex 10VT unit density with mass-flow
X0 =g/ml X4 = kg/m3
X1 = g/cm 3 X5 = kg/ft3
X2 = g/l X6 = kg/ugl
X3 = kg/l X7 = spare
Action
0X = normal acting (TBN 480: diag spike option disabled)
(10VT: flow mode = actual flow)
1X = reverse acting (TBN 480: diag spike option enabled)
(10VT: flow mode = actual flow)
NOTE: Action for flowmeters is flow direction relative to arrow on primary.
S11
Spare.
S12
Field device address. Valid addresses are from one to 15. In point to point mode, this is the channel number the transmitter
is connected to on function code 132. When this specification is zero, the engineering unit values stored in corresponding
function code 132 blocks are used as field device lower and upper range values. EU zero is used as field device lower
range and the difference of the EU span and EU zero is used as field device upper limit.
NOTE: When multiple values from one smart field device are brought into function code 132, specification S12 (the address) of
function code 133 should be the same for each variable.
2VAA000844R0001 J 133-5
Application 133. Smart Field Device Definition
S13
Field device lower range. If S12 is a valid address (one to 15), this specification is compared with the lower range value
stored in the field device. This specification value is downloaded to the field device when this specification is tuned. This
value is also downloaded to the corresponding field device when the download configuration option is selected (S6).
S14
Field device upper range. This is the upper range value of the configuration. If S12 is a valid field device address (one to
15), this specification is compared with the upper range value stored in the field device. This specification value is
downloaded to the field device when this specification is tuned. This value is also downloaded when the download
configuration option is selected (S6).
133.2 Application
Figure 132-1 shows the block numbering configuration for analog input/slave (function code 132) linked to smart field
device definition (function code 133) function blocks.
Figures 133-1 and 133-2 show how the smart field device definition block could be used in typical applications.
(50)
ON/OFF 101
SMART SMART
S1 (133) S1 (133)
S7 120 S7 121
T T
AIS/
FBS
S2 (132)
ST
107 SMART SMART
1 (133) S1 (133)
102 S1
2 122 S7 123
103 S7 T T
3
104
4
105
5
106
SMART
(133)
S1
124
S7
SMART SMART
S1 (133) S1 (133)
S7 125 S7 126
T T
AIS/
FBS
S2 (132)
ST
113 SMART SMART
1 (133) S1 (133)
108 S1
2 127 S7 128
109 S7 T T
3
110
4
111
5
112
SMART
(133)
S1
129
S7
T00820A
Figure 133-1 FC 132 and FC 133 Example
133-6 2VAA000844R0001 J
133. Smart Field Device Definition Type AVS Positioner Application
S1 RCM (6 2) S1 (35)
S
N
T D -DIG
S2 N
P
S3
R
S4 S 2 = 0 (P U LS E)
O
S5 S 3 = 0.2 5
I
S6
F
S7
SM ART
A S1 (133)
S7
T
AIS/
F BS
(132) TO OT H E R
S2 ST C O N TRO L
N+5 B LO C K S
1
N
2
N+1
3
N+2
4
N+3
5
N+4
T 01 7 8 2 A
Figure 133-2 Smart Field Device Definition Example
In Figure 133-2, specification S1 of the smart field device definition block defines the input value and the I/O module to
utilize for communications. When a tunable specification is changed, the new value is sent to the transmitter by this link.
The remote control memory and timer blocks are set up to produce a zero to one transition on the operation trigger input
<S7>. Each zero to one transition on <S7> changes the selected operation by 0.025 percent. This configuration allows the
fine adjustment of the transmitter 4 mA or 20 mA values.
133.3 Type AVS Positioner Application
The type AVS positioner is an output device and therefore has unique application abilities. The type AVS positioner device
status information is reported through the position feedback block only. The only time the other outputs will go bad quality is
if the device is not responding to the FBS module. The type AVS positioner is only supported in full digital field bus mode.
When configuring a type AVS positioner, refer to the note on ranges located under specification S6 of function code 132.
2VAA000844R0001 J 133-7
Flowmeter Application 133. Smart Field Device Definition
Figure 133-3 shows how the smart field device definition block should be used with a type AVS positioner in a typical
application.
SMART FC133 6118 AVS POSITION FEEDBACK

S1 = 6100
S2 = 300
S3 = 10
S12 = 1
S13 = 0
S14 = 100
S2 = 6106 6100
S4 = 0 SMART FC133 6119 AVS SET POINT
S5 = 0 6101 S1 = 6101
S6 = 100 S2 = 301
S7 = 0 S3 = 10
S8 = 0 S12 = 1
S9 = 100
S10 = 0 AIS
S11 = 0 6102
SMART FC133 6120 AVS SUPPLY PRESSURE
FC132
S12 = 1 S1 = 6102
S13 = 0 S2 = 308
S14 = 0 S3 = 23
S15 = 1 6104 S12 = 1
S16 = 0
S17 = 0 SMART FC133 6121
AVS DIFFERENTIAL
6103
S18 = 100 6104 OUTPUT PRESSURE
S1 = 6103
S2 = 309
S3 = 23
S12 = 1
SMART FC133 6122 AVS DEVIATION

S1 = 6104
S2 = 6112 S2 = 307
S4 =0 S3 = 10
S5 =0 S12 = 1
S6 = 120
S7 =0 SMART FC133 6124 PTS
6106
S8 = 40 S1 = 6106
S9 = 200 AIS S2 = 100
FC132 S3 = 20
S12 = 2
S13 = 0
S14 = 120
SMART FC133 6125

EQS
6107
S1 = 6107
S2 = 207
S3 = 1
S12 = 3
CONTINUED S13 = -40
S14 = 200
T00808A
Figure 133-3 Type AVS Positioner Application Example
133.4 Flowmeter Application
Figure 133-4 shows how to configure the analog input/slave (function code 132) linked to smart field device definition
(function code 133) for the multirange capability of the ABB flowmeters. It requires the use of a digital signal generated by
the flowmeter itself, indicating which range is active.
Assume the flowmeter is configured for one forward and one reverse range as follows:
-10 l/s 0 150 l/s
Range 2 Range 1
133-8 2VAA000844R0001 J
133. Smart Field Device Definition Flowmeter Application
The value of zero is fixed always. The flowmeter indicates which range is being used via a contact output. This must be tied
into the DCS via a digital input function block. Refer to the function block algorithm shown in Figure 133-4.
SMART FLOWMETER
FC133 DEFINITION
NORMALIZED
RANGE =
0 TO 1.0
MULTIPLY
FC16
ANALOG
AIS R1 = 150 I/s FLOWMETER
TRANSFER
FC132 OUTPUT
FC9
MULTIPLY
FC16
R2 = -10 I/s
SMART
FC133 PTS
CONTINUED
DIGITAL
INPUT FROM
FLOWMETER
T00809A
Figure 133-4 Flowmeter Application Example
2VAA000844R0001 J 133-9
Flowmeter Application 133. Smart Field Device Definition
133-10 2VAA000844R0001 J
134. Multi-Sequence Monitor

The multi-sequence monitor controls the execution of a sequence generator by selecting the order of step execution in a
process. It operates like the sequence monitor (function code 124), but has enhanced functionality. The multi-sequence
monitor block provides multi-batch recipe control, halts sequences and inserts steps. Each multi-sequence monitor block
controls the execution of eight phases. A phase is a step that may vary from recipe to recipe. This block provides a means
to change the order that predefined steps execute in different recipes. The phases always execute in numerical order from
one to eight. Four parameters (step type, normal step number, fault step number, and recipe value) define each phase.
The multi-sequence monitor block performs a logical action based on the value of a control status input from a device
monitor block, and a boolean step trigger input. Depending on the value of the control status input, the next step can be
either a fault step or one determined by internal logic. The multi-sequence monitor block can be placed in either automatic
or semi-automatic mode, and includes hold/resume, executed stop (E-STOP), insert step and insert phase inputs. Each
multi-sequence monitor block handles up to eight phases. If more than eight phases are required, multi-sequence monitor
blocks can be linked together in series fashion with S1.
Outputs
M U LT I
MO N
S2 (1 3 4 )
S3
CS JT
T J#
S4 N+1
ES JRV
S5
H /R CP#
N+2 N R Jump step number
S6 N+3
SAP ID T
S7
S AT N /A
N+4
N+1 B Jump step trigger
S8 N+5
IT
S9
RES N+2 R Jump step recipe value
S10
IS
S11
S13
IR
N+3 R Current phase number
ST1
S14
S15
ST2
N+4 B Insert step done
ST3
S16
ST4
S17
ST5
N+5 B Run/hold state:
S18
ST6 0 = run
S19
S20
ST7 1 = hold
ST8
S21
NS1
S22
NS2 Specifications
S23
NS3
S24
NS4
S25
NS5 Spec Tune Default Type Range Description
S26
NS6
S27
S28
NS7 S1 N 0 I Note 1 Block number of next multi-sequence monitor
S29
NS8
block associated with this sequence of steps
FP1
S30
FP2
(0 = no more blocks)
S31
FP3
S32
FP4 S2 N 5 I Note 1 Block address of control status input
S33
FP5
S34
S35
FP6 S3 N 0 I Note 1 Block address of step trigger
FP7
S36
S37
FP8
S4 N 0 I Note 1 Block address of E-STOP
RV 1
S38
RV 2
S39
RV 3
S5 N 0 I Note 1 Block address of hold/resume input
S40
RV 4
S41
RV 5 S6 N 1 I Note 1 Block address of auto permissive:
S42
RV 6 0 = manual
S43
S44
RV 7 1 = auto
RV 8
S7 N 0 I Note 1 Block address of auto trigger
S8 N 0 I Note 1 Block address of insert trigger
S9 N 5 I Note 1 Block address of resume phase number
S10 N 5 I Note 1 Block address of insert step number
S11 N 5 I Note 1 Block address of insert recipe value
S13 N 5 I Note 1 Block address of phase 1 step type
2VAA000844R0001 J 134-1
S21 N 5 I Note 1 Block address of phase 1 normal step
S29 N 5 I Note 1 Block address of phase 1 fault phase
S37 N 5 I Note 1 Block address of phase 1 recipe value

NOTE:
134-2 2VAA000844R0001 J
134. Multi-Sequence Monitor Explanation
134.1 Explanation
Each multi-sequence monitor block executes eight phases in numerical order. The step number executed in each phase
comes from a different function block. The step type, fault phase, and recipe value for each phase also come from other
function blocks. Since all the values are specified external to the multi-sequence monitor block, this arrangement enables
the operator to vary those values either manually or through logic (for example, recipe table blocks). Thus, the multi-
sequence monitor block can control the execution of many different sequences, allowing the operator to control several
consecutive sequences with one block. Figure 134-1 shows a common configuration using a multi-sequence monitor block
to control several sequences using recipe table blocks.
GENERAL
D E VIC E S TATU S
M U LTI
S T E P TR IG G E R M U LT I
M ON
MO N S2 (1 34 )
(1 3 4 ) S E LE C TE D JT
S2 CS N +1
CS JT R E C IPE S3
RU N /H O LD PB S3 N+1 T J#
T J# VAL U E S4 N
S4 N ES J RV
ES J RV S5 N +2
R E SU M E S5 N+2 H /R C P#
H /R CP # CURRE NT S6 N +3
P H AS E N U M BE R S6 N+3 S AP ID T
SA P ID T PHASE S7 N +4
S7 N+4 S AT N /A
S AT N /A N U M B ER S8 N +5
S8 N+5 IT
IT S9
S9 R ES
RE S S10
S10 IS
IS R E C IP R PH ASE 9 S11
R E C IP R PHA SE 1 S11 (1 1 8 ) IR
IR S 11 ST EP T YPE S13
S 11 (1 1 8 ) STE P TYP E S13 PS S T1
PS ST 1 S 13 N S14
S 13 N S14 ES S T2
ES ST 2 S 14 S15
S 14 S15 EP S S T3
EP S ST 3 S 15 S16
S 15 S16 EV S T4
EV ST 4 S17
S17 S T5
ST 5 S18
S18 S T6
ST 6 S19
S19 PH ASE 9 S T7
PHA SE 1 ST 7 R E C IP R NO RM AL S20
R E C IP R NORM AL S20 (1 1 8 ) S T8
ST 8 S 11 ST EP S21
S 11 (1 1 8 ) STE P S21 PS N S1
PS NS 1 S 13 N S22
S 13 N S22 ES N S2
ES NS 2 S 14 S23
S 14 S23 EP S N S3
EP S NS 3 S 15 S24
S 15 S24 EV N S4
EV NS 4 S25
S25 N S5
NS 5 S26
S26 N S6
NS 6 S27
S27 PH ASE 9 N S7
PHA SE 1 NS 7 R E C IP R FAU LT S28
R E C IP R FA U LT S28 N S8
NS 8 S 11 (1 1 8 ) PH ASE S29
S 11 (1 1 8 ) PHA SE S29 PS F P1
PS FP 1 S 13 N S30
S 13 N S30 ES F P2
ES FP 2 S 14 S31
S 14 S31 EP S F P3
EP S FP 3 S 15 S32
S 15 S32 EV F P4
EV FP 4 S33
S33 F P5
FP 5 S34
S34 PHAS E 9 F P6
FP 6 S35
P HAS E 1 S35 PA R A M E T E R F P7
PA R A M E TE R FP 7 R E C IP R (R E C IP E ) S36
R E C IPR (R E C IP E ) S36 (1 1 8 ) F P8
FP 8 S 11 VA L U E S37
S 11 (1 18 ) VA L U E S37 PS RV1
PS RV 1 S 13 N S38
S 13 N S38 ES RV2
ES RV 2 S 14 S39
S 14 S39 EP S RV3
EPS RV 3 S 15 S40
S 15 S40 EV RV4
EV RV 4 S41
S41 RV5
RV 5 S42
S42 RV6
RV 6 S43
S43 RV7
RV 7 S44
S44 RV8
RV 8
S5 (6 8 )
S6 R E M SE T
N
R E C IP E S E L E C T
NU MBER T 0 1 7 83 A
Figure 134-1 Multiple Sequence and Auxiliary Logic Connections
The multi-sequence monitor block uses the values of two inputs to determine the next step number in a batch process. The
first is the control status input, which defines the current state of the devices controlled by the multi-sequence monitor block.
This input can be 0.0 (good), 1.0 (bad), or 2.0 (waiting). This value determines whether the next step will be a normal step
or a fault step. When the control status input is 1.0 (bad), a fault step initiates unless control is overridden.
The second input is the step trigger. The step trigger is dependent on the current step and the results of auxiliary logic
associated with the device in question. Each step of a batch sequence often requires auxiliary logic to perform functions in
addition to controlling the device (i.e., change controller set points, totalize flows, etc.). This auxiliary logic ties into the batch
execution configuration. Execution of the auxiliary logic associated with the current step number initiates when the current
step number is read from the sequence generator block. The current step number also selects from the results of that
auxiliary logic the boolean signal output to the multi-sequence monitor block as the step trigger.
The values of the step trigger and the control status input are then tested against the step type to determine whether the
next step can be executed. The step type defines the values of the step trigger and the control status that must exist for the
sequence to proceed to the next step. The step type also defines whether semi-automatic control is permitted (operator
intervention).
2VAA000844R0001 J 134-3
Specifications 134. Multi-Sequence Monitor
To initiate the multi-sequence monitor operation, configure the resume phase (S9) as some number other than zero, and
place the sequence in hold first and run later.
The multi-sequence monitor block can operate in automatic or semi-automatic mode. In the automatic mode, the sequence
is dependent on the values of the control status input and the step trigger. In the semi-automatic mode, the sequence is
dependent on the values of the control status input, the step trigger, and the semi-automatic step trigger. The operator must
(as one of the conditions to proceed to the next step) activate the semi-automatic step trigger manually to proceed with the
sequence. The block can be placed in semi-automatic mode only if both the semi-automatic permissive and step type
specifications are configured to permit it.
Execution of a phase in a multi-sequence monitor block can be halted when the step type and hold/resume specifications
permit. When a phase halts, a step can be inserted into the phase sequence. On a zero to one transition of the insert
trigger, the insert step number and the insert recipe value are output with a jump step trigger. The insert step done
specification toggles from a zero to one when the insert trigger goes to zero and the step trigger makes a zero to one
transition. If the hold/resume specification goes to zero (resume) during an insert step, the sequence remains in hold until
the insert step is complete. When the insert step is complete, the insert step done output goes from zero to one and the
sequence resumes at the resume phase number.
The E-STOP specification drives the sequence generator block and multi-sequence monitor block to the reset step when it
is one. This is normally a remote control memory block set up as an E-STOP.
S1 – NXT
Block address of next multi-sequence monitor block in the series of blocks used to execute the sequence. If this value
equals zero there are no more blocks in the sequence. Each multi-sequence monitor block can accommodate eight phases.
If the sequence contains more than eight steps, blocks can be linked in a series with the last phase of the first block
initializing the first phase of the second block, etc. Therefore, phases one through eight in the second multi-sequence
monitor block are phases nine through 16 in the sequence.
S2 – CSI
Block address of control status input. The value in this block represents the control status of the devices used in the control
loop. The output of this block is good when all inputs are good, bad when any one input is bad, and waiting if any one input
is waiting for a reply from a device driver or device monitor block. This value and the value of the step trigger select the next
step in the sequence. When the control status input is bad, the fault step is automatically output. If the control status input is
good or waiting, output depends on the step type for the current phase.
0.0 = good
1.0 = bad
2.0 = waiting
S3 – STEP
Block address of the step trigger. The value in this block, with the control status input, selects the next step in the control
sequence. The step trigger generates by auxiliary logic used for the batch process. The step trigger input can either be one
or zero. The state acted on depends on the step type for the current step.
S4 – E-STOP
Block address of E-STOP input. The E-STOP specification drives the block to step zero (the reset step) whenever it has a
value of one. The block referenced by this specification is normally a remote control memory block set up as an E-STOP.
S5 – HOLD
Block address of hold/resume input. The multi-sequence monitor block can hold the sequence at certain steps. The
hold/resume function is active only when the step type is configured to permit it (tens digit of S13 through S20 is zero). This
specification enables the holding of the sequence or insertion of a step into the sequence. If the sequence holds at a step
and the insert trigger makes a zero to one transition, then a step will be inserted into the sequence. Otherwise, the
sequence holds until the hold/resume input makes a one to zero transition. The block then resumes operation at the phase
specified with S9, the resume phase number.
0 = no hold
1 = hold the sequence at the current step
1 to 0 transition = resume operation at the phase specified by <S9>
S6 – PERM
Block address of the semi-automatic permissive. When the value in this block is zero, the semi-automatic mode is permitted
unless <S9> overrules it.
134-4 2VAA000844R0001 J
134. Multi-Sequence Monitor Specifications
0 = both automatic and manual modes permitted

1 = only automatic mode permitted
S7 – SEMI
Block address of the semi-automatic trigger. When the semi-auto mode is permitted by step type and the semi-auto
permissive <S6> is zero, the operator must change this value from zero to one to initiate the next step of the sequence.
S8 – INTRG
Block address of insert trigger. The value in this block initiates the insertion of a step into a sequence. If the hold/resume
input <S5> is at hold and this input makes a zero to one transition, the insert step number <S10> and insert recipe value
<S11> will be output from the block. This function is applicable only when the hold/resume input is permitted.
S9 – RES
Block address of resume phase number. When the hold/resume input makes a one to zero transition, the block resumes
operation at the phase specified here.
S10 – INSTP
Block address of insert step number. The step identified here will be inserted in the sequence on a zero to one transition of
the insert trigger <S8>, when the hold/resume input <S5> is at hold.
S11 – INRCP
Block address of insert recipe value. The recipe value identified here is inserted in the sequence on a zero to one transition
of the insert trigger <S8>, when the hold/resume input <S5> is at hold.
S12
Spare.
S13 – TYPE1
(Block address of the step type for Step 1) Each step type is made up of two digits. The ones digit defines the state of the
control status input and step trigger necessary for the block to initiate the next step of the sequence. The tens digit identifies
the control options available for the step.
X X
Input states required to advance to next step
X0 = advance when control input = 0.0 and step trigger is (1)
X1 = advance when control input = 0.0
X2 = advance when step trigger makes zero to one transition
Options permitted for this step
0X = permit hold/resume <S4> and semi-auto <S6>
1X = permit semi-auto <S5>
2X = permit no option (auto control only)
S14 to S20 –
TYPE2 to TYPE8
Block addresses of the step types for steps two through eight. Refer to S13 – TYPE1 for definitions.
S21 to S28 –
STEP1 to STEP8
Block addresses of the phase n normal steps. These specifications identify the block containing the number of the step the
system should execute when it is in phase n (n equals one to eight) when the block is operating normally.
S29 to S36 –
FAULT1 to FAULT8
Block addresses of the phase n fault phases. These specifications identify the block containing the number of the phase the
system should execute after phase n (n equals one to eight) when the block receives a bad input from the device monitor
block.
S37 to S44 –
REC1 to REC8
Block addresses of the phase n recipe values. These specifications identify the block containing the recipe value used to
implement phase n (n equals one to eight).
2VAA000844R0001 J 134-5
Outputs 134. Multi-Sequence Monitor
134.1.2 Outputs
N
(Jump step number) Identifies the step that executes after the current step completes.
N+1
(Jump step trigger) A zero to one transition of this output initiates a jump step in the sequence generator block. The
sequence generator block then executes the step identified by the jump step number. A zero to one transition of this value
occurs when the multi-sequence monitor block proceeds to the next phase in the sequence (when the conditions defined by
the step type are met).
N+2
(Jump step recipe value) Recipe value defined for the phase that is to follow the current phase. If the block is held and a
step is inserted, this value reflects the insert recipe value <S11>.
N+3
(Current phase number) Phase number of the phase being executed. There are eight phases numbered one to eight.
Although the step number in each phase can vary from sequence to sequence, the phases always execute in ascending
numerical order.
N+4
(Insert step done) Zero when an inserted step is being executed. It will make a zero to one transition when the inserted
step is finished. This triggers the block to resume execution with the phase selected in <S9>.
0 = a step has been inserted in the sequence and is currently running

1 = the sequence is proceeding normally with no inserted steps at this point
0 to 1 transition = the inserted step has been executed and the block is resuming normal operation
NOTE: An inserted step sequence is complete (done) when the insert step trigger goes to zero and the step trigger makes a zero
to one transition.
N+5
(Run/hold state) Shows when the multi-sequence monitor block is in the hold mode.
1 = hold
0 = run
134.2 Applications
Figure 134-1 shows a multi-sequence monitor block used to control a number of sequences through real recipe table blocks
and a remote manual set constant block. The operator uses the remote manual set constant block to select the values that
will be output from the real recipe table blocks. For example, if the operator selects zero, then the first parameter value
defined in each real recipe table block will be output from the blocks. The real recipe table blocks are the normal steps for
phases one through eight in the multi-sequence monitor block (S21 through S28). By ganging recipe table and multi-
sequence monitor blocks, any number of sequences with any number of steps can be executed. The operator controls
which sequence is executed with the remote manual set constant block. To select different sequences, enter different
numbers.
134-6 2VAA000844R0001 J
135. Sequence Manager
135. Sequence Manager

The sequence manager function code controls the access to a subsequence from several main sequences. It identifies the
step in a sequence monitor block or the phase in a multi-sequence monitor block that the other sequences access. Each
sequence manager block can accommodate eight requests. For more than eight inserted steps in a sequence, link several
sequence monitor blocks with S1. The block defines the manager type as first in first out (FIFO), or priority (lowest active
request processed first) basis and executes requests accordingly. Requests become active on a zero to one transition of
the request trigger.
NOTE: If multiple FC135s are linked together to be loaded into a IMMFP01/IMMFP02 controller, they must be linked in ascending
block order to prevent a configuration error.
Outputs
SE Q M G R
H /R H /RT
S5 N
R1T
S6 R2T
SPN
N+1 N B Hold/reset trigger:
ARN
S7 R3T
N+2 0 = reset
S8 R4T 1 = hold
S9 R5T
S10
S11
R6T N+1 R Starting phase number
R7T
S12
S13
R8T
N+2 R Active request number
C1T
S14 C2T
S15 C3T Specifications
S16 C4T
S17 C5T
S18
S19
C6T
C7T
S20 C8T
S1 N 0 I Note 1 Block number of next sequence manager block
S2 N 0 I 0 or 1 Manager type:
0 = FIFO
1 = lowest active request number first
S3 N 0 I Note 1 Block address of hold/reset input:

0 = reset
1 = hold
S4 N 0 I Note 1 Hold output status for no active request:

0 = do not hold
1 = put sequence monitor into hold/reset (step 0)
S5 N 0 I Note 1 Block address of request no. 1 trigger
S13 N 0 I Note 1 Block address of no. 1 complete trigger
2VAA000844R0001 J 135-1
Explanation 135. Sequence Manager
S21 Y 0.000 R Full Request no. 1 starting phase number
S29 N 0 I Full Spare

NOTE:
135.1 Explanation
In batch processes, it is necessary to control both the primary reactors and peripheral equipment. A sequence that controls
a reactor is a main sequence. One that controls peripheral equipment such as a header common to several reactors or a
cooling system common to several units is a subsequence. Several main sequences use subsequences at different times in
their operation. The sequence manager block manages requests to a single subsequence from several main sequences in
an orderly and predictable manner.
Each sequence manager block can accommodate eight requests for a single subsequence. If more than eight main
sequences need access to a subsequence, the sequence manager blocks can be ganged to provide as many as
necessary.
The sequence manager block executes requests based on the manager type, and the values of the request and completion
triggers for each of the eight requests.
Requests can be managed in two ways: first in, first out (FIFO) and on a priority basis (lowest active request processed
first).
A request becomes active when its request trigger makes a zero to one transition. The sequence manager block chooses a
request from all of the active ones based on the manager type. For example, if the manager is set to priority, and requests
three and seven are active, request three will be processed first even if request seven was generated first.
The sequence manager will not process the next active request until the completion trigger for the current request makes a
zero to one transition, signaling the step has been completed.
Figure 135-1 shows a configuration with the connection between the sequence monitor block for the main sequence, the
sequence manager block, and the sequence monitor block for the subsequence. Either or both of the sequence monitor
blocks can be a multi-sequence monitor block.
135-2 2VAA000844R0001 J
135. Sequence Manager Specifications
Each of the eight requests has a starting phase number. This number defines the phase (or step) in the subsequence that
executes when the request activates. Each request can ask for a different step from the subsequence, or all requests can
ask for the same one.
GE NE RA L
D E V IC E S TATU S STEP JUM P
SE Q M O N TR IG G E R
S2 (124)
S T E P TR IG G E R CS JT
S3 N +1
T J#
S4 N S TA RT IN G
SH P H AS E N U M B E R
SE Q M G R S5
S AT
S3 (135) S6
REQ UEST 1 H /R H /RT ES
S5 N S7
R 1T SPN SN
S6 N+1 S8
REQ UEST 2 R 2T AR N SAP
S7 N+2
R 3T
S8 S E Q U E N C E M O N IT O R
REQ UEST 3 R 4T
BLOC K FOR
S9 R 5T S UBSE QUE NCE
S 10 R 6T
...R E Q U E ST S S 11 R 7T
FR O M M A IN S 12
S E Q U E N C E ... R 8T
S 13 C 1T
S 14 C 2T
S 15 C 3T
S 16 C 4T
REQ UEST 1 S 17
C O M P LE T E D C 5T
S 18 C 6T
S 19 C 7T
REQ UEST 2 S 20
C O M P LE T E D C 8T
REQ UEST 3
C O M P LE T E D
...C O M P LET E
F LAG S F RO M
S U BS E Q U E N C E ...
T 01 7 84 A
Figure 135-1 Sample Configuration Using Sequence Manager Block
S1 – NXT
(Block address of next sequence manager block) If more than eight main sequences need to acquire the same
subsequence, the sequence manager blocks can be configured to enable any number of main sequences to access a
subsequence. If this value equals zero, there are no more blocks in the sequence. Only the outputs from the first sequence
manager block in the series will be connected to the sequence monitor or multi-sequence monitor controlling the
subsequence.
S2 – TYPE
(Manager type) The sequence manager block executes the requests in one of two ways: first in first out, and priority. In the
priority mode, the block always executes the lowest numbered request first, even if higher numbered requests were
generated before it.
0 = first in first out (FIFO)

1 = priority (lowest number first)
S3 – HOLD
(Block address of hold/reset input) The hold/reset input can halt operation of the sequence manager block temporarily. If
the hold/reset input goes to a one while a step is being executed, the block will finish executing the step, but it will not fill the
next active request. It will not allow any more requests to be processed until the input goes to a zero. On a one to zero
transition of the input, the sequence manager resets. This clears the FIFO stack and allows the sequence manager to begin
again as if a power up had occurred.
0 = reset
1 = hold
S4
Hold output status for no active request.
0 = do not put sequence monitor into hold when there is no active request.
2VAA000844R0001 J 135-3
Outputs 135. Sequence Manager
1 = put sequence monitor into hold when there is no active request. Hold means that the sequence
manager outputs a zero value and trigger.
S5 to S12 –
RTRIG1 to RTRIG8
(Block address of request triggers one through eight) When a request trigger makes a zero to one transition, the
request activates. Only active requests execute. The order of execution depends on the manager type (S2). If the request
goes from zero to one without the request complete trigger being one, then the request is still waiting to be processed. If the
request stays in the one state even after the completion trigger goes to one, a new request will be generated. The
completed request will be skipped.
S13 to S20 –
CTRIG1 to CTRIG8
(Block address of completion triggers one through eight) The completion trigger makes a zero to one transition upon a
completed requested step. When the completion trigger goes to one, the block is free to answer the next request.
S21 to S28 –
START1 to START8
(Starting phase number for requests one through eight) Identify the requested phase or step in the subsequence. All
the requests can choose the same step or select different steps.
135.1.2 Outputs
N
(Hold/reset trigger) Drives the hold/reset trigger of the sequence (or multi-sequence) monitor associated with the
sequence manager.
0 = reset
1 = hold
N+1
(Starting phase number) Value of the subsequence phase (or step) that is being executed.
N+2
(Active request number) Number of the request that is being executed.
135.2 Applications
The two types of control the sequence manager uses are parallel processing and common element control.
Parallel processing describes a situation in which several events must occur simultaneously. A common example is adding
several components to a reactor simultaneously. The advantage of parallel addition over sequential addition is that parallel
addition will maximize the throughput of the unit. A disadvantage of parallel addition is that it requires separate pipe runs,
valves and flow meters for each component. This increases equipment costs.
Common element control is used when several different main sequences use the same equipment. Examples of this are
common headers, pumps, cooling systems, etc. A problem inherent in common element control is prioritizing requests. In
some cases, there is no priority, so requests are processed on a FIFO basis. In other cases, certain main sequences
require access to the common elements more urgently than other main sequences. In this case, requests for common
elements are handled on a priority basis, with the lowest numbered active request executed first. The sequence manager
block provides a choice between these two types of control.
Figure 135-2 shows a control situation utilizing several common headers for a series of reactors. Reactor K1 must be
simultaneously filled with components A and B in parallel through common headers. Components A and B do not share the
same piping but the headers service more than one reactor. This example will illustrate both parallel addition and the use of
135-4 2VAA000844R0001 J
135. Sequence Manager Applications
common headers. Logically, the process is subdivided into several sequences. Two main sequences control reactors K1
and K2. There is a subsequence for each common header. A sequence manager block controls each subsequence.
F T-C
F T-B
F T-A
R E AC TO R K 1 R E AC TO R K 2
P RO D U C T H E AD E R
T 01 78 5 A
Figure 135-2 Parallel Addition through Common Headers
In this example, Step 4 of the main sequence for reactor K1 attempts to add components A and B in parallel, but with this
logic it is not guaranteed because one of the headers could be in operation with reactor K2. Figure 135-3 shows the logic in
the main sequence to perform this operation. This logic generates requests to add various components to K1, but it does
not ensure that the headers are both available.
TO SE Q U E N C E M AN AG ER
C O NTRO LLING AC CE SS
TO H EA D ER A
S TE P 4 TO SE Q U E N C E M AN AG ER
R EQ U E ST: AD D A TO K1
IN D IC ATO R C O NTRO LLING AC CE SS
TO H EA D ER B
S1 (35)
TD -D IG N
R ESET
S5 R E C IPR
(68) S 11 (118)
S6 R E M SE T PS A M O U N T A TO A D D
N S 13 N
ES
S 14
EP S
S 15
EV
R E C IPR
S 11 (118)
PS A M O U N T B TO A D D
S 13 N
ES
S 14
EPS
S 15
EV
A D D A TO K1
C O M P LETE S1 (34)
S
N
R ESE T S2
R
S3
I S1
S2 A (38)
S TEP 4
A D D B TO K1 S3 N C O M PL ETION TRIG G ER
N
CO MPLE TE S1 (34) S4 D
S
N
RE SET S2
R
S3
I
T 01 7 86 A
Figure 135-3 Parallel Addition of A and B
2VAA000844R0001 J 135-5
Applications 135. Sequence Manager
Figure 135-4 shows logic that checks to make sure that the sequence managers for both reactors are inactive. The logic
checks the active request number for each reactor. If the active request number is zero, then the header is available. In this
case, requests to add A and B will be processed only if both headers are available.
S TE P 4 IN D IC ATO R S1 (3 5)
T D -D IG N
R E SE T
A C TIV E R EQ U E S T O N E S H O T P U LS E
N U M B E R F RO M
S E Q U EN C E M A N AG E R
C O N TRO L L IN G S1
HEADER A H //L
S1 (1 2 ) S2 A (3 8)
H S1
N S3 N R E Q U E S T:
L N S2 A A D D A TO K 1
N+1 S4 D (38 )
A C TIV E R EQ U E S T S3 N
N U M B E R F RO M N
S4 D
S E Q U EN C E M A N AG E R R E Q U E S T:
C O N TRO L L IN G A D D B TO K 1
HEADER B H //L
S1 (1 2 )
H
N
L
N+1
A D D A TO K1
C O M P LE TE
S1 (3 4 )
S
N
S2
R E SE T R
S3
I
S1 S TE P 4
S2 A (3 8 ) TR IG G E R
S3 N N
A D D B TO K1 S4 D
C O M P LE TE
S1 (34 )
S
N
S2
R E SE T R
S3
I
AM OUNT A
S5 R E C IPR TO A D D TO K 1
(68 ) S11 (11 8)
S6 REMSET PS
N S13 N
ES
S14
EP S
S15
EV
AM OUNT B
R E C IPR TO A D D TO K 1
S11 (11 8 )
PS
S13 N
ES
S14 EP S
S15 EV
T01 78 7 A
Figure 135-4 Simultaneous Addition of A and B
Figure 135-5 shows the logic used to control common header A (or B). Outputs from the sequence manager block control
H O LD /R ES UM E TR IG GE R
R E QU E ST TO A D D A TO K 1 SEQMGR TO SE Q U E NC E M ON ITO R
FR O M M A IN SE Q U E NC E S3 (1 35)
H /R H / RT
C O N TRO LL IN G H E A D ER A
C O N TRO LL IN G K 1
S5 N INITIA L PH A S E /S TE P NU M BE R
R 1T SPN
S6 N+1
R 2T ARN
R E QU E ST TO A D D A TO K 2 S7 N+2
R 3T
FR O M M A IN SE Q U E NC E S8
C O N TRO LL IN G K 2 R 4T
S9 R 5T
S10
R 6T
S11 R 7T
S12
R 8T
S13
C 1T
S14
C 2T
S15
C 3T
S16 C 4T
S17 R E Q UE ST STAR TIN G PH A SE N O .
C 5T S 21 = A DD A TO K 1 C O M PLE TE FLAG
S18 S 22 = A DD A TO K 2 C O M PLE TE FLAG
C 6T
S19
C 7T
S20
C 8T
T 017 88 A
Figure 135-5 Control Common Header A
the sequence monitor block that controls and monitors the subsequence for the header. A hold/resume trigger puts the
135-6 2VAA000844R0001 J
135. Sequence Manager Applications
sequence monitor block in the hold mode. A new number is loaded into the sequence monitor block as the initial step from
the sequence manager block. The sequence manager then outputs a zero to the hold/resume trigger of the sequence
monitor. This causes the sequence monitor block to go into run mode and begin execution with the step number selected
with the sequence manager.
The sequence manager block selects Step 5 and is the step in the subsequence that adds component A to reactor K1.
Figure 135-6 shows this logic. The amount of A added to the tank is integrated until it is greater than the amount called for,
then the Step 5 completion trigger energizes. This causes the sequence to execute Step 6. Step 6, also shown in
Figure 135-6, energizes the add A to K1 completion flag, which feeds back to the sequence manager (Figure 135-5), and to
the main sequence logic (Figure 135-4).
0.0
S TE P 5
H//L TR IG G E R
S1 (166) S1 (12)

FT-A PV H
S3 N
S TE P 5 IN D IC ATO R IC Q L
S4 N+1
TS
A M O U N T A TO
A D D TO K 1
RE C IPR
S 11 (118 ) S1 (24)
PS ADA PT
S 13
ES
S 14 EPS
S 15
EV
A D D A TO K 1
S TE P 6 IN D IC ATO R C O M P LE TE FLAG
S1 (3 5)
TD -D IG
N
T 01 789A
Figure 135-6 Logic to Add A to K1 through Common Header
In this application, all logic resides within a single module. Logic does not have to reside in a single module. The main
sequence can be in one module, and a subsequence in another. When signals go between modules (on a polled basis),
there could be several scans performed on one module before the data is received from other modules. In the case where
a subsequence resides in another module, it is not much of a problem. However, if two requests for a common header come
in, then the completion flag for one subsequence may be on for only one scan. With two requests for header A, the add A to
K1 completion flag will be on for only one scan. If another module must see the flag in order for the sequence to continue, a
timer block must be placed in the logic to ensure that the flag stays on long enough to pass through the communications
highway.
Figure 135-7 shows an application requiring request prioritizing. Four chemical reactors are fed through common header D.
In this example, each reactor is making a different product, and these products have different levels of profitability. The
priority is:
K3 > K4 > K5 > K6
FT
R E AC TO R K 3 R E A C TO R K 4 R EA C TO R K 5 R E AC TO R K6
T 017 90A
Figure 135-7 Request Prioritizing Example
Requests for header D should be prioritized to process requests from reactor K3, then K4, then K5, then K6. The sequence
manager block will process requests on the basis of the lowest request number (S2 = 1). Each request number is identified
via a block address that is read into S5 through S12. The request for header D from K3 is identified in S5, the request from
K4 is identified in S6, etc. With this arrangement, if two requests are received while the subsequence is running a previous
2VAA000844R0001 J 135-7
Applications 135. Sequence Manager
request, the request with the lowest request number is processed next. Figure 135-8 illustrates the logic required to
implement the scheme.
SE Q M O N S TE P JU M P
S2 (12 4) T R IG G E R
CS JT
SE Q M G R S3 N +1
H O LD /R E S U M E T J#
S3 (1 35 ) TR IG G E R S4 N S TA RTIN G PH A S E
H /R H /R T SH N U M B ER
R E Q U E ST FR O M K3 S5 N S5
R1T SP N SAT
R E Q U E ST FR O M K4 S6 N +1 S TA R TIN G PH A S E S6
R2T AR N N U M B ER ES
R E Q U E ST FR O M K5 S7 N +2 S7
R3T SB
R E Q U E ST FR O M K6 S8 S8
R4T SA P
S9
R5T
S10
R6T
S11
R7T
S12
R8T
R E Q U E ST K3 C O M P L E TE D S13
C1T
C2T
C3T
C4T
S17
C5T
S18
C6T
S19
C7T
S20
C8T
T01 81 4A
Figure 135-8 Request Priority Logic
135-8 2VAA000844R0001 J
136. Remote Motor Control
136. Remote Motor Control

The remote motor control (RMC) function code has two basic functions. First, it performs the logic necessary to control a
digital output. Second, it communicates the result of that logic to the human system interface (HSI).
Outputs
RMC Blk Type Description

S1 (1 3 6 )
S T RT RS
N
S2
STP ON
N+1
N B Run state:
S3
S4
I1 OFF
N+2 0 = stopped
I2 ST
S5 N+3 1 = running
I3
S6 I4
S7 F1 N+1 B Pulse on
S8 F2
S9 P1 N+2 B Pulse off
S10 P2
N+3 B Control output status:

0.0 = good
1.0 = alarm
2.0 = waiting for feedback
Specifications
S1 N 0 I Note 1 Block address of start
S2 N 0 I Note 1 Block address of stop
S3 N 1 I Note 1 Block address of interlock 1
S7 N 0 I Note 1 Block address of feedback 1
S8 N 0 I Note 1 Block address of feedback 2
S9 N 1 I Note 1 Block address of start permissive 1
S10 N 1 I Note 1 Block address of start permissive 2
S11 Y 0.000 R Full Startup feedback wait time (secs)
S12 Y 0.000 R Full Pulse on time (secs)
S13 Y 0.000 R Full Pulse off time (secs)
S14 N 0 I Full Display type
S16 N 0.000 R 0.0, 1.0 or Status control:

2.0 0.0 = hold status disabled
1.0 = hold status enabled
2.0 = hold status enabled (reset status on exit)
S17 N 0.000 R Full Shutdown feedback wait time (secs). Shutdowns

use the startup feedback time when set to 0.0.
NOTE:
2VAA000844R0001 J 136-1
Explanation 136. Remote Motor Control
136.1 Explanation
Figure 136-1 shows the basic logic of a remote motor control block.
S3 IN T ER LO C K 1
S4 IN T ER LO C K 2
S5 IN T ER LO C K 3 A
S6 IN T ER LO C K 4 N
D
SHUTDOWN
NOT FEEDBACKSWAIT T OP TIMER
F E E D B AC K T IM E R
S2 S TO P TD -D IG
S TO P (K BD ) OR N OT
(P U LS E ) A
N RU N
D S12 – PULSE ON TIMER
S1 S TA RT SSTART
TA RT
T D -D IG
FEEDBACK
F E E D B ACWAIT TIMER
K T IM E R
T D -D IG P U L SE O N
S TA RT (K B D ) OR A
N TD -D IG
D (P U LS E ) OR
S9 P E R MIS S IV E 1 S13 – PULSE OFF TIMER
S10 P E R MIS S IV E 2
S7 F E E D B AC K 1
A NOT T D -D IG P U L SE O F F
S8 F E E D B AC K 2
N
D
T 0 1 8 15 A
Figure 136-1 Basic Logic of Remote Motor Control Block
136.1.1 Normal Operation of the Remote Motor Control
Start a device (energize output)

When <S1> makes an off to on transition or receives a start command from the HSI keyboard, the block undergoes a start.
The output of the block is energized when all interlocks <S3> to <S6> and permissive inputs <S9> and <S10> are logic 1.
Maintain a start
When <S1> makes the transition from off to on or receives a start command from the keyboard, the feedback timer starts.
When the startup feedback time is exceeded (S11), the feedback inputs (<S7> and <S8>) must be logic 1. If they are not,
then a bad start occurs and the output (N) goes to the stopped state (N equals zero).
NOTE: After the output of the block goes on, the permissives are not used. Permissives are not used to maintain an output.
Normal stop (de-energize output)

When <S2> makes an off to on transition or the keyboard sends a stop, the output of the block is de-energized and a
shutdown is initiated. When a shutdown occurs, the RMC cannot be restarted until the stop feedback time (S17 or S11 when
S17 equals 0.0) expires.
136.1.2 Abnormal Operation
Bad start
A bad start occurs when:
1. Either interlocks <S3> to <S6> or permissives <S9> and <S10> are not logic 1 when <S1> makes an off to on
transition or a keyboard start command has been received. In this case, block output N never goes on.
2. If interlocks and permissives are logic 1 and <S1> makes an off to on transition or a keyboard start is received,
then the output of the block is energized. However, if the feedbacks do not come on within the allotted feedback
time, then a bad start has occurred. Output N is de-energized and the shutdown sequence is initiated.
Fault
After a successful start, it is possible that one of the interlocks or feedbacks de-energize. When this happens, a fault has
occurred and the output of block N is de-energized and the shutdown sequence is initiated.
136.1.3 Pulsed Outputs
Outputs N+1 and N+2 are pulsed outputs that coordinate with output N. When output N makes an off to on transition, N+1
stays on for the length of time specified by S12. When output N makes an on to off transition, output N+2 stays on for the
length of time specified by S13.
136-2 2VAA000844R0001 J
136. Remote Motor Control Specifications
S1
Block address of the start input. This input triggers on the rising edge of this signal.
S2
Block address of the stop input. This input must be momentary. A maintained signal at S2 causes an alarm condition.
S3 through S6
Block addresses of the interlock inputs, these inputs must always be true for the output Run state =1.
S7 and S8
Block addresses of the feedback inputs, these inputs do not need to be true for running until after the startup feedback wait
timer times out. After the timer completes, these inputs must be true for the running state to be set.
S9 and S10
Block addresses of the start permissive inputs, these inputs must be true during startup for the Run state to be set. After
startup is complete (the startup feedback wait timer will time out), these inputs do not need to be maintained.
S11
Startup feedback wait time. This is the amount of time the remote motor control holds the run state to a logic 1 while waiting
for a logic 1 to appear on both feedback inputs when a startup is initiated. If this feedback (logic 1) does not reach the RMC
within this time, a bad start is assumed and the controller initiates a shutdown with an alarm status.
S12
Pulse on time. This is the amount of time the pulse on output stays at a logic 1 after a startup is initiated.
S13
Pulse off time. This is the amount of time that the pulse off output stays at a logic 1 after a shutdown is initiated.
S14
Display type.
S15
Spare.
S16
Status control. It controls the control output status when an alarm condition forces the RMC to initiate a shutdown. After the
shutdown feedback timer expires, S16 determines if:
• 0 = The RMC goes to stopped state (hold status disabled).
• 1 = The RMC enters a holding state that holds the control output status to an alarm value (1.0) until a there is a start
or stop initiated. The control output status is set to a good value (0.0) when the holding state is terminated (hold
status enabled).
• 2 = The RMC enters a holding state that holds the control output status to an alarm value (1.0) until there is a start
or stop initiated. The control output status is set to a good value (0.0) when the holding state is terminated. When
the hold state is terminated, any bad start or fault condition present will be cleared (hold status enabled - reset
status on exit).
S17
Shutdown feedback wait time. This is the amount of time the RMC waits for a motor to shutdown after a shutdown is
initiated. If this specification is set to 0.0, the value in S11 is the shutdown feedback wait time.
136.1.5 Outputs
N
Run state. A logic 1 means the block is running and a logic 0 is stopped. Output N has an alarm status associated with it.
The alarm status is set when a bad start, fault, or error condition exists.
N+1
Displays the pulse on. A logic 1 means the pulse on is on and a logic 0 is off.
2VAA000844R0001 J 136-3
Outputs 136. Remote Motor Control
N+2
Displays the pulse off. A logic 1 means the pulse off is off and a logic 0 is on.
N+3
Displays the control output status.
0.0 = good
1.0 = alarm
2.0 = waiting for feedback
136-4 2VAA000844R0001 J
137. C and BASIC Program Real Output With Quality

The C and BASIC real output with quality function code provides a means of transmitting a real data value and its quality
from a C or BASIC program to other function blocks. There are no specifications for this block. The BOUT command in the
C or BASIC program defines the four outputs. This function code is similar to function code 93, except this code has a
quality indicator. Quality can be measured only with a test quality block (function code 31). Quality is either good (0) or bad
(1). Refer to the C Utility Program or the MFC BASIC Programming Language Reference for instructions on
programming the modules.
Outputs
BA SR O Q
N
N+1 N R C or BASIC program command BOUT sets the output
N+2
value
N+3
N+1 R
N+2 R
N+3 R
Specifications
2VAA000844R0001 J 137-1
137-2 2VAA000844R0001 J
138. C or BASIC Program Boolean Output With Quality

The C or BASIC program boolean output with quality function code provides a means of transmitting a boolean data value
and its quality from the C program or BASIC program to other function blocks. There are no specifications for this block. The
BOUT command in the C program or BASIC program defines the four outputs. This function code is similar to function code
93, except this code has a quality indicator. Quality can only be measured with a test quality block (function code 31).
Quality is either good (0) or bad (1). Refer to the C Utility Program or the MFC BASIC Programming Language
Reference for instructions on programming the module.
Outputs
BA SB O Q
N
N+1
N+2
N B C program or BASIC program command BOUT sets the
N+3 output value
N+1 B
N+2 B
N+3 B
Specifications
2VAA000844R0001 J 138-1
138-2 2VAA000844R0001 J
139. Passive Station Interface
139. Passive Station Interface

The passive station interface function code emulates a control station using boolean and real inputs. Each passive station
interface block links to an associated station block. Specification S16 of the station block (FC 80) must be set to 254. This
value defines a passive station interface.
Outputs
PS I
S1 (1 3 9 )
S TA BYP
N
S2 SPI N /A
S3 N+1
S4
SPD N /A
N+2 N B Auto bypass request
COI N /A
S5 N+3
COD
S6 P
N /A
N+4 N+1 B Reserved
S7 AMX
S8 BPX N+2 B Reserved
S9 SP
S14 N /A N+3 B Reserved
S16 N /A
S17 N /A
N+4 B Reserved
Specifications
S1 N 0 I Note 1 Block address of station block (function code 80)
S2 N 0 I Note 1 Block address of set point raise
S3 N 0 I Note 1 Block address of set point lower
S4 N 0 I Note 1 Block address of control output raise
S5 N 0 I Note 1 Block address of control output lower
S6 N 1 I Note 1 Block address of auto/manual permissive
S7 N 0 I Note 1 Block address of auto/manual transfer
S8 N 0 I Note 1 Block address of manual bypass request
S9 N 5 I Note 1 Block address of bypass control output
S10 N 0 I Full Check input quality:

0 = disable
1 = enable
S11 Y 2.500 R Full Set point ramp rate (units/sec)
S12 Y 2.500 R Full Control output ramp rate (units/sec)
S13 N 1 I Full Bad quality bypass control output option:

0 = prevent bypass exit
1 = permit bypass exit
S14 N 5 I Note 1 Spare real input
S15 Y 1.000 R Full Maximum rate of change in bypass control output (units)
S17 N 0 I Note 1 Spare boolean input

NOTE:
2VAA000844R0001 J 139-1
Explanation 139. Passive Station Interface
139.1 Explanation
S1
Block address of the station block (function code 80). Specification S16 of the station block must be set to 254. This value
defines a passive station interface.
S2
Block address of set point raise. This input can simulate set point ramping. Specification S11 adjusts the set point ramp rate.
S3
Block address of set point lower. This input can simulate set point ramping. Specification S11 adjusts the set point ramp
rate.
S4
Block address of control output raise. This input can simulate control output ramping. Specification S12 adjusts the control
output ramp rate.
S5
Block address of control output lower. This input can simulate control output ramping. Specification S12 adjusts the control
output ramp rate.
S6
Block address of auto/manual permissive. A mode change is possible when this input is active (logic 1). Refer to S7.
• 0 = manual not permitted (auto mode only)
• 1 = manual mode permitted (auto or manual mode)
S7
Block address of the auto/manual transfer. A zero to one transition on this input will cause a mode change (auto/manual) if
S6 is active.
S8
Block address of the manual bypass request.
• 0 = Normal running mode
• 1 = Station in bypass mode
S9
Block address of the bypass control output. This input allows the aligning of the station output to the actual output (in
bypass).
NOTES:
1. The BRC-100 controller will enter the error mode when S13 equals zero and S9 references a block output that does not have
a defined quality status.
2. The station will always enter auto bypass when the quality of the associated analog output defined by S28 of function code 80
is bad.
S10
Enables input quality checking:
0 = disable input quality checking

1 = enable input quality checking
NOTE: The station enters auto bypass if S10 = 1, and an input of function code 139 has bad quality.
S11
Controls the set point ramp rate. The rate is expressed in units per second.
S12
Determines the control output ramp rate. The rate is expressed in units per second.
139-2 2VAA000844R0001 J
139. Passive Station Interface Outputs
S13
Bad quality bypass control output option.
0 = bypass exiting not permitted when <S9> has bad quality

1 = bypass exiting always permitted
S14
Spare real input.
S15
Maximum change in the bypass control output input <S9> that is allowed for exiting bypass. This specification is only in
effect while the station is in auto bypass. The station will be prevented from exiting auto bypass if the change in the <S9>
input from one segment cycle execution to the next is greater than this value. To derive the S15 value from a rate of change
value, use the formula:
FC139 S15 setting = rate of change (units/sec or units/min) S2 of FC82

The <S9> input is typically connected to a feedback from the control output of the station block (function code 80). When
this is the case, the use of this specification allows the station to maintain itself in the bypass condition until it is detected
that the control output is not changing rapidly. The use of this specification prevents the auto bypass output from switching
control of the control output analog output signal back to the AOT, CIO, CIS, or ASO hardware while the control output is
changing.
S16 and S17

Spare real and boolean inputs respectively.
139.1.2 Outputs
N
(Auto bypass request) This boolean output signals auto bypass when active (logic 1).
N+1 through N+4

Reserved.
2VAA000844R0001 J 139-3
Application 139. Passive Station Interface
139.2 Application
Figure 139-1 shows a configuration using the passive station interface block. This example allows simultaneous control of a
station function from both a console and external pushbuttons. A hard station cannot be used with this configuration.
NOTE: The inputs to the passive station interface do not have to come from external inputs. Internal logic can generate these
inputs. For example, the auto permissive could be generated from logic that only allows automatic during certain portions of the
process operation.
D IG R P
EX T ER N AL S E T P OIN T (8 4) S P INC
P U S HB U TTO N S N SP DEC
E X T ER N AL CO N T R O L
INC N+1 C O IN C
OU T P U T
O P T IO N AL AU TO /M A N P U S H B UT TO N S DEC N+2 C O D EC
L O GIC A LT E RN AT E INC N+4 AU TO P E RM IT
AUTO
IN P U T AC T IO N N+3
P E R M IT DEC A /M
P U S HB U TTO N S
N+5 BP REQ
F OR C E S TATIO N
TO B Y PA S S N+6
N+7
PSI
S1 (1 39 ) AU TO B Y PA S S
S TA BYP R E Q UE S T ED
S2 (TO A LA R M )
SPI N/A
S3
SPD N/A
M /A S4
COI N/A
M F C /P S5
COD N/A
S1 (8 0) S6
PV SP P
P ID S2 N+1 S7
SP O AMX
S2 (1 9) S3 N S8
PV SP A A BPX
S1 N S4 N+2 S9
PV TR C /R SP
S3 S5 N+4 S 14
TR TS C N /A
S4 S1 8 N+3 S 16
TS MI C -F N /A
S1 9 N+5 S 17
AX N /A
S2 0
C/R
S2 1
LX
S2 2
CX
S2 4
HA A
S2 5
L AA
S2 6 O U T P UT F O R A N A L OG
HDA O U T P UT S IG N A L O R
S2 7
L DA P U L SE P O S IT IO NE R
S2 8 (F UN C T IO N CO D E 4 )
AO
S2 9 F O R C O N TA CT
T RS 2
S3 0 T (PU LS E ) O U T P UT
T RP V
T 01 8 1 7 A
Figure 139-1 Passive Station Interface Example
139-4 2VAA000844R0001 J
140. Restore
140. Restore
The restore function code saves and restores critical block values (e.g., totalizers, counters, timers) to and from nonvolatile
random access memory (NVRAM). Tables 140-2 and 140-3 show NVRAM and checkpoint utilization. During normal
execution after startup, the internal and output block data referenced by this block goes to NVRAM. After a module power
loss or recovery, the block referenced by this function block restores to the last saved state. Saving the block data can be
disabled by either boolean input (S2 and S3). Both inputs must be logic 1 for the save to occur.
Data restore can be selected upon power restore, mode changes to execute, or both. If the module is offline longer than the
maximum downtime, an external timer can be used to trip a digital input on an IMCIS12, IMCIS22, IMQRS12, IMQRS22,
IMDSI12, IMDSI13, IMDSI14, IMDSI15 or an IMDSI22 module to prevent a restore after the timer expires. The expired logic
state for the digital input is configurable. The data restores to the saved value before the first execution cycle of the
configuration. The restore function block must be located at a block number greater than the function block being restored
(S1).
When restoring a multiple output block (e.g., M/A station function code 80), the lowest output number (N) of that block must
be specified by S1.
Outputs
S1
R E ST R
R
S2 (1 4 0 )
SF
S3
PSF
N B No meaning, N must be greater than S1
Specifications
S1 N 0 I Note 1 Block address to be restored
S2 N 0 I Note 1 Block address of save flag:

0 = no save
1 = save data to NVRAM if <S3> = 1
S3 N 0 I Note 1 Block address of save permissive:

0 = disabled
1 = enabled
S4 N 0 I 00, 01, 10 Restore condition:

or 11 X0 = restore on power up
X1 = no restore on power up
0X = restore on mode changes
1X = no restore on mode changes
S5 N 0 I 0 - 63 I/O module address of timer input
S6 N 0 I 0 - 123 Point number of timer input:

unused = 000
DSI = X0Z = Group A (Z = 1 - 8)
= X1Z = Group B (Z = 1 - 8)
CIS = X2Z (Z = 1 - 3)
Expire logic state:
0YZ = logic 0
1YZ = logic 1
S7 N 0 I Full Spare
S9 Y 0 I Full Spare
NOTE:
2VAA000844R0001 J 140-1
Specifications 140. Restore
140.1 Specifications
S1
Block address of the block to be restored.
S2
Block address of the save flag. This specification is used in conjunction with <S3> to cause the internal and external output
data to be saved to NVRAM every time the restore block executes while <S2> and <S3> equal one.
S3
Block address of the save permissive. The save permissive enables or disables the save flag input <S2>. Table 140-1
shows the save action dependent upon <S2> and <S3>.
Table 140-1 Save Action
<S3> <S2> Save Action
0 0 No save
0 1 No save
1 0 No save
1 1 Save data to NVRAM
S4
Restore condition. This specification determines which conditions cause the saved data in NVRAM to be restored to the
internal and external outputs in RAM. The ones digit of S4 determines if the data is to be restored when a power up of the
module occurs. The tens digit of S4 determines if the data is to be restored upon a mode change or module reset via the
reset button.
• Determines if data is to be restored when a power up of the module occurs.
– X0 = restore
– X1 = do not restore
• Determines if data is to be restored upon a mode change or a reset from pushbutton.
– X0 = restore
– X1 = do not restore
S5
I/O module address of the timer input. This specification is the expander bus address of the digital or control I/O module that
provides the timer input signal.
S6
Point number of the timer input. This specification defines the digital or control I/O module input point number of the time
input signal. The timer input prevents the module from restoring outdated information after it has been powered down for an
extended period of time. The hundreds digit of S6 defines the expired logic state when a time-out condition occurs.
unused = 000
DSI = X0Z = Group A (Z = 1 - 8)
= X1Z = Group B (Z = 1 - 8)
CIS = X2Z (Z = 1 - 3)
Expire logic state:
0YZ = logic 0
1YZ = logic 1
S7, S8 and S9
Spare.
140-2 2VAA000844R0001 J
140. Restore Module Memory Utilization
140.2 Module Memory Utilization
NOTE: When the NVRAM module memory utilization of a function block being restored is modified (i.e., a function block which has
a variable usage equation associated with it in Table 140-2 or 140-3), it is necessary to manually perform the following operation in
the configuration mode:
1. Modify S1 of the FC 140 function block to zero.
2. Modify S1 of the FC 140 function block to re-reference the block address of the function block being restored.
This operation allows the FC 140 function block to recognize the NVRAM changes of the function block being restored and to then
adjust itself accordingly. Failure to perform this operation will result in the module entering error mode when function block config-
uration has been completed.
To determine NVRAM module memory utilization, use Appendix D, in conjunction with the formula:
NVRAM = 40 + N
where:
N= Applicable function code size from Tables 140-2 or
140-3. NVRAM is set to 46 when N is less than six.
Table 140-2 BRC-100/200/300/400 and IMMFP11/12 Additional NVRAM and Checkpoint

Utilization Byte Size
Function Function Function Function

Size1 Size1 Size1 Size1
Code Code Code Code
1 4 15 4 36 2 61 6
2 4 16 4 37 2 62 10
3 14 17 4 38 2 63 118
4 12 18 18 39 2 64 70
5 10 19 22 40 2 65 4
6 4 24 4 41 28 66 80 slow
7 4 25 34 42 4 66 332 fast
8 10 26 10 45 8 68 24
9 14 30 14 50 2 69 4
10 4 31 2 51 4 79 60
11 4 32 2 52 2 80 68
12 4 33 2 55 80 81 52
13 2 34 2 58 Equation 1 82 36
14 4 35 10 59 2 83 2
84 34 120 4 152 18 191 88
85 10 121 12 153 22 192 104
86 16 122 4 154 20 193 62 +S5
89 4 123 20 155 52 194 50 +S4
90 52 124 12 156 40 198 16
91 4 125 4 157 Equation 3 199 8
92 4 126 16 160 114 210 178
93 16 128 4 161 38 211 70
2VAA000844R0001 J 140-3
Module Memory Utilization 140. Restore
Table 140-2 BRC-100/200/300/400 and IMMFP11/12 Additional NVRAM and Checkpoint

Utilization Byte Size (Continued)

Size1 Size1 Size1 Size1
Code Code Code Code
94 20 129 26 162 16 212 24
95 26 132 40 163 24 215 18
96 26 133 12 165 Equation 4 216 8
97 8 134 24 166 16 217 32
98 6 135 24 167 4 2182 294+S12
99 4 136 38 168 6 219 Equation 5
100 18 137 24 169 36 220 214 +S11
101 2 138 16 170 36 2212 54
102 12 139 24 171 4 2222 54
103 12 140 4 172 4 2232 54
104 24 141 16 173 4 2242 54
109 12 142 2 174 4 2252 54
110 6 143 14 177 82 2262 8
111 6 144 2 178 36 2272 64
112 6 145 14 179 Equation 12 2282 106
114 10 146 46 184 56 2292 72
115 4 147 66 185 52 241 18
116 2 148 Equation 2 186 68 242 88
117 2 149 44 187 24 247 70
118 4 150 28 188 24
119 2 151 14 190 4

NOTES:
1. Add 8 bytes to the byte size for BRC-300/400 controllers.
2. This function code is not supported by the IMMFP11/12.
Table 140-3 HAC Additional NVRAM and Checkpoint Utilization Byte Size

Size Size Size Size
Code Code Code Code
1 12 40 10 97 16 138 24
2 12 41 33 98 14 139 32
3 22 42 14 100 26 140 12
4 20 45 32 101 10 141 24
5 18 50 10 102 20 142 10
6 12 51 8 103 20 143 22
140-4 2VAA000844R0001 J
140. Restore Module Memory Utilization
Table 140-3 HAC Additional NVRAM and Checkpoint Utilization Byte Size (Continued)

Size Size Size Size
Code Code Code Code
7 12 52 8 104 32 144 Equation 7
8 18 55 88 109 20 145 22
9 22 57 Equation 6 110 14 146 54
10 12 58 22 111 14 147 74
11 12 59 10 112 14 148 Equation 8
12 12 61 14 114 18 149 52
13 10 62 22 115 12 150 42
14 12 63 110 116 10 151 26
15 12 64 62 117 10 152 26
16 12 65 12 118 12 153 30
17 12 66 340 119 10 154 28
18 26 68 36 120 12 155 Equation 9
19 30 69 12 121 22 156 48
24 12 79 68 122 14 157 Equation 10
25 34 80 80 123 32 160 122
26 20 81 66 124 20 161 46
30 40 82 56 125 12 162 24
31 10 83 10 126 24 163 32
32 10 84 42 128 22 165 Equation 11
33 10 85 18 129 38 166 24
34 10 86 24 132 48 167 12
35 18 87 10 133 20 168 14
36 10 88 26 134 36 169 44
37 10 90 58 135 32 170 44
38 10 95 30 136 50 171 12
39 10 96 34 137 32 172 12
173 12 188 32 212 34 223 64
174 14 190 12 215 26 224 64
177 94 191 96 + S16 216 16 225 64
178 52 192 112 + S24 217 40 226 16
179 Equation 12 193 72 + S5 218 308 + S12 227 Note 1
184 84 194 62 + S4 219 Equation 13 228 Note 1
185 60 198 24 220 226 + S11 241 30
2VAA000844R0001 J 140-5
Memory Usage Equations 140. Restore
Table 140-3 HAC Additional NVRAM and Checkpoint Utilization Byte Size (Continued)

Size Size Size Size
Code Code Code Code
186 76 199 16 221 50 242 96
187 32 211 84 222 64 247 Note 1

NOTE:
1. This function code is not supported by the HAC01.
140.3 Memory Usage Equations
NOTE: The specification numbers referred to in the memory usage equations come from the related block. They do not come
from FC 140.
1. FC 158: 14 + S5 x 4
2. FC 116: 188 + S12 x b
where:
b = 1 (if S12 is positive)
- or -
b = 1024 (if S12 is negative)
3. FC 157: 12 + 4 x (S21 + 5) + 4 x (S22 + 5)
4. FC 16526 + 4 x S2
5. FC 168156 + S13 x 56
6. FC 9 (HAC): 182 + S2 + (S8 x 16)
7. FC104 (HAC): 10 + (S1 x 1024)
8. FC 112 (HAC): 248 + (S12 x b)
where:
- or -
9. FC 120 (HAC): 60 + (S7 x 20)
10. FC 122 (HAC) 20 + [4 x ({5 + S21} + {5 + S22})]
11. FC 128 (HAC): 34 + (4 x S2)
12. FC 179: a + [b x (S4)] + [c x (n{S3})] + d
where:
n{S3} Number of modes selected for S3
=
if S2 0, 3, 10, or 11, then a = 106, b = 12, and c = 8
=
if S2 1, 2, 5, 6, 7, 9, 12, or 13, then a = 100, b = 10,
= and c = 4
if S2 4 or 8, then a = 128, b = 25, and c = 32
=
if IMMFP11/12 or BRC-100, then d = 0
if HAC, then d = 4
13. FC 219 (HAC): 378 + (142 x S13)
140.4 Applications
In Figure 140-1, the moving average block (function code 165) calculates the average of the square root value at block 400.
The moving average is calculated every 15 seconds and is calculated based on one hour’s worth of collected data. The
average calculation is suspended whenever the quality of the analog input is bad.
140-6 2VAA000844R0001 J
140. Restore Applications
The restore block (function code 140) ensures that the hour’s worth of collected data is not lost in the event that the
controller module loses power. The restore block is configured for restore on power up. The elapsed timer block controls the
update rate of NVRAM data. The NVRAM data is saved once every 15 seconds.
AI/L
(26) S1 (7) S1
MOVAVG
(165) S1 (30)
300 400 S4 AO/L
TS 500 600
S2 = 2 (33)
S2 = 240
NOT S3 = 15.0
S1
S2
ETIMER
(31) S2 (86) S1 RESTR
S3 TSTQ 440
H V
450
R
(140)
S1 R
S2 SF
S4 A
451 S3 550
PSF
S3 = 0
S4 = 15.0
S4 = 10
S5 = 0.0 S5 = 0
(1)
1 S6 = 000
T01818B
Figure 140-1 Using the Restore Block
2VAA000844R0001 J 140-7
Applications 140. Restore
140-8 2VAA000844R0001 J
141. Sequence Master
141. Sequence Master

The sequence master function code contains a series of masks selected by the step jump input. The masks define the
states of the four boolean outputs for each step. A mask is specified as a series of zeros, ones or twos. Each digit in the
mask is associated with a specific output. A value of two represents the don't care state. When this state is selected, the
output value assumes the value of the previous step's state. There is a disable mask in addition to the step masks. The
disable mask defines the safe state of the outputs. The default mask is output for step zero. If additional steps are required,
a sequence master block can be linked to a sequence slave block (FC 142). Sequence slave blocks can also be linked
together. Series of sequence master and slave blocks can be run in parallel to provide multiples of four boolean outputs.
Outputs
SE Q M ST
S1
SSL 1
S2 N
J 10
S3 J# 1 00
N+1
N B Ones digit of current mask
N+2
1 00 0
N+3
STP
N+4
N+1 B Tens digit of current mask
N+2 B Hundreds digit of current mask
N+3 B Thousands digit of current mask
N+4 R Current step number

NOTE: If mask digit is two, then output equals previous step output value.
Specifications
S1 N 0 I Note 1 Block address of sequence slave (0 = end)
S2 N 0 I Note 1 Block address of step jump trigger. Requires a 0 to

1 transition after start-up is complete.
S3 N 5 I Note 1 Block address of step jump number
S4 Y 0 I 0 - 2222 Default mask
S5 Y 0 I 0 - 2222 Step 1 mask
S6 Y 0 I 0 - 2222 Step 2 mask
S7 Y 0 I 0 - 2222 Step 3 mask
S8 Y 0 I 0 - 2222 Step 4 mask
S9 Y 0 I 0 - 2222 Step 5 mask
S10 Y 0 I 0 - 2222 Step 6 mask
S11 Y 0 I 0 - 2222 Step 7 mask
S12 Y 0 I 0 - 2222 Step 8 mask
S13 Y 0 I 0 - 2222 Step 9 mask
S14 Y 0 I 0 - 2222 Step 10 mask
S15 Y 0 I 0 - 2222 Step 11 mask
S16 Y 0 I 0 - 2222 Step 12 mask
S17 Y 0 I 0 - 2222 Step 13 mask
S18 Y 0 I 0 - 2222 Step 14 mask
S19 Y 0 I 0 - 2222 Step 15 mask
2VAA000844R0001 J 141-1
Specifications 141. Sequence Master
S20 Y 0 I 0 - 2222 Step 16 mask
S21 Y 0 I 0 - 2222 Step 17 mask
S22 Y 0 I 0 - 2222 Step 18 mask
S23 Y 0 I 0 - 2222 Step 19 mask
S24 Y 0 I 0 - 2222 Step 20 mask
S25 Y 0 I 0 - 2222 Step 21 mask
S26 Y 0 I 0 - 2222 Step 22 mask
S27 Y 0 I 0 - 2222 Step 23 mask
S28 Y 0 I 0 - 2222 Step 24 mask
S29 Y 0 I 0 - 2222 Step 25 mask
S30 Y 0 I 0 - 2222 Step 26 mask
S31 Y 0 I 0 - 2222 Step 27 mask
S32 Y 0 I 0 - 2222 Step 28 mask
S33 Y 0 I 0 - 2222 Step 29 mask
S34 Y 0 I 0 - 2222 Step 30 mask
S35 Y 0 I 0 - 2222 Step 31 mask
S36 Y 0 I 0 - 2222 Step 32 mask

NOTE:
S1
Block address of the sequence slave (function code 142).
0 = none (Steps zero to 32 supported)

Each additional sequence slave adds another 32 step masks to the selection.
S2
Block address of the step jump trigger. When <S2> transitions from zero to one, the step jump number <S3> is loaded as
the current step number (N+4) and the appropriate mask is loaded to update the outputs N, N+1, N+2 and N+3.
S3
Block address of the step jump number. The input value is forced equal to zero when it is less than or equal to zero. If the
input value is greater than the maximum step number, the maximum step number is used. The maximum step number is
determined from the number of sequence slaves linked to the sequence master block.
maximum step number  (master  N) 32

where:
N=0 32 steps
N=1 64 steps
N=2 96 steps
N=3 128 steps
etc.
141-2 2VAA000844R0001 J
141. Sequence Master Applications
S4
Specification S4 is the default mask. Each mask is a four-digit number, and each digit can hold the values 0, 1, or 2.
where:
X=0 Output equals zero
X=1 Output equals one
X=2 Output equals hold previous output
Step 0 = default mask

X X X X
Ones digit is output N
Tens digit is output N+1
Hundreds digit is output N+2
Thousands digit is output N+3
S5 through S36
Step 1 to Step 32 masks. Refer to S4 for more information.
141.2 Applications
Figure 141-1 and Table 141-1 show a series of sequence master and slave blocks run in parallel to provide multiple outputs.
SE Q M S T
0 (14 2) (142 ) (141)
S1 S1 S1
S YS TE M SE Q SLV SE Q SLV S SL 1
N
C O N STAN T N N S2 J 10
S3 N+1
J# 100
N+2
1 00 0 96
N+3 AVA ILA B LE
S TP
N+4 8-B IT M A S K S
0
SE Q M ST
S1 (142 ) S1 (142 ) S1 (141)
S YS TE M SE Q SLV SE Q SLV SS L 1
C O N STAN T N N S2 N
J 10
S3 N+1
J# 100
N+2
1 00 0
N+3
S TP
N+4
J U M P TR IG G E R C AU S E S TH E
S ELE C T E D 8 -B IT M A SK TO
A P P E AR AT TH E O U TP U T O N S ELE C T S TE P J U M P VALU E
A LOW (0) TO H IG H ( 1) T R A N SIT IO N ON E O F 96 M AY B E R E AD TO
8 -B IT M A SK S O B TA IN T H E C U R R E N T
S TE P JU M P M A S K N U M B E R T01819A
Figure 141-1 Parallel Sequence Master to Slave
Table 141-1 Output Descriptions
Output
Step No.
Mask
<S3> N+4 N+3 N+2 N+1 N
0.0 S4 = 0000 0.0 0 0 0 0
1.0 S5 = 0101 1.0 0 1 0 1
2.0 S6 = 1200 2.0 1 1 0 0
3.0 S7 = 2012 3.0 1 0 1 0
4.0 S8 = 0001 4.0 0 0 0 1
2VAA000844R0001 J 141-3
Applications 141. Sequence Master
Figure 141-2 shows a logic diagram with the sequence master block used in a batch operation. The sequence master block
can be thought of as a simpler version of the sequence generator block (function code 161). In most batch applications of
the sequence generator block, the sequence master block may be used instead.
S1 (1 4 2 )
SE Q SLV N
C O N T RO L IN PU T
C O NTRO L OU TPUT C O N T RO L O U T PU T
S TAT U S S TAT U S
D D R IV E SE Q M ST
S1 (12 3 ) D E VM O N SE Q M O N S1 (1 4 1 )
CI O SSL 1
S2 N S1 (1 2 5 ) S2 (1 2 4 ) S2 N
FB1 ST CS JT JT 10
S3 N+1 S2 N S3 N +1 S3 N+1
FB2 T J# J# 1 00
S5 S3 S4 N N+2
OP SH 1000
S6 S4 S5 N+3
OS S AT STP
S5 S6 N+4
ES
S6 S7
SN
S7 S8
SAP
S8
S9
S10
S11
F E E D BA C K S12
IN P U TS S13
S14
S15
S16
S T E P T R IG G E R
S TEP NU M BE R
BM U X RDE MUX
S1 (1 1 9 ) S1 (1 2 6 )
1
S2 N N
2
S3 N+1 STE P
STE P 3
S4 N+2 IN D IC ATO R S
T R IG G E R S 4 TO
S5 N+3
FROM 5 AU XIL IA RY
AU X IL IA RY S6 N+4
6 L O G IC S
L O G IC S S7 N+5
7
S8 N+6
8
S9 N+7
S 10
S 11
T 01 8 20 A
Figure 141-2 Using Sequence Master Block in Batch
The number of steps for an application can be expanded in multiples of 32 by linking sequence slave blocks (function code
142). Additional sequence master blocks can be run in parallel to provide expanded step masks in multiples of four output
states per step number.
141-4 2VAA000844R0001 J
142. Sequence Slave
142. Sequence Slave

The sequence slave function code contains a series of masks that a sequence master function code steps through on a
selected step basis. The purpose of the sequence slave function code is to expand the step number capability of the
sequence master function code. The masks define the states of the sequence master block's four boolean outputs for each
step. A series of zeros, ones, or twos specifies a mask. Each digit in the mask is associated with a specific output. A value
of two represents the don't care state. When this state is selected, the output value assumes the value of the previous
step's state. If additional steps are required, the sequence slave block can be linked to another sequence slave block.
NOTE: Function code 142 must be used in combination with a sequence master block (function code 141). Refer to the applica-
tions section of function code 141 for more information.
Outputs
(1 4 2 )
S1
SE Q SLV
N
N B No meaning
Specifications
Spec Tune Default Type Range Description1
S1 N 0 I Note 2 Block address of next sequence slave (0 = end)
S2 Y 0 I 0 - 2222 Step N+1 mask
S3 Y 0 I 0 - 2222 Step N+2 mask
S4 Y 0 I 0 - 2222 Step N+3 mask
S5 Y 0 I 0 - 2222 Step N+4 mask
S6 Y 0 I 0 - 2222 Step N+5 mask
S7 Y 0 I 0 - 2222 Step N+6 mask
S8 Y 0 I 0 - 2222 Step N+7 mask
S9 Y 0 I 0 - 2222 Step N+8 mask
S10 Y 0 I 0 - 2222 Step N+9 mask
S11 Y 0 I 0 - 2222 Step N+10 mask
S12 Y 0 I 0 - 2222 Step N+11 mask
S13 Y 0 I 0 - 2222 Step N+12 mask
S14 Y 0 I 0 - 2222 Step N+13 mask
S15 Y 0 I 0 - 2222 Step N+14 mask
S16 Y 0 I 0 - 2222 Step N+15 mask
S17 Y 0 I 0 - 2222 Step N+16 mask
S18 Y 0 I 0 - 2222 Step N+17 mask
S19 Y 0 I 0 - 2222 Step N+18 mask
S20 Y 0 I 0 - 2222 Step N+19 mask
S21 Y 0 I 0 - 2222 Step N+20 mask
S22 Y 0 I 0 - 2222 Step N+21 mask
S23 Y 0 I 0 - 2222 Step N+22 mask
2VAA000844R0001 J 142-1
Specifications 142. Sequence Slave
Spec Tune Default Type Range Description1
S24 Y 0 I 0 - 2222 Step N+23 mask
S25 Y 0 I 0 - 2222 Step N+24 mask
S26 Y 0 I 0 - 2222 Step N+25 mask
S27 Y 0 I 0 - 2222 Step N+26 mask
S28 Y 0 I 0 - 2222 Step N+27 mask
S29 Y 0 I 0 - 2222 Step N+28 mask
S30 Y 0 I 0 - 2222 Step N+29 mask
S31 Y 0 I 0 - 2222 Step N+30 mask
S32 Y 0 I 0 - 2222 Step N+31 mask
S33 Y 0 I 0 - 2222 Step N+32 mask

NOTES:
1. N = 32 (for first sequence slave in linked list)
N = 64 (for second sequence slave in linked list)
N = 96 (for third sequence slave in linked list)
etc.
2. 2. Maximum values are:
S1
Block address of the next sequence slave (function code 142).
0 = none (Steps zero to 32 supported)

Each additional sequence slave adds another 32 step masks to the selection.
S2
Block address of the step jump trigger. When <S2> transitions from zero to one, the step jump number <S3> is loaded as
the current step number (N+4) and the appropriate mask is loaded to update the outputs N, N+1, N+2 and N+3.
S3
Block address of the step jump number. The input value is forced equal to zero when it is less than or equal to zero. If the
input value is greater than the maximum step number, the maximum step number is used. The maximum step number is
determined from the number of sequence slaves linked to the sequence master block.
maximum step number  (master  N) 32

where:
N=0 32 steps
N=1 64 steps
N=2 96 steps
N=3 128 steps
etc.
X X X X
Ones digit is output N
Tens digit is output N+1
Hundreds digit is output N+2
Thousands digit is output N+3
142-2 2VAA000844R0001 J
142. Sequence Slave Specifications
S4
Specification S4 is the default mask.
Step 0 = default mask
S5 through S36
Step 1 to Step 32 masks. Each mask is a four-digit number, and each digit can hold the values 0, 1, or 2.
where:
X=0 Output equals zero
X=1 Output equals one
X=2 Output equals hold previous output
Figure 142-1 and Table 142-1 show a series of sequence master and slave blocks run in parallel to provide multiple outputs.
SE Q M S T
0 (14 2) (142 ) (141)
S1 S1 S1
S YS TE M SE Q SLV SE Q SLV S SL 1
N
C O N STAN T N N S2 J 10
S3 N+1
J# 100
N+2
1 00 0 96
N+3 AVA ILA B LE
S TP
N+4 8-B IT M A S K S
0
SE Q M ST
S1 (142 ) S1 (142 ) S1 (141)
S YS TE M SE Q SLV SE Q SLV SS L 1
C O N STAN T N N S2 N
J 10
S3 N+1
J# 100
N+2
1 00 0
N+3
S TP
N+4
J U M P TR IG G E R C AU S E S TH E
S ELE C T E D 8 -B IT M A SK TO
A P P E AR AT TH E O U TP U T O N S ELE C T S TE P J U M P VALU E
A LOW (0) TO H IG H ( 1) T R A N SIT IO N ON E O F 96 M AY B E R E AD TO
8 -B IT M A SK S O B TA IN T H E C U R R E N T
S TE P JU M P M A S K N U M B E R T01819A
Figure 142-1 Parallel Sequence Master to Slave
Table 142-1 Output Descriptions
Output
Step No.
Mask
<S3> N+4 N+3 N+2 N+1 N
0.0 S4 = 0000 0.0 0 0 0 0
1.0 S5 = 0101 1.0 0 1 0 1
2.0 S6 = 1200 2.0 1 1 0 0
3.0 S7 = 2012 3.0 1 0 1 0
4.0 S8 = 0001 4.0 0 0 0 1
2VAA000844R0001 J 142-3
Specifications 142. Sequence Slave
Figure 142-2 shows a logic diagram with the sequence master block used in a batch operation. The sequence master block
can be thought of as a simpler version of the sequence generator block (function code 161). In most batch applications of
the sequence generator block, the sequence master block may be used instead.
S1 (1 4 2 )
SE Q SLV N
C O N T RO L IN PU T
C O NTRO L OU TPUT C O N T RO L O U T PU T
S TAT U S S TAT U S
D D R IV E SE Q M ST
S1 (12 3 ) D E VM O N SE Q M O N S1 (1 4 1 )
CI O SSL 1
S2 N S1 (1 2 5 ) S2 (1 2 4 ) S2 N
FB1 ST CS JT JT 10
S3 N+1 S2 N S3 N +1 S3 N+1
FB2 T J# J# 1 00
S5 S3 S4 N N+2
OP SH 1000
S6 S4 S5 N+3
OS S AT STP
S5 S6 N+4
ES
S6 S7
SN
S7 S8
SAP
S8
S9
S10
S11
F E E D BA C K S12
IN P U TS S13
S14
S15
S16
S T E P T R IG G E R
S TEP NU M BE R
BM U X RDE MUX
S1 (1 1 9 ) S1 (1 2 6 )
1
S2 N N
2
S3 N+1 STE P
STE P 3
S4 N+2 IN D IC ATO R S
T R IG G E R S 4 TO
S5 N+3
FROM 5 AU XIL IA RY
AU X IL IA RY S6 N+4
6 L O G IC S
L O G IC S S7 N+5
7
S8 N+6
8
S9 N+7
S 10
S 11
T 01 8 20 A
Figure 142-2 Using Sequence Master Block in Batch
The number of steps for an application can be expanded in multiples of 32 by linking sequence slave blocks (function code
142). Additional sequence master blocks can be run in parallel to provide expanded step masks in multiples of four output
states per step number.
142-4 2VAA000844R0001 J
143. Invoke C
143. Invoke C
Function code 143 invokes the C program. Specifically, the invoke C block calls a function within the C program designated
as a segment entry point.
The C program can have as many as eight segment entry points. Each entry point has a function block segment (segment
entry point zero with function block segment zero, etc.). A function name (i.e., the name of the functions that compose the C
program) connects with each entry point. The same function name may connect with more than one entry point.
During function block execution, an encounter with an invoke C block transfers control to the C program at the associated
entry point (i.e., calls the appropriate function). When that program returns, function block execution continues normally at
the next block. The entry point program function may call other functions of the C program before returning.
Besides the normal utilization constraints, there are no further restrictions on the configuring of invoke C blocks. Specifically,
invoke C blocks may appear in any or all function block segments. Since each function block segment is a separate task,
more than one task may execute the C program. When the C program is subject to multitasking, all shared functions among
tasks must be coded so as to be reentrant.
Refer to S+ Engineering for Harmony Primary Interface (2VAA000812*) for more information on C program development.
Outputs

IN V KC N
N R Value may be set by C program using the putargs function
Specifications
S1 Y 0 I 0, 1 or 2 Program operating mode:

0 = C program will execute normally
1 = C program execution is inhibited, blocks will
run
2 = C program is in debug mode for use with the
EWS C debugger
S2 N 0 I Note 1 Block address of inhibit execution flag
S3 Y 0 I Full Program readable parameter
S7 Y 0.000 R Full Program readable parameter
S8 Y 0.000 R Full Program readable parameter
S9 Y 0 I Full Spare
S10 Y 0 I Full Spare

NOTE:
2VAA000844R0001 J 143-1
Applications 143. Invoke C
143.1 Applications
Figure 143-1 shows a configuration of a timer used to monitor and provide alarm capability. Figure 143-2 shows the entry in
the C utility program for this example. There are numerous ways to use the invoke C command block and several ways to
configure a timer. This is just one example.
Figure 143-1 Watchdog Timer Configuration
ED IT U SER R AM SPECIFICATIO N S
M ax siz e of C idata section 0

M ax siz e of C udata section 0
M in size of dynam ic mem ory p ool 0
Segm ent Nam e of Stack

N umb er En try Point Size
0 M ain 1024
1 0
2 0
3 0
4 0
5 0
6 0
7 0
Alt-H H elp
T 01 822 A
Figure 143-2 Entry in C Utility Program
The example in Figure 143-1 shows a C program called main being executed in segment zero of the module. The invoke C
function code is placed in numerical order after the segment control block.
The C program has an output to the invoke C specification which triggers a time delay command (function code 58) in the
succeeding configuration.
This timer configuration starts with a time delay command (function code 58). The input comes from the invoke C command
block. The delay is equal to the longest inference cycle time period anticipated, and the number of intervals set to one. A 2-
input summer (function code 15) is next. The summer's inputs come from the invoke C command block (gain equals one)
and the time delay block output (gain equals -1). Specification <S2> of the summer block subtracts from <S1> and the value
goes to the high/low compare (function code 12).
The high/low compare block compares the input with the high and low limits specified. The high limit equals +0.5 and the
low limit equals -0.5. If the input is equal to or greater than the high limit, the high output is logic 1 and the low output a logic
143-2 2VAA000844R0001 J
143. Invoke C Applications
0. If the input is equal to or less than the low limit, the low output is logic 1 and the high output a logic 0. If the input value is
between the high and low limits, both outputs are logic 0.
Both of the high/low compare outputs go to the 2-input OR block (function code 39). If either or both inputs to the OR block
equal logic 1, the output equals logic 1. When both inputs equal logic 0, the output is logic 0.
The output of the OR block goes to the NOT block which reverses the signal (i.e., logic 0 input equals logic 1 output). The
NOT output signal goes to the reset input of the elapsed timer block (function code 86). A constant logic 1 signal goes to the
hold input. The elapsed timer block sets the alarm output to a logic 1 when the reset input drops to a logic 0 for the time
specified.
This configuration compares the present vital sign with the previous cycles vital sign. If there is no significant change (plus
or minus 0.5), the elapsed timer starts timing. When the specified time elapses, the alarm output goes to logic 1. Upon a
significant change, the configuration continues comparing vital signs.
2VAA000844R0001 J 143-3
Applications 143. Invoke C
143-4 2VAA000844R0001 J
144. C Allocation
144. C Allocation
The C allocation function code declares the amount of volatile and nonvolatile memory allocated for C programs in the
module. The declarations serve as a marker for module memory utilization calculations.
Specification S1 sets the amount of random access memory (RAM) in one-kilobyte increments. Specification S1 should be
greater than or equal to the total RAM allocated to C specification for memory format defined in the C utility program. Refer
to S+ Engineering for Harmony Primary Interface (2VAA000812*) for more information.
Specification S2 sets the amount of nonvolatile random access memory (NVRAM). This should be greater than or equal to
the total NVRAM allocated to C specification for memory format defined in the C utility program.
Outputs

(1 4 4 )
C AL LO C N N B Unused
Specifications
S1 N 0 I 0 - 320 RAM allocation in 1 kbyte increments
S2 N 0 I 0 - 80 NVRAM allocation in 1 kbyte increments
2VAA000844R0001 J 144-1
144. C Allocation
144-2 2VAA000844R0001 J
145. Frequency Counter/Slave

The frequency counter/slave function code interfaces the frequency counter slave to a multifunction controller or
multifunction processor. Output N provides the frequency in hertz multiplied by the gain (S5), as well as quality and alarms
relating to the current state of the block. This includes the rate alarms and the high and low rate alarms. The high and low
alarms display on operator devices as HD and LD respectively. These high and low alarms can be detected using the test
alarm function (function code 69). Quality is detected using the test quality function (function code 31). High rate of change
occurs when the frequency output N changes in a positive direction from the previous output in excess of S9. Low rate of
change occurs when the frequency output has changed in a negative direction from the previous output in excess of S9.
The configurable high and low alarm limits (S6 and S7) determine when the alarm outputs N+1 and N+2 are set. These
alarm outputs, N+1 and N+2, reflect the same state as the high and low alarms that can be tested on output N with a test
alarm function. To prevent alarm chatter, the alarm deadband (S8), expressed in engineering units, is provided for S6 and
S7. The last output N+3 reports the status of I/O module communications.
The IMFCS01 module typically measures rotational speed of a turbine utilizing a toothed wheel attached to the shaft and a
magnetic pickup.
Outputs
FCS
R F
S 10 N
Frequency (hertz)  gain (with alarms)
N /A H
L
N+1 N R
N+2
ST
N+3
N+1 B High alarm:
0 = good
1 = alarm
N+2 B Low alarm:

0 = good
1 = alarm
N+3 B I/O module communication:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Expander bus address of I/O module
S5 Y 1.000 R Full Engineering unit gain
S6 Y 9.2 E18 R Full Engineering unit high alarm
S7 Y -9.2 E18 R Full Engineering unit low alarm
S8 Y 0.000 R Full Absolute alarm deadband
S9 Y 9.2E18 R Full Engineering unit rate of change alarm.

NOTE:
2VAA000844R0001 J 145-1
145-2 2VAA000844R0001 J
146. Remote I/O Interface

NOTE: Depending on whether a RIO02 or RIO22 is in use, FC146 will provide an interface between the RIO and other devices dif-
ferently, unless all three can communicate with one FC146.
The Remote I/O Interface function code (FC146) defines the interface between:
• A BRC-100/200/300/400/410 controller, HAC controller, and a local RIO02 remote I/O module.
• RIO22 and a HC800 controller, or SPC700 controller configured for Hnet/HN800 communication.
Outputs
R I/O I
S1 (1 4 6 )
R I/O D SST
S5
S TA BST
S6 N+1
S TA CT
N+2
S7
S TA N B Primary RMP or RIO22 status:
S8 S TA
S9 S TA 0 = good
S10 S TA 1 = bad
S11 S TA
S12
S13
S TA
N+1 B Secondary RMP or RIO22 status:
S TA
S14 S TA 0 = good
S15
S16
S TA
1 = bad
S TA
S17 N /A
S18 N /A
N+2 R Cycle time of remote master processor (secs)
Specifications
S1 N 0 I Note 1 Block address of the first Remote I/O Definition

(FC147)
S2 N 0 I 0 - 63 Expander bus address of primary RMP, or

Hnet/HN800 address of primary RIO22
S3 N 0 I 0 - 63 Expander bus address of secondary RMP must be

any valid number not equal to S2 (Hnet/HN800
communication)
S4 N 0 I Full Remote block input allocation:

0 = IMRIO02 module being used (expander bus
communication)
>0 = total remote I/O blocks to allocate to
SPRIO22 or RIO22 controller (Hnet/HN800 com-
munication)
Refer to Calculating Specification S4 for more
information.
S5-S16 N 2 I Note 1 S5 - S16 are block addresses of control or indica-

tor stations (expander bus communication) or
spare parameters (Hnet/HN800 communication)

NOTE:
2VAA000844R0001 J 146-1
Expander Bus Communication for the BRC-100/200/300 or HAC (RIO02)

• FC146 defines the interface between a controller and a local remote I/O module. The local remote I/O module is the
remote master processor (RMP).
• FC146 defines the expander bus addresses for both the primary and secondary remote master processors.
Hnet/HN800 Communication for the BRC-300/400/410, HC800, or SPC700 (RIO22)
• FC146 defines the interface between a BRC-300/400/410 controller, HC800 controller, or SPC700 controller, and a
local/remote RIO22 module.
• FC146 defines the Hnet/HN800 address for the RIO22 module.
FC146 (Remote I/O Interface) and FC147 (Remote I/O Definition) can use Hnet/HN800 as a remote I/O link. The BRC-
300/400/410 controller is capable of running as both the RIO22 master and RIO22 slave. Minimal configuration alterations
are required to use the Hnet/HN800 functionality.
Existing IMRIO02 modules and RIO22 controllers can be used simultaneously in the same controller configuration. Porting
an RIO02 configuration to a RIO22 configuration can be easily done, due to the differences in configuration. With
Hnet/HN800 functionality, the RMP/RSP is effectively replaced by a single RIO22 on Hnet/HN800.
The RIO22 supports module redundancy and HNET/HN800 supports communication redundancy.
The RIO22 scans its I/O using the same function codes that would run on normal BRC controllers, but can be located
remotely.
The HC800 controller and SPC700 controller can use HN800 as a remote I/O link to a RIO22.
NOTE: In order to minimize the possibility of malfunctions, it is essential that the Remote IO Interface function block (FC146), the
Remote IO Definition function blocks (FC147), and all slave definition blocks for the remote slaves (FC79, FC83, FC84, FC132,
and so on) reside within the same segment. In addition, these blocks must be sequenced in the following order:
• FC146 must reside at a lower block number than all FC147s for that link.
• FC147s must reside at lower block addresses than the slave definition blocks and station blocks (FC80) for the
remote slaves.
Configuration is performed on the local BRC-300/400/410 controller, HC800 controller, or SPC700 controller. Similar to
IMRIO02 operation, the local BRC-300/400/410 controller, HC800 controller, or SPC700 controller downloads the
associated I/O function codes defined in FC146/FC147 into the RIO22. If the I/O device is defined with more than one
linked function code (that is, 14 AO channels require two FC149s), only the first FC needs to be referenced in
FC146/FC147 for all associated/linked function codes to be downloaded into the RIO22. The complete I/O slave
configuration executes on the RIO22.
There is an enhancement to online configuration. between the RIO02 and the RIO22. The RIO22 operation is affected only
when changes are made to the function codes it is using. The I/O on the RIO22 holds the last value during the configuration
download and then resumes updating with dynamic data as soon as the update is complete (same as IOR800). If the
configuration changes are not associated with the RIO22, then dynamic data updates continue unchanged. Multiple RIO22s
can be configured, and each FC146/147 configuration is managed independently. A configuration change on one RIO22
has no impact on another RIO22 configuration.
Block number order is enforced through FC146/FC147. The base block number of FC146 must be less than any I/O it is
linked to including FC147. The linked list of FC147 must be in ascending block number order (that is, S1 block number
146-2 2VAA000844R0001 J
146. Remote I/O Interface Explanation
reference must be greater than its own block number). I/O function codes must have block numbers greater than the FC147
they are linked to. Figure 146-1 shows an example of expander bus and Hnet communication configurations.
Figure 146-1 Example Configurations
146.1 Explanation
The following explanation adds detail to the specifications for the remote I/O interface block.
S1
Specification S1 is the block address of the first remote I/O definition (FC147). This specification links the Remote I/O
Definition block to the Remote I/O Interface block. This link defines the remote I/O module processors (or RIO22 controller)
and their associated I/O modules (or allocated remote I/O blocks). Specification S1 can be set to zero if there is no Remote
I/O Definition block (or allocated remote I/O blocks).
S2
Specification S2 is the expander bus address of the primary remote master processor. The local remote I/O module is the
remote master processor. Remote master processors can address up to eight control stations and four indicator stations.
Stations addressed by remote master processors are configured as inputs to this block. This specification can also be used
to define the Hnet/HN800 address of the primary/secondary RIO22 module.
2VAA000844R0001 J 146-3
Specifications 146. Remote I/O Interface
S3
Specification S3 is the expander bus address of the secondary remote master processor (expander bus communication) or
any valid number not equal to S2 (Hnet/HN800 communication).
NOTE: If redundancy is not implemented, the definition of the secondary expander bus address must be set equal to the primary
(S2).
When Hnet/HN800 communication is being used, the secondary RIO22 controller has the same address as the primary.
(Set this specification to any valid number that is not equal to the number in specification S2; otherwise, S2 would be equal
to S3 incorrectly signaling the module that redundancy is not implemented)
S4
Specification S4 is the remote block input allocation. It is set to zero when IMRIO02 modules (expander bus
communication) are supplying remote values, or set to the total number of remote I/O blocks to allocate to the remote
SPRIO22 module (Hnet communication) when it is supplying remote values.
When Hnet/HN800 communication is being used, the RIO22 is configured with the I/O function codes referenced in FC147
and executes them to update the I/O data. Only the base function code is defined in FC147 (S5-S36). When the I/O slave
definition uses multiple function codes, all associated function codes for a particular slave interface are downloaded. The
function codes downloaded to the RIO22 need their block input values in order to execute correctly. Each I/O function block
has a certain number of block inputs that must be updated. S4 allocates the necessary memory in both the local
BRC/HC800/SPC700 and remote RIO22 for the input blocks to be updated. Add up the number of inputs on all of the RIO22
function codes being referenced (excluding FC80/146/147) for a simple input total and enter the total into S4. A larger
number can be used if future changes are expected. If optimization of the S4 value is desired, three additional rules can be
used to subtract from the previous simple input total:
• Block number addresses that reference the base blocks (block #0 to #29) do not need allocation.
• Duplicated references only need one allocation.
• Linking references can be excluded.
Calculating Specification S4
The value used for Specification S4 is calculated based on the number of input block references defined by all linked I/O
function codes attached to the FC146/FC147 linked list. The S4 value must be non-zero when a RIO22 is being used for
remote I/O. Use the information in Table 146-1 to calculate the S4 value.
Table 146-1 Block Inputs to be Reserved
Function Code Block Inputs to be Reserved
55 9
79 6
83 8
84 0
102 0
103 0
104 2
109 0
114 0
115 1
128 0
132 1
145 2
149 7
146-4 2VAA000844R0001 J
146. Remote I/O Interface RMP/RSP Memory Usage Calculation (Expander Bus)
Table 146-1 Block Inputs to be Reserved
Function Code Block Inputs to be Reserved
215 1
247 24
Table 146-2 provides an example of how Specification S4 is calculated.
Table 146-2 Example S4 Calculation
Blocks to be
Function Code Quantity Used in Configuration
Allocated
55 3 3 x 9 = 27
83 3 3 x 8 = 24
84 3 3x0=0
149 1 1x7=7
Blocks to be reserved for future expansion (optional) 20
Total blocks reserved (value to be used in Specification S4) 78
S5 through S16
Specifications S5 through S16 are the block addresses of the control stations or indicator stations (expander bus
communication) or spare parameters (Hnet communication). Valid station addresses are 0 through 7. Valid indicator
addresses are 8 through 11.
S17 and S18

Specifications S17 and S18 are spare boolean inputs.
146.2 RMP/RSP Memory Usage Calculation (Expander Bus)
The number of slaves an RMP can support is determined by memory usage only. To calculate RMP memory requirements,
refer to RIO02 RMP/RSP Memory Usage Calculation (Expander Bus) in the function code 147 section of this manual.
2VAA000844R0001 J 146-5
Applications 146. Remote I/O Interface
146.3 Applications
Figure 146-2 shows the block diagram configuration detailing the relationship between a harmony controller and a remote
I/O module interface and the control station and indicator station. The associated module function codes required to define
this interface are also shown.
Figure 146-2 Remote I/O Interface Example (RIO02 Applications Only)
The remote I/O interface block defines the interface between the harmony controller and the remote I/O module. This
interface links the station functions in the module to their respective remote I/O modules. Refer to function code 147 for a
block diagram example showing the remote I/O block working in conjunction with the remote I/O definition block.
146-6 2VAA000844R0001 J
146. Remote I/O Interface Applications
Figure 146-3 illustrates a configuration using the remote I/O interface and the remote I/O definition blocks (function codes
146 and 147 respectively). The control interface slave (function code 79) references the I/O from a control interface slave
connected to the remote slave processor. This configuration has the control stations interfaced via the remote master
processor.
The configuration shown in Figure 146-3 is only valid for applications using IMRIO02 modules.
Figure 146-3 Remote I/O Interface Configuration
2VAA000844R0001 J 146-7
Applications 146. Remote I/O Interface
146-8 2VAA000844R0001 J
147. Remote I/O Definition
147. Remote I/O Definition

The Remote I/O Definition (or Remote Slave Processor) function code (FC147) defines:
Expander Bus Communication (RIO02)
• FC147 defines the communication address and environment of remotely located I/O modules. This module is the
remote slave processor (RSP). Each processor has a unique serial link communication address. This block defines
that address.
• FC147 defines the digital and analog I/O module types interfaced with the RIO22.
Hnet/HN800 Communication (SPRIO22)
• FC147 defines the digital and analog I/O module types to be remotely located.
• FC147 defines the block address of the next Remote I/O Definition allocated in the RIO22.
• FC147 defines the digital and analog I/O module types interfaced with the RIO22.
NOTE: In order to minimize the possibility of malfunctions, it is essential that the RMP function block (FC146), the RSP function
blocks (FC147), and all slave definition blocks for the remote slaves (FC79, FC83, FC84, FC132, and so on) reside within the
same segment. In addition, these blocks must be sequenced in the following order:
• FC146 must reside at a lower block number than all FC147s for that link.
• FC147s must reside at lower block addresses than the slave definition blocks and station blocks (FC80) for the
remote slaves.
Outputs
R I/O D
S1 (1 4 7 )
CS RST
S6
S7
N B Remote processor status:
S8
S9 0 = good
S10 1 = bad
S11
S12 NOTE: If running a redundant remote I/O configuration, block N indicates good
S13 (zero) when both remote processors function properly. Block N indicates bad
S14 (one) when one or both of the remote processors are offline.
S15
S16
S17 Specifications
S18
S19
S21
S22 S1 N 0 I Note 1 Block address of next remote I/O definition
S23
S24
S2 N 0 I 0 - 63 RIO22 remote processor serial link communication
S25
S26
address (RIO22, expander bus communication,
S27 FC146 S4 = 0)
S28
S29 RIO22 Spare parameter (RIO22, Hnet/HN800 com-
S30 munication, FC146 S4 > 0)
S31
S32 S3 N 0 I Full Spare parameter
S33
S34
S4 N 0 I Full Spare parameter
S35
S36
S5-S36 N 2 I Note 1 Block address of I/O block or station
NOTE:
2VAA000844R0001 J 147-1
Explanation 147. Remote I/O Definition
147.1 Explanation
The following explanation adds detail to the specifications of the Remote I/O Definition Block.
S1
Specification S1 is the block address of the next Remote I/O Definition. This should be set to zero if all the I/O for all remote
processors can be defined by one Remote I/O Definition.
S2
Specification S2 is the remote processor serial link communication address (if FC146 S4 = 0, expander bus
communication), otherwise it is a spare parameter (if FC146 S4 > 0, Hnet/HN800 communication).
S3 and S4
Specifications S3 and S4 are spare parameters.
S5 through S36
Specifications S5 through S36 are block addresses of the I/O blocks.
The Remote I/O Definition block defines the type of I/O module blocks in the remote processor interface (or RIO22).
Specifications S5 through S36 point to I/O related function blocks such as the Control Interface Slave (FC79), Digital Output
Group (FC83), Station (FC80), and the Digital Input Group (FC84). This link defines the type of I/O modules each remote
processor handles. If a DCS or SAC station is to be connected to a station link at the remote end (remote processor end),
then FC80 must be defined one for that station in S5 through S36.
FC147 can select up to 32 I/O blocks. Each remote processor can address up to 64 modules. Many remote I/O definition
blocks may be required for each remote processor.
The Analog/Input Slave (FC132), the Analog/Output Slave (FC149), and the Enhanced Analog Slave Definition (FC215)
use a linked list of blocks with the base block being the control block. Only the control block for a multi-block I/O module
definition should be defined in S5 through S36. When the control block is a remote I/O module, all associated linked list
blocks are remote blocks. This includes any Smart Transmitter Definition blocks (FC133) linked to an Analog/Input Slave
(FC132), any Enhanced Analog Input Definitions (FC216), or the Enhanced Calibration Command (FC217) linked to an
Enhanced Analog Slave Definition (FC215).
Function codes 102, 103, 104, and 109 each define only one input. The modules associated with these function codes have
up to eight inputs. Each input for the IMDSM04 module is defined by one of these function codes. All function codes
associated with the remote IMDSM04 module must be individually allocated a unique entry in S5 through S36.
Multiple blocks defining the same remote processor should be arranged consecutively in the linked list. This implementation
results in an efficient configuration. The Remote I/O Definition block supports the I/O related blocks shown in Tables 147-1
and 147-2.
Table 147-1 Function Blocks Supported by Remote I/O Definition Block (Expander Bus)
Function Function
Description Description
Code Code
20 Indicator station 104 Pulse input/totalization
79 Control interface slave 109 Pulse input/duration
80 Control station 114 BCD input
83 Digital output group 115 BCD output
84 Digital input group 132 Analog input/slave
102 Pulse input/period 149 Analog output/slave
103 Pulse input/frequency 215 Enhanced analog slave
147-2 2VAA000844R0001 J
147. Remote I/O Definition RIO02 RMP/RSP Memory Usage Calculation (Expander Bus)
Table 147-2 Function Blocks Supported by Remote I/O Definition Block (Hnet/HN800)
Function Function
Code Code
55 Hydraulic servo 109 Pulse input/duration
79 Control interface slave 114 BCD input
80 Control station 115 BCD output
83 Digital output group 132 Analog input/slave
84 Digital input group 145 Frequency

counter/slave
103 Pulse input/frequency 215 Enhanced analog slave
1041 Pulse input/totalization 247 Condition monitoring

NOTE:
1. FC104 Pulse Input/Totalization performs a reset operation when the RIO22
has an online configuration performed.
147.2 RIO02 RMP/RSP Memory Usage Calculation (Expander Bus)
The number of slaves an RIO22 can support is determined by memory usage only. To calculate RMP memory
requirements:
1. Use the values in Table 147-3 to sum the memory required by all the remote I/O slaves.
Table 147-3 RMP Shared Memory Usage
Memory Usage
Function Code Description
(Bytes)1
20 Indicator station (DIS) 48
79 Control interface slave (CIS) 29
80 Control station 38
83 Digital output group (DO)2 14
84 Digital input group (DI)3 10
102-104, 109 Pulse input4 11
114 Binary coded decimal (BCD) input5 10
115 Binary coded decimal (BCD) output6 14
132 Analog input/slave (ASI02/FBS) 125
147 Remote slave processor (RSP) 50
149 Analog output/slave (ASO) 65
2VAA000844R0001 J 147-3
Applications 147. Remote I/O Definition
Table 147-3 RMP Shared Memory Usage (Continued)
Memory Usage
(Bytes)1
215 Enhanced analog slave (ASI03) 174

NOTES:
1. Add the memory for each function code on the link regardless of the number of RSPs.
2. If two DO groups or an FC83/115 pair are used on a single digital output slave, no additional memory
is required (that is, one DSO slave = 14 bytes).
3. If two DI groups or an FC84/114 pair are used on a single digital input slave, no additional memory is
required (that is, one DSI slave =10 bytes).
4. The value listed is for one channel. Additional channels require additional memory (for example, 8
channels = 88 bytes).
5. If two BCD inputs or an FC84/114 pair are used on a single digital input slave, no additional memory is
required (that is, one DSI slave =10 bytes).
6. If two BCD outputs or an FC83/115 pair are used on a single digital output slave, no additional memory
is required (that is, one DSO slave = 14 bytes).
2. Subtract the sum from the total memory available in a RMP (5,552 bytes).
NOTE: The RSP has the same expander bus limitations as any master module (MFC/MFP).
147.3 Applications
Figure 147-1 shows a block diagram configuration using the Remote I/O Interface, Remote I/O Definition blocks (FC146
and FC147 respectively), and expander bus communication. Figure 147-2 shows a block diagram configuration using the
RIO22 module, Remote I/O Definition blocks (FC146 and C147 respectively), and Hnet/HN800 communication. Figure 147-
3 shows a block diagram configuration using the RIO22 module, Remote I/O Definition blocks (FC146 and C147
respectively), and HN800 communication.
Figure 147-1 Remote I/O Definition Example (Expander Bus)
147-4 2VAA000844R0001 J
147. Remote I/O Definition Applications
Figure 147-2 Remote I/O Definition Example (Hnet/HN800)
Figure 147-3 Remote I/O Definition Example (HN800)
Figure 147-1 uses the Remote I/O Definition block to support and design various I/O related blocks, and the interface
between the controller and remote I/O modules. The Remote I/O Interface block (FC146) defines the interface between the
Harmony controller and the remote I/O module. Refer to FC146 for Remote I/O Interface details.
2VAA000844R0001 J 147-5
Applications 147. Remote I/O Definition
Figure 147-2 is similar except that RIO22 modules are used instead. These examples are just two of many possible
configurations.
147-6 2VAA000844R0001 J
148. Batch Sequence
148. Batch Sequence

NOTE: Refer to S+ Engineering for Harmony Batch Data Manager (2VAA00872*) for more information.
The batch sequence (BSEQ) function code coordinates sequence activities for a batch process.
Outputs
BS EQ
S1 (1 4 8 )
R# R#
S2 N
S3
PH# PH#
N+1 Blk Type Description
RU N RU N
S4 N+2
AC K F LT
S5 ESP H
N+3 N R Current recipe ID Number
S6 N+4
DB BC
S7 N /A R
N+5 N+1 R Current phase number
N+6
FC
N+7
CS#
N+8
N+2 B Current status:
0 = hold
1 = run
N+3 B Fault logic active:

0 = no
1 = yes
N+4 B Hold logic active:

0 = no
1 = yes
N+5 B Batch complete:

0 = no
1 = yes
N+6 B Reset operator acknowledge:

0 = no
1 = yes
N+7 R Fault code
N+8 R Current statement number
Specifications
S1 N 5 I Note 1 Block address of recipe ID number
S2 N 5 I Note 1 Block address of phase number
S3 N 0 I Note 1 Block address of run/hold pushbutton
S4 N 0 I Note 1 Block address of operator acknowledge pushbutton
S5 N 0 I Note 1 Block address of E-STOP
S9 Y 0.000 R Full Batch program ID number
S10 Y 1 I Full Debug operation
S11 N 1 I Full RAM allocation for object file (1 kbyte increments)
S12 N 256 I Full RAM allocation for data (Pos = bytes, Neg = kbytes)
2VAA000844R0001 J 148-1
Explanation 148. Batch Sequence

NOTE:
148.1 Explanation
S1
Identifies the current recipe ID number for the BSEQ block. The recipe ID number is defined by the operator. A new recipe
cannot be loaded into the BSEQ block until the previous recipe is complete or the sequence is in hold.
NOTE: Alphanumeric Recipe IDs are supported by connecting S1 of the BSEQ block to the N+1 ST output of a DATA EXPT (FC
194) or DATA IMPT (FC 193) function block. The batch program must include the #ALPHA compiler directive in order to support
Alphanumeric Recipe IDs.
S2
Defines the start/restart phase number for the BSEQ block.
S3
Controls the status of the batch sequence. A zero to one transition causes the sequence to begin or resume running. A zero
input causes the sequence to hold unless external hold is disabled.
S4
Operator acknowledge input. It latches in the true state by a zero to one transition. It remains true until read by an ACK
statement.
S5
Block address of the E-STOP (executed stop).
S6 and S7
Spare boolean input.
S8
Spare parameter.
S9
Defines the ID number of the batch program that the BSEQ block will execute. The program ID number is determined by the
last two digits of the program name or the compiler directive #PROGRAMID.
S10
Defines a debug operation. Under normal program execution requirements, use the default value (one).
1= advance: break out of loop or wait condition.

2 = hold - activate the hold logic.
3 = abort - terminate the batch sequence.
1000 = transition to 1000 (from any other value) causes a debugger STOP command S to be
executed.
1001 = transition to 1001 (from any other value) causes a debugger GO command G to be executed.
9000 = value of 9000 causes a debugger STOP command S to be executed whenever the program is
started (complete to running) or restarted (holding to running).
148-2 2VAA000844R0001 J
148. Batch Sequence Outputs
S11
Controls the RAM allocation for the object file in one kilobyte increments. The program listing file name.LST shows the
minimum value for this specification in its last comment lines.
S12
Controls the RAM allocation for the dynamic data. This data consists of batch, local and stack data for the active step
subroutine. The program listing file name.LST shows the minimum value for this specification in its last comment lines. For
redundant configurations, the primary controller copies the entire dynamic data space to the backup. Therefore, to minimize
update time, the smallest amount of memory should be allocated.
NOTE: Do not use online configuration to change the value of specification S12 in redundant configuration. Online configuration of
S12 while a batch program is running forces the program state to Batch Complete.
148.1.2 Outputs
The block outputs show the status of the batch sequence (BSEQ) function block. These outputs can be linked to any other
block in the configuration to monitor the batch process. The output of block number N+7 is a fault code.
148.1.3 Run-Time Fault Code Explanation
The BSEQ function block executes a series of diagnostic tests that detect errors that cannot be detected by the compiler.
The fault codes can be seen by using the batch debugger or by viewing the BSEQ block output (N+7). The errors are
detectable only while the controller is in execution and are, therefore, called run-time errors. Table 148-1 lists the possible
error codes and an explanation of each.
Table 148-1 BSEQ Run-Time Fault Codes
Fault Codes Explanation
Any positive Assigned (any positive number) by the user in the batch language program
number and is used to indicate what type of fault has occurred. There is no limit to the
number of fault codes the user can assign.
-1.0 Hold The batch sequence is in hold, through either the BSEQ function block or a
command command in the batch language. Going to hold suspends normal logic and
starts execution of hold logic.
-3.0 Stack overflow Contact ABB technical support.
-4.0 Error reading No batch program exists in the NVRAM memory that matches the number
object file indicated in specification S9 of the BSEQ function block. Normally this means
that the batch object file has not been downloaded to the controller, or specifi-
cation S9 of the BSEQ function block references an undefined program num-
ber.
-5.0 Object file Batch program size exceeds the amount of controller volatile memory
exceeds memory specified by specification S11 of the BSEQ function block. Correct this
allocation problem by increasing specification S11.
-7.0 Phase data Amount of data used by a step/phase exceeds the amount of memory speci-
size exceeds fied by specification S12 of the BSEQ function block. To correct, increase the
memory allocation value of S12 in the BSEQ function block.
-8.0 Recipe refers Unit recipe contains a phase subroutine name that is not contained within the
to undefined batch program. This situation can happen when a batch program is edited so
phase subroutine that a phase subroutine is removed, but the corresponding recipes are not
changed. To correct, add the undefined phase subroutine or remove the
called (undefined) phase subroutine from the unit recipe.
-9.0 Batch Format the controller and reload necessary programs, recipes, and data files.
directory error
-10.0 Recipe error Execution of a unit recipe was attempted that does not exist within the
NVRAM memory of the controller. To correct, create or download a unit recipe
to the controller, or input a valid recipe ID. Then restart the sequence.
2VAA000844R0001 J 148-3
Run-Time Fault Code Explanation 148. Batch Sequence
Table 148-1 BSEQ Run-Time Fault Codes (Continued)
-12.0 Illegal Argument data type conflict between the unit recipe and the batch program.
parameter type To correct, recompile the batch program and the recipe. Then download both
the recompiled batch program and the unit recipe.
-13.0 ESTOP/ Emergency input to the BSEQ function block (specification S5) is ON. This
Aborting from drives the batch program unconditionally to operation 0 of the current unit rec-
block input ipe. To correct, find out why the emergency shutdown input is being set to ON
and correct it.
-15.0 Invalid Starting of a batch sequence was attempted at an operation number not
operation number defined within the unit recipe being run. Create a unit recipe with an operation
number that matches the one to be executed, or change the operation num-
ber.
-16.0 Bad function In the batch data declaration sections of the batch language, the program is
block reference trying to reference a function block that does not exist or one whose type does
not match the function code type in the declaration. The batch debugger will
provide the function block number within the batch data section that is making
the reference. To correct, change the function block number to a valid one,
erase the reference from the program, or correct the type to match the func-
tion block in the controller.
-17.0 Array error Array subscript is out of bounds. Normal logic is suspended and execution of
fault logic begins. Note that it is possible to inspect the value of the fault code
to detect when this fault has occurred.
-18.0 BCODE Batch program was compiled using firmware that does not match the firmware
revision mismatch in the controller. Recompile the batch program with the compiler that matches
the firmware within the controller.
-19.0 Recipe Execution of a recipe was attempted that contains more parallel phase sub-
requires too many routines than are allowed in the target program. To correct, edit and recompile
parallel phases the unit recipe to contain less parallel phase subroutines, or edit the #MAX-
PARALLEL statement.
-20.0 Invalid num- Unit recipe contains the wrong number of recipe parameters compared to the
ber of parameters target program. Normally, the recipe must be corrected. Otherwise, the pro-
in phase data gram must be corrected.
-21.0 Invalid online Execution of a new program was attempted that differs from the previous one
program change because of a change in the batch data area or the local declaration section of
the active phase subroutine. Such online changes are not permitted.
-22.0 Batch Batch and lot number in the BHIST function block are not unique to the batch
descriptor not historian. Change the batch and/or lot number and restart the program.
unique
-23.0 Wait for Batch historian is busy, and the program may not proceed until it is available.
batch historian No corrective action is required.
-24.0 Batch Batch historian is offline, and the program may not proceed until the batch his-
historian offline torian is online and the program is restarted.
-25.0 Bad block Unit recipe used contains a reference to an incorrect or nonexistent block.
reference in phase Correct the block number in the unit recipe.
data
-26.0 Bad data Data entry in the unit recipe does not match the program. This most
reference in recipe commonly happens when a unit recipe argument value was selected from a
selection list, and the program was changed to no longer include that
selection. Resolve any discrepancies and recompile the unit recipe with the
batch program.
148-4 2VAA000844R0001 J
148. Batch Sequence Run-Time Fault Code Explanation
Table 148-1 BSEQ Run-Time Fault Codes (Continued)
-27.0 Bad block Function block declaration in the unit data file does not match the controller
reference in Unit configuration. (Either the function block address or the function code type is in
Data error). Resolve any discrepancies and recompile the unit data file against the
batch program.
-28.0 Bad CSEQ CSEQ reference in the unit data file does not match the program. Resolve any
reference in Unit discrepancies and recompile the unit data file against the batch program.
Data
-29.0 Unit Data Unit data file does not match the batch program structurally (the number or
does not match the type of the declarations does not match). Resolve any discrepancies and
B90 program recompile the unit data file against the batch program.
-30.0 Error reading No unit data file exists in the NVRAM memory that matches the number indi-
UNIT.DEF file cated by specification S9 of the BSEQ function block. Normally, this means
that the unit data object file has not been downloaded to the controller.
-31 ID type Recipe ID type connected to the BSEQ function block is not the same as the
mismatch program file type selected by BSEQ specification S9. This error is caused by
the BSEQ input specification S1 connected to a DATAEXPT (FC144) and the
program referenced by specification S9 being Numeric, or specification S1
connected to a READ and the program referenced is #alpha.
-32 String String position specified in the program is negative or larger than the maxi-
subscript error mum size of the string. This error occurs during program execution and trans-
fers the program to fault logic.
-33 Restart error, Hold-to-run command was received but ignored. This is due to a historian
Historian queue queue-full condition with a good Historian status. This state is a continuation
full of the Hold Command state. (Refer to fault code -1). Even though the run
input may still be active, a new Hold-to-Run transition must be initiated to
attempt another restart. The program will not restart unless the queue-full
condition was rectified prior to the Hold-to-Run transition request, regardless
of the setting in FC220, specification 9. Note that if and when the historian is
marked bad, the queue is cleared.
2VAA000844R0001 J 148-5
Application 148. Batch Sequence
148.2 Application
Figure 148-1 is a batch sequence example. Specification S1 links the BSEQ block to the first remote manual set constant
(REMSET) block. This link gives the BSEQ block the recipe ID number. Specification S2 links the BSEQ block to the second
REMSET block. This link gives BSEQ block the phase number.
S5 BS EQ
(68 ) R E C IPE S1 (14 8)
S6 R E M SE T R# R#
3 30
310 S2
PH # PH#
S3 3 31
RU N RU N
S4 3 32
AC K F LT
S5 3 33
S5 ES P H
(68 ) PHASE S6 3 34
S6 R E M SE T DB BC
3 35
3 15 S7 N /A R
3 36
FC
3 37
CS#
3 38
S1 R CM (62 ) RU N /H O LD PB
S S1 = 310
S2 320 S2 = 315
P
S1 (33) S1 (3 5) S3 S3 = 320
NOT T D -D IG R
S4 = 0
30 0 305 S4
O S5 = 325
S5 I S6 = 0
1 S EC O N D PU LS E S6 S7 = 0
F
S7 S8 = 0.0
A
S9 = 1
S10 = 1
S11 = 10
S1
R CM (62 ) E -S TO P S12 = 256
S S13 = 0
S2 325
P S14 = 0
S3 R
S4
O
S5 I
S6 F
S7 A
S1 R CM (62 ) AC K N OW L E D G E
S
S2 326
P
S3
R
S4
O
S5
I
S6
F
S7
A
T01826A
Figure 148-1 Batch Sequence Example
The output of the first remote control memory (RCM) block is linked to S3 of the BSEQ block. This input value describes the
status of the run/hold pushbutton. The second RCM block output in linked to S5 and supplies the BSEQ block with the
status of the E-STOP pushbutton.
Output N(330) of the BSEQ block is the current recipe ID number. This output functions as a feedback signal for the first
REMSET block. The N+1 (331) output of the BSEQ block is the current phase number. This output functions as a feedback
signal for the second REMSET block. The N+2 (332) output identifies the run/hold status of the BSEQ block. If this output is
one, the BSEQ block is running. If the output is zero, the BSEQ block is in hold mode. Output N+6 (336) shows the status of
the operator acknowledge input.
148-6 2VAA000844R0001 J
149. Analog Output/Slave
149. Analog Output/Slave

The analog output function code writes seven analog outputs to an analog output module. Two blocks of this type may be
linked together to utilize all 14 channels on the analog output module (ASO11). When these function blocks are linked, only
the status output of the primary block will be functional.
The analog output function block has eight outputs. The first seven are the calculated output values in percent. The eighth
output is the status of the I/O module.
The control system must be carefully evaluated to establish default val-

ues that will prevent personal injury and/or property damage in case of
module failure.
WARNING
Outputs
S4
AS O

N
S5
N R First analog output in percent
N+1
S6 N+1 R Second analog output in percent
N+2
N+2 R Third analog output in percent
S7
N+3 R Fourth analog output in percent
N+3
S8 N+4 R Fifth analog output in percent
N+4 N+5 R Sixth analog output in percent

S9
N+6 R Seventh analog output in percent

N+5
S10 N+7 R I/O module status:
0 = good
N+6 1 = bad
ST
N+7
S2 Specifications
S1 N 0 I 0 - 63 I/O module address
S2 N 2 I Note 1 Block address of next analog output
S3 N 0 I 0 or 1 0 = trip control module on I/O module error

1 = continue to operate on I/O module error
S4 N 2 I Note 1 Block address of output N
S5 N 2 I Note 1 Block address of output N+1
S11 N 2 I 0-2 Default state of output N
S12 N 2 I 0-2 Default state of output N+1
2VAA000844R0001 J 149-1
Explanation 149. Analog Output/Slave
S18 Y 0.000 R Full Engineering unit zero for output N
S19 Y 0.000 R Full Engineering unit span for output N
S20 Y 0.000 R Full Engineering unit zero for output N+1
S21 Y 0.000 R Full Engineering unit span for output N+1

NOTE:
149.1 Explanation
S1
Address of the analog output module.
S2
Block address of the next analog output block. The first block in the list is the control module block. The second block is the
I/O module.
S3
Can be set to allow the module to continue to operate if there is an analog output module problem.

S4 through S10
Block addresses of the outputs N through N+6.
S11 through S17

Define the default state of outputs N through N+6.
0 = -6.25 percent
1 = 106.25 percent
2 = hold
149-2 2VAA000844R0001 J
149. Analog Output/Slave Applications
When power is supplied to the analog output module, the outputs are at zero percent. The default states defined by S11
through S17 are active after the multi-function controller completes initialization in execute mode. Initialization is complete
when the green LED on the I/O module is on. The outputs will now enter the configured default state when a loss of the bus
clock is detected. The outputs are held in their current state upon entry to configure mode.
S18 through S31

Define the low limit (EU zero) and range (EU span) of outputs N through N+6.
<Output> – EU Zero
Output percent = -----------------------------------------------------  100.0
EU Span
If the EU span of an output is set to zero, the output is considered unused.
149.2 Applications
Figure 149-1 shows two analog output blocks linked together to utilize all 14 channels on an analog output module.
S4 AS O S4 AS O
(1 49 ) (1 49 )
N N
S5 S5
N +1 N+1
S6 S6
N +2 N+2
S7 S7
A N A LO G N +3 A N ALO G N+3
O U TPU TS S8 O U TP U TS S8
1 T H RO U G H 7 8 TH R O U G H 1 4
N +4 N+4
S9 S9
N +5 N+5
S10 S 10
N +6 N+6
ST ST
N +7 N+7
S2 S2
T 0182 7 A
Figure 149-1 Linking Analog Output Blocks
2VAA000844R0001 J 149-3
Applications 149. Analog Output/Slave
149-4 2VAA000844R0001 J
150. Hydraulic Servo Slave
150. Hydraulic Servo Slave

This function code interfaces a hydraulic servo slave (HSS) to a Harmony controller.
The hydraulic servo slave provides the necessary inputs and outputs to position a hydraulic actuator.
The value of the linear variable differential transformer (LVDT) differential voltages determined during the I/O module
calibration cycle are stored permanently in S8 and S9 replacing the initial values or previous calibration values. On HSS
module or controller restart, the calibration data from S8 and S9 is downloaded from the module to the HSS module. If
necessary, new S8 and S9 values can be established via an interface device such as a HSI.
Outputs
S2
HSS
(1 5 0 )
% PD %P
S3 N
S4
MS NP
N+1 N R Percent actuator position with quality
HS APST
S5 N+2
NS A D DA S T
S6
SS PST
N+3 N+1 B LVDT at null point:
S7 CC SST
N+4
0 = no
N+5
S11 N /A 1 ST
N+6
1 = yes
2 ST
N+7
SM
N+8 N+2 B Actuator positioning status:
CST
SHST
N+9 0 = good
S C W TS T
N+10 1 = bad
N+11
N+3 B A/D or D/A status:

0 = good
1 = bad
N+4 B LVDT primary status:

0 = good
1 = bad
N+5 B LVDT secondary status:

0 = good
1 = bad
N+6 B Output 1 status:

0 = good
1 = bad
N+7 B Output 2 status:

0 = good
1 = bad
N+8 B I/O module mode:

0 = normal
1 = E-STOP manual
N+9 B Calibrate status:

0 = in progress
1 = complete
N+10 B I/O module hardware status:

0 = good
1 = bad
N+11 B I/O module communication and watchdog timer status:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Expander bus address of I/O module
S2 N 5 I Note 1 Block address of the percent position demand
2VAA000844R0001 J 150-1
Explanation 150. Hydraulic Servo Slave
S3 N 0 I Note 1 Block address of calibrate mode select:

1 = calibrate
S4 N 0 I Note 1 Block address of the calibration go/hold select:

0 = hold
1 = go
S5 N 0 I Note 1 Block address of the LVDT null check mode select:

0 = no
1 = yes
S6 N 6 I Note 1 Block address of the calibration stroke time selection:

1.0 = 30 secs
2.0 = 60 secs
3.0 = 35 min
4.0 = 70 min
S7 N 6 I Note 1 Block address of the calibration cycles count (1.0 to

8.0 cycles)
S8 Y -10.000 R Full LVDT differential voltage at 0% actuator position
S9 Y +10.000 R Full LVDT differential voltage at 100% actuator position
S11 N 0 I Note 1 Spare boolean block input

NOTE:
150.1 Explanation
The position of the actuator is measured using a linear variable differential transformer (LVDT). The HSS module provides
an adjustable AC frequency excitation signal for the LVDT and demodulates the two LVDT outputs. The difference between
the LVDT outputs is a measure of the actuator position. The actuator is positioned by a servo valve which moves hydraulic
fluid into and out of the actuator drive cylinder. The HSS module compares the actuator position, from the LVDT, to the
position demand from the module and modulates the current flow in the servo valve coils to move the actuator to the
desired position. The positioning function is performed by the analog controller on the HSS module. Other hydraulic servo
slave functions are performed by its on-board microprocessor. In the normal operating mode, the actuator is positioned to
match the position demand from the module.
For maximum LVDT linearity, the LVDT null point should occur at the actuators mid-travel position. To check and adjust the
LVDT null point, the calibrate and null check modes are selected. When the go mode is selected, the actuator ramps to and
holds at the LVDT null point (LVDT secondaries have equal voltages). While the actuator is held at the LVDT null point, the
mechanical zero on the LVDT can be adjusted until the actuator is at its mid-travel position. After LVDT zeroing, turn the null
check mode off, select hold and proceed with calibration.
In the calibrate mode, the actuator is held at its last position until the go mode is selected. When in the calibrate go mode,
the actuator moves to the 100 percent position at the selected stroke time <S6>. The HSS module drives the actuator to the
100 percent end of travel stop as verified by no further position movement and saturated servo valve coil current. The LVDT
differential voltage is recorded in (S9) while the actuator is held against the 100 percent end of travel stop.
After recording the 100 percent reading, the actuator moves at the selected stroke time to the zero percent actuator
position. The HSS module drives the actuator to the zero percent end of travel stop as verified by no further position
movement and saturated servo valve coil current. The LVDT differential voltage is recorded in S8 while the actuator is held
against the zero percent end of travel stop. After recording the zero percent reading, the actuator moves at the selected
stroke time to the position demand from the module. If the number of calibration cycles (S7) to be performed is greater than
one, the 100 percent to zero percent cycle will be repeated the specified number of times before ramping to the position
demand <S2>.
The HSS module provides a number of status outputs. The actuator positioning status will be bad if the measured actuator
position deviates beyond an established deadband from the position set point established in the HSS module. For steam
turbine valve control applications, this bad status is called a valve contingency. The A/D or D/A status is bad when the A/D
reading of the voltage reference is outside specifications or the D/A output as read by the A/D is outside specifications.
150-2 2VAA000844R0001 J
150. Hydraulic Servo Slave Explanation
The LVDT primary status is bad if both LVDT secondaries read approximately zero volts. LVDT secondary status is bad if
one secondary reads approximately zero volts, while the other is reading a nonzero value.
NOTE: These alarms are enabled only when the actuator position status is bad. For more information, refer to the IMHSS03
Hydraulic Servo product instruction.
The output one or two status is bad if its servo valve coil voltage indicates the coil is open or shorted. The HSS module can
continue to control the actuator even if one coil is open or shorted.
The current output to the servo valve coils is set to zero if A/D or D/A status is bad, or the I/O module hardware watchdog
timer times out. The output is also set to zero until the HSS module restart is complete. The servo valve will hold the
actuator approximately in place if the coil current is zero. The servo valve will drift based on its mechanical biasing when the
coil is zero.
If the watchdog timer (time-out condition) determines that communication with the module is lost, the HSS module reverts to
and indicates E-STOP (executed stop) manual mode. In E-STOP mode, the actuator position can be changed by activating
the module's raise and lower contact inputs. When communications are re-established with the module, the HSS module
will not transfer to position control from the module until the module's position demand equals the present actuator position.
This is to prevent an undesired actuator position change.
The HSS module is typically used in the positioning of steam turbine, throttle and control valves, gas turbine fuel valves,
inlet guide vanes and nozzle angle.
2VAA000844R0001 J 150-3
Explanation 150. Hydraulic Servo Slave
150-4 2VAA000844R0001 J
151. Text Selector
151. Text Selector

Function code 151 sends message numbers and color (selected by logic) to a human system interface (HSI). The message
numbers correspond to text strings configured in the HSI message list. Message number and color reporting occur using
Symphony exception reporting techniques.
The text selector can operate in one of two modes. The first mode uses the message number input, color input and blink
input to select the message number and attributes. The second mode uses the value of a control status input to select one
of three predefined message numbers and attributes. Control status reflects the current operating state of a device as good
(0.0), bad (1.0) or waiting (2.0). The text selector block references a control status output contained in function codes 123,
125, 129 and 136. This reference automatically selects the second mode of operation. A set of specifications that define the
message number, color and blink are associated with each state of the device control status. The message number, color
and blink are then set according to the current status of the device. Table 151-1 lists the HSI color codes for a Conductor
VMS HSI.
NOTE: In the HSI tag database, the text selector tag number must be defined as type real.
Outputs
TEXT
S1 (1 5 1 )
MN
S2 N
CS
S3
BS
S4 CST
N R Message number
Specifications
S1 N 5 I Note 1 Block address of message number
S2 N 5 I Note 1 Block address of color select
S3 N 0 I Note 1 Block address of blink select:

0 = solid
1 = blink
S4 N 2 I Note 1 Block address of control status:

0.0 = good
1.0 = bad
2.0 = wait
S5 N 0.000 R 0 - 65535.000 Good control status message
S6 N 0.000 R 0 - 127.000 Good control status color
S7 N 0 I 0 or 1 Good control status blink
S8 N 0.000 R 0 - 65535.000 Bad control status message
S9 N 1.000 R 0 - 127.000 Bad control status color
S10 N 1 I 0 or 1 Bad control status blink
S11 N 0.000 R 0 - 65535.000 Wait control status message
S12 N 3.000 R 0 - 127.000 Wait control status color
S13 N 0 I 0 or 1 Wait control status blink
S14 N 0 I Full Spare integer parameter
S15 N 0.000 R Full Spare real parameter

NOTE:
2VAA000844R0001 J 151-1
Specifications 151. Text Selector
Table 151-1 HSI Color Codes
Code Color Code Color Code Color Code Color
0.0 Black 4.0 Blue 8.0 Orange 12.0 Blue-Magenta
1.0 White 5.0 Cyan 9.0 Yellow-Green 13.0 Magenta-Red
2.0 Red 6.0 Magenta 10.0 Green-Cyan 14.0 Dark Gray
3.0 Green 7.0 Yellow 11.0 Cyan-Blue 15.0 Light Gray

NOTE: The HSI may have color display limitations. Refer to the HSI instruction for possible display
colors.
S4
Determines the control status. If good, message (S5), color (S6) and blink (S7) are reported. If bad, message (S8), color
(S9) and blink (S10) are reported. If wait, message (S11), color (S12) and blink (S13) are reported. If the control status input
(S4) is not defined, S5 through S13 are ignored and S1 through S3 specify the message number, color and blink to be
reported.
NOTE: When implementing function code 151 for Batch 90 use, S1, S2 and S3 must remain at default values. All other specifica-
tions are ignored.
151-2 2VAA000844R0001 J
152. Model Parameter Estimator
152. Model Parameter Estimator
The model parameter estimator function block uses a recursive least-squares algorithm to identify a mathematical model of
a process. This function block calculates the parameters for a linear, first-order dynamic model with deadtime of the specific
form.
Y t = – aY t – 1 + bu t – k + c
where:
Yt = Value of the process variable at time t.
PAR E ST
S1
CPV A
(1 5 2 ) Yt-1 = Value of the process variable at one sample time before time t.
S2 N
S3
CO B
N+1 ut-k = Value of the control output one process deadtime (expressed
R C
S8
N /A R
N+2 as k sample time increments) before t.
N+3
ST
N+4 a, b, c = Model parameters.
Outputs
N R Model parameter a
N+1 R Model parameter b
N+2 R Model parameter c
N+3 R Residual between actual and calculated process variable

data
N+4 B Quality of model parameter estimates:

0 = parameter estimator locked on
1 = new parameter estimation in progress
Specifications
S1 N 5 I Note 1 Block address of controlled process variable
S2 N 5 I Note 1 Block address of control output
S3 N 0 I Note 1 Block address of reset trigger (resets on a 0 to 1 transition)
S42 Y3 0.250 R 0.25 - 9.20 E18 Sample time (secs)
S52,4 Y3 1.000 R 0.25 - 9.20 E18 Process deadtime (secs);

seconds must be < S4 40
S6 Y3 0.000 R 0.00 - 9.20 E18 Expected noise level in process variable (p-p)

NOTES:
2. The relationship between S4 and S5 must be valid for proper operation. If adding this block with an
inferential smith controller (ISC) (function code 160) the sample time S4 must be greater than the ISC
deadtime (function code 160, S8) divided by 40.
3. The initialization routine in the ISC parameter converter (function code 153) automatically specifies S4,
S5 and S6.
4. Specification S5 is used only when the model parameter estimator is not used with the ISC parameter
converter (function code 153).
2VAA000844R0001 J 152-1
Explanation 152. Model Parameter Estimator
152.1 Explanation
The model parameter estimator continuously monitors the value of the controlled process variable and the control output.
The value of the model parameters are calculated whenever the process behavior deviates significantly from the
established parameters. The model parameter estimator outputs the value of the calculated process model parameters, the
statistical residual between the actual data and the calculated model, and the status of the parameter estimator.
The model parameter estimator contains a set of heuristic rules to eliminate the practical difficulties of estimation theory.
These rules prevent long-term drift of the model parameter estimates during consistent process performance, and
inappropriate reaction of the model parameter estimator to external process disturbances.
S1
Block address of the process variable. This identifies the controlled process variable used by the model parameter
estimator.
S2
Block address of the control output. This identifies the controller output used by the model parameter estimator.
S3
Block address of the reset trigger. When this trigger changes from zero to one, the model parameter estimator is initialized.
The reset trigger also updates the ISC parameter converter (function code 153) to the default settings (process gain and
process lag) stored in NVRAM of the inferential smith controller (function code 160). These settings can be updated
manually by tuning the corresponding ISC specifications.
NOTE: The estimator does not stop when the loop is in manual or the process is shut down. Reset trigger must be used on startup
of process.
S4
Sample time. This provides time scaling for the estimation algorithm. To assure proper operation of the model parameter
estimator, the sample time should be selected so that it is between 20 percent and 50 percent of the process lag time.
Because of the strong dependency of the calculated model coefficients on the selected sample time, when the sample time
is changed more than ten percent or in excess of 0.5 seconds, the model coefficients are automatically initialized.
S5
Process deadtime. This defines the deadtime or transport delay exhibited by the process. Underestimation of deadtime
adversely affects parameter estimation more severely than overestimation. When the model parameter estimator is linked
with an ISC parameter converter (function code 153), the process deadtime is automatically updated by the ISC parameter
converter.
S6
Expected process noise level. The model parameter estimator uses S6 in its identification of process upsets. This value
indicates the maximum deviation from set point that can be attributed to noise in the process. The model parameter
estimator treats deviations greater than this value as process upsets.
152.3 Applications
The specialized function blocks required for self-tuning of the inferential smith controller (function code 160) are the model
parameter estimator (function code 152) and the ISC parameter converter (function code 153). The use of an adaptive
parameter scheduler (function code 154) is optional.
The model parameter estimator configuration is shown in the applications section of function codes 153 and 154. The ISC
parameter converter (function code 153) application is a self-tuning configuration. The adaptive parameter scheduler
(function code 154) application is advanced self-tuning configuration with deadtime scheduling and adaptive gain and lag
scheduling.
For more application information on self-tuning control, refer to the Self Tuning Control application guide.
152-2 2VAA000844R0001 J
153. Inferential Smith Controller (ISC) Parameter Converter
153. Inferential Smith Controller (ISC) Parameter Converter

The ISC parameter converter function block calculates optimal tuning parameters for the associated inferential smith
controller (ISC controller, function code 160) using the output of the model parameter estimator (function code 152). The
tuning values are the process gain, process deadtime and process lag time. The outputs describe process dynamics at one
operating point.
Through a direct link with the ISC controller, the tuning parameters may be directly adapted. However, they will only be
adapted when:
IS C C O N
S1 (153)
E G
S2 N
IS C TC
S3 N+1
PDT PDT
S4 N+2
H DP
S 13 N+3
N /A IO
N+4
IC F
N+5
• The appropriate adapt option is selected in S9.
and
• The quality output of the associated model parameter estimator is good (zero).
The ISC parameter converter also supervises an automated initialization routine for establishing initial estimates for the
associated ISC and model parameter estimator. After completion of initialization, the converter tunes:
• The ISC, gain and lag time.
• The ISC tuning time constant.
• The minimum and maximum process gain (S5 and S6).
• The minimum and maximum process lag time (S7 and S8).
• The sample time and expected noise level for the model parameter estimator.
The ISC parameter converter also updates the estimated process deadtime for the associated ISC controller and model
parameter estimator whenever input S3 is connected to a function block other than number five, and the initialization trigger
equals zero. The initialization value of deadtime will be used as long as the initialization trigger equals one. If S3 is set to
five then, the ISC parameter converter updates the model parameter estimator with the value used by the ISC controller.
Outputs
N R Estimated process gain
N+1 R Estimated process time constant
N+2 R Adjusted process deadtime
N+3 R Estimated process operating point
N+4 R Initialization output:

0 = initialization complete, not in progress (normal)
1 = initialization failed or aborted
2 = initialization in progress
N+5 B Pulse output from 0 to 1 and after 5 cycles, back to 0, initi-

ated after completion of the automated initialization routine.
Specifications
S1 N 5 I Note 1 Block address of associated model parameter

estimator
S2 N 5 I Note 1 Block address of associated ISC controller
2VAA000844R0001 J 153-1
Explanation 153. Inferential Smith Controller (ISC) Parameter Converter
S3 N 5 I Note 1 Block address for deadtime
S4 N 0 I Note 1 Block address of hold signal
S5 Y2 -9.2 E18 R Full Minimum allowable value for process gain
S6 Y2 9.2 E18 R Full Maximum allowable value for process gain
S7 Y2 0.000 R 0.0 - 9.2 E18 Minimum allowable value for process lag time
S8 Y2 9.2 E18 R 0.0 - 9.2 E18 Maximum allowable value for process lag time
S9 N 0 I 0-3 Adapt option:

0 = no adapt
1 = adapt process gain only
2 = adapt lag time only
3 = adapt both process gain and lag time
S10 Y 0 B 0 or 1 Initialization trigger (on 0 to 1 transition)
S11 Y 5.000 R Full Maximum control output change for initialization

NOTES:
2 Value automatically specified by the initialization routine.
153.1 Explanation
The ISC parameter converter function block calculates optimal tuning parameters for the associated inferential smith
controller using the outputs of the model parameter estimator. Direct links between the function blocks simplify
implementation.
The model parameter estimator generates the value for the process gain and process lag time. The outputs describe
process dynamics at one operating point. This information directly converts to optimal tuning parameters for the inferential
smith controller at this operating point using simple algebraic equations.
The tuning parameters for the ISC controller (process gain and lag time) are automatically adjusted by the ISC parameter
converter as the model parameter estimator changes its estimates. However, the controller tuning time constant (S10) for
the ISC controller is not automatically adjusted; this tuning time constant provides a mechanism for establishing the desired
controller performance.
The ISC parameter converter also supervises an automated initialization routine for the self-tuning inferential smith
controller. When the control station is set to automatic mode after the initialization trigger is changed from zero to one, the
ISC parameter converter exercises the control output by a series of two step changes (in opposite directions) of a size
previously established (typically ±5 percent), and monitors the reaction of the controlled process variable to estimate the
process deadtime, gain and lag time. The automated initialization routine is immediately aborted if the control station for the
ISC controller is set to manual mode.
After enough data has been collected to establish statistically valid estimates, the initialization routine is automatically
terminated and the control station for the ISC controller is set automatically to manual mode.
The process deadtime estimated from the initialization routine is used by the model parameter estimator to determine on-
line values of the process gain and lag time whenever S3 specifies block address five. If the process deadtime is externally
calculated as a function of some process variable, then this value is connected to S3 and is used by the model parameter
estimator and ISC controller.
The estimated values of process deadtime, gain and lag time from the initialization routine are used by the ISC parameter
converter to automatically establish the initial values of a number of other specifications:
• Minimum process gain (S5) is set to 50 percent of the initial process gain observed during the initialization routine.
• Maximum process gain (S6) is set to 200 percent of the initial process gain observed during the initialization
routine.
153-2 2VAA000844R0001 J
153. Inferential Smith Controller (ISC) Parameter Converter Explanation
• Minimum process lag time (S7) is set to 50 percent of the initial process lag time observed during the initialization
routine.
• Maximum process lag time (S8) is set to 200 percent of the initial process lag time observed during the initialization
routine.
• Controller time constant for the inferential smith controller (function code 160, S10) is set to 100 percent of the
initial process lag time observed during the initialization routine.
• Sample time for the model parameter estimator (function code 152, S4) is set to 20 percent of the process lag time
observed during the initialization routine.
• Expected noise level for the model parameter estimator (function code 152, S6) is set based on the peak to peak
value of the noise on the controlled process variable observed during the initialization routine for constant valve
position.
The initialized specifications can be manually changed after the initialization routine is complete. However, they should be
valid for most applications.
Upon completion or failure of the automated initialization routine, the ISC parameter converter automatically returns the
control station for the ISC controller to manual mode, and sets the value of the appropriate controller specifications. At this
point, the initial settings can be monitored and validated before they are actually used by the controller. The initialization
trigger must be manually set to zero for normal operation.
Specifications
S1
(Block address of associated model parameter estimator) Establishes the link between the ISC parameter converter
and the associated model parameter estimator. The ISC parameter converter obtains the estimated value of the process
model parameters and the status of the estimates through this link. The process deadtime for the model parameter
estimator is updated through this link.
S2
(Block address of associated inferential smith controller) Links the ISC parameter converter with the associated ISC
controller. Updating of the ISC controller tuning parameters and the process deadtime occur through this link.
S3
(Block address for process deadtime) Locates the value of the deadtime the ISC controller and model parameter
estimator use. If the deadtime is not predicted as a function of a process variable, use the default address to permit the
process deadtime setting of the ISC controller to be used by the ISC parameter converter.
S4
(Block address of hold signal) Identifies a hold switch for the ISC parameter converter. If the value of this switch is set to
one, parameter conversion continues but the tuning parameters of the ISC controller are not automatically updated. New
values for the calculated tuning parameters are available at the block outputs whenever the status of the model parameter
estimator indicates parameter estimator locked on. When the estimator status indicates new parameter estimation in
progress, the tuned ISC parameter will be displayed and the operator can manually tune the ISC controller. If the value of
the switch is set to zero, the ISC parameter converter automatically tunes the parameter of the ISC specified by the adapt
option. The operator can manually tune the ISC controller when the status from the model parameter estimator indicates
new parameter estimation in progress.
S5 through S8
(Minimum and maximum tuning parameters) Required for commissioning of the self-tuning ISC controller and to
increase the fault tolerance of ISC controller operation. Minimum and maximum values are preset by the automated
initialization routine, but can be adjusted to match the process. In the event that the ISC parameter converter generates
values for the tuning parameters outside of the previously specified constraints, the tuning parameters for the controller are
limited to the constrained values.
S9
(Adapt option) Permits selection of self-tuning for either or both controller tuning parameters. If using the adaptive
parameter scheduler (function code 154), the scheduled parameters should not be selected for self-tuning with this
specification.
S10
(Initialization trigger) Provides the trigger for the automated initialization routine. When the trigger changes from zero to
one and the ISC controller is in manual mode, the initialization routine is activated. As a safeguard, the station associated
with the ISC controller must then be placed in automatic mode for initialization to proceed. The routine is automatically
terminated when adequate data has been generated for process identification. As long as the initialization trigger equals
2VAA000844R0001 J 153-3
Applications 153. Inferential Smith Controller (ISC) Parameter Converter
one, the process deadtime will be that estimated by the initialization routine. This value can be changed manually by tuning
the ISC controller. The model parameter estimator is automatically updated to this value. When the initialization trigger is
set equal to zero, <S3> (block address for process deadtime) is utilized for process deadtime if S3 does not equal five.
S11
(Maximum control output change for initialization) Establishes the maximum change from the manually set valve
position to be permitted during the automated initialization routine. Either a positive or negative step change can be
specified.
153.2 Applications
The specialized function blocks required for self-tuning of the inferential smith controller are the model parameter estimator
(function code 152), ISC parameter converter (function code 153) and the smith predictor (function code 160).
Figure 153-1 shows a basic self-tuning configuration. For more application information on self-tuning control, reference the
Self Tuning Control application guide.
M /A
M F C /P
S1 (8 0 )
PV SP
S2 22 O F F -G AS VALV E
SP O
S3 21
A A
S4 23
TR C /R
S5 25
TS C
S 18 24
MI C -F
S 19 26
AX
S 20
C/R
S 21
LX
S 22
CX
S 24
HA A
SM IT H S 25
LAA
S2 (1 6 0 ) S 26
SP HDA
S1 20 S 27
O U TL ET PV LDA
TE M PE R AT U R E S5 S 28
C AO
S3 S 29 TR S 2
TR
S4 S 30 TR P V
T
TS
PAR A M ET E R PARA M E T E R
EST IM ATO R C O N VE RT ER
E ST IM ATO R PAR E ST IS C C O N
RE SE T T R IG G E R S1 (1 5 2) S1 (1 53 )
CP V A E G
S2 41 S2 33
CO B ISC TC
(50 ) S3 42 S3 34
O N /O FF R C PDT PDT
40 S8 43 S4 35
N/A R H DP
44 S13 36
ST N /A IO
45 37
IC F
C O NVE RT ER 38
H O LD S W IT C H
(50 )
O N /O FF 30
T 01 828 A
Figure 153-1 Basic Self-Tuning Configuration
153-4 2VAA000844R0001 J
154. Adaptive Parameter Scheduler Explanation
154. Adaptive Parameter Scheduler

The adaptive parameter scheduler function allows process characteristics such as a measured or calculated index variable
to be used to adjust the tuning parameters for the associated inferential smith controller (ISC function code 160). This
feature optimizes controller performance for predictable changes in process operation and prevents periods of potentially
unacceptable control while the ISC controller is being returned by the model parameter estimator (function code 152) via
the ISC parameter converter (function code 153).
The adaptive parameter scheduler can automatically establish the relationship between an ISC tuning parameter and a
measured or calculated index variable using linear regression. The adaptive parameter scheduler uses this relationship to
automatically adjust the specified ISC tuning parameter based on the value of the specified index variable.
Alternatively, this function can automatically determine the correction bias required for a pre-established gain schedule. This
permits a nonlinear relationship between the ISC tuning parameter and the index variable, with automatic correction of the
relationship for design inaccuracies and changes in process behavior.
Outputs
PAR S C H
S1 IV STP
S2 N
FGS CA
S3 SP CB
N+1 N R Scheduled tuning parameter
S4 N+2
R
S5 SA N+1 R Coefficient A of correction equation
S10 H
N+2 R Coefficient B of correction equation
Specifications
S1 N 5 I Note 1 Block address of index variable
S2 N 5 I Note 1 Block address of fixed gain schedule
S3 N 5 I Note 1 Block address of scheduled parameter
S4 N 0 I Note 1 Block address of reset trigger
S5 N 5 I Note 1 Address block containing specification to be adapted
S6 N 0 I 0 - 255 Specification to be adapted
S7 N 0.000 R Full Minimum index value
S8 N 0.000 R Full Maximum index value
S10 N 0 I Note 1 Block address of coefficient update hold:

0 = update A and B
1 = hold updates of A and B
NOTE:
154.1 Explanation
When a process controlled by an inferential smith controller (function code 160) shifts from one operating point to another,
the inferential smith controller (ISC) is automatically returned to maintain the desired controller performance at the new
operating point. However, during self-tuning, the ISC controller performance can be temporarily less than desirable. In
applications where the specific value of an ISC tuning parameter (process gain or lag time) is related to some process
variable or discrete event (an index variable), these periods of suboptimum controller performance during self-tuning can be
eliminated by adaptive scheduling of the tuning parameter.
The adaptive parameter scheduler utilizes a least-squares technique to automatically correlate a preselected index variable
with one controller tuning parameter output by the ISC parameter converter. Once an effective linear correlation has been
established, the adaptive parameter scheduler adjusts the tuning parameter for the ISC controller as a function of this index
2VAA000844R0001 J 154-1
Specifications 154. Adaptive Parameter Scheduler
variable. If more than one tuning parameter must be scheduled, more than one adaptive parameter scheduler must be
used.
The adaptive parameter scheduler utilizes a bin data structure for regression of the linear relationship between the index
variable and the correction bias. The range of the index value is divided into ten bins, and when a valid data set becomes
available, it goes into the bin corresponding to the value of the index variable for the data set. Only one data point is stored
in each bin. As new data becomes available for a bin, the old data is replaced and the regression is recalculated. To
facilitate commissioning of the adaptive parameter scheduler when there is only one data set, a line passing through the
data point with zero slope is assumed.
Scheduled tuning parameter =

Output from fixed gain schedule <S2> + correction bias
Correction bias = Ax + B
where:
x = Value of the index variable <S1>.
A and B coefficients are updated by the regression algorithm.
S1
(Block address of index variable) Identifies the index variable used by the adaptive parameter scheduler.
S2
(Block address of fixed gain schedule) Identifies the output of the associated fixed gain schedule. If not using a pre-
established gain schedule, this specification should be set to block address five (default value), which provides a constant
value of zero.
S3
(Block address of scheduled parameter) Identifies the estimated value of the scheduled tuning parameter. This value
determines the relationship between the tuning parameter and index variable. The instantaneous correction bias (S2-S3) is
used with the index variable (S1) as a data point set for regression determination of A and B.
S4
(Block address of reset trigger) Identifies an external trigger used to reset the regression data. When the trigger changes
from zero to one, all historic data used for determining the correlation equation is erased and the correction bias is set to
zero.
S5
(Address of block containing parameter to be adapted) Identifies the block address for the parameter adjusted by the
adaptive parameter scheduler.
S6
(Specification to be adapted) Identifies which specification of the identified block is adjusted by the adaptive parameter
scheduler.
S7 and S8
(Minimum and maximum values for the index variable) Define the allowable range for the index variable.
S10
(Block address of coefficient update flag) Allows suspension of the recalculation of the A and B coefficients. The
correction bias will still be computed and the output updated. Also, the parameter in the target block and specification
continue to update.
154.2 Applications
The specialized function blocks required for self-tuning of the inferential smith controller are the model parameter estimator
(function code 152), ISC parameter converter (function code 153), and the smith predictor (function code 160). The use of
the adaptive parameter scheduler (function code 154) is optional.
154-2 2VAA000844R0001 J
154. Adaptive Parameter Scheduler Applications
Figure 154-1 shows an advanced self-tuning configuration with deadtime scheduling and adaptive gain/lag scheduling. For
more application information on self-tuning control, reference the Self Tuning Control application guide.
M /A
M FC /P
S1 (8 0)
PV SP
S2 25 O F F -G A S V A LV E
SP O
S3 24
A A
S4 26
TR C /R
S5 28
TS C
S 18 27
MI C -F
S 19 29
AX
S 20
C /R
S 21
LX
S 22 CX
S 24 HAA
S M IT H S 25
LA A
S2 (1 60) S 26
SP H DA
O U T L ET S1 20 S 27
PV LD A
T E M P E R AT U R E S5 S 28 AO
C
S3 S 29 TRS 2
TR
S4 S 30 TRP V T
TS
R E S E T T R IG G E R ,
PA R A M E TE R PA R A M E T E R PA R A M E T E R PAR S C H
E S T IM AT O R C O N V E R TE R S1 (1 54 )
E S T IM AT OR IV ST P
A N D PA R A M E T E R S2 31
PAR E S T IS C C O N FGS CA
S C H E D U LE R S1 (152 ) S1 (1 53 ) S3 32
CPV A E G SP CB
S2 70 S2 63 S4 33
CO B IS C TC R
(5 0) S3 71 S3 64 F LO W V S G A IN S5
O N /O FF R C PDT PDT SA
50 S8 72 S4 65 S 10
N /A R H DP H
73 S 13 66 S1 (1 )
ST N /A IO F(X)
74 67 30 S6 = 7
IC F
68
SYSTEM
D E A D T IM E
C A PA C IT Y
C A L C U LATIO N
(2 ) S1 PAR S C H
A (1 7) S1 (1 54 )
40 S2 IV ST P
42 S2 52
FG S CA
S3 53
SP CB
PA R A M E T E R C O N V E R T E R F LO W V S S4 54
R
H O LD S W IT C H L A G T IM E S5
SA
S 10
H
(5 0) S1 (1 )
O N /O FF 60
F(X)
51 S6 = 9
P R O D U C T F L OW R AT E
T O 182 9A
Figure 154-1 Adaptive Parameter Scheduler Example
2VAA000844R0001 J 154-3
Applications 154. Adaptive Parameter Scheduler
154-4 2VAA000844R0001 J
155. Regression
155. Regression
The regression block correlates up to four independent variables to a single dependent variable. Data can be collected on a
time or trigger basis, and buffered either sequentially or in bins. The size of the data buffer is configurable.
A goodness of fit is specified. This output disables the updating of parameter estimates when a mismatch between the
collected data and the estimated curve is beyond the specified goodness of fit.
A reset input provides the ability to suspend the start data collection when flagged.
Calculation and edit are the two operating modes. In both modes, the first four outputs are dedicated to the computed
coefficients. The remaining outputs are dependent on the mode. The calculation mode outputs information about the current
calculation. The edit mode identifies the inputs to the calculation and allows the operator to change the quality of a row of
data in the regression matrix.
Outputs
R EG R E S
S2 (1 5 5 ) Description
S3
P1
N Blk Type
S4
P2
N+1 Calculate Mode Edit Mode
P3
S5 N+2
P4
S1 N+3
I
N R Parameter 1 Parameter 1
S11 N+4
D1
N+5
S15
D2
N+6
N+1 R Parameter 2 Parameter 2
S16
D3
S17 N+7
S18
D4
N+8 N+2 R Parameter 3 Parameter 3
Q
N+9
N+3 R Parameter 4 Parameter 4
N+4 R Goodness of fit Dependent variable, (y)
N+5 R Maximum model mismatch First independent variable, x1
N+6 R Row no. producing maximum model mismatch Second independent variable, x2
N+7 R No. of rows with good quality Third independent variable, x3
N+8 R Time of last computation in mmddhh format Fourth independent variable, x4
N+9 B State of outputs: Quality of data point:

0 = computed 0 = bad, excluded from computation
1 = default 1 = good, included in computation
Specifications
S1 N 5 I Note 1 Block address of dependent variable
S2 N 5 I Note 1 Block address of first independent variable
S3 N 5 I Note 1 Block address of second independent variable
S4 N 5 I Note 1 Block address of third independent variable
S5 N 5 I Note 1 Block address of fourth independent variable
S6 N 1 I 1-4 Number of independent variables to use in

calculation
S7 N 5 I 5 - 32 Number of sets of data to buffer
S8 N 5 I 5 - 32 Minimum number of good sets of data required

for calculation
S9 N 1 B Full Trigger or time mode flag:

0 = trigger
1 = time
S10 N 1.000 R 0.0 - 9.2 E18 Time interval between calculations (minutes)
2VAA000844R0001 J 155-1
Explanation 155. Regression
S11 N 0 I Note 1 Block address of external trigger
S12 N 0 B Full Data storage mode flag:

0 = sequential
1 = bins
S13 N 100.000 R Full High range of first independent variable for bin
storage
S14 N 0.000 R Full Low range of first independent variable for bin
storage
S15 N 0 I Note 1 Block address of edit mode switch:

0 = calculate
1 = edit
S16 N 5 I Note 1 Block address of set to edit value
S17 N 0 I Note 1 Block address of set quality toggle flag:

1 = toggle quality

1 = reset
S19 Y 0.000 R Full Initial default for first parameter
S20 Y 0.000 R Full Initial default for second parameter
S21 Y 0.000 R Full Initial default for third parameter
S22 Y 0.000 R Full Initial default for fourth parameter
S23 Y 1.000 R 0.000 - 1.000 Desired goodness of fit
S24 N 0.000 R Full Default update
S25 N 0.000 R Full Full spare

NOTE:
155.1 Explanation
The regression block has two modes of operation. First is calculation of parameter estimates, and second is editing of data
contained in the data table. Specification S15 selects the mode of operation (the edit mode switch). Setting S15 to zero
selects the calculation mode and one selects the edit mode.
In the calculation mode, the regression block stores the measurements x1, x2, x3, x4 (independent variable) and y
(dependent variable) in a data table. The matrix X and the vector Y represent this data table as shown below. Each row of
the matrix and the corresponding element in Y contain data from one sampling period.
a1 x 11 x 21 x 31 x 41 y1
a2 x 12 x 22 x 32 x 42 y2
a = X = Y =
a3     
a4 x 1N x 2N x 3N x 4N yN
155-2 2VAA000844R0001 J
155. Regression Explanation
where:
an = The values of parameter n where n = 1 to 4
X =
Matrix of input values for independent variables.
Each column contains the group of samples for
one of the four independent variables; x1N =
values for independent variable x1, etc.
Y = Matrix of values for the dependent variable. The
number of rows is the number of samples taken.
The regression algorithm solves the equation Xa=Y. If the number of samples (rows in X) equals the number of parameters
to find (columns in X), creating a square matrix, the solution is a=X-1Y. However, the matrix X is not always invertible. If the
rows of X are not unique, the matrix is singular and the inverse does not exist. The internal logic of the regression block
prevents entry of data that creates a singular matrix.
When collecting live data, there is always uncertainty in the values collected, resulting from the influence of uncontrollable
effects in the surrounding environment. To counteract this influence, more data points are collected to increase confidence
in the model parameters. When this is done, the matrix X is not square. This leaves more equations than unknown
parameters to specify, and the simple algebraic solution explained above is not possible.
Rearranging the equation Xa=Y gives X(a–y)=r where r is the vector of residuals. Generally, any a selected leaves a non-
zero vector of residuals, indicating the mismatch between model and data. To solve this problem, the regression block uses
the least squares method to minimize the square of the residuals. The solution takes the form X´(X(a–Y))=0. This is a set of
linear equations, solved by the Gaussian Elimination method. This method provides numerically stable solutions while
requiring less processing time than more direct solution techniques.
A minimum number of sets of data with good quality must be present in the data table before the parameters may be
calculated. Specification S8 specifies the minimum number. But, the minimum number must be equal to or greater than five.
The data set can be viewed and changed in the edit mode. Each time a good quality data set is entered, the values of a1
through a4 are recalculated.
If the calculation of a is valid, and the goodness of fit is less than that specified with S23, then the values of a1 through a4
are output from the block. The goodness of fit is defined as the mean relative residual:
 ------------K -
a  k   X  j k  – y  j 
J  k = 1 
GF =  ------------ ------------------------------------------------------------------------------
j=1 max (1, y  j    J
where:
J = Number of independent variables used in the
calculation (S6).
K = Number of data sets used in the calculation
(S7).
a(K) = Value of a determined when k data sets are
used for calculation.
X = Matrix of input values for independent variables.
y(j) =
Value of the dependent variable associated with
independent variable number j.
The block also performs a test on residuals r after accepting new data. The old set of data is always buffered for the
duration of the calculation, and replaces the new set of data in the event that the block is unable to calculate valid
parameters. When the computed goodness of fit is greater than the tolerance limit (S23), the new data set is removed from
the data table X and the old data is reinstated.
Data can be collected in two ways (time basis and transition of external trigger). Specification S9 selects the mode. If data is
collected on a time basis, the collection frequency is specified in minutes with S10.
The data can be stored in the data table in one of two ways. Data can be stored either in bin mode or sequentially.
Specification S12 selects the mode.
S12 = one = bin storage

The bin mode of data storage allows the system to maintain a spread of data over a range of the independent variable X1.
The bin mode of data storage should be used when the correlation is not expected to change (e.g., due to sensor
contamination or independent variable changes over a wide range). In this mode the data is sent to the appropriate bin and
calculated as shown:
<S2> – <S14>
Bin No. = S7 -----------------------------------------
<S13> – <S14>
where:
<S2> = First independent variable.
2VAA000844R0001 J 155-3
Specifications 155. Regression
S7 = N, the number of data sets used for

calculation.
<S13> = High end of range of allowable X1 values.
<S14> = Low end of range of allowable X1 values.
Any input greater than S13 or less than S14 is discarded. In the sequential mode of data collection, the data table is first in
first out (FIFO queue). The new points fill the data table row by row, and the newest data set replaces the oldest data set.
This mode is used when the correlation is expected to change.
In the edit mode, a set of data from the data table can be selected and displayed by entering a number between one and N
as S16. The set of data selected is then available in output blocks N+4 through N+8. Block N+9 contains a quality bit that
indicates if the data selected is currently in use in the calculation.
0 = good data
1 = bad data
The operator can change the quality associated with a set of data by toggling S17 to one. By changing the quality
associated with an erroneous set of data as bad, it is eliminated from the parameter calculation.
Default values for each of the four parameters are specified with S19 through S22. The default values can be periodically
updated from the data tables by selecting the update time in hours with S24. If S24 is set to 0.0 there is no updating of the
default parameters. The minimum update time is 18.0 hours. The default update is an important feature because the data
table is stored in RAM and is lost on power down, module reset, or entering configuration mode. The default parameters are
stored in NVRAM which is not affected by these interruptions of normal operation. Thus, when the module is started, real
values are available. The default parameters are output after start-up, and until there are the specified number of good
quality data sets (S9).
A reset input is also available. If it is set to one it marks all sets of data in the table to bad and makes the default parameters
S19 through S22 available at the output to the block.
S1 – Y
Block address of dependent variable.
S2 – X1
Block address of independent variable X1.
S3 – X2
S4 – X3
S5 – X4
S6 – J
Number of independent variables (one to four) used for calculation. Select the number of variables from one to four used in
the calculation.
S7 – K
Number of sets of data used for calculation. This identifies the number of sets of data to be drawn from to perform the
calculation. There can be up to 32 sets.
S8 – MD
Minimum number of good sets of data required for calculation. The minimum number of good data sets required to perform
the calculation is five.
S9 – MD1
Time and trigger mode flag. This specification defines the mode of data collection used. In the time mode, data is collected
at a fixed interval of time specified with S10. In the trigger mode, data is collected each time the externally controlled
collection trigger (S11) goes to one.
0 = trigger mode
1 = time mode
S10 – DT
Time in minutes between collections of data when the regression block is in the time collection mode (S9 equals one).
155-4 2VAA000844R0001 J
155. Regression Specifications
S11 – ET
Block address of the external collection trigger. This input determines when collections of data occur in the trigger mode (S9
equals zero). When this input makes a zero to one transition, the block reads the incoming data.
S12 – MD2
Data storage mode flag. This specification defines the data collection mode. In the bin mode, the system maintains a spread
of data over a range of the independent variable X1,(S2). In the sequential mode, the newest set of data replaces the oldest
set of data in the data table.
0 = sequential
1 = bin
S13 – HR
High end of the range of X1 for bin storage. If there is data stored in the bin mode, any input values greater than this number
are discarded. If data storage is in the sequential mode, retain the default value.
S14 – LR
Low end of the range of X1 for bin storage. If storing data in the bin mode, input values less than this number are discarded.
If storing data in the sequential mode, retain the default value.
S15 – MD3
Block address of calculate and edit mode switch. This value controls the operating mode of the regression block.
0 = calculate mode
1 = edit mode
S16 – EDN
Block address of the number of data sets from one to n viewable in the edit mode. This specification is only activated in the
edit mode (S15 equals one). When in edit mode, the variables in the set selected with S16 output to blocks N+4 through
N+8.
S17 – SQ
Block address of the quality switch. This specification is active only in edit mode. When <S17> changes from zero to one,
the quality value of the row S16 specifies changes to the opposite quality. Good quality can be forced bad or bad quality,
likewise, can be forced good.
1 = change quality
S18 – RS
Block address of the reset switch. When this value goes to one, all rows in the data table are marked bad quality, and the
default parameter values from S19 through S22 are output from the block.
1 = reset
0 = normal
S19 – D1
Initial default value for parameter a1. If S24 is not equal to zero, the calculated value replaces the initial value at the interval
specified with S24. If S24 equals zero, S19 equals default value.
S20 – D2
S21 – D3
S22 – D4
S23 – GF
Desired goodness of fit parameter. If the calculated values are not less than this value, they will not be output from the
block. The calculated values will be discarded and the last set of successfully calculated values will be output. This input
can be used to reject noisy data.
2VAA000844R0001 J 155-5
Outputs 155. Regression
S24 – DEFUP
Default update period. At the end of this time, the calculated values of the parameters a1 to a4 are copied to the default
parameters. The minimum update period is 18 hours.
S24  0, no update of default values.

S24  0 and  18, the default values of the parameters will update at the end of the update period.
S25 to S27
Spare.
155.1.2 Outputs
N
Value of the first calculated parameter in both calculation and edit modes.
N+1
Value of the second calculated parameter in both calculation and edit modes.
N+2
Value of the third calculated parameter in both calculation and edit modes.
N+3
Value of the fourth calculated parameter in both calculation and edit modes.
N+4
Calculation Mode
 Y i – Yi 
-------------------
-
Yi
goodness of fit =  -----------------------
n
Edit Mode
Value of dependent variable Y.
N+5
Calculation Mode
 Y i  – Yi 
maximum model mismatch = MAX  -------------------
-
Yi 
Edit Mode
Value of first independent variable X1.
N+6
Calculation Mode
Row number of maximum mismatch.
Edit Mode
Value of second independent variable X2.
N+7
Calculation Mode
Number of data rows with good quality.
Edit Mode
Value of third independent variable X3.
N+8
Calculation Mode
Time of last successful computation in mmddhh format with hours in military time.
Edit Mode
Value of fourth independent variable X4.
155-6 2VAA000844R0001 J
155. Regression Applications
N+9
Calculation Mode
State of outputs:
1 = computed
0 = default; when the module is reset, all values in the data table are marked bad quality and the
default values specified by S19 through S22 are output.
Edit Mode
Quality of the current data set (selected with S16):
1 = good quality included in computation

0 = bad quality excluded from computation
The current quality can be changed by setting S17 to one. This toggles the quality input to the opposite value.
155.2 Applications
The regression block can be used for economic optimization. It operates on functions described as linear, which means y is
a linear function of a. This does not imply that y is a linear function of the measurements forming X. For instance, to identify
the cost function of a steam generating unit, a quadratic form is employed.
y = cost
X1 = steam flow
X2 = steam flow2
X3 = 1
Y = a(1)X1 + a(2)X2 + a(3)1

The equation provides a steady state economic model used by an optimization program to minimize operating expenses.
Another application is modeling of the kinetic parameters in a batch reactor.
extent = a(1) x (time,temperature,concentration) + a(2)

The extent of the reaction is a laboratory measurement, and f(t,T,C) is a dimensionless group representing relative reaction
rate computed by the module. The lab data is entered through the console or control station. The identification of the
parameters allows on-line prediction of required batch reaction time, given measurements for temperature and initial
concentration.
The two preceding applications represent models as power series. Linear regression can also compute model parameters
for more complex function forms. The regression block correlates up to four independent variables to a single dependent
variable.
For instance, the model m = b(1)  (pb(2))  (qb(3)) contains two independent variables in a nonlinear relationship. The
following equation results after taking the log of both sides, making the model linear in the parameters:
log(m)  log(b(1))  b(2) log p  b(3) log(q)

making the definitions:
y  log(m), X1  1, X2  log(p), and X3  log(q)

The regression block finds the best parameter set a for the equation:
y  a(1)X1  a(2)X2  a(3)X3
2VAA000844R0001 J 155-7
Regression Block Application Considerations 155. Regression
Figure 155-1 shows the contours of equal m plotted in the p – q plane.
2 .5
Q
9
7
5
3
M =1
0
0.5 5.0
P
T 01 83 0 A
Figure 155-1 Contours of Equal m Plotted in the p – q Plane
The type of data storage used depends on the situation. Sequential storage retains the last seven data sets and calculates
the parameters from them. Use this mode when the correlation is expected to change. Bin storage retains the data sets that
give evenly spaced sets across the entire range of the independent variable. It should be used whenever the correlation is
not expected to change due to such things as sensor contamination. Bin storage should also be used when the
independent variable changes over a wide range, but is not expected to assume all or nearly all of the range of values. For
example, a machine that commonly runs at 60 to 80 percent load for extended periods of time would run most efficiently
with bin storage. Bin storage retains values that fall within zero to 60 percent and 80 to 100 percent load while frequently
updating the fall between values 60 to 80 percent load.
155.2.1 Regression Block Application Considerations
The regression block is very flexible. Determine which combination of data collection and storage techniques is needed for
the application. A balance must be maintained when setting data collection, storage and acceptance specifications. More
certainty and stability in the calculated coefficients is generally obtained at the expense of speedy adaptation to significant
changes in process behavior.
Number of Data Sets

The specification of 32 data sets in the data table (the maximum for S7) provides more information about the process and
stabilizes the value of calculated model coefficients. However, specification of 16 data sets would speed up adaptation of
the coefficients if process behavior was expected to change rapidly.
Binned Data Storage

Segregating the data into bins according to the value of x1 (at S2) significantly increases the reliability of the calculated
model coefficients. The bins ensure that data collected over the entire range of interest for x1 is included in the coefficients,
not just the most recent data. The most recent data may be concentrated around a long term operating point of the process,
and the coefficients calculated from this data may not be representative of the process outside this operating point.
Figure 155-2 shows the effect of the data storage technique. This example shows two models of sampling 20 points of a
known function. The function was distorted by the addition of random noise. The first model uses bins for data storage, the
second model uses sequential data storage. The first model adequately represents the actual function over the entire range
of interest while the second only represents the function in the local range of the data collected.
The increased reliability provided by binned data storage comes at the price of slower adaptation to process changes. If
some data points are collected at operating ranges entered rarely, they corrupt the currentness of the curve fit. Narrowing
the collection range speeds the adaptation process, but renders the coefficients inaccurate outside the range of data
collection.
155-8 2VAA000844R0001 J
155. Regression Regression Block Application Considerations
Maximum Residual
The maximum residual specified in S23 also has a strong effect on the ability of the regression block to adapt and its rate of
adaptation. To reject noisy data, a small residual is desirable. However, if the residual is set too small, all new data will be
rejected. To give the regression block some pliancy, a larger residual must be specified.
A C TU A L
M ODEL
B INN ED DATA S TO RA G E
M ODEL AC TU A L
S E Q UE NT IA L DATA S TOR AG E
T 01 8 51 A
Figure 155-2 Effect of Data Storage Technique
2VAA000844R0001 J 155-9
Regression Block Application Considerations 155. Regression
155-10 2VAA000844R0001 J
156. Advanced PID Controller

The advanced PID controller function code implements a proportional integral derivative controller. Some of the advanced
features of this function code above the other PID controllers (function codes 18 and 19) are:
AP ID
S2 (1 5 6 )
SP CO
S1 N
PV BI
S3 N+1
TR BD
S4 N+2
TF
S5
R
S6
FF
S7
N /A
S8
N /A
S9 II
S10
DI
• Direct use of a feedforward signal into a PID controller.

• Improved algorithm for derivative action calculation.
• Improved algorithm for incorporating an external reset or manual reset signal.
• Control output increase and decrease inhibit signals to constrain controllers in cascade configurations when limits
are encountered. This prevents the primary loop from wind-up when the secondary loop control output saturates.
• Provides digital implementation of a noninteracting PID control algorithm or a classical (analog) series interacting
PID controller.
• Provides a quick saturation recovery option.
In addition to the advanced features, function code 156 has the normal features of a PID, including:
• Bumpless manual-to-auto transfer.
• Bumpless proportional band tuning.
• Anti-reset (integral) wind-up function.
• Reverse acting or direct acting direction switch.
• Set point modifier option allowing bumpless set point changes.
NOTE: PID reset mode (S5) and PID gain (S6) of the segment control block (function code 82) do not affect the advanced PID
controller. Maximum derivative gain for PID (S11) and external reset for PID (S12) of the executive block (function code 53) do not
affect the advanced PID controller. These functions are controlled within the advanced PID controller. This feature allows PID con-
trollers with and without external reset to be included in the same segment.
Outputs
N R Control output with feedforward
N+1 B Block increase flag:

0 = permit increase
1 = inhibit increase
N+2 B Block decrease flag:

0 = permit decrease
1 = inhibit decrease
Specifications
S1 N 5 I Note 1 Block address of process variable
S3 N 5 I Note 1 Block address of track reference
2VAA000844R0001 J 156-1
S4 N 0 I Note 1 Block address of track flag:

0 = track
1 = release
S5 N 5 I Note 1 Block address of external or manual reset
S6 N 5 I Note 1 Block address of feedforward signal
S9 N 0 I Note 1 Block address of increase inhibit:

0 = normal
1 = prevent increase
S10 N 0 I Note 1 Block address of decrease inhibit:

0 = normal
1 = prevent decrease
S11 Y 1.000 R Full Gain multiplier K
S12 Y 1.000 R Full Proportional gain KP
S13 Y 0.000 R Full Integral reset resets/min. or manual reset time

constant KI  min.
S14 Y 0.000 R Full Derivative rate action KD min.
S15 Y 10.000 R Full Derivative lag constant KA (typically = 10)
S18 N 10 I 00 - 03 Algorithm
or Version:
10 - 13 0X=original
(Note 2) 1X=new3
Type:
X0 = classical
X1 = noninteracting
X2 = classical with external reset
X3 = manual reset noninteracting
S19 N 0 I 0 or 1 Integral limit type:

0 = quick saturation recovery
1 = conventional saturation recovery
S20 Y 0 I 0 or 1 Set point modifier:

0 = normal
1 = integral only on set point change
S21 Y 0 I 0 or 1 Direction switch:

0 = reverse mode error = SP – PV
1 = direct mode error = PV – SP
156-2 2VAA000844R0001 J
156. Advanced PID Controller Explanation
S23 Y 0 I Full Spare integer parameter

NOTES:
2. Input values other than those defined may result in unpredictable APID behavior.
3. The new version has been revised to improve the internal behavior of the algorithm. The original
version is retained for backward compatibility of old configurations.
156.1 Explanation
S1
Block address of the process variable. This identifies the process variable controlled by the PID algorithm.
S2
Block address of the set point.
S3
Block address of the track reference. This identifies the signal the PID outputs when in track mode.
S4
Block address of the track flag. This input signal controls the track or release mode:
0 = track mode
1 = release mode
In track mode, the output is forced to the value of the track reference (S3). In release mode, the block output is calculated
as a function of the process variable and the set point.
S5
Block address of the external or manual reset. This input has two functions. It can link the external reset signal that is used
in the integral calculation (S18, algorithm type two). It also can link the manual reset signal for manual reset control (S18,
algorithm type three).
S6
Block address of the feedforward signal. This input is the signal added to the output calculated by the PID algorithm. This
combined output becomes the block output in the release mode.
S7 and S8
Spare real and boolean input.
S9
Block address of increase inhibit signal. An input of one prevents the control output from increasing beyond its current value
when the controller is not in the track mode. An input of zero does not affect the PID controller. If the S9 and S10 inputs are
both one (in release mode), the output of the PID controller is held at its current value. These inputs also go to outputs N+1
and N+2.
S10
Block address of the decrease inhibit signal. An input of one prevents the control output from decreasing below its current
value when the controller is not in the track mode. An input of zero does not affect the PID controller. If the S9 and S10
inputs are both one (in release mode), the output of the PID controller is held at its current value. These inputs also go to
outputs N+1 and N+2.
S11
Gain multiplier K. The gain multiplier is one of the terms in the PID calculation.
2VAA000844R0001 J 156-3
Specifications 156. Advanced PID Controller
S12
Proportional gain KP. The proportional gain is one of the terms in the PID calculation.
S13
Integral reset KI resets/min. The integral reset (controller type zero, one or two of S18) is a term in the PID calculation.
Specification S13 is the manual reset time per minute for manual reset controllers (type three of S18).
S14
Derivative rate action KD min. The derivative rate action is one of the terms in the PID calculation.
NOTE: The derivative rate action is calculated based on changes in the process variable only. To calculate the derivative rate
action on set point changes as well, calculate an error signal external to the advanced PID controller. This error signal can then be
introduced as the process variable with a set point of zero.
S15
Derivative lag constant KA. The derivative lag constant is one of the terms in the PID calculation.
Controllers refrain from directly implementing derivative control in favor of filtering the derivative contribution. The derivative
lag constant allows specifying the extent of this filtering. This filtering is a simple first order lag with a time constant of
KD/KA. For the default setting of KA = 10.0, the filter has a time constant of 1/10 the derivative time. Typical values are from
ten to 20 for KA.
NOTE: In order to effectively disable the derivative filtering action, set KA to a very high value (such as 9E18). Note that KA has no
affect if the derivative constant (KD) is equal to 0.0. Also, if KA is configured by the user to 0.0, the function code will internally sub-
stitute a value of 1.0 for all calculations.
S16
High output limit. The output (PID algorithm plus feedforward signal S6) is limited by this value before it is transferred to the
block output.
S17
Low output limit. The output (PID algorithm plus feedforward signal S6) is limited by this value before it is transferred to the
block output.
S18
Tens digit, selects the algorithm version:
0X = original - PID output is calculated using the original algorithm implementation. Existing
configurations may use this version for backward compatibility.
1X = new - PID output is calculated using a new version of the algorithm implementation.
NOTE: The algorithm version is not permitted to be modified via an on-line configuration operation.
It is recommended that new configurations use the new version of the algorithm (S18 = 1X). However, for existing
configurations, the original algorithm (S18 = 0X) is available for full backward compatibility.
Ones digit, selects the type of algorithm for the PID calculation:
X0 = classical - PID output is calculated using a classical interactive controller. Tuning any of the
proportional, integral or derivative terms changes the effective value of the other terms.
X1 = noninteracting - PID output is calculated using a noninteracting control algorithm. Tuning the
proportional, integral or derivative terms individually has no effect on the other terms. This is the
same type as function code 19.
X2 = classical with external reset - cascade and override configurations use this type of algorithm.
The PID output is calculated using the classical interactive control algorithm. The integral
contribution is calculated as a function of the external reset signal.
X3 = manual reset noninteracting - PID output is calculated from the proportional and derivative
terms with manual reset. For manual reset control, a manual reset time constant (S13) is used for
bumpless transfer between the track and release states.
NOTE: The transfer is not bumpless if the manual reset time constant (S13) is set to zero. Any change in the manual reset is fil-
tered by a first order lag with the manual reset time specified.
All versions of the algorithm provide bumpless auto or manual transfer and tuning of the proportional band.
156-4 2VAA000844R0001 J
156. Advanced PID Controller Outputs
S19
Integral limit type. This input specifies the limiting type applied to the integral calculation. Both forms of limiting prevent
controller wind-up during saturation of the control output.
0 = quick saturation recovery limiting - integral limiting equals (specified limits minus feedforward
signal minus proportional action).
Proportional action = K KP  (SP – PV) (reverse acting)
Proportional action = K  KP  (PV – SP) (direct acting)

The quick saturation recovery limitation uses the proportional action calculation for all algorithm types specified in S18. This
type of limiting prevents the integral action from duplicating the efforts of the feedforward signal and the proportional action
when the control output is saturated. When a decrease in error between the process variable and set point occurs, the
control output immediately moves out of saturation minimizing the possibility of set point overshoot.
NOTE: This action is not desirable if the PID controller is used as a limiting controller holding a valve or other device at a limit (e.g.,
holding a valve closed) and set point changes are made that result in a decrease, but not a change in sign, in the error. In addition,
the use of this option may not be desirable when the integral reset (S13) is set to zero (i.e., a P or PD controller).
Example
The system is initially at a steady state with zero offset, an error signal between the process variable and set point develops,
resulting in control output saturation. Then, the use of this option shifts the integral value to the integral limit. This results in
an offset from the initial steady-state when the error signal reduces to zero.
1 = conventional saturation recovery limiting - integral limiting equals (specified limits minus
feedforward signal).
With this type of limiting, the control output moves out of saturation only after the error between the
process variable and the set point has changed sign; this may result in significant overshoot of the set
point by the process variable.
S20
Set point modifier. This input defines the action to be taken on a set point change.
0 = normal - this typically results in a jump in the control output due to the proportional contribution
from the error created by a set point change.
1 = integral only on set point change - proportional contribution of the error is subtracted from the
integral contribution. This action eliminates the jump in control output and results in only integral
action on a change in set point.
S21
Direction switch. This input defines the direction the control output must move to compensate for an error between the
process variable and the set point.
0 = reverse mode controller - an increase in the control output results in an increase in the process
variable. The controller error signal is equal to the set point minus the process variable.
error = SP – PV
1 = direct mode controller - an increase in the control output results in a decrease in the process
variable. The controller error signal is equal to the process variable minus the set point.
error = PV – SP
S22 and S23

Spare parameters.
156.1.2 Outputs
N
Control output with feedforward.
N+1
Block increase flag.
2VAA000844R0001 J 156-5
Outputs 156. Advanced PID Controller
0 = permit increase
1 = inhibit increase
Figure 156-1 shows an advanced PID output example. Output N+1 from block B should be linked directly to S9 of an
advanced PID block A, whose output forms the set point to block B.
NOTE: Do not use the output block increase flag if using the quick saturation recovery option (S19 equals zero).
A P ID A P ID
S2 (1 56 ) S2 (1 56 )
SP CO
N
O TH E R L O G IC SP CO
S1 S1 N
PV BI PV BI
S3 N+1 S3 N+1
TR BD TR BD
S4 N+2 S4 N+2
TF TF
S5 S5
R R
S6 S6
FF FF
S7 S7
N /A N /A
S8 S8
N /A N /A
S9 S9
II II
S 10 S 10
DI DI
A B
(OU T E R LO O P ) (IN N E R LO O P )
T01 852 A
Figure 156-1 Advanced PID Output Example
N+2
Block decrease flag.
0 = permit decrease
1 = inhibit decrease
NOTE: Do not use the output block decrease flag if using the quick saturation recovery option (S19 equals zero).
Refer to Figure 156-1. The N+2 output from block B should be linked directly to S10 of an advanced PID block A, whose
output forms the set point to block B.
NOTE: If block B is placed in track, both of its status flags are set to one. This limits control action of block A in both directions.
The advanced PID controller uses a limit checking and status passing mechanism. This feature is designed to constrain
controllers in cascade configurations when limits are met.
Two boolean status flags implement this feature. The outputs N+1 and N+2 reflect two conditions:
1. The limit status of the local advanced PID controller.
2. The limit status of downstream controllers. This information is supplied by S9 and S10.
When the advanced PID controller saturates at one of its limits, the appropriate output is set (i.e., block increase or
decrease). A further increase or decrease of the set point will attempt to drive the local advanced PID controller further into
saturation. The N+1 and N+2 outputs can be monitored by any advanced PID controller whose output forms the set point for
the loop. Setting the N+1 or N+2 outputs prevents the higher level advanced PID controller from increasing or decreasing its
output if this action causes further saturation.
NOTES:
1. The N+1 and N+2 outputs are adjusted for the direct or reverse mode of each advanced PID controller.
2. The use of the quick saturation recovery option (S19 equals zero) in the inner loop APID may result in ringing of the increase
or decrease inhibit flag value as the inner loop saturates at one of its limits. Ringing is where the inhibit flag value flips between
zero and one frequently. This may result in creeping of the output loop control output (i.e., instead of holding the outer loop control
output (inner loop set point) constant when the inner loop saturates, the outer loop control output may move, or creep, as ringing of
the inhibit flag occurs). The quick saturation recovery option is designed to have the control output move immediately out of satu-
ration when a decrease in error between the process variable and set point occurs. Therefore, if the inner loop error value
increases and decreases frequently near saturation, its control output moves in and out of saturation resulting in ringing of the
inhibit output flag. In such instances, it is recommended that the conventional saturation recovery limiting option (S19 equals one)
be used in the inner loop APID.
For example, if an inner loop controller (reverse mode) saturates at its upper limit, the block increase flag will be set. Setting
this flag indicates to the outer loop controller that it should not increase its output (which acts as the set point to the inner
loop).
NOTE: A direct mode controller sets the block decrease flag when it saturates at its upper limit.
156-6 2VAA000844R0001 J
156. Advanced PID Controller Classical PID Controller
156.2 Classical PID Controller
Standard form of a classical PID controller.
1 TD s + 1 
Output = K  1 + -------   ---------------------
- error
 T i s   T as + 1 D
where:
error SP – PV (reverse mode)
error PV – SP (direct mode)
Advanced PID controller block parameters.
S11 = Gain multiplier K.

S12 = Proportional gain KP.
S13 = Integral reset (resets per min.) KI.
S14 = Derivative rate action (min.) KD.
S15 = Derivative lag constant (typically equals ten) KA.
NOTE: This controller works in seconds internally. It is assumed that KI and KD are in resets per minute and minutes, respectively.
The 60 term converts KI and KD into resets per second and seconds, respectively.
Substituting block parameters into the original equation.
 60K D s + 1
--------------------------
K I 
Output = K  K P  1 + ---------------
60   60K  error
 s  D
 ------------- s + 1
 KA 
Standard convention excludes the effects of derivative action on set point changes. Using superposition, this is achieved for
reverse mode.
 60K D s + 1
 K  60   K  60   --------------------------
Output = KK P 1 + ---------------

I

SP – KK P 1 + ---------------

I
  60K D  PV
s s  ------------- s + 1
 A K 
60K D s + 1
 K  60  SP – -------------------------
- PV
Output = KK P 1 + ---------------
I 60K D
 s  ------------- s + 1
KA
To make the algorithm suitable for external reset, the proportional and integral section is implemented using positive
feedback of a first order lag filter. Figure 156-2 is a block diagram of a reverse mode classical controller. Figure 156-3 is a
detailed block diagram of the reverse mode classical controller.
SP
6 0 K DS + 1 P VLL + G A IN A LG O R ITH M O U TP U T
PV (D ) ERROR (P D ) + (P ID ) +
6 0 KD
S +1
 K KP   O U T PU T
KA +
+
IN TE R N A L
IN T E G R A L R E SE T
1
(I)
60 S + 1
KI
E XT ER N A L
R E SE T

+
E X T ER N A L FE E D FO R W A R D
R E SE T
T01853A
Figure 156-2 Classical Controller
2VAA000844R0001 J 156-7
Classical PID Controller 156. Advanced PID Controller
E X T ER N A L F E E D FO R W A R D
RESE T

E X T ER N A L IN T ER N A L
RESE T RE SET -1
Z
-1
Z
+
+ 60
 60 + K It 
+
PV + 60K A K D
 60K D + K A t IN T E G R A L -1
Z
SP
+ + + +
+ tK A + P V LL ERRO R G A IN + +
 60K D + K At
  K KP   OU TPUT
A L G O R IT H M
+ OU TPUT
-1
Z
T01854A
Figure 156-3 Classical Controller - Detail
Equations to implement the reverse mode classical controller.
Block output  feedforward  algorithm output
60K A K D  PV – previous PV 
PVLL = Previous PVLL + -------------------------------------------------------------------------
60K D + K A Dt
DtK A  PV – previous PVLL 
+ -----------------------------------------------------------------------
60K D + K A Dt
PVLL  PV during initialization or track mode or KA = 0
error’  SP – PVLL reverse mode
error’  PVLL – SP direct mode
Algorithm output  gain  PI

NOTE: Algorithm output is limited to the specified limits minus the feedforward value.
Gain  (K KP) error‘
60 - K Dt 
PI =  -------------------------   previous PI  +  -------------------------
I -  previous algorithm output 
 60 + K I Dt  60 + K I Dt
or
K I Dt 
  previous PI  +  -------------------------
60 -
PI =  ------------------------- -  ext. reset – feedforward 
 60 + K I Dt  60 + K I Dt
NOTES:
1. The integral value is limited to the specified limits minus the feedforward and minus the proportional component when quick
saturation recovery limiting is selected. The integral is limited to the specified limits minus the feedforward when conventional sat-
uration recovery limiting is selected.
2. The PI value is adjusted to compensate for bumpless transfer, bumpless proportional tuning and implementation of the set
point modifier option (S20). The PI term can be forced outside its normal limits due to one of these conditions. After this happens,
a newly computed value is only allowed to move toward the region between its limits. The PI value is not forced within the limits,
but it is also not allowed to move further from its limits.
3. Using external reset and feedforward control simultaneously may cause controller instability. This is possible due to the inter-
action between the feedforward and external reset signals. If there is a significant lag between a change in the feedforward signal
and the resultant change in external reset, the control output will first respond to the feedforward change and then tend to con-
verge to the external reset signal. The external reset signal will dominate whenever the controller output is saturated.
156-8 2VAA000844R0001 J
156. Advanced PID Controller Noninteracting PID Controller
4. The classical control algorithm cannot be used for integral only control with internal reset and KP equal to zero. With KP equal
to zero and external reset not specified, the block will automatically default to a noninteracting PID controller.
156.3 Noninteracting PID Controller
Standard form of a noninteracting PID controller.
1 TD s
Output =  K + -------- + ---------------------- error
 T 1 s T D as + 1
where:
error SP – PV reverse mode
error PV – SP direct mode
Advanced PID controller block parameters.
S11 = Gain multiplier K.

S12 = Proportional gain KP.
S13 = Integral reset (resets per min.) KI.
S14 = Derivative rate action (min.) KD.
S15 = Derivative lag constant (typically equals ten) KA.
Substituting block parameters into the original equation.
 K I  60 60K D s 
 K P + --------------- -
+ -------------------------
Output = K  s 60K D  error
 ------------- s + 1
 K A 
The standard convention is to exclude the effects of derivative action on set point changes. Using superposition, this is
achieved for reverse mode as:
 60K D s 
 --------------------------
Output = K  K P + K I  60 error – K  60K D  PV
 ---------------
s   ------------- s + 1
 A K 
Refer to Figure 156-4 for a block diagram of a reverse mode noninteracting controller. Figure 156-5 illustrates a detailed
block diagram of the reverse mode noninteracting controller.
SP
+
PV E R RO R P R O PO RT IO N A L
 K KP
+
A L G O R IT H M
K KI
IN T E G R A L + O U TP U T +
60   O U TPU T
S
+
60 K K D S
D E R IVATIV E
6 0K D
S+1 FE E D FO R WA R D
KA
T 01 8 55 A
Figure 156-4 Noninteracting Controller
2VAA000844R0001 J 156-9
Manual Reset PID Controller 156. Advanced PID Controller
-1
Z
+
K K It + IN TE G R AL
SP 60 
+ +
PV E R RO R P RO PO RTIO N A L + + O U TPU T
 KKP  
+
+ + 60K D FE E D FO R W A R D
 KKA  60K D + K A t
+
-1 -1 D E R IVATIV E
Z Z
T 01 8 56 A
Figure 156-5 Noninteracting Controller - Detail
Equations to implement the reverse mode noninteracting controller.
Algorithm output  proportional  integral – derivative

NOTE: Algorithm output is limited to the specified limits minus the feedforward value.
Proportional  (KKP) error
KK I Dt  error  previous integral

Integral  ----------------
60 
NOTES:
1. The integral value is limited to the specified limits minus the feedforward value and minus the proportional term when the
quick saturation recovery limiting option is selected. The integral value is limited to the specified limits minus the feedforward value
when conventional saturation recovery limiting is selected.
2. The integral value is adjusted to compensate for bumpless transfer, bumpless proportional tuning and implementation of the
set point modifier option (S20). The integral term can be forced outside its normal limits due to one of these conditions. After this
happens, a newly computed value is only allowed to move toward the region between its limits. The integral value is not forced
within the limits, but it is also not allowed to move further from its limits.
60KK D K A
Derivative =  ----------------------------------   PV – previous PV  +
60K D + K A Dt
60K D
 ---------------------------------
-  previous derivative 
 60K D + K A Dt
NOTE: Derivative limiting equals  span of specified limits. This is shown for a reverse acting controller. For direct action, change
(PV – previous PV) to (previous PV – PV).
156.4 Manual Reset PID Controller
The manual reset PID control algorithm provides a noninteracting controller with a fixed integral (reset) term. Use this type
of controller when only proportional or derivative action is required. The manual reset enables the balance of the control
loop at a specific operation point. This reduces the steady state offset between the process variable and set point.
Taking the transfer function for a noninteracting PID controller (with derivative action on the process variable) and replacing
the integral term with a first order lag yields the following transfer function:
 60K D s 
1 -------------------------- 
Output =  KK P error +  ------------------------ manual reset – K 60K D  PV
60K I s + 1 -------------s + 1 
 A K 
156-10 2VAA000844R0001 J
156. Advanced PID Controller Manual Reset PID Controller
where:
error SP – PV reverse acting
error PV – SP direct acting
NOTE: KI is a time constant (min.), not a rate setting (resets per min.). The first order lag on the manual reset input avoids bump-
ing the process whenever the manual reset value is changed. Manual or auto (track or release) transitions also utilize this time
constant to perform bumpless transfer and ramping to the manual reset value.
Refer to Figure 156-6 for a block diagram of a reverse mode manual reset PID controller.
M A N UA L
R E SE T 1 IN TE G R A L
6 0 K IS + 1
SP
+ +
+ +
  
ERROR P RO PO RTIO N A L O U T PU T
PV KKP
60 KK D S
D E R IVATIV E FE E D FO R WA R D
60 K D
S+1
KA
T 01 8 5 7A
Figure 156-6 Manual Reset PID Controller
Figure 156-7 illustrates a detailed block diagram of the reverse mode manual reset PID controller.
M A N UAL
R E SE T
+
60K I + INT E GR AL
 60K I + t 
+
-1
Z
SP
+ +
ER RO R P RO PO RTIO N A L + + OU TPU T
PV  K KP  
+
FE E D FO R WA R D
+ + 6 0K D
 K KA  60 K D + K A t
+
-1 -1 D E R IVATIV E
Z Z
T 01 858A
Figure 156-7 Manual Reset PID Controller - Detail
The equations to implement the reverse mode manual reset PID controller are:

Algorithm output  proportional  integral – derivative
NOTE: Algorithm output limiting equals specified limits minus feedforward.
Proportional = (KKP) error
2VAA000844R0001 J 156-11
Applications 156. Advanced PID Controller
 60K 
I
Integral = manual reset +  ------------------------- (previous integral – manual reset)
 60K I + Dt
NOTE: The integral value is adjusted to compensate for bumpless transfer, bumpless proportional tuning and implementation of
the set point modifier option (S20). The integral term can be forced outside its normal limits due to one of these conditions. After
this happens, a newly computed value is only allowed to move toward the region between its limits. The integral value is not forced
within the limits, but it is also not allowed to move further from its limits.
60KK D K A 
-------------------------------
-
Derivative = 60KK K Dt   PV – previous PV 
D A
60K D
+  ---------------------------------
-  previous derivative 
60K D + K A Dt 
NOTE: Derivative limiting equals ± span of specified limits. This is shown for a reverse acting controller. For direct action, change
(PV – previous PV) to (previous PV – PV).
156.5 Applications
Figure 156-8 shows the use of the advanced PID controller in a single input/single output control loop.
C IS I/O
(79 )
280
281
M /A 282
(M F C ) 283
S1 (8 0)
PV SP 284
A P ID S2 27 1 S10
SP O
S2 (15 6) S3 27 0
S1 SP CO A A
(3) S1 25 5 S4 27 2 285
S2 F (t) 250
PV BI TR C /R
27 4 S11
S3 25 6 S5
TR BD TS C
S4 25 7 S 18 27 3
TF MI C -F 286
S5 S 19 27 5
R AX 287
S6 S 20
FF C /R 288
S7 N /A
S 21 LX
S15
S8 N /A
S 22 S16
CX
S9 II
S 24 HAA
S17
S1 0 DI
S 25 S18
LA A
S 26
H DA
S 27 289
LD A
S 28
AO
S 29 TRS 2
S 30 T
TRP V
(6 6) TO O IS
S1
TR E ND 2 90
O R O TH ER
C O NSO LE
T 01 859A
Figure 156-8 Single Input/Single Output Control Loop
156-12 2VAA000844R0001 J
157. General Digital Controller
157. General Digital Controller

The general digital controller function code implements a fourth order difference equation with variable deadtime. This
function block uses previous outputs and error signals (SP minus PV) to calculate the present output. The starting point for
calculations can be initiated by time or trigger. This block can function as a digital controller, digital filter, or a digital process
model for the implementation of sophisticated control schemes.
Outputs
DTF
(1 5 7 )
S2
SP Blk Type Description
S1 N
PV
S4
FF N R U(t)
S7
T
S3
TR
S5 TS Specifications
S3 N 5 I Note 1 Block address of track value
S4 N 5 I Note 1 Block address of feedforward
S5 N 0 I Note 1 Block address of release/track flag:

0 = track
1 = release
S6 N 1 B 0 or 1 Execution mode:
0 = trigger
1 = time
S7 N 0 I Note 1 Block address of external trigger flag:

1 = run
S8 N 1.000 R 0 - 9.2E18 Time between runs (in secs)
S11 Y 0.000 R Full Coefficient a0
S16 Y 1.000 R Full Coefficient b0
S21 N 0 I 0 - 255 Numerator deadtime expressed as a number of

sample intervals
S22 N 0 I 0 - 255 Denominator deadtime expressed as a number of

sample intervals
2VAA000844R0001 J 157-1
Explanation 157. General Digital Controller
S23 Y 0.000 R Full Spare parameter

NOTE:
157.1 Explanation
S1
(Block address of process variable) Current value of the input from the process. Specifications S1 and S2 define the
error term in the difference equation:
e(t) = <S2> – <S1>
S2
(Block address of set point) Block address of the set point. This is the current value of the set point input. It defines the
desired value of the process variable. Specifications S1 and S2 define the error term in the difference equation:
e(t) = <S2> – <S1>
S3
(Block address of track value) Supplies the block output N when the controller is tracking. The output is limited before it is
output to the field and before it is used to update the output buffer. The final output from the general digital controller is the
sum of this limited internal control output value and the feedforward signal.
S4
(Block address of feedforward input) Block address of the feedforward input. This input biases the output of the general
digital controller based on the changing value of some other variable. The feedforward input is an externally generated
signal.
S5
(Block address of input selecting controller tracking) Block address of the input that selects controller tracking. When
tracking is selected, the output N tracks the value referenced by S3.
0 = track <S3>
1 = release
S6
(Time and trigger mode select) Defines the mode of data collection. In the time mode, data is collected at fixed intervals of
time defined by S8. In the trigger mode, data is collected when <S7> makes a zero to one transition.
0 = trigger mode
1 = time mode
S7
(Block address of external trigger) Block address of the external trigger. If the trigger mode of execution is selected, the
calculation is initiated each time this input makes a zero to one transition. The calculation is also initiated when the track
switch <S5> is set to zero to force the output to track the desired value.
S8
(Interval between executions) Identifies the interval between executions in seconds if the time based mode of execution is
selected.
157-2 2VAA000844R0001 J
157. General Digital Controller Output
S9
(High output limit) Actual control output will not exceed this value.
NOTE: The actual control output equals the sum of the low limited internally calculated control output plus the feedforward input
value, then high limited if necessary.
S10
(Low output limit) Internally calculated control output will not be less than this value. The actual control output will not be
less than this value plus the feedforward input value.
NOTE: The actual control output equals the sum of the low limited internally calculated control output plus the feedforward input
value, then high limited if necessary.
S11 through S20

(Coefficients used in difference equation) Values of the coefficients used in the difference equation. The coefficient
values are determined from the relationships between the operating parameters of the device being controlled (control
theory modeling of process).
S21
(Numerator deadtime) Numerator deadtime expressed as a number of sample intervals. The error signal entering the
general digital controller block is not acted on by the block until this number of sample intervals has passed.
S22
(Denominator deadtime) Denominator deadtime expressed as a number of sample intervals. The outputs of the general
digital controller are recycled back into the equation after they are calculated. The outputs being fed back into the controller
are not acted on until the sample intervals have passed.
NOTE: The value of S21 and S22 affects memory utilization. Refer to Appendix D for details.
S23 and S24

Spare parameters.
157.1.2 Output
N
Calculated from previous outputs, current and previous errors, and the feedforward value. During module startup or
tracking, the output is controlled by the track value input.
157.2 Application
General Information
The general digital controller is used to implement control algorithms that are based on discrete time sampled data that are
sampled at a rate that can be internally generated (<S8> when S6 equals one) or externally generated (<S7> when S6
equals zero).
Discrete time based functions are simple continuous time based functions that have been sampled at some periodic rate.
Just as Laplace transforms are useful to represent complex continuous time functions in a simple manner, Z-domain
transforms are used to represent complex discrete time sampled functions in an analogous simple manner. Like Laplace
transforms, Z-domain transforms can be used to simplify a complex continuous function into a simple equation. Since in the
world of digital control systems all continuous time based data is sampled into discrete time based data, it is more relevant
to perform complex continuous time based control algorithms using their equivalent discrete time based algorithms. These
continuous time based control algorithms can be converted into discrete time based algorithms via the use of Z-domain
transforms. As in Laplace transforms, Z-domain transforms can be algebraically manipulated and simplified into simple
equations consisting of simple terms. Conversion tables exist for converting these simple terms back and forth between
their equivalent continuous time and Z-domain functions. Further information on this can be found in any good basic control
textbook.
Any complex controller algorithm can be implemented by first determining its continuous time base transfer function. With
the use of the knowledge of Z-domain transforms, the continuous time based function can be translated into the Z-domain
function representation of the equivalent discrete time based function. The Z-domain equation can then be algebraically
manipulated into one or more terms that is equivalent to the Z-domain transfer function of function code 157. Therefore, one
or more function code 157 general digital controller function blocks can be used to implement the original complex time
based control algorithm.
The Z-domain transfer function representation of the general digital controller is:
2VAA000844R0001 J 157-3
Application 157. General Digital Controller
–N –4 –3 –2 –1
U Z  Z  a4 Z + a3 Z + a 2Z + a1 Z + a0 
G  Z  = ---------- = ------------------------------------------------------------------------------------------------------
-
E Z  –D –4 –3 –2 –1
Z  b4 Z + b3 Z + b2 Z + b 1Z + b0 
where:
U(Z = Z – transfer function of u(t).
)
E(Z) = Z – transfer function of e(t).
Specific Information
The general digital controller block calculates an output based on previous outputs and error signals. The calculation uses
the discrete function:
1
u  t  = -----  a  e  t – N  + a 1  e  t – N – 1  + a 2  e  t – N – 2 
b0
1
+ a 3   et – N – 3  + a 4  e  t – N – 4   – -----  b 1  u  t – D – 1 
b0
+ b2  u  t – D – 2  + b3  u  t – D – 3  + b4  u  T – D – 4  
where:
a0 - a4 = Coefficients (specified in S11 through S20)
b0 - b4
NNumerator (input) deadtime expressed as a =
number of sample intervals (S21)
D = Denominator (output feedback) deadtime
expressed as a number of sample intervals
(S22)
e(t) = Present error = (<S2> – <S1>)
e(t - N - n) = Error from (N+n)th previous run of the
algorithm
u(t) = Current internal control output value
u(t - D - n) = Internal control output from the (D+n)th
previous run of the algorithm
The general digital controller takes inputs and holds them for a specified number of time intervals for each step before
releasing them to the next step as shown in Figure 157-1. On start-up, the error queue is filled with the error signal and the
output queue is filled with the track value minus the feedforward value.
+
SP
 e (t) O N E UN IT
TI M E
D EL AY
e (t-N ) O NE U N IT e (t-N -1 ) O N E UN IT e (t-N -2 ) O N E U N IT e (t-N -3 ) O NE U N IT e (t-N -4 )
TI ME
D E LAY
TI M E
D ELAY
T IM E
D EL AY
T I ME
D E LAY TR ACK
– Q U EU E 1 Q U EU E 2 QUEUE 3 Q UE U E 4 R E FE R EN C E F E E D FO R W A R D
PV a 4 /b 0
a 0 /b 0 a 1 /b 0 a 2 /b 0 a 3 /b 0
A D JU S T E D A D JU S T E D
L O W L IM IT + H IG H LIM IT
N = N U M E R ATO R
u (t)
D E A D T IM E
 T + 
N = D E N O M IN AT O R
D E A D T IM E -b 1 /b 0 -b 2 /b 0 -b 3 /b 0
Q U EU E 1 Q U EU E 2 QUEUE 3 Q UE U E 4 -b 4 /b 0 R E L EA S E / O U T PU T
O N E U N IT O NE U N IT O N E UN IT O N E U N IT O NE U N IT TR ACK
T IM E TI ME TI M E T IM E T I ME S W IT C H
D E LAY u (t-D ) D E LAY u (t-D -1 ) D ELAY u (t-D -2 ) D EL AY u (t-D -3 ) D E LAY u (t-D -4 )
T 01 8 6 0 A
Figure 157-1 Internal Logic
The general digital controller block implements a deadtime queue for the error signal and previous output values. The
length of these queues are specified as integer multiples of sample time. On start-up and transfer from manual to automatic,
all elements of the error queue are initialized with the current error value, and the output queue is initialized with the track
value minus the feedforward. Both queues are of the first-in, first-out (FIFO) type. A new value is placed in the queue at
each execution time; values already in the queue are shifted one element to make room for the new value, and the oldest
value in the queue is discarded.
The internal control output of the general digital controller block is formed by adding together the following values:
a0 /b0X (fifth oldest value in error queue)
a1 /b0X (fourth oldest value in error queue)
157-4 2VAA000844R0001 J
157. General Digital Controller Application
a2 /b0X (third oldest value in error queue)

a3 /b0X (second oldest value in error queue)
a4 /b0X (oldest value in error queue)
-b1 /b0X (fourth oldest value in output queue)
-b2 /b0X (third oldest value in output queue)
-b3 /b0X (second oldest value in output queue)
-b4 /b0X (oldest value in output queue)
The output is limited before it is output to the field and before it is used to update the output queue. The final output from the
general digital controller is the sum of this limited internal control output value and the feedforward signal.
2VAA000844R0001 J 157-5
Application 157. General Digital Controller
157-6 2VAA000844R0001 J
160. Inferential Smith Controller Explanation
160. Inferential Smith Controller

The inferential smith controller (ISC) function code provides predictive control on an error signal developed from the
process variable and set point inputs measured against an internal model of the process. The ISC controller utilizes a first
order dynamic model with deadtime to predict the current value of the process variable based on past values of the control
output. The ISC controller function block provides regulatory process control similar to a PID algorithm. However, the ISC
controller has the added advantage of effective control for processes with a significant transport delay (deadtime). The ISC
controller prevents controller windup by limiting control output to operator specified high and low limits. The ISC controller
also prevents windup in cascade configurations with the use of an external reference value.
Processes with long deadtimes are difficult to control with PID controllers using traditional tuning methods. The ISC
controller algorithm functionally replaces the standard PID controller function. The ISC controller easily deals with process
deadtime and tunes with a single tuning parameter.
S M ITH Outputs
S2 (1 60 )
SP
S1 N
PV
S5 C
S3 TR
S4 TS N R Control output (CO)
Specifications
S3 N 5 I Note 1 Block address of track reference value

0 = track
1 = release
S5 N 5 I Note 1 Block address of (cascade) external reference value
S6 N 0 I 0 or 1 External reference flag:

0 = normal
1 = use external reference
S7 Y 1.000 R Full Process model gain
S8 Y 0.000 R 0 - 9.2 E18 Process model deadtime (in secs)
S9 Y 0.000 R 0 - 9.2 E18 Process model lag time constant (in secs)
S10 Y 9.2 E18 R 0 - 9.2 E18 Controller tuning time constant (in secs)
S11 Y 105.000 R Full Control output high limit
S12 Y -5.000 R Full Control output low limit

NOTE:
160.1 Explanation
Many processes have open-loop step responses similar to the one shown in Figure 160-1. In an open-loop step test, the
controller is in manual and the controller output (CO) increases or decreases in a single step. The process response is the
behavior of the process variable (PV) in response to the CO change. In the test, PV and CO are initially at steady-state near
the desired operating point (i.e., the values of PV and CO are constant over a reasonable period prior to the CO step
2VAA000844R0001 J 160-1
Explanation 160. Inferential Smith Controller
change). The value of CO stays constant after the step change, and PV is monitored until it has reached a new constant
value.
CO
25% C2
C O = C 2 – C 1
10% C1
t0 TIM E
PV
70°C Y2
55°C
Y = Y 2 – Y 1
0.63  Y
30°C Y1
t0 t1 t2 TIM E
PR O C ES S
Y Y2 – Y1
(S 7) K = = MODE L
C O C 2 – C1 G AIN
PR O C ES S
(S 8) D = t1 – t 0 MODE L
D E A D TIM E
PR O C ES S
(S 9) L = t 2 – t1 MODE L
LA G T IM E
T 0 1 86 1 A
Figure 160-1 Process Model Parameters
The ISC controller uses three parameters to characterize the open-loop step process response: S7, process model gain
(K); S8, process model deadtime (D); and S9, process model lag time constant (L). Figure 160-1 shows an example of
these parameters. In this example, PV is initially at steady-state at 30 degrees Celsius and CO is at ten percent. CO
changes from ten percent to 25 percent at time t0. PV starts to move from its initial value at time t1 and reaches a new
steady-state temperature of about 70 degrees Celsius. Process model gain is the ratio of the steady-state change in PV to
the change in CO, for example,
70C – 30C
K = -------------------------------- = 2.67C  %
25% – 10%
In this example, K is a positive value (i.e., PV increases as CO increases and PV decreases as CO decreases). In other
cases, K may be a negative value (i.e., PV increases as CO decreases and PV decreases as CO increases).
Process model deadtime is the time of a change in the control output until a change in the process variable. Process model
lag time is the time to reach 63 percent of the final value after the response begins.
Inside the ISC controller function code calculations, the algorithm tries to predict the behavior of the real process based on
process model parameters S7, S8 and S9. Because these parameters are only approximations of the real process, there
will generally be errors in the prediction. A controller tuning parameter (S10), T, takes into account the effects of the
prediction error. Smaller values of T would result in more rapid changes in CO; whereas larger values of T would result in
slower changes in CO.
More specifically, if T is less than L, there is more lead action in the control output; if T is greater than L, there is more lag
action in the control output. Control output is limited to high and low limits specified in S11 and S12. Qualitatively, larger
values of T should be used if the model representation is poor, or quick and large movements of CO are undesirable. One
method for tuning is to initially set T to the sum of the process model deadtime (S8) and the process model lag time
constant (S9). Place the controller in auto, perform set point changes and adjust T to get a desirable response. Decrease T
if the closed-loop response appears too sluggish. Increase T if the closed-loop response is too oscillatory.
The process model parameters are approximate descriptions of the real process about a single operating point. The model
becomes less accurate as operating conditions move away from the initial point. Process model parameters may have to be
re-estimated as operating conditions change.
The ISC controller should not be used in highly nonlinear processes (example, pH control), or in very fast processes (i.e.,
processes with dynamics dominated by process gains with negligible deadtime and lag effects). The ISC controller is useful
for regulatory control with step-type disturbances (e.g., load disturbances through processes where deadtime is dominant
160-2 2VAA000844R0001 J
160. Inferential Smith Controller Specifications
over lag effects). The ISC controller provides bumpless tuning (i.e., CO will not jump as a result of changing the value of S7,
S8, S9 or S10). In addition, the ISC controller provides bumpless manual-to-auto transfer.
Figure 160-2 shows the use of an external reference signal in a cascade configuration. In this case, the outer loop model
refers to the effects of the inner loop PV on the outer loop PV; the inner loop model refers to the effects of the inner loop
manipulated variable (example, valve position) on the inner loop PV. The inner loop PV is the external reference signal to
the outer loop ISC controller. This prevents controller windup in the outer loop ISC controller should the inner loop saturate.
Specification S6 of the outer loop ISC controller must equal one.
SM ITH
S2 (1 6 0 ) S2
SP SP
O U TER CO SM IT H TO FIE L D
S1 S1
LOO P PV O TH E R PV C O N TRO L
S5 OR CO
PV C LO G IC D E VIC E
PID
S3 TR
S4 TS
IN N E R L O O P
O U TER LO O P
C O N TRO L L ER
IN N E R S6 = 1
LOO P
PV T 01 8 62 A
Figure 160-2 External Reference for Cascade Control
S1 – PV
Block address of process variable (PV).
S2 – SP
Block address of set point (SP).
S3 – TR
Block address of track reference (TR). The ISC control output (CO) will track the value in this block when the track switch
(TS) signal is zero.
S4 – TS
Block address of track switch (TS). The ISC control output (CO) will track <S3> when the value of TS is zero.
0 = track
1 = release
S5 – C
Block address of the cascade (C) external reference value. When the ISC controller is a control module or outer loop
controller in a cascade configuration, the control loop uses the external reference value to prevent controller windup should
the I/O module or inner loop controller saturate. Typically, the external reference value is the inner loop process variable. To
use the external reference value, S6 of the outer loop ISC controller must equal one.
S6
External reference flag. Set the value of S6 to one to use the external reference value defined in S5; otherwise, S6 should
always equal zero.
0 = normal configuration, external reference not used

1 = use external reference
S7, S8 and S9
Characterize the response of the process variable to a step change in control output. The ISC controller uses a first-order
lag with deadtime approximation of the actual process in its internal calculations. These parameters are the ISC process
model parameters. Refer to Figure 160-1 for sample calculations of these parameters.
S7 – K
Process model gain (K). K can be positive or negative.
S8 – D
Process model deadtime (D).
S9 – L
Process model lag time constant (L).
2VAA000844R0001 J 160-3
ISC Structure 160. Inferential Smith Controller
S10 – T
ISC controller tuning parameter (T). T must be greater than zero. Without information on model uncertainty, a starting point
for tuning T is to set it to the sum of D (S8) and L (S9).
For control with an accurate model, this parameter may be set to 30 percent of process lag time, L (S9). For slower
controller response, or when the process model is not considered accurate, the value of this parameter can be increased to
the process deadtime, D (S8) plus 300 percent of the process lag time, L (S9).
S11
High control output limit. This specifies the maximum output of the ISC controller block.
S12
Low control output limit. This specifies the minimum output of the ISC controller block.
160.2 ISC Structure
Figure 160-3 shows a block diagram representation of the ISC controller structure. In the diagram, U represents the effects
of disturbances on the process. Ue is an estimate of the disturbances and effects of modeling error. The ISC controller uses
a first-order with deadtime approximation of the process. If there are no modeling errors (i.e., process model equals
process), the process output is:
PV(s)  F(s) SP(s)  [1 – F(s)] U(s)

where:
1
F  s  = --------------- exp  – sD 
Ts + 1
IS C
CO N T RO L LE R U
CO +
+ 1 LS + 1 + PV
SP PR O C ES S –
TS + 1 K
–
PR O CES S M O DE L
S6 = 0
K + ISC
EX T ER N A L S6 = 1 LS + 1 e -sD –
R EF E REN C E
Ue T 0186 3 A
Figure 160-3 ISC Structure
F(s) is the closed-loop response of the system to a set point change, and T is a measure of the closed-loop response
speed. The controller is basically a lead/lag feedforward controller with the disturbance estimated by subtracting the model
output from the actual measure process value. In real applications, there are always modeling errors and T is a tuning
parameter in the lead/lag controller.
Control output constraints and process constraints must be considered in any controller design. In the ISC controller
algorithm, this is done by constraining the controller output to within high and low limits (S11 and S12), and by taking into
account the predicted model output in the controller calculations. If the control output saturates at a control limit, the input to
the model will be a constant value (CO = high limit or low limit) and hence the predicted model output also reaches a
constant value.
The controller sees the saturated predicted model output and prevents the control calculations from growing beyond the
control limits (i.e., prevents controller windup). The same reasoning applies to cascade control. When using the ISC
controller as the control loop, the inner loop PV is the external reference signal (Figure 160-2) and the input to the process
model (Figure 160-3, S6=1). This external reference feedback prevents controller windup should the inner loop saturate.
160-4 2VAA000844R0001 J
160. Inferential Smith Controller Applications
160.3 Applications
Figure 160-4 shows how to use the inferential smith controller with a manual/automatic station (function code 80).
M /A
M F C /P
S1 (8 0 ) O F F-G AS
PV SP
S2 22 VALVE
SP O
S3 21
A A
S4 23
TR C /R
S5 25
TS C
S18 24
MI C -F
S19 26
AX
S20
C /R
S21
LX
S22 CX
S24
HAA
SM IT H S25 L AA
O U TL ET S2 (1 6 0 ) S26
SP H DA
TE M PE R ATU R E S1 20 S27
PV L DA
S5 C
S28 AO
S3 S29 TRS2
TR
S4 TS
S30 TRPV
T
T 01 8 64 A
Figure 160-4 Using the ISC with the M/A Station
2VAA000844R0001 J 160-5
Applications 160. Inferential Smith Controller
160-6 2VAA000844R0001 J
161. Sequence Generator
161. Sequence Generator

The sequence generator function code contains a series of masks that are stepped through on an event or time basis. The
masks define the states of eight boolean outputs for each step.
In addition to the eight step masks, there is a default mask often called Step 0 or E-STOP (executed stop). If the block
resets or jumps to Step 0 E-STOP is the output and defines the state of the outputs. Sequential stepping in ascending
numerical order, and jumping to specific step numbers are the two methods of event stepping.
If a sequence has more than eight steps, sequence generator blocks can link in series. If there are more than eight outputs
per step, sequence generator blocks can be linked in parallel to provide the required number of outputs.
Unlike the other batch function blocks (123, 124, 129, etc.), the last sequence generator in the series is the output.
Outputs
SE Q G E N
CAS 1
S2 N
T 2
S3
SH 3
N+1 N B Output 1 of current step
S4 N+2
TH 4
S5
R 5
N+3
N+1 B Output 2 of current step
S6 N+4
J 6
S7 N+5
J# 7
N+6
S8 8
D
N+7
CS
N+8 N+3 B Output 4 of current step
T
N+9
STP
N + 10 N+4 B Output 5 of current step
N+8 R Current step number
N+9 R Seconds remaining in current step
N+10 B Step taken (logic 0 to 1 transition)
Specifications
S1 N 0 I Note 1 Starting block address of previous sequence

generator in series (0 = first in series)
S2 N 0 I Note 1 Block address of step trigger (0 to 1 transition)
S3 N 0 I Note 1 Block address of step hold:

0 = release
1 = hold
S4 N 0 I Note 1 Block address of step timer hold:

0 = release
1 = hold
S5 N 0 I Note 1 Block address of reset trigger (0 to 1 transition)
S6 N 0 I Note 1 Block address of step jump trigger (0 to 1 transition)
S7 N 5 I Note 1 Block address of step jump number
S8 N 0 I Note 1 Block address of output disable flag
S9 Y 0.000 R Full Disable mask
S10 Y 0.000 R Full Step 1 output mask
S11 Y 0.000 R Full Step 1 time in secs
2VAA000844R0001 J 161-1
Explanation 161. Sequence Generator

NOTE:
161.1 Explanation
The sequence generator block controls a batch process by providing outputs that define the operating states for each step
in a process for all the devices used. Figure 161-1 illustrates a typical arrangement. A sequence monitor or multi-sequence
monitor block monitors the process and selects the order in which the process steps execute. The step number then goes to
the sequence generator block that outputs the values identified with that step. Any number of sequence generator blocks
can be linked in series or parallel to provide the required number of outputs or steps.
Figure 161-2 illustrates a configuration with sequence generator blocks ganged in series and in parallel. Sequence
generators in series increase the step range by factors of eight. In Figure 161-2, blocks 60, 71 and 82 are in series,
providing 24 steps. Running parallel to this sequence is the block series 93, 104 and 115. The first sequence generator has
the value of zero for S1, identifying it as the first block in the series, with outputs zero through eight. In the figure, blocks 60
and 93 are the first in the series. The second block in the series must be greater in number than the first. Blocks 71 and 104
are the second blocks in the series, they have values of 60 and 93, respectively, for S1. This shows that they are not the first
blocks in the series. They have step outputs nine through 16. This series relationship continues until the maximum number
of steps needed is reached.
Sequence generators in series monitor the step number and step taken outputs from the preceding sequence generator
block. Therefore, the outputs of the last sequence generator in a series represent the outputs used to drive device driver
blocks.
In batch control applications, it is necessary to run the outputs (step jump trigger and step jump number) from the lead
sequence monitor block (function code 124) to all of the sequence generator blocks used by the sequence. In this way, all
blocks will move from step to step in unison. Furthermore, when using a sequence monitor (function code 124) or multi-
monitor block (function code 135), leave all step timers in the sequence generator blocks at the default (zero) value.
Figure 161-3 shows an application not using sequence monitor or multi-sequence monitor blocks. When sequence monitor
or multi-sequence monitor blocks are not used, all sequence generator blocks ganged together must reference the same
reset, jump trigger, jump step number, and disable inputs. This will force the sequence generator blocks to work in unison. If
the step timer is being used, a good technique is to take the step taken indicator and current step output from the last
sequence generator block for the first eight outputs, and use them as the step trigger and step number inputs for the other
sequence generator blocks used in the sequence. Set the step timers for outputs greater than eight to zero. This way, the
first series chain of sequence generator blocks will be timer controlled, and will drive the remaining blocks in unison.
161-2 2VAA000844R0001 J
161. Sequence Generator Explanation
C O N TR O L IN PU T
C O N T RO L O U T PU T C O N TRO L O U T P U T
D D R IV E S TATU S S TAT U S
S1 (123 ) S E Q GE N
CI O D E VM O N SE Q M O N S1 (1 61 )
S2 N S1 (12 5) S2 (124 ) CAS 1
FB 1 ST CS JT S2 N
S3 N+1 S2 N S3 N +1 T 2
FB 2 T J# S3 N +1
S5 S3 S4 N SH 3
OP SH S4 N +2
S6 S4 S5 TH 4
OS S AT S5 N +3
S5 S6 R 5
ES S6 N +4
S6 S7 J 6
SN S7 N +5
S7 S8 J# 7
SA P S8 N +6
S8 D 8
N +7
S9 CS
N +8
S 10 T
N +9
S 11 S TE P STP
N +1 0
S 12 TR IG G E R
S 13
FE E D BAC K S 14
IN P U T S S 15
S 16
S TE P N U M B E R
BM U X RDEMUX
S1 (11 9) S1 (126 )
1
S2 N N
2
S3 N+1
3
S4 N + 2 S TE P IN D IC ATO R S TO
4
S T E P TR IG G E R S S5 N + 3 AU X IL IA RY LO G IC S
5
F R O M AU X IL IA RY S6 N+4
6
L O G IC S N+5
S7 7
S8 N+6
8
S9 N+7
S 10
S 11
T 018 65 A
Figure 161-1 Controlling a Batch Process
S TE P
JU M P
N UM BE R
R ES ET
S EQ G E N S EQ G E N S EQ G E N
0 S1
1
(161) 60 S1
1
(161) 71 S1
1
(1 61 ) O UT PU T 1
CA S CA S CA S
S2 60 S2 71 S2 82
T 2 T 2 T 2
S3 61 S3 72 S3 83
SH 3 SH 3 SH 3
S4 62 S4 73 S4 84
S TE P TH 4 TH 4 TH 4
S5 63 S5 74 S5 85
JU M P R 5 R 5 R 5
T R IG G E R S6 64 S6 75 S6 86
J 6 J 6 J 6
S7 65 S7 76 S7 87
O UT PU T J# 7 J# 7 J# 7
D IS A B LE S8 66 S8 77 S8 88 O UT PU T 8
D 8 D 8 D 8
67 78 89
CS CS CS
68 79 90
T T T
69 80 91
ST P ST P S TP
70 81 92
S T EPS 0 - 8 ST EPS 9 - 1 6 S T E PS 17 - 24
S EQ G E N S EQ G E N S EQ G E N
0 S1
CA S 1
(161) 93 S1
CA S 1
(161) 1 04 S1
CA S 1
(1 61 ) O UT PU T 9
S2 93 S2 104 S2 1 15
T 2 T 2 T 2
S3 94 S3 105 S3 1 16
SH 3 SH 3 SH 3
S4 95 S4 106 S4 1 17
TH 4 TH 4 TH 4
S5 96 S5 107 S5 1 18
R 5 R 5 R 5
S6 97 S6 108 S6 1 19
J 6 J 6 J 6
S7 98 S7 109 S7 1 20
J# 7 J# 7 J# 7
S8 99 S8 110 S8 1 21
D 8 D 8 D 8
100 111 1 22
CS CS CS
101 112 1 23
T T T
102 113 1 24 O UT PU T 1 6
ST P ST P S TP
103 114 1 25
S T EPS 0 - 8 ST EPS 9 - 1 6 S T E PS 17 - 24
T 01 866 A
Figure 161-2 Series and Parallel to Provide 24 Steps for 16 Outputs
2VAA000844R0001 J 161-3
Specifications 161. Sequence Generator
ST EP
JU M P
NU MBE R
S EQ G E N S EQ G E N SEQ GEN
0 S1
CAS 1
(1 61 ) 60 S1
CA S 1
(1 6 1 ) 71 S1
CAS 1
(1 61 ) OUT PU T 1
S2 60 S2 71 S2 82
T 2 T 2 T 2
S3 61 S3 72 S3 83
SH 3 SH 3 SH 3
S4 62 S4 73 S4 84
ST EP TH 4 TH 4 TH 4
S5 63 S5 74 S5 85
JU M P R 5 R 5 R 5
T R IG G E R S6 64 S6 75 S6 86
J 6 J 6 J 6
S7 65 S7 76 S7 87
J# 7 J# 7 J# 7
S8 66 S8 77 S8 88 OUT PU T 8
D 8 D 8 D 8
67 78 89
CS CS CS
68 79 90
T T T
69 80 91
ST P STP ST P
70 81 92
S T E PS 0 - 8 S TEPS 9 - 16 S T E P S 1 7 - 24
S EQ G E N S EQ G E N SEQ GEN
0 S1
1
(1 61 ) 93 S1
1
(1 6 1 ) 104 S1
1
(1 61 ) OUT PU T 9
CAS CA S CAS
S2 93 S2 104 S2 115
T 2 T 2 T 2
S3 94 S3 105 S3 116
SH 3 SH 3 SH 3
S4 95 S4 106 S4 117
TH 4 TH 4 TH 4
S5 96 S5 107 S5 118
R 5 R 5 R 5
S6 97 S6 108 S6 119
J 6 J 6 J 6
S7 98 S7 109 S7 120
J# 7 J# 7 J# 7
S8 99 S8 110 S8 121
D 8 D 8 D 8
1 00 111 122
CS CS CS
1 01 112 123
T T T
1 02 113 124 OUT PU T 16
ST P STP ST P
1 03 114 125
S T E PS 0 - 8 S TEPS 9 - 16 S T E P S 1 7 - 24
T 01 8 6 7 A
NOTE: S11, S13, S15, S17, S19, S21, S23 and S25 of blocks 60, 71 and 82 are all nonzero. S11, S13, S15,
S17, S19, S21, S23 and S25 of blocks 93, 104 and 115 are all zero.
Figure 161-3 Series and Parallel to Provide Automatic Timed Stepping
With series sequence generator blocks, the sequence generator block handling outputs one through eight must have a
lower block address than the block for Steps 9 through 16. Likewise, the sequence generator block Steps 9 through 16 must
have a lower block address than the one for Steps 17 through 24. This is true for all chained blocks.
Processing of inputs to sequence generator blocks is done in the following order: reset, disable, jump, step hold, next step,
and time hold.
To define the output masks, the operator enters a real value that internally converts to binary digits. The operator defines
the output values needed for a given step, then converts them to a real number as shown in Table 161-1. The real number
representing the desired output is the step mask for the desired step output.
Table 161-1 Definition of Step Inputs for Sequence Generator Blocks
MSB Bit number LSB

Types of Values
1 2 3 4 5 6 7 8
Weighted decimal value 128 64 32 16 8 4 2 1
Example output values needed for a given step 1 0 1 0 0 1 0 1
S1 – PREV
(Block address of previous sequence generator block in series) If the value equals zero, then the block is the first in
the series. Each sequence generator block can output eight values for eight steps of a process. If more steps are required,
the blocks can be ganged in series. If more than eight outputs are required, the blocks can be ganged in parallel.
S2 – STRIG
(Block address of step trigger) The value in this block controls sequence generator step execution when the sequence
generator block is performing sequential stepping. On a zero to one transition of this input, the block will execute the step
number which immediately follows the current step number.
161-4 2VAA000844R0001 J
161. Sequence Generator Outputs
S3 – HOLD
(Block address of step hold input) When this input is a one, and steps are being executed sequentially, the advance to
the next step is disabled. When the input goes to zero, the next step will be executed. The step hold will not disable the step
timer, but will prevent the block from executing the next step once the timer has expired. All blocks in series must have the
same step hold input.
0 = execute next step

1 = hold
S4 – THOLD
(Block address of timer hold input) When this input is a one, the step timer is frozen at its current value. An input of zero
will cause the timer to resume timing exactly where it left off. All blocks in series must have the same timer hold input.
0 = release
1 = hold
S5 – RESET
(Block address of reset trigger) On a zero to one transition of this input, the block will output the disable mask and reset
to Step 0. All sequence generators ganged together in series or parallel must have the same reset input.
S6 – JMPTRG
(Block address of step jump trigger) When the value in the block indicated by this specification makes a zero to one
transition, the step indicated by the step jump number (S7) will be executed.
S7 – JMPSTP
(Block address of the step to be executed when the jump step trigger makes a 0 to 1 transition) Jumping to a step
number less than zero will cause a jump to Step 0 (same as reset). Jumping to a number higher than the highest step
number available in the series chain will cause the highest available step number to be executed. All sequence generator
blocks in a series or parallel chain must have the same jump step number and jump step trigger to operate in unison.
S8 – DISFLG
(Block address of output disable trigger) When this output is equal to one, it sets the outputs equal to the disable mask,
but does not move the step number. If the steps are timed, the output disable trigger will hold the block at the current step
and freeze the step timer. The output disable trigger does not disable step triggers; the block will still execute the sequence
and advance the step number, but the output will be the disable mask. All sequence generators ganged together in series or
parallel must have the same disable trigger.
S9 – DISMSK
(Disable mask) Real value which, when subjected to a binary conversion as shown in Table 161-1, provides safe outputs
for all devices controlled by the sequence generator block. The disable mask is output in three situations: when the disable
input is set, when the block is reset, and after all steps have been completed. In batch control, the disable mask is the same
as Step 0 and is reserved as an E-STOP (executed stop).
S10, S12, S14, S16, S18, S20, S22 and S24

(Mask 1 through mask 8) Real values representing the output mask associated with Step 1 (mask one) through Step 8
(mask eight). The output mask is a series of binary digits defining the operating states for all devices associated with the
sequence generator block. Refer to Table 161-1 for the definition of step inputs for sequence generator blocks.
S11, S13, S15, S17, S19, S21, S23 and S25

(Time 1 through time 8) Represents the time in seconds that it will take to run the step. The individual step timers start
whenever the corresponding step is entered. If a step timer is enabled for a particular step, the sequence generator
automatically advances to the next sequential step when the step timer expires. Step timers are disabled when less than or
equal to zero. The timer hold and disable flags freeze the step timer. The step hold input does not freeze the step timer, but
does disable the advance to the next step when the timer expires. When the step hold is removed, the block will advance to
the next step. Adapting the value of a currently running step timer causes the timing to begin again at the adapted value.
Tuning any specification during an active step restarts the current step timer to its beginning value.
161.1.2 Outputs
N through N+7
Outputs (one through eight) of the current step. The output is a boolean value representing the operating state of the device
controlled by the sequence generator block. All outputs should be read from the last sequence generator block in the series.
2VAA000844R0001 J 161-5
Applications 161. Sequence Generator
N+8
Current step number.
N+9
Time remaining in current step in seconds.
N+10
Step taken indicator. This output reflects whether the next step has been taken. A zero to one transition of this output
indicates that the block has begun the next step in the sequence.
161.2 Applications
Refer to the applications section of function code 123 for an example of a sequence generator block used in batch control.
161-6 2VAA000844R0001 J
162. Digital Segment Buffer Explanation
162. Digital Segment Buffer

The digital segment buffer function code takes a snapshot of four digital values simultaneously to eliminate inconsistent
data within a segment. Any series of segment buffer blocks (analog or digital) unbroken by nonbuffer blocks is an
uninterruptible sequence within a segment. Thus, all outputs of the series of blocks are consistent for the duration of the
segment cycle.
Outputs
D S NAP
S2 N
S3 N+1 N B Value of first input
S4 N+2
N+3 N+1 B Value of second input
N+2 B Value of third input
N+3 B Value of fourth input
Specifications

NOTE:
162.1 Explanation
Use function code 162 in segments that are not high priority. This ensures a higher priority segment cannot interrupt the
current segment until all four specified inputs update. If a higher priority segment tries to interrupt the current segment after
one or more of these inputs update in the current cycle, this block suspends execution of the higher priority segment until it
receives the updated values for all four of the inputs. If the higher priority segment interrupts the lower priority segment
before any of the values update and while the function is executing, the previous outputs are used.
2VAA000844R0001 J 162-1
Explanation 162. Digital Segment Buffer
162-2 2VAA000844R0001 J
163. Analog Segment Buffer Explanation
163. Analog Segment Buffer

The analog segment buffer function code takes a snapshot of four analog values simultaneously. Simultaneous snapshots
eliminate the possibility of inconsistent data within a segment. Any series of segment buffer blocks (analog or digital)
unbroken by nonbuffer blocks is an uninterruptible sequence within a segment. Thus, all outputs of the series of blocks are
consistent for the duration of the segment cycle.
Outputs
AS N AP
S2 N
S3 N+1 N R Value of first input
S4 N+2
N+3
N+1 R Value of second input
N+2 R Value of third input
N+3 R Value of fourth input
Specifications

NOTE:
163.1 Explanation
Use the analog segment buffer function code in segments that are not the highest priority. This ensures a higher priority
segment cannot interrupt the current segment until all four of the specified inputs update. If a higher priority segment tries to
interrupt the current segment after one or more of these inputs update in the current cycle, this block suspends execution of
the higher priority segment until the four values update. If the higher priority segment interrupts the lower one before any of
the values update while this function is executing, the previous values are output.
NOTE: The output update is protected from interruption, but the function code execution could be interrupted while reading the
input values.
2VAA000844R0001 J 163-1
Explanation 163. Analog Segment Buffer
163-2 2VAA000844R0001 J
165. Moving Average Explanation
165. Moving Average

The moving average function code computes a moving average from n samples taken at a defined interval. The sample
buffer fills with an input value at the end of each cycle. At every sample interval, the current input value replaces the oldest
value in the buffer. At each sample interval, a new average is calculated.
Outputs
S1
M O VAVG
(1 6 5 )
S4 TS N
N R Sum of samples divided by the number of samples
Specifications
S1 N 5 I Note 1 Block address of averaged value
S2 N 1 I 1-255 Number of samples in moving average
S3 Y 1.000 R 0.0 - 9.2 E18 Sample interval in seconds
S4 N 1 I 0 or 1 Output track switch:

0 = track
1 = normal
NOTE:
165.1 Explanation
The moving average block calculates the average of n values by dividing the sum of the samples by the number of samples.
It operates in two modes, normal and track. In the normal mode, the block reads a new input, discards the oldest sample,
and calculates a new average each time the sample interval passes. In the track mode, the output equals the input. At each
cycle, the buffer fills with the tracked value.
The sample interval and the number of samples used are configurable. The samples are stored in a first in first out (FIFO)
buffer. During module startup, the FIFO buffer fills with the input values from each scan cycle. After startup, the moving
average function code computes the starting average with the first sample interval. Therefore, the first output is the same as
the input (first sample divided by one), the second output is the average of the first two inputs (first and second sample
divided by two), and so on.
Example:
If n equals five at power up and the input equals 2.0:
2.0 0.0 0.0 0.0 0.0
n = 1 valid sample
Output = – 2.0 + 0.0 + 0.0 + 0.0 + 0.0- = 2.0

-------------------------------------------------------------- ------- = 2.0
1 1
On second scan the input equals 4.0:
4.0 2.0 0.0 0.0 0.0
n = 2 valid samples
Output = 4.0 + 2.0 + 0.0 + 0.0 + 0.0- = 6.0

-------------------------------------------------------------- ------- = 3.0
2 2
2VAA000844R0001 J 165-1
Specifications 165. Moving Average
S1 – X
Value of the current input.
S2 – N
Number of samples used in the average calculation.
S3 – INT
Sample interval in seconds. This specification defines the length of time between inputs. It also defines the length of time
between calculations, because a new average is calculated each time a new value is added.
S4 – TRCK
Block address of track input. In the track mode, the output tracks the input; there is no operation performed on the input.
The tracked values fill the input buffer, but they are not averaged. In the normal mode, the input feeds into a sample buffer
and a new output is calculated each time an input is entered.
0 = track
1 = normal
165.1.2 Output
N
Sum of the samples divided by the number of samples in the normal mode. In the track mode, the output equals the input.
In both modes, the current calculated values are not retained.
NOTE: In normal mode, the moving average output is valid only after n samples have been processed.
165-2 2VAA000844R0001 J
166. Integrator Explanation
166. Integrator
The integrator function code computes the integral of an input signal using the trapezoidal rule of integration and double
precision arithmetic. The result of the integration times the gain (S7) is the output. Integration begins at an initial value (S3).
High (S5) and low (S6) limits affect the output (N).
Specification S2 specifies the time units: seconds, minutes or hours.
The automatic reset option (S8 equals one) restarts the integration from the initial value when the integrator reaches the
high or low limit. In the automatic reset mode, the limit flag is set for one cycle after the integrator reaches a limit. In
automatic reset mode, a counter or second integrator can count overflows from the integrator, forming a multistage
integration.
Outputs
S1 (1 6 6 )

S3
PV
IC Q
S4 N+1
TS
N R Value of integral
N+1 B Limit flag:

0 = good
1 = high or low limit reached
Specifications
S2 N 1 I 0-2 Time base of integration:

0 = seconds
1 = minutes
2 = hours
S3 N 5 I Note 1 Block address of initial value
S4 N 0 I Note 1 Block address of reset signal:

0 = reset
1 = run
S5 Y 9.2 E18 R Full High limit
S6 Y -9.2 E18 R Full Low limit
S8 Y 0 B 0 or 1 Automatic reset:
0 = off
1 = on

NOTE:
166.1 Explanation
The integrator block computes the area under a curve using the trapezoid rule:
t = nh
Y Y
t = 0 x(t)dt = h -----0 + Y 1 + Y 2 +  + Y n – 1 + -----n
2 2
2VAA000844R0001 J 166-1
Specifications 166. Integrator
where:
h = Time between sample points on the curve (step size).
The integrator block reads the segment control block to
determine the scan time for the segment that the
integrator block is in.
n = Number of samples taken. The samples are always
taken at equal intervals (h).
Y = Value of the integrated signal. Y0 equals the signal at
the start of the integration, and Yn equals the signal at
interval n of the integration.
The trapezoid rule executes by the integrator block with h equal to scan time. This provides the smallest possible step size.
Since the error in the trapezoid rule is a function of step size, the smallest step size results in the smallest error. The
integrator block then scales the result of the integration based on the value of S2. Specification S2 reflects the time base of
the integrated signal. For example, if input flow is in gallons per minute, S2 equals one (minute).
The integrator block operates in two modes: normal and track. In normal mode, the block integrates the values from the
input block S1 on the time basis selected with S2. In track mode, the output tracks the input and integration does not take
place.
NOTE: The two modes, normal and track, are based on the reset input signal set in S4. When S4 is set to one, integration takes
place. When S4 is set to zero, it tracks the S3 input.
S1 – X
Block address of the desired signal.
S2 – TB
Time base of the integration.
0 = seconds
1 = minutes
2 = hours
S3 – INIT
Block address of the initial value. The initial value is the output value during start-up and after an automatic or forced reset.
S4 – RESET
Block address of the reset signal. When <S4> equals zero, the integral output N initializes to the initial value <S3>. When
<S4> equals one, integration takes place.
S5 – HL
High output limit. When the output reaches or exceeds this value and S8 equals one, the block resets to the initial value.
S6 – LL
Low output limit. When the output reaches or falls below this value and S8 equals one, the block resets to the initial value.
S7 – K
Gain value. This specification scales the output N to a desired value range.
S8 – AR
Automatic reset flag. In the automatic reset mode, the block resets to a defined initial input <S3> value after the output
value reaches either limit.
0 = off (no reset)

1 = on (automatic reset)
166.1.2 Outputs
N
Value of the integral. If the value of the integral reaches or exceeds either of the limits and S8 equals zero, the output holds
at the limit and the limit flag is set.
166-2 2VAA000844R0001 J
166. Integrator Outputs
N+1
Limit flag. This output is a boolean signal that indicates when the integral output N has reached or exceeded the high or low
limit specified by S5 or S6. If the block is in automatic reset mode, this value goes to one for one cycle when the integral
reaches either limit. After the cycle, the value returns to zero. If the block is not in automatic reset mode, this value goes to
one and remains there as long as the integral is at the limit.
0 = good
1 = limit reached or exceeded
2VAA000844R0001 J 166-3
Outputs 166. Integrator
166-4 2VAA000844R0001 J
167. Polynomial
167. Polynomial
The polynomial function code implements a seventh order polynomial.
S1 (1 6 7 )
PO LY
N
Output  Ax 7  Bx 6  Cx 5  Dx 4  Ex 3  Fx 2  Gx  H
Two specifications define the coefficients A through H:
• Tunable mantissa value.
• Nontunable power of ten.
The actual value of the coefficient is the product of the mantissa and the power of ten. For example:
A  S16  10 S17  Aman  10 Aexp
NOTES:
1. When function code 167 is utilized as a shaping algorithm for analog in/channel (function code 222), its tunable specifications
are not adaptable.
2. When function code 167 is used as a shaping algorithm, it can not at the same time also be used as a logic function because
the block output will not respond to the specification S1 input.
3. Multiple instances and combinations of function code 177 and 222 function blocks may utilize the same function code 167
function block as a shaping algorithm. The function code 167 shaping algorithm function block is not required to be in the same
segment as the function code 177 or function code 222 blocks.
Outputs
N R Result of polynomial evaluation
Specifications
S1 N 5 I Note 1 Block address of X input
S2 Y 0.000 R Full Mantissa of H coefficient
S3 N 0.000 R Full Power of 10 of H coefficient
S4 Y 0.000 R Full Mantissa of G coefficient
S5 N 0.000 R Full Power of 10 of G coefficient
S6 Y 0.000 R Full Mantissa of F coefficient
S7 N 0.000 R Full Power of 10 of F coefficient
S8 Y 0.000 R Full Mantissa of E coefficient
S9 N 0.000 R Full Power of 10 of E coefficient
S10 Y 0.000 R Full Mantissa of D coefficient
S11 N 0.000 R Full Power of 10 of D coefficient
S12 Y 0.000 R Full Mantissa of C coefficient
S13 N 0.000 R Full Power of 10 of C coefficient
S14 Y 0.000 R Full Mantissa of B coefficient
2VAA000844R0001 J 167-1
167. Polynomial
S15 N 0.000 R Full Power of 10 of B coefficient
S16 Y 0.000 R Full Mantissa of A coefficient
S17 N 0.000 R Full Power of 10 of A coefficient

NOTE:
167-2 2VAA000844R0001 J
168. Interpolator
168. Interpolator
The Interpolator function code outputs a value determined by a two dimensional linear interpolation of the two inputs. The
coordinates of the values within a defined five-by-five table are the basis of the interpolation. If either input is outside the
table, the first output becomes the largest possible number. The second output is a boolean value that indicates if the input
points are in the five-by-five table range. If either input is outside the table, the second output becomes a one.
Outputs
IN P O L
X R
S2 N
B
Y
N+1 N R Interpolated output value
N+1 B Range of inputs:

0 = good
1 = at least one input is out of range
Specifications
S1 N 6 I Note 1 Block address of X value
S2 N 6 I Note 1 Block address of Y value
S3 N 0.000 R Full Minimum value of X (X coordinate of Z11)
S4 N 100.000 R Full Maximum value of Y (Y coordinate of Z11)
S5 N 100.000 R Full Maximum value of X (X coordinate of Z55)
S6 N 0.000 R Full Minimum value of Y (Y coordinate of Z55)
S7 Y 0.000 R Full Z11 table entry
2VAA000844R0001 J 168-1
Explanation 168. Interpolator

NOTE:
168.1 Explanation
Interpolation determines the value of the dependent variable Z based on the values of the two independent variables X, Y.
Specifications S3 through S6 specify the high and low limits for the independent variables. The five-by-five table shown in
Figure 168-1 is for the interpolation. Input Z11 is the value of the dependent variable Y that corresponds to the maximum
value of the Y variable and the minimum value of the X variable. Likewise, input Z55 is the value of the dependent variable
that corresponds to the minimum value of the Y variable and the maximum value of the X variable. If either of the dependent
variable values go outside the maximum value in the table, the output becomes the largest possible number (Z11 and Z55).
The increments of X must be equal and the increments of Y must be equal. X and Y need not be equal to each other.
Z 11 Z 12 Z 13 Z 14 Z 15
Z 21 Z 22 Z 23 Z 24 Z 25
Z 31 Z 32 Z 33 Z 34 Z 35
Z 41 Z 42 Z 43 Z 44 Z 45
Z 51 Z 52 Z 53 Z 54 Z 55
Figure 168-1 Five-by-Five Array Used by Interpolation Block
This block can easily handle any situation requiring a two dimensional linear interpolation, for example, steam tables. Using
temperature and pressure as the X and Y variables, and enthalpy as the Z variable, the user could find the enthalpy
associated with any temperature pressure combination that is within the confines of the table.
Implementing this block requires the creation of a lookup table and entering it into the block via S7 through S31. For
example, if using this block for enthalpy values, go to the steam tables, and transfer the information needed into the block
via the specifications. The values in the table are pre-defined values of the dependent variable that correspond to the
designated values of the independent variables.
The block calculates the interpolated output value with the equations:
 Z Y1 – Z Y2    Y act – Y min 
Output = ------------------------------------------------------------------
- + Z Y1
Y span
where:
 X act – X m in    Z  X m ax Y m in  – Z  X min Y min  

ZY1 = - + Z  X m in Y m ax 
----------------------------------------------------------------------------------------------------------------------
X span
 X act – X min   Z  X m in Y max  – Z  X max Y max  

ZY2 = ------------------------------------------------------------------------------------------------------------------------- + Z  X m in Y max 
X span
Xact = Actual value of X.

Xmin = Value of X for column before Xact.
Xmax = Value of X for column after Xact.
168-2 2VAA000844R0001 J
168. Interpolator Applications
Xspan = Range of X values between columns. The range between

columns is automatically defined when selecting the
minimum and maximum values for X. Since the data table is
divided into five columns,
max X –X
m in
the range between columns = -----------------------------
- .
4
Yact = Actual value of Y.
Ymin = Value of Y for row before Yact.
Ymax = Value of Y for row after Yact.
Yspan = Range of Y values between rows. The range
between rows is automatically defined when
selecting the minimum and maximum values for
Y. Since the data table is divided into five rows,
max Y –Y
m in
the range between rows = ----------------------------
-
4
Z(Xnnn, Ymmm) = The Z value in the array corresponding to the X
and Y values defined by nnn and mmm.
168.2 Applications
Use this block in any situation requiring the linear interpolation of one variable from the values of two others. External logic
is easily implemented to form a large lookup table from multiple Interpolator blocks. The following examples illustrate use of
the Interpolator block for both two dimensional and single dimensional interpolation.
The Interpolator block can be used to determine steam properties as mentioned earlier. First, select the range of X and Y, in
this case, pressure (P) and temperature (T). Since steam table data is in absolute pressure, Table 168-1 uses pounds per
square inch absolute, and the range of pressure is altered for input to the Interpolator block.
Table 168-1 Interpolator Block Determines Steam Properties
Pabs T
Pgage s h
0 - 600 psia 200° - 800°F
0.304 15 200 1.7472 1144.70

(Tsat = 213.0) 350 1.8437 1216.20
500 1.9242 1287.30
650 1.9940 1359.40
800 2.0563 1433.20
150.304 165 200 0.2938 168.44

(Tsat = 366.0) 350 1.5518 1186.60
500 1.6485 1272.80
650 1.7240 1370.70
800 1.7885 1427.00
300.304 315 200 0.2936 168.78

(Tsat = 421.0) 350 1.4552 1155.90
500 1.5635 1255.90
650 1.6465 1341.40
800 1.6922 1420.70
2VAA000844R0001 J 168-3
Applications 168. Interpolator
Table 168-1 Interpolator Block Determines Steam Properties (Continued)
Pabs T
Pgage s h
0 - 600 psia 200° - 800°F
450.304 465 200 0.2935 169.11

(Tsat = 460.0) 350 1.3829 1121.50
500 1.5043 1236.20
650 1.5968 1331.50
800 1.6667 1414.20
600.304 615 200 0.2933 169.45

(Tsat = 489.0) 350 1.3195 1083.20
500 1.4542 1213.40
650 1.5587 1320.90
800 1.6320 1407.60
The abrupt changes in the original s and h values show that the values are on both sides of the saturation line. Verify this by
looking at the saturation temperature (Tsat). In order to have valid data down to the saturation line (only in the superheated
region), extrapolate valid superheated data down to the next lower temperature. At 15 pounds per square inch absolute, the
superheated region permits temperatures down to 213 degrees Fahrenheit. When using the 200 degrees Fahrenheit value
of h (168.09) for extrapolation, the Interpolator block calculates h at 275 degrees Fahrenheit as 692.1. The correct value is
1180.7.
Obviously, there is a need to determine a new value of the minimum allowable temperature for superheated steam (from
steam tables: T = 220, h = 1154.2). By using these two points (1216.2 and 1154.2), extrapolate linearly to get h = 1144.7 at
T = 200.
Similar calculations are made for the remaining pressures. The below saturation line value remaining (200 degrees
Fahrenheit for P  165 psia) can be made equal to the 350 degrees Fahrenheit value or remain as they are (current
calculations never permit their use). Additional function blocks may be added to monitor below superheated values. The
second output of the Interpolator block (status) determines if the pressure is less than 15 pounds per square inch absolute.
Low pressures cause fixed values of h and s to be output from the block.
Use the Interpolator block for single dimensional interpolation by setting the range of y equals zero to ten, and fixing the y
input (S2) at 0.0. Then only one row (y = 0.0) needs filled in. This function block will linearly interpolate between two values
in its table. For curve segments that do not have inflection points (second derivative crossing through zero), the resulting
error always has the same sign as shown in Figure 168-2. For applications requiring greater accuracy, use a function
generator block. When linearizing the curve with a function generator block, the straight lines are selected such that errors
are equal on both sides of the curve as shown in Figure 168-3. If a segment requires greater accuracy (such as around an
operating point), the function generator breakpoints can be spaced closer together.
T 0 1 8 68 A
Figure 168-2 Approximation of Curve Using Interpolator
T0 1 86 9 A
Figure 168-3 Approximation of Curve Using Function Generator
168-4 2VAA000844R0001 J
169. Matrix Addition
169. Matrix Addition

The matrix addition function code adds two three-by-three matrices to provide a three-by-three matrix output. Use this
operation for modeling and simulations, and advanced control strategies.
Outputs
S1
[A D D ]
(1 6 9 )
S2 N
S3 N+1 N R Sum of A11 + B11 or <S1> + <S10>
S4 N+2
S5 N+3 N+1 R Sum of A12 + B12 or <S2> + <S11>
S6 N+4
S7 N+5 N+2 R Sum of A13 + B13 or <S3> + <S12>
S8 N+6
N+7
S9
N+8
N+3 R Sum of A21 + B21 or <S4> + <S13>
S10
S11
S12
N+4 R Sum of A22 + B22 or <S5> + <S14>
S13
S14 N+5 R Sum of A23 + B23 or <S6> + <S15>
S15
S16 N+6 R Sum of A31 + B31 or <S7> + <S16>
S17
S18 N+7 R Sum of A32 + B32 or <S8> + <S17>
N+8 R Sum of A33 + B33 or <S9> + <S18>
Specifications
S1 N 5 I Note 1 Block address of A11 value
S10 N 5 I Note 1 Block address of B11 value
2VAA000844R0001 J 169-1
Explanation 169. Matrix Addition

NOTE:
169.1 Explanation
Figure 169-1 shows how this block adds the two matrices.
The results of the matrix addition are real values that are output from the block as shown in Figure 169-1. The values in the
matrices are defined by their block addresses. The A matrix is filled in numerical order, followed by the B matrix.
A 11 A 12 A 13 B 11 B 12 B 13 A 11 + B 11 A 12 + B 12 A 13 + B 13
A 21 A 22 A 23 + B 21 B 22 B 23 = A 21 + B 21 A 22 + B 22 A 23 + B 23
A 31 A 32 A 33 B 31 B 32 B 33 A 31 + B 31 A 32 + B 32 A 33 + B 33
or
 S1  S2  S3  S10  S11  S12 N N+1 N+2

 S4  S5  S6 +  S13  S14  S15 = N+3 N+4 N+5
 S7  S8  S9  S16  S17  S18 N+6 N+7 N+8
Figure 169-1 Matrix Addition
169-2 2VAA000844R0001 J
170. Matrix Multiplication
170. Matrix Multiplication

The matrix multiplication function code multiplies a pair of three-by-three matrices. The output is a three-by-three matrix.
Like matrix addition (function code 169), use matrix multiplication for system modeling and simulation. The outputs show
the effects of various values of several different parameters.
Matrix multiplication can implement advanced control strategies that incorporate several independent variables.
Outputs
[X ]
(1 7 0 )
S1
S2 N
S3 N+1 N R Product (A11  B11)  (A12  B21)  (A13  B31)
S4 N+2 or (<S1>  <S10>)  (<S2>  <S13>)  (<S3>  <S16>)
S5 N+3
S6 N+4 N+1 R Product (A11  B12)  (A12  B22)  (A13  B32)
S7 N+5
or (<S1>  <S11>)  (<S2>  <S14>)  (<S3>  <S17>)
S8 N+6
N+7
Product (A11  B13)  (A12  B23)  (A13  B33)
S9
S10 N+8 N+2 R
S11 or (<S1>  <S12>)  (<S2>  <S15>)  (<S3>  <S18>)
S12
S13 N+3 R Product (A21  B11)  (A22  B21)  (A23  B31)
S14 or (<S4>  <S10>)  (<S5>  <S13>)  (<S6>  <S16>)
S15
S16
N+4 R Product (A21  B12)  (A22  B22)  (A23  B32)
S17
S18
or (<S4>  <S11>)  (<S5>  <S14>)  (<S6>  <S17>)

or (<S4>  <S12>)  (<S5>  <S15>)  (<S6>  <S18>)

or (<S7>  <S10>)  (<S8>  <S13>)  (<S9>  <S16>)

or (<S7>  <S11>)  (<S8>  <S14>)  (<S9>  <S17>)

or (<S7>  <S12>)  (<S8>  <S15>)  (<S9>  <S18>)
Specifications
2VAA000844R0001 J 170-1
Explanation 170. Matrix Multiplication

NOTE:
170.1 Explanation
The matrix multiplication function code multiplies two three-by-three matrices to form a three-by-three matrix of real values.
Matrices multiply row by column. To form the first row of the product matrix, row one of matrix A multiplies by columns one,
two and three of matrix B. The second and third rows of the product matrix form similarly. Row two of matrix A multiplies by
columns one, two and three of matrix B to form the second row of the product matrix and row three of matrix A multiplies by
columns one, two and three of matrix B to form the last row of the product matrix.
The row by column multiplication sums the products of the like elements to get one value. The first value in row one of
matrix A multiplies by the first value in column one of matrix B. That product adds to the products of the second and third
values to produce the value in the product matrix as Figure 170-1 shows.
A 1 1 A 12 A 13 B 1 1 B 12 B 13 A 1 1 B 11 + A 12 B 2 1 + A 1 3 B 31 A 1 1 B 12 + A 12 B 2 2 + A 1 3 B 32 A 1 1 B 13 + A 12 B 2 3 + A 1 3 B 33
A 2 1 A 22 A 23 x B 2 1 B 22 B 23 = A 2 1 B 11 + A 22 B 2 1 + A 2 3 B 31 A 2 1 B 12 + A 22 B 2 2 + A 2 3 B 32 A 2 1 B 13 + A 22 B 2 3 + A 2 3 B 33
A 3 1 A 32 A 33 B 3 1 B 32 B 33 A 3 1 B 11 + A 32 B 2 1 + A 3 3 B 31 A 3 1 B 12 + A 32 B 2 2 + A 3 3 B 3 2 A 3 1 B 13 + A 32 B 2 3 + A 3 3 B 3 3
OR
(S1) (S2 ) (S 3) (S10 ) (S 11) (S12 ) N N +1 N +2

(S4) (S5 ) (S 6) x (S13 ) (S 14) (S15 ) = N +3 N +4 N +5
(S7) (S8 ) (S 9) (S16 ) (S 17) (S18 ) N +6 N +7 N +8
T 01 9 67 A
Figure 170-1 Internal Operation of Matrix Multiplication Block
170-2 2VAA000844R0001 J
171. Trigonometric
171. Trigonometric
The trigonometric function code calculates the standard trigonometric functions.
• Sine.
• Cosine. S1
T R IG
(1 7 1 )
N
• Tangent.
• Cotangent.
• Secant.
• Cosecant.
The input may be expressed in either degrees or radians. The output is the selected trigonometric function of the input value
multiplied by the gain factor.
Use trigonometric functions for performance calculations and monitoring.
Outputs
N R Trigonometric value multiplied by the gain factor
Specifications
S2 N 0 I 0 or 1 Type in input <S1>:

0 = radians
1 = degrees
S3 N 0 I 0-5 Trigonometric function performed on input <S1>:

0 = sine 3 = cotangent
1 = cosine 4 = secant
2 = tangent 5 = cosecant
S4 Y 1.000 R Full Gain factor

NOTE:
2VAA000844R0001 J 171-1
171. Trigonometric
171-2 2VAA000844R0001 J
172. Exponential
172. Exponential
The exponential function code raises e to the power specified by the input <S1>. The result is multiplied by the gain factor
(S2).
Use the exponential function code in process control for performance calculations and monitoring capability.
Outputs
S1 (1 7 2 )
EXP
N
N R Value = K  ex
Specifications
S1 N 5 I Note 1 Block address of input value X

NOTE:
2VAA000844R0001 J 172-1
172. Exponential
172-2 2VAA000844R0001 J
173. Power
173. Power
The power function code raises the value of the first input <S1> to the power specified by the second input <S2>. The result
is multiplied by the gain factor (S3) to provide the output.
Use the power function code in process control for performance calculations and monitoring.
Outputs
PO W ER
S1 (1 7 3 )
S2
B
E
N R Value = K  (y)x
Specifications
S1 N 6 I Note 1 Block address of y
S2 N 6 I Note 1 Block address of x

NOTE:
2VAA000844R0001 J 173-1
173. Power
173-2 2VAA000844R0001 J
174. Logarithm
174. Logarithm
The logarithm function code takes the logarithm of the input to the defined base. The result is multiplied by a gain factor to
provide the output. The logarithm function code is not limited to natural logarithms. The log of any value in base zero
(natural) to ten can be taken.
Use the logarithm function code in process control for performance calculations and monitoring.
Outputs
(1 7 4 )
S1
LO G
N
N R Value = K  [log(base)(X)]
Specifications
S1 N 6 I Note 1 Block address of input value, X
S2 N 0 I 0 - 10 Base of logarithm:
0 = natural log

NOTE:
2VAA000844R0001 J 174-1
174. Logarithm
174-2 2VAA000844R0001 J
177. Data Acquisition Analog
177. Data Acquisition Analog

The data acquisition analog (DAANG) function code provides a number of unique data selection, conditioning and monitoring functions.
These include support for enhanced alarm management capabilities at the module level of a Symphony system.
The default specifications allow single level alarming and exception reporting of the real input.
Outputs

DA A N G
S7 (1 7 7 )
S8
N /A RV
N N R Current value, quality/status
Q UA L ST
S9 N+1
IN -S EL
S10
RV
N+1 R Current extended status
S11 CHAR
S12
S14
CV
Specifications
IN -P M T
S15 X -R P T
S16 A LM -S U P
S17 VHA
S18 V LA
S19 DEV S1 N 100.000 R Full Engineering unit high display reference
S2 N 0.000 R Full Engineering unit center display reference
S3 N 0.000 R Full Engineering unit low display reference
S4 N 9.2 E18 R Full Engineering unit high constraint limit
S5 N -9.2 E18 R Full Engineering unit low constraint limit
S8 N 5 I Note 1 Block address of quality state override
S9 N 5 I Note 1 Block address of input select control
S10 N 5 I Note 1 Block address of real value input
S11 N 2 I Note 1 Block address of input shaping algorithm
S12 N 5 I Note 1 Block address of calculated value input
S13 N 0.000 R Full Engineering unit selected inserted value
S14 N 0 I Note 1 Block address of permit input selection
S15 N 0 I Note 1 Block address of request exception report
S16 N 0 I Note 1 Block address of activate alarm suppression
S17 N 5 I Note 1 Block address of variable high 1 alarm limit
S18 N 5 I Note 1 Block address of variable low 1 alarm limit
S19 N 5 I Note 1 Block address of deviation alarm reference value
S20 Y 0.000 R Full Alarm control
S21 Y2 2.000 R Full Engineering unit high alarm deadband
S22 Y2 0.000 R Full Engineering unit high 3 alarm difference
S23 Y2 0.000 R Full Engineering unit high 2 alarm difference
S24 Y2 9.2 E18 R Full Engineering unit high 1 fixed alarm value
S25 Y2 -9.2 E18 R Full Engineering unit low 1 fixed alarm value
S26 Y2 0.000 R Full Engineering unit low 2 alarm difference
2VAA000844R0001 J 177-1
Explanation 177. Data Acquisition Analog
S27 Y2 0.000 R Full Engineering unit low 3 alarm difference
S28 Y2 2.000 R Full Engineering unit low alarm deadband
S29 Y2 9.2 E18 R Full Engineering unit deviation alarm limit
S30 Y 2.000 R Full Engineering unit significant change to force

exception report
S31 Y 100.000 R Full Period for time based alarms in seconds
S32 Y 9.2 E18 R Full Engineering unit high rate of change
S33 Y 0.000 R Full Engineering unit low rate of change
S34 Y 2.000 R Full Time sequence alarm count

NOTES:
2. Specification is tunable but not adaptable. Adapted specification values are invalid.
177.1 Explanation
S1
Engineering units high display reference. A numeric or graphical display element can use this value as the maximum positive reference
of the monitored value.
S2
Engineering units center display reference. This specification allows bidirectional bar chart elements on consoles by defining a positive
and negative segment for the display (i.e., upward movement when the input is greater than S2 and downward movement when the input
is less than S2). Specifications S2 and S3 define the lower segment. Specifications S1 and S2 define the upper segment. To disable the
center display reference, set S2 equal to S3.
S3
Engineering units low display reference. Numerical or graphical display elements use this value as the maximum negative reference of
the monitored value.
S4
Engineering units high constraint limit. The input select control <S9> enables this limit. Enabled constraint limits cause the selected input
value to report as less than or equal to the high constraint limit. The input will be constrained when it exceeds this configured value. When
the real (constrained) input is selected (by a value of 4.0 or 5.0 at <S9>), the constraining action is the resultant value of the input
characterization algorithm defined by <S11> (if used).
NOTE: S4 must be greater than S5.
S5
Engineering units low constraint limit. The input select control <S9> enables this limit. An enabled constraint limit makes the selected
input value always greater than or equal to this low limit. The input is constrained when below this configured value. When the real
(constrained) input is selected (by a value of 4.0 or 5.0 at <S9>), the constraining action is the resultant value of the input characterization
algorithm defined by <S11>.
NOTE: S4 must be greater than S5.
S6
Engineering unit identifier. It is used by display systems to select an engineering unit descriptor.
S7
Spare real input.
177-2 2VAA000844R0001 J
177. Data Acquisition Analog Specifications
S8
Block address of the quality state override. It allows an external source to override the quality and status of the reported value. The
override value converts to a truncated integer and the bits are shown in Table 177-1.
Table 177-1 Quality State Override Bit Map
Bit Binary Value Attribute
All 0 Generate quality state internally (default)
0 1 Force good quality
1 2 Force calculated mode
2 4 Force manual mode
3 8 Limited
4 16 Suspect or out of range
5 32 Hardware failure or bad quality
6 64 E-STOP
7 - 15 – Reserved for future use
The quality state override does not affect the processing of the DAANG function code. The override state specified is logically ORed with
the internally derived state. This permits the selective use of the internal functions or special external functions.
NOTE: If an external function generates any of these control bits, the internal features that correspond to the defined functions
must be inhibited. This prevents a possible conflict between the externally driven status and the internal status.
Quality is normally derived from the selected input unless:

• Bit zero is set to logic 1. This forces the quality to be good regardless of the actual input quality state. Bit five overrides bit zero
if both are set.
• Bit five is set to logic 1. This forces the quality to be bad regardless of the actual input quality state. Bit five overrides bit zero if
both are set.
A real <S10> or calculated <S12> input with bad quality from any block (except one containing function code 178) sets the hardware
failure bit in the DAANG exception report (status and extended status fields). Normally, the quality associated with an exception report
(alarm field) is set by the communication system to indicate a communication failure. Therefore, the quality state in the exception report
alarm field is actually the communication status for function code 177 exception reports and is never set by the function code 177 itself.
Neither bad input quality or overridden/forced bad quality will affect this bit.
In the DAANG function code the hardware failure bit in the exception report extended status field, exception report status field, and
extended status output N+1 is set to propagate the bad quality of the input. The state of the hardware failure bit sets the quality of the
block output N.
S9
Block address of the input control. This specification gives an external source the ability to control the input selection when enabled by
the permit input selection <S14>. The real input value is converted into a truncated integer and the bits are mapped as in Tables 177-2
and 177-3.
Table 177-2 16 Bit Map
All 0 Real, unconstrained, on scan (default)
0 1 Select input:
0 = <S13>
1= calculated <S12>
1 2 Custom enable select:

0 = real <S10>
1 = select input from bit 0
2VAA000844R0001 J 177-3
Specifications 177. Data Acquisition Analog
Table 177-2 16 Bit Map (Continued)
2 4 Constrain input high/low limit:

0 = disabled
1 = enabled
3 8 Spare
4 16 Spare
5 32 Spare
6 64 Spare
7 128 Report mode:

0 = on scan, on report
1 = off scan, no report
8- 15 – Spare
Table 177-3 16 Bit Binary Number
Input Select Bit

Mode
Value Pattern
0 or 1 Bit 0 = X Real value <S10> input (unconstrained)

Bit 1 = 0
Bit 2 = 0
2 Bit 0 = 0 Selected value <S13> input (unconstrained)

Bit 1 = 1
Bit 2 = 0
3 Bit 0 = 1 Calculated value <S12> input (unconstrained)

Bit 1 = 1
Bit 2 = 0
4 or 5 Bit 0 = X Real input value <S10> constrained between

Bit 1 = 0 <S4> and <S5>
Bit 2 = 1
6 Bit 0 = 0 Selected input value <S13> constrained

Bit 1 = 1 between <S4> and <S5>
Bit 2 = 1
7 Bit 0 = 1 Calculated input value <S12> constrained

Bit 1 = 1 between <S4> and <S5>
Bit 2 = 1
128 Bit 0 = X No report, no exception reports generated

Bit 1 = X (normal processing at the module level)
Bit 2 = X
Bit 7 = 1
When a transition takes place on bit zero or one, the new input source and status are selected. The console can also select the input
source. A transition on the input control bit cancels any pending console request.
Input select and console requests are disabled during module startup. The block maintains the saved mode and initializes the input select
during startup to prevent a transition being detected when startup is complete. When adding the block to a module configuration, the
default mode is input select equals real value, on report, unconstrained (<S9> equals zero).
The constrain input high/low limit (bit two) controls limiting for the selected input. Specification S4 defines the upper constraint limit and
S5 defines the lower constraint limit.
The report mode (bit seven) controls the exception reporting mode. No report disables exception report updates. Enabling no report
causes one exception report to generate which shows that no report is enabled. The block continues to execute and its outputs update,
but no exception reports generate.
177-4 2VAA000844R0001 J
The console can control the exception reporting mode. When a point is no report, the console can issue a force exception report update
command to cause the point to update. This feature allows updating of the point value without putting it back on report. The block outputs
(local block outputs N and N+1) continue to update when a new exception report normally generates. The current report mode of an input
is stored in NVRAM and is stored upon a reset or mode change. All report mode change requests (logic and console) are locked out
during module startup.
S10
Block address of the real input value. The real input value can be the block output value of any block in the module addressed by this
vector. It is selected when <S9> equals zero, one, four or five. The console can also select this input value in auto mode. Changes to the
selected mode are disabled when the block addressed by S14 equals zero.
S11
Block address of the input shaping algorithm. This function allows additional linearization on the real input value for unique
characterization or scaling. This specification can point to either a function generator (function code 1) or polynomial (function code 167)
block. Multiple blocks can point to the same function generator or polynomial block. This permits a single block to provide common input
characterization or scaling data for many DAANG inputs. When either <S9> equals zero, one, four or five, or a console command selects
the real input, <S10> will be the input value to the function code configured at the block addressed by this specification. The output of
the algorithm is the actual real input value. The case of <S11> equals two disables this feature and causes <S10> to be used as received.
S12
Block address of the calculated value. The calculated value is an alternate input value selected when <S9> equals three or seven. The
console can select the calculated input from auto mode. Changes to the selected mode are disabled when the block addressed by S14
equals zero.
S13
Engineering units selected inserted value. The selected inserted value is an alternate input value selected when <S9> equals two or six.
The console can ramp or set this value after selecting manual mode. Changes to the selected mode are disabled when the block
addressed by S14 equals zero.
S14
Block address of the permit input selection. When the input value of this block is a logic 1, changes at the <S9> input or the console
commands will change the input select mode. If the input is logic 0, then requests for input select mode changes are ignored.
S15
Block address of the send exception report request. When there is a zero to one transition on this block address, an exception report of
the current data and status is generated. This input can link to a timer that expires on the scan period for the implementation of a fixed
scan type system. When the point is off scan this input is disabled. The console can force an exception report update that reports the
current value even when the point is off scan. The point remains off scan after sending one update if it was previously off report.
S16
Block address of the activate alarm suppression. Alarm suppression functions specified in S20 enable when this input equals logic 1. The
console also can control alarm suppression.
High alarms suppressed:
High alarm and level.
High deviation.
High rate.
Low alarms suppressed:
Low alarm and level.
Low deviation.
Low rate.
The current alarm suppression state (on/off) is stored in NVRAM upon a reset or mode change. All alarm suppression requests (console
and logic) lock during module initialization.
S17 and S18

Block addresses of the variable high one and low one alarms respectively. These inputs are active only when variable mode alarms are
selected with the alarm control S20. Effectively, these dynamic values substitute for the high one alarm value S24 and low one alarm
value S26 when using this feature.
S19
Block address of the deviation alarm reference. This specification combined with the deviation alarm limit S29 determines when the
monitored input value has a high or low deviation alarm.
High deviation alarm limit = <S19> + S29
Low deviation alarm limit = <S19> - S29
2VAA000844R0001 J 177-5
S20
Alarm control. The input value converts to a truncated integer and the bit map as in Table 177-4.
Table 177-4 Bit Map
0 1 High alarm mode:

0 = fixed level alarms; alarms based on H1 = S24
1 = variable level alarms; alarms based on H1 = <S17>
1 2 Low alarm mode:

0 = fixed level alarms; alarms based on L1 = S25
1 = variable level alarms; alarms based on L1 = <S18>
2 4 Multilevel alarming enable:

0 = one high level alarm, one low level alarm
1 = three high level alarms, three low level alarms
3 8 Low alarm suppression select:

0 = do not suppress low level alarms
1 = suppress low level alarms during enabled alarm suppression
(enabled through <S16> or console command 3)
4 16 High alarm suppression select:

0 = do not suppress high level alarms
1 = suppress high level alarms during enabled alarm suppression
(enabled through <S16> or console command 3)
5 32 De-alarm enable
6 64 Return alarm enable
7 128 Rate of change alarm enable
8 256 Digital alarm filter enable
9 512 Alarm suppression indication mode select:

0 = alarm suppression indication in extended status (bit 1)
indicates enabled alarm suppression (through <S16> or a
console command 3) and selected (through S20 bit 3 or 4)
1 = alarms are currently suppressed
10 - 15 – Spare
Bit zero selects the mode for the high one alarm level. Logic 0 selects the fixed value of S24 and logic 1 selects the dynamic input of the
block addressed by S17.
Bit one selects the mode for the low one alarm level. Logic 0 selects the fixed value of S25 and logic 1 selects the dynamic input of the
block addressed by S18.
Bit two selects single level high one and low one alarms when false (logic 0). Bit two selects multilevel high three, high two, high one, low
one, low two, and low three when true (logic 1).
Bit three and bit four control alarm suppression for all low or all high alarms based on the logic state of <S16>.
Bits five and six enable the de-alarm and return alarm functions.
The de-alarm and return alarm control the alarms:
• High/low level.
• High/low deviation.
• High/low rate.
De-alarm (bit five) suppresses alarms when the timer expires. The timer resets any time the input value exits the alarm state. The alarms
must remain present for the entire timer period (S31) before they can be de-alarmed. The alarms remain suppressed until the input value
exits the alarm state. The de-alarm, when active, is identical to alarm suppression when both the high and low alarm suppression is
selected by S20, bits three and four and enabled by <S16>.
Return alarm (bit six) causes the console to reinstate the alarm by changing the state of the return alarm bit in the extended status output
and exception report if an alarm state is still present since the last alarm report. Until the input value exits the alarm state, the timer
automatically starts after each return alarm message and a new return alarm issues after each S31 time period.
If both the de-alarm and return alarm bits are selected, the return alarm function overrides the de-alarm function. Specification S31
defines the time period (in seconds) to de-alarm or return alarm the input.
Bit seven enables the rate of change alarm feature. Specification S31 defines the sample time interval (specified in seconds). The rate
177-6 2VAA000844R0001 J
of change is the absolute (EU) value of the difference between the previous sampled input value and the current sampled input value.
The configured time interval (S31) defines the sampling time between the two values. The previous input value initializes during startup
to the current selected input value. Refer to S32 and S33 for details.
Bit eight enables the digital alarm count filter. The time period in S31 (specified in seconds) defines the sequential count time interval.
The value in S34 defines the number of transitions that activate the alarm count filter. Refer to S34 for details.
Bit nine allows mode configuration of the alarm suppression indication at the extended status output (N+1, bit one). When this bit is logic
0, the alarm suppression indication sets when alarm suppression is selected (through S20, bits three and four) and enabled (through
<S16>). When this bit equals logic 1, the alarm suppression indication is set when an alarm is suppressed.
S21
High alarm deadband. This is the deadband compensation value, in engineering units, that subtracts from each high alarm threshold
value to determine the value at which the existing alarm level will be reduced.
S22
High three alarm difference. With multilevel alarming selected, this value adds to S23. The result adds to the value used for high one
level to determine the high three alarm threshold value. If the monitored variable becomes greater than this value, a high three alarm
state exists.
S23
High two alarm difference. With multilevel alarming selected, this value adds to the value used for high one level to determine the high
two alarm threshold value. If the monitored variable becomes greater than this value, a high two alarm state exists.
S24
High one fixed alarm value. When fixed alarm levels are selected, and the monitored input value becomes greater than this value, a high
one alarm status exists.
S25
Low one fixed alarm value. When fixed alarm levels are selected, and the monitored input value becomes less than this value, a low one
alarm status exists.
S26
Low two alarm difference. With multilevel alarming selected, this value subtracts from the value used for low one alarm level to determine
the low two alarm threshold value. If the monitored variable becomes less than this value, a low two alarm state exists.
S27
Low three alarm difference. With multilevel alarming selected, this value adds to the value of S26. The resultant total subtracts from the
value used for the low one alarm level to determine the low three alarm threshold value. If the monitored variable becomes less than this
value, a low three alarm state exists.
S28
Low alarm deadband. This is the deadband compensation value that adds to each low alarm threshold value to determine the value at
which the existing alarm level will be reduced. Table 177-5 shows alarm thresholds.
Table 177-5 Alarm Thresholds
Alarm Level Thresholds Level Return from Alarm Thresholds
High 1 (F or V)  S23  S22 HIGH 3 High 1 (F or V)  S23  S22 – S21
High 1 (F or V)  S23 HIGH High 1 (F or V)  S23 – S21
High 1 (F or V) HIGH 1 High 1 (F or V) – S21
Low 1 (F or V) LOW 1 Low 1 (F or V)  S28
Low 1 (F or V) – S26 LOW 2 Low 1 (F or V) – S26  S28
Low 1 (F or V) – S26 – S27 LOW 3 Low 1 (F or V) – S26 – S27  S28
2VAA000844R0001 J 177-7
Figure 177-1 shows relationships of S21, S22, S23, S26, S27 and S28 to actual alarm thresholds when using <S17> and <S18>.
The striped line in Figure 177-1 illustrates the monitored variable. The arrowhead shows the relative movement of this dynamic variable
away from the quiescent (left side) and in the direction of nominal (right side).
(100 0) P.V. P.V.

H IG H D ISP LAY R EF.
S1 1000
(95 0) 9 50
H IG H C O N STR AIN T
S4
S 21 = 5 (H IG H D EAD BA N D )
(60 0 + 100 + 5 0) 75 0 745 (600 + 100 + 50 – 5)

H IG H 3
S2 4 + S 23 + S 22 S 24 + S2 3 + S 22 – S 21
(600 + 10 0) 70 0 (600 + 100 – 5)
H IG H 2 695
S 24 + S 23 S 24 + S2 3 – S2 1
(60 0) 6 00 595 (600 – 5)

H IG H 1
FIXE D S24 S 24 – S 21
[VAR IA B LE] S 17
S2 50 0 500
410 (400 + 10)

(40 0) 4 00
LO W 1 S 25 + S2 8
FIXE D S25
[VAR IA B LE] S 18
310 (400 – 100 + 10 )

(400 – 10 0) 30 0
LO W 2 S 25 + S2 6 + S2 8
S 25 + S 26
260 (400 – 100 – 50 + 10 )
(400 – 100 – 5 0) 25 0
LO W 3 S 25 + S2 6 + S2 7 + S 28
S2 5 – S 26 – S27
S 28 = 10 (L O W D E A D BA N D )
(5 0) 50
LO W C O N STR AIN T
S5
S3 0 .0
LO W D ISP LAY R EF.
T 018 71A
Figure 177-1 Level Detection Alarms
High Alarm Values:

<S17> (variable high alarm value) = 600
S24 (fixed high alarm value) = 600
S23 (high 2 alarm delta) = 100
S22 (high 3 alarm delta) = 50
S21 (high alarm deadband) = 5
Low Alarm Values:
<S18> (variable low alarm value) = 400
S25 (fixed low alarm value) = 400
S26 (low 2 alarm delta) = 100
S27 (low 3 alarm delta) = 50
S28 (low alarm deadband) = 10
S29
Deviation alarm limit. The high deviation alarm is violated when the selected input <S10>, <S11> or <S12> as selected by <S9> is greater
than or equal to the sum of the deviation alarm reference <S19> and the deviation alarm limit S29.
The low deviation alarm is violated when the selected input <S10>, <S11> or <S12> as selected by <S9> is less than or equal to the
difference between the deviation alarm reference <S19> and the deviation alarm limit S29.
Deviation Alarm Levels:

High deviation = <S19>  S29
Low deviation = <S19> – S29
Deviation Deadband Levels:
177-8 2VAA000844R0001 J
177. Data Acquisition Analog Outputs
High deviation deadband = <S19>  S29 – S21

Low deviation deadband = <S19> – S29  S28
S30
Significant change in engineering units input. A new exception report generates when the selected input change is greater than the level
defined by this input, and the exception report minimum time has been exceeded (as defined by the segment control block).
S31
Period for time based alarms. This time period is in seconds. Refer to S20.
S32 and S33

Define the rate of change in engineering units. Specification S20 enables this function. Specification S31 determines the time period to
sample input. The rate of change is the absolute value of the difference between the previous sampled input value and the current
sampled input value. The configured time interval defines the sampling time between the two values. The previous input value initializes
during startup to the current selected input value.
A high rate of change is present when the absolute value of the difference between the new sample value and the previous sample value
is greater than the high rate of change S32.
A low rate of change is present when the absolute value of the difference between the new sample value and the previous sample value
is less than the low rate of change S33.
S34
Alarm count limit for the time sequence alarm filter. Specification S20 enables this alarm function. The time period defined by S31 is the
time interval. This feature, when enabled by S20, maintains an alarm level if the monitored variable is moving into and out of that alarm
level X times (defined by S34) during period Y (defined by S31).
Each crossing of an individual alarm level increments an internal counter in the function code. This counter resets to zero at the end of
the time specified in S31. When the counter value is equal to or greater than the value of S34, the existing alarm level maintains through
the next count period. This filtered alarm level maintains as long as the internal sequential count per time period (S31) equals or exceeds
(S34), or the monitor variable is in violation of the posted alarm threshold.
The filtered alarm level cancels if any other alarm level is violated or if a time period (S31) occurs without (S34) alarm level crossings.
NOTE: Normal deadband action is included in the determination of return from each alarm level violation used by the time
sequence alarm filter.
The hold state automatically cancels when the next alarm level is violated or exited. The internal alarm state is used before performing
alarm suppression. Thus, alarm suppression does not affect the processing of the sequential alarm count limit.
177.1.2 Outputs
N
Current value and status. The current value and status output provides the current output value and the status bits. Table 177-6 shows
the status bits for output N.
Table 177-6 Output N Bit Map
Bit Attribute
7 Quality: 1 = bad 0 = good
6 High alarm: 1 = yes 0 = no
5 Low alarm : 1 = yes 0 = no
4-3 Alarm level: 00 = normal 10 = unused

01 = level 2 11 = level 3
2-0 Reserved for future use
2VAA000844R0001 J 177-9
Outputs 177. Data Acquisition Analog
Refer to Figure 177-2 for an example of the module access to status. The test quality block (FC 31) can retrieve the quality status bit.
The quality state is bad when the hardware failure status is bad. The test alarm block (FC 69) can retrieve the alarm status (bits three
through six) of FC 177. FC 69 S2 controls the alarm level of the FC 177 to be retrieved by FC 69.
• Set FC 69 S2 to 0 to test the high and low alarms.
• Set FC 69 S2 to 1 to retrieve the level 2 alarms.
• Set FC 69 S2 to 2 to test the level 3 alarms.
N+1
Current extended status. Figure 177-2 shows an example of the module access to status. The extended status output converts to a real
output as an integer. Table 177-7 shows the bit map for output N+1.
S1
S2 (3 1 ) G O O D /B A D
S3 T STQ
N Q UA L IT Y
S4
TSTALM
(6 9 )
H H IG H A L A R M
N
DAA N G L L O W A LA R M
N+1
S7 (17 7 )
N /A RV
S8 N
Q UAL ST
S9 N +1 TSTALM
IN-S EL (6 9 )
S10 H L E VE L 2 A L A R M
RV N
S11 L L E VE L 3 A L A R M
C H AR N+1
S12 CV
S14 IN-P M T
S15
RD EMUX
X -R P T S1 (1 2 6 )
S16 1 T IM E IN A LA R M T OG GL E
A LM -S UP N
S17 2 A L AR M S S U P P R E S S E D
VHA N+1
S18 3 VA R IA B L E A L A R MS A C T IV E
V LA N+2
S19 4 L O W R AT E A LA R M
DEV N+3
5 H IG H R AT E A L A R M
N+4
6 L O W D E V IAT IO N A LA R M
N+5
7 H IG H D E V IAT IO N A L A R M
N+6
8 N O R EPO RT
N+7
RD EMUX
S1 (1 2 6 )
1 Q UA L IT Y OV ER R ID E
N
2 C A L C U L AT ED VA LU E
N+1
3 AU TO (1 ) M A N U A L (0 )
N+2
4 C O N ST R A IN E D
N+3
5 O U T O F RA NG E
N+4
6 H A R D WA R E FA ILU R E
N+5
7 E -S TOP
N+6
8 R E S E RV ED ( ALW AY S = 1 )
N+7
T 01 87 2 A
Figure 177-2 Module Access to Status
Table 177-7 Output N+1 Bit Map
0 1 Return alarm (bit toggles)
1 2 Alarm suppression (refer to S20, bit 9)
2 4 Variable alarm
3 8 Low rate alarm
4 16 High rate alarm
5 32 Low deviation alarm
6 64 High deviation alarm
7 128 No report
8 256 Quality overridden
177-10 2VAA000844R0001 J
177. Data Acquisition Analog Applications
Table 177-7 Output N+1 Bit Map (Continued)
9 512 Calculated. Modes:

Auto/real - real input selected <S10>
Auto/calculated - calculated input <S12>
Manual - custom specified value <S13>
10 1024 Auto/manual: 1 = auto, 0 = manual. Modes:

11 2048 Constrained
12 4096 Out of range
13 8192 Hardware failure
14 16384 E-STOP
15 32768 Reserved (always = 1)
16 - 23 – Reserved for future use
177.2 Applications
Figure 177-3 illustrates a typical application using the data acquisition analog block. In this application, the value of the S20 block is 24
decimal (18 hex).
S1
S2 DAA N G
(3 1) S1
S3 TSTQ S7 (1 77)
N S2 N /A RV
S4 (65) S8 N
S3 DSUM Q UA L ST
N S9 N+1
S4 IN -S E L
S 10
RV
H //L S 5 = 32 S 11
S1 (1 2) S 6 = 16 CHA R
H S 12
N CV
L S 14
N+1 1 IN -P M T
1 S 15
H IG H = 500 °C X -R P T
S 16
AI/B A L M -S U P
(25) S 17
R E A C TO R O U TLE T T E M PE R AT U R E (FR O M A M M ) VHA
N S 18
VLA
S 19
DEV
S1 (1 67)
1 .0 PO LY
6 N
R E A C TO R S H U T D OW N
T01874A
Figure 177-3 Data Acquisition Analog Example
This configuration:
• Monitors the reactor outlet temperature from the analog master module. If this temperature is greater than 500 degrees Celsius
it is suspect/out of range.
• Allows operator (console) selection of the polynomial characterization.
• Suppresses all alarms when the reactor is in shutdown mode.
2VAA000844R0001 J 177-11
Applications 177. Data Acquisition Analog
Figure 177-4 shows the data acquisition analog block used in normal, variable and deviation alarm situations.
NO R M A L AL AR M IN G
(SIN G LE O R M U LTILE VEL )
DAA N G
S7 (177 )
N /A RV
S8 N
Q UA L ST
S9 N +1
IN -S E L
VAR IA B LE TO BE R E PO R TED S1 0
RV
S1 1
CHAR
S1 2
CV
S1 4
IN -P M T
S1 5
X -R P T
S1 6 A LM -S U P
S1 7
VHA
S1 8
V LA
S1 9 DEV
VA R IAB LE A LAR M IN G
DAA N G
S7 (177 )
N /A RV
S8 N
Q UA L ST
S9 N +1
IN -S E L
VAR IA B LE TO BE R E PO R TED S1 0
RV
S1 1 CHA R
S1 2 CV
S1 4
IN -P M T
S1 5
X -R P T
S1 6 A LM -S U P
VAR IA B LE H IG H LEV EL A LA R M VA LU E S1 7
V HA
VAR IA B LE L O W LE V EL A LAR M VAL U E S1 8 V LA
S1 9 DE V
D E VIATIO N ALA R M
DAA N G
S7 (177)
N /A RV
S8 N
Q UA L ST
S9 N +1
IN -S E L
VAR IA B LE TO BE R E PO R TED S 10 RV
S 11 CHAR
S 12 CV
S 14 IN -P M T
S 15 X -R P T
S 16 A LM -S U P
S 17 VHA
S 18 V LA
D EV A LAR M R E F VALU E S 19 DEV
T 01 87 3 A
Figure 177-4 Normal, Variable and Deviation Alarms
177-12 2VAA000844R0001 J
178. Data Acquisition Analog Input/Loop Explanation
178. Data Acquisition Analog Input/Loop

The data acquisition analog input/loop function code provides a way to import data from the data acquisition analog block (function code
177) on Symphony systems.
NOTE: If a module utilizes an imported analog value from the loop in several instances in its configuration, the function blocks that
utilize that analog value must be connected to only one DAANG I/L block. You cannot import exception reports from the same
(control network, node, module and block) address to more than one destination within a single module configuration.
Outputs
DA A N G I/L N R Current value, quality/status

(178)
N N+1 R Next highest limit
NH L
N +1
N LL
N +2 N+2 R Next lowest limit
EST
N +3
N+3 R Extended status
Specifications
S2 N 0 I Note 1 Source block number
S4 N 0 I 1 - 250 Source loop number
S5 N 0 I Full Spare integer input
S6 N 0.000 R Full Spare real input
S7 N 0 I 0 or 1 Spare boolean input

NOTE:
178.1 Explanation
S1
Source module address. This is the module bus address of the module containing the monitored DAANG block.
S2
Source block number. This is the block number of the monitored DAANG block.
S3
Source HCU address. This is the HCU address where the module containing the monitored DAANG block resides.
S4
Source loop number. This is the loop number where the HCU containing the monitored DAANG block resides.
S5 through S7
Spare inputs.
2VAA000844R0001 J 178-1
Outputs 178. Data Acquisition Analog Input/Loop
178.1.2 Outputs
N
Current value and quality/status: the current value, quality and status of the monitored DAANG block addressed by S1, S2, S3 and S4.
Table 178-1 shows the status bits at this block address.
Table 178-1 Status Bits at Current Block Address
Bit Attribute
7 Quality: 1 = bad 0 = good
6 High alarm: 1 = yes 0 = no
5 Low alarm: 1 = yes 0 = no
4-3 Alarm level: 00 = normal 10 = level 2

01 = unused 11 = level 3
2-0 Reserved for future use
The test quality block (function code 31) can retrieve the quality status bit. The quality bit is bad when the communication status or the
hardware failure status is bad.
The test alarm block (function code 69) can retrieve the alarm status bits. Setting S2 (function code 69) to zero tests the high and low
alarms. Setting S2 (function code 69) to one tests the alarm level.
N+1
Next highest limit. This value is the next highest value limit that results in alarm activity by the DAANG block (function code 177) being
monitored.
N+2
Next lowest limit. This output value is the next lowest value limit that will result in alarm activity by the DAANG block (function code 177)
being monitored.
N+3
Extended status. The extended status converts into a real output as an integer with the bit map shown in Table 178-2.
Table 178-2 Extended Status Bit Map
Binary
Bit Attribute
Weighted Value
0 1 Return alarm (toggled bit)
1 2 Alarms suppressed
2 4 Variable alarms
3 8 Low rate alarm
4 16 High rate alarm
5 32 Low deviation alarm
6 64 High deviation alarm
7 128 No report
9 512 Calculated mode:

178-2 2VAA000844R0001 J
178. Data Acquisition Analog Input/Loop Applications
Table 178-2 Extended Status Bit Map (Continued)
Binary
Bit Attribute
Weighted Value
10 1024 Auto/manual:
0 = manual
1 = auto
11 2048 Constrained
12 4096 Out of range
13 8192 Hardware failure
14 16384 E-STOP
15 32768 Exception report received
16 - 23 — Reserved
The exception report received (bit 15) initializes to zero on entry to execute mode and sets upon the first exception report. The bit remains
set until the module is reset or a mode change occurs. Refer to Figure 178-1 for an example of the module access to status.
S1
S2
(3 1 ) G O O D /B A D
S3 T ST Q Q UA L ITY
N
S4
T STALM
(6 9 )
DAA N G I/L H H IG H A L A R M
(1 7 8 ) N
L L O W A L AR M
N N+1
NHL
N+1
NLL
N+2 T STALM
EST
N+3 (6 9 )
H L E VE L 2 AL A R M
N
L L E VE L 3 AL A R M
N+1
RDEMUX
S1 (1 2 6 )
1 TIM E IN AL A R M TO G G L E
N
2 A L AR M S S U PP R E SS E D
N+1
3 VAR IA B L E A L A R M S AC TIV E
N+2
4 L O W R ATE A LA R M
N+3
5 H IG H R AT E A L AR M
N+4
6 L O W D E V IAT IO N A L AR M
N+5
7 H IG H D EV IATIO N A L A R M
N+6
8 N O R EP O R T
N+7
RDEMUX
S1 (1 2 6 )
1 Q UA L ITY OV ER R ID E
N
2 C A L C U L AT ED VA LU E
N+1
3 AU TO (1)/M AN UA L (0 )
N+2
4 C O N ST R AIN E D
N+3
5 O U T O F R AN G E
N+4
6 H A R DW A R E FA ILU R E
N+5
7 E -S TO P
N+6
8 R E SE RV ED (ALW AY S = 1 )
N+7
T 01 8 75 A
Figure 178-1 Module Access to Status
178.2 Applications
Assume that the monitored DAANG function code is (also shown in Table 178-3):
High constraint limit = 900
High 3 alarm limit = 800
2VAA000844R0001 J 178-3
Applications 178. Data Acquisition Analog Input/Loop
Nominal = 500
Low 1 alarm limit = 400
Low constraint limit = 100
NOTE: Constraints active, multilevel alarming and auto mode.
Table 178-3 Example DAANG Settings
Monitored Referenced DAANG I/L Outputs

Real Value DAANGs Output N
Input of Reported Quality
N N+1 N+2 N+3
DAANG Value
950 900 900 900 900 35,840 High 3 alarm
850 850 850 900 800 33,792 High 3 alarm
750 750 750 800 700 33,792 High 2 alarm
650 650 650 700 600 33,792 High 1 alarm
500 500 500 600 400 33,792 Good
350 350 350 400 300 33,792 Low 1 alarm
250 250 250 300 200 33,792 Low 2 alarm
150 150 150 200 100 33,792 Low 3 alarm
50 100 100 100 100 35,840 Low 3 alarm

NOTES:
1. Output N+3 = 33,792 (32,768  1024). Exception report received since module startup and DAANG is
monitoring the real input.
2. Output N+3 = 35,840 (32,768  2048  1024). Exception report received since module startup,
constrained input, and DAANG is monitoring the real input.
178-4 2VAA000844R0001 J
179. Enhanced Trend
179. Enhanced Trend

The enhanced trend definition function code is part of the Symphony distributed trending package. This function code collects,
compresses and stores trend data. A compression algorithm increases the amount of historical data retained by the block for a given
amount of module memory utilization. Trend data may be collected from various exception reporting blocks, identified by S2.
Collected data can be retrieved from the block on demand by any number of collection devices for archiving and display. The enhanced
trend block issues special trend exception reports and notifies collection devices when a significant amount of new trend data is recorded
in the trend buffer.
The amount of historical data retained by the block varies depending on:
• The size of the block trend buffer.
• The rate of change of the input value.
• The types of data to be collected.
Function code 179 gives the following enhancements over the analog trend function code 66:
• Ability to trend more types of inputs.
• Record status and alarm information with values.
• Faster data collection rates available.
• More significant digits on stored values.
• Uses data compression algorithm to reduce storage needs.
• Finer resolution on time associated with recorded values.
Outputs
ET R E N D Blk Type Description

S1 (1 7 9 )
N
S15 RESE T N B Value is always 0. Quality is bad when the Harmony con-
N+1
troller has not been time synchronized.
N+1 R Approximate number of minutes of historical data currently

saved in the block's buffer.
Specifications
S2 N 0 I 0-9 Input block type:

0 = function code 30 or 48
1 = function code 45 or 67
2 = function code 62
S3 N 1 I 1 - 63 Trending mode:
1 = sampling 8 = average
2 = minimum 16 = sum
4 = maximum 32 = range (max.-min.)
2VAA000844R0001 J 179-1
Explanation 179. Enhanced Trend
S4 N 50 I 20 - Buffer size (no. of events)

65535
S5 N 40.000 R 0 - 100 Buffer threshold (%)
S6 Y 15.000 R Full Input sampling time (secs)
S7 Y 1.000 R 0 - 100 Significant change (%)
S8 N 1200.000 R Full Maximum elapsed time for event recording (secs)
S9 Y 1.000 R Full Statistical time base period
S10 N 2 I 0-3 Statistical time base units:

0 = seconds 2 = hours
1 = minutes 3 = days
S11 N 7200.000 R Full Maximum elapsed time for exception reporting (secs)
S12 Y 100.000 R 0 - 100 GOOD/SUSPECT threshold
S13 Y 1.000 R Full Summation conversion divisor
S14 N 1 I Full Summation modifier
S15 N 0 I Note 1 Block address of statistical time base reset signal

NOTE:
179.1 Explanation
S1
(Block address of input) Block address of exception report block to be the source of trend data.
NOTES:
1. When addressing a multiple output block, use the lowest block number (N).
2. Selecting a value of zero disables all sampling and statistical trending for the function code 179 block.
S2
(Input block type) Identifies type of input to be trended.
0 = function code 30 or 48, analog exception report
1 = function code 45 or 67, digital exception report
2 = function code 62, remote control memory
3 = function code 68, remote manual set constant
4 = function code 80, control station
5 = function code 123, device driver
6 = function code 129, multi state device driver
7 = function code 136, remote motor control
8 = function code 177, data acquisition analog
9 = function code 211, data acquisition digital
179-2 2VAA000844R0001 J
179. Enhanced Trend Specifications
10=function code 222, analog in/channel

11=function code 223, analog out/channel
12=function code 224, digital in/channel
13=function code 225, digital out/channel
14=function code 229, pulse in/channel
NOTE: The block addressed in <S1> must match the input block type in S2 or a configuration error will result.
S3
(Trending mode) Selects any combination of available trending point types. None are exclusive; any or all may be selected
simultaneously.
Specification S6 selects sample collection speed, while S9 and S10 select the statistical time base period.
1 = Sampling - current value.
2 = Minimum - minimum value collected over the statistical time period (S9 and S10).
4 = Maximum - maximum value collected over the statistical time period (S9 and S10).
8 = Average - (arithmetic mean) - average value collected over the statistical time period (S9 and S10).
16 = Sum - total values collected over the statistical time period (S9 and S10).
32 = Range - value of maximum minus minimum samples collected over the trending interval (statistical).
Example:
The exception report selected is to be trended in the Sampling (one) and Range (32) modes.
1  32  33
S3  33
S3  sum of desired modes
NOTES:
1. When any statistical mode is selected, the statistical calculations are not cumulative from one statistical time period to the
next.
2. When sampling mode is selected, status and alarm information is recorded, as well as a value for each input block type.
The types of trend data available for display or analysis depends on the capabilities of the device used to collect, display, or analyze the
data recorded by the enhanced trend block. Consult the user's manual for the specific device used for a description of the data available
and the procedures for configuring that device.
When trending a digital signal using average, trend value represents percent of time ON or OFF (duty cycle) (zero to 100 percent).
S4
(Buffer size) Specifies the minimum number of events that may be recorded by setting an amount of module memory aside for the trend
data buffer.
Increasing the trend buffer size will:
• Increase the amount of historical data saved by the block.
• Decrease polling frequency from the collecting devices.
• Increase the module's RAM utilization.
An event is one of the following:
• Significant change in sample or periodic statistical value. (Refer to the explanation for specification S7).
• Status or quality change.
• Change in a tunable parameter of function code 179.
The maximum allowable value for S4 depends on the setting of S2.
Function Maximum Value

S2 Setting Type of Value
Code of S4 Permitted
0 30 Analog 5461
1 45 Digital 6553
2 62 RCM 6553
3 68 REMSET 5461
4 80 Station 2621
5 123 DDRIVE 6553
2VAA000844R0001 J 179-3
Specifications 179. Enhanced Trend
Function Maximum Value

S2 Setting Type of Value
Code of S4 Permitted
6 129 MSDVDR 6553
7 136 RMC 6553
8 17 DAANG 2621
9 211 DADIG 6553
10 222 IOC/AIN 5461
11 223 IOC/AOUT 5461
12 224 IOC/DIN 6553
13 225 IOC/DOUT 6553
14 229 IOC/PIN 5461
S5
(Buffer fill threshold) The percent of buffer space filled with new events before informing collecting devices of a significant amount of
new available trend data.
NOTE: The effect of this parameter is highly dependent upon system dynamics and should not be changed without careful analy-
sis. Decreasing the threshold causes the collection devices to retrieve data more frequently, resulting in an increased load on the
system. Increasing the threshold causes the collection devices to retrieve data less frequently and could result in lost data. It is
recommended that S5 be left at the default 40% value to guarantee enough collection time to account for process upsets. In any
case, S5 should not be set greater than 80%.
S6
(Input sampling time, in seconds; only used if sampling is selected in S3) The period of monitoring the value and status of the
sampling input.
NOTE: Selecting a value of zero disables the sampling mode.
S7
(Significant change; in percent of span) Determines if the result of the statistical computations of the current period deviate by a
specific percentage from the result of the previous period. The block projects an expected value by observing the trend of previous values.
When the actual input value differs from this expected value by more than the specified amount, a new value is recorded. The enhanced
trend block uses this value along with the span values defined in the exception reporting block that is referenced by S1 to calculate its
absolute significant span values. The significant change values defined in these exception reporting blocks do not affect the enhanced
trend compression algorithm.
Specification S7 also affects the compression algorithm for storage of statistical computations (minimum, maximum, sum, range, and
average). However, S7 does not affect calculation of statistical values.
S8
(Maximum recording time) Maximum interval between consecutive recorded values in the trend buffer for one point. The maximum
recording time specification ensures that both sample and statistical trend values will be recorded if none have been recorded for this
specific amount of time. Statistical values will not compress if this time is less than the statistical period (S9 and S10). They will be stored
after the end of each statistical period. Likewise, if this time is less than the input sampling time (S6), the input sampling compression
algorithm will be effectively disabled. This forces input samples to be recorded at the end of every input sample period. This is useful in
applications that require data that is recorded at fixed time intervals.
S9
(Statistical time base period; only used if S3>1) Determines the period of the statistical computation when the trending mode in S3 is
set for one of the statistical functions. The statistical time base units are set by S10. For example: If S9 equals five and S10 equals one,
then the period of the statistical function set by S3 is five minutes.
NOTE: Use the smallest number possible (i.e., S9 = 1 and S10 = 2 for one hour rather than S9 = 3,600 and S10 = 0 which equals
one hour in seconds).
When the period set by S9 and S10 equals one hour (S9 equals one, S10 equals two) or one day (S9 equals one, S10 equals three), the
statistical computation period synchronizes to real time. The statistical function is calculated on the hour or on a daily (at midnight) basis.
All other statistical periods are elapsed time and are not synchronized to real time.
A reset on S15 disables real time synchronization. When a reset on S15 occurs, real time synchronization is disabled and the statistical
period begins on an hourly or daily basis from the time of the reset. To enable real time synchronization, tune S9 to another value then
return it to a value of one (i.e., tune S9 to three, then tune S9 to one). If S9 equals zero, the statistical mode trending function is disabled.
S10
(Statistical time base units) Shows the time unit associated with S9.
179-4 2VAA000844R0001 J
179. Enhanced Trend Specifications
0 = seconds
1 = minutes
2 = hours
3 = days
S11
(Maximum reporting time; in seconds) Maximum interval between trend exception reports. Gives an exception report if no other criteria
has prompted one. This notifies collection devices to collect trend data.
S12
(Good/suspect threshold) Minimum percentage of input values during a statistical period that must be good quality to receive a GOOD
summary value. If at least one good value is observed, but the percentage of good values is less than this parameter value, the quality
of the summary will be SUSPECT. If no GOOD values are observed, the summary value will be BAD.
S13
(Summation conversion divisor; used only if summation is selected in S3) Value used to compute the sum over the period set by
S9 and S10. Summation conversion divisor is a divisor into the accumulated sum and may be used to adjust for differences in the units
of a value. Summation computation is calculated by adding the current sampled input value to the total every segment cycle time.
Example:
Target segment cycle time equals 0.25 second:
1 value collected every 0.25 second =

4 values added to sum every 1 second =
240 values added to sum every 1 minute
If the source point value is in units of gallons per minute, a conversion divisor of 240 would adjust the sum to have units of gallons.
NOTES:
1. If a value of zero is selected for the summation conversion divisor, a value of 1.0 will be used instead.
2. The target segment cycle time is set in the executive block, function code 82. A value of zero entered for the target segment
cycle time disables the summation statistic.
For digital inputs, the sum might show the number of segment cycle times during which the input was a one. In such a case, the
conversion factor might be used to convert the sum to units of run time.
S14
(Summation modifier; only used if sum is selected in S3, and S2 = 1, 2, 5, 6, or 7) Specifies the type of summation function for digital
inputs.
0 = count number of samples when input was zero
1 = count number of samples when input was one
2 = count changes from zero to one
3 = count changes from one to zero
4 = count all state changes
S15
(Block address of statistical time base reset signal) Resets the periodic function timer based on S9 and S10 when the referenced
block shows a transition of 0 to 1. The current statistical period immediately ends and a new one starts. This allows configuration control
over periodic trend functions.
Example:
Hourly statistics for a trended point are typically configured to be synchronized to real-time (refer to S9), but may be synchronized to
process events (such as an operation startup) by using this input.
S16 through S18

Spare integer.
S19
Spare real.
2VAA000844R0001 J 179-5
Applications 179. Enhanced Trend
179.2 Applications
To trend analog values, the user configures the analog exception reports and enhanced trend blocks for each point trended. Figure 179-
1 illustrates a configuration of a sampling (once a minute) and average (once an hour) trend of an analog point with manual reset. The
significant change allowance (S7) is set to a higher value than default. This will decrease the amount of recorded values. The human
system interface (HSI) may then be configured to collect data from the enhanced trend block for display or archiving via special enhanced
trend data poll messages and replies.
ET R E N D
S1 (30 ) S1 (17 9)
AO /L
20 0 S 15 30 0
RE SE T
30 1
S1 = 2 00 S 1 0 = D E FAU LT
M AN UA L
S2 = 0 S 1 1 = D E FAU LT
R E SE T
S3 = 9 S 1 2 = D E FAU LT
S4 = D E FAU LT S 1 3 = D E FAU LT
S5 (68 ) S5 = D E FAU LT S 1 4 = D E FAU LT
S6 R EM SE T 25 0 S6 = 60 S 1 5 = 2 50
S7 = 2 .0 S 1 6 = D E FAU LT
S 1 9 = D E FAU LT
T 01 87 6 A
Figure 179-1 Sample and Average Analog Trend with Reset
Figure 179-2 represents a sampling and average (hourly) and sum trend of a device driver. The sum trend is configured to count changes
from zero to one. The enhanced trend block gathers all data from the device driver including state of control output, all feedback inputs,
and other status indicators such as feedback status and status override
The average will give the duty cycle of the device (percent of the period during which the device was ON) and the sum will show the
number of times the device turned ON during the period (cycled from OFF to ON).
When the enhanced trend is used for sampling, minimum and maximum trending of a control station (function code 80), any or all points
associated with the control station may be displayed. These points include process variable (PV), set point (SP), control output (CO),
ratio index value (RI), and all station status indicators such as auto/manual, bypass, etc. .
D D R IV E ET R E N D
S1 (123) S1 (17 9)
CI O
S2 N S 15 30 0
F B1 ST RESET
S3 N+ 1 S 01
F B2
S5 S1 = 20 0 S 10 = D EFAU LT
OP S2 = 5 S 11 = D EFAU LT
S6
OS S3 = 25 S 12 = D EFAU LT
S4 = D E FAU LT S 13 = D EFAU LT
S5 = D E FAU LT S 14 =2
S 19 = D EFAU LT
T 01 877A
Figure 179-2 Sampling and Average and Sum Digital Trend
179-6 2VAA000844R0001 J
179. Enhanced Trend Applications
Figure 179-3 is a sample (every five seconds) trend of a control station with a reset from the start of a batch process. An increased buffer
size (S4) allows for retention of more data.
M /A
M F C /P ET RE ND
S1 (80) S1 (17 9)
PV SP
S2 201 S15 30 0
SP O RES ET
S3 200 30 1
A A
S4 202 S1 = 2 00 S10 = D E FAU LT
TR C /R S2 = 4 S11 = D E FAU LT
S5 203
TS C S3 = 7 S12 = D E FAU LT
S 18 204 S4 = 1 50 S13 = D E FAU LT
MI C -F
S 19 205 S5 = D E FAU LT S14 = D E FAU LT
AX
S6 = 5 S15 = 250
S 20
C /R S7 = D E FAU LT S16 = D E FAU LT
S 21 S8 = D E FAU LT S17 = D E FAU LT
LX
S 22 S9 = D E FAU LT S18 = D E FAU LT
CX
S 24 S19 = D E FAU LT
HAA
S 25
LA A
S 26
H DA
S 27
LD A
S 28
AO
S 29
TR S 2
S 30 T
TR P V
S TA RT O F
B AT CH P RO C E S S
2 50 T0187 8A
Figure 179-3 Minimum and Maximum of Control Station
2VAA000844R0001 J 179-7
Applications 179. Enhanced Trend
179-8 2VAA000844R0001 J
184. Factory Instrumentation Protocol Handler
184. Factory Instrumentation Protocol Handler

The factory instrumentation protocol (FIP) handler function code provides an interface between a primary and a redundant FIP module.
Function code 184 is used with the IMFBM02 WorldFIP Server Module. The FIP handler function code manages the redundant operation
by determining that a valid failure has occurred before switching to the secondary module. The input specifications contain the starting
block address for all configured subscriber blocks. The status of both the primary and secondary FIP modules are outputs from the block.
NOTES:
1. For more information on factory instrumentation protocol, refer to the FIP Application Description C46-602 which is written
by the French Commission AFNOR, and the INFBA01 Programming Reference Manual.
2. If configuring function code 184 for an Ethernet device interface slave (IMEDI01), refer to the IMEDI01 instruction for details
and explanations of this function code.
Outputs
F IP Blk Type Description

SH
S3 A I# P ST
(1 8 4 )
N B Primary module status: 0 = good
S4 N
D I# S ST
N+1
1 = bad
S5 AO #
S6
S7
DO#
N+1 B Secondary module status: 0 = good
BA
S8 TD
1 = bad
Specifications
S1 N 0 I 0 - 63 Primary module address
S2 N 0 I 0 - 63 Secondary module address
S3 N 2 I Note 1 Block address of analog input subscriber block
S4 N 2 I Note 1 Block address of digital input subscriber block
S5 N 2 I Note 1 Block address of analog output subscriber block
S6 N 2 I Note 1 Block address of digital output subscriber block
S7 N 2 I Note 1 Reserved
S8 N 0 I Note 1 Reserved
S9 N 0 I 0-1 Continue on secondary module error:

0 = trip primary module
S10 N 0 I 0 - 60000 Synchronization ID2
S11 N 0 I 0 - 60000 Reserved
S12 N 0 I 0 - 60000 Reserved
S13 N 0 I 0 - 100 Number of synchronization subsystem2
S14 Y 0.000 R Full Timer control3
2VAA000844R0001 J 184-1
Explanation 184. Factory Instrumentation Protocol Handler
S15 Y 1.0 R 0.0 - 255.0 Field bus segment number or WorldFIP field bus
segment number. Refer to S15 explanation.

NOTES:
9,998 for the BRC-100/200 and IMMFP11/12
31,998 for the HAC
2. For most applications, the default value shown will suffice for the specification.
3. Refer to S14 explanation for field bus communications speeds.
184.1 Explanation
S1
Address of the primary FIP module.
S2
Address of the secondary FIP module.
S3
Block address of the first analog input subscriber (function code 186).
S4
Block address of the first digital input subscriber (function code 185).
S5
Block address of the first analog output subscriber (function code 187).
S6
Block address of the first digital output subscriber (function code 188).
S7 and S8
Reserved.
S9
Sets the module operating status upon a module failure.
0 = trip primary module
S10
Specification S10 is the synchronization ID. The synchronization ID is the FIP identifier of the synchronization variable that the FIP
handler configures to synchronize the MFP module and the associated variables. At present, the MFP module does not synchronize its
segment executions to this variable.
S11 and S12

Reserved.
S13
Specification S13 is the number of the synchronization subsystem. This is the number of the subsystem that the current FIP handler
manages. When S13 is zero, the current FIP handler manages the primary system and synchronizes the module. This refers to the
synchronization clock on the dual port RAM register of the other I/O modules (I/O modules count the milliseconds and reset the clock on
every synchronization). Any number above zero means the current FIP handler manages a subsystem and does no synchronization.
S14
Specifies several parameters dealing with the physical timing of the IMFBM02 module and bus arbitration capability. This specification
is set as follows:
184-2 2VAA000844R0001 J
184. Factory Instrumentation Protocol Handler FIP Variable Input/Output Types
S14 = TXCKL + RP + IEC + BA
where:
TXCKL Bus speed
0 = 31.25 kbits/sec
1 = 1 Mbit/sec
2 = 22.5 Mbits/sec
RP RT Tim e  4
RTTime Return time of the WorldFIP station in bit-time (time duration
of one bit) in the range of zero to 63
Example
At 1 Mbit/sec, the bit-time equals 1 µsec. Therefore, if RTTime = 8, the actual return time is 8 µsec. At 32 kbits/sec, the bit-time equals
31.25 µsec. In this example, RTTime = 8 means an actual return time of 250 µsec.
The return time (also known as turnaround time) is the length of time the WorldFIP station will wait before responding to transactions
received on the WorldFIP field bus. In addition, it is also the amount of time the WorldFIP station will wait for other WorldFIP stations to
respond to transactions it initiates.
The setting for this return time parameter is dependent on several physical link criteria such as the length and media type (twisted pair,
coaxial, fiber optic, etc.) of the field bus segment. The setting for this parameter must correspond to the maximum return time setting for
this field bus segment. The maximum return time setting for the field bus segment is determined by the maximum turnaround time of the
slowest device on the field bus segment.
The IEC physical layer standard specifies a minimum return time of four bit-times and maximum return time of 32 bit-times. Intermediate
settings between these two ranges must be in four bit-time increments.
The physical layer parameter (IEC/FIP) specifies the choice between the IEC or FIP physical layer standard.
where:
IEC/FIP Physical layer
0 = IEC (WorldFIP)
32768 = FIP
The bus arbiter occupation parameter specifies the number of kilobytes (within the range of one to 54) of RAM to reserve in the IMFBM02
module for the bus arbitration program. If BA (bus arbiter occupation x 256) is set to zero, then the bus arbitration function of the IMFBM02
is disabled.
S15
WorldFIP field bus segment number for the IMFBM02 WorldFIP Server Module. This number is used to uniquely identify a specific
WorldFIP field bus segment among several that may be connected together via WorldFIP field bus bridge devices.
184.2 FIP Variable Input/Output Types
FIP variables may consist of one value or an array of values. The various types mentioned in S4 of function codes 185 and 186 and S12
of function codes 187 and 188 actually refer to the format of the values within a FIP variable.
The FIP input and output subscriber blocks are used to interface the Harmony controller with these FIP variables. Up to four FIP
subscriber blocks of the same type may be associated with a single FIP variable. For FIP variables that contain an array of values, the
maximum number of values for that array is 32. The individual elements of a FIP variable are associated to a particular subscriber block
using the group number found in S3. The number of elements specified in S3 of the subscriber block is used to identify the number of
values or elements within the FIP variable. The input/output type describes the format of the elements of the FIP variable. For most of
the types, one block output is associated with each element of the FIP variable. The exception to this rule is for the digital types in which
eight block outputs or inputs are associated with one element that has packed within it, eight values. FIP variables can also have a check
byte associated with each element. The check byte is used to associate a quality flag with the data contained within the element.
2VAA000844R0001 J 184-3
FIP Variable Input/Output Types 184. Factory Instrumentation Protocol Handler
Refer to Figure 184-1 for a list of the various input/output types and their formats.
M A XIM U M
ELEM ENT F U N C T IO N S PE C
N U M B ER O F D ATA E LE M EN T FO R M AT
TY P E C O DES VAL U E
E L E M E N TS
V V V V V V V V W H E N U SIN G T H E D IG ITA L E L EM E N T TY P E, U P TO E IG H T
D IG ITAL 18 5 , 1 88 0 4
7 6 5 4 3 2 1 0 B O O L E AN VA LU ES A R E E N C O D E D W ITH IN E AC H ELE M EN T.
W H E N SE T T IN G TH E VAL U E FO R TH E E LEM EN T SP E C IN S 3 ,
D IG ITA L Q Q Q Q Q Q Q Q V V V V V V V V U SE TH E N U M BER O F B O O L E AN VA LU ES FO R TH IS S P EC .
W IT H 18 5 , 1 88 1 4 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Q = L O G IC 0 = BA D Q UA LITY
C HEC K Q = L O G IC 1 = G O O D Q UA LITY
(TH IS IS O PPO S IT E O F TH E IN F I 9 0 O P EN
B O O L EA N 18 5 , 1 88 2 32 0 V C O N VE N T IO N O F Q = L O G IC 0 = G O O D Q U AL IT Y
Q = L O G IC 1 = B A D Q U A L IT Y )
T H E S U BS C R IB ER B LO C KS IN V E RT Q
B O O L EA N TO C O N F O R M TO T H E IN FI 90 O PE N S TA N D A R D
W IT H 18 5 , 1 88 4 16 Q 0 0 V V = LO G IC 0 = FA LSE O R O FF
C HEC K V = LO G IC 1 = TR U E O R O N
A N A LO G m sb lsb
R EAL 18 6 , 1 87 0 32 S IN G L E PR E C IS IO N IE E E 48 8 F LO AT IN G P O IN T
A N A LO G
m sb lsb
R E A L W ITH 18 6 , 1 87 1 16 Q 0 S IN G L E PR E C IS IO N IE E E 48 8 F L O AT IN G P O IN T
C HEC K
A N A LO G msb lsb
18 6 , 1 87 2 32 2 B YT E S IG N E D IN TE G E R W H E N F U N C T IO N C O D E 1 87 C O N V E RT S
IN T E G E R A N A N A LO G IN P U T VA LU E TO A TW O
A N A LO G B Y TE SIG N E D IN TEG ER , IT W IL L S E T T H E
msb lsb Q B IT TO BA D (LO G IC 0 ) IF T H E R E IS A N
IN T E G E R 18 6 , 1 87 3 32 Q 0 2 B YT E S IG N E D IN TE G E R O VE R F LO W IN T H E C AL C U L AT IO N . T H E
W IT H S IG N E D IN TE G E R VA L U E S H AVE A VAL ID
C HEC K R AN G E O F - 32 76 8 TO 3 27 6 7.
PAC KE D msb 1 BYTE lsb

18 6 , 1 87 4 32 UNSIGNED INTEGER F U N C T IO N C O D E 12 6 (R EA L SIG N A L D EM U LT IPLE X E R )
B O O L EA N C AN B E U S ED TO D E C O D E AN Y PAC KE D B O O L EA N
VA L U E S F R O M T H E AN AL O G R EA L O U TPU T S O F
PAC KE D F U N C T IO N C O D E 18 7.
msb 1 BYTE lsb
B O O L EA N 18 6 , 1 87 5 32 Q 0 UNSIGNED INTEGER T H ER E IS O N LY O N E Q BIT A SS O C IATE D W IT H A LL O F T H E
W IT H O N E B Y T E U N S IG N E D IN T E G E R VA LU E S O F A F IP VAR IA B L E
C HEC K W IT H O N E O R M O R E PAC KE D B O O L EA N E L E M E N T S.
T 01 3 27 A
Figure 184-1 FIP Input/Output Subscriber Variable Types
184-4 2VAA000844R0001 J
184. Factory Instrumentation Protocol Handler Application
184.3 Application
Figure 184-2 shows the FIP handler block linked to other FIP I/O blocks (function codes 185 through 188).
FIP
SH
S3 (1 8 4)
A I# P ST
S4 N
D I# S ST
S5 N+1
AO #
S6
D O#
F IP F IP F IP F IP S7
BA
AI DI AO DO S8
TD
S1 (1 8 6 ) S1 (1 8 5 ) S4 (1 8 7 ) S4 (1 8 8 )
NEXT NEXT
N N S5 S5
N+1 N+1 S6 S6
REAL D IG ITA L
REAL N+2 D IG ITA L N+2 S7 VA L U E S S7 VA L U E S
VA L U E S N+3 VA L U E S N+3 S8 F RO M S8 F RO M
TO TO OT H E R OT H E R
OT HE R N+4 OT H E R N+4 S9 BLOCKS S9
BLOCKS
B L OC K S N+5 BLOCKS N+5 S 10 S1 0
N+6 N+6 S 11 S1 1
N+7 N+7 S1 S1
NEXT NEXT
F IP F IP F IP F IP
AI DI AO DO
S1 (1 8 6 ) S1 (1 8 5 ) S4 (1 8 7 ) S4 (1 8 8 )
NEXT NEXT
N N S5 S5
N+1 N+1 S6 S6
REAL D IGITA L
OT H E R N+4 OT H E R N+4 S9 BLOCKS S9 BLOCKS
N+6 N+6 S 11 S1 1
N+7 N+7 S1 S1
NEXT NEXT
F IP F IP F IP F IP
AI DI AO DO
S1 (1 8 6 ) S1 (1 8 5 ) S4 (1 8 7 ) S4 (1 8 8 )
NEXT NEXT
N N S5 S5
N+1 N+1 S6 S6
REAL D IGITA L
OT H E R N+4 OT H E R N+4 S9 S9
BLOCKS BLOCKS
N+6 N+6 S 11 S1 1
N+7 N+7 S1 S1
NEXT NEXT
L INK E D L IS T O F L IN K E D L IS T O F
A NA L O G IN PU T D IGITA L IN P U T L IN K E D L IS T O F L IN K E D L IS T O F
S U B S C R IBER S S U B S C R IB ER S
A N A LO G O U T P UT DIG ITA L O U TP U T
S U B S CR IB ER S S U B S CR IB ER S T 01 7 15 A
Figure 184-2 Linking FIP Function Codes
2VAA000844R0001 J 184-5
Application 184. Factory Instrumentation Protocol Handler
184-6 2VAA000844R0001 J
185. Digital Input Subscriber
185. Digital Input Subscriber

The digital input subscriber acquires a group of digital values from a factory instrumentation protocol (FIP) device. Each digital input
subscriber can handle up to eight digital inputs. Up to four digital input subscribers may be linked together allowing one FIP identifier to
reference up to 32 inputs. Link all FIP identifiers configured as digital input subscribers together. Each block specifies the next block
address in the link.
The digital input subscriber has eight outputs corresponding to the eight digital values acquired with quality.
NOTES:
2. If configuring function code 185 for an Ethernet device interface slave (IMEDI01), refer to the IMEDI01 instruction for details of
this function code.
Outputs

F IP
DI N B First digital input with quality
S1 (1 8 5 )
NEXT
N
N+1
N+1 B Second digital input with quality
N+2
N+3 N+2 B Third digital input with quality
N+4
N+5 N+3 B Fourth digital input with quality
N+6
N+7 N+4 B Fifth digital input with quality
N+5 B Sixth digital input with quality
N+6 B Seventh digital input with quality
N+7 B Eighth digital input with quality
Specifications
S1 N 2 I Note 1 Block address of next digital input subscriber block
S2 N 0.000 R 0 - 60000 FIP variable identifier
S3 N 0 I 01 - 38 Group number (X) and number of elements (Y):

X = 0, 1, 2 or 3
Y = 1 through 8
S3 N 0 I 01 - 38 X Y Total
(cont.) 0 1 -8 8
1 1 -8 16
2 1 -8 24
3 1 -8 32
S4 N 0 I 0-3 Input type:

0 = digital
1 = digital with check
2 = boolean
3 = boolean with check
S5 N 0.000 R Full Asynchronous promptitude period in msecs2
S6 N 0.000 R Full Synchronous promptitude period in msecs2
S7 N 00 I 0 or 1 Aperiodic and periodic variable:

0 = aperiodic variable
1 = periodic variable
2VAA000844R0001 J 185-1
Explanation 185. Digital Input Subscriber
S8 N 00 I 00, 01, 10 Asynchronous and synchronous refresh

or 11 evaluation:
00 = asynchronous and synchronous refresh
disabled
01 = synchronous refresh enabled
10 = asynchronous refresh enabled
11 = partial refresh (asynchronous refresh and
synchronous refresh enabled)

NOTES:
31,998 for the HAC
185.1 Explanation
S1
Block address of the next digital input subscriber block.
S2
FIP variable identifier. All data transfer function codes refer to a FIP variable identifier. This is a 16-bit value (unsigned integer) and defines
the variable (read or written from the controller module) for the application layer of the FIP identifier implemented in the I/O module.
For most WorldFIP applications, FIP variable identifiers are shown in a hexadecimal format. Refer to the following example of converting
hexadecimal values to decimal values.
Example
A hex number can be expressed as:
(H0  1) + (H1  16) + (H2  162) + (H3  163) …,
where H0 is the least significant hex digit and H1 is the next significant, and so on.
Example
If the variable identifier was 3AE0, to convert the hex number 3AE0 to decimal:
The least significant hex digit is 0. The next digit is E or 14. The next digit is A or 10. The next digit is 3 or 3. Referring to the preceding
equation, the decimal number is:
(0  160)  (14  161)  (10  162)  (3  163) 

0  224  2560  12288  15072
185-2 2VAA000844R0001 J
185. Digital Input Subscriber Applications
S3
Input group. Digital input secondary module subscribers handle up to four groups of eight inputs. The input group is identified as shown
in Table 185-1.
Table 185-1 Input Group Identification
Group Number Number of Elements Total Elements
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S4
Function type.
0 = digital
2 = boolean
NOTE: Refer to FIP Variable Input/Output Types in function code 184 for the format of each of these function types.
S5
Asynchronous promptitude period. The asynchronous promptitude period is used to measure how promptly the FIP variable is being
updated by the field bus relative to the last time that is was updated. The asynchronous promptitude evaluation is disabled if this
specification is zero.
S6
Synchronous promptitude period. The synchronous promptitude period is similar to the asynchronous promptitude period. The difference
between the two is that the synchronous promptitude is used to measure how promptly the FIP variable is being updated relative to a
synchronization variable produced on the field bus. (Refer to S10 of function code 184.) The synchronous promptitude evaluation is
disabled if this specification is zero.
S7
Periodic and aperiodic variable setting. Periodic variables are produced and consumed on a periodic basis by devices on the field bus.
Periodic variables are typically used for process values that are updated regularly, for example, temperature and pressure values.
Aperiodic variables are produced and consumed on the field bus only when requested by either the producer or a consumer of the
variable. Aperiodic variables are typically used for status and alarm information, or in some cases, infrequently sampled process data
such as chromatograph and pH meter readings. The use of aperiodic variables instead of periodic variables, where appropriate, allows
for a more efficient use of the field bus.
Function code 185 always reads the latest consumed values regardless of this setting. However, this specification must be set
appropriately for the FIP I/O module to treat the variable as either periodic or aperiodic.
S8
Refresh evaluation setting. The refresh evaluation setting determines how the FIP I/O module is to interpret the refresh status flag
contained with the FIP variable that is being consumed.
Refer to S16 of function code 188 for definitions of asynchronous refreshment, synchronous refreshment and partial refreshment.
The FIP I/O module will not consume FIP variables with bad refresh status.
185.2 Applications
Refer to function code 184 for an example and application of FIP function codes 184 through 188.
2VAA000844R0001 J 185-3
Applications 185. Digital Input Subscriber
185-4 2VAA000844R0001 J
186. Analog Input Subscriber
186. Analog Input Subscriber

The analog input subscriber acquires a group of real analog values from a factory instrumentation protocol (FIP) device. Each analog
input subscriber can handle up to eight analog inputs. Up to four analog input subscribers may be linked together, allowing one FIP
identifier to reference up to 32 inputs. Link all FIP identifiers configured as analog input subscribers together with each block specifying
the next block address in the link.
The analog input subscriber has eight outputs with quality that correspond to the eight analog values acquired.
NOTES:
Outputs

F IP
AI
S1 (1 8 6 ) N R First analog input with quality
NEXT
N
N+1 N+1 R Second analog input with quality
N+2
N+3 N+2 R Third analog input with quality
N+4
N+5
N+6
N+3 R Fourth analog input with quality
N+7
N+4 R Fifth analog input with quality
N+5 R Sixth analog input with quality
N+6 R Seventh analog input with quality
N+7 R Eighth analog input with quality
Specifications
S1 N 2 I Note 1 Block address of next analog input subscriber

block
S3 N 0 I 01 - 38 Group number (X) and number of elements (Y):

X = 0, 1, 2 or 3
Y = 1 through 8
X Y Total
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S4 N 0 I 0-5 Input type:

0 = analog real
1 = analog real with check
2 = analog integer
3 = analog integer with check
4 = packed boolean
5 = packed boolean with check
S5 N 0.000 R Full Asynchronous promptitude period in msecs2
S6 N 0.000 R Full Synchronous promptitude period in msecs2
2VAA000844R0001 J 186-1
Explanation 186. Analog Input Subscriber

S8 N 00 I 00, 01, 10 Asynchronous and synchronous refresh evalua-

or 11 tion2:
00 = asynchronous and synchronous refresh
disabled

NOTES:
31,998 for the HAC
2. For most applications, the default value shown will suffice for this specification.
186.1 Explanation
S1
Block address of the next analog input subscriber block.
S2
the variable (read or written from the Harmony controller) for the application layer of the FIP identifier implemented in the FIP module.
Example
The hex system is a base 16 system. Therefore, a hex number can be expressed as:
(H0 1)  (H 1  16)  (H 2  162)  (H3  163) …,
where H 0 is the least significant hex digit and H1 is the next significant, and so on.
Example
(0 160)  (14  161)  (10  162)  (3  163) 

0  224  2560  12288  15072
186-2 2VAA000844R0001 J
186. Analog Input Subscriber Applications
S3
Input group. Analog input I/O module subscribers handle up to four groups of eight inputs. The input group is identified as shown in Table
186-1.
Table 186-1 Input Group Identification
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S4
Function type.
0 = analog real
2 = analog integer
4 = packed boolean
S5
Asynchronous promptitude period. The asynchronous promptitude period is used to measure how promptly the FIP variable is being
updated by the field bus relative to the last time that is was updated. The asynchronous promptitude evaluation is disabled if this
specification is zero.
S6
Synchronous promptitude period. The synchronous promptitude period is similar to the asynchronous promptitude period. The difference
between the two is that the synchronous promptitude is used to measure how promptly the FIP variable is being updated relative to a
synchronization variable produced on the field bus. (Refer to S10 of function code 184.) The synchronous promptitude evaluation is
disabled if this specification is zero.
S7
Periodic and aperiodic variable setting.
Periodic variables are produced and consumed on a periodic basis by devices on the field bus. Periodic variables are typically used for
process values that are updated regularly, for example, temperature and pressure values.
Function code 186 always reads the latest consumed values regardless of this setting. However, this specification must be set
appropriately for the FIP I/O module to treat the variable as either periodic or aperiodic.
S8
Refresh evaluation setting.
The refresh evaluation setting determines how the FIP I/O module is to interpret the refresh status flag contained with the FIP variable
that is being consumed.
Refer to S16 of function code 187 for definitions of asynchronous refreshment, synchronous refreshment and partial refreshment.
The FIP I/O module will not consume FIP variables with bad refresh status.
186.2 Applications
Refer to FIP handler (function code 184) for an example and application of FIP function codes 184 through 188.
2VAA000844R0001 J 186-3
Applications 186. Analog Input Subscriber
186-4 2VAA000844R0001 J
187. Analog Output Subscriber
187. Analog Output Subscriber

The analog output subscriber function code sends a group of real block outputs to a factory instrumentation protocol (FIP) device. Each
analog output subscriber can handle a maximum of eight analog outputs. Four of these blocks with the same FIP identifier number may
be linked together. This allows one FIP identifier to reference a total of 32 inputs. All FIP identifiers configured as analog output
subscribers are linked together with each block specifying the next block address in the link.
The analog output subscriber function code has one output corresponding to the quality of the communication between the FIP and the
Harmony controller.
NOTES:
Outputs
F IP Blk Type Description

AO
S4 (1 8 7 )
S5
N B Quality of output
S6
S7 Specifications
S8
S9
S10
S11
S1
NEXT
S1 N 2 I Note 1 Block address of next analog output subscriber
block
S3 N 0 I Note 1 Group number (X) and number of elements (Y):

X Y Total
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S4 N 2 I Note 1 Block address of output 1
S12 N 0 I 0-5 Output type:

0 = analog real
2 = analog integer
4 = packed boolean
S13 N 0.000 R Full Asynchronous refresh period in msecs
S14 N 0.000 R Full Synchronous refresh period in msecs2
2VAA000844R0001 J 187-1
Explanation 187. Analog Output Subscriber

S16 N 0 I 00, 01, 10 Asynchronous and synchronous refresh setting2:

or 11 00 = asynchronous and synchronous refresh
disabled

NOTES:
31,998 for the HAC
187.1 Explanation
S1
Block address of the next analog output module block.
S2
Example
(H0 1)  (H 1  16)  (H 2  162)  (H3  163) …,
where H0 is the least significant hex digit and H1 is the next significant, and so on.
Example
(0  160)  (14  161)  (10  162)  (3  163) 

0  224  2560  12288  15072
S3
Output group. Analog output module subscribers handle up to four groups of eight outputs. The output group is identified as shown in
187-2 2VAA000844R0001 J
187. Analog Output Subscriber Specifications
Table 187-1.
Table 187-1 Output Group Identification
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S4 through S11
Block addresses of outputs one through eight.
S12
Function type.
0 = analog real
2 = analog integer
4 = packed boolean
S13
Asynchronous refresh period. The asynchronous refresh period measures how well the FIP module is producing the FIP variable data
on the field bus relative to when the Harmony controller refreshes the data. If the FIP variable is not produced on the field bus within the
refresh period, then the refresh status flag associated with this FIP variable is reset to indicate that the data is old. Other FIP field devices
that consume this variable can evaluate the refresh status flag to determine if the FIP variable data is valid or not. This specification must
be set to a value that is equal to or slightly larger than a multiple of the segment cycle time (S2 of function code 82) of the segment in
which this block resides.
S14
Synchronous refresh period. The synchronous refresh period is similar to the asynchronous refresh period. The difference between the
two is that the synchronous refresh period is used to measure how well the FIP module is producing the FIP variable on the field bus
relative to a synchronization variable produced on the field bus (refer to S10 of function code 184).
S15
When aperiodic is selected, function code 187 will produce the variable on the field bus only when one of the input values <S4> through
<S11> has changed since the last time the variable was produced.
S16
Refresh setting. This setting determines how the refresh status for this produced FIP variable is to be determined.
Asynchronous refreshment - refresh status is set to good if the FIP module produces the FIP variable on the field bus within the
asynchronous refresh period (S13) of when the Harmony controller refreshes the FIP variable data. Set bad otherwise.
Synchronous refreshment - refresh status is set to good if the FIP module produces the FIP variable on the field bus within the
synchronous refresh period (S14) of when the synchronization variable (S10 of function code 184) is received. Set bad otherwise.
Partial refreshment - combination of both asynchronous and synchronous refreshment. For the refresh status to be set good:
• The FIP module must produce the FIP variable on the field bus within the asynchronous refresh period of when the
Harmony controller has refreshed the data of the FIP variable.
and
2VAA000844R0001 J 187-3
Applications 187. Analog Output Subscriber
• It must also have produced it within the synchronous refresh period (S14) of when the synchronization variable
(S10 of function code 184) has been received.
Set bad otherwise.
187.2 Applications
187-4 2VAA000844R0001 J
188. Digital Output Subscriber
188. Digital Output Subscriber

The digital output subscriber function code sends a group of digital block outputs to a factory instrumentation protocol (FIP) device. Each
digital output subscriber can handle a maximum of eight digital outputs. Four of these blocks with the same FIP identifier number may be
linked together. This allows one FIP identifier to reference a total of 32 inputs. All FIP identifiers configured as digital output subscribers
are linked together with each block specifying the next block address in the link.
The digital output subscriber function code has one output corresponding to the quality of the communication between the FIP and
Harmony controllers.
NOTES:
Outputs
F IP
DO
S4 (1 8 8 )
S5 N B Quality of output
S6
S7
S8
Specifications
S9
S10
S1
NEXT
S1 N 2 I Note 1 Block address of next digital output subscriber
block
S3 N 0 I Note 1 Group number (X) and number of elements (Y):

X Y Total
0 1-8 8
1 1-8 16
2 1-8 24
3 1-8 32
S12 N 0 I 0-3 Output type:

0 = digital
2 = boolean
S13 N 0.000 R Full Asynchronous refresh period in msecs
S14 N 0.000 R Full Synchronous refresh period in msecs

2VAA000844R0001 J 188-1
Explanation 188. Digital Output Subscriber
S16 N 0 I 00, 01, 10 Asynchronous and synchronous refresh setting2:

or 11 00 = asynchronous and synchronous refresh
disabled

NOTES:
31,998 for the HAC
188.1 Explanation
S1
Block address of the next digital output I/O module block.
S2
Example
(H0 1)  (H 1  16)  (H 2  162)  (H3  163) …,
where His the least significant hex digit and H1 is the next significant, and so on.
Example
(0  160)  (14  161)  (10  162)  (3  163) 

0  224  2560  12288  15072
S3
Output group. Digital output I/O module subscribers handle up to four groups of eight outputs. The output group is identified as shown in
Table 188-1.
0 1-8 8
1 1-8 16
188-2 2VAA000844R0001 J
188. Digital Output Subscriber Applications
2 1-8 24
3 1-8 32
S4 through S11
Block addresses of outputs one through eight.
S12
Function type.
0 = digital
2 = boolean
S13
Asynchronous refresh period. The asynchronous refresh period measures how well the FIP module is producing the FIP variable data
on the field bus relative to when the Harmony controller refreshes the data. If the FIP variable is not produced on the field bus within the
refresh period, then the refresh status flag associated with this FIP variable is reset to indicate that the data is old. Other FIP field devices
that consume this variable can evaluate the refresh status flag to determine if the FIP variable data is valid or not. This specification must
be set to a value that is equal to or slightly larger than a multiple of the segment cycle time (S2 of function code 82) of the segment in
which this block resides.
S14
Synchronous refresh period. The synchronous refresh period is similar to the asynchronous refresh period. The difference between the
two is that the synchronous refresh period is used to measure how well the FIP module is producing the FIP variable on the field bus
relative to a synchronization variable produced on the field bus (refer to S10 of function code 184).
S15
When aperiodic is selected, function code 188 will produce the variable on the field bus only when one of the input values <S4> through
<S11> has changed since the last time the variable was produced.
S16
Refresh setting. This setting determines how the refresh status for this produced FIP variable is to be determined.
Asynchronous refreshment - refresh status is set to good if the FIP module produces the FIP variable on the field bus within the
asynchronous refresh period (S13) of when the Harmony controller refreshes the FIP variable data. Set bad otherwise.
Synchronous refreshment - refresh status is set to good if the FIP module produces the FIP variable on the field bus within the
synchronous refresh period (S14) of when the synchronization variable (S10 of function code 184) is received. Set bad otherwise.
Partial refreshment - combination of both asynchronous and synchronous refreshment. For the refresh status to be set good:
• The FIP module must produce the FIP variable on the field bus within the asynchronous refresh period of when the Harmony con-
troller has refreshed the data of the FIP variable.
and
• It must also have produced it within the synchronous refresh period (S14) of when the synchronization variable (S10 of function
code 184) has been received.
Set bad otherwise.
188.2 Applications
2VAA000844R0001 J 188-3
Applications 188. Digital Output Subscriber
188-4 2VAA000844R0001 J
190. User Defined Function Declaration Explanation
190. User Defined Function Declaration

The user defined function declaration function code declares a user defined function (UDF). The UDF declaration selects the program
that belongs to the UDF block. This block specifies the amount of RAM allocated for the executable copy of the UDF program.
The UDF blocks (function codes 191 and 192) reference S3 through S6 for internal processing.
For more information regarding user defined functions, refer to the Batch 90 and User Defined Function (UDF) Programming
Language Reference product instruction.
Outputs

(1 9 0 )
U D F D EC N
N R Reserved for future use
Specifications
S1 N 0.000 R Full UDF program ID
S2 N 1 I 1 - 6553 UDF program size in 10 byte increments
S3 Y 0.000 R Full Tunable real parameter
190.1 Explanation
The UDF declaration block declares a user defined function. This block performs the following:
• Selects the UDF program that belongs to the block. A Harmony controller may have many UDF programs in its file
system. Each of these UDF programs will have a different program ID number. Specification S1 specifies the ID of
the particular program that belongs to this block.
• Specifies RAM allocation for the executable copy of the program. The copy of the UDF program in the file system is
not in executable form. This copy must be in a UDF declaration block before it can execute. Specification S2
specifies the amount of RAM allocated for the program in increments of ten bytes.
• Function code 190 does not execute the UDF program. A UDF block (function code 191 or 192 depending on which
one the UDF program specifies) performs execution. A UDF program is declared once (function code 190) but may
be executed by many UDF blocks. UDF blocks execute independently. Each block has its own inputs, outputs,
parameters and local data.
• Specifications S3 through S6 (function code 190) are parameters that the UDF program references. If several UDF
blocks share a program, they also share these parameters.
2VAA000844R0001 J 190-1
Explanation 190. User Defined Function Declaration
190-2 2VAA000844R0001 J
191. User Defined Function One

The user defined function one function code executes a user defined function (UDF). The UDF1 block has inputs, parameters, outputs
and program data. Specification S16 allocates the program data space.
The number of inputs, parameters and outputs can be expanded by use of auxiliary UDF blocks (function codes 198 and 199).
Specification S15 links to the first auxiliary UDF block.
Specification S17 links the UDF one block to a UDF declaration block (function code 190).
Outputs
UDF1
S2 N
S3 N+1 N R Real output from UDF program
S4
S5 N+1 R Real output from UDF program
S6
S7
S8 Specifications
S15
S17
S1 N 2 I Note 1 Block address of any input
S15 N 2 I Note 1 Block address of first auxiliary UDF
S16 N 128 I 0 - 65535 Size of data (bytes)
S17 N 2 I Note 1 Block address of UDF declaration

NOTE:
2VAA000844R0001 J 191-1
191-2 2VAA000844R0001 J
192. User Defined Function Two

The user defined function two function code executes a user defined function (UDF). The UDF2 block has inputs, parameters, outputs
and program data. Specification S24 allocates the program data space.
The number of inputs, parameters and outputs can be expanded by use of auxiliary UDF blocks (function codes 198 and 199).
Specification S23 links to the first auxiliary UDF block.
Specification S25 links the UDF2 block to a UDF declaration block (function code 190).
Outputs

UDF2
S1 (1 9 2 )
S2 N
N B Boolean output from UDF program
S3 N+1
S4 N+2 N+1 B Boolean output from UDF program
S5 N+3
S7 N+5
S9 N+7
N+8
S10
N+9
N+4 B Boolean output from UDF program
S11
S12
S13
S14
S15 N+6 B Boolean output from UDF program
S16
S17 N+7 B Boolean output from UDF program
S18
S25
N+9 R Real output from UDF program
Specifications
2VAA000844R0001 J 192-1
S23 N 2 I Note 1 Block address of first auxiliary UDF
S24 N 128 I 32 - 65535 Size of data (bytes)
S25 N 2 I Note 1 Block address of UDF declaration

NOTE:
192-2 2VAA000844R0001 J
193. User Defined Data Import Explanation
193. User Defined Data Import

The user defined data import function code acquires user data input from another module in a different node via the Cnet communication
network. The user data can then be read by user defined function (UDF), batch or C language programs within the module, or it can be
exported by a user defined data export (function code 194) block.
For more information refer to the C Utility Program product instruction, the Batch 90 and User Defined Function (UDF) Programming
Language Reference instruction.
NOTES:
1. This function code can import user defined data from a source module in another node or from a block within the same mod-
ule. This function code cannot import user defined data from another module within the same node. To import user defined data
locally, import a file rather than using this function code.
2. A module cannot utilize more than one user defined data import (function code 193) block to import data from the same user
defined data export block (function code 194) that is in a module in a different Cnet node. This restriction does not apply to user
defined data import blocks that import from user defined data export blocks which reside within the same module.
Outputs
D ATA IMP T
(1 93 )
ST
N N User User defined data and status with quality
defined
N+1 R Block status
Specifications
S2 N 0 I Note 1 Source block number
S5 N 0 I 0 - 80 Maximum user data length
S6 N 0 I 0 - 255 Engineering units
S7 Y 0 I 0 or 1 Startup control and force quality control:

0 = block quality on startup is bad
1 = block quality on startup is good
S8 N 0 R Full Spare
S9 N 0 I Full Spare
S10 Y 0 R Full Spare

NOTE:
193.1 Explanation
The defined specifications of function code 193 include the source module address, block number, node address, loop address,
maximum data length, engineering units and startup control. The module, block, node and loop specifications must reference a user
defined data export function block (function code 194). The maximum data length specification sets the maximum allowable user data
length. If an input to the block exceeds this length, truncation occurs and the count fields (included in the user data block output) will be
set. The engineering units specification can be used to describe the content of the user data (e.g., ASCII strings). The startup control
2VAA000844R0001 J 193-1
Specifications 193. User Defined Data Import
specification can be used to force the block to output good quality on startup. The specifications, except for startup control, are not
tunable.
S1
Source module address.
S2
Source block number.
S3
Source node address.
S4
Source loop number.
S5
Defines the maximum user data length. The maximum user data length is a nontunable integer specification. If an input to the block
exceeds this length, truncation occurs and the count fields (included in output block N) are set.
S6
Defines the engineering units.
S7
Defines the startup control. The startup control can be used to force the block to output good quality on startup.
S8 - S11
Spare.
193.1.2 Outputs
N
Contains the user data and its alarm with quality status. The maximum output data length is 82 bytes (80 bytes of data plus two count
bytes). Updates to this user data from the source user data export function block occur on an exception report basis.
N+1
Block status output multiplexed as a real value. Refer to function code 194, block output N+1 for more information.
193.2 Applications
Refer to Application Programs in function code 194.
193-2 2VAA000844R0001 J
194. User Defined Data Export Explanation
194. User Defined Data Export

The user defined data export function code outputs user data via an exception report. A batch program, user defined function (UDF), C
language program executing in the Harmony controller or a human system interface (HSI) command determines the user defined data
output (output block N).
For more information refer to the C Utility Program product instruction, the Batch 90 and User Defined Function (UDF) Programming
Language Reference instruction.
Outputs
DATA Blk Type Description

EX PT
(1 9 4 )
S1 ID N User User defined data and status with quality
S2
S3
IC ST defined
IS
N+1 R Block status
Specifications
S1 N 2 I Note 1 Block address of input data
S2 N 2 I Note 1 Block address of input control
S3 N 2 I Note 1 Block address of input status
S4 N 0 I 0 - 80 Maximum user data length
S5 N 0 I 0 - 255 Engineering units
S6 Y 0 I 0 or 1 Start-up control and force quality control:

S7 Y 0 R Full Return alarm time-out period (secs)
S8 N 0 R Full Spare
S9 N 0 I Full Spare

NOTE:
194.1 Explanation
The defined specifications of function code 194 include the input data block, input control block, input status block, maximum data length,
engineering units, startup control and return alarm time-out period. The specifications, except for the startup control and return alarm time
period, are not tunable.
S1
Block address of the input data. The default value of block address two indicates that the block is application program driven. When S1
is set to two, the user defined data export block expects to interface to a C language, UDF or batch program and ignores any block inputs.
When S1 is set to any block other than two, the block must be another valid user data block output (e.g., user data import function code
193).
2VAA000844R0001 J 194-1
Specifications 194. User Defined Data Export
S2
Block address of the input control. The input control parameter is formed by setting the corresponding bits of a real block output. This
block number must reference the output of a valid real block. Table 194-1 lists the bits of the input control.
NOTE: When S1 is set to two, S2 is driven by a C language, UDF or batch program.
Table 194-1 Input Control Specification <S2>
Bit Control Description
0 Auto/manual This field controls block output updates. A level transition from 0 to 1 or 1 to 0
toggles the mode of the block between auto and manual (Table 194-2).
1 Data When is enabled, any updates to the block output via HSI command
interlock messages are inhibited (Table 194-2).
2 Mode When enabled, attempts to change the block mode by toggling the
interlock auto/manual are ignored.
Table 194-2 Data Export Function Block Operation
Input Lock
Mode Operation
Source Status
Application Auto Locked The application program controls the output of the user defined
program data export block not allowing any input from the HSI.
Unlocked The application program controls the output of the user defined
data export block allowing input from the HSI. The application pro-
gram may or may not update the output of the block based on the
input from the HSI. It depends on how the program is written.
Manual Locked This operation is non-deterministic and should not be used.
Unlocked Both the application program and the HSI control the output of the
user defined data export block. A text string received from the HSI
can be read by the application program. The text string received
from the HSI becomes the output of the block unless the program
updates the output with a new text string.
Function Auto Locked Another function block controls the output of the user defined data
block export block not allowing any input from the HSI.
Unlocked This operation is non-deterministic and should not be used.
Manual Locked This operation is non-deterministic and should not be used.
Unlocked The HSI controls the output of the block. A text string received
from the HSI becomes the output of the block.
S3
Block address of the input status. The input status parameter is formed by setting the corresponding bits or a real block output. This block
194-2 2VAA000844R0001 J
194. User Defined Data Export Outputs
number must reference the output of a valid real block. Table 194-3 lists the bits of the input status.
NOTE: When S1 is set to two, S3 is driven by a C language, UDF or batch program.
Table 194-3 Input Status Specification <S3>
Bit Status Description
0 Quality This field sets the quality of the output:

0 = good quality
1 = bad quality
NOTE: This field is only used by C Language, UDF, or Batch Program.
1 Quality This field sets the quality override:

override 0 = normal
1 = quality override
NOTE: Output Quality is a product of an XOR of this field and the Input Quality.
2/3 — Not used
4/5 Alarm This field sets 2 alarm bits providing 4 levels of alarm input:
level 0/0 = no alarm
0/1 = specific alarm level 1
6/7 — Not used
8 New When the new packet flag is enabled, the block generates a new exception report
packet with a new sequence number even though the data may not be new. The new
flag packet flag of the exception report is set to indicate this operation.
S4
Defines the maximum user data length. The maximum user data length is a nontunable integer specification. If an input to the block
exceeds this length, truncation occurs and the count fields (included in output block N) are set.
S5
Defines the engineering units.
S6
Defines the startup control. The startup control can be used to force the block to output good quality on startup.
S7
Defines the return alarm time-out period in seconds. If S7 is set to zero seconds, return alarming is disabled. If S7 is not zero, return
alarming occurs each time that this time period expires. When return alarming occurs, the return alarm status bit of the block output is
toggled and a new exception report is generated.
S8 through S11
Spare.
194.1.2 Outputs
N
User data block output with quality. The maximum output data length is 80 bytes plus two count bytes. This output is exception reported
when significant change occurs. Significant change is a difference in a memory block comparison function between the current output
and the new output or a change in any of the status fields.
Output N also includes a sequence number. This sequence number is maintained at the system level by the harmony controller to assist
in multiple user data packet management and user data packet identification.
2VAA000844R0001 J 194-3
Exception Report Data 194. User Defined Data Export
N+1
Block status output. The real value can be demultiplexed to bits using function code 126. Table 194-4 lists the bits.
Table 194-4 Block Status Output N+1
Bit Description Bit Description
0 Packet restart 7 Quality override
1 Data interlock 8 Auto/manual
2 New packet indicator 9 Red tag status
3 Not used 10 Echo

NOTE: This field is
only used by C Lan-
guage, UDF, or Batch
Program.
4 Mode interlock 11/12 Not used
5 Return alarm (toggle) 13/14 Alarm level
6 Suppress alarms 15 Quality
194.2 Exception Report Data
Application programs such as C language, UDF or Batch 90 can read various types of data from the user defined data export function
code:
• Alarm level.
• Auto/manual state.
• Configured block size (number of user data bytes).
• Current byte count.
• Data interlock state.
• Echo indicator.
• Enable new specifications flag.
• Exception report time stamp (four bytes).
• Inhibit time stamp flag.
• Mode interlock.
• Original byte count.
• New packet data.
• New packet indicator.
• Packet sequence number.
• Packet restart.
• Quality.
• Quality override flag.
• Red tag state.
• Return alarm state.
• Suppress alarm flag.
The userdata_xr_read() function provides the ability to read this data.
Application programs such as C language, UDF or Batch 90 can write various exception report data to the user defined data export
function code:
• Quality.
194-4 2VAA000844R0001 J
194. User Defined Data Export Application Programs
• Alarm level.
• Auto/manual state.
• Quality override.
• New packet indicator (force exception report).
• Data interlock state.
• Exception report time stamp (four bytes).
• Packet data.
• Mode interlock.
The userdata_xr_write() function provides the ability to write this data.
194.3 Application Programs
The input block address and input control block address provide inputs that allow control of the data flow in the user data export function
code. The inputs that control this flow include the input block address, auto/manual and data interlock. Figures 194-1 through 194-5 show
five operating modes of the block that can be realized from a combination of these three inputs.
The first example (Fig. 194-1) is an application program control. This example allows application programs such as C language or batch
to write directly to the user data block output. The application program sets auto mode and enables the data interlock. The module denies
HSI write access to this block. The application program is the only process that updates the block. The data of the block is exception
reported if the application program changes or updates the block data or any of the write block status fields (e.g., alarm level).
C O N FIG U R ATIO N
A PP L IC AT IO N
C O N T RO L
DATA
EX PT
(1 9 4 ) AU TO M O D E
S1
ID DATA IN T E R L O C K
S2 IC ST ENABLED
S3
IS
S PE C IFIC AT IO N S
S ET TO D E FAU LT
S ET TIN G S
A P P L IC AT IO N
AP P LIC ATIO N
U S ER D ATA _ X R _ W R IT E
BLOCK E XC E P T IO N
OU TPU T R E PO RT
T 0 1 92 6 A
Figure 194-1 Application Program Control Example
Figure 194-2 shows an application program control with HSI access example. Application programs write directly to the user data block
output. The application program sets auto mode and disables the data interlock. HSI text string data is accepted by the Harmony
controller. The received HSI command information can be read by the application program but it will not update to the block output unless
it is explicitly written there by the application program. The data of the block are exception reported if the application program
2VAA000844R0001 J 194-5
Application Programs 194. User Defined Data Export
changes/updates the block data or any of the writable block status fields.
C ON FIG U R ATIO N
A P P LIC ATIO N
C O N TR O L
DATA
EX PT
(194) AU TO M O D E
S1 ID D ATA IN TE R LO C K
S2 IC ST D IS AB LE D
S3 IS
S P E C IFIC ATIO N S
S ET TO D E FAU LT
S ET TIN G S
A P P LIC ATIO N
U S ER D ATA_X R _R E A D
A PP LIC ATION
U S ER D ATA_X R _W R IT E
B LO C K B LO C K E X C E P TIO N
D ATA O U TP U T R E PO R T
C O N S O LE
ME SSAGE
T 01 927A
Figure 194-2 Application Program Control with HSI Access
Figure 194-3 shows an application program control with HSI access and echo example. The application program sets auto mode and
disables the data interlock. When auto/manual is manual mode and the Harmony controller receives new user data from the HSI, this
information is placed in the block output and is echoed back to the HSI. The exception report designates echoed information by setting
an echo field. Application programs can read the information sent from the HSI and write to the block output. The exception report
contains the information from the last process, either HSI or application program, which updated the block prior to its execution cycle.
The data of the block are exception reported if the application program changes/updates the block data or any of the writable block status
fields.
C ON FIG U R ATIO N
APP LIC ATIO N

C O N TR O L
DATA
EX PT
(194) AU TO M O D E
S1 ID D ATA IN TE R LO C K
S2 IC ST D IS AB LED
S3
IS
S PEC IFIC ATIO N S

S ET TO D EFAU LT
S ET TIN G S
APP LIC ATIO N
U S ER D ATA_X R _R EAD
A PP LIC ATION
U S ER D ATA_X R _W R IT E
BLO C K B LO C K EXC E PTIO N

D ATA O U TPU T R E PO R T
C O N SO LE
M E SSAG E
T 01 928A
Figure 194-3 Application Program Control with HSI Access and Echo
Figure 194-4 shows a block control example. A user defined data import block output is the input. This input indicates to the user defined
data export block that it is under block control. HSI write access is not allowed since data interlock is enabled. This block exception reports
194-6 2VAA000844R0001 J
194. User Defined Data Export HSI - Text String Element
its information when significant change of its output occurs.
C O N FIG UR ATIO N
B LOC K C ONT RO L
DATA
D ATA IM P T E X PT
(1 9 3 ) S1 (1 9 4 )
ID
N S2
ST IC ST
S3
IS
S1 (3 5 ) AU T O
TD -D IG
N
S 2 = 0 (P U L S E O U T P U T ) S1
S 3 = 0 .0 0 0
S2 (6 5 )
S3 DSU M
N
S4
LOCK
1
1 S5 = 1 .0 0 0
S6 = 2 .0 0 0
S7 = 0 .0 0 0
S8 = 0 .0 0 0
U S E R -D E F IN E D
D ATA IM P O RT
F U N C T IO N C O D E
A P P LICATIO N
B LOC K E X C E P T IO N
OU TPU T R E P O RT
T 01 92 9 A
Figure 194-4 Block Control Example
Figure 194-5 shows a block control with HSI access example. Information that is received from the HSI is placed in the block output. The
input block address must reference a valid user data output block number. Accomplish this by pointing the block at itself (set S1 to block
output N). This block exception reports its information when a significant change of its output occurs.
C O N FIG U R ATIO N
B L O C K C O N T RO L
DATA
M A N U AL S 1
EX PT
0 S1 (19 4 )
0 U NLOC K S 2 ID
(65 ) S2
S3 DSU M IC ST
N S3
S4 IS
S5 = 1 .0 0 0
S6 = 2 .0 0 0
S7 = 0 .0 0 0
S8 = 0 .0 0 0
APP LIC ATIO N
B LOC K B LO C K E XC E P TIO N
D ATA O U TP U T R EPO RT
C O NSO LE
M E SSAGE
T 01 9 30 A
Figure 194-5 Block Control with HSI Access
194.4 HSI - Text String Element
The text string element allows the operator to interact with an application program running in a module. The user defined data export
function code in a module provides an interface between the HSI and the program. At the HSI, a TEXTSTR tag referencing a data export
block in the module allows an operator at the HSI to interact with the function block. The data export function block can also be driven by
another function block rather than directly by an application program.
The text string functionality provides, for example, a means to prompt or question an operator and have the operator respond to the
2VAA000844R0001 J 194-7
C Language Program 194. User Defined Data Export
prompt or question in some manner. The response may be to make some type of selection, acknowledge an event or provide an answer
to a question. It can also be used to simply allow the operator, through descriptive text, to monitor and verify the progress of a process
routine.
The capabilities provided by the text string function are not limited to the uses previously described. A batch program or C language
program executing in the module determines the operations performed through the text string block and text string element.
194.5 C Language Program
This example demonstrates how two C language programs, running on two modules, residing in separate HCU modules, can exchange
data using function codes 193 and 194. The data that are exchanged are an array of 16 floats (64 bytes in size), which is exported from
the module at 1-2-4, block address 200. These data are then imported by the module at 1-3-4, block address 200.
The export module contains a function code 194 at block address 200, and its C language program is as follows:
#include <xr_bufs.h>
float matrix[4][4]; /* array of 16 floats to export */
struct userdata_xr_buf xr; /* buffer for FC194 */
void main(void)
{
long int status;
short int row, col;
/* setup array of floats to some arbitrary values */
for(row=0; row<4; row++)
{
for(col=0; col<4; col++)
{
matrix[row][col] = row * col / 50;
}
}
/* setup FC194 buffer */
xr.data = (char *) matrix; /* point to floats */
xr.mask = DATA | QUALITY; /* set data and quality */
xr.quality = GOOD_QUALITY /* set quality good */
/* call export function at block 200 */
status = userdata_xr_write(200, &xr, sizeof(matrix));
/* program continues here... */
}
The import module contains a function code 193 at block address 200, and its C program is:
#include <xr_bufs.h>
float matrix[4][4]; /* array of 16 floats to import */
struct userdata_xr_buf xr; /* buffer for FC193 */
void main(void)
{
long int status;
short int row, col;
/* setup FC193 buffer */
xr.data = (char *) matrix; /* point to floats */
xr.mask = READ_FROM_BLOCK_OUTPUT; /* set to read
FC193 */
/* call import function at block 200 */
status = userdata_xr_read(200, &xr, sizeof(matrix));
/* if return ok (64 bytes read), print values */
if (status == 64)
{
for(row=0; row<4; row++)
{
for(col=0; col<4; col++)
{
printf("Value (%d,%d): %f\n",
row, col, matrix[row][col]);
}
}
}
else
194-8 2VAA000844R0001 J
194. User Defined Data Export C Language Program
{
printf("Import error: %d\n", status);
}
}
The Symphony configuration for this example is shown in Figure 194-6.
S O U R C E B R C -10 0
A D D R E S S : 1-2-4
B L O C K 100 : F C 14 3
B L O C K 200 : F C 19 4
HAC FOR H CU 2
C O N T RO L N E TW O R K
HAC FOR H CU 3
IM P O RT B R C -100
A D D R E S S : 1-3-4
B L O C K 100 : F C 14 3
B L O C K 200 : F C 19 3 (IM P O RT IN G F R O M 1-2-4, B L O C K 200 )
T 02 02 1 A
Figure 194-6 Symphony Configuration Example
2VAA000844R0001 J 194-9
C Language Program 194. User Defined Data Export
194-10 2VAA000844R0001 J
198. Auxiliary Real User Defined Function

The auxiliary real user defined function block defines additional real outputs, tunable parameters and inputs for a user defined function
block (function codes 191 and 192).
For more information regarding user defined functions, refer to the User Defined Function (UDF) Programming Language product
instruction and the UDF - User Defined Function Configuration Language application guide.
Outputs
AU X
RE AL
UDF N R Real output from UDF program
S1 (198)
S2 N N+1 R Real output from UDF program
S3 N+1
N+2
S9 N+3
N+3 R Real output from UDF program
Specifications
S9 N 0 I Note 1 Block address of next auxiliary UDF (0 ends link)

NOTE:
2VAA000844R0001 J 198-1
198-2 2VAA000844R0001 J
199. Auxiliary Digital User Defined Function

The auxiliary digital user defined function block defines additional digital outputs, tunable parameters and inputs for a user defined
function block (function codes 191 and 192).
Outputs
AU X
D IG Blk Type Description
UDF
S1 (199)
N
N B Boolean output from UDF program
S2
S3 N+1
S9 N+3
Specifications
S9 N 0 I Note 1 Block address of next auxiliary UDF (0 ends link)

NOTE:
2VAA000844R0001 J 199-1
199-2 2VAA000844R0001 J
201. Data Point Definition General Description
201. Data Point Definition
201.1 General Description
The INFI-NET data point definition function code permits an INFI-NET or Plant Loop to import data from an INFI-NET or Plant Loop via
the INFI-NET to Plant Loop interface. Specification S1 defines the point data type. The following Specifications table lists all the point
types on the originating INFI-NET or Plant Loop that can generate exception reports of the corresponding type on the receiving INFI-NET
or Plant Loop. Specifications S2 through S5 define the INFI-NET or Plant Loop loop, node, module and block address of the data point
that this function code will import.
201.2 Outputs
ID P D E F
(20 1 )
N B Block status for all point types except trend (good

quality):
0 = specifications and exception reports received
1 = specifications received, exception reports not
received
Block status for all point types except trend (bad
quality):
0 = specifications not received, exception reports
received)
1 = specifications not received, exception reports not
received
Block status for trend point (good or bad quality):
0 = trend data request received
1 = trend data request not received
Remote IPT module ID (good quality):

0 = link to remote IPT module is good
1 = link to remote IPT module is bad
Remote IPT module ID (bad quality):
0 and 1 = specifications not received
Remote module status (good quality):
0 = module status exception received, error summary
is 0
1 = module status exception received, error summary
is 1
Remote module status (bad quality):
0 = module status exception not received, error sum-
mary
is 0
1 = module status exception not received, error sum-
mary
is 1
2VAA000844R0001 J 201-1
Specifications 201. Data Point Definition
S1 N 0 I 0 - 11 Import data type:

0 = digital (function code 45)
1 = analog (function code 30, 70 or 151)
2 = station (function code 21, 22, 23 or 80)
3 = remote control memory (function code 62)
4 = remote manual set constant (function code 68)
5 = device driver (function code 123, 129 or 136)
6 = trend point (function code 66)
10 = remote station ID
11 = remote module status
S2 N 1 I 1 - 250 Source loop for data
S3 N 1 I 1 - 250 Source node for data
S4 N 2 I 0 - 31 Source module for data
S5 N 1 I 0 - 9998 Source block for data
201.4 Explanation
The INFI-NET to Plant Loop interface may be operated as a bridge (bridge mode) or configured gateway (non-bridge mode). No function
code 201 configuration is required when the INFI-NET to Plant Loop interface is operated as a bridge on an INFI-NET. When the INFI-
NET to Plant Loop interface is on a Plant Loop or it is being operated as a configured gateway, function code 201 configuration is required.
The function block range for this function code is 30 to 9,998. When the INIPT02 module containing this function code is on an INFI-NET,
the exception reports are made available at the interface node address, module address two, and function code 201 block number.
Because Plant Loop exception reported blocks must fall in the range of zero to 1,023, a virtual addressing mechanism is used when the
INIPT02 module containing this function code is configured on a Plant Loop. For blocks in the range of 30 to 1,023, exception reports are
made available at the interface node address, module address two and function code 201 block number. For blocks greater than 1,023,
the module address and block number are derived as shown in Table 201-1.
Table 201-1 Block Numbers for INFI-NET
Module Block No.

Block Range
Address Offset
30 - 1023 2 0
1024 - 2047 3 1024
2048 - 3071 4 2048
3072 - 4095 5 3072
4096 - 5119 6 4096
5120 - 6143 7 5120
6144 - 7167 8 6144
7168 - 8191 9 7168
8192 - 9215 10 8192
9216 - 9998 11 9216

NOTE: The block number of the Plant Loop exception
report is the function code 201 block number minus the
block number offset.
For example, a function code 201 is configured in the INFI-NET to Plant Loop interface at block address 2000. The specifications S1
through S5 define the INFI-NET loop, node, module address, and block number on the INFI-NET. A Plant Loop node may request the
201-2 2VAA000844R0001 J
201. Data Point Definition Specifications
corresponding exception reports at the interface node address, module three, and block 976.
Consoles on the Plant Loop can request trend data from INFI-NET by directing the requests at each INFI-NET data point definition block
specified as a trend point type (S1 equals six). For this case, a fixed module number of two and block numbers in the range 30 to 9,998
must be used for the trend block location specified by S2 through S5.
The output of this block reflects the status of the block import data, rather than the exception report data values themselves. The output
for a trend type block indicates whether or not a request for trend data has been received.
S1
Specification S1 identifies what type of data the INFI-NET side is importing to the Plant Loop.
0 = digital (function code 45)
1 = analog (function code 30, 70 or 151)
2 = station (function code 21, 22, 23 or 80)
3 = remote control memory (function code 62)
4 = remote manual set constant (function code 68)
5 = device driver (function code 123, 129 or 136)
6 = trend point (function code 66)
10 = remote IPT module ID
11 = remote module status
The specification value of 10 is only used in non-bridge mode IPR interfaces and it identifies the address (loop, node, module, and block
number) of an INIPT02 module to which this INIPT02 module is to communicate. The specified module address and block number must
always be set to two and zero respectively. At least one function code 201 (S1 = 10) must be configured in each INIPT02 module that is
operating in non-bridge mode. A non-bridge mode INIPT02 module that is the central participant in a multiple remote configuration must
contain a function code 201 (S1 = 10) for each INIPT02 to which it expects to communicate. A non-bridge mode INIPT02 module that is
a remote participant in a multiple remote configuration must only contain a single function code 201 (S1 = 10). Function code 201s with
S1 set to zero through six or 11 that follow a function code 201 with S1 set to 10 will be associated with the function code 201 (S1 set to
10) they follow.
Example One
A system has one local IPR interface and two remote IPR interfaces. The local IPR interface is connected to node 54 of loop five. One
remote IPR interface is connected to node seven of loop 10 while the other is connected to node nine of loop 50. Ten analog points
(function blocks 100 through 109) and the module status (function block zero) are to be imported from node 15 of loop 10 and node 43
of loop 50. The local IPT module configuration is shown in Figure 201-2.
Table 201-2 Example IPT Module Configuration
Block
S1 (Type) S2 (Loop) S3 (Node) S4 (Module) S5 (Block)
Number
100 10 10 7 2 0
110 11 10 15 3 0
115 1 10 15 3 100
116 1 10 15 3 101
117 1 10 15 3 102
118 1 10 15 3 103
119 1 10 15 3 104
120 1 10 15 3 105
121 1 10 15 3 106
122 1 10 15 3 107
123 1 10 15 3 108
124 1 10 15 3 109
200 10 50 9 2 0
210 11 50 43 3 0
2VAA000844R0001 J 201-3
Outputs 201. Data Point Definition
Table 201-2 Example IPT Module Configuration (Continued)
Block
S1 (Type) S2 (Loop) S3 (Node) S4 (Module) S5 (Block)
Number
227 1 50 43 3 100
228 1 50 43 3 101
229 1 50 43 3 102
230 1 50 43 3 103
231 1 50 43 3 104
231 1 50 43 3 105
233 1 50 43 3 106
234 1 50 43 3 107
235 1 50 43 3 108
236 1 50 43 3 109
The specification value of 11 is only used in non-bridge mode IPR interfaces and it identifies the address (loop, node, module, and block
number) of a module on the other side of the link whose status is to be imported. This importing of status can occur from local to remote
IPR interfaces and from remote to local IPR interfaces but not between remote IPR interfaces. The specified block number must always
be set to zero. The presence of a function code 201 with S1 set to 11 causes a virtual module to appear at the local IPT node address.
This virtual module is used as a proxy for the module whose status it is configured to present. The virtual module also monitors and
downloads configurations and firmware, provides module status reports (either exception reported or on-demand), and provides problem
reports. Virtual module numbers are assigned during IPT module startup while the function blocks with S1 set to 11 are initialized in block
order. The first function block with S1 set to 11 that is initialized is assigned the virtual module address of four. The second is assigned
the virtual module address of five and so on. Up to 27 virtual modules can be used with the maximum virtual module address being 31.
Example Two
The configuration detailed in Example One would create virtual modules four and five in response to function code 201s (with S1 set to
11) residing at function blocks 110 and 210.
Requests directed to virtual module four are sent to the remote module whose address is loop 10, node 15, and module three. The block
number specified in the request is sent on to the remote IPT module unchanged.
An operator assigned trend that requests data from loop five, node 54, module five, block 22 will display the value of the seconds counter
in the extended executive block of the remote IPT module in loop 50, node 43, module 3, block 22.
S2
Specification S2 identifies the data source loop address.
S3
Specification S3 identifies the data source node address.
S4
Specification S4 identifies the data source module address.
S5
Specification S5 identifies the data source block number.
201.6 Outputs
N
Function code 201 has one output. It provides the status of all point types except trend, remote IPT module ID, and remote module status.
Output N also provides confirmation of receipt for trend points.
Block status for all point types except trend when quality is good:
0 = specifications and exception reports received
1 = specifications received, exception reports not received
Block status for all point types except trend when quality is bad:
0 = exception reports received, specifications not received
201-4 2VAA000844R0001 J
201. Data Point Definition Outputs
1 = exception reports not received, specifications not

received
Block status for trend point when quality is good or bad:
0 = trend data request received
1 = trend data request not received
Remote IPT module ID when quality is good:
0 = link to remote IPT module is good
1 = link to remote IPT module is bad
Remote IPT module ID when quality is bad:
0 and 1 = specifications not received
Remote module status when quality is good:
0 = module status exception received, error summary is 0
1 = module status exception received, error summary is 1
Remote module status when quality is bad:
0 = module status exception not received, error summary
is 0
1 = module status exception not received, error summary
is 1
2VAA000844R0001 J 201-5
Outputs 201. Data Point Definition
201-6 2VAA000844R0001 J
202. Remote Transfer Module Executive Block (INIIT12)
202. Remote Transfer Module Executive Block (INIIT12)

The remote transfer module executive (EXEC IIT) block function code defines how the INIIT12 remote transfer module operates. It has
a fixed block address of one (within the INIIT12 module).
Outputs
EX EC Blk Type Description

IIT
(2 0 2 )
P 0 ST
1
1 B Port 1 communication status:
P 1 ST
2 0 = good
S PA R E
S PA R E
3 1 - with no alarm = error warning
S PA R E
4 1 - with alarm = port failed
5
S PA R E
6
2 B Port 2 communication status:
0 = good
1 - with no alarm = error warning
1 - with alarm = port failed
3 I Spare
4 I Spare
5 I Spare
6 I Spare
Specifications
S1 N 0 I Full Port 1 transmission start delay after transmitter turned

on (msecs)
S2 N 0 I Full Port 1 transmitter turn off delay after transmission sent

(msecs)
S3 N 0 I Full Port 2 transmission start delay after transmitter turned

on (msecs)
S4 N 0 I Full Port 2 transmitter turn off delay after transmission sent

(msecs)
S5 N 200 I Full Port 1 maximum transmission duration (in msecs, half

duplex only)
S6 N 200 I Full Port 2 maximum transmission duration (in msecs, half

duplex only)
S7 N 60 I Full Port 1 communication status watchdog timer (secs)
S8 N 60 I Full Port 2 communication status watchdog timer (secs)
S9 N 12 I 1 - 12 Port 1 baud rate:

1 = 110 5 = 600 9 = 4,800
2 = 134.5 6 = 1,200 10 = 1,800
3 = 150 7 = 2,000 11 = 9,600
4 = 300 8 = 2,400 12 = 19,200
NOTE: The default baud rate can be selected by
switch settings in INIIT12 firmware revisions B.1 and
later.
S10 N 12 I 1 - 12 Port 2 baud rate. Same settings as S9.
2VAA000844R0001 J 202-1
Applications 202. Remote Transfer Module Executive Block (INIIT12)
S11 N 0 I 0-3 Port 1 data characteristics:

0 = 8 data bits, 1 stop bit, no parity
1 = 8 data bits, 1 stop bit, even parity
2 = 8 data bits, 1 stop bit, odd parity
3 = 8 data bits, 2 stop bits, no parity
S12 N 0 I 0-3 Port 2 data characteristics. Same settings as S11.

NOTE: Not used if port 2 enabled as diagnostic port
S13 N 0 I 0-1 Port 1 duplex mode:

0 = full duplex
1 = half duplex

0 = full duplex
1 = half duplex
NOTE: Not used if port 2 enabled as diagnostic port
S15 N 1 I 0-4 Port 2 mode:

0 = port 2 not used or diagnostic port
1 = standby for port 1 (port 1 preferred)
2 = alternate to port 1 (either port acceptable)
3 = both ports used (one port is acceptable)
4 = both ports required (one port not
acceptable)
S16 N 10 I 0 - 100 Percent error rate used to calculate serial channel sta-
tus for the executive block digital outputs. Specification
S16 is used in conjunction with S7, S8, and S15 to
determine if a communication equipment failure has
occurred. Communication equipment failure may lead
to the action selected in S17.
S17 N 0 I 0-3 Action on communication equipment failure:

0 = no backup equipment available
1 = switch state of D03 (select alternate
equipment)
2 = switch to redundant module
S18 N 0 I 0-3 Exception reporting rate (time between scans):

0 = 2.00 secs
1 = 1.00 sec
2 = 0.50 sec
3 = 0.25 sec
202.1 Applications
202.1.1 Serial Data Channel Operation
Function code 202 is the executive block that contains the specifications for serial data channel operation. The serial data channels can
operate in either half duplex or full duplex mode. The RS-232-C serial ports are individually configurable.
202.1.2 Half Duplex Operation
Half duplex is the operation of a communication circuit in which each end alternates as sender and receiver. At any instant, electrical
information flows in only one direction. The direction of transmission (i.e., local to remote or remote to local) alternates on the serial link.
Therefore, the modem carrier and the transceiver transmitter section need to be enabled before data can be transmitted. Additionally,
the transmitter needs to be disabled prior to shutting down the modem carrier after the data transmission. Finally, the primary IIT module
may need to switch the antenna to the active transceiver. The INIIR01 Remote Interface requires a digital output I/O module, cabling,
and a termination unit to switch external equipment in the half duplex mode. The executive block provides specifications to control
202-2 2VAA000844R0001 J
202. Remote Transfer Module Executive Block (INIIT12) Half Duplex Operation
external communication equipment.
NOTE: The digital I/O module, cabling and termination unit are optional parts of the IIR. The interface requires these optional parts
for operation in half duplex mode when switching external equipment is required and in applications using redundant external com-
munication equipment (Fig. 202-1).
S9 through S14
The executive block enables the IIT module to handle various types of communication equipment. Setting S13 (channel one) or S14
(channel two) to one enables half duplex mode. Specifications S9, S10, S11 and S12 select the transmission rate (baud), type of parity
(odd or even), and number of stop bits.
The IIT module uses the request to send (RTS) signal to control the modem carrier. Most modems have, or may be configured to have,
a carrier turn-on delay. A carrier turn-on delay provides an additional delay between the receipt of the RTS signal and the activation of
the clear to send (CTS) signal. The IIT module must receive the CTS signal from the modem before it starts to transmit data.
S1 through S6
The RTS output of the serial port keys the modem carrier. A digital I/O module output keys the transmitter carrier. The digital output
enables the transmitter carrier to be keyed ON prior to the data transmission, and keyed OFF prior to turning off the modem carrier.
Specifications S1, S2, S3 and S4 set delays. Specifications S1 and S3 decide the carrier turn-on delay. Specifications S2 and S4 set the
delay between dropping the transmitter carrier and dropping the modem carrier. Specifications S5 and S6 allow setting limits on the
duration of the transmission. These specifications ensure that each side of the INIIR01 Remote Interface has an opportunity to originate
a message of its own. Figure 202-1 shows the timing of external equipment enable signals for half duplex operation.
Figure 202-2 illustrates redundant INIIT12 modules with control of external equipment in half duplex operation. Table 202-1 lists the
possible specification settings for the EXEC IIT block for the configuration in Figure 202-1.
TIM IN G AT LO C A L IN IIT 12
S1 T R A N S M IT S2 S1 R E C EIV E S2
D E L AY M E SS AG E D E L AY D E L AY M E SS AG E D E L AY
T xTxT xT xTxTx R x R xR x R xR xR x
0 T IM E
RT S A S SE RT E D ( D TE M O D E ) RT S IN H IB ITE D (D T E M O D E)
SET D O4 R E SE T D O 4
TR A N S M ITTE R EN A B LED
M O D E M C A R R IER E N A B LE D
TIM IN G AT R EM O TE INIIT1 2
R E C E IV E TR A N S M IT
S2 S1 S2
M E S S AG E M E SS AG E
D E LAY D E L AY D E LAY
R xR xR xR xR xR x TxT xTxT xTx Tx
0 TIM E
RT S A S SE RT E D ( D TE M O D E ) RT S IN H IB ITE D (D T E M O D E)
SET D O4 R E SE T D O 4
T R A N S M ITTE R EN AB L ED
M O D E M C A R R IER E N A BL E D
T 0 2 3 43 A
NOTE: To assure proper timing, function code 202 specifications related to serial channel operation (S1
through S14) must be set the same in both local and remote IIT modules.
Figure 202-1 Timing Diagram of Enable Signals in Half Duplex Mode
2VAA000844R0001 J 202-3
Half Duplex Operation 202. Remote Transfer Module Executive Block (INIIT12)
P R IM A RY S E C O N DA RY
IN N IS 0 1 IN IIT1 2 IM D S O 1 4 IN N IS 01 IN IIT 12 IM D S O 14
A N TE N N A
S E LE C T
S W IT C H
N K TU 0 1
N K TU 01 N K TU 01 DO3
KEY S E C O N DA RY
N T D I0 1 DO4 T R A N S C EIV E R
DO 3
N K TU 0 1 KEY P R IM ARY
N T D I0 1 DO 4
T R A N S C EIV E R
R S -2 3 2-C
NT M P 0 1 M ODE M
T02 34 4A
Figure 202-2 Redundant IINIT02 with Control of External Equipment in Half Duplex Operation
Table 202-1 Settings for Figure 202-2 Configuration
Spec Value Description
S1 10 Port 1 transmission start delay after transmitter is turned on (msecs). Value varies
according to transmitter used.
S2 10 Port 1 transmitter turn off delay after transmission is sent (msecs). Value varies
according to transmitter used.
S3 0 Port 2 is not used in this example.
S5 200 Port 1 maximum transmission duration (msecs). 200 msecs is a compromise

between maximum throughput (high value) and minimum response time (low
value).
S7 60 Port 1 communication status watchdog timer (secs). 60 secs is a compromise

between rapid failover to the backup module, and protection against momentary
interruptions leading to failover.
S9 6 Port 1 baud rate (1200). Must match the modem baud rate.
S11 2 Port 1 data characteristics (8 data bits, 1 stop bit, odd parity). Must match the
modem capabilities.
S13 1 Port 1 is set to half duplex mode.
S15 0 Port 2 is not used in this example. Setting S15 to 0 ensures that the unused port 2
is not reported as failed by block output 2 (executive block output for port 2 status).
202-4 2VAA000844R0001 J
202. Remote Transfer Module Executive Block (INIIT12) Full Duplex Operation
Table 202-1 Settings for Figure 202-2 Configuration (Continued)
S16 10 Percent error rate used to calculate serial channel status for the channel 1 execu-
tive block digital output. Specification S16 is also used in conjunction with S7 to set
the serial channel 1 status bit in the module status. Specification S16 is also used in
conjunction with S7 and S15 to determine if a communication equipment failure has
occurred. Communication equipment failure may lead to the action selected in S17.
S17 3 Action on communication equipment failure. Action 3 specifies that the primary and
secondary IIT modules swap states when a communication failure occurs. In this
example, this action brings the secondary IIT module to primary. The new primary
IIT module uses the secondary transceiver. The secondary transceiver connects to
the antenna if the equipment select output (SW4, pole 3) is set differently on the
two IIT modules.
S18 2 Exception reporting rate. The database is scanned for exceptions reported across
the serial link or the Cnet loop every half second.
202.1.3 Full Duplex Operation
S9 through S14
Full duplex is the operation of a communication circuit in which each end of the serial link can simultaneously send and receive. There
is no need to alternate the direction of transmission as in half duplex mode. Setting S13 (channel one) or S14 (channel two) to zero
enables full duplex mode. Specifications S9, S10, S11 and S12 select the baud rate, type of parity and number of stop bits.
Figure 202-3 illustrates the INIIT12 module using dual channel, full duplex operation. Table 202-2 lists possible specification settings for
the remote transfer module executive block for this configuration.
IN IIT 12 IN N IS 01
N K TU 0 1
CHANNEL 1
MODEM T R AN S C EIVER
N T M P 01 R S -2 3 2 -C
CHANNEL 2
MODEM T R AN S C EIVER
T 02 3 45 A
Figure 202-3 Dual Channel in Full Duplex Operation
Table 202-2 Settings for Figure 202-3 Configuration
S1 0 Not used in full duplex mode.
2VAA000844R0001 J 202-5
Serial Line Quality Management 202. Remote Transfer Module Executive Block (INIIT12)
Table 202-2 Settings for Figure 202-3 Configuration (Continued)

between rapid reporting of channel failure, and filtering out momentary commu-
nication problems.

between rapid reporting of channel failure, and filtering out momentary commu-
nication problems.
S9 12 Port 1 baud rate (19.2K). Must match modem baud rate.
S10 12 Port 2 baud rate (19.2K). Must match modem baud rate.
S11 0 Port 1 data characteristics (8 data bits, 1 stop bit, no parity). Must match the
modem capabilities.
S12 0 Port 2 data characteristics (8 data bits, 1 stop bit, no parity). Must match the
modem capabilities.
S13 0 Port 1 is set to full duplex mode.
S15 3 Port 2 mode is set to 3 which indicates that both port 1 and port 2 are used for
data communications and that failure of a single channel does not cause the
communication failure action (S17).
S16 10 Percent error rate used to calculate serial channel status for the executive block
digital outputs. Specification S16 is used in conjunction with S7, S8 and S15 to
determine if a communication equipment failure has occurred. Communication
equipment failure may lead to the action selected in S17.
S17 0 Action on communication equipment failure. Action specifies that no backup

module or equipment exists on communication failure. The module resets itself
and attempts to establish communication.
S18 2 Exception reporting rate. The database is scanned for exceptions reported
across the serial link or the Cnet loop every half second.
202.1.4 Serial Line Quality Management
S16
The INIIT12 module continuously monitors the quality of the serial links. Specification S16 is the percent error rate used to decide the
status of serial channels. Specification S16 is used in conjunction with S7 and S8 to determine that a serial channel has failed. When the
percentage of messages with errors exceeds this value for a number of seconds exceeding the S7 value for channel one or the S8 value
for channel two, then the channel is considered unusable (failed). When a channel is considered unusable, a channel failure bit is set in
the module status, and depending on the setting of S15, the action selected in S17 may be performed.
Specification S16 is also used in the calculations for serial channel quality reported in the INIIT12 executive block digital outputs. These
digital outputs are updated every second. If the percentage of messages with errors on a serial channel exceeds the S16 value (high
error rate threshold), then the digital block output for that channel will be one with alarm. If the percentage of messages with errors on a
serial channel exceeds one fifth of the S16 value (low error rate threshold), then the digital block output for that channel will be one with
no alarm. Otherwise, the digital block output for that channel will be zero with no alarm.
S7 and S8
A serial channel is unusable when it fails for a period of time longer than the communication status watchdog timer. Specifications S7
(channel one) or S8 (channel two) sets the communication watchdog timer. When a channel is considered unusable, the serial channel
202-6 2VAA000844R0001 J
202. Remote Transfer Module Executive Block (INIIT12) Serial Line Quality Management
status bit in the module status is set, and the action selected by S17 can be invoked.
S15 and S17

Select the action taken by the IIT module when one or both serial channels are unusable. S15 determines the role of serial port two and
sets the necessary conditions for communication equipment failure. Depending on the setting of S15, either a single channel failure or a
dual channel failure constitutes communication equipment failure. For example, there is a communication equipment failure when:
1. S15 option is 1, 2 or 3 and both channels fail.
or
2. S15 option is 0 or 4 and one channel fails.
If a communication equipment failure occurs, the primary module will carry out the action selected in S17. The module resets itself if the
S17 option is zero. If S17 option is one, and the (optional) digital output I/O module is installed, then digital output three will be toggled.
If S17 option is two, and a backup module is available, then the primary INIIT12 module goes into secondary mode and the secondary
module goes into primary mode. The primary INIIT12 module continuously attempts to establish communication on failed serial ports. If
SW4 pole four is set to one enabling port two to be used as a diagnostic port, then the INIIT12 module will act as if the S15 option is zero.
2VAA000844R0001 J 202-7
Serial Line Quality Management 202. Remote Transfer Module Executive Block (INIIT12)
202-8 2VAA000844R0001 J
203. INIPT02 Executive Block

Function code 203 is the remote INFI-NET to Plant Loop transfer module executive block. This function code defines the parameters that
control the operation of the INIPT02 Remote INFI-NET to Plant Loop Transfer Module. This function code resides in fixed block one.
Table 203-1 Outputs

EX EC 1 B Port 1 communication status when IPT module is in
R EM OT E
IN F -PL full duplex mode (nonscheduled mode):
P1 ST
(2 0 3 ) 0 = good
P2 ST
1
1 with no alarm = error warning (error level exceeds 15
2
C X IO
3 of S18 level)
AC IO
4 1 with alarm = port failed (error level exceeds S18
M X IO
LOOP RX
5 specified level)
6
L O O P TX
7 Port 1 communication status when IPT module is in
L IN K R X
L IN K T X
8 half duplex mode (scheduled mode):
9
R 0 = good when Port 1 not enabled and not connected
10
NV
11 0 = good when Port 1 enabled and connected
R EV
12 1 = port not connected when Port 1 enabled but not
FT
SS
13 connected
14
H
M
15
2 B Port 2 communication status when IPT module is in
16
S
17
Full duplex mode (nonscheduled mode):
Y
18 0 = good
MO
19 1 with no alarm = error warning (error level exceeds 15
D
P1 E RR
20 of S18 level)
21
P2 E RR 1 with alarm = port failed (error level exceeds S18
22
L IN K S T
23 specified level)
S PA R E
24
S PA R E
25
Port 2 communication status when IPT module is in
S PA R E
26 half duplex mode (scheduled mode):
S PA R E
27 0 = good when Port 2 not enabled and not connected
S PA R E
S PA R E
28 0 = good when Port 2 enabled and connected
29
1 = port not connected when Port 2 enabled but not
connected
31 I Current exception reports transferred per second
41 I Average exception reports transferred per second
51 I Maximum exception reports transferred per second
61 I Current loop exception reports received per second
71 I Current loop exception reports transmitted per second
81 I Current link exception reports received per second
91 I Current link exception reports transmitted per second
10 I Available bytes of RAM
11 I Available bytes of NVRAM
12 I INIPT02 revision level
13 I Available percentage of CPU time
14 I Time and date synchronization state:

0 = invalid (no synchronization received)
1 = synchronized from INFI-NET
2 = synchronized from Plant Loop
3 = synchronized from INFI-NET and Plant Loop (valid
only when cross-loop synchronization is enabled)
2VAA000844R0001 J 203-1
Table 203-1 Outputs (Continued)
15 I Time of day (hours)
16 I Time of day (minutes)
17 I Time of day (seconds)
18 I Calendar (year)
19 I Calendar (month)
20 I Calendar (day)
21 I Port 1 communication error rate when the IPT module

is in full duplex mode (nonscheduled mode) is in units
of 0.1%.
Port 1 communication error rate when IPT module is in
half duplex mode (scheduled mode):
0.0 = good when Port 1 not enabled and not connected
0.0 = good when Port 1 enabled and connected
1000.0 = port not connected when Port 1 enabled but not
connected
22 I Port 2 communication error rate when the IPT module

is in full duplex mode (nonscheduled mode) is in units
of 0.1%.
Port 2 communication error rate when IPT module is in
half duplex mode (scheduled mode):
0.0 = good when Port 2 not enabled and not connected
0.0 = good when Port 2 enabled and connected
1000.0 = port not connected when Port 2 enabled but not
connected
203-2 2VAA000844R0001 J
Table 203-1 Outputs (Continued)
23 B Link communication status when IPT module is in full

duplex mode (nonscheduled mode):
0 = good
1 with no alarm = error rate on last port exceeds 15
of S18 level)
1 with alarm = link failed (watchdog timer on last port
expired)
Link communication status when IPT module is in half
duplex mode (scheduled mode) and the quality is
good:
0 = good when S19 is 0 and blocks 1 and 2 are 0
0 = good when S19 is 0, block 1 is 0 and block 2 is 1
1 = bad when S19 is 0, block 1 is 1 and block 2 is 0
1 = bad when S19 is 0 and blocks 1 and 2 are 1
24 - 29 I Unused
NOTE: 1. Block outputs 3 through 9 are not relevant when in half duplex mode.
Table 203-2 Specifications
S1 N 0 I 0-1 Configuration lock:

0 = no (unlocked)
1 = yes (locked)
S21 Y 0 I 1 - 250 Redirection loop. Tuning and configuration messages

addressed to module three (bridge and nonbridge
modes) or higher (bridge mode) are redirected by this
specification.
S31 Y 1 I 1 - 250 Redirection node. Tuning and configuration messages

addressed to module three (bridge and nonbridge
modes) or higher (bridge mode) are redirected by this
specification.
S41 Y 0 I 0 - 31 Redirection module. Tuning and configuration mes-

sages addressed to module three (bridge and non-
bridge modes) or higher (bridge mode) are redirected
by this specification.
2VAA000844R0001 J 203-3
Table 203-2 Specifications (Continued)
S52 N 0 I 0-3 XR poll rate (time between XR database scans; XRs

sent only if new XR received):
0 = 2.0 secs
1 = 1.0 sec
2 = 0.5 sec
3 = 0.25 sec
S6 N 1 I 0-1 Cross-loop time sync:

0 = no (remote time sync rejected)
1 = yes (remote time sync accepted)
S7 N 0 I Full Port 1 command/reply delay after transmitter turn-on

(msecs)
S8 N 0 I Full Port 1 transmitter turn-off delay after command/reply

sent (msecs)
S9 N 0 I Full Port 2 command/reply delay after transmitter turn-on

(msecs)
S10 N 0 I Full Port 2 transmitter turn-off delay after command/reply

sent (msecs)
S11 N 200 I 32767 Port 1 maximum transmission duration (msecs, half

duplex only)
S12 N 200 I 32767 Port 2 maximum transmission duration (msecs, half

duplex only)
S13 N 60 I Full Full duplex mode:

Port 1 communication status watchdog timer (secs)
Half duplex mode:
Poll time (secs)
S14 N 60 I Full Full duplex mode:

Port 2 communication status watchdog timer (secs)
Half duplex mode:
Schedule time (secs)

0 = full duplex
1 = half duplex

0 = full duplex
1 = half duplex
S17 N 1 I 0-4 Port 2 usage rules:

0 = port 2 not used
1 = standby for port 1 (port 1 preferred)
2 = alternate for port 1 (either port acceptable)
3 = both ports used (one port acceptable)
4 = both ports required (one port not acceptable)
S18 N 10 I 0 - 100 Acceptable link error rate (error rates above this level
constitute link channel failure). Requires use of normal
link protocol.
S19 N 0 I 0-2 Action on communication equipment failure:

0 = no backup equipment available
1 = switch state of DO3 (select alternate equipment)
2 = switch to redundant INIPT02
203-4 2VAA000844R0001 J
S20 N 0 I 0-1 Equipment select output (DO3) initial state:

0 = de-energized
1 = energized
S21 N 6 I 0-8 Port 1 baud rate:

0 = off 3 = 1200 6 = 9600
1 = 300 4 = 2400 7 = 19200
2 = 600 5 = 4800 8 = 38400
The 19200 and 38400 baud rates are mutually
exclusive within the INIPT02. If port 1 is set to 19200,
port 2 cannot be set to 38400, and vice-versa. Also,
termination unit temperature conditions must be within
10°C of a nominal 25°C to support 38400 baud rates.
S22 N 6 I 0-8 Port 2 baud rate:

0 = off 3 = 1200 6 = 9600
1 = 300 4 = 2400 7 = 19200
2 = 600 5 = 4800 8 = 38400
The 19200 and 38400 baud rates are mutually
exclusive within the INIPT02. If port 1 is set to 19200,
port 2 cannot be set to 38400, and vice-versa. Also,
termination unit temperature conditions must be within
10°C of a nominal 25°C to support 38400 baud rates.

0 = 8 bit data, 1 stop bit, no parity
1 = 8 bit data, 1 stop bit, even parity
2 = 8 bit data, 1 stop bit, odd parity
3 = 8 bit data, 2 stop bits, no parity

0 = 8 bit data, 1 stop bit, no parity
1 = 8 bit data, 1 stop bit, even parity
2 = 8 bit data, 1 stop bit, odd parity
3 = 8 bit data, 2 stop bits, no parity
S25 N 0 I 0-1 Link RS-232-C characteristics (both link serial ports 1

and 2):
0 = DCE
1 = DTE
S263 N 0 I 0 - 250 Loop number of remote:

0 = connect with first remote that responds to link
establish message
1 - 250 = expected loop no. of remote. Connect only
if
response to link establish message contains this
loop
no. as source loop. Subsequent messages from
remote must also contain this source loop no.
Mismatched messages are discarded.
S27 N 0 I Full Link failure bad quality report delay (secs)
2VAA000844R0001 J 203-5
Explanation 203. INIPT02 Executive Block

NOTES:
1. Redirection specifications are for routing tuning and configuration commands from Plant Loop to INFI-
NET (bridge and nonbridge modes) or from INFI-NET to INFI-NET or Plant Loop (nonbridge mode). Each
possible requesting node is assigned its own individual redirection specifications preventing accidental
crosstalk. A side effect of this is that each requesting node will read its own redirection specifications which
may not agree with any other requesting nodes redirection specifications. Also, redirection specifications
are stored by node number only so nodes on different loops having the same node number may share
redirection specifications.
2. XR poll rate governs the time between scans of the export database. An exception report will be sent
only if a new exception report has been received for that point. This allows the actual data source maxtime
to govern the update rate at the destinations.
3. Specification S26 is used to allow multiple INIPT02 modules to share an unreliable link route where
channel crosstalk might otherwise cause remote modules to respond to link establish messages from local
modules other than the one with which the connection is intended. The value 255 is reserved for future use.
203.1 Explanation
S1
Specification S1 is the configuration lock. If set to zero, configuration changes are allowed. If set to one, configuration is locked. Once a
configuration is locked, it cannot be unlocked. The module must be initialized and configured.
S2
Specification S2 identifies the loop number where tuning and configuration commands received on INFI-NET (nonbridge mode) and Plant
Loop (bridge and nonbridge modes) are to be directed. Tuning and configuration commands addressed to module three (bridge and
nonbridge modes) or higher (bridge mode) are redirected by this specification.
S3
Specification S3 identifies the node number where tuning and configuration commands received on INFI-NET (nonbridge mode) and
Plant Loop (bridge and nonbridge modes) are to be directed. Tuning and configuration commands addressed to module three (bridge
and nonbridge modes) or higher (bridge mode) are redirected by this specification.
S4
Specification S4 identifies the module number where tuning and configuration commands received on INFI-NET (nonbridge mode) and
Plant Loop (bridge and nonbridge modes) are to be directed. Tuning and configuration commands addressed to module three (bridge
and nonbridge modes) or higher (bridge mode) are redirected by this specification.
S5
Specification S5 identifies the exception report rate (time between scans).
0 = 2.0 seconds
1 = 1.0 second
2 = 0.5 second
3 = 0.25 second
S6
Specification S6 enables or disables time synchronization between the two loops. When S6 is zero, a time sync from the remote INIPT02
module is rejected. When a time sync is rejected, the local INIPT02 module resynchronizes the remote loop. For independent times to
be allowed, both INIPT02 modules must be set up to disable time synchronization. When S6 is one, a time synch from the remote INIPT02
module is accepted.
S7 through S10
The request-to-send (RTS) output of the serial port keys the modem carrier. A digital module output keys the transmitter carrier. The
digital output enables the transmitter carrier to be keyed on prior to the data transmission, and keyed off prior to turning off the modem
carrier. Specifications S7, S8, S9 and S10 set delays. Specifications S7 and S9 decide the carrier turn-on delay. Specifications S8 and
203-6 2VAA000844R0001 J
203. INIPT02 Executive Block Specifications
S10 set the delay between dropping the transmitter carrier and dropping the modem carrier.
S11 and S12

Specifications S11 and S12 allow setting limits on the duration of the transmission. These specifications ensure that each side of the
INFI-NET to Plant Loop remote interface has an opportunity to originate a message of its own.
S13 and S14

A serial channel is unusable when it fails for a period of time longer than specified. In full duplex mode, specifications S13 and S14 set
the communication status watchdog timer for channel one and two. When a channel is considered unusable, the serial channel status
bit in the module status is set, and the action selected by S17 and S19 can be invoked. In half duplex mode, S13 sets the poll time
(allowed time to communicate with one remote IPT module) and S14 sets the schedule time (allowed time to communicate with all remote
IPT modules).
S15 and S16

Setting S15 (channel one) or S16 (channel two) to zero enables full duplex mode. Setting S15 or S16 to one enables half duplex mode.
S15 and S16 must be set to one (half duplex mode) when using link C/R protocol (SW4 pole 4 = 0).
S17
Specification S17 selects the action taken by the INIPT02 module when one or both serial channels are unusable. Specification S17
determines the role of serial port two and sets the necessary conditions for communication equipment failure. Depending on the setting
of S17, either a single channel failure or a dual channel failure constitutes communication equipment failure. For example, there is a
communication equipment failure when:
S17 option is one, two or three, and both channels fail.
• S17 option is zero or four, and one channel fails.
S17 must be set to zero (port unused) when using link C/R protocol (SW4 pole 4 = 0).
S18
Specification S18 is the percent error rate used to decide the status of serial channels. The INIPT02 module continuously monitors the
quality of the serial links. Specification S18 is used in conjunction with S13 and S14 to determine that a serial channel has failed. When
the percentage of messages with errors exceeds this value for a number of seconds specified by the S13 value for channel one or the
S14 value for channel two, then the channel is considered unusable (failed). When a channel is considered unusable, a channel failure
bit is set in the module status, and depending on the setting of S17, the action selected in S19 may be performed. This specification
applies only when normal link protocol is being used.
S19
If a communication equipment failure occurs, the primary module will carry out the action selected in S19. The module takes no action if
the S19 option is zero. If S19 option is one, and the (optional) digital output module is installed, then digital output three will be toggled.
If S19 option is two, and a backup module is available, then the primary INIPT02 module goes into secondary mode and the secondary
module goes into primary mode. The primary INIPT02 module continuously attempts to establish communication on failed serial ports.
S20
A unique equipment select output can exist between the primary and secondary INIPT02 module. The equipment select output is the
third output of a digital module (NDSO01, NDSO02, NDSO03 or NDSO04) and can be set to have the default state as zero equals de-
energized or one equals energized. This enables configuring redundant communications equipment which will operate with redundant
INIPT02 modules. Thus, when the primary INIPT02 module fails and the backup INIPT02 module takes over, the backup communications
equipment will also take over, if configured.
S21 and S22

Specifications S21 and S22 select the transmission rate (baud) that will be used to communicate over the serial link. This allows the
INIPT02 module to interface to other communications equipment at 300, 600, 1200, 2400, 4800, 9600, 19200 or 38400 baud.
S23 and S24

Specifications S23 and S24 select the data bits (eight), type of parity (odd or even), and the number of stop bits.
S25
The INIPT02 module can be set up to operate in either data communications equipment (DCE) mode or data terminal equipment (DTE)
mode. In DCE mode, the request-to-send (RTS) line is always asserted. In DTE mode, the RTS line is asserted before data is transmitted
and inhibited after the transmission occurs.
S26
Specification S26 specifies the loop number of the remote. A value of zero allows the INIPT02 module to connect with the first remote
that responds to the link establish message.
S27
Specification S27 specifies the delay (in seconds) of the link failure bad quality reporting. This occurs when there has been a
2VAA000844R0001 J 203-7
Applications 203. INIPT02 Executive Block
communication equipment failure and S19 is zero or one. Link failure bad quality reporting is canceled if the communication equipment
recovers before this delay timer expires.
S28 through S34

Unused.
203.2 Applications
203.2.1 Serial Data Channel Operation
Function code 203 is the executive block that contains the specifications for serial data channel operation. The serial data channels can
operate in either half duplex or full duplex mode. The RS-232-C serial ports are individually configurable. Refer to the INFI-NET to Plant
Loop Remote Interface (INIPR01) instruction for information about selecting normal link protocol (full duplex or two node systems) or link
C/R protocol (half duplex or multiple (three or more) node systems).
203.2.2 Half Duplex Operation
Half duplex is the operation of a communication circuit in which each end alternates as sender and receiver. At any instant, electrical
information flows in only one direction. The direction of transmission (i.e., local to remote or remote to local) alternates on the serial link.
Therefore, the modem carrier and the transceiver transmitter section need to be enabled before data can be transmitted. Additionally,
the transmitter needs to be disabled prior to shutting down the modem carrier after the data transmission. Finally, the primary INIPT02
module may need to switch the antenna to the active transceiver. The INIPT02 INFI-NET to Plant Loop Transfer Module requires a digital
output module, cabling and a termination unit to switch external equipment in the half duplex mode. The executive block provides
specifications to control external communication equipment.
Figure 203-1 shows the timing of external equipment enable signals for half duplex operation.
NOTES:
1. The digital output module, cabling and termination unit are optional parts of the INFI-NET to Plant Loop remote interface. The
interface requires these optional parts for operation in half duplex mode when switching external equipment is required and in
applications using redundant external communication equipment (Fig. 203-1).
2. In Figure 203-1, the S1 delay period equals S7 for port 1 and S9 for port 2. Delay period S2 equals S8 for port 1 and S10 for
port 2.
3. Refer to Figure 203-1. To assure proper timing, function code 203 specifications related to serial channel operation (S7
through S17 and S19 through S24) must be set the same in both local and remote INIPT02 modules.
Table 203-3 lists the possible specification settings for the EXEC INIPT02 block for the configuration shown in Figure 203-2. Figure 203-
2 illustrates redundant INIPT02 modules with control of external equipment in half duplex operation.
TIM IN G AT LO C A L IN IPT 02
S1 TR A N S M IT S2 S1 R E C EIV E S2
D E LAY M E SS AG E D E LAY D E L AY M E SS AG E D E LAY
Tx TxTxT xTxT x R xR xR x R xR xR x
0 TIM E
RT S A S SE RT ED ( D TE M O D E ) R T S IN H IB IT E D (D T E M O D E)
S ET D O 4 R E SE T D O 4
TR A N S M ITTE R EN AB LED
M OD E M C A R R IER E N A BLE D
TIM IN G AT R E M O TE INIP T02

R E C EIV E TR A N S M IT
S2 S1 S2
M E SS AG E M E SS AG E
D E L AY D E L AY D E LAY
R xR xR xR xR xR x Tx TxTxT xTx Tx
0 T IM E
RT S A S SE RT ED ( D TE M O D E ) RT S IN H IB ITE D (D T E M O D E)
S ET D O 4 RESET DO4
TR A N S M ITTE R EN AB L ED
M O D E M C A R R IER E N A BL E D
T 01 9 34 A
Figure 203-1 Timing Diagram of Enable Signals in Half Duplex Mode
203-8 2VAA000844R0001 J
203. INIPT02 Executive Block Half Duplex Operation
Table 203-3 Specification Settings for Figure 203-2 Configuration
S1 0 Use default value. Not configuration dependent in this example.
S2 0
S3 1
S4 0
S5 2 Exception reporting rate. The database is scanned for exceptions reported across
the serial link or the INFI-NET loop every half second.
S6 1 Remote time synch accepted.
S7 10 Port 1 transmission start delay after the transmitter is turned on (msec). Value
varies according to the transmitter used.
S8 10 Port 1 transmitter turn off delay after the transmission is sent (msec). Value varies
according to the transmitter used.
S10 0
S11 200 Port 1 maximum transmission duration (msec). 200 msecs is a compromise
between maximum throughput (high value) and minimum response time (low
value).
S13 60 Port 1 communication status watchdog timer (secs). 60 seconds is a compromise

between rapid failover to the backup module, and protection against momentary
interruptions leading to failover.
S15 1 Port 1 is set to half duplex mode.
S17 0 Port 2 is not used in this example. Setting S17 to 0 ensures that the unused port 2
is not reported as failed by block output 2 (executive block output for port 2 status).
S18 10 Percent error rate used to calculate serial channel status for the channel 1
executive block digital output. Specification S18 is used in conjunction with S13 to
set the serial channel 1 status bit in the module status. It is also used in
conjunction with S13 and S17 to determine if a communication equipment failure
has occurred. Communication equipment failure may lead to the action selected in
S19.
S19 2 Action on communication equipment failure. Action 2 specifies that the primary
and secondary INIPT02 modules swap states when a communication failure
occurs. In this example, this action brings the secondary INIPT02 modules to pri-
mary. The new primary INIPT02 module uses the secondary transceiver. The sec-
ondary transceiver connects to the antenna if the equipment select output (S20) is
set differently on the 2 INIPT02 modules.
S20 0 Equipment selection output (DO3) initial state is de-energized.
S21 6 Port 1 baud rate is 9600. Must match modem baud rate.
S22 0 Port 2 not used in this example.
S23 2 Port 1 data characteristics (8 data bits, 1 stop bit, odd parity). Must match modem
capabilities.
2VAA000844R0001 J 203-9
Full Duplex Operation 203. INIPT02 Executive Block
Table 203-3 Specification Settings for Figure 203-2 Configuration (Continued)
S24 0 Port 2 not used in this example.
S25 0 DCE communications.
S26 0 Connect to first remote responding.
S27 0 Use default. Not configuration dependent in this example. No delay between link
failure and bad quality reporting or use the default value.
PRIMARY SECONDARY
INNIS21 IMMPI01 INIPT02 IMDSM05 INNIS21 IMMPI01 INIPT02 IMDSM05
ANTENNA
SELECT
SWITCH
NKTU01
NKTU01 NKTU01 DO3

KEY SECONDARY
NTDI01 DO4 TRANSCEIVER
DO3
NKTU01 KEY PRIMARY
NTDI01 DO4
TRANSCEIVER
RS-232-C
NTMP01 MODEM
T01935B
Figure 203-2 Redundant INIPT02 Modules with Control of External Equipment in Half Duplex
Operation
203.2.3 Full Duplex Operation
Full duplex is the operation of a communication circuit in which each end of the serial link can simultaneously send and receive. There
is no need to alternate the direction of transmission as in the half duplex mode.
203-10 2VAA000844R0001 J
203. INIPT02 Executive Block Full Duplex Operation
Figure 203-3 illustrates the INIPT02 module using dual channel, full duplex operation. Table 203-4 lists possible specification settings for
the INFI-NET to Plant Loop transfer module executive block for this configuration.
INIPT02 IMMPI01 INNIS21
NKTU01
CHANNEL 1
MODEM TRANSCEIVER
NTMP01 RS-232-C
CHANNEL 2
MODEM TRANSCEIVER
T01936B
Figure 203-3 INIPT02 Module Dual Channel in Full Duplex Operation
Table 203-4 Specification Settings for Figure 203-3 Configuration
S1 0 Use default. Not configuration dependent in this example.
S2 0
S3 1
S4 0
S5 2 Exception reporting rate. The database is scanned for exceptions reported

across the serial link or the INFI-NET loop every half second.
S6 1 Remote time synch accepted.
S8 0
S9 0
S10 0
S11 200
S13 60 Port 1 communication status watchdog timer (secs). 60 seconds is a

compromise between rapid reporting of channel failure, and filtering out
momentary communication problems.
S14 60 Port 2 communication status watchdog timer (secs). 60 seconds is a

compromise between rapid reporting of channel failure, and filtering out
momentary communication problems.
2VAA000844R0001 J 203-11
Full Duplex Operation 203. INIPT02 Executive Block
Table 203-4 Specification Settings for Figure 203-3 Configuration (Continued)
S17 3 Port 2 mode is set to 3 which indicates that both ports 1 and 2 are used for data
communications and that failure of a single channel does not cause the
communication failure action (S19).
S18 10 Percent error rate used to calculate serial channel status for the executive block
digital outputs. Specification S18 is used in conjunction with S13, S14 and S17 to
determine if a communication equipment failure has occurred. Communication
equipment failure may lead to the action selected in S19.
S19 0 Action on communication equipment failure. Action specifies that no backup

module or equipment exists on communication failure. The module attempts to
establish communication.
S20 0 Equipment selection output (DO3) initial state is de-energized.
S21 7 Port 1 baud rate (19200). Must match modem baud rate.
S22 7 Port 2 baud rate (19200). Must match modem baud rate.
S23 0 Port 1 data characteristics (8 data bits, 1 stop bit, no parity). Must match modem
capabilities.
S24 0 Port 2 data characteristics (8 data bits, 1 stop bit, no parity). Must match modem
capabilities.
S25 0 DCE communications.
S26 0 Use default. Not configuration dependent in this example.
S27 5 Wait 5 secs after communication equipment failure to report bad quality for all
remote points.
203-12 2VAA000844R0001 J
205. Analog Input List/CW800 (Periodic Sample)
205. Analog Input List/CW800 (Periodic Sample)

In HC800 controllers, the Analog Input List (periodic sample) function code acquires the data values of eight analog points in a single
CW800 Network message. The source module and destination module must be located on the same CW800 Network. Input data consists
of analog signals and qualities. Data transfer between the source module and destination module is via the CW800 Network. The
SAMPLE PERIOD and the source module RING, NODE, MODULE address and list of block numbers are configurable parameters.
Output data consists of real numbers corresponding to the analog data received and point quality indicators. To ensure that the signal is
successfully transferred, the analog signal generates a point quality flag. To test the quality of the signal, include a function code 31 in
the configuration. Refer to Appendix J, for a definition of point quality.
NOTE: Each ‘Source Block Address’ reads a value for any existing analog output from a function block configured in the source
module. No additional configuration in the source module is required. Unused inputs should be kept at the default block address of
31,999 to conserve CW800 bandwidth.
Outputs
N R <S5>
N+1 R <S6>
N+2 R <S7>
N+3 R <S8>
N+4 R <S9>
N+5 R <S10>
N+6 R <S11>
N+7 R <S12>
Specifications
S2 N 0 I 1-31 Source RING address
S3 N 0 I 1-250 Source NODE address
S4 N 0 I 0-31 Source MODULE address
S5 N 2 I 0-31,999 Source block address (N)
S6 N 2 I 0-31,999 Source block address (N+1)

NOTES:
1. The range is the positive real value range, however the practical lower limit is determined by the
Base periodic I/O sampling period defined in the extended executive (function code 90, block 20, S2).
2VAA000844R0001 J 205-1
Explanation 205. Analog Input List/CW800 (Periodic Sample)
205.1 Explanation
S1 – MBUPD
(Sample period) Defines the update rate for the CW800 Network message inputs. Sample period is specified in seconds. Specification
S1 is tunable. The system allows tuning the value shown for the sample period; however, the original sample period will be retained. To
change it, the module must be placed in configure mode.
The sample period should always be a multiple of the Base Sample Period defined in the extended executive (function code 90, block
20, S2), and should start at a multiple of four or higher. The default for function code 90 S2 = 0.250, and the default for function code 205
S1 = 1.0, 1.0/0.25 = 4, which is a multiple of four.
S2 – SRING
(Source RING address) The RING address of the module containing the eight values desired. The RING address of the source module
must be between one and 31 inclusive.
S3 - SNODE
(Source NODE address) The NODE address of the module containing the eight values desired. The NODE address of the source
module must be between one and 250 inclusive.
S4 - SMODULE
Source MODULE address) The MODULE address of the module containing the eight values desired. The MODULE address of the
source module must be between zero and 31 inclusive.
S5
S6
S7
S8
S9
S10
S11
S12
205-2 2VAA000844R0001 J
206. Digital Input List/CW800 (Periodic Sample)
206. Digital Input List/CW800 (Periodic Sample)

In HC800 controllers, the Digital Input List (periodic sample) function code acquires the data values of eight digital points in a single
CW800 Network message. The source module and destination module must be located on the same CW800 Network. Input data consists
of digital signals and qualities. Data transfer between the source module and destination module is via the CW800 Network. The SAMPLE
PERIOD and the source module RING, NODE, MODULE address and list of block numbers are configurable parameters.
Output data consists of Boolean values corresponding to the digital data received and point quality indicators. To ensure that the signal
is successfully transferred, the digital signal generates a point quality flag. To test the quality of the signal, include a function code 31 in
the configuration. Refer to Appendix J, for a definition of point quality.
NOTE: Each ‘Source Block Address’ reads a value for any existing digital output from a function block configured in the source
module. No additional configuration in the source module is required. Unused inputs should kept at the default block address of
31,999 to conserve CW800 bandwidth.
Outputs
N B <S5>
N+1 B <S6>
N+2 B <S7>
N+3 B <S8>
N+4 B <S9>
N+5 B <S10>
N+6 B <S11>
N+7 B <S12>
Specifications
S2 N 0 I 1-31 Source RING address
S5 N 2 I 0-31,999 Source block address (N)

NOTE:
2VAA000844R0001 J 206-1
Explanation 206. Digital Input List/CW800 (Periodic Sample)
206.1 Explanation
S1 – MBUPD
change it, the module must be placed in configure mode.
S2 – SRING
(Source RING address) The RING address of the module containing the eight values desired. The RING address of the source module
must be between one and 31 inclusive.
S3 - SNODE
(Source NODE address) The NODE address of the module containing the eight values desired. The NODE address of the source
S4 - SMODULE
(Source MODULE address) The MODULE address of the module containing the eight values desired. The MODULE address of the
S5
S6
S7
S8
S9
S10
S11
S12
206-2 2VAA000844R0001 J
207. Module Status Monitor/CW800 Explanation
207. Module Status Monitor/CW800
CW800 is a high speed communication bus used for peer-to-peer communications between HC800
controllers. An HC800 controller consists of an HC800 control processor and a CP800 communication processor. This function code
monitors the status of primary HC800 modules or primary or backup CP800 modules on the CW800 bus.
Function code 226 is used to extract and monitor up to 4 bits from the 16 monitored module status bytes. More than one function code
226 can be used to extract multiple module status bits from one function code 207. If the communication status of the target module is
good, it sets the output quality to good, and outputs a logic 0 value. If the communication status of the target module is bad, it sets the
output quality to bad and the output value is a logic 1. The source module mode can be monitored by selecting S6 equals one. Offline
detection ORs the output value with a logic 1 (quality is not affected) when the monitored module is not in execute mode. This block
generates a problem report when a communication failure exists.
Outputs
N B Communication Status and offline detection:

0 = good
1 = bad, with bad quality indicates communication failure
Specifications
S2 N 0 I 1-31 Source RING or LOOP address
S5 2 N 0 I 0-1 CP800 Primary/Backup module selector

0 = Primary CP800 module
1 = Backup CP800 module
S6 Y 0 I 0-1 Target offline detection flag:

0 = no
1 = yes
NOTES:
2. Specification 5 (S5) - "Source Module address" must specify module address zero, which is the base
address of the Primary CP800 module
207.1 Explanation
S1 – MBRD
change it the module must be placed in configure mode.
2VAA000844R0001 J 207-1
Specifications 207. Module Status Monitor/CW800
S2 - SRING
(Source RING address) The RING (Loop) address of the module for which status is being requested. The RING address of the source
S3 - SNODE
(Source NODE address) The NODE address of the module for which status is being requested. The NODE address of the source
S4 - SMODULE
(Source MODULE address) The MODULE address of the module for which status is being requested. The MODULE address of the
NOTES:
1. Setting S2, S3, & S4 to the same module address as the module address of the controller in which the function code 207
resides, causes function code 207 to monitor that controller's module status directly without generating any CW800 Network mes-
sage traffic.
2. For the CP800 module, S4 must specify module address 0, which is the base address of the Primary CP800 module.
S5 - Primary/Backup module selector

Selects the primary or backup module to be monitored.
S6 - OFFDET
Identifies if module mode status contributes to the output value.
0 = no
1 = yes
The source module is considered to be offline when it is not in execute mode. The offline state is a zero when the module is in execute
mode, and a one when the module is in configure or error mode. The offline state is OR'd with the communication status output value
when S6 = 1 (quality is not affected).
207-2 2VAA000844R0001 J
210. Sequence of Events Slave

The sequence of events slave function code (SOE/S) provides the ability to define up to 32 digital inputs and time-stamp those inputs in
sequence of events order with a resolution of one millisecond. The digital inputs are accessible via human system interfaces (HSIs). Only
one SOE/S function code can be defined in a module. Two IMDSI12 or IMDSI22 modules provide the inputs.
NOTE: This function code is supported only on the BRC-100/200, BRC-300/400/410, HPG800, and the IMMFP11/12 controllers.
The SOE/S function code is similar to the sequence of events log (SOELOG, function code 99). Like the SOELOG block, the SOE/S
block logs data. Advantages to using the SOE/S block over the SOELOG block are:
1. The SOE/S block does not require the sequential events recorder. The SOE/S block only requires two IMDSI02 digital input slave
modules and one master module.
2. The SOE/S block provides a means to use parallel inputs.
Function code 99, the SOELOG block, should be used when more than 32 inputs are required.
NOTE: CPU utilization is time critical, causing an increase in CPU overhead.
Outputs
SO E /S Blk Type Description

S39 (2 1 0 )
SNR E LF
S40 SUR
N N B Events logged flag:
S41 N /A
N+1
0 = no
N+2
N+3
1 = yes
N+4
N+5 N+1 B Current value and quality of input 1
N+6
N+8
N+10
N+11
N+4 B Current value and quality of input 4
N+12
N+13
N+15
N+17
N+19
N+20
N+21
N+22
N+23
N+24
N+26
N+28
N+30
N+31
N+32
N+33
N+34
CST
N+35
2VAA000844R0001 J 210-1
Outputs (Continued)
N+33 B First I/O module status:

0 = good
1 = bad
N+34 B Second I/O module status:

0 = good
1 = bad
N+35 R Composite sequence of events status:

0.0 = no error
1.0 = sequence buffer overflow
2.0 = time sync processed
Specifications
S1 N 0 I 0 - 63 First expander bus module address
S2 N 0 I 0 - 63 Second expander bus module address
S3 N 4 I 1 - 32 Sequence buffer size (kbytes)
S4 N 256 I 1 - 3500 Event buffer size (no. of events)
S5 N 180 I 1 - 32767 Age of event data before discarded from buffer (in secs)
S6 N 0 I 0 - 63 Input 1 qualifier
210-2 2VAA000844R0001 J
S38 N 4 I 2 - 16 Debounce time (msecs)
S39 N 5 I Note 1 Block address of snapshot request
S40 N 0 I Note 1 Block address of summary request

NOTE:
31,998 for the BRC-400/410 and HPG800
2VAA000844R0001 J 210-3
Explanation 210. Sequence of Events Slave
210.1 Explanation
210.1.1 Outputs
N
Shows the current state of the event buffer. A one indicates event data is present in the event buffer. A zero indicates that all event data
is out of the event buffer.
N+1 through N+32

Show the current value and quality of the digital inputs on the sequence of events module. A bad quality signal occurs when the expander
bus module does not respond.
Inputs one through 16 are associated with the I/O module specified by S1 and inputs 17 through 32 are associated with the I/O module
specified by S2.
The input qualifier (S6 through S37) defines the alarm state for each block output for each associated input.
N+33 and N+34

The I/O module status outputs are logic 0 when the I/O modules respond, and logic 1 when the modules do not respond. Output N+33
corresponds to the module specified by S1 and output N+34 corresponds to the module specified by S2.
0.0 = no error
1.0 = sequence buffer overflow
2.0 = time sync processed
N+35
Provides the SOE/S block internal status bits. The bits combine to an integer value, then convert to a real number.
S1
Expander bus module address of the digital input module associated with the inputs one through 16 (S6 through S21). Valid addresses
are zero through 63.
S2
Expander bus module address of the digital input module associated with the inputs 17 through 32 (S22 through S37). Valid addresses
are zero through 63. If the second module is not used, S2 must be set the same as S1.
S3
Sequence buffer size in one kilobyte increments. The buffer saves the one millisecond input data for processing by the function code.
The function code converts the input data to event data when it runs in its configured segment. Therefore, the minimum size of this buffer
directly relates to the maximum scan period for the segment. Calculate the minimum buffer size as follows:
Size = --------------------------------------------------------------------------------------------
 period in secs  1000  8  + 1024 
1024
NOTE: The real value can be truncated to give the integer value.
S4
Number of events that will fit in the buffer. Calculate the event buffer size as follows:
Size  9  (S3  1)
S5
Maximum age in seconds of the event data in the buffer. After data has been in the buffer this length of time, it is removed from the event
buffer.
Specifications S4 and S5 are closely related to the HSI configuration. These parameters control the amount of data that the HSI can
receive when a trip occurs. Once the maximum age (S5) is reached, the data is erased. Therefore, the HSI must be configured to provide
a data transfer rate that is fast enough to remove the event data from the buffer before the maximum age (S5) is reached.
S6 through S37
Describe the input point. The quality state of the input is bad when the expander bus module is not responding.
S38
Time period that an input must remain in a steady state before it can be considered a valid state change, specified in milliseconds. The
configured debounce time qualifies all 32 inputs.
210-4 2VAA000844R0001 J
210. Sequence of Events Slave Specifications
Value Description
0 Undefined point
1 Normally open (NO) point, off-scan
2 Normally closed (NC) point, off-scan
3 NO point, on-scan
4 NC point, on-scan
NOTE: NO point alarm level = logic 1 and NC point alarm
level = logic 0.
S39
Snapshot time. A constant real input value inhibits this function. When the integer portion of the real input changes, a snapshot of the
defined on-scan points is generated. The current value and alarm state reports for each point that is on-scan. Practical inputs to S39 may
be the system time or a pushbutton.
S40
Block address of the summary request. The transition of the block input from logic 0 to logic 1 initiates a summary of the 32 inputs. All
points in alarm or off-scan are reported.
S41, S42 and S43

Spare.
2VAA000844R0001 J 210-5
Specifications 210. Sequence of Events Slave
210-6 2VAA000844R0001 J
211. Data Acquisition Digital
211. Data Acquisition Digital

The data acquisition digital (DADIG) function code and the DADIG I/L (function code 212) pair are used for boolean data acquisition
functions. The DADIG and DADIG I/L function codes complement the data acquisition analog (DAANG) and the data acquisition analog
I/L (DAANG I/L) function codes by providing the function of the DAANG block for boolean signals. The DADIG function code pair provides
a means to accomplish a number of unique data acquisitions, alarm detections and management functions related to boolean logic
signals implemented in Symphony systems.
The DADIG function codes support a range of features on a human system interface (HSI). Commands are accepted from HSIs and
alarm information is supplied to HSIs through exception reports. The DADIG I/L function code provides a means of importing data from
the DADIG block in Symphony systems.
Outputs
DAD IG Blk Type Description

S1 (2 1 1 )
IN -S E L
S2 IN -P M T ST N B Reported logic state
S3 P R I-IN
S4
S13
A LT-IN
N+1 R Extended status
S U P -IN
S14 Q UA L -OV
S15 LT C H -E N Specifications
S16 X R -R E Q
S19 S PA R E
Spec Tune Default1 Type Range Description
S1 N 5 I Note 2 Block address of input select
S23 N 0 I Note 2 Block address of permit input select
S3 N 0 I Note 2 Block address of primary input
S4 N 0 I Note 2 Block address of alternate input
S5 N 0 B 0 or 1 Custom inserted value
S63 Y 0.000 R Full Input conditioning mode control
S7 Y 0.000 R Full Input conditioning time reference (secs)
S8 Y 0.000 R Full Input conditioning digital filter count reference
S93 Y 0.000 R Full Alarm mode control
S10 Y 0.000 R Full Alarm time reference (secs)
S11 Y 0.000 R Full Alarm digital filter transition count reference
S12 Y 0.000 R Full Return alarm/de-alarm time period reference (secs)
S13 N 0 I Note 2 Block address of alarm suppress enable
S142 N 5 I Note 2 Block address of quality override input
S15 N 0 I Note 2 Block address of alarm state latch enable
S16 N 0 I Note 2 Block address of exception report request
S17 N 0 I 0 - 255 Type code
S19 N 5 I Note 2 Spare block input

NOTES:
1. Values reported for specifications that have been adapted will be invalid.
2VAA000844R0001 J 211-1
Explanation 211. Data Acquisition Digital
211.1 Explanation
The DADIG block has two block outputs. The first output is the reported logic state and propagates one of three possible input signals.
A tunable specification selects which input is routed to the output and processed for alarm detection. The second output is the extended
status (internal quality, status, state and mode) of the function code. The DADIG block allows this quality state to be overridden through
a block input.
The DADIG block supports exception reporting. Exception reports provide HSIs with alarm and function code status information through
exception reports. Additional capabilities such as suppression and forced requests of exception reports are available through block inputs
and tunable specifications.
An option allows the input to be conditioned using one of four input conditioning modes. This option provides the ability to select the
conditioned input or the unconditioned input to be the input for the alarm.
The DADIG block supports a number of alarm detection modes. These alarm detection modes allow the selection of various parameters
to determine an alarm output. The input state or a transition to be interpreted as an alarm can be specified. Several timing parameters,
such as the length of time the input has to remain at the alarm state before the block generates an alarm, fixed duration of the alarm,
maximum duration of the alarm and de-alarm/return alarm time are programmable. The DADIG also provides digital alarm filtering
capabilities and the ability to suppress alarms.
The DADIG block provides a latch option. Changes to the reported logic state and extended status can be latched and held based on the
occurrence of an alarm. If time-stamping is enabled, the time value will also be latched when the outputs are latched.
The DADIG function code accepts commands from a HSI as well as from input signals. HSI commands are accepted for input selection,
enabling and disabling exception reporting, forcing exception reports, setting the extended status alarm latch, and for enabling and
suppressing alarms.
The DADIG function code retains information in NVRAM after a reset, mode change or power interruption such as:
• Selected input.
• Exception report enable and disable state.
• Alarm suppression indication.
Figure 211-1 shows how the functions execute within the DADIG block. The process is executed by the function block in this order:
1. Get the control information from the block input or HSI command.
2. Retrieve the selected input value.
3. Execute the input conditioning, if enabled.
4. Execute the alarm processing using the raw input or the conditioned input, if enabled.
5. Process return alarm or process de-alarm, if enabled.
6. Suppress alarms, if alarm suppression is enabled.
7. Process quality override states.
8. Execute extended status alarm latch processing, if enabled.
9. Update the block output value and status.
10. Execute exception report processing, if enabled.
P R IM ARY
A LTE R N ATE INP U T IN PU T A LARM Q UA LITY LATC H E XCE P TIO N R LS
U S ER S ELEC T C O ND ITIO NIN G P RO C ESS IN G OV E RR IDE P RO CES S IN G R E PO RTIN G ES
S ELE C T
P ER M IS SIVE
C O NTRO L
TIM E
C O UN T
C O NTRO L
TIM E
C O UN T
R E /D E TIM E
S U PP RE S S
OV E RR IDE
E N AB LE
R E Q UE ST
C O DE T 0 1 9 37 A
Figure 211-1 Functions Executed within the DADIG Block
211-2 2VAA000844R0001 J
211. Data Acquisition Digital Explanation
Specifications
S1
Block address of the input select control. The input select control determines which of the three possible inputs to the DADIG block will
be output. The last valid selection is saved in NVRAM and is stored on a reset or mode change. All change requests (logic and HSI) are
locked out during module startup. Figure 211-2 shows the input selection logic.
P R IM AR Y
A LTE R N ATE
C U S TO M
P ER M IT IN P U T S E LEC T
IN P U T S ELE C T
C O N SO L E IN P U T S E L EC T
T 01 9 38 A
Figure 211-2 Input Selection Logic
Care should be exercised to properly control the permit input select <S2> to enable or disable changes. The input select parameter can
be altered by either module configured logic (output of addressed block) or command messages from a HSI or computer. The input select
tracks the last valid selection value from either source when <S2> is true. The value of <S1> is converted to a hexadecimal number and
the bits are mapped as shown in Table 211-1.
Table 211-1 S1 Status Bit Map
0-1 Refer to 0 0 Select primary input value <S3>

Table
211-2 1 1 Select primary input value <S3>
2 2 Select custom inserted input value S5
1+2 3 Select alternate input value <S4>
2 4 Spare
3 8 Spare
4 16 Spare
5 32 Spare
6 64 Spare
7 128 Exception reporting mode:

0 = report mode
1 = no report mode
8 - 15 – Spare
To program <S1>, add the values listed in the binary weighted value column of Table 211-1 to the resulting sum and enter this value for
<S1>. For example, if the custom inserted input is selected and the block is in no report mode, S1 would be set to 2128 or 130.
The bit column is separated by function and some functions use multiple bits. Only one attribute option can be selected for that function.
For example, only one attribute can be selected for bits zero and one (only one block input can be selected). Table 211-2 lists the valid
2VAA000844R0001 J 211-3
combinations for <S1>.
Table 211-2 Valid Combinations for S1
Binary Value Result
0 or 1 Primary input selected, on report mode (default)
2 Custom inserted state selected, on report mode
3 Alternate input selected, on report mode
4 - 127 Not valid
128, 129 Primary input selected, no report mode
130 Custom inserted state selected, no report mode
131 Alternate input selected, no report mode
132 Not valid
When the harmony controller is in execute mode and a transition takes place on the input select (bits zero and one), the new input value
and status are selected. The three input states can also be selected from the HSI. A new transition on the input control cancels any
pending HSI request. Input selects (bits zero and one) and HSI requests are ignored during module startup.
The DADIG block mode (selected input, no report state, and alarm suppression indication state) is defined during module startup based
on the saved mode. The saved mode is initialized to primary input selected, report mode, alarm suppression false, when the block is
added. After startup (the module is put in execute mode), the mode updates when <S1> changes or a HSI command is received.
However, changes to <S1> and HSI commands will be ignored during module startup. This prevents a transition of the block modes when
startup is complete. Therefore, any changes to <S1> during configuration mode will have no effect on the block modes.
NOTE: The state of <S1> may not agree with the mode. For example, when changes are made in configure mode, <S1> will not
agree with the block's mode in execute mode. Also, a HSI command can change the block's mode. Thus, <S1> may not agree
with the block's mode.
The report/no report bit (bit seven) is reported once when it is set through an exception report. It then disables exception report updates
after being sent. The HSI can also request a point to be in report or no report mode. A force exception report update command can be
issued by the HSI to cause a point to be updated even when it is set for no report. This feature allows the point value to be updated without
putting it back in report mode. The block outputs (N and N+1) for a block in no report continue to update. The current report/no report
state of the input is saved in NVRAM as part of the blocks mode and is stored on a reset or mode change. All report/no report requests
(logic and HSI) are locked out during module startup.
S2
Block address of the permit input select. When the output of the block addressed by this specification is a logic 1, change of input selection
from either configured module logic to <S1> bits zero and one or the HSI commands will change the selected input source. When <S2>
equals zero, requests for input select mode changes from any source are ignored (locked out). The lock prevents changes in the selected
input after startup testing when using the DADIG block for a control function. Table 211-3 shows the permit input bit map.
Table 211-3 Permit Input Bit Map
<S2> Function
0 Disable/lock input selection
1 Allow input to be selected from HSI or <S1>
S3
Block address of the primary input to be monitored by the DADIG block. The reported logic level (N) will equal this level when the input
select control is in select primary input mode (<S1> equals zero or 128) and a boolean argument (zero or one) is present at the block
addressed by <S3>.
S4
Block address of the alternate input to be monitored by the DADIG block. The reported logic level (N) will equal this level when the input
select control is in a select alternate input mode (<S1> equals three or 131) and a boolean argument (zero or one) is present at the block
211-4 2VAA000844R0001 J
addressed by this specification.
S5
Custom inserted input. The reported logic level (N) will equal this level when the input select control is in a select custom input mode
(<S1> equals two or 130) and a boolean argument (zero or one) has been input to this specification.
S6
Input conditioning mode control value. This specification defines the type of conditioning performed on the selected input. This real input
value is converted into a hexadecimal number and the bits are mapped as shown in Table 211-4. Figure 211-3 shows the input
conditioning logic.
Table 211-4 Selected Input Bit Map
Binary
Bit Attribute
Value
0 1 Input reference state. The specified input conditioning criteria will be applied to the
input when the selected input enters the state defined by bit 0.
1-3 — 2 Pulsed mode; generate an output pulse of the state defined by bit 0 for the
time period specified by S7 when selected input goes into the state defined by
bit 0.
4 Timed out mode; generate an output pulse of the state defined by bit 0 if the
selected input goes into the state defined by bit 0 for a time period greater than
or equal to the time defined by S7.
6 Timing mode; generate an output pulse of the state defined by bit zero for
maximum time period defined by S7 if the selected input goes into the state
defined by bit 0.
8 Input digital filter; generate and maintain a pulse of the state defined by bit 0 if
the selected input transitions into and out of the state defined by bit 0 a num-
ber of times greater than or equal to S8 over a time period less than or equal
to the value defined by S7.
4 - 15 — Spare.
To program this specification, the values listed in the binary weighted value column of the desired functions are added and the resulting
sum is the value to be entered. For example, if the input reference state is a one and the desired mode is the timing mode, the value
entered for this specification would be 6+1 or 7.
IN P U T 1 P U L SE
M OD E
T IM E D OU T
3 M OD E
OU TP U T
4 T IM IN G
M OD E
IN P U T
C O N D IT IO N IN G D IG ITA L
M OD E
C O N T RO L F ILT E R
S TAT E R E F E R E N C E M OD E
T IM E R EF E R E N C E
C O U N T R E F E R EN C E
T0 1 9 39 A
Figure 211-3 Input Conditioning Logic
2VAA000844R0001 J 211-5
The bit column is separated by function and some functions use multiple bits. Only one attribute option can be selected for those
functions. For example, only one attribute can be selected for bits one through three. Only one input conditioning mode can be selected.
Table 211-5 lists the valid combinations for S6.
Table 211-5 Bits 0 and 1 Valid Combinations for S6
Value Result
0 Input conditioning disabled (default)
1 Not valid
2 Pulse mode, logic 0 reference
3 Pulse mode, logic 1 reference
4 Timed out mode, logic 0 reference
5 Timed out mode, logic 1 reference
6 Timing mode, logic 0 reference
7 Timing mode, logic 1 reference
8 Digital filter mode, logic 0 reference
9 Digital filter mode, logic 1 reference
10 Not valid
Pulse Mode
In pulse mode, an output pulse of the input reference state (S6, bit zero) occurs for a specified amount of time (S7) when the selected
input matches the input reference state (S6, bit zero). After the time specified by S7, the output pulse is negated for a minimum of one
scan cycle before the next pulse will be generated. The output pulse duration S7 and the input reference state (S6, bit zero) are tunable
values. Figure 211-4 shows the output and the input when operating in pulse mode.
1 2 3 4
R E FE R E N C E
STAT E
IN P U T
ts ts
S7 S7 S7
O U T PU T T 01 94 0 A
Figure 211-4 Pulse Mode Input and Output
In pulse mode, the output pulse duration S7 is independent of how long the input stays in the reference state. Each pulse is also negated
for a minimum of one scan cycle (time ts) before being asserted. The input is not sampled again until after S7  ts (pulse two is ignored).
At the end of this time period, the input is sampled again and another pulse generated when the input matches the input reference state.
Pulse three generates a pulse and pulse four generates multiple output pulses.
Timed Out Mode
In the timed out mode, an output pulse of the input reference state (S6, bit zero) occurs when the selected input matches the input
reference state (S6, bit zero) for a specified amount of time specified by S7. The pulse remains asserted until the input goes out of the
input reference state (S6, bit zero). The input reference state (S6, bit zero) and reference match time S7 are tunable values. Figure 211-
211-6 2VAA000844R0001 J
5 shows the input and the output when operating in timed out mode.
R E FE R EN C E
S TATE
IN P U T
ta
S7
O U TP U T
S7 < t a
T 01 9 41A
Figure 211-5 Input Pulse Greater than Reference Match Time
When the reference match time S7 is longer than the input pulse duration (time ts), the output will not be asserted. Figure 211-6 shows
the input and the unasserted output.
R E FE R EN C E
STAT E
IN P U T
ta
S7
O U T PU T
S7 > t a T 01 9 42 A
Figure 211-6 Input Pulse Less than Reference Match Time
Timing Mode
In the timing mode, an output pulse of input reference state (S6, bit zero) occurs for a specified maximum period of time S7 when the
selected input matches the input reference state (S6, bit zero). The input reference state and maximum pulse duration are tunable values.
If the maximum pulse duration is defined as longer than the input pulse exists (time ts), the output pulse remains until the input is
recognized to no longer match the input reference state (output tracks the input). Figure 211-7 shows the output tracking the input.
R E FE R EN C E
STATE
IN P U T
ta
S7
R E FE R EN C E
STAT E
O U TP UT
S7 > t a T019 43A
Figure 211-7 Input Pulse Less than Maximum Pulse Width
If the input pulse duration is longer than the specified period of time S7, the output negates after the specified time period. Figure 211-8
2VAA000844R0001 J 211-7
shows the negated output.
R E FE R EN C E
STAT E
IN P U T
ta
S7
R E FE R EN C E
STAT E
O U T PU T
S 7 < ta T 01 9 44 A
Figure 211-8 Input Pulse Greater than Maximum Pulse Width
Digital Filter Mode

In the digital filter mode, the output pulse is either held or tracks the input. An output pulse is generated and held if the selected input
goes into and out of the input reference state (S6, bit zero) a specified number of times S8 within a given time period S7. The filtered
pulse is held for the next time period as long as the number of input pulses is greater than or equal to the count S8 during the time period.
If the selected input does not go into and out of the input reference state the specified number of times over the time period, the output
pulse is released and the output tracks the input. The input reference state (S6, bit zero), the number of input transitions or digital filter
transition count reference S8, and the filter period S7 are tunable values. Figure 211-9 illustrates the digital filter mode.
1 2 S 8 -1 S8 1 2 3 4 1
R EFE REN C E
S TAT E
IN P U T
S7
t0 t1 t2
R EFE REN C E
S TAT E
OU TPU T
T R AC K H O LD TR A C K
T 01 945 A
Figure 211-9 Digital Filter Mode Input and Output
In Figure 211-9, the input initially enters the input reference state (S6, bit zero) at t0. This marks the start of the filter period. At time t1,
S8 transitions have occurred which cause the output pulse to be generated and held. At time t2, the filter period S7 has ended and S8 or
greater transitions have not occurred so the output is released to track the input.
The input conditioning mode is tunable and can be changed during operation. If the mode is changed when the selected input is at the
reference state (REF), an edge (transition into REF state) will be detected. The result at the output when the mode is changed is
dependent upon which mode is currently enabled and which mode is being transitioned. Changing from pulse mode to timing mode or
from timing mode to pulse mode, a pulse of up to twice the specified time period S7 may occur.
S7
Input conditioning time reference. This defines the time parameter, in seconds, used by the input conditioning mode selected by S6. The
parameter this value defines is dependent on the mode of operation. Table 211-6 shows which time parameter is associated with each
mode.
Table 211-6 Mode Time Parameters
Mode Time Parameter
Pulse mode Output pulse duration
Timed out mode Input reference match time
211-8 2VAA000844R0001 J
Table 211-6 Mode Time Parameters (Continued)
Mode Time Parameter
Timing mode Maximum output pulse duration
Filter mode Filter period
S8
Input conditioning digital filter count reference. This defines the number of input transitions into the specified reference state (S6, bit zero)
that are required over the specified time period S7 in order to force and hold the output at the specified state (S6, bit zero).
S9
Alarm mode control value. This defines the type of alarm processing to be accomplished by the DADIG. This real input value is converted
to a hexadecimal number and the bits are mapped as shown in Table 211-7. Figure 211-10 shows the alarm processing logic.
Table 211-7 Alarm Mode Control Bit Map
Binary
Bit Attribute
Value
0 1 Alarm reference state. When an alarm is enabled, the select alarm criteria will be
applied to the input when the selected input enters the state defined by this bit.
0 = alarm reference is logic 0
1 = alarm reference is logic 1
1 2 Input reference select. When alarm is enabled, this input selects whether alarm will
use the raw selected input signal as a reference or the conditioned selected input.
0 = use unconditioned, raw input
2 = use conditioned input
2-4 4 Standard digital alarm mode; alarm when selected input goes into alarm state
(refer to bit 0)
8 Deadbanding alarm mode; alarm for maximum time period defined by S10 when-
ever selected input goes into alarm state (refer to bit 0)
12 Timed out alarm mode; alarm if selected input goes into alarm state (refer to bit 0)
for greater than or equal to the time period defined by S10
16 Alarm digital filter; generate and hold an alarm if selected input transitions into and
out of the alarm state (refer to bit 0) greater than or equal to the number of times
defined by S11 over a time period less than or equal to the value defined by S10
5 32 Enable alarm suppression when <S13> = 1. This option is valid only when an
alarm is enabled (S9 bits 2 - 4 = 4, 8, 12, or 16)
6 64 Enable de-alarm after <S12> time-out. This option is valid only when an alarm is
enabled (S9 bits 2 - 4 = 4, 8, 12, or 16)
7 128 Enable return alarm after <S12> time-out. This option is valid only when an alarm
is enabled (S9 bits 2 - 4 = 4, 8, 12, or 16)
8 256 Select mode of the alarm suppression indication in extended status block output
N+1 (refer to ES bit 12)
0 = alarm suppression indication set when alarms are selected through <S9>
and enabled through <S13> or a HSI command
1 = alarm suppression indication set when an alarm is being suppressed. This
option is valid only when an alarm is enabled (S9, bits 2 - 4 = 4, 8, 12, or
16) and alarm suppression is selected (through S9, bit 5)
9 - 15 — Spare
2VAA000844R0001 J 211-9
R A W INP UT 0
1
S TA NDAR D
M OD E
C O N D IT ION E D
2
IN P U T
D E A D BA ND ING
3 M OD E
ALARM
4 TIM E D OU T
M OD E
INP UT
IN P U T SELEC T
C O N D IT ION ING
C O N T RO L M O DE D IGITAL F ILT E R
M OD E
S TATE RE F ER E N C E
T IM E RE F ER EN CE
C O U N T R E F E R E NC E T 01 9 46 A
Figure 211-10 Alarm Processing Logic
Bit 0 - Alarm Reference State

This bit defines the state of the input to be considered the alarm state. When the input is at this level and alarm is enabled, alarm
processing activates.
0 = input logic 0 is alarm state
1 = input logic 1 is alarm state
Bit 1 - Input Reference State
An alarm can use the raw input for alarm processing or the output of the input conditioning stage. This bit selects which signal is to be
used.
0 = use raw input
1 = use conditioned input
Bits 2 through 4 - Alarm Mode
Bits two through four define the alarm mode that is enabled.
Bit 5 - Alarm Suppression Select
This bit selects alarm suppression. When alarm suppression is selected with this bit and enabled through <S13> or a HSI command, and
an alarm is enabled, alarm indications in the extended status output (N+1) and exception reports will be suppressed (forced to zero).
0 = do not suppress alarms
1 = alarm suppression selected
Bit 6 - De-Alarm Enable
This bit enables de-alarm. When an alarm mode is enabled, de-alarm is enabled, and an alarm condition is detected, the alarm indication
is in the extended status output (N+1) and exception reports will be de-alarmed or suppressed after a period of time specified by S12.
When the alarm indication is suppressed due to a de-alarm condition, the alarm suppression indication in the extended status output and
exception reports will be true.
0 = do not de-alarm
1 = de-alarm enabled
Bit 7 - Return Alarm Enable
Bit seven enables the return alarm function. When an alarm is enabled, an alarm exists, and return alarm is enabled, the return alarm
indication in the extended status output (N+1) and exception report will change states a fixed period of time (S12) after the alarm
indication was first generated. Additionally, as long as the alarm condition exists and this function is enabled, the return alarm indication
continues to change to the opposite state every time period specified by S12.
0 = do not return alarm
1 = return alarm enabled
Bit 8 - Alarm Suppression Indication Mode
This bit determines the mode of the alarm suppression indication in the extended status output N+1 and exception reports.
0 = alarm suppression indication will be true when alarm suppression is selected through S9, bit five and
enabled through <S13> or a HSI command
1 = alarm suppression indication will be true only when an alarm is currently being suppressed
NOTE: De-alarm also uses the alarm suppression indication in the extended status output.
Bits 9 through 15
211-10 2VAA000844R0001 J
Reserved. To program this specification, the values listed in the binary weighted value column of the desired functions are added and
the resulting sum is the value to be entered. For example, to get the desired functions:
alarm reference state = 0
input reference = raw unconditioned input (0)
alarm mode = deadbanding mode (8)
alarm suppression disabled = 0
de-alarm enabled = 64
return alarm disabled = 0
S9 = 0+0+8+0+64=72
S9 = 72
The bit column in Table 211-7 is separated by function and some functions use multiple bits. Only one attribute option can be selected
for those functions. For example, only one attribute and one alarm mode can be selected for bits two through four.
Digital State Alarm Mode
In the digital state alarm mode, an alarm state occurs whenever the input matches the alarm reference state (S9, bit zero). The alarm
condition lasts until the input no longer matches the alarm reference state (S9, bit zero). In this mode, the alarm tracks the input as shown
in Figure 211-11.
1 2 3 4 5
R E FE R EN C E
STATE
IN P U T
1 2 3 4 5
AS SE R TE D
STATE
AL AR M T 01 9 4 7 A
Figure 211-11 Digital State Alarm Mode Input and Alarm
Deadbanding Alarm Mode

In the deadbanding alarm mode, an alarm state occurs for a specified amount of time specified by S10 whenever the selected input goes
into the alarm reference state (S9, bit zero). At the end of the time specified by S10, the alarm state is not negated until the selected input
no longer matches the alarm reference state (S9, bit zero). The alarm duration S10 and alarm reference (S9, bit zero) are tunable values.
Figure 211-12 shows the alarm state and input when operating in the deadbanding alarm mode.
1 2 3 4 R E FE R E N C E
S TATE
IN P U T
S10 S10 S10
A S SE R TE D
S TAT E
AL A R M T 01 9 48 A
Figure 211-12 Deadbanding Alarm Mode Input and Alarm
Timed Out Alarm Mode

In the timed out alarm mode, an alarm state occurs when the selected input matches the alarm reference state (S9, bit zero) for the
amount of time specified by S10. The alarm remains asserted until the input goes out of the alarm state. The alarm reference and
2VAA000844R0001 J 211-11
reference match time specified by S10 are tunable values. Figure 211-13 shows the timed out alarm mode input and alarm.
R E FE R E N C E
S TAT E
IN P U T
ta
S1 0
A S SE RT ED
S TAT E
O U TP U T
S1 0 < t a T 01 9 4 9 A
Figure 211-13 Timed Out Alarm Mode Input and Alarm (S10 less than ta)
If the input reference match time S10 is longer than the alarm condition time ta, the alarm is not asserted. Figure 211-14 shows this input
and alarm state.
R E FE REN C E
STAT E
IN P UT
ta
S1 0
O UT PU T
S1 0 > ta T 01 9 4 3 A
Figure 211-14 Match Time Greater than Condition Time (S10 greater than ta)
Digital Alarm Filter Mode

In the digital alarm filter mode, the alarm is either held or tracks the input. The alarm is generated and held if the selected input goes into
and out of the alarm state (S9, bit zero) a number of times specified by S11 within a given time period specified by S10. The filtered alarm
is held for the next time period S10 as long as the number of alarm pulses is greater than or equal to the count S11 during the time period
S10. If the selected input does not go into and out of the alarm state the number of times specified by S10 over the period specified by
S11, the alarm is released to track the input. Both the number of alarm transitions S11 and the filter period S10 are tunable values. Figure
211-15 shows the alarm filter mode input and alarm.
1 2 S 1 1-1 S11 1 2 3 4 1
R EFE REN C E
S TAT E
IN P U T
S10
SEC S
t0 t1 t2
A SS E RT E D
S TAT E
A LA R M
TR A C K H O LD T R AC K
T 01 951 A
Figure 211-15 Alarm Filter Mode Input and Alarm
In Figure 211-15, the input initially enters the alarm condition at t0 which marks the start of the filter period. At time t1, S11 transitions
have occurred that cause the alarm to generate and hold. At time t2, the filter period has ended and S11 or greater transitions have not
occurred so the alarm is released to track the input. If, at or before time t2, S11 transitions had occurred, the alarm indication would have
been held for another S10 period of time.
211-12 2VAA000844R0001 J
The alarm mode is tunable and can be changed during operation. If the mode is changed when the selected input is at the reference
state (REF), an edge (transition into REF state) will be detected. The result at the alarm output when the mode is changed is dependent
upon what mode is currently enabled and which mode is being transitioned.
S10
Time period for alarm modes. The specific parameter this value defines depends on the alarm mode. Table 211-8 shows the time
parameters for the different alarm modes.
S11
Number of times the selected input must go into and out of the alarm state (S9, bit zero) when digital alarm filtering is enabled (S9, bits
two through four equal four) in order for the alarm to be generated and held.
Table 211-8 Time Parameters for Alarm Modes
Mode Time Parameter
Standard digital mode No time parameter used
Deadbanding mode Alarm duration (secs)
Timed out mode Alarm state reference match time (secs)
Filter mode Filter period (secs)
S12
De-alarm time (in seconds) when de-alarm is enabled. If an alarm lasts the amount of time defined in S12, the alarm will be suppressed.
When return alarm is enabled (S9, bit seven), S12 is the return alarm time (in seconds). If an alarm exists for the time defined by S12,
the alarm is returned. Figure 211-16 shows the return alarm and de-alarm logic.
A LA R M
A LA R M
D E -A L AR M RETUR N
R E TU R N A L AR M
A L AR M
D E -A L AR M
E N AB LE
A LA R M
C O N T RO L
R E TU R N A LA R M
E N AB LE
D E -A L AR M /R E TU R N A LA R M T IM E T01 952 A
Figure 211-16 Return Alarm and De-Alarm Logic
S13
Block address of the alarm suppress enable. Figure 211-17 shows the alarm suppression logic.
2VAA000844R0001 J 211-13
1 = alarm suppression allowed through <S9>

0 = alarm not suppressed through <S9>
A LAR M
A LA R M
N O A LA R M
(S U P PR E S S ED )
A LAR M
C O N TRO L A LA R M S U P PR E S S /U N -SU P P R E S S
U N -S U P P R E S S
C O N SO L E A LA R M S U P P R ES S EN A B LE
A LAR M S U P PR E S S E N A BLE T 01 9 53 A
Figure 211-17 Alarm Suppression Logic
S14
Block address of the quality state override input. This input allows an external source to override the quality and status of the reported
logic state and indications displayed in the extended status. The input is converted to a hexadecimal number and the bits are mapped
as shown in Table 211-9. Table 211-10 shows valid combinations for S14.
Table 211-9 S14 Bit Map
0 1 Force good quality
1 2 Force alternate input selected mode
2 4 Force custom inserted input selected mode
3 8 Output suspect
4 16 Hardware failure, bad quality
5 32 E-STOP
6 - 15 — Spare
Table 211-10 Valid Combination for S14
Value Result Value Result
0 Quality override disabled, default 14 - 15 Not valid
1 Force good quality 16 Force bad quality
2 Force alternate input selected mode 17 Not valid
3 Force good quality, alternate input selected 18 Force alternate input selected mode, bad
mode quality
4 Force custom inserted input selected mode 19 Not valid
5 Force good quality, custom inserted input 20 Force custom inserted input selected mode,
selected mode bad quality
6-7 Not valid 21 - 23 Not valid
8 Force suspect quality 24 Force suspect quality, bad quality
9 Force good quality, suspect quality 25 Not valid
211-14 2VAA000844R0001 J
Table 211-10 Valid Combination for S14 (Continued)
Value Result Value Result
10 Force alternate input selected mode, suspect 26 Force alternate input selected mode, suspect
quality quality, bad quality
11 Force good quality, alternate input selected 27 Not valid

mode, suspect quality
12 Force custom inserted input selected mode, 28 Force custom inserted input selected mode,
suspect quality suspect quality, bad quality
13 Force good quality, custom inserted input 29 - 31 Not valid

selected mode, suspect quality
32 E-STOP 46 - 47 Not valid
33 Force good quality, E-STOP 48 Force bad quality, E-STOP
34 Force alternate input selected mode, 49 Not valid

E-STOP
35 Force good quality, alternate input selected 50 Force alternate input selected mode, bad
mode, E-STOP quality, E-STOP
36 Force custom inserted input selected mode, 51 Not valid

E-STOP
37 Force good quality, custom inserted input 52 Force custom inserted input selected mode,
selected mode, E-STOP bad quality, E-STOP
38 - 39 Not valid 53 - 55 Not valid
40 Force suspect quality, E-STOP 56 Force suspect quality, bad quality, E-STOP
41 Force good quality, suspect quality, E-STOP 57 Not valid
42 Force alternate input selected mode, suspect 58 Force alternate input selected mode, suspect
quality, E-STOP quality, bad quality, E-STOP
43 Force good quality, alternate input selected 59 Not valid

mode, suspect quality, E-STOP
44 Force custom inserted input selected mode, 60 Force custom inserted input selected mode,
suspect quality, E-STOP suspect quality, bad quality, E-STOP
45 Force good quality, custom inserted input 61 Not valid

selected mode, suspect quality, E-STOP
The quality state override does not affect the processing of the DADIG function code. The override state specified is logically ORed with
the internally derived state. This permits the selected use of the internal function or special external function.
NOTE: If an external function generates any of these control bits, the internal features that correspond to the defined function must
be inhibited. This prevents a conflict between the externally driven status and the internal status.
Quality is normally derived from the selected input with the exception of two conditions.
1. Bit zero is set to a logic 1. This forces the quality to be good regardless of the actual input quality state. Bit four
overrides bit zero if both are set.
2. Bit four is set to a logic 1. This forces the quality to be bad regardless of the actual input state. Bit four overrides
bit zero if both are set.
S15
Block address of the alarm state latch enable. When <S15> equals one, any occurrence of an alarm causes the reported logic state
output N and the extended status output N+1 to latch. These values do not change at the block outputs or within the exception report
until either <S15> equals zero or a HSI sends a reset latch command. If time-stamping is enabled, the time-stamp value in the exception
report will also be latched. While the values are latched, a flag is set in the extended status and the exception report to indicate to any
receiver (e.g., HSI, function block) that the values are latched and require a reset. When the output value of the block addressed by this
specification is logic 0, the reported logic state and the extended status outputs reflect the current value of the internal reported logic state
and extended status.
2VAA000844R0001 J 211-15
0 = disable alarm state latch; reported logic state output N and extended status output N+1 reflect current
internal states
1 = latch reported logic state and extended status upon an alarm
S16
Block address of the exception report request. When <S16> goes from zero to one, the exception report data is updated and sent. When
in no report mode, <S16> is disabled. The HSI can force an exception report update that reports the current value even when the point
is set for no report. The point remains in no report mode after sending one update if it was previously in no report mode.
0 = generate exception reports according to normal criteria; alarm conditions
1 = force an exception report
S17
Custom ID type code. The data in S17 goes in the exception report enable reply and will be sent to a HSI when the HSI establishes and
connects a route to this point.
S18, S19, and S20
Spare.
Outputs
N
Primary input <S3>, the alternate input <S4>, or the custom inserted value S5 depending on the input select control <S1>.
N+1
Current selected input, alarm, and processing status of the DADIG function block. This extended status converts into individual logic
levels by configuration of real demultiplexers (function code 126). Table 211-11 is a bit map of the extended status.
Table 211-11 Extended Status Bit Map
Binary
Bit Attribute
Value
0 1 Spare
1 2 Spare
2 4 Spare
3-4 0 00 Primary input selected <S3>
8 01 Primary input selected <S3>
16 10 Custom inserted input selected S5
8+16 11 Alternate input selected <S4>
5 32 Permit input select enabled
7 128 Reported logic state and extended status latched
8 256 Output value
9 512 E-STOP
10 1024 No report mode enabled
11 2048 Output suspect
12 4096 Alarm suppression indication
13 8192 Return alarm (toggled)
211-16 2VAA000844R0001 J
Table 211-11 Extended Status Bit Map (Continued)
Binary
Bit Attribute
Value
14 16384 Alarm state
15 32768 Bad quality
Bits 3 and 4
Bits three and four indicate which of the three possible inputs the input select block <S1> has selected to be output at the reported logic
state output N.
Bit 5
Bit five is the permit input select <S2> input.
Bit 6
Bit six is the quality override. It indicates that the quality override input <S14> is overriding the quality.
Bit 7
Bit seven shows when the outputs are latched through the alarm state latch (enabled through <S15>).
Bit 8
Bit eight is the state of the reported logic output N.
Bit 9
Bit nine is the executed stop (E-STOP).
Bit 10
Bit ten is the no report field. This indicates when the input select <S1> places the block in no report mode.
Bit 11
Bit 11 is the output suspect quality. The quality override block <S14> sets the output suspect quality.
Bit 12
This field is the monitored DADIG block alarm suppression indication. This bit can be set by two of the monitored DADIG block functions
(on alarm suppression and by de-alarm).
1. For alarm suppression, this bit can operate in one of two modes selected by the DADIG's alarm mode control
<S9>, bit eight.
• If bit eight of DADIG <S9> equals zero, this indication will be set when alarm suppression is selected and enabled.
Alarm suppression is selected through the DADIG alarm mode control <S9>. Alarm suppression is enabled
through either the DADIG alarm suppression enable block input <S13> or a HSI command sent to the DADIG
block.
• If bit eight of DADIG <S9> equals one, this indication will be set when the alarm suppression function is suppressing an alarm.
2. For de-alarm, this bit will be set when an alarm is being de-alarmed.
Bit 13
Bit 13 is the return alarm indication. This shows when an alarm has been returned. This bit toggles to the opposite state to indicate an
alarm has been returned. The alarm mode control S9 enables return alarm. Return alarm uses the return alarm and de-alarm time period
reference S12.
Bit 14
Bit 14 is the alarm field. The alarm field is set when an alarm indication exists and alarm is enabled through the alarm mode control <S9>.
Bit 15
Bit 15 is the quality field. The quality field indicates when the block is bad quality. Quality reflects the quality of the selected input <S3>,
<S4> or S5. Quality can be forced bad (set), or forced good (cleared) through the quality override block input <S14>.
2VAA000844R0001 J 211-17
211-18 2VAA000844R0001 J
212. Data Acquisition Digital Input/Loop Explanation
212. Data Acquisition Digital Input/Loop

The data acquisition digital (DADIG function code 211) and the data acquisition digital input/loop (DADIG I/L function code 212) function
code pair is for digital data acquisition of boolean signal functions. The DADIG and DADIG I/L function codes complement the data
acquisition analog (DAANG) and the data acquisition analog input/loop (DAANG I/L) function codes by providing the functions of the data
acquisition analog block for boolean signals. The DADIG function code pair provides a means to accomplish a number of unique data
acquisition, alarm detection and management functions related to boolean logic signals implemented in Symphony systems.
The DADIG function codes support a range of features on the Conductor VMS series human system interface (HSI). Commands are
accepted from HSIs and alarm information is supplied to HSIs through exception reports. The DADIG I/L function code provides a means
of importing data from the DADIG block in Symphony systems.
NOTE: If a module utilizes an imported digital value from the control network in several instances in its configuration, the function
blocks that utilize that digital value must be connected to only one DAANG I/L block. Exception reports from the same (control net-
work, HCU, module and block) address cannot be imported to more than one destination within a single module configuration.
Outputs
DAD IGI/L
(21 2) Blk Type Description
ST
N B Source reported logic level
N+1 R Source extended status
Specifications
S2 N 0 I Note 1 Source DADIG block number
S3 N 0 I 0 - 250 Cnet node address
S5 N 0 I 0 - 255 Spare integer input
S6 N 0.000 R Full Spare real input

NOTE:
212.1 Explanation
The DADIG I/L provides the ability to access the DADIG outputs from a Cnet communication highway. The DADIG I/L outputs the two
DADIG block outputs (reported logic level and extended status).
S1
Module address of the harmony controller containing the monitored DADIG block.
S2
Block number of the monitored DADIG block.
S3
Harmony control unit (HCU) address of the module containing the monitored DADIG block.
S4
Loop number of the Harmony control unit containing the monitored DADIG block.
2VAA000844R0001 J 212-1
Outputs 212. Data Acquisition Digital Input/Loop
S5, S6 and S7
Spare.
212.1.2 Outputs
N
Boolean output equal to output N of the monitored DADIG (function code 211) block specified by S1, S2, S3 and S4.
N+1
Real value containing the numeric representation of the extended status of the monitored DADIG (function code 211) block specified by
S1, S2, S3 and S4 currently in use.
The extended status and alarm detection modes may be converted into individual logic level by configuration of real demultiplexers
(function code 126). Table 212-1 is a decoded extended status bit map.
Table 212-1 Decoded Extended Status Bit Map
Binary
Bit Attribute
Value
0 1 Spare
1 2 Spare
2 4 Spare
3-4 0 00 Primary input selected, <S3>
8 01 Primary input selected, <S3>
16 10 Custom inserted input selected, <S5>
8+16 11 Alternate input selected, <S4>
5 32 Permit input select enabled
6 64 Quality is being overridden
7 128 Reported logic state and extended status are latched
8 256 Output value
9 512 E-STOP
10 1024 No report mode enabled
11 2048 Output suspect
12 4096 Alarm suppression indication
13 8192 Return alarm (toggled)
14 16384 Alarm state
15 32768 Hardware failure/bad quality
Bits 0 through 2
Unused.
Bits 3 through 4
The mode field indicates which of the three possible DADIG (function code 211) inputs are currently selected through the DADIG input
select block input <S1> to be routed to the DADIG reported logic state output N.
Bit 5
The permit input selection field indicates the state of the monitored DADIG blocks permit input select input <S2>.
Bit 6
The quality overridden field indicates when the monitored DADIG blocks quality is being overridden through the DADIG quality override
block input <S14>.
Bit 7
When the monitored DADIG block alarm state latch function is enabled through the DADIG alarm state latch enable input <S15>, this
212-2 2VAA000844R0001 J
212. Data Acquisition Digital Input/Loop Outputs
field indicates when the outputs are latched.

Bit 8
This field contains the state of the DADIG blocks reported logic output N.
Bit 9
The E-STOP field indicates when the monitored DADIG block is execute stopped through a HSI or when the E-STOP state is being forced
through the DADIG quality override block input <S14>.
Bit 10
The no report field indicates when the monitored DADIG block has been placed in no report mode through the DADIG block input select
<S1> or through a HSI command.
Bit 11
The output suspect quality indication is set through the monitored DADIG block quality override block input <S14>.
Bit 12
This field is the monitored DADIG block alarm suppression indication. This bit can be set by two of the monitored DADIG block functions
(on alarm suppression and by de-alarm).
1. For alarm suppression, this bit can operate in one of two modes selected by the DADIG alarm mode control
<S9>, bit 8.
• If bit eight of DADIG <S9> equals zero, this indication will be set when alarm suppression is selected and
enabled.
Alarm suppression is selected through the DADIG alarm mode control <S9>. Alarm suppression is enabled
through either the DADIG alarm suppression enable block input <S13> or a HSI command sent to the DADIG
block.
• If bit eight of DADIG <S9> equals one, this indication will be set when the alarm suppression function is
suppressing an alarm.
2. For de-alarm, this bit will be set when an alarm is being de-alarmed.
Bit 13
The return alarm indication toggles each time the monitored DADIG blocks alarm is returned. Return alarm is enabled through the DADIG
alarm mode control <S9> and uses the return alarm/de-alarm time period reference <S12>.
Bit 14
The alarm field is set when the alarm is selected through the DADIG blocks alarm mode control <S9> and an alarm condition exists at
the monitored DADIG block.
Bit 15
The quality indication is set to indicate when the DADIG block is bad quality. Quality reflects the quality of the selected DADIG block input
<S3>, <S4> or <S5> and can be forced bad (set), or forced good (cleared) through the DADIG quality override block input <S14>. This
field also will be set if an error exists in the link between the DADIG I/L and DADIG blocks.
2VAA000844R0001 J 212-3
Outputs 212. Data Acquisition Digital Input/Loop
212-4 2VAA000844R0001 J
215. Enhanced Analog Slave Definition Explanation
215. Enhanced Analog Slave Definition

EA SD
S3 (2 1 5 )
C JI C JR
S2 A IB ST
CT
The enhanced analog slave definition function code (EASD) defines an IMASI13/IMASI23/SPASI23 (ASIxx) universal analog slave
module to a Harmony controller. For more information, refer to the appropriate ASIxx module instruction. This block defines common
specifications for ASIxx modules. Individual input function code 216 blocks are linked to this block to define channels available on the
ASIxx module.
The control system must be carefully evaluated to establish default values that will
WARNING
prevent personal injury and/or property damage in case of module failure.
Outputs
N R Cold junction reference temperature in C
N+1 B I/O module status: 0 = good, 1 = bad
N+2 R Input scan cycle time (secs)
Specifications
S2 N 2 I Note 1 Block address of first enhanced analog input

definition (function code 216)
S3 N 5 I Note 1 Block address of cold junction reference input
S4 N 0 I 0 or 1 I/O module failure action:

S5 N 0 I 0 or 1 Normal mode rejection type:

0 = 60 Hz
1 = 50 Hz
S6 N 0.000 R Full Length (in ft) of termination device cable
S7 N 0 I Full Spare
S8 N 0 I Full Spare

NOTE:
215.1 Explanation
S1
I/O module expander bus address of the ASIxx module.
2VAA000844R0001 J 215-1
Outputs 215. Enhanced Analog Slave Definition
S2
Points to the block address of the first enhanced analog input definition (function code 216) function block. Each function code 216
configures one of the channels on the ASIxx module.
NOTE: Block addresses and channel numbers can be linked in any order.
S3
Contains the block address of the cold junction reference temperature. The value specified by the block address must be in degrees
Celsius. This is used for compensation of thermocouple inputs. Specification S3 normally refers to the address of the function code 215
output block N which directs the ASIxx module to use the local cold junction reference available on the termination device. Figure 215-1
is an example of local cold junction compensation.
NOTE: Specification S3 normally refers to EASD blocks. It can reference any function code.
Specification S3 can also refer to the address of the block output used for remote cold junction reference. Figure 215-2 is an example of
remote cold junction compensation.
S4
Identifies the action to be taken in the event of a failure of the ASIxx module.
S5
Identifies the dominant noise frequency rejected during the analog to digital conversion operation.
0 = 60 hertz
1 = 50 hertz
S6
Length of the cable (in feet) between the termination device and the I/O module. The I/O module uses this to compensate the measured
input value for the effects of resistance in the cable.
S7, S8, S9, and S10

Spares
215.1.2 Outputs
N
Temperature in degrees Celsius of the cold junction reference for thermocouple inputs as measured by the built in RTDs on the
termination device of the ASIxx module.
N+1
Indicates if a failure of the ASIxx module is detected.
0 = good
1 = failed I/O module
N+2
Represents the amount of time between successive updates of an individual channel input value and quality. This is the total scan time
of all points defined for the I/O module.
215-2 2VAA000844R0001 J
215. Enhanced Analog Slave Definition Applications
215.2 Applications
Figure 215-1 is a typical example of local cold junction compensation. Tables 215-1, 215-2, 215-3 and 215-4 explain the specification
settings for the blocks used in Figure 215-1.
TE R M IN ATIO N
D EV IC E
(T H E IM A S I13 R E Q U IR E S E ITH E R O N E
N TA I06 T ER MIN ATI O N UN IT O R T W O
N I A I05 T E R M IN AT IO N M O D U LE S ) IM A S I1 3
TYP E E
TH ER M OC O U PLE 20 
+
30 
– AI 1 AI 1
C
AI 2
-1 0 0 0 
+ +
TO 0  AI 3
– – AI 2
+100 m V
C AI 4
+ AI 5
– AI 3 C ABL E
AI 6
(1 0 F T )
C
AI 7
AI 8
(S E E
IN T H IS E X A M P L E NOT E)
AI 9
IN P U T C H A N N E L S
3 TH RO U G H 15 EASD
A I 10 S3 (215)
AR E N OT U S ED C JI C JR
S2 1 00
A I 11 A IB ST
1 01
A I 12 CT
1 02
+
– A I 15 A I 13 S1 =1 I/O M O D U LE A D R
S4 =1 FA ILUR E AC T IO N (0 = T R IP, 1 = C O N T IN U E )
C A I 14 S5 =0 N O R M A L M O D E R E JE C T IO N T Y P E
(0 = 60 H z, 1 = 50 H z)
-0 .0 9 4 T O + 1 V 7  +
+ A I 15 S6 = 1 0.0 T U C A B LE LE N G TH ( ft)
7  S7 = 0 S PA R E
– – A I 16 S8 = 0 S PA R E
A I 16 S9 = 0 .0 S PA R E
C
S 10 = 0 .0 S PA R E
O F F -PA G E
CO N NE CTO R
TO C O N T R O L
L O G IC
S2 (2 1 6 )
E A ID
11 0
S2 (2 1 6 )
E A ID
90 S1 = 1 I/O MO D U LE A D R
S3 = 1 I/O MO D U LE IN P U T C H A N N E L N O .
S4 = 3 IN P U T S IG N A L T Y P E
S1 = 1 S LAV E A D R S5 = 0 E U C O N V E R S IO N T Y P E (0 = °C, 1 = °F )
S3 = 2 S LAV E IN P U T C H A N N E L N U M S6 = 0 .0 E U Z ER O O F IN P UT
S4 = 60 IN P U T S IGN A L T Y P E S7 = 0 .0 E U S PA N O F IN P U T
S5 = 0 E U C O N V E R S IO N T Y P E (0 = °C, 1 = °F ) S8 = 0 .0 IN P U T S IG N A L R A N G E LO W LIM IT
S6 = - 100.0 E U Z ER O O F IN P U T S9 = 0 .0 IN P U T S IG N A L R A N G E H IG H LIM IT
S7 = 2 00.0 E U S PA N O F I N P U T S 10 = 5 0.0 LE A DW IR E R E S IS TA N C E (W )
S8 = 0 .0 IN P U T S IGN A L R A N G E LOW LI M IT S 11 = 22 A /D CO N V E R S IO N R E S O LU T IO N ( N O. O F B IT S )
S9 = 0 .0 IN P U T S IGN A L R A N G E H IG H LIM IT S 12 = 0 S PA R E
S 10 = 0 LE A D W IR E R E S IS TA N C E (W ) S 13 = 0 S PA R E
O F F -PA G E
S 11 = 20 A /D C O N VE R S IO N R E S O LU T IO N (N U M B IT S ) S 14 = 0 .0 S PA R E
S 15 = 0 .0 S PA R E CO N NE CTO R
S 12 = 0 S PA R E
S 13 = 0 S PA R E TO C O N T R O L
S 14 = 0 .0 S PA R E L O G IC
S 15 = 0 .0 S PA R E
O F F -PA G E
CO N NE CTO R
TO C O N T R O L
L O G IC
S2 (2 1 6 )
E A ID
12 5
S1 = 1 I/O M O D U L E AD R
S3 = 16 I/O M O D U L E IN P U T C H A N N E L N O.
S4 = 99 IN P U T S IG N A L T Y P E
S5 = 0 E U C O N V E R SI O N T Y P E (0 = °C, 1 = °F )
S6 = 10.0 E U Z E R O O F IN P U T
S7 = 90.0 E U S PA N O F IN P U T
S8 = -0.094 IN P U T S IG N A L RA N G E LOW L IMI T
S9 = 1.0 IN P U T S IG N A L RA N G E H IG H LIM IT
S 10 = 14.0 LE A DW IRE R E S IS TA N C E (W )
N O T E : C O N N E C T IO N S TO F C 2 1 6 ’S F O R P O IN T S 3 -1 5 S 11 = 18 A /D C O N V E R S ION R E S O LU T IO N (N O. O F B IT S )
S 12 = 0 S PA R E
N O T U S E D. (T Y P IC A LLY A F C 2 1 6 IS R E S E R V E D F O R S 13 = 0 S PA R E
E A C H P O IN T A N D L IN K E D IN T H E C H A IN E V E N IF S 14 = 0.0 S PA R E
N O T U S E D.) S 15 = 0.0 S PA R E T 04180A
Figure 215-1 Local Cold Junction Compensation
Table 215-1 Function Code 216 at Block Address 90
S1 1 I/O module address 1, set on the ASIxx
S2 125 Points to the block address of the next function code 216 in the link (the default
value of 2 signifies the final function code 216 in the link)
S3 2 ASIxx module input channel number 2
2VAA000844R0001 J 215-3
Applications 215. Enhanced Analog Slave Definition
Table 215-1 Function Code 216 at Block Address 90 (Continued)
S4 60 Channel 2 (refer to S3) is configured to be connected to a -100 mV to +100 mV

input source
S5 0 Not used when S4 is configured as a voltage or current input type
S6 -100 The zero in engineering units is a value of -100.0
S7 200 The span in engineering units is a value of 200
S8 0 Only used when S4 is configured as a custom voltage input type
S9 0 Only used when S4 is configured as a custom voltage input type
S10 0 The wire from the millivolt source input to the ASIxx termination device has a
resistance of 0  or the resistance is considered negligible
S11 20 Conversion resolution is 20 bits
S2 110 Points to the block address of the first function code 216 in the link
S3 100 Points to block output N of this function code 215. This is the cold junction
reference temperature in C measured at the termination device of this ASIxx
S4 1 Continue to operate control module on an I/O module failure
S5 0 Rejects ambient 60 Hz interference (set this specification to the line voltage

frequency used in the country of operation)
S6 10 The cable from the ASIxx to the termination device is 10 ft in length
S4 3 Channel 1 (refer to S3) is configured to be connected to a type E thermocouple
S5 0 The output of channel one is displayed in C
S6 0 Not used when S4 is configured as thermocouple input type
S10 50 The wire from the thermocouple to the ASIxx termination device has a resistance
of 50 
215-4 2VAA000844R0001 J
S3 16 ASIxx input channel number 16
S4 99 Channel 16 (refer to S3) is configured to be connected to a custom defined

voltage input source
S5 0 Not used when S4 is configured as a voltage or current input type
S6 10 The zero in engineering units is a value of 10
S7 90 The span in engineering units is a value of 90
S8 -0.094 The low range of the input voltage is -0.094 V
S9 1.0 The high range of the input voltage is 1 V
resistance of 14 
2VAA000844R0001 J 215-5
Remote cold junction reference inputs automatically use the on-board cold junction reference for thermocouple compensation. Figure
215-2 shows a typical example of remote cold junction compensation. Tables 215-5, 215-6 and 215-7 list the specification values and
descriptions for Figure 215-2.
EASD
S3 (2 15)
CJI CJ R
S2 25 0
A IB ST
25 1
CT
25 2
S1 =6 I/O M O DU LE A DR
REM OTE S4 =1 FAILU RE AC TION
T E R M IN A L B L O C K T E R M IN AT IO N (0 = TR IP M FP, 1 = C ON TINU E )
D E V IC E S5 = 0 NO R M A L M O D E RE JE CT IO N TY P E
TY PE J (0 = 60 H z, 1 = 50 Hz )
(T HE IM A SI1 3 RE QU IR ES S 6 = 6.0 TU C AB LE L EN G TH (ft)
TH E RM O CO U PL E E IT HE R ON E N TAI06 S7 = 0 SPAR E
T ER M IN ATION U NIT O R S8 = 0 SPAR E
T W O N IAI05 TE R M INATIO N S 9 = 0.0 SPAR E
6 6 PL AIN W IRE M O D UL ES ) IM A S I1 3 S 10 = 0.0 SPAR E
OF F-PAG E
8 C ON N EC TOR
+ TO CO N TR OL
8 AI 1
– AI 1 L OG IC
S2 (2 16 )
C AI 2 E A ID 1 75
+ AI 3
– AI 2
S1 = 6 I/O M O DU LE A DR
C AI 4
S3 = 1 I/O M O DU LE IN P UT C HA N NE L N O.
AI 5 S4 = 4 IN PU T SIG N AL T YP E
+ S5 = 1 EU C O NV ER S IO N T Y PE (0 = °C, 1 = °F)
– AI 3 AI 6 S6 = 0 .0 EU Z ER O OF IN P UT
C CA B LE S7 = 0 .0 EU S PA N OF IN P UT
(1 0 F T) AI 7 S8 = 0 .0 IN PU T SIG N AL R AN G E L OW L IM IT
S9 = 0 .0 IN PU T SIG N AL R AN G E H IG H LIM IT
AI 8 S1 0 = 2 8.0 LE A DW IR E RE S IS TAN C E (W )
S1 1 = 24 A/D CO NV E RS IO N RE SO L UT IO N (NO. BITS )
IN T HIS E X AM P LE AI 9 S1 2 = 0 SPAR E
IN P UT C HA NN E LS
S1 3 = 0 SPAR E
3 T HR OU G H 1 5 AI 10
S1 4 = 0 .0 SPAR E
AR E N OT U S ED
AI 11 S1 5 = 0 .0 SPAR E
AI 12 CO N NE CT IO NS TO F C2 16 s F O R P O IN TS 2-15 N OT U SE D.
+ (TY P ICA L LY A F C2 16 IS R ES ERV ED F OR E ACH P O INT
AI 13 AN D LIN K ED IN T HE C HA IN E VE N IF NOT U SE D.)
– AI 1 5
C AI 14
OF F-PAG E
7 C ON N EC TOR
+ AI 15
7 TO CO N TR OL
– AI 1 6
AI 16 L OG IC
C S2 (21 6)
E A ID 16 2
TY PE T
TH ER M OC O UP LE
S1 = 6 I/O M O DU LE A DR
S3 = 16 I/O M O DU LE IN P UT C HA N NE L N O.
S4 = 1 06 IN PU T SIG N AL
S5 = 0 EU C O NV ER S IO N T Y PE (0 = °C, 1 = °F)
S6 = 0 .0 EU Z ER O OF IN P UT
S7 = 0 .0 EU S PA N OF IN P UT
S8 = 0 .0 IN PU T SIG N AL R AN G E L OW L IM IT
S9 = 0 .0 IN PU T SIG N AL R AN G E H IG H LIM IT
S1 0 = 14 LE A DW IR E RE S IS TAN C E (W )
S1 1 = 16 A/D CO NV E RS IO N RE SO L UT IO N (NO. BITS )
S1 2 = 0 SPAR E
S1 3 = 0 SPAR E
S1 4 = 0 .0 SPAR E
S1 5 = 0 .0 SPAR E T 04 18 1A
Figure 215-2 Remote Cold Junction Compensation
S3 1 ASIxx input channel number 1
S4 4 Channel 1 (refer to S3) is configured to be connected to a type J thermocouple
S5 1 The output of channel 1 is displayed in F
S6 - S9 0 Not used when S4 is configured as a thermocouple input type
215-6 2VAA000844R0001 J
S4 106 Channel 5 (refer to S3) is configured to be connected to a type T thermocouple

In this example, this thermocouple measures the ambient temperature of the
remote termination device where the type J thermocouple (at block address 201)
is terminated.
When an input type (S4) is specified to be a value greater than 100, this thermo-
couple uses the on-board cold junction reference for compensation and its out-
put value is filtered which acts to slow its response time.
S5 0 The output must be in C when using this channel as a remote cold junction
reference
S6 - S9 0 Not used when S4 is configured as a thermocouple input type
S2 175 Points to the block address of the first function code 216 in the link
S3 162 Points to block output address of the sensor (a type T thermocouple) used as the
cold junction reference at the remote thermocouple termination device
S4 1 Continue to operate control module on an I/O module failure
S5 0 Rejects ambient 60 Hz interference (set this specification to the line voltage fre-
quency used in the country of operation)
S6 6 The cable from the ASIxx to the termination device is 6 ft in length
2VAA000844R0001 J 215-7
215-8 2VAA000844R0001 J
216. Enhanced Analog Input Definition

The enhanced analog input definition (EAID) function code specifies an input to an IMASI13/IMASI23/SPASI23 (ASIxx) Isolated Analog
Input Module. This must be configured in the same segment as the enhanced analog module definition (function code 215) which
references it. For more information, refer to the appropriate ASIxx module instruction.
The EAID function code reads a single analog input from an ASIxx module. Up to 16 EAID blocks may be configured per module.
To calibrate an ASIxx module, it is necessary to install one function code 216 for each input channel.
Outputs

EA ID
N R Analog input value and quality (specified in engineering units)
Specifications
S2 N 2 I Note 1 Block address of next EAID block
S3 N 1 I 1 - 16 Module input channel number
S4 N 1 I Full Input signal type:

0 = invalid (do not use)
x01 = type S thermocouple
x02 = type R thermocouple
x03 = type E thermocouple
x04 = type J thermocouple
x05 = type K thermocouple
x06 = type T thermocouple
x07 = Chinese type E thermocouple
x08 = Chinese type S thermocouple
x09 = type L thermocouple
x10 = type U thermocouple
x11 = type N (14 AWG) thermocouple
x12 = type N (28 AWG) thermocouple
x13 = type B thermocouple (firmware
revision C_0 and above)
2VAA000844R0001 J 216-1
S4 N 1 I Full x20 = U.S. laboratory standard 100  platinum

(cont.) RTD (TCR = 0.003926)
x21 = U.S. industrial standard 100  platinum
RTD (TCR = 0.003911)
x22 = European standard 100  platinum RTD
(TCR = 0.003850)
x23 = 120  chemically pure nickel RTD
(TCR = 0.00672)
x24 = 10  copper RTD (TCR = 0.00427)
x25 = Chinese 53  copper RTD
x40 = +1 V to +5 V, 4 mA to 20 mA (Do not use
for ASIxx)
x41 = -10 V to +10 V
x42 = 0 V to +10 V
x43 = 0 V to +5 V
x44 = +1V to +5V (ASIxx only)
x60 = -100 mV to +100 mV
x61 = 0 mV to +100 mV
x99 = user specified voltage range (min. -10 V,
max. +10 V)
where:
x = 0; normal input. Specification S3 of function
code 215 will be used as the cold junction refer-
ence for thermocouple inputs.
x = 1; this input is a remote cold junction reference
and may be used as the cold junction reference for
other thermocouple inputs. When x = 1:
1. A moving average filter will be applied to block
output N. This slows the response time of the
input channel.
2. If the input type is a thermocouple, S3 of func-
tion code 215 will be ignored and the on-board
cold junction reference of the ASIxx module will
be used to compensate this thermocouple input
(if the thermocouples used as remote cold junc-
tion references are terminated directly on the
ASIxx module termination unit).
S5 N 0 I 0 or 1 Engineering unit conversion type:

0 = °C
1 = °F
S6 Y 0.000 R Full Engineering unit zero for input
S7 Y 0.000 R Full Engineering unit span for input
S8 N 0.000 R Full Custom range low limit (in V)
S9 N 0.000 R Full Custom range high limit (in V)
S10 N 0.000 R Full Lead wire resistance (in )
S11 N 16 I 16 - 24 A/D conversion resolution. Set to 24 for ASIxx.
216-2 2VAA000844R0001 J
216. Enhanced Analog Input Definition Explanation

NOTE:
216.1 Explanation
S1
Expander bus address of the ASIxx module.
S2
Block address of the next EAID block describing one of the channels on the module. A value of two indicates this is the end of the link list.
NOTE: Block addresses and channel numbers can be linked in any order.
S3
Number of the input channel on the module described by the EAID block.
S4
Defines the input signal type of the input from the ASIxx module.
If an input signal that specifies a defined range (e.g., +1 volt to +5 volts) goes five percent outside of its range, the input signal is marked
as bad quality with a status out of range.
For calibration of the ASIxx module, the calibration type defined in S4 of function code 217 must be consistent with the input signal type
defined in S4 of function code 216. Consider the following examples.
Example 1
If calibrating a channel for millivolts or thermocouples, then S4 of function code 217 must be set to 0 and S4 of function code 216 must
be set to any one of the millivolt or thermocouple input types. In this case, S4 of function code 216 must be within the following:
x01 S4  x20

or
x60 S4  x99
Example 2
If calibrating a channel for high level voltage, then S4 of function code 217 must be set to 1 and S4 of function code 216 must be set to
one of the high level voltage ranges (4 to 20 mA is considered high level input type). In this case, function code 216 should be within the
following:
x40 S4  60
or
S4  x99
Example 3
If calibrating a channel for RTD mode, then S4 of function code 217 must be set to 2 and S4 of function code 216 must be set to any one
of the RTD types. In this case, S4 of function code 216 should be within the following range:
x20 S4  x40
S5
Defines the type of temperature unit conversion to be performed on the input signal. If S4 indicates other than a thermocouple or RTD
type, then S5 is ignored, and S6 and S7 are used to convert to engineering units.
S6
Defines the low value (zero) of the input in engineering units. This value corresponds to the input signal range identified in S4. This
2VAA000844R0001 J 216-3
Outputs 216. Enhanced Analog Input Definition
specification is ignored if the input type (S4) is a thermocouple or RTD.
S7
Defines the span of the input in engineering units. The span plus the zero yields the output of the block at full signal range. This
specification is ignored if the input type (S4) is a thermocouple or RTD.
S8
Ignored unless the input signal type (S4) indicates a custom voltage range. In that case, this specification defines the lower limit of the
range in volts.
S9
Ignored unless the input signal type (S4) indicates a custom specified voltage range. In that case, this specification defines the upper
limit of the range in volts.
S10
Resistance (in ohms) of the field input lead wire from the input to the termination device. This value corrects the value of the input signal.
For millivolt and thermocouple inputs, lead wire resistance is the sum of the resistance in both the plus and minus leads. For three-wire
RTD inputs, lead wire resistance is the resistance in any one of the three leads (the resistance of each wire must be equal). This value
is ignored for high level input types.
S11
Resolution of the analog to digital conversion for each independent channel. This specification specifies the resolution as the number of
bits in the binary representation of the raw input value when it is scanned by the input module. The resolution should be set to 24 bits for
the ASIxx module. This will set the conversion time to 180 msecs for all 16 channels.
216.1.2 Outputs
Output N
Analog input value:
• High level input - reading (in engineering units based on S6 and S7) automatically adjusted for drift, and input
channel nonlinearities.
• RTD input - reading (in degrees as specified in S5) automatically adjusted for drift, lead wire resistance and input
channel nonlinearities.
• Thermocouple input - reading (in degrees as specified in S5) automatically adjusted for drift, lead wire resistance,
cold junction temperature and input channel nonlinearities.
• Millivolt input - reading (in engineering units based on S6 and S7) automatically adjusted for drift, lead wire
resistance and input channel nonlinearities.
Quality of Output N
Marked bad if one of the following conditions exist:
• Input reading is out of range.
• Channel hardware has failed.
• Open circuit.
• Input channel has not been calibrated.
• Input channel is disabled.
• Input channel has not been properly configured.
A thermocouple channel indicates bad quality if the cold junction reference chosen for compensation shows bad quality.
216.2 Applications
Refer to the section titled Applications of function code 215.
216-4 2VAA000844R0001 J
217. Enhanced Calibration Command Explanation
217. Enhanced Calibration Command

The enhanced calibration command function code (ECC) permits calibration and diagnostic testing of the IMASI13/IMASI23/SPASI23
(ASIxx) universal analog input module.
The operator initiates, guides and terminates a calibration or diagnostic sequence with this enhanced calibration command function code.
Commands are entered by tuning this block. The status of the command may be determined by examining S1 after the tune operation is
completed. If S1 is zero after tuning function code 217, an error has occurred.
Before beginning calibration, each channel must be configured with one function code 216, and the calibration type defined in S4 of
function code 217 must be consistent with the input signal defined in S4 of function code 216.
A detailed description of any command errors is provided as an output (N+4) to this function block. This output reflects the status of the
most recently issued calibration command.
Errors encountered during calibration of a particular channel are also reported as an output (N+1) to this function block. This output
reflects the status for the channel referenced in the most recent command. For more information, refer to the appropriate ASIxx module
instruction.
Outputs

EC C
(2 1 7 )
V
N
N R Uncorrected value of input signal
C H -S T
N+1
G
N+2 N+1 R Channel calibration status
O
N+3
C O M -S T
N+4 N+2 R Custom gain adjustment
N+3 R Custom offset adjustment
N+4 R Calibration command status
Specifications
S1 Y 0 I 0 - 255 Calibration operation code
S2 Y 0 I Note 1 Block address of function code 215 used to config-

ure input module
S3 Y 0 I Full Input module channel number
S4 Y 0 I 0-2 Calibration type:

0 = low level (millivolt, thermocouple)
1 = high level
2 = RTD
S5 Y 0.000 R Full Calibration parameter 1
S6 Y 0.000 R Full Calibration parameter 2
S7 N 0 I Full Spare

NOTE:
217.1 Explanation
S1
Tuned to the proper command code for the calibration operation to be performed. Specification S1 is returned as a zero in the event of
a calibration command error, and must be changed before sending another calibration command to the module. Specification S1 is
2VAA000844R0001 J 217-1
Specifications 217. Enhanced Calibration Command
unchanged if calibration command processing is successful.

1. Disable point - removes a channel from normal input scan processing. A point must be disabled before
performing a point calibration command to prevent calibration related data from being interpreted as process
data by the rest of the system. Calibration should only be performed using precision voltage or resistance
sources applied at the terminal blocks. In addition, before a point can be successfully disabled, the point must
first be configured with a function code 216.
2. Perform point calibration using external reference - the precision voltage or resistance source must be
connected prior to issuing this command. Before a successful point calibration can be implemented, the
calibration type defined in S4 of function code 217 must be consistent with the input signal type defined in S4 of
function code 216. Refer to the specific examples under the S4 explanations in this function code. Also refer to
the calibration section of the appropriate ASIxx product instruction.
3. Enable point - terminates the field calibration sequence for an input channel type. A point must be enabled
before normal input processing can occur. Selected gain and offset values will be reset to 1.0 and 0.0,
respectively, if a successful calibration has been performed.
4. Point escape - resets (clears) calibration point information for a particular channel in the middle of a calibration
sequence. It clears only the point data. This allows a restart of a calibration procedure for the specified channel.
The point escape command does not enable the channel.
5. Set custom gain and offset adjustment - allows a linear adjustment factor to be entered. This will be applied to
the input signal after all drift and nonlinearity corrections, but before conversion to engineering units. This value
is applied to low level, high level and resistance values.
6. Reset custom gain and offset adjustment - cancels any previously entered custom gain and offset adjustment
for the specified input channel type. After issuing this command, the gain for the input channel type is one and
the offset is zero.
7. Display uncorrected point data (percent of positive full scale) - performs no operation other than to update
the uncorrected output data value for the specified input channel (block output N of function code 217).
8. Update point data - causes a new scan of the specified input channel to be performed and the output data
value of the block to be updated with the new uncorrected value.
9. Input module escape command - performs point escape command to all 16 channels and cold junction
reference on the ASIxx module.
10. Expander bus test command - performs single test of expander bus between the module and the secondary
input module. The test verifies transmission, reception and data integrity of messages passed between the
module and the secondary input module (intended as an additional diagnostic for the input module bus
interface). This operation can be performed with a local or remotely configured ASIxx module. This test can be
performed on-line.
11. Restore factory calibration command - overwrites the field calibration data in NVRAM with the original factory
calibration parameters. This command also resets any values entered by the set custom gain and offset
command.
S2
Identifies the block address of the EASD block (function code 215) that identifies which input module is referred to by the command
specified in S1.
S3
Identifies the module input channel number of the applicable command specified in S1.
S4
Identifies the type of calibration performed.
0 = low level (millivolt, thermocouple)
1 = high level
2 = RTD
For calibration of the ASIxx module, the calibration type defined in S4 of function code 217 must be consistent with the input signal type
defined in S4 of function code 216. Consider the following examples.
Example 1
If calibrating a channel for millivolts or thermocouples, then S4 of function code 217 must be set to 0 and S4 of function code 216 must
be set to any one of the millivolt or thermocouple input types. In this case, S4 of function code 216 must be within the following:
x01 S4  x20

or
x60 S4  x99
217-2 2VAA000844R0001 J
217. Enhanced Calibration Command Outputs
Example 2
If calibrating a channel for high level voltage, then S4 of function code 217 must be set to 1 and S4 of function code 216 must be set to
one of the high level voltage ranges (4 to 20 mA is considered high level input type). In this case, function code 216 should be within the
following:
x40 S4  60
or
S4  x99
Example 3
If calibrating a channel for RTD mode, then S4 of function code 217 must be set to 2 and S4 of function code 216 must be set to any one
of the RTD types. In this case, S4 of function code 216 should be within the following range:
x20 S4  x40
S5
Used for channel input type calibration and changing the custom gain and offset value. Calibration parameter one provides a real value
dependent upon the type of command S1 specifies.
When S1 equals two, point calibration, this parameter specifies the true value of the signal applied to the input channel during the
calibration operation. Enter an S5 value for each calibration point. Up to 11 points may be identified for adjustment of input channel
nonlinearities, resulting in ten linear segments for correction. These calibration points may be applied in any order. The units for the point
value are determined by the type of calibration operation specified in S4.
For example,
Low level = -100 millivolts to +100 millivolts
High level = -10 volts to +10 volts
RTD = 5 ohms to 500 ohms
When S1 equals five, specified gain and offset applications, S5 specifies the gain and S6 specifies the offset. When the ASIxx module
is shipped, the default value for gain is set to one and the default value for offset is set to zero. This command (S1 equals five) sets both
the gain and offset parameters simultaneously each time it is entered.
The gain, or slope, is the linear correction to be applied. Both gain and offset adjustments are changed at one time.
S6
Used to specify an offset for the custom gain and offset command (S1 equals five). It provides a real value dependent upon the type of
command specified in S1.
This parameter specifies the offset of the linear correction to be performed. The units for the offset value are determined by the type of
calibration operation specified in S4. For example:
Low level = -100 millivolts to +100 millivolts
High level = -10 volts to +10 volts
RTD = 5 ohms to 500 ohms
217.1.2 Outputs
N
Uncorrected value of the input signal. This output gives the value of the input signal without any of the calibration, drift, lead wire, or cold
junction compensations applied. The raw digitized value is converted to a range of -100 to +100.
N+1
Channel calibration status. This output gives the detailed status of the last calibration operation performed on the specified channel.
0 = channel calibration command was successful
2VAA000844R0001 J 217-3
Outputs 217. Enhanced Calibration Command
217-4 2VAA000844R0001 J
218. Phase Execution
218. Phase Execution

The phase execution (PHASEX) function code provides the execution environment for a Batch 90 program that is interfaced to the
Symphony Batch Management software. A Batch 90 program is comprised of all the phases that can be run on a specific class of
equipment. The program is created, compiled and downloaded to the controller using the Batch Data Manager option of Composer.
Recipes define the order in which the Batch 90 phases are executed (the procedure) and the specific formulation values such as target
flow rates, temperatures and times.
In this batch execution model, recipes are created and run using the Symphony batch management software. The batch manager sends
the phase name and formulation data of the active phase in the recipe to the PHASEX function block and issues a start command. The
PHASEX block executes the phase logic. The batch manager monitors the state of the PHASEX block and then automatically transitions
to the next phase defined in the recipe when the complete state is detected for the phase.
PHASEX blocks can be linked to allow the simultaneous execution of parallel phases. A single PHASEX block and its associated Batch
90 program is used to control an equipment module. Linked PHASEX blocks and their associated Batch 90 programs are used to control
a unit.
Outputs

PHASEX
S1 L EA D
(21 8 ) N R Current state (enumerated value)
B LO C K STAT E N
S2 P H AS E
S PA R E
S3
S PA R E
ID
F LT
N+ 1 N+1 E90 string Current phase ID
CODE N+ 2
S4
S PA R E AB O RT
N+ 3
S5
A B O RT AQ RD
S TAT
N+2 R Fault code
N+ 4
SPA R E
N+ 5
SPA R E
N+ 6 N+3 B Abort
SPA R E
N+ 7
N+4 B Acquired status
N+5 R Spare
N+6 R Spare
N+7 B Spare
Specifications
Spec Tune Default Type Description
S1 N 5 I Lead PHASEX block
S2 N 6 I Spare input
S5 N 0 I Block address of abort phase trigger
S6 N 0 R Spare parameter
S7 Y 0 R Spare parameter
S8 Y 0 R Spare parameter
S9 Y 0.0 R Batch program ID number
S10 Y 1 I Debug operation
S11 N 1.0 R RAM allocation for program object file (1k byte increments)
S12 N 1000 R RAM allocation for phase data (1 byte increments)
2VAA000844R0001 J 218-1
Explanation 218. Phase Execution
218.1 Explanation
S1
(Lead PHASEX block) Block number of the lead PHASEX block. Several PHASEX blocks associated with the same equipment unit
should reference the same lead PHASEX block. The lead PHASEX block must have this input connected to block 5. Other PHASEX
blocks should connect this input to the first output of the lead PHASEX block.
S2 through S4
Spare inputs.
S5
(Abort phase trigger) A zero to one transition transfers to the abort phase. Once started, the abort phase must run to completion. Once
the abort phase is completed, the state changes from aborting to aborted. The aborted state can not be cleared until this input is reset to
zero. The abort input acts in parallel with the batch manager command to abort. Only the lead PHASEX block can have this input
connected. Any linked PHASEX block that is not the lead must leave this specification at default value. Otherwise, it will cause a controller
configuration error.
0 = released
1 = abort
S6 through S8
Spare parameters.
S9
(Batch program ID number) Defines the ID number of the batch program that the PHASEX block will execute. The program ID number
is specified in the batch program by the compiler directive #PROGRAMID. Only the lead PHASEX block will use this specification.
S10
(Debug operation) Sets the debugger state:
1 = phase executes normally.
1000 = debug stop (A transition to 1000 causes a debug stop command to be issued). This freezes execution at
the current statement of the active logic section.
1001 = debug go (A transition to 1001 causes a debug go command to be issued). This resumes execution of
the active logic section from the statement number the phase was frozen on (debug stopped).
9000 = debug stop at start. Causes the phase being activated to begin execution in the debug stopped state.
S11
(RAM allocation for program object file) Value indicates RAM allocation in one-kilobyte increments. This specification can not be
changed during online configuration. The range is determined by the amount of RAM in the controller. The minimum amount of memory
required to run the program is given at the end of the Batch 90 program’s list file. The minimum RAM required to allocate in the controller
is also the size of the program .OBJ file. Only the lead PHASEX block will use this specification.
S12
(RAM allocation for data table) Value indicates RAM allocation in one-byte increments. This specification value can not be changed
during online configuration. The range is determined by the amount of RAM in the controller. The minimum amount of memory required
to run the program is given at the end of the Batch 90 program’s list file. This memory is used to store run-time data (batch data, unit
data, parameter values) as well as the phase data message. All linked PHASEX blocks should have the same value of S12.
218.1.2 Outputs
N
Current state of the PHASEX block. The state is represented by the following values:
0 = idle
1 = running
2 = complete
3 = pausing
4 = paused
5 = holding
6 = held
7 = restarting
218-2 2VAA000844R0001 J
218. Phase Execution Run-Time Fault Codes
8 = stopping
9 = stopped
10 = aborting
11 = aborted
N+1
Phase ID of the running phase or the previous phase run (if state is complete).
N+2
Fault code:
0 = none
positive = user defined faults
negative = system detected run-time faults
N+3
Execution has been aborted
0 = not aborting or aborted
1 = PHASEX block is in aborting or aborted state
N+4
PHASEX block is acquired. Set by the acquire command and reset by the release command.
0 = available
1 = acquired
N+5
Spare float output.
N+6
Spare float output.
N+7
Spare Boolean output.
218.1.3 Run-Time Fault Codes
The PHASEX function block executes a series of diagnostic tests that detect errors that cannot be detected by the compiler. The fault
codes can be seen using the batch debugger or by viewing the PHASEX block output (N+2). The errors are detectable only while the
controller is in execution and are, therefore, called run-time errors. Most of the PHASEX fault codes are common with the BSEQ block
(function code 148) fault codes. Table 218-1 lists the possible error codes and an explanation of each.
Table 218-1 PHASEX Run-Time Fault Codes
Any positive Assigned (any positive number) by the user in the batch language program to
number indicate what type of fault has occurred. There is no limit to the number of fault
codes the user may assign.
-3.0 Stack System fault caused by a problem in the PHASEX firmware or the compiler.
overflow Contact ABB technical support.
-4.0 Error reading No batch program exists in the NVRAM memory that matches the number indi-
object file cated in specification S9 of the PHASEX function block. Normally this means
that the batch object file has not been downloaded to the controller, or specifi-
cation S9 of the PHASEX function block references an undefined program
number.
-5.0 Object file Batch program size exceeds the amount of controller memory allocated by
exceeds memory specification S11 of the PHASEX function block. Correct this problem by
allocation increasing specification S11.
2VAA000844R0001 J 218-3
Run-Time Fault Codes 218. Phase Execution
Table 218-1 PHASEX Run-Time Fault Codes (Continued)
-6.0 Phase data Phase data message and the program data can not fit in the memory allocated
message exceeds by specification S12 of the PHASEX function block. Correct this problem by
memory allocation increasing specification S12.
-7.0 Phase data Amount of data used by a phase exceeds the amount of memory allocated by
size exceeds specification S12 of the PHASEX function block. To correct, increase the value
memory allocation of specification S12 in the PHASEX function block.
Fault data - The block number of the lead PHASEX function block with the
problem.
-8.0 Illegal phase The phase data message contains the name of a phase which does not exist
name in phase in the program. This situation can happen when a batch program is edited so
data message that a phase subroutine is removed, but the corresponding recipes are not
changed. To correct, add the undefined phase subroutine or remove the called
(undefined) phase subroutine from the recipe.
Fault data:
0 = no phase data message was received.
>0 = the position of the invalid phase in the phase data message. For a sin-
gle phase, this is one. For a sequence of phases, this is the position of the
phase in the sequence.
-9.0 Batch The batch directory file does not exist or is unreadable. Format controller and
directory error reload necessary programs, recipes, and data files.
-10.0 Recipe error The phase data message could not be parsed (i.e., it has an incorrect struc-
ture). Contact ABB technical support.
-12.0 Illegal Parameter data type conflict between the recipe and the batch program. To
parameter type correct, recompile the batch program and/or fix the recipe. Then download the
recompiled batch program and rerun the phase.
Fault data - Indicates the position of the invalid parameter in the phase data
message. The position has two components: the phase position and the
parameter position. For example, a fault data value of 1.2 indicates phase
position one and parameter position two.
-13.0 ESTOP/ Abort phase was triggered by the specification S5 input of the PHASEX func-
Aborting from tion block. The fault is triggered when the abort phase is activated. Clear the
block input fault by issuing a reset when the PHASEX function block is in the aborted
state.
-16.0 Bad function In the batch data declaration sections of the batch language, the program is
block reference trying to reference a function block that does not exist or one whose type does
not match the function code type in the declaration. The batch debugger will
provide the function block number within the batch data section that is making
the reference. To correct, change the function block number to a valid one,
erase the reference from the program, or correct the type to match the function
block in the controller.
-17.0 Array error Array subscript is out of bounds. Normal logic is suspended and execution of
fault logic begins. The statement number of the statement that caused the
fault.
-18.0 BCODE Batch program was compiled using firmware that does not match the firmware
revision mismatch in the controller. Recompile the batch program with the compiler that matches
the firmware within the controller.
-20.0 Invalid num- Recipe contains the wrong number of phase parameters compared to the tar-
ber of parameters get program. Normally, the recipe must be corrected. Otherwise, correct the
in phase data program.
218-4 2VAA000844R0001 J
218. Phase Execution Run-Time Fault Codes
Table 218-1 PHASEX Run-Time Fault Codes (Continued)
-21.0 Invalid Attempted execution of a new program that differs from the previous one
online program because of a change in the batch data area or the local declaration section of
change the active phase subroutine. Such online changes are not permitted.
-25.0 Bad block Recipe used contains a reference to an incorrect or nonexistent block. Correct
reference in the block number in the recipe.
phase data
-27.0 Bad block Function block declaration in the unit data file does not match the controller
reference in Unit configuration. Either the function block address or the function code type is in
Data error. Resolve any discrepancies and recompile the unit data file against the
batch program.
-28.0 Bad CSEQ CSEQ reference in the unit data file does not match the program. Resolve any
reference in Unit discrepancies and recompile the unit data file against the batch program.
Data
-29.0 Unit Data Unit data file does not match the batch program structurally. (The number or
does not match the type of the declarations does not match). Resolve any discrepancies and
B90 program recompile the unit data file against the batch program.
-30.0 Error No unit data file exists (or is unreadable) in the NVRAM memory that matches
reading UNIT.DEF the number indicated by specification S9 of the PHASEX function block. Nor-
file mally this means that the unit data object file has not been downloaded to the
controller.
-32.0 String String position specified in the program is negative or larger than the maximum
subscript error size of the string. This error occurs during program execution and transfers the
program to fault logic.
-35.0 Illegal Recipe parameter name does not match the parameter name of the selected
parameter name phase in the program file. Check the recipe and program file and edit the
names to match.
-36.0 Abort phase Batch program file does not contain a phase named Abort. Edit the batch pro-
not defined gram to contain the Abort phase, recompile the program, and then download it.
-37.0 Phase data Phase data as received by the PHASEX function block is out of order. Send
receipt error the phase data again.
-38.0 Program not The command was rejected because the program was inactive. Activate (ini-
active tialize or acquire) the program and issue the command again.
2VAA000844R0001 J 218-5
PHASEX Function Block Configuration Example 218. Phase Execution
218.2 PHASEX Function Block Configuration Example
Figure 218-1 shows an example PHASEX function block configuration.
PHASE X
S1 LE AD
(21 8)
B L O C K S TAT E 40 10
S2 PH A SE
S PA R E ID
S3 40 11
S PA R E F LT
CO D E 40 12
S4
S PA R E A B O R T
S5 40 13
O N /O FF A B O R T ASQTAT
RD
40 14
S PA R E
40 15
S PA R E
AB O RT 40 16
S PA R E
IN P U T 40 17 P HASEX PHAS EX
S1 LE AD
(2 18 ) S1 LEA D
(21 8)
S9 = 2 5.0
B L O C K S TAT E 40 20 B L O C K S TAT E 4 03 0
S 10 = 1 S2 PH AS E S2 P HA SE
S PA R E ID S PA R E ID
S 11 = 7 .0 S3 40 21 S3 4 03 1
S PA R E F LT S PA R E F LT
S 12 = 5 00 CO D E 40 22 C O DE 4 03 2
S4 S4
S PA R E A B O R T S PA R E A B O R T
S5 40 23 S5 4 03 3
A B O R T ASQTAT
RD A B O R T ASQTAT
RD
40 24 4 03 4
S PA R E S PA R E
40 25 4 03 5
S PA R E S PA R E
40 26 4 03 6
S PA R E S PA R E
40 27 4 03 7
S9 = 0.0 S9 = 0 .0
S 10 = 1 S10 = 1
S 11 = 1.0 S11 = 1 .0
S 12 = 25 0 S12 = 2 50
P HASEX PHAS EX
S1 (2 18 ) S1 (21 8)
LE AD LEA D
B L O C K S TAT E 40 40 B L O C K S TAT E 4 05 0
S2 PH AS E S2 P HA SE
S PA R E ID S PA R E ID
S3 40 41 S3 4 05 1
S PA R E F LT S PA R E F LT
CO D E 40 42 C O DE 4 05 2
S4 S4
S PA R E A B O R T S PA R E A B O R T
S5 40 43 S5 4 05 3
A B O R T ASQTAT
RD A B O R T ASQTAT
RD
40 44 4 05 4
S PA R E S PA R E
40 45 4 05 5
S PA R E S PA R E
40 46 4 05 6
S PA R E S PA R E
40 47 4 05 7
S9 = 0.0 S9 = 0 .0
S 10 = 1 S10 = 1
S 11 = 1.0 S11 = 1 .0
S 12 = 25 0 S12 = 2 50
T03215A
Figure 218-1 PHASEX Function Block Configuration
Some important guidelines to remember about PHASEX programming are:

• The lead PHASEX function block must have a lower number than the links.
• The lead and all linked PHASEX function blocks must be in the same controller segment.
• It is recommended that no blocks be placed between lead and linked function blocks.
• unitname_P1 is always the name of the tag used by the lead PHASEX block. Linked blocks are named
unitname_P2 through P32.
218-6 2VAA000844R0001 J
219. 219 Common Sequence
219. 219 Common Sequence

The common sequence (CSEQ) function block serves as the interface between the connected batch sequence (BSEQ) function block
and other (remote) batch sequences.
Outputs
C SE Q Blk Type Description

S1 (2 1 9 )
BS C#
N
S2
CM B#
N+1
N R CSEQ campaign number
S3
R E S RV L#
S4 N+2
S5
OWN RSTS
N+3 N+1 R CSEQ batch number
N /A OSTS
S6 N+4
S7
N /A N /A
N+5 N+2 R CSEQ lot number
N /A N /A
S8 N+6
N /A N /A
S9
N /A N /A
N+7 N+3 R CSEQ reservation status
S10 N+8
N /A N /A
N+9
N+4 R CSEQ ownership status
N+5 R Spare
N+6 R Spare
N+7 R Spare
N+8 R Spare
N+9 B Spare
Specifications
S1 N 30 I Note 1 Block address of batch sequence block
S2 N 1 I Note 1 Block address of control mode select (boolean):

0 = operator (manual)
1 = remote (automatic)
S3 N 6 I Note 1 Block address of reserve allow input:

0.0 = reserve not permitted
1.0 = reserve permitted
S4 N 6 I Note 1 Block address of ownership allow input:

-1.0 = ownership not permitted, queue is off and flush
0.0 = ownership not permitted, queue is on
1.0 = ownership permitted, queue is on
2.0 = ownership permitted, queue is off
S11 Y 1 R 0 - 9.2 E18 Status update minimum time (in secs)
S12 Y 120 R 0 - 9.2 E18 Status update maximum time (in secs)
S13 N 1 I Full Maximum number of program connections
S14 Y 0 I Full Spare parameter
2VAA000844R0001 J 219-1
Explanation 219. 219 Common Sequence
S16 Y 0 R Full Spare parameter
S17 N 0 R Full Spare parameter

NOTE:
219.1 Explanation
The following explanations describe each specification and provide details of how the CSEQ block interfaces with the BSEQ and batch
historian (BHIST) function blocks.
S1
Links the CSEQ block to a BSEQ block. The CSEQ block must be connected to the first output (N) of the BSEQ block.
S2
Selects the control mode of the CSEQ block.
0 = operator mode (manual batch sequence control)
1 = remote mode (automatic batch sequence control)
In the operator mode, the batch sequence recipe, phase and run/hold inputs control execution of the batch program.
Remote mode disables the batch sequence recipe, phase and run/hold inputs and control of program execution is available to other
programs connected to the CSEQ block. Remote mode disables the campaign, batch and lot number inputs to the BHIST block. The
campaign, batch, and lot numbers are passed to the BHIST from the CSEQ block.
S3
Reserve allow input. The reserve allow input determines if the CSEQ block may be reserved. Programs connected to the CSEQ block
may request to reserve the common sequence. The act of reservation restricts future access to ownership (remote program control) of
the common sequence.
0.0 = reserve not permitted, delete current reservation
1.0 = reserve permitted
S4
Ownership allow block input. The CSEQ block may be owned by only one program at a time. Specification S4 determines if a CSEQ
block may be owned. Program requests for ownership that cannot be granted may be deferred to the ownership queue for later execution.
This input also determines the status of the ownership queue.
-1.0 = ownership not permitted, ownership queue closed and cleared
0.0 = ownership not permitted, ownership queue open
1.0 = ownership permitted, ownership queue open
2.0 = ownership permitted, ownership queue closed
S5 through S7
Spare real input.
S8 through S10
Spare boolean input.
S11
Minimum time (in seconds) between status updates. Thus, S11 determines the maximum rate the CSEQ block reports status data to
connected programs. This specification can limit the bus and loop traffic generated by rapidly changing CSEQ status data.
S12
Defines the maximum time (in seconds) between updates. In the event that CSEQ status data is unchanging, S12 determines the rate
219-2 2VAA000844R0001 J
219. 219 Common Sequence Function Block Outputs
the CSEQ block checks the connection status of connected programs.
S13
Defines the maximum number of program connections that may be supported by the CSEQ block at once.
S14 through S17

Spare parameters.
219.2 Function Block Outputs
N
(CSEQ campaign number) Shows the current campaign number of the BSEQ block.
N+1
(CSEQ batch number) Shows the current batch number of the BSEQ block.
N+2
(CSEQ lot number) Shows the current lot number of the BSEQ block.
N+3
(CSEQ reservation status) Shows if the CSEQ block is reserved and which production variables (campaign, batch or lot) of ownership
requesting programs must match the reservation. The value of N+3 is a three-digit integer:
X X X – Where the range is 000 through 111
lot number match required
batch number match required
campaign number match required
0 = no
1 = yes
Examples:
000 = CSEQ block not reserved
100 = campaign number must match
011 = batch and lot numbers must match
111 = campaign, batch and lot numbers must match
N+4
(CSEQ ownership status) Shows if a remote program owns the CSEQ block.
0.0 = CSEQ block not owned
1.0 = CSEQ block owned
N+5 through N+9

Spare outputs.
219.3 Application
The primary objective of the CSEQ block is to reduce the number of function codes required to implement batch management or unit
management program structures. In a common sequence configuration, the CSEQ block provides the interface between two BSEQ
blocks. This interface serves as a communication path established by one batch sequence (client) connecting to a second batch
sequence (server).
In order for a client program to gain control of a CSEQ block (server program), the client program must acquire ownership of the server.
The client program that has acquired ownership of the CSEQ block (server) may perform the following operations on the server via the
CSEQ block:
• Select the recipe and phase and start or restart the program.
• Select the program to execute.
• Put the program into hold logic.
• Send command-variables to the CSEQ block.
• Unacquire (release ownership of) the CSEQ block.
In this manner, the client to server relationship between programs, with the client potentially controlling the server program execution, is
possible with the use of CSEQ blocks. One program may be the owner (client) of a second program or CSEQ (server) block, and be a
2VAA000844R0001 J 219-3
Application 219. 219 Common Sequence
server or common sequence to a third program. Figure 219-1 shows an example of a production train that illustrates this point.
U N IT 1 U N IT 2 U N IT 3
PRO GR AM X PROGRA M Y PRO GR AM Z
BSEQ BLOCK B SE Q B L O C K BSEQ BLOCK
C S EQ B LO C K C S E Q B LO C K C S EQ B LO C K
P R O G R A M X: P RO G R A M Y : P R O G R A M Z:
C L IE N T TO U N IT 2 C L IE N T TO U N IT 3 C L IE N T TO N E X T U N IT
S ER V E R TO S E RV E R TO S ER V E R T O
P R E V IO U S U N IT U N IT 1 U N IT 2
T01956A
Figure 219-1 Example Production Train
In Figure 219-1, the BSEQ block performs its usual role of executing the batch program. The CSEQ block provides the interface by which
the program may be shared and controlled by other batch programs.
In the operator mode, the BSEQ block controls execution of the batch program normally. Recipe, phase and run/hold inputs to the BSEQ
block control program execution. In this mode the BHIST block buffers data for batch records by batch and lot numbers selected by the
BHIST inputs.
The remote mode disables the BSEQ block recipe, phase and run/hold inputs and the BHIST block campaign, batch and lot number
inputs. The CSEQ block gains control of these inputs in the remote mode. Once a connected program acquires ownership of the CSEQ
block, the program that owns the CSEQ block controls these inputs to the BSEQ and BHIST blocks.
NOTE: The E-STOP (executed stop) and operator acknowledge inputs to the BSEQ remain enabled in both modes. The operator
can suspend batch sequence execution despite the CSEQ mode.
All connected programs receive status information from the CSEQ block. Specifications S11 and S12 control the rate of transmission.
The CSEQ block can only have one owner at a time and only the owner can send commands to the CSEQ block. The CSEQ block can
be reserved with production ID numbers (campaign, batch and lot). This restricts future ownership of the CSEQ block to programs
belonging to related production runs.
Before a program can communicate with a CSEQ block it must establish a connection to the CSEQ block. The CSEQ block has a
configurable limit (S13) on the number of connections it can support at once. When a program is no longer interested in a CSEQ block,
it may unconnect from the CSEQ block. Thus, making the connection slot available to other programs. While a CSEQ block is connected,
the following data is available to all connected programs:
• Connection status.
• Reservation status.
• Ownership status.
• Control mode.
• Program status (inactive, running, holding).
• Recipe number.
• Phase number.
• Fault code.
• Campaign, batch and lot numbers.
• Eight status variables.
Table 219-1 provides a description of the specification settings for that CSEQ block in Figure 219-2 Figure 219-2 is an example of a
common sequence. Once there is a connection between the BSEQ block and the S1 input of the CSEQ block, no other connection to
function blocks is required.
Table 219-1 Function Code 219 Specification Settings for Figure 219-2
S1 N Block address N of the BSEQ links the CSEQ to the batch unit controlled by
the BSEQ and its associated programs.
S2 N+1 The TSTALM block provides the boolean signal determined by the mode of the
BSEQ control pushbutton.
S3 5 Default value (BLK ADDR 5 = 0.0) determines that reservation of this CSEQ is
not permitted. This application does not use the RESERVE feature of the
CSEQ structure.
219-4 2VAA000844R0001 J
219. 219 Common Sequence Application
Table 219-1 Function Code 219 Specification Settings for Figure 219-2 (Continued)
S4 6 Default value (BLK ADDR 6 = 1.0) determines that ownership of the CSEQ is
permitted and the acquire request queue is enabled. Thus, if the CSEQ is not
owned, acquire requests are granted; if it is owned, requests will be stored.
S5 - S10 — Spare inputs. Use default values.
S11 1 Default value of 1.0 limits the maximum rate at which the CSEQ generates
exception reports to no more than one message per second. This puts a limit to
the amount of loop and bus traffic that the CSEQ may inject to the system.
S12 120.0 Default value of 120.0, in the event of unchanging common sequence status
data, determines the rate at which the CSEQ sends a message to verify the
CONNECTION status of all connected programs.
S13 2 With a value of 2 selected, the CSEQ can support 2 connected programs
(e.g., current owner, next owner).
S14 - S17 — Spare parameters. Use default values.
2VAA000844R0001 J 219-5
Application 219. 219 Common Sequence
R E C IPE
S5
(68)
S6 RE M SE T N
P H AS E
S5
(6 8)
S6 RE M SE T N
B SE Q
B SE Q (148 )
S1
C O N TRO L P B R# R#
N
S2
M S DV D R PH# P H#
S1 (3 4) S3 N+1
S1 (3 3) S1 (129 ) S RU N RU N
NOT I1 1 N S4 N+2
N S2 N S1 AC K F LT
I2 2 (3 9) S2 S5 N+3
S3 N +1 S2 OR R ESP H
F1 3 N S6 N+4
S4 N +2 DB BC
F2 ST S3 S7 N+5
S5 N +3 I N /A R
F3 N+6
S6 FC
F4 N+7
S1 (35) S 25 C S#
T D -D IG 0 N+8
N
AC K N OW LE D G E
PB
R CM (62)
S1 S
S2 N
P
S3 R
S4 O
S5 I
S6 F
S7 A
B H IST
S 12 ( 220)
BSEQ STS
S 13 N
C A M PA IG N C# S T S1
S 14 N +1
B# S T S2
S5 S 15 N +2
(68) L# S T S3
S6 RE M SE T N S 16 N +3
C HK S T S4
S 17 N +4
S PAR E S T S5
S 18 N +5
S PAR E S T S6
B AT C H N +6
S T S7
N +7
S5 S T S8
TS TA L M CS E Q (68) N +8
(6 9) B S E Q C O N T RO LM O D E S1 (2 19 ) S6 RE M SE T N
C#
N +9
H BS C#
N (1 = R E M OT E , 0 = O P E R AT O R ) S2 N B#
L CM B# N +1 0
N+1 S3 N+1 L#
RESRV L# N +1 1
S4 N+2 L OT E#
N +1 2
OWN RST S
S5 N+3 S PAR E
N /A OST S S5 N +1 3
S6 N+4 (68)
N /A N /A S6 RE M SE T N
S7 N+5
N /A N /A
S8 N+6
N /A N /A
S9 N+7
N /A N /A
S 10 N+8
N /A N /A
N+9
B SE Q C ON TR O L P U S H BU T TO N N OT E S :
1. IN M A N U A L M O D E , T H E O P E R ATO R S E LE C T S B S E Q C O N T R O L
B S E Q TA G BS EQ D ESC TE XT S TAT U S B Y P U T T IN G T H E M S D D E IT H E R I N R U N , H O LD O R E -S T O P.
O U T P U T S TAT E 3 RU N RU N N IN G F B IN P U T 1 2. IN AU TO M O D E , T H E C S E Q E N A B LE S R E M O T E P R O G R A M S T O
O U T P U T S TAT E 2 E -S TO P FAU LT F B IN P U T 2 C O N T R O L T H E B S EQ R EC I P E , P H A SE A N D RU N / H O LD IN P U T S .
O U T P U T S TAT E 1 H O LD H O L D IN G F B IN P U T 3
D E FAU LT S TAT E A U TO DONE F B IN P U T 4
M O D E : AU T O /M A N UA L MSDD MO DE
T 01 957A
Figure 219-2 Typical Batch Sequence Control
219-6 2VAA000844R0001 J
220. 220 Batch Historian
220. 220 Batch Historian

The batch historian (BHIST) function code supports the batch historian feature of Batch 90. This function block resides within the module
and is part of the overall function code configuration. It links to the batch sequence block (BSEQ, function code 148) and provides a buffer
between a Batch 90 program and the batch historian and queues that information into the BHIST block. When a new event is added to
the block, the BHIST block generates an exception report telling the historian that more data needs to be stored. The batch historian then
polls the information from the BHIST block and stores it to disk. Each BHIST block can output data to up to eight historians. For detailed
information on the batch historian, refer to the Batch Data Manager instruction.
Outputs

BH IST
S12 (2 2 0 ) N B Summary status:
BSEQ STS
S13
C# S T S1
N 0 = not all bad
S14
B# S T S2
N+1
1 = all bad
S15 N+2
L# S T S3
S16 N+3
CHK S T S4
N+4
N+1 R Status of historian 1:
S17
S18
S PA R E S T S5
N+5 -1 = not expected
S PA R E S T S6
S T S7
N+6 0 = good
S T S8
N+7 1 = bad
N+8
C#
N+9
B#
N + 10
L#
N + 11 -1 = not expected
E#
N + 12 0 = good
S PA R E
N + 13 1 = bad

-1 = not expected
0 = good
1 = bad

-1 = not expected
0 = good
1 = bad

-1 = not expected
0 = good
1 = bad

-1 = not expected
0 = good
1 = bad

-1 = not expected
0 = good
1 = bad

-1 = not expected
0 = good
1 = bad
N+9 R Campaign number
N+10 R Batch number
N+11 R Lot number
N+12 R Event number
N+13 R Spare
2VAA000844R0001 J 220-1
Explanation 220. 220 Batch Historian
Specifications
S1 Y 0 I 0-1 Historian 1 expected; 0 = no, 1 = yes
S9 Y 0 I -1 - 2 Error action:
-1 = disabled (always start immediately)2
0 = always start (after start event read or failed)
1 = start if any historian is good
2 = start only if all historians are good
S10 Y 120 I Full Time-out time (secs)
S11 N 300 I Full Buffer size (bytes)
S12 N 2 I Note 1 Block address of BSEQ block
S13 N 2 I Note 1 Block address of campaign number input
S14 N 2 I Note 1 Block address of batch number input
S15 N 2 I Note 1 Block address of lot number input
S16 N 2 I Note 1 Block address of check ID input
S17 N 2 I Note 1 Block address of spare input
S18 N 2 I Note 1 Block address of spare input

NOTES:
2. Available in firmware revision G_0 or later.
220.1 Explanation
S1 through S8
Identify the historian expected. Up to eight batch historians can monitor the BHIST block. Each historian has an option page for specifying
the historian number (one through eight). All specifications that match a historian number specified on the option page should be set to
one. For example, if historians one and four are used and specified on the option page, S1 and S4 must be set to one, S2, S3, S5 and
S8 must be set to zero.
S9
Determines how the Batch 90 program will respond to batch historian status on a start/restart transition. Specification S9 has no effect if
an active batch historian goes off-line while the batch program is running.
A start event is defined as a hold-to-run transition following a batch-complete state, or initial start. The start event is affected by S9 as
follows:
220-2 2VAA000844R0001 J
220. 220 Batch Historian Specifications
-1 = The program always starts without regards to any historian status. The start event is placed in the historian
buffer, and the program starts immediately. Note that if the historian buffer becomes full before the historian
reads the start event, the event will be lost.
0 = The program always starts, but only after the start event is read from the buffer by all expected historians, or
all expected historians are marked bad (i.e., the historian time out time, S10, expires). Note that the program
start will be delayed by the time required for all good historians to read the event, or the historian time out time,
whichever is less. During the delay output N+7 of the BSEQ block will indicate a fault code -23.
1 = The program starts only if at least one expected historians is good, but only after the start event is read from
the buffer by all good historians. Note that the program start will be delayed by the time required for all good
historians to read the event from the buffer. During the delay output N+7 of the BSEQ block will indicate a fault
code -23. If the historian time out time, S10, expires before all expected historians read the event, the program
will start only if at least one historian read the start event, otherwise, it will not start, and output N+7 of the BSEQ
block will indicate fault code -24.
2 = The program starts only if all expected historians are good, but only after the start event is read from the
buffer by all expected historians. Note that the program start will be delayed by the time required for all expected
historians to read the event from the buffer. During the delay output N+7 of the BSEQ block will indicate a fault
code -23. If the historian time out time, S10, expires before all expected historians read the event, the program
will not start, and output N+7 of the BSEQ block will indicate fault code -24.
A re-start event is defined as a hold-to-run transition following a holding state. The re-start event is affected by S9 only as follows:
-1 = The program always re-starts regardless of any historian activity. The re-start event is placed in the historian
buffer, and the program re-starts immediately. Note that if the historian buffer becomes full before the historian
reads the re-start event, the event will be lost.
0,1, or 2 = The program always re-starts, but only after the re-start event is read from the buffer by all good
historians, or historian time out time, S10, expires. Note that the program re-start will be delayed by the time
required for all good historians to read the event, or the historian time out time, whichever is less. During the
delay output N+7 of the BSEQ block will indicate a fault code -23.
S10
Determines how long the BHIST function block waits for acknowledgment before marking a batch historian bad. Bad historians that
resume taking events from the BHIST block are marked good. If a historian is bad on a hold to run transition, the batch program will not
start running until the time set in S10 expires (unless S9 is set to -1, in which case the program will start immediately). Note that once a
historian is flagged as bad (i.e., its corresponding output N+1 through N+8 is set to one), a new time-out period is not granted so long as
the status is marked bad, regardless of the BSEQ hold/run state (i.e., the timing period only applies to a good historian before flagging it
as bad).
S11
Sets the amount of RAM, in one byte increments, that is used for holding the event and watch events before data is overwritten. The
average event is 20 bytes. The send message to the historian is 100 bytes. Under normal operation, the historian will typically poll the
event data from the BHIST block at a maximum of every 20 seconds.
S12
Connected to the lowest block address (N) of the batch sequence function block (BSEQ) controlling the batch program (Fig. 220-1).
S13
Connected to the function block that defines the batch campaign number. Campaign number can be used by the common sequence
function block (CSEQ).
S14
Connected to the function block that defines the batch number. Batch number specifies the batch file name of the BSEQ data saved in
the batch historian.
S15
Connected to the function block that defines the batch lot number. Lot number specifies the lot file name of the BSEQ data saved in the
batch historian. On a complete to run transition, both the batch and lot numbers are locked in. They cannot be changed until the program
completes.
NOTE: Alphanumeric campaign, batch, and batch lot IDs are supported by connecting S13, S14, and S15 respectively to the N+1
ST output of a DATA EXPT (function code 194) or DATA IMPT (function code) function block. The batch program must include the
#ALPHA compiler directive in order to support alphanumeric recipe IDs.
S16
Checks the historian function block to verify that the current batch and lot number (identified by S14 and S15) are unique. If <S16> equals
zero, it does not check for unique batch and lot numbers. If <S16> equals one, it checks for unique batch and lot files.
2VAA000844R0001 J 220-3
Outputs 220. 220 Batch Historian
S17, S18 and S19

R E A C TO R K A BATC H SE Q U E N C E
K A-R E C IP E L O G IC BAT C H ID = 1
S5
BS EQ
(68) S1 (14 8)
S6 R E M SE T R# R#
3 00
3 09 S2
PH# PH#
S3 3 01
RU N RU N
K A -PH A S E S4 3 02
AC K F LT
S5 3 03
S5 ESP H
(68 ) S6 3 04 S1 (33 )
S6 R E M SE T DB BC NO T
3 10 S7 3 05 N
N /A R
S1 (33 ) 3 06
NOT FC
3 07
312
K A- STAR T CS#
3 08
S1
RCM (62) TH IS B AT C H SE Q U E N C E
S
3 11 B LO C K C O N T RO LS
S2
P R E AC TO R A
S1 (35 ) S3
T D -D IG R
3 13 S4
O
S5
I
S6
F
S7
A TH IS B AT C H H ISTO R IA N BLO C K
B EL O W C O L LE C TS H ISTO R IC A L
DATA G E N E R AT E D B Y R EA C TO R A
A N D SE N D S IT TO T H E
B AT C H H IST O R IA N
B H IST
S 12 (2 20)
BSE Q ST S
S 13 360
C# S TS1
B AT C H N U M BE R S 14 361
F O R R E AC TO R A B# S TS2
S 15 362
L# S TS3
S5 S 16 363
(68 ) CHK S TS4
S6 R E M SE T S 17 364
3 74 S PA R E S T S 5
S 18 365
S PA R E S T S 6
366
S TS7
367
S TS8
L OT N U M BE R 368
F O R R E AC TO R A C#
369
B#
S5 370
(68 ) L#
S6 R E M SE T E#
371
3 75
372
S PA R E
373
T01958A
Figure 220-1 Example of BHIST Function Block Configuration
220.1.2 Outputs
N
Shows the overall status of the historians communicating with the BHIST block. If this output is zero, at least one batch historian is marked
good. If this output is one, all expected batch historians are bad.
N+1 through
N+8
Indicate the status of historians one through eight. If any of these outputs are zero, that batch historian is active and operating correctly.
If any of these outputs are one, the batch historian is expected, but it is not emptying the buffer within the time set by specification S10.
N+9 through
N+11
Indicate which campaign (N+9), batch (N+10) and lot (N+11) numbers were locked in on a complete to run transition. Typically these
outputs are used to track remote manual set constants so that the operator can see the actual numbers being used.
N+12
Exception report output. The event number is zero until the batch program begins executing. This output increments by one every time
a new item is inserted into the BHIST block event queue.
220-4 2VAA000844R0001 J
221. I/O Device Definition

The I/O device definition function code supports multichannel Symphony Plus I/O modules and Harmony I/O blocks. Each Symphony
Plus I/O module or Harmony I/O block incorporates a specific combination of channel data types (digital input, digital output, analog input,
and analog output). Function code 221 is used to make appropriate assignments of function codes 222 through 225, and 229 to
Symphony Plus I/O modules or Harmony I/O block channels. Definition of this function code is required for all Symphony Plus I/O
modules or Harmony I/O blocks. Application tables in this section provide usage examples.
NOTES:
1. Function code 221 tunable specifications are not adaptable.
2. This function code is used to support Symphony Plus I/O and Harmony I/O blocks only.
3. All HSOE points (HSOE enabled with S10 = 1 of function code 224) must be constrained to the first sixteen channels (S2
through S17) of the associated I/O device definition (function code 221).
4. There is a limit of 40 process channels per FC221, which includes S2 through S25 and any associated foreign device I/O
function codes used for HART variables.
Outputs
N B Primary I/O block status with quality
N+1 B Backup I/O block status with quality
N+2 B Channel in override/simulation with quality
N+3 B Spare output with quality
N+4 R4 Reserved output with quality
Specifications
S1 N NULL String 0 - 32 32-character device label
S2 N 2 I Note 1 Block address of channel 1
2VAA000844R0001 J 221-1
S26 N 0 I Note 1 Block address of override/status error inhibit/simula-

tion permit
S272 Y 0 B 0 or 1 Device status error inhibit
S28 N 0 B 0 or 1 Redundant I/O block expected
S29 N 2 I Note 1 Block address of cold junction reference
S30 Y NULL String 0 - 32 32-character user scratch area
S31 N 2 I Note 1 Reserved for future use
S32 N 0 I Full Reserved for future use
S33 N 0 I Note 1 Block address of next SOE device definition
221-2 2VAA000844R0001 J
S34 N 0 I Full Enable/disable power status A, power status B,

and field power status check for SD series I/O
modules.
xxx00 = Power status A, B, and field power fault
detection enabled (default)
xxx01 = Power status A and B fault detection
enabled, field power fault detection disabled
xxx10 = Power status A and field power fault detec-
tion enabled, power status B fault detection disabled
xxx11 = Power status A fault detection enabled,
power status B and field power fault detection dis-
abled
xxx20 = Power status B and field power fault detec-
tion enabled, power status A fault detection disabled
xxx21 = Power status B fault detection enabled,
power status A and field power fault detection dis-
abled
xxx30 = Field power fault status enabled, power sta-
tus A and B fault detection disabled.
xxx31 = Power status A, B, and field power fault
detection disabled
Enable/disable HART communication on all
channels.
xx0xx = HART communication enabled. Normal
operation with full functionality (default).
xx1xx = HART communication inhibited. All HART
communication is disabled on all device I/O chan-
nels.
Enable/disable failover on local I/O error for
RAI02 and RAO02 redundant analog input and
redundant analog output modules.3
x0xxx = Failover on local I/O error (default). The
backup module requests the primary module to
failover when a local I/O error is present.
x1xxx = Failover on local I/O error disabled. The
backup module does not request the primary mod-
ule to failover when a local I/O error is present.

NOTES:
9,998 for the SPC700 and BRC-100/200/300
2. The specification value active state is permitted to operate only when S26 of the device definition is
enabled.
3. This specification setting only applies to the RAI02 and RAO02 redundant analog input and redundant
analog output modules. This setting is ignored if it is set on the RDI01, RDI02, and/or RDO01
redundant digital input and redundant digital output modules.
The control system must be carefully evaluated to estab-

lish default values that will prevent personal injury and/or
property damage in the case of I/O block failure.
WARNING
2VAA000844R0001 J 221-3
Explanation 221. I/O Device Definition
221.1 Explanation
Specifications
S1
(Device label) Device label of string data type used as a logical address of the Symphony Plus I/O module or Harmony I/O block. This
label must match the device label configured in the Symphony Plus I/O module or Harmony I/O block. The device label can be up to 32
characters long. For proper operation, the label cannot be null.
S2 through S25
(Block addresses of channels) Link the I/O device definition function code 221 to the channel function codes (function codes 222
through 225). The channel function codes actually process the data for each I/O point at the I/O block level. The function codes that are
supported are analog in/channel function code 222, analog out/channel function code 223, digital in/channel function code 224, and
digital out/channel function code 225. The relative order in the list of channels helps to specify the physical channel in the Symphony Plus
I/O module or Harmony I/O block. Each channel function code must match the type of the physical channel on a particular Symphony
Plus I/O module or Harmony I/O block. The default value indicates that the I/O channel is not used.
S26
(Block address of override/status error inhibit/simulation permit) Links to a function block which will provide a boolean indication as
to whether a particular feature is permitted. If the value from the attached boolean output is zero; override, status error inhibit, or
simulation is not permitted on any channel. If the value from the attached boolean output is one; override, status error inhibit, or simulation
is permitted on any channel. This specification has no effect on the Harmony simulation block (SIM-100) simulation operation.
S27
(Device status error inhibit) If set to one, this specification inhibits all device or channel errors of this Symphony Plus I/O module or
Harmony I/O block from being included in the controller status. The default value causes all block and channel errors to be included in
the controller status if not otherwise inhibited at the channel level.
S28
(Redundant I/O block expected) If this specification is set to one, a redundant I/O block is always expected. If a redundant Symphony
Plus I/O module or I/O block is not found (function code 221 output N+1 = 1 and has bad quality), the controller generates a block problem
report. If set to a 0 then no redundant device is expected, but may exist.
S29
(Block address of cold junction reference) Links a point which may be used as the cold junction reference (CJR) temperature in
degrees Centigrade for thermocouple analog inputs. The default value indicates that no point is referenced as a cold junction reference.
S30
(User scratch area) Provides a 32 character storage space for user string data. The space must be defined before the configuration is
executed. Existing characters can be changed in the online mode, but the controller must be placed in the configuration mode to change
the amount of characters in the field.
S31
S32
S33
(Block address of the next HSOE device definition) Block address of the next I/O device definition. This specification is only required
when the inputs used by the I/O device definition are being used as part of a Harmony sequence of events system.
Note: When more than one I/O module (e.g. DI01) is used in an SOE system, their function code 221s must be daisy chained together.
That is, the S33 input to a function code 221 comes from the "N" output of the function code 221 that precedes it. Figure 1 shows a typical
221-4 2VAA000844R0001 J
221. I/O Device Definition Explanation
SOE configuration.
Figure 1. Using S33 to create an SOE chain
S34
The logic power connectors on SD Series din rail I/O modules have terminals for monitoring the status of redundant power sources
(labeled SA (power status A) and SB (power status B). Field power connected to some SD Series I/O module bases is, by default
monitored whether or not the application requires field power.
Specification S34 of FC 221 is used to:
• Enable/disable power status A and/or power status B fault detection.
• Disable field power fault detection if the application does not require field power.
• Enable/disable HART communication on all channels.
• Enable/disable failover on local I/O error for RAI02 and RAO02 redundant analog input and redundant analog
output modules.
The settings for Specification S34 are as follows:
• xxx00 = Power status A, B, and field power fault detection enabled (default).
• xxx01 = Power status A and B fault detection enabled, field power fault detection disabled.
• xxx10 = Power status A and field power fault detection enabled, power status B fault detection disabled.
• xxx11 = Power status A fault detection enabled, power status B and field power fault detection disabled.
• xxx20 = Power status B and field power fault detection enabled, power status A fault detection disabled.
• xxx21 = Power status B fault detection enabled, power status A and field power fault detection disabled.
• xxx30 = Field power fault status enabled, power status A and B fault detection disabled.
• xxx31 = Power status A, B, and field power fault detection disabled.
• xx0xx = HART communication enabled. Normal operation with full functionality (default). Refer to NOTES 1
through 3 that follow.
2VAA000844R0001 J 221-5
Application 221. I/O Device Definition
• xx1xx = HART communication disabled. All HART communication is disabled on all device I/O channels. Refer to
NOTES 1 through 3 that follow.
• x0xxx = Failover on local I/O error (default). The backup module requests the primary module to failover when a
local I/O error is present. Refer to NOTE 4 that follows.
• x1xxx = Failover on local I/O error disabled. The backup module does not request the primary module to failover
when a local I/O error is present. Refer to NOTE 4 that follows.
NOTES:
1. Some quick response or older I/O devices might not be capable of filtering out the higher frequency HART signals. They might
incorrectly respond to the HART communication pulses. Specification 34 can be used to inhibit HART communications on all chan-
nels of a Symphony Plus SD Series HART Input/Output enabled module.
2. When Specification 34 is used to inhibit HART communications, all HART communications on the I/O device are disabled.
This includes DTM and HART fieldbus value acquisition.
3. The Symphony Plus SD Series HART Input/Output modules, and their firmware versions, that support disabling HART com-
munications on all channels are:
• HAI805 and HAO805 HART Analog Input/Output modules with firmware versions A_4 and later.
• AI02 and AO02 HART Analog Input/Output modules with firmware versions B_1 and later.
• AI05 and AO05 HART Analog Input/Output modules with firmware versions B_2 and later.
4. This specification setting only applies to the RAI02 and RAO02 redundant analog input and redundant analog output mod-
ules. This setting is ignored if it is set on the RDI01, RDI02, and/or RDO01 redundant digital input and redundant digital output
modules.
S35 through S36
Spare.
Outputs
The I/O device definition function code 221 has the following outputs: primary I/O status, backup I/O status, channel was put in override
or simulation flag, and two spares. The I/O status outputs are the error summary of the I/O’s overall operational status (i.e., Harmony
network, redundancy, power, and configuration status) and error summary of all configured channels.
Primary I/O status (0 = good, 1 = bad). Quality is set bad when function code 221 cannot communicate with the primary I/O (N).
N+1
Backup I/O status (0 = good, 1 = bad). Quality is set bad when function code 221 cannot communicate with the backup I/O (N+1).
N+2
Channel in override/simulation (0 = no, 1 = yes). One or more of the I/O channels are in either override or simulation mode. Quality is
always set to good.
N+3
Spare output with quality always set good.
N+4
Reserved output with quality always set good.
NOTE: Can be referenced by Control Station (function code 80) for a non-bypass station application using a SAC station con-
nected to a control I/O (CIO) block. Refer to the explanation of S28 of function code 80 for more information.
221.2 Application
Tables 221-1 through 221-6 show how function codes 221 through 225 are used in operation with the following Harmony I/O blocks. :
Analog input blocks: AIN-120, AIN-200, AIN-220, AIN-300

Analog output block: AOT-150
Control I/O block: CIO-100
221-6 2VAA000844R0001 J
221. I/O Device Definition Application
Digital input block: DIN-400

Digital I/O block: DIO-400
Digital output blocks: DOT-100, DOT-120
Specifications S2 through S25 contain the block address of the applicable channel function code. Function code 221 specifications for
any unused channels should be set to 2.
Table 221-1 Analog Input Block
Specification Channel No. Physical Channel Applicable Channel Function Code
S2 1 Analog input 1 Analog in/channel (function code 222)
S3 2 Analog input 2
S4 3 Analog input 3
S5 4 Analog input 4
S6 5 Analog input 5
S7 6 Analog input 6
S8 7 Analog input 7
S10 9 Analog input 9
S18 Internal cold junction reference (AIN-200 and AIN-220 only)
S19 through S25 15 through 24 Unused Not applicable
2VAA000844R0001 J 221-7
Table 221-2 Analog Output Block
Physical
Specification Channel No. Applicable Channel Function Code
Channel
S2 1 Analog output 1 Analog out/channel (function code 223)
S3 2 Analog output 2
Table 221-3 Control Input/Output
S3 2 Analog input 2
S4 3 Analog input 3
S5 4 Analog input 4
S6 5 Analog output 1 Analog out/channel (function code 223)
S8 7 Digital input 1 Digital in/channel (function code 224)
S9 8 Digital input 2
221-8 2VAA000844R0001 J
Table 221-3 Control Input/Output (Continued)
S12 11 Digital output 1 Digital out/channel (function code 225)
S13 12 Digital output 2
Table 221-4 Digital Input Block
2VAA000844R0001 J 221-9
Table 221-5 Digital Input/Output Block
221-10 2VAA000844R0001 J
Table 221-6 Digital Output Block
2VAA000844R0001 J 221-11
221-12 2VAA000844R0001 J
222. Analog In/Channel

The exception reporting analog in/channel function code provides addressing, startup, run-time, override, and failure mode specifications
for an individual or redundant pair of analog input channels on a Symphony Plus I/O module, PDP800 PROFIBUS Master module, CI850
IEC 61850 Communication module, SCI200 Multi-Protocol (IEC 60870-5-104 and DNP3) Communication module, Harmony I/O block,
IOR800/810 module, and SPC700 Controller module Modbus communications. The analog in/channel function code must reside in the
same segment as the I/O Device Definition function code 221 or foreign device definition function code 228 to which it is mapped. This
function is required for all configured analog input block channels.
NOTES:
1. This function code is used to support Symphony Plus I/O modules, PDP800 PROFIBUS Master module, CI850 IEC 61850
Communication modules, SCI200 Multi-Protocol (IEC 60870-5-104 and DNP3) Communication modules, Harmony I/O blocks,
IOR800/810 modules, and SPC700 Controller module Modbus communications only. Refer to the IOR-810 Gateway instruction
for specific differences between Harmony I/O and S800 I/O.
3. The block address for the cold junction reference is specified in the I/O Device Definition function code 221. Filtered thermo-
couples must use the on-board reference.
4. The protocol specifications are different from each other. The PDP800 PROFIBUS specification is different from the SC200
DNP specification, and so on. Review the specifications carefully by reading the corresponding hardware manuals before configur-
ing any device.
Outputs
N R4 Analog input value (in specified EUs) with quality.

PDP800: Value read from the PROFIBUS slave.
CI850: Value read from the IEC 61850 Intelligent Elec-
tronic Device (IED).
SCI200: Value read from the IEC 60870-5-104 or DNP
slave devices.
SPC700 Modbus communications: Value received from
the Modbus TCP server/client devices.
Specifications
S1 N NULL String 0 - 32 32-character channel label
S2 N 0 I Note 2 Input type
S3 N 0.0 R Full Engineering units low value
S4 N 100.0 R Full Engineering units high value
S5 N 0 I 0 - 255 Engineering units identifier
S6 Y 100.0 R Full Engineering units high alarm
S7 Y 0.0 R Full Engineering units low alarm
S8 Y 0.0 R Full Engineering units significant change
S9 N 2 I Note 1 Block address of input shaping algorithm
S10 N 0 B 0 or 1 Engineering unit conversion/shaping algorithm precedence
S11 N 0.0 R Full Lead wire resistance

PDP800, CI850, SCI200, and SPC700 Modbus communi-
cations: Not used
2VAA000844R0001 J 222-1
S12 N 0 I 0 - 16 A/D conversion resolution

cations: Not used
S13 N 0.0 R Full Specifies the low limit of the input range in volts of the user
defined input class (input class 4). This specification is
ignored for all other input classes.
SPC700: Used for Modbus communication as a
multiplication factor for the analog inputs.
PDP800, CI850, and SCI200: Not used
S14 N 0.0 R Full Custom range high limit (in volts)

PDP800, CI850, and SCI200: Not used
S15 N 0 B 0 or 1 Normal input/undefined
S16 Y 0.0 R Full Override value
S173 Y 0 B 0 or 1 Override enable
S18 N 2 I Note 1 Block address of simulation value
S193 Y 0 I 0 or 1 Simulation enable
S203 Y 0 B 0 or 1 Status error inhibit
S21 Y 9.2 E18 R Full Redundant input deviation limit
S22 N 0.0 R Full Length of termination unit cable

cations: Not used
222-2 2VAA000844R0001 J
S23 N NULL String 0 - 32 Foreign device configuration parameters
0-255 PDP800 only: Contains the data type, offset and size of the
data. Offset is specified in bytes and bits from the start of
the input data. Size is specified in bits. See table below for
keywords.
CI850 only: Contains the data type and the control model
of the Analog Input acquired from the IED. This value is
filled-in automatically by the IEC 61850 engineering tool
and should not be changed. Refer to S+ Control & I/O:
CI850 IEC 61850 Communication Module Hardware and
Operation (2VAA003700) for further information.
SCI200 IEC 60870-5-104 only: Contains the Application
Service Data Unit (ASDU) address, Information Object
(IOA) address, and data type of the analog input acquired
from the slave devices. This value is filled in automatically
by the IEC 60870-5-104 engineering tool and should not be
changed. Refer to S+ I/O: SD Series SCI200: Multi-Proto-
col (IEC 60870-5-104 and DNP3) Communication Module
Hardware and Operation (2VAA004355) user manual for
more information.
SCI200 DNP 3.0 only: Contains index address and data
type of the analog input acquired from the slave devices.
This value is filled automatically by the DNP configuration
tool and should not be changed. Refer to S+ I/O: SD Series
SCI200: Multi-Protocol (IEC 60870-5-104 and DNP3) Com-
munication Module Hardware and Operation
(2VAA004355) user manual for more information.
SPC700 Modbus Communications only: Contains Modbus
register address, Modbus function definition address, and
data type of the analog input acquired from the Modbus
slave devices. This value is filled automatically by the Mod-
bus configuration tool and should not be changed. Refer to
S+ Control: SPC700 Symphony Plus Controller
(2VAA003572) user manual for more information.
S25 N 2 I Note 1 Block address of the next element of the foreign device.
PDP800: Block address of the next channel function code
associated with this PROFIBUS slave.
CI850: Block address of the next channel function code
associated with this IEC 61850 IED.
SCI200: Block address of the next channel function code
associated with this IEC 60870-5-104 slave device or DNP
slave device.
SPC700 Modbus communications: Block address of the
next channel function code associated with this Modbus
server.
S26 N 0 I Full Cold junction compensation for thermocouple inputs (in

degrees C) for temperature drift above and below he cold
junction sensor on the terminal blocks.
Scale factor = (9 - channel number)/800 x S26
Example: S26 = 10 for channel 1.
Cold junction compensation = (9-1)/800 x 10 = 0.1°C
2VAA000844R0001 J 222-3
Explanation 222. Analog In/Channel

NOTES:
2. Refer to the S2 explanation.
3. The specification value active state is permitted to operate only when S26 of the device definition
function code 221 or S11 of the Gateway function code 227 is enabled.
222.1 Explanation
S1
(Channel label) Optional channel identifier. It is not required to be configured and can be null. The channel label can be up to 32
characters long.
S2
(Input Type) Specified as a four digit number of the following format:
FCSS
where:
F Filtered input: 1 = yes, 0 = no. A filtered input is computed as seven-eighths of
the previous filtered value plus one-eighth of the current input value. A filtered
input normally is used for cold junction reference compensation of thermocouple
inputs.
A filtered thermocouple automatically uses the value of the I/O device internal
cold junction reference for its own compensation. Thus, the internal cold
junction reference must be configured as a function code 222 block with an input
type (S2) of 1900. The engineering units (S5) of a filtered thermocouple must be
configured for degrees Celsius for a Symphony Plus I/O module or Harmony I/O
block, but may be configured for either degrees Fahrenheit or degrees Celsius
for S800 I/O modules.
Nonfiltered thermocouples automatically use the value of the I/O device’s
external cold junction reference (S29 of function code 221 or the fixed junction
temperature (FJT) parameter of S2 of function code 228) for thermocouple
compensation. When used with function code 221, the internal cold junction
reference normally is configured as the external cold junction reference.
C Input class as listed in following paragraphs.
SS Subclass as described in following paragraphs.
NOTE: Refer to the Harmony Input/Output System, I/O and Auxiliary Blocks instruction for information regarding Harmony I/O
block support of different analog input classes. Refer to the S800 I/O Modules instruction for information regarding S800 I/O mod-
ule support of different analog input types. Refer to the appropriate Symphony Plus I/O module instruction for information regard-
ing Symphony Plus I/O module support of different analog input classes.
High Level (Class 0):

F000 = 4 mA to 20 mA
F001 = +1 V to +5 V
F002 = -10 V to +10 V
F003 = 0 V to +10 V
F004 = 0 V to +5 V
F005 = 0 V to +1 V
F006 = 0 mA to 20 mA
F007 = -20 mA to +20 mA
F008 = -5 V to +5 V
222-4 2VAA000844R0001 J
222. Analog In/Channel Specifications
F009 = 2 V to 10 V
Thermocouple (Class 1):
F101 = type S thermocouple
F102 = type R thermocouple
F103 = type E thermocouple
F104 = type J thermocouple
F105 = type K thermocouple
F106 = type T thermocouple
F107 = Chinese type E thermocouple
F108 = Chinese type S thermocouple
F109 = type L thermocouple
F110 = type U thermocouple
F111 = type N (14 AWG) thermocouple
F112 = type N (28 AWG) thermocouple
F113 = type B thermocouple
F114 = type C thermocouple
F115 = type D thermocouple
RTD (Class 2):
F200 = US Lab standard 100 ohm platinum RTD
(TCR=0.003926)
F201 = US Ind standard 100 ohm platinum RTD
(TCR=0.003911)
F202 = European standard 100 ohm platinum (80 °C) RTD
(TCR=0.003850)
F203 = 120 ohm chemically pure nickel RTD
(TCR=0.00672)
F204 = 10 ohm copper RTD (TCR=0.00427)
F205 = Chinese 53 ohm copper RTD (r100/r0=1.425)
F206 = European Std. 100 ohm platinum (250 °C) RTD
(TCR=0.003850)
F207 = European Std. 100 ohm platinum (850 °C) RTD
(TCR=0.003850)
F208 = 100 ohm nickel RTD (TCR=0.00618)
F209 = 400 ohm resistor
F210 = Japanese Std. 100 ohm platinum (650 °C) JIS C 1604:1981
F211 = European/Japanese Std. 100 ohm platinum
(80 °C) IEC751/ITS-90/JIS C 1604:1997 (TCR=0.00385)
(250 °C) IEC751/ITS-90/JIS C 1604:1997 (TCR=0.00385)
(850 °C) IEC751/ITS-90/JIS C 1604:1997 (TCR=0.00385)
F214 = DIN-IEC-751 100 ohm platinum (available for use with
PDP800 as Internal cold junction reference on channel 8 of
AI835 and/or AI835A only)
Low level (Class 3):
F300 = -100 mV to +100 mV
F301 = 0 mV to +100 mV
F302 = -30 mV to +75 mV
User defined (Class 4):
F400 = input voltage range defined by specifications S13 and S14.
2VAA000844R0001 J 222-5
Specifications 222. Analog In/Channel
Smart field device/foreign device (Class 5):

0500 = smart I/O or foreign device channel.
NOTE: This setting should be used for all standard

PROFIBUS devices. No scaling of the input value read
from the PROFIBUS device will be performed. For S800
modules connected to a PDP800 through a CI840 set
S2 to the appropriate type shown in the table below.
NOTE: With CI850 and SCI200, this setting must be

used for all Analog Inputs belonging to the IEDs.
Internal cold junction reference (Class 9):
900 = internal cold junction reference
CIO-100
AIN-120
AIN-200
AIN-220
AIN-300
Input
AI830A
AI835A
AI801
AI810
AI815
AI820
AI830
AI835
AI843
AI890
AI845
AI825
AI01
AI03
AI04
Type Description
(S2)
0 4 to 20 mA • • • • • • • • • • •
1 1 to 5 V • • • • • • • •
2 -10 to 10 V • • • • • • •
3 0 to 10 V • • • • • • • •
4 0 to 5 V • • • • • • •
5 0 to 1 V • • •
6 0 to 20 mA • • • • • • •
7 -20 to 20 mA • • •
8 -5 to 5 V • •
9 2 to 10 V • • • •
101 Type S thermocouple • • • • • •
102 Type R thermocouple • • • • • •
103 Type E thermocouple • • • • • •
104 Type J thermocouple • • • • • •
105 Type K thermocouple • • • • •
106 Type T thermocouple • • • • •
107 Chinese type E thermocouple • • •
108 Chinese type S thermocouple • • •
109 Type L thermocouple • • • •
110 Type U thermocouple • • • •
111 Type N (14 AWG) thermocouple • • • • •
112 Type N (28 AWG) thermocouple • • •
113 Type B thermocouple • • • • •
114 Type C thermocouple • •
200 US Lab Std. 100 Ohm platinum RTD • • •
201 US Ind Std. 100 Ohm platinum RTD • • •
202 Euro Std. 100 Ohm platinum (80°C) RTD • • • •
203 120 Ohm nickel RTD • • • •
204 10 Ohm copper RTD • • •
205 Chinese 53 Ohm copper RTD • •
206 Euro Std. 100 Ohm platinum (250°C) RTD • •
207 Euro Std. 100 Ohm platinum (850°C) RTD • •
208 100 Ohm nickel RTD • •
209 400 Ohm resistor • •
210 Japan Std. 100 Ohm platinum (650°C) RTD JIS C •
1604:1981
211 Euro./Japan Std. 100 Ohm platinum (80°C) RTD •
IEC751/ITS-90/JIS C 1604:1997
222-6 2VAA000844R0001 J
CIO-100
AIN-120
AIN-200
AIN-220
AIN-300
Input
AI830A
AI835A
AI801
AI810
AI815
AI820
AI830
AI835
AI843
AI890
AI845
AI825
AI01
AI03
AI04
Type Description
(S2)
IEC751/ITS-90/JIS C 1604:1997
IEC751/ITS-90/JIS C 1604:1997
214 DIN-IEC-751 100 Ohm Platinum RTD (available for •
use with PDP800 as Internal cold junction reference
on channel 8 of AI835 and/or AI835A only).
300 -100 to 100 mV • •
301 0 to 100 mV • •
302 -30 to 75 mV • •
400 User defined voltage • • • • • •
500 Smart field device analog input, including PDP800,
CI850, and SCI200
900 Internal cold junction reference • •
1. AIN-220 channel 17 only. 1 2
2. AI835 channel 8 only.
S3
(Engineering units low value) Defines the low limit of the input’s range engineering units. This specification is ignored for input classes
1, 2, 5, and 9.
S4
(Engineering units high value) Defines the high limit of the input’s range engineering units. This specification is ignored for input classes
1, 2, 5, and 9.
S5
(Engineering unit identifier) Identifies the engineering units associated with the input value and specifies the temperature conversion
to be applied to thermocouple and RTD inputs.
NOTE: Thermocouples and RTDs (input classes 1 and 2) must specify either degrees Fahrenheit (3) or degrees Celsius (4). Fil-
tered thermocouples and internal cold junction references (input classes 1 and 9) must specify degrees Celsius (4) for Harmony
I/O subsystems.
S6
(Engineering units high alarm) An alarm will be generated when the input equals or exceeds this high limit.
S7
(Engineering units low alarm) An alarm will be generated when the input equals or is less than this low limit.
S8
(Engineering units significant change) Change in input allowed before the changed value is reported to a console or open access
system.
A change in input value by the amount specified in S8 will cause an exception report to be generated as long as the minimum exception
reporting time has been reached (S7 of function code 82).
S9
(Block address of input shaping algorithm) Allows additional characterization of the real input value. The available shaping algorithms
are function code 1 (function generator), function code 7 (square root), and function code 167 (polynomial). The shaping algorithm
tunable specifications cannot be adapted when used by function code 222. S9 must be set to the default value if function code 222 is
configured as an element of a foreign device definition function code 228.
S10
(Engineering unit conversion/shaping algorithm precedence) Specifies which will be performed first: shaping on the raw data or
conversion to engineering unit. The default is 0, which specifies that shaping is done first. This specification is not applicable if S9 is set
to its default value. If no shaping algorithm exists, shaping is ignored.
0= Perform shaping to raw data before engineering unit conversion is done.
1= Perform engineering unit conversion to raw data before shaping is applied.
For example, a function code 222 block is configured for a 4 to 20mA input range (S2=0), an engineering units range of zero to 100%
(S3=0, S4=100), and the square root (function code 7) shaping algorithm, and has a raw input value of 16 mA. Selecting shape before
EU conversion (S10=0) produces a block output value of 0%:
2VAA000844R0001 J 222-7
(SQRT(16 mA)-4 mA) * (100%-0%) / (20 mA-4 mA)+0%=0%+0%=0%
Selecting EU conversion before shaping (S10=1) produces a block output value of 8.66%:
SQRT((16 mA-4 mA)*(100%-0%) / (20 mA -4 mA)+0%)=SQRT(75%)=8.66%
This specification is I/O subsystem dependent. S800 RTD and thermocouple modules must use a setting of 1 if a shaping algorithm is
specified in S9.
S11
(Lead wire resistance) Resistance of the field input lead wire from the input to the termination device in ohms. Lead wire resistance can
have an effect on the accuracy of the analog input. The resistance must be measured and entered into this specification to obtain the
specified accuracy for input types that are affected. This specification is ignored for input classes 0, 4, 5, and 9 and for S800 modules.
Not used for PDP800 (PROFIBUS), CI850 (IEC 61850), SCI200 (IEC 60870-5-104 and DNP3), and SPC700 Modbus communications.
S12
(A/D conversion resolution) Specifies the relative resolution of the analog-to-digital conversion. The higher the value, the higher the
resolution. A higher value may increase A/D conversion time or slow the responsiveness of the input.
This specification is block type dependent:
AIN-200, AIN-220, AIN-300 blocks: Specifies the number of input samples to which a moving average is applied in order to generate the
input value.
AIN-120, CIO-100 blocks: Has no effect.
S800 modules: Has no effect.
S13
(User defined range low limit (volts)) Specifies the low limit of the input range in volts of the user defined input class (input class 4).
This specification is ignored for all other input classes.
SPC700 Modbus communications: Used for Modbus communication as a multiplication factor for the analog inputs. The field input value
acquired by FC222 S2 is multiplied by the value entered in S13, and the final result is shown in the FC22 output N.
Example:
FC 222 (N) = FC 222 (S2) X S13
Where:
FC 222 (S2) = 5000
S13 =0.01
FC 222 (N) = 5000 X 0.01 =50
Not used for PDP800 (PROFIBUS), CI850 (IEC 61850), and SCI200 (IEC 60870-5-104 and DNP3).
S14
(User defined range high limit (in volts)) Specifies the high limit of the input range in volts of the user defined input class (input class
4). This specification is ignored for all other input classes.
SPC700 Modbus communications: Used for SPC700 Modbus communications as a bias for the analog inputs. The field input value
acquired by FC222 S2 is multiplied by the value entered in S13 and added with the value entered in S14. The final result is shown in
FC 222 output N.
Example:
FC 222 (N) = FC 222 (S2) X S13 + S14
Where
FC 222 (S2) = 5000
S13 =0.01
S14=1.3
FC 222 (N) = 5000 X 0.01 +1.2 =51.2
Not used for PDP800 (PROFIBUS), CI850 (IEC 61850), and SCI200 (IEC 60870-5-104 and DNP3).
S15
(Normal input/undefined) A value of 0 selects normal input from standard I/O. A value of 1 puts the channel into an undefined state
which will not affect the channel status. Specifications S17 and S19 take precedence over S15 when S15 = 0, but not when S15 = 1.
0 = normal
1 = undefined
222-8 2VAA000844R0001 J
S16
(Override value) The channel input value is overridden with this value if override enable (S17) is set to 1.
S17
(Override enable) A value of 0 disables override for this channel. A value of 1 enables override in this channel. Override if enabled will
take precedence over normal input and simulation. Specification S26 of the I/O device definition function code 221 must reference a
boolean output that is set to a 1 to permit this operation; otherwise, it is ignored.
0 = disabled
1 = enabled
S18
(Block address of simulation value) The channel input value is simulated with this block input when simulation is enabled (S19 = 1).
S19
(Simulation enable) A value of 0 disables simulation for this channel. A value of 1 enables simulation for this channel and receives its
input from S18. Simulation has precedence over S15 normal input, but not S17 override. Specification S26 of the I/O device definition
function code 221 must reference a boolean output that is set to a 1 to permit this operation; otherwise, it is ignored.
0 = disabled
1 = enabled
S20
(Status error inhibit) Inhibits this channel’s I/O error contribution to controller status. Specification S26 of the I/O device definition
function code 221 or specification S5 of the foreign device function code 228 must reference a Boolean output with a value of 1 to permit
this operation. Otherwise, it is ignored.
0 = no
1 = yes
S21
(Redundant input deviation limit) In NORMAL mode (S15=0, S17=0, S19=0), the redundant input deviation limit specifies the
maximum deviation permitted between redundant analog input channels. This only applies when both inputs are of good quality. When
the redundant inputs are outside the deviation limit, they will both be considered in error (function block output quality set to BAD, SUSP
flag set in the exception report and the LIO error bit set in the controller status).
In OVERRIDE mode (S15=0, S17=1, S19=X), the redundant input deviation limit assumes the meaning of override value deviation
limit and thus specifies the maximum deviation permitted between the primary analog input channel and the override value (S16). If the
actual input value and the override value are outside the limit, the state of the input channel is considered suspect (SUSP set in the
exception report but no LIO error set in the controller status) since a bump in the block output value will occur upon exiting the OVERRIDE
mode.
In SIMULATION mode (S15=0, S17=0, S19=1), the redundant input deviation limit assumes the meaning of simulated value deviation
limit and thus specifies the maximum deviation permitted between the primary analog input channel and the simulated value (<S18>).
If the actual input value and the simulated value are outside the limit, the state of the input channel is considered suspect (SUSP set in
the exception report but no LIO error set in the controller status) since a bump in the function block output value will occur upon exiting
the SIMULATION mode.
S22
Length of Termination Unit Cable (feet) Specifies the length in feet of the termination unit cable from the marshaling cabinet to the I/O
device terminals. This is used to compute the effect of the termination unit cable on thermocouple, RTD, and internal cold junction
reference inputs (input classes 1, 2, and 9). This specification is ignored for all other input classes and for S800 modules.
S23
(Foreign device configuration parameters) A string data type containing configuration information specific to the analog input channel
of a foreign device. For example: FILTER=1500 specifies a filter period of 1.5 seconds for all modules except the AI830, AI835, and the
AI843. For the AI830, AI835, and the AI843 modules, FILTER=1500 specifies a filter period of 15 seconds.
S23 Parameter Description

FILTER=nnnnn Input filter time constant for S800 modules. The string nnnnn represents a number between zero
and 65535. A value of zero disables filtering. Units are in milliseconds, except for the AI830, AI835,
and the AI843 modules. The AI830, AI835, and the AI843 units are in tens of milliseconds.
PDP800 usage: Contains the data type, offset and size of the data. Offset is specified in bytes and bits from the start of the input data.
2VAA000844R0001 J 222-9
Size is specified in bits. See table below for keywords.

When specifying a slave parameter (‘PARM’) it may also be necessary to include the
‘DATA’ keyword to identify the specific element of the data within the slot value.
S23 Parameter Description Specification

TYPE Data type of value in PROFI- Unnx - unsigned integer field of nn bits in size (02-32) (Default is U8) size must
BUS slave data be two digits.
Snnx - signed integer field of nn bits in size (02-32)
Fnnx - floating point value of nn bits in size (only 32 or 64 are valid)
'x' is optional:
='Q', an additional byte of quality information is included following the value
='S', two bits of status information are included in the value field (2 least signif-
icant bits)
(Example: TYPE=U16S, unsigned integer value, 14 bits of value + 2 bits of qual-
ity)
[See Table 222-1 for a mapping of PROFIBUS data types to channel types.]
DATA Location of the start of the data nn:mm where 'nn' is the byte offset from the beginning of the slave data (0-243)
value in the slave input data and 'mm' is the bit offset (0-7). Note that bit 7 is the most significant bit and bit 0
buffer. is the least significant. The bit offset is optional and is assumed to be 7 (MSB) if
not specified.
(Example: To identify the least significant nibble of the fourth byte in the data
stream as the starting point use 'DATA=3:3')
PARM Slot and index identifying the nn:mm where 'nn' is the slot number and 'mm' is the index number of the slave
slave parameter. parameter to be represented in this channel. Values will default to zero if not
specified.
(Example: To identify the slave parameter at slot 2 index 4 use 'PARM=2:4')
STAT Location of the status value in nn:mm where 'nn' is the byte offset from the beginning of the slave data (0-243)
(PDP800 only) the slave input data buffer if and 'mm' is the bit offset (0-7). Note that bit 7 is the most significant bit and bit 0
separate from value. is the least significant. The bit offset is optional and is assumed to be 7 (MSB) if
not specified. A zero indicates OK, a set bit (=1) indicates a channel error.
CHAN Channel number in device Used by Composer Engineering tool.
Table 222-1 Mapping PROFIBUS Data Type to Channel Type
PROFIBUS
Numeric Channel Type
PROFIBUS Data Format Description
Type Code
Identifier
1 Boolean / BOOL - Default for function codes 224
and 225
2 Integer8 / SINT S08
3 Integer16 / INT S16
4 Integer32 / DINT S32
5 Unsigned8 / USINT U08
6 Unsigned16 / UINT U16
7 Unsigned32 / UINT U32
8 Float32 / REAL F32
14 BitString Unn
15 Float64 / LREAL F64
222-10 2VAA000844R0001 J
Table 222-1 Mapping PROFIBUS Data Type to Channel Type (Continued)
PROFIBUS
Numeric Channel Type
PROFIBUS Data Format Description
Type Code
Identifier
22 BitString8 / BYTE U08
23 BitString16 / WORD U16
24 BitString32 / DWORD U32
55 Unsigned64 / LWORD / ULINT U64
56 Integer64 / LINT S64
57 BitString64 U64
101 Float32+Unsigned8 F32Q
102 Unsigned8+Unsigned8 U08Q
103 OctetString2+Unsigned8 U16Q
104 Unsigned16_S U16S
105 Integer16_S S16S
106 Unsigned8_S U08S
CI850 usage: This value is filled in automatically by the IEC 61850 engineering tool and should not be changed. Manually modifying this
specification may result in unpredictable operation. Refer to S+ Control & I/O: CI850 IEC 61850 Communication Module Hardware and
SCI200 DNP 3.0 usage: Contains index address and data type of the analog input acquired from the slave devices. This value is filled
automatically by the DNP configuration tool and should not be changed. Manually modifying this specification may result in unpredict-
able operation. Refer to S+ I/O: SD Series SCI200: Multi-Protocol (IEC 60870-5-104 and DNP3) Communication Module Hardware and
Operation (2VAA004355) user manual for more information.
SPC700 Modbus Communications usage: Contains Modbus register address, Modbus function definition address, and data type of the
analog input acquired from the Modbus slave devices. This value is filled automatically by the Modbus configuration tool and should not
be changed. Manually modifying this specification may result in unpredictable operation. Refer to S+ Control: SPC700 Symphony Plus
Controller (2VAA003572) user manual for more information.
S24
S25
(Block address of next element of the foreign device) This specification is the link to the next element of the foreign device definition
function code 228. This specification is also the link to the next element of the foreign device definition function code 222 to monitor the
primary, secondary, tertiary, and quaternary HART variables. The default value indicates that this block is the last element. .
For controllers that do not support foreign device interfaces, this specification must be set
to the default value.
• PDP800 usage: Block address of the next channel function code associated with this PROFIBUS slave.
• CI850 usage: Block address of the next channel function code associated with this IEC 61850 IED.
• SCI200 usage: Block address of the next channel function code associated with this Multi-Protocol (IEC 60870-5-
104 and DNP3) slave device.
• SPC700 Modbus Communications usage: Block address of the next channel function code associated with this
Modbus server.
S26
Cold junction compensation for thermocouple inputs (in degrees C) for temperature drift above and below the cold junction sensor on the
terminal blocks. Channels #1 through #8 are on the upper terminal block with Channel #1 at the top. Channels #9 through #16 are on the
2VAA000844R0001 J 222-11
Outputs 222. Analog In/Channel
lower terminal block with Channel #9 at the top. The cold junction temperature sensor is located between Channels #8 and #9.
The linear equation used is:
Scale factor = ((9 - channel number)/800) x S26.
Therefore, Channel #9 has no scale factor applied. The maximum positive scale factor is applied to Channel #1. The maximum negative
scale factor is applied to Channel #16. All channels in between use the same calculation, but the scale factor is smaller based on the
linear equation. The scale factor from the linear equation is added to the measured cold junction temperature before it is applied to the
measured input for the channel.
For normal operation, use the same value for S26 on all FC 222 channels on the same device. The linear equation simplifies this
operation once the temperature drift is measured for Channel #1. However, if the temperature drift is non-linear, then apply different
values for S26 for each channel.
Table 222-2 Example Cold Junction Compensation Values using the Same S26 Value for all Channels
Channel Compensation (°C) Channel Compensation (-°C)
S26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
10 0.1 0.0875 0.075 0.0625 0.05 0.0375 0.025 0.0125 0 -0.0125 -0.025 -0.0375 -0.05 -0.0625 -0.075 -0.0875
50 0.5 0.4375 0.375 0.3125 0.25 0.1875 0.125 0.0625 0 -0.0625 -0.125 -0.1875 -0.25 -0.3125 -0.375 -0.4375
100 1 0.875 0.75 0.625 0.5 0.375 0.25 0.125 0 -0.125 -0.25 -0.375 -0.5 -0.625 -0.75 -0.875
200 2 1.75 1.5 1.25 1.0 0.75 0.5 0.25 0 -0.25 -0.5 -0.75 -1.0 -1.25 -1.5 -1.75
S27 and S28

Spare.
222.1.2 Outputs
The analog in/channel function code has one block output.
N
Input value with quality.
222.2 Applications
• Refer to the function code 80 description for examples of using function code 222 in hard station control loop
configurations.
• Refer to the function code 221 description for information on assigning function code 222 to Harmony I/O block
channels.
• Refer to the function code 227 description for an example of assigning function code 222 to foreign device
definition I/O channels.
Figure 222-1 illustrates an example of internal cold junction reference compensation for the thermocouple inputs of an AIN-220 Harmony
I/O block. This example also illustrates the use of the shaping algorithm. Only one square-root (function code 7) block needs to be
configured to shape both block number 2002 and 2003. In this example, the 4 to 20 mA inputs represent a pressure of zero to 200 inches
of water (IN H2O). The shaping algorithm is used to convert the pressure from inches of water to the rate of flow in 0 to 50,000 pounds
222-12 2VAA000844R0001 J
222. Analog In/Channel Applications
per hour. Tables 222-3 through 222-9 describe the specification settings for the blocks used in Figure 222-1.
NOTE: Alternate and more convenient settings for function code 222 at block address 2002 and function code 7 at block address
2100 can be used and give the same results:
Function code 222 at block address 2002, specification S3 = 0.
Function code 222 at block address 2002, specification S4 = 1.0
Function code 7 at block address 2100, specification S2 = 50,000.
Figure 222-1 Internal Cold Junction Compensation of Thermocouples
S1 “AIN-220” Sets the device label to AIN-220.
S2 2001 Points to the block address of the function code 222 for channel 1 of the
AIN-220 block.
AIN-220 block.
AIN-220 block.
AIN-220 block.
S6 - S17 2 Indicates the channel is not configured.
2VAA000844R0001 J 222-13
Applications 222. Analog In/Channel
S18 2017 Points to the block address of the function code 222 for channel 17. Chan-
nel 17 on the AIN-220 block is the internal cold junction reference tempera-
ture of the AIN-220 input terminals.
S19 - S25 2 Channel is not provided by the AIN-220 block.
S26 0 No override, status error inhibit, or simulation permitted.
S27 0 I/O block status errors not inhibited.
S28 0 No redundant block expected.
S29 2017 Points to the block address of the cold junction reference temperature,
which in this example is actually the internal cold junction reference of the
block. The CJR temperature is used to calculate the thermocouple compen-
sation for the temperature at the input terminals of the AIN-220 block.
S1 “temperature” Sets the channel label to temperature.
S2 0104 Sets the input type to a nonfiltered Type J thermocouple.
S3 0.0 Engineering units low value is ignored by this input class.
S4 100.0 Engineering units high value is ignored by this input class.
S5 3 Sets the engineering units identifier to degrees Fahrenheit.
S6 200.0 Sets the engineering units high alarm value to 200° F.
S7 34.0 Sets the engineering units low alarm value to 34° F.
S8 2.0 Sets the engineering units significant change to 2.0° F.
S9 2 Indicates that a shaping algorithm is not applied to the value.
S10 0 Ignored since there is no shaping algorithm.
S11 12.0 The lead wire from the thermocouple to the terminals of the AIN-220 block
has a resistance of 12  (= 6  + 6 ).
S12 8 The AIN-220 will average the last eight input samples to increase the
accuracy of the value.
S13 0.0 Custom range low limit is ignored by this input class.
S14 0.0 Custom range high limit is ignored by this input class.
S15 0 This is a normal input.
S16 0.0 Override value is ignored.
S17 0 Override enable is ignored.
S18 2 There is no simulation value.
S19 0 Simulation is not enabled.
S20 0 Status errors are not inhibited.
S21 0.0 A redundant block is not configured.
222-14 2VAA000844R0001 J
S22 0.0 A TU cable does not connect the input to the block.
S23 Null Use default filter time constant.
S1 “inflow” Sets the channel label to inflow.
S2 0000 Sets the input type for a nonfiltered, 4 to 20 mA current source.
S3 0.0 Sets the engineering units low value to 0.0 in. H2O.
S4 200.0 Sets the engineering units high value to 200.0 in. H2O.
S5 11 Sets the engineering units identifier to pounds per hour (lb/hr).
S6 40000.0 Sets the engineering units high alarm value to 40,000 lb/hr.
S7 1000.0 Sets the engineering units low alarm value to 1000 lb/hr.
S8 50.0 Sets the engineering units significant change to 50 lb/hr.
S9 2100 Points to the block address of the shaping algorithm. The shaping algorithm con-
verts the input pressure in inches of water to the rate of flow in pounds per hour.
S10 1 Shape the input value after conversion to engineering units.
S11 0.0 The lead wire resistance is ignored for the high level input class.
S12 8 The AIN-220 averages the last eight input samples to increase the accuracy of
the value.
S1 “outflow” Sets the channel label to outflow.
S2 0000 Sets the input type for a nonfiltered, 4 to 20 mA current source.
2VAA000844R0001 J 222-15
S3 0.0 Sets the engineering units low value to 0.0 in. H2O.
S4 200.0 Sets the engineering units high value to 200.0 in. H2O.
S5 11 Sets the engineering units identifier to pounds per hour (lb/hr).
S6 35000.0 Sets the engineering units high alarm value to 35,000 lb/hr.
S7 500.0 Sets the engineering units low alarm value to 500 lb/hr.
S8 20.0 Sets the engineering units significant change to 20 lb/hr.
S9 2100 Points to the block address of the shaping algorithm. The shaping algorithm con-
verts the pressure in inches of water to the rate of flow in pounds per hour.
S10 1 Shape the input value after conversion to engineering units.
S11 0.0 The lead wire resistance is ignored for the High Level input class.
S12 8 The AIN-220 averages the last eight input samples to increase the accuracy of
the value.
S1 “undefined” Sets the channel label to undefined.
S2 0000 Default input type (nonfiltered, 4 to 20 mA current source.)
S3 0.0 Default engineering units low value.
S4 100.0 Default engineering units high value.
S5 0 Default engineering units identifier.
S6 100.0 Default engineering units high alarm value.
S7 0.0 Default engineering units low alarm value.
S8 0.0 Default engineering units significant change value.
S9 2 Default block address of the shaping algorithm (none).
222-16 2VAA000844R0001 J
S10 0 Default EU conversion/shaping precedence.
S11 0.0 Default lead wire resistance.
S12 0 Default A/D conversion accuracy.
S13 0.0 Default custom range low limit value.
S14 0.0 Default custom range high limit value.
S15 1 This is an undefined input. This function code 222 is used to

reserve this function code block for future use.
S16 0.0 Default override value.
S17 0 Default override enable value.
S18 2 Default block address of simulation value.
S19 0 Default simulation enable value.
S20 0 Default status error inhibit value.
S21 0.0 Default redundant input deviation limit value.
S22 0.0 Default TU cable length value.
S1 “internal CJR” Sets the channel label to internal CJR.
S2 1900 Sets the input type for a filtered internal CJR.
S5 4 Sets the engineering units identifier to degrees Centigrade. The internal

CJR temperature must be in degrees Centigrade.
S6 70.0 Sets the engineering units high alarm value to 70° C.
S7 0.0 Sets the engineering units low alarm value to 0° C.
S8 10.0 Sets the engineering units significant change value to 10° C.
S9 2 Shaping algorithm is ignored by this class.
S10 0 Shaping is ignored by this input class.
S11 0.0 The lead wire resistance is ignored for the this input class.
S12 8 The AIN-220 will average the last eight input samples to increase the
S13 0.0 Custom range low limit is ignored for this input class.
S14 0.0 Custom range high limit is ignored for this input class.
2VAA000844R0001 J 222-17
S1 6 The block address of the input is ignored in this application.
S2 3535.534 Constant required to convert the square-root of the pressure in inches

of water to the flow in pounds per hour.
222-18 2VAA000844R0001 J
Figure 222-2 illustrates an example of external cold junction reference compensation for the thermocouple inputs of the AIN-200 Harmony
I/O block. This example employs a remote terminal block and termination devices: a thermocouple (block 2116) is used as an external
cold junction reference to compensate for the temperature of the remote terminal block, and the termination device’s internal cold junction
reference (block 2117) is used to compensate the thermocouple (block 2116) for the temperature of the termination device. Tables 222-
10 through 222-15 describe the specification settings for the blocks used in Figure 222-2.
Figure 222-2 External Cold Junction Compensation of Thermocouples
S1 “AIN-200 #1” Sets the device label to AIN-200 #1.
first AIN-200 block.
2VAA000844R0001 J 222-19
S29 2116 Points to the block address of the external cold junction reference tem-
perature. The CJR temperature, provided by channel 16 of the second
AIN-200 block, is the temperature of the remote terminal block.
S1 “input temperature” Sets the channel label to input temperature.
S2 0103 Sets the input type to a nonfiltered Type E thermocouple.
S5 4 Sets the engineering units identifier to degrees Centigrade.
S8 5.0 Sets the engineering units significant change to 5.0° C.
S11 66.0 The wire from the thermocouple to the termination device has a
resistance of 66  (= 20  + 30  + 8  + 8 .)
S12 2 The AIN-200 block will average the last two input samples to
increase the accuracy of the value.
S21 0.0 A redundant device is not configured.
S22 10.0 The TU cable length is 10 feet.
222-20 2VAA000844R0001 J
S1 “AIN-200 #2” Sets the device label to AIN-200 #2.
S2 2101 Points to the block address of function code 222 for channel 1 of the sec-
ond AIN-200 block.
S17 2116 Points to the block address of function code 222 for channel 16 of the
second AIN-200 block, which is the temperature of the remote terminal
block. This channel is defined by its input type (S2 of function code 222)
as a CJR, and thus requires the configuration of channel 17, the internal
CJR.
S18 2117 Points to the block address of function code 222 for channel 17 of the
second AIN-200 block. Channel 17 on the AIN-200 block is the internal
cold junction reference; it provides the temperature of the termination
device.
S29 2116 Points to the block address of the cold junction reference temperature.
The CJR for the second AIN-200 block is the value of the thermocouple
connected to channel 16; channel 17, the internal CJR, automatically
provides thermocouple compensation for channel 16.
S1 “output temperature” Sets the channel label to output temperature.
S2 0105 Sets the input type to a nonfiltered Type K thermocouple.
S5 4 Sets the engineering units identifier to degrees Centigrade.
S8 10.0 Sets the engineering units significant change to 10.0° C.
S11 56.0 The wire from the thermocouple to the termination device has a
resistance of 56  (= 20  + 20 + 8  + 8 .)
S12 2 The AIN-200 averages the last two input samples to increase the
2VAA000844R0001 J 222-21
S1 “external CJR” Sets the channel label to external CJR.
S2 1106 Sets the input type for a filtered, Type T thermocouple. Setting the filter
option (one in the thousands digit) indicates that this thermocouple is to
be used as an external CJR, and thus requires the setting of the engi-
neering units (S5) to degrees Centigrade (4), and the configuration of the
internal CJR channel of the I/O block (channel 17 of the AIN-200).
S5 4 Sets the engineering units identifier to degrees Centigrade. The CJR tem-
perature must be in degrees Centigrade.
S11 14.0 The wire from the thermocouple to the terminals of the AIN-200 block has
a resistance of 14  (= 7  + 7 .)
S12 16 The AIN-200 block will average the last 16 input samples to increase the
222-22 2VAA000844R0001 J
S1 “internal CJR” Sets the channel label to internal CJR.
S2 1900 Sets the input type for a filtered internal CJR.
S5 4 Sets the engineering units identifier to degrees Centigrade. The

internal CJR temperature must be in degrees Centigrade.
S9 2 Shaping algorithm is ignored by this class.
S10 0 Shaping is ignored by this input class.
S11 0.0 The lead wire resistance is ignored for the this input class.
S12 16 The AIN-200 block will average the last 16 input samples to
increase the accuracy of the value.
S13 0.0 Custom range low limit is ignored for this input class.
S14 0.0 Custom range high limit is ignored for this input class.
2VAA000844R0001 J 222-23
Figure 222-3 illustrates an example of a user-defined input that requires shaping before conversion to engineering units: The user-defined
input has an input range of -1 V to +3.0 V, which represents 0 PSIA to 200 PSIA; however, the transducer is nonlinear and requires a
function generator block (function code 1) to correct the input value before conversion to engineering units.
Tables 222-16 through 222-18 describe the specification settings for the blocks used in Figure 222-3.
Figure 222-3 User Defined Input
S1 “AIN-120” Sets the device label to AIN-120
AIN-120 device.
S29 2 Indicates that the external CJR is not configured.
222-24 2VAA000844R0001 J
S1 “user-defined” Sets the channel label to user-defined.
S2 0400 Sets the input type to a nonfiltered, user-defined voltage.
S3 0.0 Sets the engineering units low value to 0.0 psia.
S4 200.0 Sets the engineering units high value to 200 psia.
S5 5 Sets the engineering units identifier to psia.
S6 29.4 Sets the engineering units high alarm value to 29.4 psia.
S7 14.7 Sets the engineering units low alarm value to 14.7 psia.
S8 2.5 Sets the engineering units significant change to 2.5 psia.
S9 2500 Points to the block address of the shaping algorithm.
S10 0 Applies the shaping algorithm function code before engineering units
conversion is applied.
S11 0.0 Lead wire resistance is ignored for this input class.
S12 0 A/D conversion accuracy is ignored by the AIN-120 block.
S13 -1.0 Sets the custom range low limit to -1.0 volts.
S14 3.0 Sets the custom range high limit to 3.0 volts.
S22 0.0 Termination cable length is ignored by this input class.
S1 5 The block address of the input is ignored in this application.
S2 -1.0 Input coordinate 1.
S3 -1.0 Output coordinate 1.
S4 -0.6 Input coordinate 2.
S5 -0.2 Output coordinate 2.
S6 0.0 Input coordinate 3.
S7 0.4 Output coordinate 3.
2VAA000844R0001 J 222-25
222-26 2VAA000844R0001 J
223. Analog Out/Channel

The exception reporting analog out/channel function code provides addressing, startup, run-time, and failure mode specifications for an
individual or redundant pair of analog output channels on a Symphony Plus I/O module, PDP800 PROFIBUS Master module, CI850
IOR800/810 module, and SPC700 Controller module Modbus communications. The analog out/channel function code must reside in the
same segment as the I/O device definition function code 221 or foreign device function code 228 to which it is mapped. This function is
required for all configured analog output I/O block channels.

damage in the case of I/O block or S800 I/O module failure.
WARNING
NOTES:
1. This function code is used to support the Symphony Plus I/O modules, PDP800 PROFIBUS Master modules, CI850
IEC 61850 Communication modules, SCI200 Multi-Protocol (IEC 60870-5-104 and DNP3) Communication modules, Harmony I/O
blocks, IOR800/810 modules, and SPC700 Controller module Modbus communications.
ing any device.
Outputs
N R4 Output value (in specified EUs) with quality.
Specifications
S2 N 5 I Note 1 Block address of value to output
S6 N 0 I 0, 1, or 2 Default state on stall
S10 N 0 I 0 to 16 A/D conversion resolution.

PDP800, CI850, SCI200, and SPC700 Modbus commu-
nications: Not used
S12 Y 0.0 R Full Override value
S14 N 2 I Full Block address of simulation value
2VAA000844R0001 J 223-1
S17 Y 9.2 E18 R Full Output deviation limit

PDP800: Contains the data type, offset and size of the
data. Offset is specified in bytes and bits from the start
of the output data. Size is specified in bits. See table
below for keywords.
CI850: This value is filled in automatically by the IEC
61850 engineering tool and should not be changed.
Refer to S+ Control & I/O: CI850 IEC 61850 Communi-
cation Module Hardware and Operation (2VAA003700)
for further information.
type of the analog input acquired from the slave
devices. This value is filled automatically by the DNP
configuration tool and should not be changed. Refer to
S+ I/O: SD Series SCI200: Multi-Protocol (IEC 60870-5-
104 and DNP3) Communication Module Hardware and
Operation (2VAA004355) user manual for more infor-
mation.
SPC700 Modbus Communications only: Contains Mod-
bus register address, Modbus function definition
address, and data type of the analog output sent to the
Modbus slave devices. This value is filled automatically
by the Modbus configuration tool and should not be
changed. Refer to S+ Control: SPC700 Symphony Plus
Controller (2VAA003572) user manual for more informa-
tion.
S19 N 0 I 0-1 Output Type (used only by analog output channels of

SD Series modules)
PDP800: Block address of the next channel function
code associated with this PROFIBUS slave.
SCI200: Block address of the next channel function
code associated with this Multi-Protocol (IEC 60870-5-
104 and DNP3) slave device or DNP slave device.
server.

NOTES:
function code 221 or S11 of the gateway function code 227 is enabled.
223-2 2VAA000844R0001 J
223. Analog Out/Channel Explanation
223.1 Explanation
S1
characters long.
S2
Block address on the controller of the analog value to be output.
S3
(Engineering units low value) Defines the low limit of the output channel’s range engineering units. Does not necessarily indicate a 0
(zero) value.
S4
(Engineering units high value (low + span)) Output of the block at full signal range.
S5
(Engineering units identifier) Identifies the engineering units to be associated to the value when it is displayed on a console.
S6
(Default state on stall) Field outputs enter the configured default state when a loss of communications with the controller occurs.
0 = 0% - channel output to go to 0%
1 = 100% - channel output to go to 100%
2 = hold - channel output to stay at current value
Used on the PDP800 until HNIT timeout occurs in FC227. Then the stall state set by individual PROFIBUS
device DTMs will be used.
S7
S8
(Engineering units low alarm) An alarm will be generated when the input becomes equal or less than this low limit.
S9
(Engineering units significant change) Change in input allowed before the changed value is reported to a console or open access
system.
S10
(A/D conversion resolution) Specifies the relative resolution of the analog-to-digital conversion. The higher the value, the higher the
resolution. A higher value may increase the A/D conversion time or slow the responsiveness of the output.
NOTE: This specification is not used by any of the current analog output or control input/output blocks and should be left at its
default value.
S11
(Normal output/undefined) A value of 0 selects normal output to standard I/O. A value of 1 puts the channel into an undefined state
0 = normal
1 = undefined
S12
(Override value) Channel output value is overridden with this value if override enable (S13) is set to 1.
S13
(Override enable) A value of 0 disables override for this channel. A value of 1 enables override in this channel. Override, if enabled, will
take precedence over normal output and simulation. Specification S26 of the I/O device definition function code 221 must be referenced
to a boolean output that is set to a 1 to permit this operation; otherwise, it is ignored.
0 = disabled
1 = enabled
2VAA000844R0001 J 223-3
Specifications 223. Analog Out/Channel
S14
(Block address of simulation value) Channel output value is simulated with this block input when simulation is enabled and S15 is set
to 1.
S15
input from specification 14. Simulation has precedence over S11 normal output, but not specification S13 override. Specification S26 of
the I/O device definition function code 221 must be referenced to a boolean output that is set to a 1 to permit this operation; otherwise,
it is ignored.
0 = disabled
1 = enabled
NOTE: The field output channel on the I/O block is not affected by the simulation value. When simulation is enabled, the I/O block
physical channels will be held at their last known nonsimulated value.
S16
(Status error inhibit) Inhibits this channel’s I/O error contribution to controller status. Specification S26 of function code 221 or
specification S5 of the foreign device function code 228 must reference a block output with a Boolean value of 1 to permit this operation.
Otherwise, it is ignored.
0 = no
1 = yes
S17
(Output deviation limit) In NORMAL mode (S11=0, S13=0, S15=0), the output deviation limit specifies the maximum deviation permitted
between redundant analog output channels. This only applies when both outputs are of good quality. When the redundant output read
back values are outside the limit, the output channel will be considered in error (function block output quality set to BAD, SUSP flag set
in the exception report, and an LIO error set in the controller status).
In OVERRIDE mode (S11=0, S13=1, S15=X) or in SIMULATION mode (S11=0, S13=0, S15=1), the output deviation limit assumes the
meaning of output demand value deviation limit and thus specifies the maximum deviation permitted between primary output read
back value and the output demand value (<S2>). If the read back value and the output demand value are outside the limit, the state of
the output channel is considered suspect (SUSP flag set in the exception report but no LIO error set in the controller status) since a bump
both in the field output and in the function block output value will occur upon exiting the OVERRIDE or SIMULATION mode.
NOTE: This operates differently if used with a CIO-100 block with an auto-bypass enabled IISAC01 control station. Refer to func-
tion code 80 for more information.
S18
(Foreign device configuration parameters) A string data type containing configuration information specific to the analog output channel
of a foreign device. The format is:
parameter name=value
The configuration parameters can be up to 32 characters long, and a parameter value can range from zero to 255. No spaces are allowed
within an individual parameter specification, and a blank character must separate each successive parameter specification. For example:
RANGE=16 specifies an output range of 4 to 20 mA for a channel of the S800 I/O analog output module. The parameters are module
specific.
S800 Module Types

RANGE Signal Range
AO801 AO810 AO815 AO820 AO845 AO890
0 0...20 mA X X X X
1 -20...20 mA X
2 0...10 V X
3 -10...10 V X
16 4...20 mA1 X X X X X X
18 2...10 V X
NOTE:
1. Default
Refer to the S23 specification of function code 222 to configure information specific to the analog input channel of a foreign device.
PDP800 usage: Contains the data type, offset and size of the data. Offset is specified in bytes and bits from the start of the output data.
Size is specified in bits. See table below for keywords.
223-4 2VAA000844R0001 J
223. Analog Out/Channel Specifications
S18 Parameter Meaning Specification

TYPE Data type of value in PROFI- Unn - unsigned integer field of nn bits in size (2-32) (Default is U8)
BUS slave data
Snn - signed integer field of nn bits in size (2-32)
Fnn - floating point value of nn bits in size (only 32 or 64 are valid)
(Example: TYPE=U16)
DATA Location of the start of the data nn:mm where 'nn' is the byte offset from the beginning of the slave out-
value in the slave output data put data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the
buffer. most significant bit and bit 0 is the least significant. The bit offset is
optional and is assumed to be 7 (MSB) if not specified.
(Example: To identify the least significant nibble of the fourth byte in
the data stream as the starting point use 'DATA=3:3')
PARM Slot and index identifying the nn:mm where 'nn' is the slot number and 'mm' is the index number of
slave parameter. the slave parameter to be represented in this channel. Values will
default to zero if not specified.
(Example: To identify the slave parameter at slot 2 index 4 use
'PARM=2:4')
STAT Location of the status value in nn:mm where 'nn' is the byte offset from the beginning of the slave
(PDP800 only) the slave output data buffer if data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
separate from value. significant bit and bit 0 is the least significant. The bit offset is optional
and is assumed to be 7 (MSB) if not specified. A zero indicates OK, a
set bit (=1) indicates a channel error.
RBSTAT Location of the readback status nn:mm where 'nn' is the byte offset from the beginning of the slave
(PDP800 only) value in the slave output data data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
buffer if separate from value. significant bit and bit 0 is the least significant. The bit offset is optional
RANGE Signal range of output channel 0= 0...20 mA
for S800 I/O. This is also used
1= -20...20 mA
with the PDP800 when S800
I/O is connected through a 2= 0...10 V
CI840.
3= -10...10 V
16= 4...20 mA
18= 2...10 V
S19
(Output Type) The output type specifies the output channel mode for analog output channels of SD Series modules. It is not needed for
other Symphony output type devices.
High Level (class 0):
2VAA000844R0001 J 223-5
Outputs 223. Analog Out/Channel
000 = 4mA to 20mA

001 = +1Vdc to +5Vdc
S20
Spare.
S21
function code 228. This specification is also the link to the next element of the foreign device definition function code 222 to monitor the
primary, secondary, tertiary, and quaternary HART variables. The default value indicates that this block is the last element. .
For controllers that do not support foreign device interfaces, this specification must be set
to the default value.
• PDP800 usage: Block address of the next channel function code associated with this PROFIBUS slave.
• CI850 usage: Block address of the next channel function code associated with this IEC 61850 IED.
• SCI200 usage: Block address of the next channel function code associated with this Multi-Protocol (IEC 60870-5-
104 and DNP3) slave device.
• SPC700 Modbus Communications usage: Block address of the next channel function code associated with this
Modbus server.
S22 through S24

Spare.
223.1.2 Outputs
The analog out/channel function code 223 has one block output.
N
Block output value with quality.
223.2 Applications
• Refer to function code 80 for examples of using function code 223 in a hardstation control loop configuration.
• Refer to function code 221 for information on assigning function code 223 to Symphony Plus I/O module or
Harmony block I/O channels.
• Refer to function code 227 for an example of assigning function code 223 to foreign device definition I/O channels.
223-6 2VAA000844R0001 J
224. Digital In/Channel

The exception reporting digital in/channel function code provides addressing, startup, run-time, Harmony sequence of events (HSOE),
and failure mode specifications for an individual or redundant pair of digital input channels on a Symphony Plus I/O module, PDP800
PROFIBUS Master module, CI850 IEC 61850 Communication module, SCI200 Multi-Protocol (IEC 60870-5-104 and DNP3)
Communication module, Harmony I/O block, IOR800/810 module, and SPC700 Controller module Modbus communications. The digital
in/channel function code must reside in the same segment as the I/O device definition function code 221 or foreign device function code
228 to which it is mapped. This function is required for all configured digital input I/O block channels.
NOTES:
IOR800/810 modules, and SPC700 Controller module Modbus communications only.
3. All HSOE points (HSOE enabled with S10=1) must be constrained to the first sixteen channels (configured in S2 through S17)
of the associated I/O device definition function code 221, or the first sixteen channels of the associated foreign device definition
function code 228 (first channel configured in S4).
ing any device. .
Outputs
N B Input value with quality
Specifications
S2 Y 2 I 0, 1, or 2 Alarm state
S3 Y 4 I 0 to 255 Debounce period in msec
S5 Y 0 B 0 or 1 Override value
S10 N 0 B 0 or 1 HSOE enable
S11 N 5 I 5 - 50 HSOE buffer size
S12 N 0 I 0 - 255 HSOE maximum events
S13 N 0 I 0 - 60 HSOE event time interval
S14 N 0 I 0 - 60 HSOE off-scan time interval
2VAA000844R0001 J 224-1
S15 N NULL String 0 - 32 Foreign device configuration parameters.

PDP800: Contains the offset of the data. Offset is speci-
fied in bytes and bits from the start of the input data. See
table below for keywords.
for further information.
type of the analog input acquired from the slave
devices. This value is filled automatically by the DNP
configuration tool and should not be changed. Refer to
S+ I/O: SD Series SCI200: Multi-Protocol (IEC 60870-5-
104 and DNP3) Communication Module Hardware and
Operation (2VAA004355) user manual for more informa-
tion.
SPC700 Modbus Communications only: Contains Mod-
bus register address, Modbus function definition
address, and data type of the analog input acquired
from the Modbus slave devices. This value is filled auto-
matically by the Modbus configuration tool and should
not be changed. Refer to S+ Control: SPC700 Sym-
phony Plus Controller (2VAA003572) user manual for
more information.
code associated with this IEC 60870-5-104 slave device
or DNP slave device.
server.

NOTES:
224-2 2VAA000844R0001 J
224. Digital In/Channel Explanation
224.1 Explanation
S1
characters long.
S2
(Alarm state) Non-normal state.
0 = logic 0 alarm
1 = logic 1 alarm
2 = no alarm
S3
(Debounce period) Time allowed for stabilization of contacts (in milliseconds). The valid range is 0 to 255, with 0 meaning no debounce.
Not used for foreign device definition (function code 228) channels except by modules DI825, DI830, DI831, DI840, and DI885.
S4
which will not affect the channel status. Specifications S6 and S8 take precedence when S4 = 0, but not when S4 = 1.
0 = normal
1 = undefined
S5
(Override value) The channel input value is overridden with this value if override enable (S6) is set to 1.
S6
take precedence over normal input and simulation. Specification S26 of the I/O device definition function code (function code 221) must
reference a boolean output that is set to a 1 to permit this operation. Otherwise, it is ignored.
0 = disabled
1 = enabled
NOTE: A channel for which override is enabled will still be displayed on the HSOE log if the channel is HSOE enabled (S10=1).
S7
S8
input from S7. Simulation has precedence over specification S4 normal input, but not S6 override. Specification S26 of the I/O device
definition function code 221 must reference a boolean output that is set to a 1 to permit this operation. Otherwise, it is ignored.
0 = disabled
1 = enabled
NOTE: A channel for which simulation is enabled will be displayed on the HSOE log if the channel is HSOE enabled (S10=1).
S9
(Status error inhibit) Inhibits this channel’s I/O error contribution to the controller status. Specification S26 of function code 221 or
specification S5 of the foreign device function code 228 must reference a Boolean output with a value of 1 to permit this operation.
Otherwise, it is ignored.
0 = no
1 = yes
S10
(HSOE enable) Sequence-of-events (0 = No, 1 = Yes). Enables sequence of events processing and allocates buffer space.
NOTE: The only way to eliminate a point from an HSOE log is to disable HSOE.
S11
(HSOE buffer size) Number of events that will fit in buffer (5 - 50). Sequence-of-events queue size = 8  (S11 + 1). The maximum number
of event records that is possible to store before a buffer overflow occurs.
2VAA000844R0001 J 224-3
Specifications 224. Digital In/Channel
S12
(HSOE maximum events) Maximum events (0 - 255). The maximum number of digital input events that are recorded within the specified
time interval (spec 13). Used for filtering in sequence of events. A value of 0 disables this feature.
S13
(HSOE event time interval) Event time interval (0 - 60). The time period (in seconds) in which events would be limited. Used for filtering
in sequence of events. A value of 0 disables this feature.
S14
(HSOE off-scan time interval) Off-scan time interval (0 - 60 in seconds). This value specifies the time interval the digital input will be
off-scan with respect to the events history buffer. Used for filtering in sequence of events. A value of 0 disables this feature.
S15
(Foreign device configuration parameters) A string data type containing configuration information specific to the digital input channel
of a foreign device. The configuration parameters can be up to 32 characters long. No spaces are allowed within an individual parameter
specification, and a blank character must separate each successive parameter specification. For example: NORM=1 specifies the normal
position for a channel of the S800 digital input module. The parameters are module specific.
These specific parameters are valid only for sequence of events (SOE) supporting S800 modules (DI825, DI830, DI831, DI840, and
DI885) and PDP800. They are not valid for the CI850 module, SCI200 module, and SPC700 module. Continue reading for the
descriptions of this specifications for those modules.
NOTE: To avoid configuration mismatch module problem reports, enter a blank string in specification S15 for DI810 applications.
The DI810 does not support the SOE function.
Parameter Meaning
NORM=(0...1) Normal position. NORM=0 (default) or NORM=1. Specifies the normal sig-
nal input value. This specification is used in first event determination. For
example, if the parameter NORM=0 is specified, and the S800 module is
powered-up or reset and the SOE channels input state is a 1, an initial SOE
event will be reported. However, if the parameter NORM=1 is specified and
the S800 module is powered-up or reset and the SOE channel’ input state is
a 1, an initial SOE event will not be reported. This parameter applies only to
the first event reported by the module. All subsequent input state changes
will be reported by the module.
BLOCK=(0...1) Block SOE events for this channel. BLOCK=0 (default) or BLOCK=1. This
specification is used to control whether state changes on this channel are
included in the SOE reporting. If the parameter BLOCK=0 is used, state
changes will be reported for SOE. If the parameter BLOCK=1 is used, state
changes will be blocked and will not contribute to the SOE report.
PDP800 usage: Contains the offset of the data. Offset is specified in bytes and bits from the start of the input data. See table below for
keywords.

DATA Location of the data value in nn:mm where 'nn' is the byte offset from the beginning of the slave
the slave input data buffer. data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
significant bit and bit 0 is the least significant. The bit offset is optional
and is assumed to be 7 (MSB) if not specified.
(Example: To identify the least significant bit of the fourth byte in the
data stream as the value use 'DATA=3:0'.).
'PARM=2:4').
224-4 2VAA000844R0001 J
224. Digital In/Channel Outputs

(PDP800 only) the slave input data buffer if data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
S16
S17
(Block address of next element of the foreign device) Link to the next element of the foreign device definition function code 228. The
default value indicates that this block is the last element. S17 must be set to the default value if function code 224 is configured as a
channel of an I/O device definition function code 221.
• PDP800: Block address of the next channel function code associated with this PROFIBUS slave.
• CI850: Block address of the next channel function code associated with this IEC 61850 IED.
• SCI200: Block address of the next channel function code associated with this IEC 60870-5-104 slave device or
DNP slave device.
• SPC700 Modbus communications: Block address of the next channel function code associated with this Modbus
server.
S18 through S20

Spare
NOTE: S12, S13, and S14 act as an event filter to prevent a chattering digital input from filling a block (or controller) event history
buffer. The specifications will temporarily place the digital input channel off-scan after the maximum number of events occur (S12)
for the specified time interval (S13). The input channel would be placed back on-scan after the off-scan time interval (S14) had
elapsed. This feature allows the channel to discard subsequent events when an excessive number of events occur during a
defined time interval.
Example:
The maximum events specification (S12) is set to four, the event time interval (S13) is set to one second, and the off-scan time interval
(S14) is set to one, and the digital input detected twenty events within one second. Only the first four events would be entered into the
event history buffer, the remaining events would be discarded, and the scan would be restarted after one second.
224.1.2 Outputs
The digital in/channel (function code 224) has one block output.
2VAA000844R0001 J 224-5
Application 224. Digital In/Channel
N
Boolean input value with quality.
224.2 Application
• Refer to function code 221 for information on assigning function code 224 to Symphony Plus I/O module or
Harmony I/O block channels.
The following notes apply to the function code operation in NORMAL, OVERRIDE, and SIMULATION modes:
In NORMAL mode (S4=0, S6=0, S8=0) with both inputs having quality good but the states do not match, the input channel will be
considered in error (SUSP set in the exception report and an LIO error set in the controller status).
In OVERRIDE mode (S4=0, S6=1, S8=X), the primary input state and override state (S6) are compared, and if they do not match, the
input channel is considered suspect (SUSP flag set in the exception report, but no LIO error set in the Harmony controller status) since
a bump in the block output value will occur upon exiting the OVERRIDE mode.
In SIMULATION mode (S4=0, S6-0, S8=1), the primary input state and the simulated state (<S7>) are compared and if they do not match,
will cause a suspect condition for this channel (SUSP flag set in the exception report, but no LIO error set in the Harmony controller
status).
224-6 2VAA000844R0001 J
225. Digital Out/Channel

The exception reporting digital out/channel function code provides addressing, startup, run-time, and failure mode specifications for an
individual or redundant pair of digital output channels on a Symphony Plus I/O module, PDP800 PROFIBUS Master module, CI850
IOR800/810 module, and SPC700 Controller module Modbus communications. The digital out/channel function code must reside in the
same segment as the I/O device definition function code 221 or foreign device function code 228 to which it is mapped. This function is
required for all configured digital output I/O block channels.

damage in the case of I/O block or S800 I/O module failure.
WARNING
NOTES:
IOR800/810 modules, and SPC700 Controller module Modbus communications only.
3. Specifications for PROFIBUS slaves may differ from those defined for other foreign devices. Review the specifications care-
fully before configuring any device.
ing any device. .
Outputs
N B Output value with quality
Specifications
S2 N 0 I Note 1 Block address of value to be output
S3 Y 2 I 0, 1, or 2 Alarm state, non-normal state
S4 N 0 I 0, 1, or 2 Default state on stall
S5 N 0 B 0 or 1 Readback enable
PDP800: Not used
CI850: Not used
CI200: Not used
SPC700 Modbus Communication: Not used
S6 N 0 B 0 or 1 Normal output/undefined
S7 Y 0 B 0 or 1 Override value
2VAA000844R0001 J 225-1

PDP800: Contains the offset of the data. Offset is spec-
ified in bytes and bits from the start of the output data.
See the table below for keywords.
user manual for further information.
SCI200 DNP 3.0: Contains Index address and data type
of the binary output sent to the slave devices. This
value is filled automatically by the DNP configuration
tool and should not be changed. Refer to SCI200: Multi-
Protocol (IEC 60870-5-104 and DNP3) Communication
Module Hardware and Operation) user manual for more
information.
SPC700 Modbus Communication: Contains Modbus
register address, Modbus function definition address
and data type of the binary output sent to the Modbus
slave devices. This value is filled automatically by the
Modbus configuration tool and should not be changed.
Refer to S+ Control: SPC700 Symphony Plus Controller
user manual for more information.
S14 N 0 B 0 or 1 Spare
S15 N 2 I Note 1 Block address of the next element of the foreign device
code associated with this IEC 60870-5-104 slave
device or DNP slave device.
server.

NOTES:
225-2 2VAA000844R0001 J
225. Digital Out/Channel Explanation
225.1 Explanation
S1
characters long.
S2
(Block address of value to be output) Block address on the controller of the value to be output.
S3
(Alarm state, non-normal state) This specification is tunable but not adaptable.
0 = logic 0 alarm
1 = logic 1 alarm
2 = no alarm
S4
(Default state on stall) The state that the field outputs enter when a loss of communications with the controller occurs.
0=0
1=1
2 = Hold
Used on the PDP800 until HNIT timeout occurs in FC227. Then the stall state set by individual PROFIBUS
device DTMs will be used.
S5
(Readback enable) The output channels can have optional readback hardware present. This specification must match the hardware
configuration with respect to whether this option is enabled.
0 = disable readback
1 = enable readback
This option must always be enabled for foreign device definition (function code 228) channels.
PDP800, CI850, SCI200, and SPC700 Modbus communications: Not used
S6
(Normal output/undefined) A value of 0 selects normal output (S2) to standard I/O. A value of 1 puts the channel into an undefined state
which will not affect the channel status. Specifications S8 and S10 take precedence when S6 = 0, but not when specification S6 = 1.
0 = normal
1 = undefined
S7
(Override value) The channel output value is overridden with this value if override enable (S8) is set to 1.
S8
take precedence over normal output (S6) and simulation (S10). Specification S26 of the I/O device definition function code 221 must
reference a boolean output that is set to a 1 to permit this operation; otherwise, it is ignored.
0 = disabled
1 = enabled
S9
(Block address of simulation value) The channel output value is simulated with this block input when simulation is enabled (S10 = 1).
S10
input from S9. Simulation has precedence over S6 normal output, but not S8 override. Specification S26 of the I/O device definition
function code 221 must reference a boolean output that is set to a 1 to permit this operation; otherwise, it is ignored.
0 = disabled
1 = enabled
NOTE: The field output channel on the I/O block is not affected by the simulation value. When simulation is enabled, the I/O block
physical channels will be held at their last known non-simulated value.
2VAA000844R0001 J 225-3
Specifications 225. Digital Out/Channel
S11
(Status error inhibit) Inhibits this channel I/O error contribution to Harmony controller status. Specification S26 of the I/O device
definition function code 221 or specification S5 of the foreign device function code 228 must reference a Boolean output that is set to a
1 to permit this operation. Otherwise, it is ignored.
0 = no
1 = yes
S12
(Foreign device configuration parameters) A string data type containing configuration information specific to the digital output channel
of a foreign device. The configuration parameters can be up to 32 characters long. No spaces are allowed within an individual parameter
specification, and a blank character must separate each successive parameter specification. Only the DO840 has a defined configuration
parameter to specify the action to be taken when a channel fault is detected. Refer to the following table for more information.
Parameter Meaning
FAILMODE=(0...3) Action to take when an output channel error is detected.
FAILMODE=0 (default), channel error is automatically reset for all channels.
FAILMODE=1, channel error is automatically reset for channels 9-16, but
channel error is latched for channels 1-8.
FAILMODE=2, channel error is latched for channels 9-16, but channel error
is automatically reset for channels 1-8.
FAILMODE=3, channel error is latched for channels 1-16.
PDP800 usage: Contains the offset of the data. Offset is specified in bytes and bits from the start of the output data. See the table below
for keywords.

DATA Location of the data value in nn:mm where 'nn' is the byte offset from the beginning of the slave out-
the slave output data buffer. put data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the
most significant bit and bit 0 is the least significant. The bit offset is
optional and is assumed to be 7 (MSB) if not specified.
(Example: To identify the least significant bit of the fourth byte in the
data stream as the value use 'DATA=3:0'.).
'PARM=2:4').
(PDP800 only) the slave output data buffer if data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
RBSTAT Location of the readback status nn:mm where 'nn' is the byte offset from the beginning of the slave
(PDP800 only) value in the slave output data data (0-243) and 'mm' is the bit offset (0-7). Note that bit 7 is the most
buffer if separate from value. significant bit and bit 0 is the least significant. The bit offset is optional
225-4 2VAA000844R0001 J
225. Digital Out/Channel Output
S13
S14
Spare.
S15
(Block address of next element of the foreign device) Link to the next element of the foreign device definition function code 228. The
default value indicates that this block is the last element. S15 must be set to the default value if function code 225 is configured as a
channel of an I/O device definition function code 221.
• PDP800: Block address of the next channel function code associated with this PROFIBUS slave.
• CI850: Block address of the next channel function code associated with this IEC 61850 IED.
• SCI200: Block address of the next channel function code associated with this IEC 60870-5-104 slave device or
DNP slave device.
• SPC700 Modbus communications: Block address of the next channel function code associated with this Modbus
server.
S16 through S18

Spare.
225.1.2 Output
The digital out/channel function code has one output.
N
Boolean block output value, with quality.
225.2 Applications
• Refer to function code 221 for information on assigning function code 225 to Harmony I/O block channels.
The following notes apply to the function code operation in NORMAL, OVERRIDE, and SIMULATION modes:
In NORMAL mode (S6=0, S8=0, S10=0) with both outputs having quality good but the states do not match, the output channel will be
considered in error (SUSP set in the exception report and the LIO error bit set in the Harmony controller status).
In OVERRIDE mode (S6=0, S8=1, S10=X) or in SIMULATION mode (S4=0, S5=0, S8=1), the primary readback state and the output
demand state (<S2>) are compared and if they do not match, will cause a suspect condition for this channel (SUSP flag set in the
exception report but no LIO error set in the Harmony controller status) since a bump both in the field output and in the block output value
will occur upon exiting the OVERRIDE or SIMULATION mode.
2VAA000844R0001 J 225-5
Applications 225. Digital Out/Channel
225-6 2VAA000844R0001 J
226. Test Status Explanation
226. Test Status

The test status function code identifies and monitors specific status conditions of the Harmony function codes that are not available as
block outputs. The test status function code is able to monitor up to four single status conditions simultaneously. The status conditions
are logically OR'ed such that if any of the status conditions transitions to a true state, the output will also be true (logic 1). Otherwise, the
output of the block is false (logic 0).
The output of the test status function code can be used for control logic and exception reporting functions.
Outputs
Block Type Description
N B Result of logically OR'ed status conditions

1 through 4:
0 = false
1 = true
Specifications
S1 N 2 I Note 3 Block address of Harmony I/O function code

to test.
S2 Y1 Null E90 string2 0-4 Device string for status condition 14
S6 Y1 0 I Full Spare
S10 Y1 Null E90 string2 0-32 Spare

NOTES:
1. These specifications are tunable, but not adaptable.
2. The E90 string type cannot be tuned to a string that is longer than the length of the originally
configured string. Thus, this specification cannot be tuned if it is configured with the default null string.
31,998 for the HC800, BRC-400/410, HPG800, and HAC
4. See Tables for applicable device strings.
226.1 Explanation
S1
Block address of the Harmony I/O function code to be tested. The test status function block must reside in the same controller segment
as the block to be tested.
S2
Specifies the first status condition to test on the block specified by specification S1. Each Harmony I/O function code has a list of valid
status conditions that may be tested. The status condition is specified as a string of characters (device string) which must be valid for the
function code. (The null string represents a logic zero). Refer to the following in this section:
• Function Code 146 Status Conditions
2VAA000844R0001 J 226-1
Function Code 146 Status Conditions 226. Test Status

• Function Codes 222 and 223 Status Conditions
• Function Codes 224 and 225 Status Conditions
S3
Specifies the second status condition to test on the block specified by specification S1. Refer to the preceding explanation for
specification S2.
S4
Specifies the third status condition to test on the block specified by specification S1. Refer to the preceding explanation for specification
S2.
S5
Specifies the fourth status condition to test on the block specified by specification S1. Refer to the preceding explanation for specification
S2.
S6 through S9
Spare integer parameters.
S10
Spare E90 string parameter.
226.1.2 Function Code 146 Status Conditions
Remote I/O BRC300/400/410 (function code 146) may be tested for the status conditions shown in Table 226-1. The terms primary or
backup refer to the current logical state of a device and does not represent the physical position of the device in a MMU slot. If redundant
devices are not installed (i.e. no backup device exists), all status conditions applied to the backup device evaluate to a logic zero.
Table 226-1 Function Code 146 Status Conditions
Primary Backup
Status Condition
Device String Device String
PCHK BCHK Checkpoint complete.
PERR BERR Device has an error.
PEST BEST Communication established with device. If this

status condition is FALSE, all other status condi-
tions for the device evaluate to FALSE.
PFTX BFTX First time in execute.
PHAR BHAR Hnet A relay failure (not valid for HN800).
PHBR BHBR Hnet B relay failure (not valid for HN800).
PHNA BHNA Hnet A failure / HN800 A failure
PHNB BHNB Hnet B failure / HN800 B failure
PLIO BLIO Local I/O error.
PNVF BNVF Nonvolatile memory failure
PPWA1 BPWA1 Input power A failure.
226-2 2VAA000844R0001 J
226. Test Status Function Code 207 Status Conditions
Primary Backup
Status Condition
PPWB1 BPWB1 Input power B failure.
PRDA BRDA Redundancy link A failure.
PRDB BRDB Redundancy link B failure.
PRDD BRDD Redundant device detected.
PRDF BRDF Redundant device failed.
PSOA1 BSOA1 Status output alarm
PSTA (Not applicable) Station Error

NOTE:
1. PPWA, BPWA, PPWB, BPWB, PSOA, and BSOA are not supported when a BRC
controller is communicating to Symphony Plus SD Series I/O (SDIO) over an HN800 Harmony
Communications Network through a PBA800 Process Bus Adapter.
Module Status Monitor/CW800 (function code 207) blocks may be tested for the status conditions shown in Table 226-2. The terms
primary or backup refer to the current logical state of a device and does not represent the physical position of the device on the mounting
base. If redundant devices are not installed (i.e., no backup device exists), all status conditions applied to the backup device evaluate to
a logic zero
Primary Backup Applicable Applicable

Status Condition
Device String Device String to HC800 to CP800
PBLO BBLO Battery low. Yes No
PCHK BCHK Checkpoint complete. Yes No
PERR BERR Device has an error. Yes Yes
PEST BEST Communication established with device. If this status Yes Yes
condition is FALSE, all other status conditions for the
device evaluate to FALSE.
PFPW 1 BFPW Field power failure. No No
PFTX BFTX First time in execute. Yes No
PPNA BPNA CW800 A failure Yes Yes
PPNB BPNB CW800 B failure Yes Yes
PHNA BHNA HN800 A failure / Hnet A failure. Yes Yes
PHNB BHNB HN800 B failure / Hnet B failure. Yes Yes
PLIO BLIO Local I/O error. Yes No
PNVF BNVF Nonvolatile memory failure. Yes No
PPWA BPWA Input power A failure. Yes Yes
PPWB BPWB Input power B failure. Yes Yes
PRDA BRDA Redundancy link A failure. Yes Yes
2VAA000844R0001 J 226-3
Table 226-2 Function Code 207 Status Conditions (Continued)
Primary Backup Applicable Applicable

Status Condition
Device String Device String to HC800 to CP800
PRDB BRDB Redundancy link B failure. Yes Yes
PRDD BRDD Redundant device detected. Yes No
PRDF BRDF Redundant device failed. Yes No
PRIO BRIO Remote I/O error Yes No
PSOA BSOA Status output alarm. No No
PCWA BCWA Controlway A failure No No
PCWB BCWB Controlway B failure No No
PET1 BET1 Error on Primary Ethernet Port 1 (labeled ‘A’ on the Yes2 Yes3
MB810 base)
PET2 BET2 Error on Primary Ethernet Port 2 (labeled ‘B’ on the Yes2 Yes3
MB810 base)
NOTES:
1. The PFPW string is not supported by the DI01, DI02, DI03, and DI04 SD Series Digital Output modules, and the PI01 SD
Series Pulse Input Module.
2. PET1 refers to the SOE Time Synchronization Ethernet network (labeled EN1 A on the MB810 base) running on the
primary and backup HC800 control processors being tested. PET2 refers to the Foreign Device Interface Ethernet network
(labeled EN1 B on the MB810 base) running on primary and backup HC800 control processors being tested.
3. PET1 and PET2 refer to the PN800 Ethernet network (labeled EN2 on the MB810 base) connected to the primary and
backup CP800 communication processor being tested.
Harmony I/O device definition (function code 221) blocks may be tested for the status conditions shown in Table 226-3. The terms primary
or backup refer to the current logical state of a device and do not represent the physical position of the device in a redundant termination
base. If redundant devices are not installed (i.e. no backup device exists), all status conditions applied to the backup device evaluate to
a logic zero.
Primary Backup
Status Condition
PAFP BAFP Auxiliary field power failure.
PCHK BCHK Checkpoint complete.
PERR BERR Device has an error.
PEST BEST Communication established with device. If this status condition is

FALSE, all other status conditions for the device evaluate to
FALSE.
PFPW 1 BFPW Field power failure.
PFTX BFTX First time in execute.
PHAR BHAR Hnet A relay failure (not valid for HN800).
PHBR BHBR Hnet B relay failure (not valid for HN800).
PHNA BHNA Hnet A failure / HN800 A failure.
PHNB BHNB Hnet B failure / HN800 B failure.
226-4 2VAA000844R0001 J
Primary Backup
Status Condition
PLIO BLIO Local I/O error.
PNVF BNVF Nonvolatile memory failure.
PPWA BPWA Input power A failure.
PPWB BPWB Input power B failure.
PRDA BRDA Redundancy link A failure.
PRDB BRDB Redundancy link B failure.
PRDD BRDD Redundant device detected.
PRDF BRDF Redundant device failed.
PSOA BSOA Status output alarm.
PSTA not applicable Station error.

NOTE:
1. The PFPW string is not supported by the DI01, DI02, DI03, and DI04 SD Series Digital Output
modules, and the PI01 SD Series Pulse Input Module.
2VAA000844R0001 J 226-5
Function Codes 222 and 223 Status Conditions 226. Test Status
Figure 226-1 illustrates the connection made to function code 221 to test for status conditions.
Figure 226-1 Test Status Connection for Function Code 221
226.1.5 Function Codes 222 and 223 Status Conditions
Harmony I/O analog in/channel (function code 222) and analog out/channel (function code 223) function code blocks may be tested for
the status conditions shown in Table 226-4. The status conditions apply only to the primary channel of a redundant pair.
Table 226-4 Function Codes 222 and 223 Status Conditions
Device String Status Condition
ALRM Alarm state.
BADQ Bad quality.
CALI Calibration error.
CONF Configuration error.
HALM High alarm.
HDEV(a) High deviation alarm.
INHB Status errors are inhibited.
LALM Low alarm.
226-6 2VAA000844R0001 J
226. Test Status Function Codes 224 and 225 Status Conditions
Table 226-4 Function Codes 222 and 223 Status Conditions (Continued)
LDEV(b) Low deviation alarm.
OPEN Open circuit.
OVER Value is over range.
OVRD Output value overridden.
PRPQ Propagated quality.
RANG Range error (open/short/over/under).
RBAK Readback channel is bad.
REFR Reference is bad.
SHRT Short circuit.
SIML Simulation mode enabled.
SUSQ Suspect quality.
UNDR Value is under range.

(a) Not valid when function code 222 is in override or simulation
mode
(b) Not valid when function code 222 is in override or simulation
mode
226.1.6 Function Codes 224 and 225 Status Conditions
Harmony I/O digital in/channel (function code 224) and digital out/channel (function code 225) function code blocks may be tested for the
status conditions shown in Table 226-5. The status conditions apply only to the primary channel of a redundant pair.
Table 226-5 Function Codes 224 and 225 Status Conditions
ALRM Alarm state.
BADQ Bad quality.
Gateway (function code 227) blocks may be tested for the status conditions shown in Table 226-6. The terms primary or backup refer to
the current logical state of a device and does not represent the physical position of the device in a redundant termination base. If
redundant devices are not installed (i.e., no backup device exists), all status conditions applied to the backup device evaluate to a logic
zero The gateway function code (function code 227) supports Harmony communication devices (IOR800/810) and the Symphony Plus
PDP800 PROFIBUS Master module, the CI850 EC 61850 module, and the SCI200 IEC60870-5-104 module. Status conditions that are
2VAA000844R0001 J 226-7
applicable to the IOR800/810, the PDP800, the CI850, and the SCI200 are shown in Table 226-6.
Primary Backup
Applicable to Applicable to Applicable to Applicable to
Device Device Status Condition
IOR800/810 PDP800 CI850 SCI200
String String
P1ER B1ER Communication port 1 has an error. Yes Yes Yes Yes
P1NO B1NO Communication port 1 is inoperative. Yes Yes Yes Yes
PAFP BAFP Auxiliary field power failure. Yes Yes Yes Yes
PBLO BBLO Battery low. Yes1 No Yes Yes
PCHK BCHK Checkpoint complete. Yes Yes No No
PERR BERR Device has an error. Yes Yes Yes Yes
PEST BEST Communication established with Yes Yes Yes Yes

device. If this status condition is FALSE,
all other status conditions for the device
evaluate to FALSE.
PFPW 2 BFPW Field power failure. Yes No Yes Yes
PFTX BFTX First time in execute. Yes Yes No No
PHAR BHAR Hnet A relay failure (not valid for Yes1 No Yes Yes
HN800).
PHBR BHBR Hnet B relay failure (not valid for Yes1 No No No

HN800).
PHNA BHNA Hnet A failure / HN800 A failure. Yes Yes Yes Yes
PHNB BHNB Hnet B failure / HN800 B failure. Yes Yes Yes Yes
PLIO BLIO Local I/O error. Yes Yes Yes Yes
PNVF BNVF Nonvolatile memory failure. Yes Yes Yes Yes
PPWA BPWA Input power A failure. Yes No No No
PPWB BPWB Input power B failure. Yes No No No
PRDA BRDA Redundancy link A failure. Yes Yes No No
PRDB BRDB Redundancy link B failure. Yes Yes No No
PRDD BRDD Redundant device detected. Yes Yes No No
PRDF BRDF Redundant device failed. Yes Yes No No
PSOA BSOA Status output alarm. Yes1 No No No
PPER BPER Peripheral board status No No Yes Yes

NOTES:
1. Not available in IOR800/810 firmware revision G_4 or later.
2. The PFPW string is not supported by the DI01, DI02, DI03, and DI04 SD Series Digital Input modules, and the PI01 SD Series Pulse Input
Module.
Foreign device definition (function code 228) function code blocks may be tested for the status conditions shown in Table 226-7. The
226-8 2VAA000844R0001 J
status conditions apply to the primary device or a backup device of a redundant pair.
Primary Backup
Status Conditions
ERRS BERR Foreign device has an error.
INOP BINO Foreign device is inoperative.
Pulse In/Channel (function code 229) function code blocks may be tested for the status conditions shown in Table 226-8. The status
conditions apply only to the primary channel of a redundant pair.
ALRM Alarm state.
BADQ Bad quality.
HALM High alarm.
HDEV High deviation alarm.
LALM Low alarm.
LDEV Low deviation alarm.
OVER Value is over range.
POWR Transducer field power failure.
RANG Range error (over/under range).
UNDR Value is under range.
2VAA000844R0001 J 226-9
Gateway (function code 247) modules may be tested for the status conditions shown in Table 226-9.
Primary Backup
Status Condition
TYPE (not applicable) Invalid channel type specified for channel.
PROB (not applicable) Invalid probe type specified for channel.
PTID (not applicable) Duplicate point ID specified for channel.
IPAD (not applicable) Invalid IP address specified for channel.
WARN (not applicable) Non-critical error has occurred on channel.
HALT (not applicable) Critical error has occurred on channel.
TUFL (not applicable) Termination unit failure has occurred.
MERR (not applicable) Module error has occurred.
ETHF (not applicable) Ethernet failure has occurred.
ALHI (not applicable) High alert condition exists on channel.
ALLO (not applicable) Low alert condition exists on channel.
DNHI (not applicable) High danger condition exists on channel.
DNLO (not applicable) Low danger condition exists on channel.
CONF (not applicable) Configuration error has occurred on channel.
FLHI (not applicable) High probe failure has occurred on channel.
FLLO (not applicable) Low probe failure has occurred on channel.
FLOP (not applicable) Open circuit has occurred on channel.
FLSH (not applicable) Short circuit has occurred on channel.
STRT (not applicable) Channel is in startup mode.
CALI (not applicable) Channel is calibrating.
SUSP (not applicable) Channel has suspect quality.
EVST (not applicable) Channel has no event marker input.
DVSA (not applicable) Dual vote alert condition exists on channel.
DVSD (not applicable) Dual vote danger condition exists on channel.
CTWF (not applicable) Time waveform data collection is in progress on

channel.
BUFF (not applicable) Time waveform buffer is full on channel.
RNUP (not applicable) Run-up data collection is complete on channel.
RNDN (not applicable) Run-down data collection is complete on channel.
EVLG (not applicable) Event log data collection is complete on channel.
ALSP (not applicable) Alert set point has been exceeded on channel.
226-10 2VAA000844R0001 J
Table 226-9 Function Code 247 Status Conditions (Continued)
Primary Backup
Status Condition
DNSP (not applicable) Danger set point has been exceeded on channel.
ZRSP (not applicable) Zero speed condition exists on channel.
2VAA000844R0001 J 226-11
226-12 2VAA000844R0001 J
227. Gateway
227. Gateway
The Gateway function code supports communication gateways to foreign I/O systems from Symphony Harmony and Symphony Plus
controllers. The Gateway function code is used to define the foreign I/O gateway interface, such as the IOR800/IOR810 (to S800 I/O),
PDP800 (to PROFIBUS DP), CI850 (to IEC 61850), or Harmony Gateway Software running in the BRC 410 or HC800 controller (to TCP).
The Gateway function code defines the Hnet/HN800 device label, settings for the gateway, and settings for the foreign I/O system
communication port(s) on the gateway. Refer to the user manual for the gateway module being used for further information on configuring
function code 227.
NOTES:
2. This function code is not supported by IMMFP11/12 and HAC controllers.
3. Function code 227 must reside in the same segment as the foreign device definition (function code 228) and I/O channel
(function code 222, 223, 224, 225, and 229) function codes to which it is mapped.
4. Specifications, parameters, and allowable parameter values may differ between I/O gateways. Review the appropriate mod-
ule user manual carefully before configuring any device.
5. Symphony Plus Engineering and Harmony Gateway Software provide examples and templates for the proper configuration of
function code 227. These examples and templates should be used to configure function code 227.
6. Settings in the string specs. S2 and S4 are all of the form “AAAA=xxxx” where 'AAAA' is an alphanumeric identifier for a par-
ticular configurable parameter and 'xxxx' is the value for that parameter. See the specification descriptions for the recognized iden-
tifiers. Multiple parameters can be entered by separating the configurations by a space (that is, AAAA=xxxx BBBB=yyyy). If an
identifier is not specified, the default value will be used by the gateway module. If an identifier is not recognized or used by a gate-
way module, it is ignored.
Outputs
N B Primary communication block status with quality
N+1 B Backup communication block status with quality
N+2 B Communication port 1 status with quality
N+7 R4 Reserved output with quality
2VAA000844R0001 J 227-1
227. Gateway
Specifications
S1 N NULL String 0-32 32-character device label. This label must match
the label set in the module.
S2 N NULL String 0-255 Harmony communication block configuration

parameters.
PDP800: Defines settings that apply to the
PDP800 globally. See table below for settings.
CI850: Defines the version of the .cff file used to
configure the IEC 61850 application.
SCI200 IEC 60870-5-104: Defines the commu-
nication configuration parameter of the IEC
60870-5-104 master or slave device.
SCI200 DNP 3.0: Defines the communication
configuration parameter of the DNP master
device.
SPC700 Modbus TCP: Defines the communica-
tion configuration parameter of the SPC700 con-
troller Modbus device.
S3 N 2 I Note 1 Block address of first foreign device definition for

communication port 1.
PDP800: Block address of the first PROFIBUS
slave on this PROFIBUS channel.
CI850: Block address of the first IED on the IEC
61850 sub-network.
SCI200: Block address of the first slave device
on the IEC 60870-5-104 or DNP network.
SPC700 Modbus TCP: Block address of the
first slave device on the Modbus network.
S4 N NULL String 0-255 Communication port 1 configuration parameters

PDP800: Defines the PDP800 PROFIBUS bus
address and bus-level configuration parameters
(speed, timing, time out, etc.) for channel 0.
Default values will be applied unless specifically
overridden within this specification. Refer to the
table under S4 in Specifications for more infor-
mation.
CI850: Defines the CI850 main parameters,
such as IP address and others. Refer to S+ Con-
trol & I/O: CI850 IEC 61850 Communication
Module Hardware and Operation (2VAA003700)
for a complete description.
SCI200: Defines the SCI200 main parameters,
such as IP address and others. S+ I/O: SD
Series SCI200: Multi-Protocol (IEC 60870-5-104
and DNP3) Communication Module Hardware
and Operation (2VAA004355) user manual for
more information.
SPC700 Modbus TCP: Defines the Modbus
communication role whether it is configured as a
server or client.
S5 - Reserved for future Spare

S10
227-2 2VAA000844R0001 J
227. Gateway Specifications
S11 N 2 I Note 1 Block address of override / status error inhibit /

simulation permit
S13 N 0 B 0 or 1 Redundant gateway expected

PDP800 and CI850, and SCI200: 0 = No redun-
dancy is expected
1 = redundancy expected. Bad status will be
issued if redundant module fails, is not installed,
or fails.
S15 N 0 I 0-32,767 NVM buffer size

IOR800/810, HC800, PDP800, CI850 and
SCI200: Unused
S16 N 2 I Note 1 Block address of the next HSOE gateway func-

tion code 227 or device definition function code
221.
Note: If SOE functionality is not used in an
IOR800/810, then its function code 227 must not
be linked.
PDP800: Unused
S19 Y NULL String 0-255 Spare

NOTES:
31,998 for the HC800, BRC-400/410, and HPG800
2. The specification value active state is permitted to operate only when S11 of the gateway is enabled.
S1
(Device label) Device label of string data type used as a logical address of the Harmony communication block. This label must match
the device label configured in the Harmony communication block. The device label can be up to 32 characters long. For proper operation,
the label cannot be null.
PDP800, CI850 and SCI200 usage: Device label of string data type used as a logical address of the PDP800, CI850, or SCI200 module.
This label must match the device label configured in the PDP800, CI850, or SCI200 module. The device label can be up to 32-characters
long. For proper operation, the label cannot be null.
S2
(Harmony communication configuration parameters) A string data type containing configuration information specific to the Harmony
communication device. Sample templates provided by Composer Harmony, Composer Field, and Harmony Gateway Software simplify
the configuration of IOR800/810, PDP800, CI850, SCI200, and HC800 modules. Only advanced users should attempt to make changes
directly to the S2 parameter.
PDP800, CI850, SCI200, and SPC700 Modbus TCP usage: Defines settings that apply to the PDP800, CI850, and SCI200 globally. See
2VAA000844R0001 J 227-3
Specifications 227. Gateway
table below for settings.
S21
Meaning Value1
Parameter
TYPE Specifies the type of gateway. 'S800' indicates an S800 (Default)

IOR800/810 interface to S800 I/O modules. 'PROFI-
PROFIBUS
BUS' indicates a PDP800 interface to a PROFIBUS-
DP system. ‘ETHER’ indicates an Ethernet interface ETHER
for use with Harmony Gateway software communicat-
ing over Modbus TCP.
“IEC61850” indicates an interface to an IEC 61850 IEC61850
subnet though a CI850 module.
"PROTO" indicates an interface to an IEC 60870-5- PROTO
104 network through a SCI200 module.
HNIT HNIT, or HN800 Idle Timeout, specifies the maximum 15000 (Default)
time allowed between Channel I/O messages on
(PDP800
HN800. It is used to determine how long the PDP800
only)
should wait before setting the PROFIBUS to a fail-safe
state due to loss of communication from the controller
for reasons other than a HN800 bus stall (which is
detected immediately by hardware). It is measured in
milliseconds. Hard-coded default in the PDP800 is
15000 ms (fifteen seconds).
For example, if HNIT=500 the PDP800 will set the
HN800 Idle Timeout to be 500ms (one-half second).
Note: The value used for HNIT must be at lease 2
times the scan cycle of the controller.
SCL Startup Cycle Length (SCL) “SCL=xxxx” where ‘xxxx’ is

the delay in ms.
(PDP800 The time that the PDP800 takes to allow data to filter
only) through all of the internal data buffers. After the SCL Default = 0250
expires, all data buffers should have valid data. If data Range = 0000 to 9999
buffers have incorrect or invalid data, it will be passed
to the field device or the controller.
During the Startup Cycle Length, the PDP800 holds
input and output data static. This happens on failover
and online configuration.
MINSCAN Optional specification string is used to set a minimum “MINSCAN=nnn”, where

scan cycle time for the IOR800/810. This specification 'nnn' is the number of milli-
(IOR only)
can be used to allow more time for intrinsically safe seconds between scans of
(IS) modules to start up (AI890, etc.). During startup the I/O modules by the
the IOR800/810 reads this value and sets the target IOR800/810. The value is
period for its segment execution to the specified value. not range-checked and any
If no value is specified the IOR defaults to its current value is acceptable, but it
behavior; scanning as fast as it can (the segment exe- should not be set higher
cution scan cycle is dependent on the number of than the associated seg-
devices connected, the fewer devices, the faster the ment cycle time in the con-
IOR800/810 will complete the scan cycle). troller.
VERSION This string represents the version of the .ccf file that is The version in this string
being downloaded into the CI850, SCI200, or must match what is speci-
(CI850,
SPC700. fied in the .cff file
SCI200,
and
SPC700
only)
1. S2 parameters and values are subject to change and all possible parameters and values are not listed
here. See the appropriate hardware or software user manual for additional parameters and values that
may be required for proper operation of the hardware or software application.
227-4 2VAA000844R0001 J
S3
(Block address of first foreign device definition for communication port 1) Links the gateway function code 227 to the first foreign
device definition function code 228 in the list of function codes 228 for communication port 1 of the Harmony communication device. The
default value indicates that the communication port is not configured.
• PDP800: Block address of the first PROFIBUS slave on this PROFIBUS channel.
• CI850: Block address of the first IED on the IEC 61850 sub-network.
• SCI200: Block address of the first slave device on the IEC 60870-5-104 or DNP network.
• SPC700 Modbus TCP: Block address of the first slave device on the Modbus network.
S4
(Communication port 1 configuration parameters) A string data type containing configuration information specific to the
communication port 1 of the Harmony communication device. Refer to Gateway and Communication Port Configuration Parameters
for a description of the string format to be used.
Specification S4 defines the PDP800 PROFIBUS bus address and bus-level configuration parameters (speed, timing, time out, etc) for
channel 0. Default values will be applied unless specifically overridden within this specification. Refer to the following table for the
PDP800 settings.
Specification S4 defines some of the CI850 IEC 61850 and SCI200 IEC608370-5-104 configuration parameters (speed, timing, time out,
etc). Default values will be applied unless specifically overridden within this string spec. Refer to the following table for CI850 settings.
PDP800 S4 Parameters
S4
Meaning Specification
Parameter
ADDR Station address of the master on the PRO- 0 through 125 (default is zero)
FIBUS
BAUD Baud rate to be used by the master in Parameter Value Meaning

communicating with the slave modules.
9600 9.6Kbaud
19K 19.2Kbaud
93K 93.75Kbaud
187K 187.5Kbaud
500K 500Kbaud
1M 1.5Mbaud (Default)
3M 3.0Mbaud
6M 6.0Mbaud
12M 12.0Mbaud
MXTS Maximum Tsdr - time out value (number of Baud Rate Default MXTS
bit times) representing the maximum time
9600 60
after which the slave must have processed
a request and responded. The default 19K 60
value is dependent on the baud rate.
93K 60
187K 60
500K 100
1.5M 150
3M 250
6M 450
12M 800
MNSI Minimum slave interval - minimum time (in Default = 10

milliseconds) required between two polling
cycles for the same slave.
2VAA000844R0001 J 227-5
S4
Parameter
TQUI Quiet Time. The quiet time is the time Baud Rate Default TQUI
during which the PROFIBUS control logic
9600 0
has to close its sender and its receiver.
Measured in bit times. 19K 0
93K 0
187K 0
500K 0
1.5M 0
3M 3
6M 6
12M 9
TSET Setup Time. Indicates the latency of the Baud Rate Default TSET
data link layer. Measured in bit times.
9600 1
19K 1
93K 1
187K 1
500K 1
1.5M 1
3M 4
6M 8
12M 16
TTR Target Rotation Time. The target rotation Baud Rate Default TTR
time Ttr is the maximum permissible rota-
9600 300000uL
tion time of a token in the PROFIBUS net-
work. Measured in bit times. 19K 300000uL
93K 300000uL
187K 300000uL
500K 100000uL
1.5M 300000uL
3M 300000uL
6M 300000uL
12M 300000uL
227-6 2VAA000844R0001 J
S4
Parameter
TSL Slot Time. The slot time is the maximum Baud Rate Default TSL (Tbit)
time that the master (requester/initiator)
9600 100
will wait for the first byte of the response or
a frame from the token receiver after a 19K 100
token exchange.
93K 100
187K 100
500K 300
1.5M 300
3M 400
6M 600
12M 1000
MNTS Minimum Station Delay Time Responder. Baud Rate Default MNTS (Tbit)
The minimum time delay to be observed
9600 11
by responders before responding.
19K 11
93K 11
187K 11
500K 11
1.5M 11
3M 11
6M 11
12M 11
GAP Gap Update Factor. Together with the tar- Baud Rate Default GAP (Tbit)
get rotation time, the GAP update factor
9600 1
determines the cycle for GAP updating.
19K 1
93K 1
187K 1
500K 1
1.5M 10
3M 10
6M 10
12M 10
2VAA000844R0001 J 227-7
S4
Parameter
MXRL The maximum number of frame repetitions 0 through 7 (default is defined by baud rate (see
indicates how often the master repeats a below))
request, after the end of the slot time,
before it designates the responder as not
available.
Defines the PDP800 PROFIBUS bus Baud Rate Default MXRL

address and bus-level configuration
parameters (speed, timing, time out, etc.) 9600 1
for channel 0. Default values are applied
19K 1
unless specifically overridden within this
specification. 1
93K
187K 1
500K 1
1.5M 1
3M 2
6M 3
12M 4
BPF Bus Parameter Flags. The bus parameter BPF Flag States Hex Value
flags are used to choose the operating
mode of the PROFIBUS master. Eight dif- PROFIBUS_BP_- 0x00
ferent flag states are possible. Enter the FLAG_NOT_SYNC
hex value to obtain the desired behavior.
PROFIBUS_BP_- 0x01 (Default)
FLAG_ASPC2_WATCH-
DOG_DISABLE
PROFIBUS_BP_- 0x02
FLAG_EQUI_MODE_-
DISABLE
PROFIBUS_BP_- 0x08
FLAG_BUFF-
ERED_SYNC
PROFIBUS_BP_- 0x10
FLAG_EN-
HANCED_SYNC
PROFIBUS_BP_- 0x20
FLAG_ISOM_SYNC
PROFIBUS_BP_- 0x40
FLAG_ISOM_FREEZE
PROFIBUS_BP_- 0x80
FLAG_ERROR_ACTION
DCTO Data Control Time. The data control time Default = 1000, (1000x10ms or 10 seconds)
indicates the maximum time interval within
which a valid exchange of process data
has taken place between the master and a
slave. The values for the data control time
are given in 10ms increments.
227-8 2VAA000844R0001 J
CI850 and SCI200 S4 Parameters
S4
Parameter
LIEDName Name of the Logical IED A string (examples CI850_A2, SCI200_A2
LAPName Access Point name A string (example: S1)
LIPAddress1 The IP address of the CI850 or SCI200 A string containing a valid IP address (example:
172.18.1.11). Default = 192.168.1.1.
LnetMask The network mask Example: 255.255.255.0 (which is also the default
value)
1. Note: It is extremely unlikely that a given default address (CI850 and SCI200 default is 192.168.1.1) will fit into your network. Pay extra care in
making sure you are entering a valid IP address for specification LIPAddress.
S5
S6
S7
S8
S9
S10
S11
(Block address of override / status error inhibit / simulation permit) Links to a function block which will provide a Boolean indication
as to whether a particular feature is permitted. If the value from the attached Boolean output is zero, no override, status error inhibit, or
simulation is permitted on any foreign device or channel of that foreign device. If the value from the attached Boolean output is one,
override, status error inhibit, or simulation is permitted on any associated function block.
S12
(Device status error inhibit) If set to one, inhibits all status errors originating from the Harmony communication device from being
included in the controller's status. The default value causes all Harmony communication device, foreign device, and channel errors to be
included in the controller's status if not otherwise inhibited at the foreign device or channel level.
S13
(Redundant module expected) If set to one, a redundant module is always expected. If a redundant module is not found (function code
227 output N+1 = 1 and has BAD quality), the controller generates a module problem report. If set to zero, then no redundant module is
expected, but may exist.
2VAA000844R0001 J 227-9
Outputs 227. Gateway
S14
S15
(NVM buffer size) Specifies the minimum number of two-byte words to reserve for storage of uploaded Harmony communication device
foreign configuration data received from the foreign side of the gateway (e.g., Foundation Fieldbus LAS files). This foreign configuration
data is downloaded to the Harmony communication device upon the replacement of the Harmony communication device. The default
value prevents the upload of the foreign configuration data. The IOR-800/810 module does not have foreign configuration data to store
in the NVM buffer.
S16
(Block address of the next HSOE gateway function code 227 or device definition function code 221) This specification is required
only when the digital inputs (function code 224) associated with the foreign device definition function code 228 are being used as part of
a Harmony sequence of events (HSOE) system.
S17 through S19

Spare.
227.2 Outputs
The communication block status outputs (N, N+1) are the error summary of the communication device’s overall operation status (i.e.,
Harmony network, redundancy, power, configuration status, and communication ports status) and error summary of all configured foreign
devices and their channels.
N
Primary communication block status (0 = good, 1 = bad). Quality is set bad when function code 227 cannot communicate with the primary
communication device.
PDP800, CI850, SCI200, and SPC700 Modbus TCP usage: Conveys the status of the primary (active running) PDP800, CI850, or
SCI200. If there is a problem with the PDP800, CI850, or SCI200 itself, this value will be set to bad (logic 1).
N+1
Backup communication block status (0 = good, 1 = bad). Quality is set bad when function code 227 cannot communicate with the backup
communication device.
PDP800 usage: Conveys the status of the backup/standby PDP800. If there is a problem with the backup PDP800 (if a one is expected),
this value will be set to bad (logic 1). If communication is lost with the backup, the output will go bad quality with a value of bad (logic 1).
If redundancy is not enabled (function code 227 S13 is 0/FALSE), or if the backup is healthy and ready to takeover, this will be set to
good (logic 0) with normal quality.
N+2
Communication port 1 status (0 = good, 1 = bad). Quality is set bad when the communication port 1 is inoperative.
PDP800 usage: Conveys the status of the first PROFIBUS channel. Communication port 1 status (0 = good, 1 = bad). Quality is set bad
when the communication port 1 is inoperative. Any problems with the bus itself will be conveyed by setting this value to bad (logic 1). A
general failure of this channel will cause the output to be a logic 1 with bad quality.
SCI200 and SPC700 Modbus TCP usage: Indicates the cable removal status.
If N+2 =1 then the cable is removed.
If N+2 =0 then the cable is connected.
N+3
PDP800, CI850, and SPC 700 Modbus TCP usage: Not used.
N+4
PDP800, CI850, SCI200, and SPC700 Modbus TCP usage: Not used.
N+5
Communication port #4 status (0 = good, 1 = bad). Quality is set bad when the communication port 4 is inoperative.
227-10 2VAA000844R0001 J
227. Gateway Outputs
PDP800, CI850, SCI200, and SPC700 Modbus TCP usage: Not used.
N+6
Spare output with quality always set good.
N+7
Reserved output with quality always set good.
Gateway and Communication Port Configuration Parameters

NOTE: Refer to the product instruction document of the ABB device for information regarding the configuration parameters for the
device and its communication ports.
The following format is used to specify Harmony communication device configuration parameters (S2) and communication port
configuration parameters (S4, S6, S8, & S10) within a string data-type specification.
The following rules pertain to parameter declarations:

• A configuration parameter string must not exceed 255 characters in length.
• All characters within the string must use ASCII codes.
• The parameter number must be followed immediately by the equal/assignment (=) symbol.
• The parameter value must immediately follow the assignment (=) symbol.
• A space (Hex 20) character must be used to delimit each parameter declaration.
• Case is not significant.
• The ASCII space character is not permitted within the string portion of the parameter declaration unless the entire
string is enclosed within single quotes.
Application
Figure 227-1 illustrates how foreign device definition function code 228 and channel function codes 222 through 225 are used in operation
2VAA000844R0001 J 227-11
Outputs 227. Gateway
with the gateway function code 227.
Figure 227-1 Function Codes Used with function code 227 for IOR800/IOR810 and S800 I/O
227-12 2VAA000844R0001 J
228. Foreign Device Definition

The foreign device definition function code is required for all foreign devices.
Function code 228 is used to:

• Make appropriate assignments of function codes 222, 223, 224, 225, and 229 to foreign device channels. Each
foreign device incorporates a specific combination of channel data types (digital input, digital output, analog input,
analog output, and pulse input).
• Define PROFIBUS slaves associated with a PDP800. There must be one instance of Function code 228 for each
slave device.
• Define Intelligent Electronic Devices (IED) associated with a CI850; these are communicating using the Ethernet-
based IEC 61850 protocol, of which both MMS and GOOSE are supported. There must be one instance of function
code 228 for each IED.
• Define IEC 60870-5-104 slave devices associated with a SCI200; these are communicating using the Ethernet-
based IEC 60870-5-104 protocol. There must be one instance of function code 228 configured for each slave
device.
• Define DNP slave devices associated with a SCI200; these are communicating using the Ethernet based DNP 3.0
protocol. There must be one instance of function code 228 configured for each slave device.
Define Modbus slave devices associated with a SPC700 controller; these are communicating using Modbus TCP protocol. There must be
one instance of function code 228 for each slave device should be configured.
•
NOTES:
2. All HSOE points (HSOE enabled with S10=1 of function code 224) must be constrained to the first sixteen channels of the
associated foreign device definition function code 228.
3. This function code is not supported by IMMFP11/12 and HAC01 controllers.
4. Function code 228 must reside in the same segment as the gateway function code 227 to which it is mapped.
ing any device.
Outputs
N B Primary communication block status with quality.
N+1 R4 Detailed status and communication quality of primary and backup redun-
dant I/O modules.
2VAA000844R0001 J 228-1
Specifications
S1 N NULL String 0-32 32-character device label

PROFIBUS devices: PROFIBUS device address
(0-125) and PROFIBUS identification number
(0000 - FFFE) separated by some delimiter charac-
ter (non-alphanumeric).
SCI200 IEC 60870-5-104 slave device:
Device Name
SCI200 DNP slave device: Device Name
SPC700 Modbus TCP: Device name
S2 N NULL String 0-2553 Foreign device configuration parameters

IEC61850: Defines the network configuration
parameters of the IEDs such as IP address,
Access point name, Subnet mask, and Gateway
address.
IEC104: Defines the network configuration parame-
ters of the slave devices such as IP address, Sub-
net mask, Gateway address, port number test
frames frequency, and timeout.
DNP: Defines the network configuration parame-
ters of the slave devices such as IP address, Sub-
net mask, Gateway address, Port number, timeout
and, Polling period.
SPC700 Modbus TCP: Defines the network config-
uration Parameters of the slave devices such as IP
address, Subnet mask, Gateway address, Port
number, retry, timeout, and Polling period.
S3 N 2 I Note 1 Block address of the next foreign device.

PROFIBUS devices: Block address of the next
PROFIBUS slave device (function code 228) on
this PROFIBUS channel.
SCI200 IEC 60870-5-104 devices: Block address
of the next IEC 104 slave device (function code
228).
SCI200 DNP devices: Block address of the next
DNP slave device (function code 228).
SPC700 Modbus devices: Block address of the
next Modbus slave device (function code 228).
S4 N 2 I Note 1 Block address of first channel.

PROFIBUS devices: Block address of the first
input or output channel in this slave.
IEC61850 devices: Block address of the first
DNP Devices: Block address of the first input
or output channel in this slave.
IEC 104 Devices: Block address of the first
228-2 2VAA000844R0001 J
228. Foreign Device Definition Specifications
S7 N NULL String 0-2553 Spare.

PROFIBUS devices: Foreign device parameteriza-
tion data
NOTES:
2. The specification value active state is permitted to operate only when S11 of the gateway function
code 227 is enabled.
3. The allowable range is 0-500 for the PDP800 PROFIBUS module.
S1
(Device label) Device label of string data type used as a logical address of the foreign device. This label must match the device label
configured in the foreign device. The device label can be up to 32 characters long. For proper operation, the label cannot be null and
cannot be a duplicate of any other foreign device or channel label configured for the same communication port of its gateway function
code 227.
For S800 I/O modules, the device label specifies the Modulebus address. The Modulebus address consists of a cluster number (1 to 7)
and a module position (1 to 12) with a single delimiter character in between. A valid delimiter can be any non-numeric character. For
example, the label 1.12 specifies cluster number 1, module position 12. The module address must start at the beginning of the label. Any
text then can follow the address as long as it is delimited from the address. For example, 3.1: Cluster #3, Module #1 is a valid label for
the S800 module at cluster number 3, module position 1.
PDP800 usage: PROFIBUS device address (0-125) and PROFIBUS identification number (0000 - FFFE) separated by some delimiter
character (non-alphanumeric). If this represents a CI840 connected to S800 I/O modules, this spec. must also contain the string “CI840”
following the PROFIBUS address (e.g., 2:ABCD CI840).
CI850 usage: a string which defines the name of the IEC61850 IED.
S2
(Foreign device configuration parameters) A string data type containing configuration information specific to the foreign device. The
configuration parameters can be up to 255 characters long. No spaces are allowed within an individual parameter specification, and a
blank character must separate each successive parameter specification.
Example 1: TYPE=AI835 GRID=50 FJT=12.34 specifies an AI835 analog input module with a power grid frequency of 50 Hz and a fixed
junction temperature of 12.34 degrees Celsius.
Example 2: TYPE=DI840 REDUNDANT=1 SUPERVISE=0 specifies a redundant pair of DI840 Digital Input Modules with sensor voltage
supervise disabled.
Example 3: TYPE=DO840 REDUNDANT=1 TIMEOUT=512 specifies a redundant pair of DO840 Digital Output Modules with OSP time-
out set to 512 milliseconds.
Example 4: TYPE=DP840 REDUNDANT=1 EXTSHUNT=1 XDRTYPE=1 specifies a redundant pair of DP840 Pulse Counter Modules,
external shunt configured, 12 volt inputs configured.
Example 5: TYPE=AI843 REDUNDANT=1 GRID=60 FJT=25 specifies a redundant pair of AI843 Analog Input Modules, Grid frequency
is 60 Hz, Fixed Junction Temperature is 25 degree C.
Example 6: TYPE=DI810 FILTER=16 specifies a DI810 Digital Input Module with input debounce filter time set to 16 milliseconds.
The parameters are module specific (refer to the following tables).
PDP800 Usage: For PROFIBUS device PDP800, this specification contains the configuration byte string to be sent to the slave device.
The string is identified with ‘PFCD=?’ at the beginning of the string. Up to 500 characters may be used to define this specification.
The debounce/filter parameter is not determined by this specification for S800 modules DI825, DI830, DI831, DI840, and DI885. It is
2VAA000844R0001 J 228-3
Specifications 228. Foreign Device Definition
instead determined by specification 3 of function code 224.
Table 228-1 FC 228 S2 Parameters
S2 Parameter Meaning Specifications S800 Modules
TYPE S800 I/O module type. AI801, AI810, AI815, AI820, AI825,
AI830, AI835, AI835A1, AI843, AI845,
AI890, AO801, AO810, AO815, AO820,
AO845, AO890, DI801, DI810, DI811,
DI814, DI820, DI821, DI825, DI830,
DI831, DI840, DI885, DI890, DO801,
DO810, DO814, DO815, DO820, DO821,
DO840, DO890, DP820, DP840
TIMEOUT Communication time-out (ms) 0, 256, 512, 1024 2 DO8XX, AO8XX
02, 256, 512, 1024 DP820
FILTER Filter time (ms). 22, 4, 8, 16 DI801, DI810,

DI811, DI814,
DI820, DI821,
DI890
GRID Power grid frequency (Hz). 16, 50, 60 2 AI801, AI810,

(Selecting 16 speci- AI815, AI820,
fies 16 2/3 Hz). AI825, AI830,
AI835, AI835A,
AI843, AI845,
AI890
FJT Fixed junction temperature (deg Cel- -40...+100 AI835, AI835A,

sius). AI843
SENSOR Sensor type. 02, 1, 2, 3, 4, 5, 6, 7, DI825, DI830,

8, 9, 10, 11, 12, 13, DI831, DI885
Example: SENSOR=2 for 48V external
14, 15
Refer to Table 228-2
and Table 228-3 for
supported modules
and settings for the
SENSOR parame-
ter.
PSMODE Sensor power supply type. 0, 1, 2, 3, 4, 52, 6, 7, DI825, DI830,

8, 9, 10, 11, 12, 13, DI831, DI885
Example: PSMODE=2 for 48V exter-
14, 15
nal
Refer to Table 228-2
and Table 228-3 for
supported modules
and settings for the
PSMODE parame-
ter.
SUPERVISE To disable voltage supervision, spec- 03 DI820, DI821,

ify TYPE=xxx SUPERVISE=0. For DI825, DI840,
DI820, DI821, and DI825, this permits AI845
use of channels 1 and 8 as normal
inputs.
To return to the default supervisory
setting, specify TYPE=xxx only.
Replace xxx with DI820, DI821, DI825,
DI840, or AI845 as necessary
228-4 2VAA000844R0001 J
Table 228-1 FC 228 S2 Parameters (Continued)
S2 Parameter Meaning Specifications S800 Modules
REDUNDANT Redundant I/O modules 0 2= non redundant DI840, DO840,

1 = redundant AI845, AO845,
DP840, AI843
DEACTIVATE Deactivate all channels in group if 0 2= disabled DO840

internal error detected. 1 = enable for chan-
nels 9-16 only
2 = enable for chan-
nels 1-8 only
3 = enable for chan-
nels 1-16
PULSETEST Pulse test output channels in group. 0 2= enabled

1 = disabled for
channels 9-16 only
2 = disabled for
channels 1-8 only
3 = disabled for
channels 1-16
EXTSHUNT External shunt installed. 0 2= internal shunt AI845, DP840

1 = external shunt
XDRTYPE Transducer type 0 = Namur DP840

1 2= 12 V
2 = unused/invalid
3 = 24 V
NOTES:
1. TYPE=AI835 is valid for both AI835 and AI835A. Do not use TYPE=AI835A.
2. Default if parameter not specified.
3. Default is enabled, only allowed to specify disabled.
Table 228-2 Modules Supported by FC 228 S2 Parameters
S2 Parameter
REDUNDANT
DEACTIVATE
PULSETEST
SUPERVISE
EXTSHUNT
XDRTYPE
TIMEOUT
PSMODE
SENSOR
FILTER
Module Type
GRID
FJT
DI801 •
DI810 •
DI811 •
DI814 •
DI820 • •
DI821 • •
DI825 • • •
DI830 • •
DI831 • •
DI885 • •
DO801 •
2VAA000844R0001 J 228-5
Table 228-2 Modules Supported by FC 228 S2 Parameters (Continued)
S2 Parameter
REDUNDANT
DEACTIVATE
PULSETEST
SUPERVISE
EXTSHUNT
XDRTYPE
TIMEOUT
PSMODE
SENSOR
FILTER
Module Type
GRID
FJT
DO810 •
DO814 •
DI815 •
DO820 •
DO821 •
AI801 •
AI810 •
AI815 •
AI820 •
AI825 •
AI830 •
AI835 • •
AI835A • •
AO801 •
AO810 •
AO815 •
AO820 •
AO845 • •
DI890 •
DO890 •
AI890 •
AO890 •
DP820 •
DP840 • • •
DI840 • •
DO840 • • • •
AI845 • • • •
AI843 • • •
228-6 2VAA000844R0001 J
Table 228-3 FC 228 S2 Specification Settings for SENSOR and PSMODE
Group 1 Group 2
(Channels 1 - 8) (Channels 9 - 16)
Specification
SENSOR PSMODE SENSOR PSMODE
0 Type 1 48V external Type 1 48V external
2 Type 1 48V external Type 3 24V internal
3 Type 1 48V external Type 4 Spare
6 Type 2 24V external Type 3 24V internal
7 Type 2 24V external Type 4 Spare
8 Type 3 24V internal Type 1 48V external
9 Type 3 24V internal Type 3 24V external
10 Type 3 24V internal Type 3 24V internal
11 Type 3 24V internal Type 4 Spare
12 Type 4 Spare Type 1 48V external
13 Type 4 Spare Type 2 24V external
14 Type 4 Spare Type 3 24V internal
15 Type 4 Spare Type 4 Spare
CI850 Usage: For CI850, this specification contains the configuration information for the IED. See the following table for details.
Table 228-4 CI850 IEC 61850 S2 Parameter List
S2 Parameter Meaning Specifications

IEDName Name of the IEC61850 IED example: ‘My_IED_0002’
APName Access point name example: ‘S1’
IPAddress IP address of the IEC61850 IED example:;10.39.11.1’
NetMask Network mask for the IEC61850 IED example: ‘255.255.255.0’
Note: It is extremely unlikely that a given default address (For IEDs is 192.168.1.2) will fit
into your network. Pay extra care in making sure you are entering a valid IP address for
specification IPAddress.
Table 228-5 SCI200 IEC 60870-5-104 S2 Parameters List
S2 Parameter Meaning Example Specification Syntax

FUNC Function of module, either master or slave FUNC = SLA
IP Primary IP address of the slave (if SCI200 is master) IP = 192.168.1.2
2VAA000844R0001 J 228-7
Table 228-5 SCI200 IEC 60870-5-104 S2 Parameters List (Continued)
S2 Parameter Meaning Example Specification Syntax
SeIP Secondary IP address of the slave (if SCI200 is master) SeIP = 13.13.13.13
(optional)
ADDR Station Address of the device. ADDR = 1000
T0 TimT0 parameter value. Expressed in milliseconds. T0 = 3000

Default is 30000.
T1 TimT1 parameter value. Waiting time for the acknowledg- T1 = 15000

ment of the sent frame. Expressed in milliseconds.
Default is 15000.
T2 TimT2 parameter value. Waiting time before sending and T2 = 10000

acknowledging. Expressed in milliseconds. Default is
10000.
T3 TimT3 parameter value. Waiting time before sending a T3 = 30000

test frame. Expressed in milliseconds. Default is 30000.
TimW TimW parameter value. Number of frames received TimW = 8

before sending an acknowledge. Default value is 8.
TimK TimK parameter value. Maximum number of frames sent TimK = 12

before receiving an acknowledge. Default value is 8.
DEV Future use DEV = 0
ACCEPTED CONNECTIONS This field appears only when the SCI200 is configured as ACON = 2
a slave. It defines the number of masters that can con-
nect to it simultaneously.
CYCLIC DATA TRANSMISSION This means that the Analog Outputs may also be sent on CYC = 30
a cyclic basis. The value is expressed in seconds.
ACTTERM Used to specify whether the slave will respond with Acti- ACTTERM = YES
vation termination or not. or
ACTTERM = NO
PORT Used to specify the port number of the slave. PORT = 2404
S3
(Block address of the next foreign device) Links the foreign device function code 228 to the next foreign device definition function code
228 in the list of foreign devices for the communication port of the gateway function code 227. The default value indicates the end of the
list.
• PDP800 usage: Block address of the next PROFIBUS slave device (function code 228) on this PROFIBUS
channel.
• CI850 usage: Block address of the next IED (function code 228) on the IEC 61850 sub network.
• SCI200 IEC 60870-5-104 usage: Block address of the next slave (function code 228) on the IEC 60870-5-104 sub
network.
• SCI200 DNP usage: Block address of the next slave (function code 228) on the DNP sub network.
• SPC700 Modbus TCP usage: Block address of the next slave (function code 228) on the Modbus sub network.
S4
(Block address of the first channel) Links the foreign device function code 228 to the first channel function code 222, 223, 224, 225,
or 229 of the foreign device. The default value indicates that there are no channels configured for this foreign device.
For S800 I/O modules, the channel function code blocks are assigned to the channels of the S800 module in the order that they are
specified in the linked list. That is, the first channel function code block in the linked list is assigned to the first channel of the module, the
second channel function code block to the second channel, and so on up to the last used channel of the module. In order to skip an
unused channel of a module, configure a channel function code block with its Normal/Undefined specification set to undefined.
• PDP800 usage: Block address of the first input or output channel in this slave.
228-8 2VAA000844R0001 J
228. Foreign Device Definition Outputs
• CI850 usage: Block address of the first input or output channel in this IED.
• SCI200 IEC 60870-5-104 usage: Block address of the first input or output channel in the slave devices.
• SCI200 DNP usage: Block address of the first input or output channel in this slave.
• SPC700 Modbus TCP usage: Block address of the first input or output channel in this slave.
S5
(Device status error inhibit) If set to one, inhibits all status errors originating from the foreign device from being included in the gateway
function code 227 status. The default value causes all foreign device and channel errors to be included in the gateway's status if not
otherwise inhibited at the channel level.
S6
Spare.
S7 (Foreign device parameterization data)

Used for PDP800 PROFIBUS master only. S7 provides foreign device parameterization data. Data for this specification is entered using
the Composer Engineering tool. Up to 500 characters may be used to define this specification.
228.0.2 Outputs
N
Foreign device status (0 = good, 1 = bad). The foreign device status output is the error summary of all of its configured channels. The
output value will be set bad if any problem is detected with a module or any channel of the module. For redundant modules, the output
value will be set bad if there is a problem detected with either of the modules. Quality is set bad when function code 228 can not
communicate with the foreign device. For redundant module pairs, quality will be bad only if communications with both modules is bad.
PROFIBUS devices: Conveys the status of this PROFIBUS slave. Logical output values (0 = good, 1 = bad). If alarm and/or diagnosis
information is available for this slave, this value will be set to bad (logic 1). If the PDP800 cannot communicate with the slave the output
will go bad quality.
IEC 61850: Conveys the status of this IED. Logical output values (0 = good, 1 = bad). If alarm is available for this IED, this value will be
set to bad (logic 1). If the CI850 cannot communicate with the IED then the output will go bad quality.
IEC 60870-5-104 devices: Conveys the status of this slave device. Logical output values (0 = good, 1 = bad). If an alarm is available for
this slave, this value will be set to bad (logic 1). If the SCI200 cannot communicate with the slave then the output will go to bad quality.
DNP devices: Conveys the status of this slave device. Logical output values (0 = good, 1 = bad). If an alarm is available for this slave,
this value will be set to bad (logic 1). If the SCI200 cannot communicate with the slave then the output will go to bad quality.
SPC700 Modbus TCP devices: Conveys the status of this slave device. Logical output values (0 = good, 1 = bad). If an alarm is available
for this slave, this value will be set to bad (logic 1). If the SCI200 cannot communicate with the slave then the output will go to bad quality.
N+1
Foreign device status details. Quality is always set to good. Refer to the following table for N+1 values. The following outputs also apply
to PROFIBUS devices.
228.1 Application
Primary Backup
N+1 Value Comm. Comm.
Status Status
Quality Quality
0 Good Good Good Good
1 Bad Good Good Good
4 Good Good Bad Good
5 Bad Good Bad Good
12 Good Good Bad Bad
13 Bad Good Bad Bad
15 Bad Bad Bad Bad
Refer to the function code 227 description for an example of assigning function code 228 to a gateway function code 227 and the I/O
2VAA000844R0001 J 228-9
Application 228. Foreign Device Definition
channel function codes 222 through 225.
228-10 2VAA000844R0001 J
229. Pulse In/Channel

The exception reporting pulse in/channel function code provides addressing, startup, run-time, and failure mode specifications for an
individual pulse input channel on a Symphony Plus PI01 pulse input module, Harmony I/O block or S800 incremental pulse module. The
pulse in/channel function code must reside in the same segment foreign device definition function code 228 to which it is mapped. This
function is required for all configured pulse input I/O block channels.
NOTES:
2. Pulse input channels are supported only by the IOR-800/810 with DP820 or DP840. The DP820 and DP840 are incremental
pulse counter I/O modules The PDP800 does not support the use of this function code. Use function codes 222 (analog input) and
function code 223 with the PDP800 when communicating with the DP820 and DP840 modules via the CI840.
3. All “conversion types” (S2) are supported by the Symphony Plus SD Series PI01 module.
Outputs
N R Pulse input value (in specified EUs) with quality.
Specifications
S1 N NULL String 0-32 32-character channel label
S2 N 101 I xy0, xy1, Filtering/conversion type:

xy2, xy3, Conversion type
xy4, xy5, xy0 - Period. Not supported by IOR-800.
or xy6 xy1 - Frequency
xy2 - Duration (Not supported by DP820/DP840.)
x=0 or 1
xy3 - Totalize up
and y=0
xy4 - Totalize down
xy5 - Totalize up with reset on high alarm limit
(Resets to start value + overrun when high alarm is
exceeded.)
xy6 - Totalize down with reset on low alarm limit
(Resets to start value + overrun when low alarm is
exceeded.)
y - Rising/falling edge level. For DP820/DP840, it is set to
zero.
Pulse trigger level:
x0z - Low to high
x1z - High to low
Filtering
0yz - Filtering disabled
1yz - Filtering enabled
S9 Y -5.0 R Full Engineering units alarm dead-band. Prevents alarm chat-

tering. Supersedes S10 in function code 82 when set to a
positive value.
2VAA000844R0001 J 229-1
S103 N 0.0 R Full Expected channel low value.

Expected low frequency value (Hertz) (S2=x0) or
Expected low period value (Seconds) (S2=x1) or
Expected low duration value (Seconds) (S2=x2)
Expected low count limit (Counts) (S2=x3/4/5/6)
S113 N 5000.0 R Full Expected channel high value.

Expected high frequency value (Hertz) (S2=x0) or
Expected high period value (Seconds) (S2=x1) or
Expected high duration value (Seconds) (S2=x2)
Expected high count limit (Counts) (S2=x3/4/5/6)
S12 N 0 R Full Engineering units start value.
S13 N 2 I Note 1 Block address of Reset.

0 - Continue
1 - Reset to start value
S14 N 2 I Note 1 Block address of Hold.

0 - Continue
1 - Hold accumulated value
S15 N 0 B 0 or 1 Normal input/undefined.
S16 Y 0.0 R Full Override value.
S172 Y 0 B 0 or 1 Override enable.
S18 N 2 I Note 1 Block address of simulation value.
S192 Y 0 I 0 or 1 Simulation enable.
2
S20 Y 0 B 0 or 1 Status error inhibit.
S21 Y 9.2E18 R Full Redundant input deviation limit.
S22 Y 0.0 R Full Reserved for future use.
S23 N Null String 0-32 32-character channel configuration parameter.
S24 N 0 I Full Reserved for future use.
S254 N 2 I Note 1 Block address of next element of the foreign device.
S27 N 0.0 R 0-30 Lost Signal Time (seconds)
NOTES:
2. Specification value active state is permitted to operate only when S11 of the gateway function code
227 is enabled.
3. The frequency/period/duration range and offset are calculated from the S10 and S11. Greater
specified range settings allow for greater/lesser frequency, period, and duration measurements at the
trade-off of lesser/greater precision of measurement. The range and offset values specified are
translated and used by pulse input hardware to program its hardware specific measurement ranges
and offsets.
4. Links to the next element of the foreign device definition (228) function block.
229-2 2VAA000844R0001 J
229. Pulse In/Channel Explanation
229.1 Explanation
S1
characters long.
S2
(Conversion type) The conversion type is specified as a three digit number of the following format:
FLT
where:
F Filtering (1=yes, 0=no)
Filtering enables pulse input hardware signal filtering. It is typically enabled, but may be disabled for low voltage/current type pulse input
applications in order to allow for higher frequency pulse input signals where special EMI protection is provided for the inputs. It is
recommended to be set. The PI01 module does not support filtering.
L Pulse trigger level (0=low to high transitions, 1=high to low
transitions)
Pulse trigger level selection is not supported by the DP820/DP840 S800 modules. Set to zero.
T Type.
0 = Period. Same functionality as function code 102. Period functionality is not supported by IOR-800.
1 = Frequency. Same functionality as function code 103.
2 = Duration. Same functionality as function code 109. (Not supported by DP820/DP840).
3 = Totalize up. Same functionality as function code 104 with S5=0 and S8=0.
4 = Totalize down. Same functionality as function code 104 with S5=1 and S8=0.
5 = Totalize Up with reset on high alarm limit. (Same functionality as function code 104 with S5=0 and S8=1). Resets to start value plus
overrun when high alarm is exceeded.
6 = Totalize Down with reset on low alarm limit. (Same functionality as function code 104 with S5=1 and S8=1). Resets to start value plus
overrun when low alarm is exceeded.
• In Period mode, the module measures the time between consecutive pulses. The total measurement range is 5
microseconds (filtered) or 6.67 microseconds (unfiltered) to 2.5 seconds with High and Low alarms. Positive pulses
can be measured. The time measured is the time between the rising edge of a pulse to the rising edge of the next
pulse (rising edge detection). The resolution of the period measurement depends on the application and is
guaranteed to be have a maximum absolute frequency error of 1.64 parts/million. If no pulses are detected, then
the last measured value is held until a loss of signal time period expires.
• In Frequency mode, the DP820/DP840 counts the number of input pulses or cycles that occur in a fixed preset time
period on a channel. The total measurement range is 0.25 Hz to 200 kilohertz (filtered) or 1500 kilohertz (unfiltered)
with High and Low alarms for the DP820 and 0.5 Hz to 20 kilohertz (filtered) for the DP840. The DP820/DP840
reads the value and provides it to the controller when the controller requests an update (S2 of function code 82 –
target period of segment). The resolution of the frequency measurement depends on the selected measurement
interval. If no pulses are detected, then the last measured value is held until a loss of signal time period expires.
NOTE: For Period and Frequency modes, the DP820 supports a fixed 4.3 second loss of signal detection period (DP840 = 3 sec-
onds). If no incoming pulses are detected during the 4.3 second time span, the overflow status is set. If there are other problems
with the input (such as a frequency period not being able to be determined), the transducer power failure (POWR) status will be
generated to HSIs so that a reference error condition will be indicated.
• In Totalize mode, the DP820/DP840 counts the total number of pulses of a digital input up to its expected channel
high value (S11) with hold and reset flags or until the controller resets the counter.
S3
(Engineering units low value) Defines the low limit of the input’s range in engineering units.
S4
(Engineering units low value) Defines the high limit of the input’s range in engineering units.
S5
(Engineering unit identifier) identifies the engineering units associated with the input value.
S6
2VAA000844R0001 J 229-3
Specifications 229. Pulse In/Channel
S7
(Engineering units low alarm) An alarm will be generated when the input equals or is less than this low limit.
S8
(Engineering units significant change) The change in input allowed before the changed value is reported to a console or open access
system.
S9
(Engineering units alarm dead-band) Alarm deadband for the high/low alarm. Alarm deadbands prevent excessive alarm exception
reports when values are hovering around the alarm limit. Supersedes specification S10 of function code 82 for this function code 229
block when set to a positive value.
S10
(Expected channel low value) The expected low limit of the pulse input channel physical channel as expressed in units (Hertz, Seconds,
or Counts) appropriate to the Conversion Mode (S2). The PI01 marks output “N” bad quality and under-range status if input value is 6.25%
lower than this specification value. Bad quality limit is set to 0.0, if 6.25% value results in a value less than 0.0.
S11
(Expected channel high value) The expected high limit of the pulse input channel physical channel as expressed in units (Hertz,
Seconds, or Counts) appropriate to the conversion mode (S2).
Specifications S10 and S11 define the expected field input signal range of the channel and are utilized in the calculation of the final
engineering unit value as follows:
Engineering unit output = ((channel value - S10) * (S4-S3) / (S11-S10)) + S3
S10 and S11 are also utilized by the pulse-input hardware to configure the optimal frequency/period/duration measurement range to
achieve the maximum resolution in the measurement PI01 marks output “N” bad quality and index range status if input is 6.25% higher
than this specification value.
Conversion Mode Expected Channel Hardware Measured Pulse Input Range Functionality
S2 S10 S11
0 – Period Expected low period value (Secs) Expected high period frequency (Secs)
(Not supported by DP840)
1 – Frequency Expected low frequency value (Hz) Expected high frequency period (Hz)
2 – Duration Expected low duration value (Secs) Expected high pulse duration (Secs)
(Not supported by
DP820/DP840)
3 through 6 – Totalize Expected low count limit value Expected high count limit value
NOTES:
To utilize the pulse in/channel to produce absolute totalization counts, the S10 and S11 specifications can be set to the same values
as the S3 and S4 specifications respectively.
To utilize the pulse in/channel to produce an unbounded maximum totalization count, set both S11 and S4 to the maximum possible
floating point value.
For the PI01 the maximum period is 30 seconds, maximum frequency is 100KHz, and maximum duration is 30 seconds.
S12
(Engineering Unit Start value) Defines the initial totalization count value on startup and function code reset (<S13>=1). The value of
the count is equal to specification S12 plus the alarm overrun after an alarm if the conversion mode (S2) is set to 5 or 6.
NOTE: Alarm overrun is the current total count reset to the difference between the counter and the alarm limit. This allows the
pulse in / channel function code (229) to correctly detect the next alarm without losing track of the true counts.
S13
(Block address of reset) Block address of the reset flag that is applicable only to the totalization conversion modes 3 through 6 in S2.
0 = Continue totalization (normal).
1 = Reset totalization count to start value (S12).
S14
(Block address of hold) Specification S14 is the block address of the accumulated total hold flag and is applicable only for the
totalization conversion modes 3 through 6 in S2.
0 = Continue totalization (normal).
229-4 2VAA000844R0001 J
229. Pulse In/Channel Specifications
1 = Hold accumulated total.
NOTE: The reset and hold inputs function in the NORMAL operating mode only and do not supersede OVERRIDE,UNDEFINED,
or SIMULATION mode operation.
S15
0 = Normal
1 = Undefined
S16
(Override value) The channel input value is over-ridden with this value if the override enable (S17) is set to 1.
S17
(Override enable) A value of 0 disables override for this channel. A value of 1 enables override in this channel. If enabled, override will
take precedence over normal input and simulation. Specification S11 of the gateway (function code 227) must reference a boolean output
that is set to 1 to permit this operation.
0 = Disabled
1 = Enabled
S18
S19
input from S18. Simulation has precedence over S15 normal input, but not S17 override. Specifications S11 of the gateway function code
227 must reference a boolean output set to a 1 to permit this operation. Otherwise, it is ignored.
0 = Disabled
1 = Enabled
S20
(Status error inhibit) Inhibits this channel’s I/O error contribution to controller status. Specification S11 of the gateway function code 227
must reference a Boolean output with a value of 1 to permit this operation. Otherwise, it is ignored.
0 = No
1 = Yes
S21
(Redundant input deviation limit) In NORMAL mode (S15=0,S17=0,S19=0), the redundant input deviation limit specifies the maximum
deviation permitted between redundant pulse input channels. This only applies when both inputs are good quality. When the redundant
inputs are outside the deviation limit, they will both be considered in error (function block output quality set to BAD, SUSP flag set in the
exception report, and the LIO error bit set in the controller status).
In OVERRIDE mode (S15=0,S17=1,S19=X), the redundant input deviation limit assumes the meaning of the override value deviation
limit and thus specifies the maximum deviation permitted between the primary pulse input channel and the override value (S16). The
pulse input channel value is first converted as specified in S2 before being compared against the override value. If the converted pulse
input channel value and the override value are outside the limit, the state of the input channel is considered suspect (SUSP set in the
exception report, but no LIO error set in the controller status) since a bump in the block output value will occur upon exiting the
OVERRIDE mode.
In SIMULATION mode (S15=0,S17=0,S19=1), the redundant input deviation limit assumes the meaning of the simulated value deviation
limit and thus specifies the maximum deviation permitted between the primary pulse input channel and the simulated value (<S18>). The
pulse input channel value is first converted as specified in S2 before being compared against the simulated value. If the converted pulse
input channel value and the simulated value are outside the limit, the state of the input channel is considered suspect (SUSP set in the
exception report, but no LIO error is set in the controller status) since a bump in the block output value will occur upon exiting the
SIMULATION mode.
S22
Reserved.
S23
(Foreign device configuration parameters) A string data type containing configuration information specific to the pulse input channel
of a foreign device. Presently there are two possible configuration parameters for use with the DP840 module only. Refer to the following
table for more information.
S24
Reserved.
2VAA000844R0001 J 229-5
Outputs 229. Pulse In/Channel
S23 S800
Parameter Modules
FILTER Input filter time con- 10 1, 100, 800, 6400 DP840
stant sets the sensitiv-
ity to input pulses
(microseconds).
PRIT Programmable Inter- 10 1, 20, 50, 100
val Time sets the inte-
gration period for
frequency calculation
(milliseconds).
NOTE: 1. Default if parameter is not specified.
S25
function code 228. The default value indicates that this block is the last element.
S26, S28 through S32

Spare.
S27
(Lost Time Signal) Specifies the time period in seconds to detect loss of signal. When a time out event occurs the “N” output quality is
set bad with under range status. The default value of 0.0 disables lost signal detection. This specification is used only for “conversion
modes” 3 through 6 (totalize) with Symphony Plus SD Series PI01 modules.
229.1.2 Outputs
N
Pulse input value (in specified EUs) with quality and alarm. Quality is set to bad.
229.2 Application
The design of the foreign device (function code 228) and channel (function codes 222/225/229) layout used in the function code layer is
shown in Figure 229-1). The DP820 accepts RS422, 5V, 12V, 24V and 13 mA transducer signal levels. Only the input to the channel A
input needs to be configured; the B input is tied to ground. The ST and DI inputs are also tied to ground. The DO output does not need
to be physically configured.
The control logic drawing format for the DP840 is similar to that shown for the DP820, but it may have as many as eight function code
229 blocks chained to the function code 228, whereas the DP820 has at most two channels. The DP840 module supports Namur, 12 V
and 24 V transducers. The specific type of transducer used with the DP840 can be specified as part of the function code 228 configuration
parameters.
Figure 229-1 Basic Frequency/Totalization Configuration
229-6 2VAA000844R0001 J
229. Pulse In/Channel PI01 Example
229.2.1 PI01 Example
Figure 229-2 Connecting PI01 Channels
2VAA000844R0001 J 229-7
PI01 Example 229. Pulse In/Channel
229-8 2VAA000844R0001 J
241. DSOE Data Interface Explanation
241. DSOE Data Interface

The DSOE data interface block provides an interface to Harmony block sequence of events data (HSOE) or allows the SPSEM11
Sequence of Events module to access the time-stamped data (DSOE) produced by the SPSET01 Sequence of Events Time Sync module
and the SPSED01 Sequence of Events Digital Input module.
Function code 241 is also used by the Symphony Plus SPC700 and HC800 controllers to indicate the status of the Ethernet based SOE
time synchronization port.
NOTE: This function code is supported by the HC800, SPC700, BRC100/200/300/400/410, HAC, and IMMFP11/12 controllers.
This function code is required for both the controller and SPSEM11 module or S+ Operations console to configure a distributed sequence
of events system.
NOTE: Refer to Function Code 90 Specification S6 to select the source of the time stamps for SOE data.
Outputs

(2 4 1 )
S3 DSOE N B Events logged flag (with quality and alarm):
SE M -M F P
0 = no
1 = yes
N+1 B SPSET01/11 module status, or the SPC700 or HC800

SOE Time Synchronization port status:
0 = good
1 = bad
Specifications
S11 N 0 I 0 - 63 Address of SPSET01 module
S2 N 100 I 1 - 32767 Number of events that will fit in buffer:

buffer size = 12 (S2 + 1)
S3 N 2 I Note 2 Block address of first digital event interface

(function code 242), I/O device definition (func-
tion code 221), or gateway (function code 227).
S4 N 0 I Full Spare

NOTES:
1. Specification S1 is not used for HC800 and SPC700 controllers.
241.1 Explanation
S1
Expander bus address configured by means of dipswitches on the SPSET01 module. This specification is not used by the SPC700,
HC800, and HAC controllers and must be left at the default value.
S2
Maximum number of event records, produced by a HN800 Symphony Plus I/O module, a Harmony I/O block, or any of the SPSED01 or
SPSET01 modules connected to the controller, that it is possible to store before a buffer overflow occurs.
2VAA000844R0001 J 241-1
Specifications 241. DSOE Data Interface
S3
Block address of the first digital event interface (function code 242), I/O device definition (function code 221), or gateway (function code
227).
When using a Harmony rack DSOE, function codes 241 and 242 form a linked list that describes the SPSED01/SPSET01 configuration
for the controller. Function code 241 must be at the head of the list. This specification is used to point to the first SPSED01/SPSET01
descriptor (function code 242).
When using a HN800 Symphony Plus I/O module or a Harmony block HSOE, function codes 241 and 221 (S33) form a linked list.
Function code 241 must be at the head of the list. This specification is used to point to the first I/O device definition (function code 221).
When using a gateway (IOR800/810) with HSOE, function codes 241 and 227 form a linked list. Function code 241 must be at the head
of the list. This specification is used to point to the first gateway (function code 227). Specification S3 linkage to the gateway (function
code 227) is supported only in the BRC-100/200/300/400/410 and HC800 controllers.
S4 and S5
Spare.
241-2 2VAA000844R0001 J
242. DSOE Digital Event Interface

The digital event interface block provides the parameters needed to control the SPSET01 distributed sequence of events time module
and the IMSED01 distributed sequence of events digital module.
NOTE: This function code is supported by the BRC-100/200, BRC-300/400/410, IMMFP11/12, and HAC controllers.
This function code is required for both the BRC-100/200, BRC-300/400/410 controllers and the INSEM01 distributed sequence of events
module to configure a distributed sequence of events system.
Outputs
D SO E
S2 (2 4 2 )
N N B Output 1 with quality
N+1
N+2
N+3
N+4
N+5
N+6
N+8
N+10
N+12
N+13
N+14
N+15
N+16
N+16 B Module status:

0 = good
1 = bad
Specifications
S1 N 0 I 0 - 63 Address of SET/SED input module
S2 N 2 I Note 1 Block address of next digital event interface (func-

tion code 242)
S3 Y 10 I Full Debounce filter time value (in msecs)
S4 Y 0 I Full Input scan mask

0 = channel in-scan
1 = channel out-of-scan
S5 Y 50 I 0 - 8192 Channel 00 TON
S6 Y 50 I 0 - 8192 Channel 00 TOFF
2VAA000844R0001 J 242-1
S7 Y 50 I 0 - 8192 Channel 01 TON
S9 Y 50 I 0 - 8192 Channel 02 TON
S11 Y 50 I 0 - 8192 Channel 03 TON
S13 Y 50 I 0 - 8192 Channel 04 TON
S15 Y 50 I 0 - 8192 Channel 05 TON
S17 Y 50 I 0 - 8192 Channel 06 TON
S19 Y 50 I 0 - 8192 Channel 07 TON
S21 Y 50 I 0 - 8192 Channel 08 TON
S23 Y 50 I 0 - 8192 Channel 09 TON
S25 Y 50 I 0 - 8192 Channel 10 TON
S27 Y 50 I 0 - 8192 Channel 11 TON
S29 Y 50 I 0 - 8192 Channel 12 TON
S31 Y 50 I 0 - 8192 Channel 13 TON
S33 Y 50 I 0 - 8192 Channel 14 TON
S35 Y 50 I 0 - 8192 Channel 15 TON
242-2 2VAA000844R0001 J
242. DSOE Digital Event Interface Explanation

NOTE:
242.1 Explanation
S1
Bus address configured through dipswitches on the SET/SED board.
NOTE: For the SET board of a single BRC-100/200 and BRC-300/400/410 controllers, function codes 241 and 242 are configured
for the same I/O module board.
S2
Block address for the next digital event interface (function code 242). Function codes 241 and 242 form a linked list that describes the
SET/SED configuration for the controller.
S3
Time interval (in milliseconds) used on the SET/SED board to tell the valid state transitions and noise spikes apart.
S4
16-bit mask that describes the desired configuration for the input channels on the I/O module board.
0 = channel in-scan
1 = channel out-of-scan
S5 through S36
Channels 00 TON through 15 TOFF are time values that are subtracted from the registered transition time values to get the correct time-
stamp for the transition. The values depend on the physical characteristics of the transducer used.
S37 and S38

Spare.
2VAA000844R0001 J 242-3
Specifications 242. DSOE Digital Event Interface
242-4 2VAA000844R0001 J
243. Executive Block (SEM01/11) Explanation
243. Executive Block (SEM01/11)

The executive block for the INSEM01, INSEM11 and SPSEM11 sequence of events modules defines several variables that affect module
behavior while executing a sequence of events.
This function code is required to configure a distributed sequence of events system.
Outputs
0 None No usable outputs
Specifications
S1 N 0 I 0 - 5000 Maximum number of pre-trigger events
S2 N 0 I 0 - 5000 Maximum number of post-trigger events
S3 N 0.0 R 0 - 86400 Length of post-trigger period (in secs)
S4 N 0.0 R 0 - 86400 Longest time interval between two consecutive

events (in secs)
S5 N 20 I 0 - 60 Maximum delay in receiving events from Harmony

controller (in secs)
S6 N 180 I 0 - 32767 Age of event data before discarded from buffer

(in secs)
S7 N 2 I 0 - 9998 Block number of first addressing interface definition

function code 244
243.1 Explanation
S1
Maximum number of events that can be recorded before trigger.
S2
Maximum number of events that can be recorded after trigger. When this limit is reached, the sequence will be closed.
S3
Maximum time interval (in seconds) that can elapse between the trigger event and the last post-trigger event. When this interval expires,
the sequence will be closed.
S4
Maximum time interval in seconds that can pass between two consecutive events belonging to the same sequence. From the last valid
event received, the sequence will be closed when this time interval expires.
S5
Maximum latency time in seconds while receiving events from remote Harmony controllers.
S6
Age of events data in seconds before discarded from the buffer. This is the maximum interval time an event can spend in the output
queue towards the human system interface (HSI) waiting for a request for final presentation. After this period, the event is discarded from
the queue to prevent overflow and buffer lock.
S7
Block address of the first addressing interface definition function code 244. Function codes 243, 244 and 245 form a linked list with
sublists that describe the configuration for the sequence of events system. Executive block zero is the head of the main list.
2VAA000844R0001 J 243-1
Specifications 243. Executive Block (SEM01/11)
243-2 2VAA000844R0001 J
244. Addressing Interface Definition Explanation
244. Addressing Interface Definition

The Harmony controller to SEM addressing interface definition function code is configured in the INSEM01/11 and SPSEM11 sequence
of events module, and defines the physical addressing for data interface function code 241.
Specifications S1 through S4 define the Harmony rack module address for the point. Specification S5 is a pointer to the next controller
to SEM function block. Specification S6 is a pointer to the first SED to SEM interface block configured that refers to the controller specified
by the first four specifications.
Outputs
Specifications
S1 N 1 I 0 - 250 Loop number
S2 N 1 I 0 - 250 Node number
S3 N 0 I 0 - 31 Module number
S4 N 2 I 0 - 9998 Block number of function code 241 in the controller
S5 N 2 I 0 - 9998 Block number of next addressing interface definition

function code 244
S6 N 2 I 0 - 9998 Block number of first input channel interface function

code 245
244.1 Explanation
S1 through S4
Standard Harmony rack module address for a point that, in this case, identifies the function code 241 block on the controller that is the
exception report source for the event data poll.
S5
Block address of the next addressing interface function block. Function codes 243, 244 and 245 form a linked list with sublists that
describe the configuration for the sequence of events system.
S6
Block address of the first SED to SEM input channel interface. Each function code 244 block is the head of the sublist that describes the
configuration for a particular controller in the system.
2VAA000844R0001 J 244-1
Specifications 244. Addressing Interface Definition
244-2 2VAA000844R0001 J
245. Input Channel Interface Explanation
245. Input Channel Interface

The SED to SEM input channel interface function code defines the characteristics for each one of the 16 input channels of a specified
IMSED01 sequence of events digital module or SPSET01 sequence of events time module.
Outputs
Specifications
S1 N 0 I 0 - 63 Expander bus address
S2 N 2 I 0 - 9998 Block number of the next input interface function

code 245
S3 N 0 I 0 - 127 Characteristics of channel 0 input
245.1 Explanation
S1
Expander bus address configured using dipswitches located on the SET/SED board.
S2
Block address of the next input channel interface function code 245. Each function code 245 block is linked with the subsequent one in
the sublist that describes the configuration for a particular controller in the system.
S3 through S18
Identify the following characteristics:
2VAA000844R0001 J 245-1
Specifications 245. Input Channel Interface
• If this point has a simple trigger associated.

• If it does, it tells if the trigger is significant to the zero to one transition, the one to zero transition, or both.
• If this point is a recordable event.
• If it is, it tells if the trigger is significant to the zero to one transition, the one to zero transition, or both.
• If this point has an associated alarm.
• If it does, it tells if the alarm is associated to the zero state, the one state, or both.
• If this point is configured in the system or not.
Specification information for S3 through S18 is shown in Table 245-1.
Table 245-1 Information Format for Specifications S3 through S18
Point
Description
6 5 4 3 2 1 0
0 0 No simple trigger associated to the point
0 1 Simple trigger on the transition, 0 to 1
1 0 Simple trigger on the transition, 1 to 0
1 1 Simple trigger on both transitions
0 0 This is not a recordable event
0 1 Recordable event on the transition, 0 to 1
1 0 Recordable event on the transition, 1 to 0
1 1 Recordable event on both transitions
0 0 state is not an alarm state
1 0 state is an alarm state
0 1 state is not an alarm state
1 1 state is an alarm state
0 Point is not configured in the system
1 Point is configured in the system
245-2 2VAA000844R0001 J
246. Trigger Definition
246. Trigger Definition

The distributed sequence of events trigger definition function code describes a single trigger in the sequence of events. It accepts 32
operations or operands.
Outputs
Specifications
S1 N -1 I -126 - 16000 Operation/operand 1
2VAA000844R0001 J 246-1
Explanation 246. Trigger Definition
246.1 Explanation
S1 through S32
Operations/operands one through 32. Each specification can describe an operation, an operand or the end of this trigger.
Legal operation values are:
-126: not (~).
-38: and (&).
-94: xor (^).
-124: or (|).
-1: end of trigger.
Legal operand indexes are:
1 through 16,000.
246-2 2VAA000844R0001 J
247. Condition Monitoring

The CMM function code reads up to 13 inputs (ten analogs, two digitals, and one module status) from a single channel on the condition
monitoring module. Each channel requires a CMM function code. Each channel can be configured independently of the other channels
for vibration, eccentricity, thrust (rotor) position, differential expansion, case expansion, or dual probe. If multiple channels of the module
are being configured, these function codes must reside in the same module segment.
This function block has thirteen outputs. The first three are analog inputs from the module and are available for each channel type. Block
outputs N+3 to N+9 are input from the module for vibration measurements only and are not used by all of the channel types. The outputs
N+10 and N+11 are alarm indicators from the module. The last output, N+12, is the status of the module. Use function code 226 for
extended status information. For more information, refer to the respective product instruction.
NOTE: This function code is supported only by the SPC700, HC800, BRC-100/200, and BRC-300/400/410 controllers.
Outputs
CM M
N R Output in engineering units, quality.
S2 (247)
NX EU
S9 AEN GV
N N+1 R Average (DC/gap) voltage.
S 10 N +1
DEN SPD
N +2
S 11 ASET N+2 R Speed.
S 12 N +3
DSE T
S 16 N +4
S 17
SET
N +5 N+3 R First order vibration in EU (vibration only).
FLO
S 18 N +6
FHI
S 19 CAP
N +7 N+4 R First order phase angle (degrees) (vibration only).
S 20 N +8
RUP
S 21 RD N A LR
N +9
N+5 R Second order vibration in EU (vibration only).
S 22 N + 10
EVC D NGR
N + 11
S 23 H ID ST
N + 12
N+6 R Second order phase angle (degrees) (vibration only).
S 24 H IA
S 25
S 26
LOA
N+7 R Third order vibration in EU (vibration only).
LOD
S 27 A D LY
S 28 D D LY
N+8 R Third order phase angle (degrees) (vibration only).
S 29 SRD
S 43 N /A N+9 R Not first order vibration (not 1X) (vibration only).
S 44 N /A
S 45 N /A N+10 B Alert: 0 = OK; 1 = alarm
S 46 N /A
S 47 CO R
N+11 B Danger: 0 = OK; 1 = alarm
N+12 B Module Status: 0 = good; 1 = bad
Specifications
S1 N 0 I2 0-63 Module address
S2 N 2 I2 0-9998 Block address of next CMM channel
S3 N 1 I2 1-6 Module channel input number
S4 N 0 I2 0-10 Channel type:

0 = vibration
1 = eccentricity
2 = thrust (rotor) position
3 = differential expansion
4 = case expansion
5 = dual probe (relative)
6 = dual probe (seismic)
7 = dual probe (absolute)
8 = SMAX (vibration only)
9 = complementary position
10 = pulsation monitor
2VAA000844R0001 J 247-1
S5 N 0 I2 0-8 Probe type:

0 = eddy current probe
1 = DC-LVDT
2 = accelerometer
3 = velocity pickup
4 = piezoelectric velocity probe
6 = ramped eddy current probe
7 = ramped complementary eddy current probe
8 = acoustic probe
S6 Y1 0 I2 0-3 Integration: (vibration/dual probe only)

0 = none
1 = velocity to displacement
2 = acceleration to velocity
3 = acceleration to displacement
S7 Y1 0 I2 0-33 Block output select

Block N
x0 = peak-to-peak
x1 = peak
x2 = RMS
x3 = average
Block N+1
0x = average
1x = dynamic
2x = minimum
3x = maximum
S8 N 0 I2 0-1 English/metric EU
0 = English (g's, in/s, mils)
1 = Metric (g's, mm/s, microns)
S9 N 0 I2 0-9998 Block address of alert enable (Boolean input)

0 = disable alert output
1 = enable alert output
S10 N 0 I2 0-9998 Block address of danger enable (Boolean input)

0 = disable danger output
1 = enable danger output
S11 N 0 I2 0-9998 Block address of set alert relay (Boolean input)

1 = set alert relay
S12 N 0 I2 0-9998 Block address of set danger relay (Boolean input)

1 = set danger relay
S13 N 0 I2 0-1 Normal alert relay state:

0 = normally de-energized
1 = normally energized
S14 N 0 I2 0-1 Normal danger relay state:

S15 N 0 I2 0-1 Vote enable

0 = disable
1 = dual voting enable (channels 1&2 or 3&4)
247-2 2VAA000844R0001 J
S16 N 0 I2 0-9998 Block address of set null position voltage (Boolean

input)
0 to 1 transition sets S49
Otherwise, S49 remains unchanged
S17 N 8 I2 0-9998 Block address of filter low cutoff frequency (real input)
S18 N 9 I2 0-9998 Block address of filter high cutoff frequency (real

input)
S19 N 0 I2 0-9998 Block address of waveform capture (Boolean input).

The zero to one transition captures the most recent
waveform.
S20 N 0 I2 0-9998 Block address of run-up capture (Boolean input)

0 = do not capture data
1 = capture run-up data
S21 N 0 I2 0-9998 Block address of run-down capture (Boolean input)

0 = do not capture data
1 = capture run-down data
S22 N 0 I2 0-9998 Block address of event active (Boolean input)

0 = no event
1 = event occurred (save data)
S23 N 9 I2 0-9998 Block address of engineering unit high danger level

(real Input)
S24 N 9 I2 0-9998 Block address of engineering unit high alert level (real
Input)
S25 N 8 I2 0-9998 Block address of engineering unit low alert level (real
Input)
S26 N 8 I2 0-9998 Block address of engineering unit low danger level

(real Input)
S27 N 5 I2 0-9998 Block address of alert delay (seconds) (real Input)
S28 N 5 I2 0-9998 Block address of danger delay (seconds) (real Input)
S29 N 0 I2 0-9998 Block address of shaft rotational direction (Boolean

input)
0 = clockwise
1 = counterclockwise
S30 N 0 I2 -360 to Angular position of probe (vibration/dual probe/eccen)

360 Ramp angle (differential expansion)
S31 N 0 I2 -360 to Angular position of event marker probe (vib./DP/ecc)

360
S32 N 0 I2 Full Point ID
S33 N 0 I2 0-255 IP address one
S34 N 0 I2 0-255 IP address two
S35 N 0 I2 0-255 IP address three
S36 N 0 I2 0-255 IP address four
S37 N 255 I2 0-255 Sub-net mask one
2VAA000844R0001 J 247-3
Explanation 247. Condition Monitoring
S38 N 255 I2 0-255 Sub-net mask two
S39 N 255 I2 0-255 Sub-net mask three
S40 N 255 I2 0-255 Sub-net mask four
S41 Y1 0 I2 Full Spare integer parameter
S42 N 0 I2 Full Spare integer parameter
S43 N 0 I2 0-9998 Spare block address (Boolean input)
S44 N 0 I2 0-9998 Spare block address (Boolean input)
S45 N 5 I2 0-9998 Spare block address (real input)
S46 N 5 I2 0-9998 Spare block address (real input)
S47 N 5 I2 0-9998 Block address of non-linear correction (real input)
S48 N 200.0 R4 Full Probe sensitivity (millivolts/EU)
S49 Y1 0.000 R4 Full Null position in engineering units
S50 Y1 0.0 R4 Full Null position voltage (used for channel types 2-4 only)
S51 N 9.2 E 18 R4 Full High probe failure voltage
S52 N -9.2 E 18 R4 Full High probe failure voltage
S53 N 0.000 R4 Full Spare real parameter
S54 Y1 0.000 R4 Full Spare real parameter
S55 Y1 0.000 R4 Full Spare real parameter

NOTE:
1. Specification is tunable, but not adaptable.
247.1 Explanation
S1
Address of the module.
S2
Address of the next CMM input block that defines the next channel on the module. If the function code is defining the last channel on the
module, use the default value.
S3
Number of the input channel on the CMM module. The valid range is encoded on the module. Channels five and six are pseudo-channels
that do not have actual probes connected, but are calculated. (Refer to the specification S4 explanation).
S4
Type of signal to which the block is interfacing.
0 = vibration
1 = eccentricity
2 = thrust (rotor) position
3 = differential expansion
4 = case expansion
5 = dual probe (relative, channels one or three only)
6 = dual probe (seismic, channels two or four only)
247-4 2VAA000844R0001 J
247. Condition Monitoring Specifications
7 = dual probe (absolute, channels five or six only)

8 = SMAX (vibration, channels five or six only)
9 = complementary position (channels five or six only)
10 = pulsation monitor
For absolute vibration, channel five uses the relative and seismic probes from channels one and two, whereas channel six uses the
probes from channels three and four.
For SMAX vibration, channel five uses the X and Y probes from channels one and two, whereas channel six uses the probes from
channels three and four.
Complementary position determines rotor position or differential expansion of two complementary probes. Channel five uses channels
one and two, whereas channel six uses channels three and four.
S5
Probe type used for the input channel.
0 = eddy current probe
1 = DC-LVDT
2 = accelerometer
3 = velocity pickup
4 = piezoelectric velocity probe
5 = complementary mode eddy current probe
6 = ramp mode eddy current probe
7 = ramped complementary eddy current probe
8 = acoustic probe
S6
Type of integration used on the input signal. Valid for vibration and dual probes only.
0 = none
1 = velocity to displacement
2 = acceleration to velocity
3 = acceleration to displacement
S7
Type of signal reported for the input channel. The unit's digit is used for block N. The ten's digit is used for block N+1.
0x = average x0 = peak-to-peak
1x = dynamic x1 = peak
2x = minimum x2 = RMS
3x = maximum x3 = average
S8
Engineering unit used for integration of the signal as defined by S6.
0 = English (g, inch/s, mils)
1 = Metric (g, mm/s, microns)
S9
Block address of the enable alert flag.
0 = disable alert output
1 = enable alert output
S10
Block address of the enable danger flag.
0 = disable danger output
1 = enable danger output
S11
Block address of set alert relay.
0 = normal operation (alert condition determined by CMM11)
1 = set alert relay active (based on S13)
S12
Block address of set danger relay.
0 = normal operation (danger condition determined by CMM11)
1 = set danger relay active (based on S14)
2VAA000844R0001 J 247-5
Specifications 247. Condition Monitoring
S13
Alert Relay normal state.
S14
Danger relay normal state.
S15
Enables voting.
0 = disable
1 = dual voting enable (channels 1&2 or 3&4)
Dual voting incorporates AND logic, where the danger condition must be present in both channels for the danger condition to be true.
Refer to Table 247-1 for the actual settings of dual voting.
Table 247-1 Truth Table for Dual Voting Settings
Channel 2
Channel 1
Normal Alert Danger Failed
Normal No alarm Alert Alert Alert
Alert Alert Alert Alert Alert
Danger Alert Alert Alert and danger Alert and danger
Failed Alert Alert Alert and danger Alert
S16
Block address of the signal used to set the null position voltage for thrust position, differential expansion, and case expansion channels.
The transition from zero to one of this block stores the average DC voltage presently being read by the probe into S50 (null position
voltage).
The zero to one transition sets the null position voltage stored in S50. Otherwise, S50 remains unchanged.
S17
Address of the block that defines the low cutoff frequency of the digital filter.
S18
Address of the block that defines the high cutoff frequency of the digital filter.
S19
Block address of the waveform capture flag (used with diagnostic software). This initiates the module to collect the most recent time
waveform.
S20
Block address of the run-up capture flag (used with diagnostic software). This initiates the module to start collecting run-up data.
S21
Block address of the run-down capture flag (used with diagnostic software). This initiates the module to start collecting run-down data.
S22
Block address of the event capture flag (used with diagnostic software). This indicates that an event occurred for the module to save the
event data.
S23
Block address of the high danger level limit of the input in engineering units. When the monitored input value of block output N is higher
than this value, the danger output is set active and block output N+11 is set to logic level 1 after the time period specified in the alarm
delay S28. The Alert output is set active (if enabled), and block output N+10 is set to logic level one instantly.
S24
Block address of the high alert level limit of the input in engineering units. When the monitored input value of block output N is higher
247-6 2VAA000844R0001 J
247. Condition Monitoring Specifications
than this value, the alert output is set active, and block output N+10 is set to logic level one after the time period specified in the alarm
delay S27.
S25
Block address of the low alert level limit of the input in engineering units. When the monitored input value of block output N is lower than
this value, the alert output is set active, and block output N+10 is set to logic level one after the time period specified in the alarm delay
S27.
S26
Block address of the low danger level limit of the input in engineering units. When the monitored input value of block output N is lower
than this value, the danger output is set active, and block output N+11 is set to logic level one after the time period specified in the alarm
delay S28. The alert output is set active (if enabled), and block output N+10 is set to logic level one instantly.
S27
Block address of the amount of time (in seconds) the input value must exceed the alert set point before reporting an alert condition. Both
the relay output and the block output (N+10) are delayed in unison.
S28
Block address of the amount of time (in seconds) the input value must exceed the danger set point before reporting a danger condition.
Both the relay output and the block output (N+11) are delayed in unison.
S29
Block address of shaft rotation direction. Typically viewed from the driver end.
0 = clockwise
1 = counterclockwise
S30
Angular position (in degrees) of the probe or the ramp angle for differential expansion. Typically, the angular position is with reference to
vertical or the once-per-revolution pulse (event marker). The ramp angle is used when S5 is set to five or six (ramp mode input) to
calculate both axial and radial displacement.
S31
Angular position (in degrees) of the event marker. Typically, this is with reference to vertical.
S32
Point identification. Used only with the Ethernet link to uniquely identify the point.
S33 through S36

Used only with the Ethernet link to identity the IP address of the card. The IP address is formed as follows: S33.S34.S35.S36
S37 through S40

Used only with the Ethernet link for masking the IP address of the card. Sub-net mask is formed as follows: S37.S38.S39.S40.
S41 and S42

Spare integer parameters.
S43 and S44

Spare boolean block inputs.
S45 and S46

Spare real block input.
S47
Block address of non-linear correction. If used, this is typically an input from a Function Code 1 F(x) block and is used to correct for non-
linear probes. The module uses the output of the F(x) block for the internal calculations. The module ignores this value when the default
block five is used.
S48
Sensitivity of the probe defined in S5 in millivolts/EU. EU can be mils, microns, mm, inch/sec., mm/sec., g, etc. When using accelerometer
inputs, the engineering units for this specification must be entered in g's regardless of the setting of S8. When using velocity pickup inputs,
the engineering units for this specification must be entered in inch/sec. for S8 = zero, or mm/sec. for S8 = one. (This is only true if the
2VAA000844R0001 J 247-7
Outputs 247. Condition Monitoring
probe is to be integrated).
NOTE: The value can be negative under certain conditions depending on probe mounting and direction of movement. For exam-
ple, in complementary mode applications one probe's sensitivity will be positive, and the other negative. Also, for dual probe appli-
cations the seismic measurement will be added to the relative if the sensitivity is positive and subtracted if negative.
S49
Null position in engineering units. The user determines the null position as a starting position of the device. It is set at some known position
that can be physically measured, often when the machine is not running. This is the value of the block output N when the voltage of the
probe is equal to the value in S50.
S50
Manually entered null position voltage in volts. Used on the thrust position, differential expansion, and case expansion channels. When
tuned or during startup, this specification sets the null position voltage for the channel. This value can also be modified by setting the
block for S16 from a logic zero to a logic one. Then the average DC voltage presently being read from the probe (the value of block N+1)
will be stored in this location.
S51
High threshold voltage for the probe. The analog inputs will go to bad quality whenever the voltage input is more positive than this value.
S52
Low threshold voltage for the probe. The analog inputs will go to bad quality whenever the voltage input is more negative than this value.
S53 through S55

Spare real parameters.
247.1.2 Outputs
N
Analog input value and quality as determined by S4. Status bits Quality, High Alarm, Low Alarm will be used.
• Vibration (selected by S6 & S7) in engineering units.
• Thrust position in engineering units.
• Eccentricity in engineering units.
• Differential expansion in engineering units.
• Case expansion in engineering units.
• Channel 1 or 3: relative vibration in engineering units.
• Channel 2 or 4: Seismic vibration in engineering units.
• Channel 5: Absolute vibration of channels 1 and 2.
• Channel 6: Absolute vibration of channels 3 and 4.
• Channel 5: SMAX vibration of channels 1 and 2.
• Channel 6: SMAX vibration of channels 3 and 4.
• Channel 5: Complementary position of channels 1 and 2.
• Channel 6: Complementary position of channels 3 and 4.
• Pulsation monitor.
N+1
Analog input value and quality. DC offset or gap voltage in volts as determined by S7.
N+2
Analog input value and quality. Speed in RPM.
N+3
Analog input value and quality. First order vibration in engineering units (vibration only).
N+4
Analog input value and quality. Phase angle of the first order vibration in degrees (vibration only).
247-8 2VAA000844R0001 J
247. Condition Monitoring Status Conditions
N+5
Analog input value and quality. Second order vibration in engineering units (vibration only).
N+6
Analog input value and quality. Phase angle of the second order vibration in degrees (vibration only).
N+7
Analog input value and quality. Third order vibration in engineering units (vibration only).
N+8
Analog input value and quality. Phase angle of the third order vibration in degrees (vibration only).
N+9
Analog input value and quality. Not first order vibration (not 1X) in engineering units (vibration only).
N+10
First level alarm status (alert) and quality:
0 = Level of output N is less than S24 and greater than S25 (where applicable).
1 = Level of output N is greater than S24 or less than S25 (where applicable) for a period greater than S27, or
N+11 is active.
N+11
Second level alarm status (danger) and quality:
0 = Level of output N is less than S23 and greater than S26 (where applicable).
1 = Level of output N is greater than S23 or less than S26 (where applicable) for a period greater than S28.
N+12
Module communication status without quality:
0 = good
1 = bad
This output is set to zero when the controller receives the properly formatted status message from a CMM module. This output is set to
one when either no module replies, or a module replies with an improperly formatted message.
247.2 Status Conditions
There are two types of status condition flags: configuration and operational.
247.2.1 Configuration
HALT
(Critical Error, Channel is Disabled) The critical error will disable the channel until the error is corrected. The other valid channels will
operate normally.
IPAD
(Invalid IP Address) Occurs whenever different IP addresses are identified for the same module, or if the IP address does not conform
to conventions. Although the module will execute, there will not be any Ethernet activity, or the module will use the first valid IP address.
PROB
(Invalid Probe Type) Occurs whenever the selected probe type is invalid for the selected type. The module will execute valid channels.
However, the invalid channel will not operate.
PTID
(Duplicate Point ID) Occurs when the same non-zero point ID is identified for more than one channel. The module will operate normally.
However, the Ethernet interface may have duplicate values overlaying one another.
TYPE
(Invalid Channel Type) Occurs whenever the selected type (relative, seismic, absolute, SMAX, complementary, or dual voting) is invalid
or there is a mismatch for that channel (e.g., an improper use of channels five and six). The module will execute valid channels. However,
the invalid channel will not operate.
2VAA000844R0001 J 247-9
Operational 247. Condition Monitoring
WARN
(Non-critical Error, Channel is Running) Although the non-critical error will allow continued operation of the channel, there may be a
deviation from expected results.
247.2.2 Operational
ALHI
(High Alert) Set when the overall block output exceeds the high alert set point after the specified delay.
ALLO
(Low Alert) Set when the overall block output exceeds the low alert set point after the specified delay.
ALSP
(Alert Set Point Exceeded) Occurs when the value exceeds the alert set point, although the delay period may not have expired, or the
alert is disabled and the relay may not be active for that channel. It remains set until the condition no longer exists.
BUFF
(Time Waveform Buffer Full) Condition clears when the data is off-loaded via the Ethernet link or when the module loses power. In the
latter case, the data is lost.
CALI
(Module is Calibrating) Occurs when the module is calibrating.
CONF
(Configuration Error)
CTWF
(Capturing Time Waveform) Occurs while the module is collecting time waveform data. This condition clears when the data is complete.
DNHI
(High Danger) Set when the overall block output exceeds the high danger set point after the specified delay.
DNLO
(Low Danger) Set when the overall block output exceeds the low danger set point after the specified delay.
DNSP
(Danger Set Point Exceeded) Occurs when the value exceeds the danger set point, although the delay period may not have expired or
the danger is disabled, and the relay may not be active for that channel. It remains set until the condition no longer exists.
DVSA
(Dual Voting Status - Alert) This condition is described in Table 247-1.
DVSD
(Dual Voting Status - Danger) This condition is described in Table 247-1.
ETHF
(Ethernet Failure) Occurs whenever the CMM11 detects a failure with the Ethernet interface. This may occur from an internal hardware
failure or an external problem with the Ethernet.
EVLG
(Collecting Event Log Data) This condition clears when the data is off-loaded via the Ethernet link or when the module loses power, in
which case, the data is lost.
EVST
(Event Mark Status) Exists when there is no event marker input detected.
FLHI
(Probe Failure - Over-range) Occurs when the input of the probe exceeds the high failure limit.
FLLO
(Probe Failure - Under-range) Occurs when the input of the probe exceeds the low failure limit.
247-10 2VAA000844R0001 J
247. Condition Monitoring Operational
FLOP
(Open Circuit Detection) Occurs when the module detects an open circuit condition.
FLSH
(Short Circuit Detection) Occurs when the module detects a short circuit condition.
MERR
(CMM11 Module Error) Occurs whenever the CMM11 detects a circuit failure on the module.
RNDN
(Collecting Run-down Data) This condition clears when the data is off-loaded via the Ethernet link or when the module loses power, in
which case the data is lost.
RNUP
(Collecting Run-up Data) This condition clears when the data is off-loaded via the Ethernet link or when the module loses power, in
which case the data is lost.
STRT
(Module is in Startup Mode) Exists when the module starts up.
SUSP
(Suspect Quality) Occurs when the quality of the values is within normal operating conditions, but the quality is suspect. This can occur
when one of two complementary probes fails or goes out of range. It can also occur when the probe is near its limit.
TUFL
(Termination Unit Failure) Occurs whenever the termination unit loses power, a circuit fails, or the termination unit cable disconnects.
ZRSP
(Zero speed indication) Occurs when the module no longer is receiving once-per-revolution pulses. There must be pulses present which
then gradually cease before this status activates. A sudden loss-of-signal will not set this condition.
2VAA000844R0001 J 247-11
Operational 247. Condition Monitoring
247-12 2VAA000844R0001 J
248. Turbine I/O Device Definition

The Turbine I/O Device Definition function code supports fixed channel Symphony Plus I/O modules. Each fixed channel Symphony Plus
I/O module incorporates a subset of the analog I/O embedded into FC 248.
The fixed nature of these channels offers less live data flexibility, but greater runtime performance than the standard I/O device definition
interface (FC 221). Additional specification data offers greater flexibility in device configuration.
Function Code 248 only applies to VP01, TP01, or AS01 SD Series S+ Turbine modules with configurations
running in HPC800 or SPC700 SD Series controllers.
Outputs
N B Primary I/O block status with quality
N+1 B Backup I/O block status with quality
N+2 B Channel in override/simulation with quality
N+4 R4 Data from module 1 with quality
Specifications

S1 N NULL String 0-32 32-character device label
S2 Y NULL String 0-255 255-character tunable Config
S3 N NULL String 0-255 255-character non-tunable Config 1
2VAA000844R0001 J 248-1

S7 N 65535 Real4 Full Input enable mask
S8 N 255 Real4 Full Output enable mask
S9 Y 0 Real4 Full Cal Var 1
S13 N 2 Int2 <address> Block address of data to module 1
S21 N 2 Int2 <address> Block address of input SOE channel 1
S29 N 2 Int2 <address> Block address of next SOE service definition
S30 N 2 Int2 <address> Block address of next FC 248
S31 N 2 Int2 <address> Block address of override/status error inhibit/simulation permit
S32 N 2 Int2 <address> Block address reserved for future use
S33 Y 0 Bool 0 or 1 Device status error inhibit
S34 N 0 Bool 0 or 1 Redundant I/O block expected
S35 N 0 Bool 0 or 1 Spare
S36 N 0 Bool 0 or 1 Spare
S37 N 0 Int2 Full Spare (secondary execution period)
S38 N 0 Int2 Full Spare (access security)
The control system must be carefully evaluated to establish default values that will prevent personal injury
and/or property damage in the case of I/O block failure.
WARNING
248-2 2VAA000844R0001 J
248. Turbine I/O Device Definition Explanation
248.1 Explanation
Specifications
S1
(Device label) Device label of string data type used as a logical address of the fixed channel Symphony Plus I/O module. This label must
match the device label configured in the fixed channel Symphony Plus I/O module. The device label can be up to 32 characters long. For
proper operation, the label cannot be null.
S2
(255-character tunable config) Tunable device configuration encoded into a string. This configuration can be up to 255 characters long.
The content and interpretation of this string is dependent on the module type it is connected to. Refer to the module product guide for
details.
S3 through S6
(255-character tunable config) Non-tunable device configuration encoded into a string. This configuration can be up to 255 characters
long. The content and interpretation of this string is dependent on the module type it is connected to. Refer to the module product guide
for details.
S7
(Input enable mask) Reserved for future use.
S8
(Output enable mask) Reserved for future use.
S9 through S12
(Cal Var 1 - 4) Tunable device configuration encoded as full-range real, typically reserved for calibration data. The content and
interpretation of this value is dependent on the module type it is connected to. Refer to the module product guide for details.
S13 through S20
(Block addresses of data to module 1 through 8) Links to a function block that provides a real value to send to the module. The content
and interpretation of this value is dependent on the module type it is connected to. Refer to the module product guide for details.
S21 through S28
(Block addresses of input SOE channels 1 through 8) Reserved for future use.
S29
(Block address of next SOE service definition) Reserved for future use.
S30
(Block address of the next FC 248) Reserved for future use.
S31
(Block address of override/status error inhibit/simulation permit) Links to a function block which will provide a boolean indication as
to whether a particular feature is permitted. If the value from the attached boolean output is zero; override, status error inhibit, or
simulation is not permitted on any channel. If the value from the attached boolean output is one; override, status error inhibit, or simulation
is permitted on any channel. This specification has no effect on the Harmony simulation block (SIM-100) simulation operation.
S32
(Block address) Reserved for future use.
S33
(Device status error inhibit) If set to one, this specification inhibits all device or channel errors of this fixed channel Symphony Plus I/O
module from being included in the controller status. The default value causes all block and channel errors to be included in the controller
status if not otherwise inhibited at the channel level.
S34
(Redundant I/O block expected) If this specification is set to one, a redundant I/O block is always expected. If a redundant fixed channel
Symphony Plus I/O module is not found (function code 248 output N+1 = 1 and has bad quality), the controller generates a block problem
2VAA000844R0001 J 248-3
Explanation 248. Turbine I/O Device Definition
report. If set to a 0 then no redundant device is expected, but may exist.
S35 through S38
(Spares) S35 and S36: Spare, S37: Spare (secondary execution period), S38: Spare (access security).
Outputs
The I/O device definition function code 221 has the following outputs: primary I/O status, backup I/O status, channel was put in override
or simulation flag, and two spares. The I/O status outputs are the error summary of the I/O’s overall operational status (i.e., Harmony
network, redundancy, power, and configuration status) and error summary of all configured channels.
(Primary I/O block status with quality: 0 = good, 1 = bad) Quality is set to bad when FC 248 cannot communicate with the primary I/O
(N).
N+1
(Backup I/O block status with quality: 0 = good, 1 = bad) Quality is set to bad when FC 248 cannot communicate with the backup I/O
(N+1).
N+2
(Primary I/O block status with quality 0 = good, 1 = bad) Quality is set to bad when FC 248 cannot communicate with the primary I/O
(N).
N+3
(Spare output with quality) Quality is always set to good.
N+4 through N+19
(Data from module 1 through 16 with quality) Real value outputs of data received from the module. The content and interpretation of
this value is dependent on the module type it is connected to. Refer to the module product guide for details.
248-4 2VAA000844R0001 J
A. List of Function Codes Introduction
A. List of Function Codes
A.1 Introduction
This appendix contains cross references for all function codes.

• Table A-1 lists the function codes numerically, a description of each code, and the controllers that support them.
• Table A-2 alphabetically lists the function codes by function code description, and is followed by the function code
number.
• Tables A-3 through A-31 categorize the function codes by functionality. Note that in these tables function codes
may be listed in multiple categories.
2VAA000844R0001 J A-1
Cross Reference - Numerical Listing with Controller Support A. List of Function Codes
A.2 Cross Reference - Numerical Listing with Controller Support
Table A-1 Numerical Listing with Controller Support
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
1 Function generator X X X X X X
2 Manual set constant (signal generator) X X X X X X
3 Lead/lag X X X X X X
4 Pulse positioner X X X X X X
5 Pulse rate X X X X X X
6 High/low limiter X X X X X X
7 Square root X X X X X X
8 Rate limiter X X X X X X
9 Analog transfer X X X X X X
10 High select X X X X X X
11 Low select X X X X X X
12 High/low compare X X X X X X
13 Integer transfer X X X X X X
14 Summer (4-input) X X X X X X
15 Summer (2-input) X X X X X X
16 Multiply X X X X X X
17 Divide X X X X X X
18 PID error input X X X X X X
19 PID (PV and SP) X X X X X X
24 Adapt X X X X X X
25 Analog input (periodic sample) X X X X
26 Analog input/loop X X X X X X
30 Analog exception report X X X X X X
31 Test quality X X X X X X
32 Trip X X X X X X
33 Not X X X X X X
34 Memory X X X X X X
35 Timer X X X X X X
36 Qualified OR (8-input) X X X X X X
37 AND (2-input) X X X X X X
A-2 2VAA000844R0001 J
A. List of Function Codes Cross Reference - Numerical Listing with Controller Support
Table A-1 Numerical Listing with Controller Support (Continued)
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
38 AND (4-input) X X X X X X
39 OR (2-input) X X X X X X
40 OR (4-input) X X X X X X
41 Digital input (periodic sample) X X X X
42 Digital input/loop X X X X X X
45 Digital exception report X X X X X X
48 Analog Exception Report with High/Low Alarm X X X

deadband
50 Manual set switch X X X X X X
51 Manual set constant X X X X X X
52 Manual set integer X X X X X X
55 Hydraulic servo X X X X X X
57 Node statistics block X
58 Time delay (analog) X X X X X X
59 Digital transfer X X X X X X
61 Blink X X X X X X
62 Remote control memory X X X X X X
63 Analog input list (periodic sample) X X X X
64 Digital input list (periodic sample) X X X X
65 Digital sum (with gain) X X X X X X
66 Analog trend X X X X X X
67 Digital Exception Report with Alarm Deadband X X X
68 Remote manual set constant (REMSET) X X X X X X
69 Test alarm X X X X X X
79 Control interface slave X X X X X X
80 Control station X X X X X X
81 Executive X X X X X X
82 Segment control X X X X X X
83 Digital output group X X X X X X
84 Digital input group X X X X X X
85 Up/down counter X X X X X X
2VAA000844R0001 J A-3
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
86 Elapsed timer X X X X X X
87 Digital logic station interface X X X X
88 Digital logic station X X X X
89 Last block X X X X X
90 Extended executive X X X X X X
91 BASIC configuration (BRC-100/200) X X
92 Invoke BASIC X X
93 BASIC real output X X X X X
94 BASIC boolean output X X X X X
95 Module status monitor X X X X X X
96 Redundant analog input X X X X X X
97 Redundant digital input X X X X X X
98 Slave select X X X X X X
99 Sequence of events log X X
100 Digital output readback check X X X X X X
101 Exclusive OR X X X X X X
102 Pulse input/period X X X X X X
103 Pulse input/frequency X X X X X X
104 Pulse input/totalization X X X X X X
109 Pulse input/duration X X X X X X
110 Rung (5-input) X X X X X X
114 BCD input X X X X X X
115 BCD output X X X X X X
116 Jump/master control relay X X X X X X
117 Boolean recipe table X X X X X X
118 Real recipe table X X X X X X
119 Boolean signal multiplexer X X X X X X
120 Real signal multiplexer X X X X X X
121 Analog input/Cnet X X X X X X
122 Digital input/Cnet X X X X X X
A-4 2VAA000844R0001 J
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
123 Device driver X X X X X X
124 Sequence monitor X X X X X X
125 Device monitor X X X X X X
126 Real signal demultiplexer X X X X X X
128 Slave default definition X X X X X X
129 Multistate device driver X X X X X X
132 Analog input/slave X X X X X X
133 Smart field device definition X X X X
134 Multi-sequence monitor X X X X X X
135 Sequence manager X X X X X X
136 Remote motor control X X X X X X
137 C and BASIC program real output with quality X X X X X X
138 C or BASIC program boolean output with quality X X X X X X
139 Passive station interface X X X X X X
140 Restore X X X X X X
141 Sequence master X X X X X X
142 Sequence slave X X X X X X
143 Invoke C X X X X X X
144 C allocation X X X X X X
145 Frequency counter/slave X X X X X X
146 Remote I/O interface X X X X X X
147 Remote I/O definition X X X X X X
148 Batch sequence X X X X X X
149 Analog output/slave X X X X X X
150 Hydraulic servo slave X X X X
151 Text selector X X X X X X
152 Model parameter estimator X X X X X X
153 ISC parameter converter X X X X X X
154 Adaptive parameter scheduler X X X X X X
155 Regression X X X X X X
156 Advanced PID controller X X X X X X
157 General digital controller X X X X X X
2VAA000844R0001 J A-5
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
160 Inferential smith controller X X X X X X
161 Sequence generator X X X X X X
162 Digital segment buffer X X X X X X
163 Analog segment buffer X X X X X X
165 Moving average X X X X X X
166 Integrator X X X X X X
167 Polynomial X X X X X X
168 Interpolator X X X X X X
169 Matrix addition X X X X X X
170 Matrix multiplication X X X X X X
171 Trigonometric X X X X X X
172 Exponential X X X X X X
173 Power X X X X X X
174 Logarithm X X X X X X
177 Data acquisition analog X X X X X X
178 Data acquisition analog input/loop X X X X X X
179 Ehanced trend X X X X X X
184 Factory instrumentation protocol handler X X X
185 Digital input subscriber X X X
186 Analog input subscriber X X X
187 Analog output subscriber X X X
188 Digital output subscriber X X X
190 User defined function declaration X X X X X X
191 User defined function one X X X X X X
192 User defined function two X X X X X X
193 User defined data import X X X X X X
194 User defined data export X X X X X X
198 Auxiliary real user defined function X X X X X X
199 Auxiliary digital user defined function X X X X X X
201 Data point definition
202 Remote transfer module executive block (INIIT02)
203 INIPT02 executive block
A-6 2VAA000844R0001 J
Controller
Function
Description BRC-
Code BRC-
SPC700 HC800 300/400/410, HAC IMMFP11/12
100/200
HPG800
205 Analog Input List/CW800 (periodic sample) X
206 Digital Input List/CW800 (periodic sample) X
207 Module Status Monitor/CW800 X
210 Sequence of events slave X X X
211 Data acquisition digital X X X X X X
212 Data acquisition digital input/loop X X X X X X
215 Enhanced analog slave definition X X X X X X
216 Enhanced analog input definition X X X X X X
217 Enhanced calibration command X X X X X X
218 Phase execution X X X X X
219 Common sequence X X X X X X
220 Batch historian X X X X X X
221 I/O Device definition X X X X X
222 Analog in/channel X X X X X
223 Analog out/channel X X X X X
224 Digital in/channel X X X X X
225 Digital out/channel X X X X X
226 Test status X X X X X
227 Gateway X X X X
228 Foreign Device Definition X X X X
229 Pulse In/Channel X X X X
241 DSOE data interface X X X X X X
242 DSOE digital event interface X X X X
243 Executive block (SEM01/11)
244 Addressing interface definition
245 Input channel interface
246 Trigger definition
247 Condition monitoring X X X X
248 Turbine I/O device definition X X
2VAA000844R0001 J A-7
Cross Reference - Alphabetical A. List of Function Codes
A.3 Cross Reference - Alphabetical
Table A-2 Alphabetical Listing
Function
Description
Code
Adapt 24
Adaptive parameter scheduler 154
Addressing interface definition 244
Advanced PID controller 156
Analog exception report 30
Analog Exception Report with High/Low Alarm deadband 48
Analog in/channel 222
Analog input (periodic sample) 25
Analog input list (periodic sample) 63
Analog Input List/CW800 (periodic sample) 205
Analog input subscriber 186
Analog input/Cnet 121
Analog input/loop 26
Analog input/slave 132
Analog out/channel 223
Analog output subscriber 187
Analog output/slave 149
Analog segment buffer 163
Analog transfer 9
Analog trend 66
AND (2-input) 37
AND (4-input) 38
Auxiliary digital user defined function 199
Auxiliary real user defined function 198
BASIC boolean output 94
BASIC configuration (BRC-100/200) 91
BASIC real output 93
Batch historian 220
Batch sequence 148
BCD input 114
BCD output 115
Blink 61
A-8 2VAA000844R0001 J
A. List of Function Codes Cross Reference - Alphabetical
Table A-2 Alphabetical Listing (Continued)
Function
Description
Code
Boolean recipe table 117
Boolean signal multiplexer 119
C allocation 144
C and BASIC program real output with quality 137
C or BASIC program boolean output with quality 138
Common sequence 219
Condition Monitoring 247
Control interface slave 79
Control station 80
Data acquisition analog 177
Data acquisition analog input/loop 178
Data acquisition digital 211
Data acquisition digital input/loop 212
Data point definition 201
Device driver 123
Device monitor 125
Digital exception report 45
Digital Exception Report with Alarm Deadband 67
Digital in/channel 224
Digital input (periodic sample) 41
Digital input group 84
Digital input list (periodic sample) 64
Digital Input List/CW800 (periodic sample) 206
Digital input subscriber 185
Digital input/Cnet 122
Digital input/loop 42
Digital logic station 88
Digital logic station interface 87
Digital out/channel 225
Digital output group 83
Digital output readback check 100
Digital output subscriber 188
Digital segment buffer 162
2VAA000844R0001 J A-9
Function
Description
Code
Digital sum (with gain) 65
Digital transfer 59
Divide 17
DSOE data interface 241
DSOE digital event interface 242
Ehanced trend 179
Elapsed timer 86
Enhanced analog input definition 216
Enhanced analog slave definition 215
Enhanced calibration command 217
Exclusive OR 101
Executive 81
Executive block (SEM01/11) 243
Exponential 172
Extended executive 90
Factory instrumentation protocol handler 184
Foreign Device Definition 228
Frequency counter/slave 145
Function generator 1
Gateway 227
General digital controller 157
High select 10
High/low compare 12
High/low limiter 6
Hydraulic servo 55
Hydraulic servo slave 150
I/O Device definition 221
Inferential smith controller 160
INIPT02 executive block 203
Input channel interface 245
Integer transfer 13
Integrator 166
Interpolator 168
A-10 2VAA000844R0001 J
A. List of Function Codes Cross Reference - Alphabetical
Function
Description
Code
Invoke BASIC 92
Invoke C 143
ISC parameter converter 153
Jump/master control relay 116
Last block 89
Lead/lag 3
Logarithm 174
Low select 11
Manual set constant 51
Manual set constant (signal generator) 2
Manual set integer 52
Manual set switch 50
Matrix addition 169
Matrix multiplication 170
Memory 34
Model parameter estimator 152
Module status monitor 95
Module Status Monitor/CW800 207
Moving average 165
Multi-sequence monitor 134
Multiply 16
Multistate device driver 129
Node statistics block 57
Not 33
OR (2-input) 39
OR (4-input) 40
Passive station interface 139
Phase execution 218
PID (PV and SP) 19
PID error input 18
Polynomial 167
Power 173
Pulse In/Channel 229
2VAA000844R0001 J A-11
Function
Description
Code
Pulse input/duration 109
Pulse input/frequency 103
Pulse input/period 102
Pulse input/totalization 104
Pulse positioner 4
Pulse rate 5
Qualified OR (8-input) 36
Rate limiter 8
Real recipe table 118
Real signal demultiplexer 126
Real signal multiplexer 120
Redundant analog input 96
Redundant digital input 97
Regression 155
Remote control memory 62
Remote I/O definition 147
Remote I/O interface 146
Remote manual set constant (REMSET) 68
Remote motor control 136
Remote transfer module executive block (INIIT02) 202
Restore 140
Rung (10-input) 111
Rung (20-input) 112
Rung (5-input) 110
Segment control 82
Sequence generator 161
Sequence manager 135
Sequence master 141
Sequence monitor 124
Sequence of events log 99
Sequence of events slave 210
Sequence slave 142
Slave default definition 128
A-12 2VAA000844R0001 J
A. List of Function Codes Cross Reference - Categorization
Function
Description
Code
Slave select 98
Smart field device definition 133
Square root 7
Summer (2-input) 15
Summer (4-input) 14
Test alarm 69
Test quality 31
Test status 226
Text selector 151
Time delay (analog) 58
Timer 35
Turbine I/O device definition 248
Trigger definition 246
Trigonometric 171
Trip 32
Up/down counter 85
User defined data export 194
User defined data import 193
User defined function declaration 190
User defined function one 191
User defined function two 192
A.4 Cross Reference - Categorization
Function codes may be listed in multiple categories.
Table A-3 Adapt
24 Adapt
2VAA000844R0001 J A-13
Cross Reference - Categorization A. List of Function Codes
Table A-4 Advanced Functions
Function Function
Code Code
152 Model parameter estimator 167 Polynomial
153 ISC parameter converter 168 Interpolator
154 Adaptive parameter scheduler 169 Matrix addition
157 General digital controller 170 Matrix multiplication
160 Inferential smith controller 171 Trigonometric
162 Digital segment buffer 172 Exponential
163 Analog segment buffer 173 Power
165 Moving average 174 Logarithm
166 Integrator — —
Table A-5 BASIC Language
Function Function
Code Code
91 BASIC configuration (BRC-100/200) 94 BASIC boolean output
92 Invoke BASIC 137 C and BASIC program real output

with quality
93 BASIC real output 138 C or BASIC program boolean output

with quality
Table A-6 Batch Functions
Function Function
Code Code
117 Boolean recipe table 129 Multistate device driver
118 Real recipe table 134 Multi-sequence monitor
119 Boolean signal multiplexer 135 Sequence manager
120 Real signal multiplexer 141 Sequence master
123 Device driver 142 Sequence slave
124 Sequence monitor 161 Sequence generator
125 Device monitor 218 Phase execution
126 Real signal demultiplexer — —
A-14 2VAA000844R0001 J
Table A-7 Batch Language
Function Function
Code Code
93 BASIC real output 148 Batch sequence
94 BASIC boolean output 218 Phase execution
137 C and BASIC program real output 219 Common sequence

with quality
138 C or BASIC program boolean output 220 Batch historian

with quality
Table A-8 C Language
Function Function
Code Code
93 BASIC real output 138 C or BASIC program boolean output

with quality
94 BASIC boolean output 143 Invoke C
137 C and BASIC program real output 144 C allocation

with quality
Table A-9 Communications
Function
Description
Code
201 Data point definition
202 Remote transfer module executive block (INIIT02)
203 INIPT02 executive block
Table A-10 Computing
Function Function
Code Code
1 Function generator 17 Divide
2 Manual set constant 51 Manual set constant

(signal generator)
3 Lead/lag 52 Manual set integer
5 Pulse rate 58 Time delay (analog)
6 High/low limiter 65 Digital sum with gain
7 Square root 155 Regression
8 Rate limiter 171 Trigonometric
14 Summer (4-input) 172 Exponential
15 Summer (2-input) 173 Power
16 Multiply 174 Logarithm
2VAA000844R0001 J A-15
Table A-11 Controlway/Module Bus/CW800 and Peer-to-Peer Network I/O
Function Function
Code Code
25 Analog input (periodic sample) 95 Module status monitor
41 Digital input (periodic sample) 205 Analog Input List/CW800
63 Analog input list (periodic sample) 206 Digital Input List/CW800
64 Digital input list (periodic sample) 207 Module Status Monitor/CW800
Table A-12 Control Function Blocks
Function Function
Code Code
4 Pulse positioner 24 Adapt
18 PID error input 156 Advanced PID controller
19 PID (PV and SP) 160 Inferential smith controller
Table A-13 Exception Report
Function Function
Code Code
26 Analog input/loop 178 Data acquisition analog input/loop
30 Analog exception report 193 User defined data import
42 Digital input/loop 194 User defined data export
45 Digital Exception Report 205 Analog input list/CW800 (periodic

sample)
48 Analog exception report with 206 Digital input list/CW800 (periodic

high/low deadband sample)
62 Remote control memory 211 Data acquisition digital
67 Digital exception report with alarm 212 Data acquisition digital input/loop
deadband
68 Remote manual set constant 218 Phase execution
80 Control station 221 I/O device definition
121 Analog input/Cnet 222 Analog in/channel
122 Digital input/Cnet 223 Analog out/channel
123 Device driver 224 Digital in/channel
129 Multistate device driver 225 Digital out/channel
136 Remote motor control (RMC) 229 Pulse in/channel
177 Data acquisition analog
A-16 2VAA000844R0001 J
Table A-14 Executive
Function Function
Code Code
57 Node statistics block 89 Last block
81 Executive 90 Extended executive
82 Segment control — —
Table A-15 Factory Instrumentation Protocol
Function Function
Code Code
184 Factory instrumentation protocol 187 Analog output subscriber

handler
185 Digital input subscriber 188 Digital output subscriber
186 Analog input subscriber — —
Table A-16 Field I/O
Function Function
Code Code
55 Hydraulic servo 128 Slave default definition
79 Control interface slave 132 Analog input/slave
83 Digital output group 133 Smart field device definition
84 Digital input group 145 Frequency counter/slave
96 Redundant analog input 146 Remote I/O interface
97 Redundant digital input 147 Remote I/O definition
103 Pulse input/frequency 150 Hydraulic servo slave
104 Pulse input/totalization 210 Sequence of events slave
109 Pulse input/duration 215 Enhanced analog slave definition
114 BCD input 216 Enhanced analog input definition
115 BCD output 217 Enhanced calibration command
Table A-17 Harmony I/O and Foreign Devices (PROFIBUS & HART)
Function Function
Code Code
221 I/O device definition 226 Test status
222 Analog in/channel 227 Gateway
223 Analog out/channel 228 Foreign device definition
224 Digital in/channel 229 Pulse in/channel (S800 - DP820)
225 Digital out/channel 248 Turbine I/O device definition
2VAA000844R0001 J A-17
Table A-18 Harmony Bridge Controller Executive
Function Function
Code Code
81 Executive 89 Last block
82 Segment control 90 Extended executive
Table A-19 Ladder Logic
Function Function
Code Code
110 Rung (5-input) 112 Rung (20-input)
111 Rung (10-input) 116 Jump/master control relay
Table A-20 Logic
Function Function
Code Code
33 Not 61 Blink
34 Memory 85 Up/down counter
35 Timer 86 Elapsed timer
36 Qualified OR (8-input) 101 Exclusive OR
37 AND (2-input) 110 Rung (5-input)
38 AND (4-input) 111 Rung (10-input)
39 OR (2-input) 112 Rung (20-input)
40 OR (4-input) 123 Device driver
50 Manual set switch 129 Multistate device driver
59 Digital transfer — —
Table A-21 I/O Expander Bus
Function Function
Code Code
55 Hydraulic Servo 146 Remote I/O interface
79 Control interface slave 147 Remote I/O definition
83 Digital output group 149 Analog output/slave
84 Digital input group 150 Hydraulic servo slave
87 Digital logic station interface 184 Factory instrumentation protocol

handler
88 Digital input group 185 Digital input subscriber
102 Pulse input/period 186 Analog input subscriber
103 Pulse input/frequency 187 Analog output subscriber
104 Pulse input/totalization 188 Digital output subscriber
A-18 2VAA000844R0001 J
Table A-21 I/O Expander Bus (Continued)
Function Function
Code Code
109 Pulse input/duration 210 Sequence of events slave
114 BCD input 215 Enhanced analog slave definition
115 BCD output 216 Enhanced analog input definition
128 Slave default definition 217 Enhanced calibration command
132 Analog input/slave 241 DSOE data interface
140 Restore1 242 DSOE digital event interface
145 Frequency counter/slave 247 Condition monitoring

NOTE: 1. Restore uses expander bus only if a timer input is specified (S6 not equal to 000).
Table A-22 Restore
140 Restore
Table A-23 Sequence Command
82 Segment control
90 Extended executive
Table A-24 Sequence of Events
Function Function
Code Code
99 Sequence of events log 243 Executive block (SEM01/11)
210 Sequence of events slave 244 Addressing interface definition
241 DSOE data interface SEM to BRC 245 Input channel interface
242 DSOE digital event interface 246 Trigger definition
Table A-25 Signal Select
Function Function
Code Code
9 Analog transfer 59 Digital transfer
10 High select 162 Digital segment buffer
11 Low select 163 Analog segment buffer
13 Integer transfer — —
2VAA000844R0001 J A-19
Table A-26 Signal Status
Function Function
Code Code
12 High/low compare 98 Slave select
31 Test quality 100 Digital output readback check
69 Test alarm — —
Table A-27 Station
Function Function
Code Code
62 Remote control memory 123 Device driver
68 Remote manual set constant 129 Multistate device driver
80 Control station 136 Remote motor control
87 Digital logic station interface 139 Passive station interface
88 Digital logic station — —
Table A-28 Text Selector
151 Text selector
Table A-29 Trend
66 Analog trend
179 Enhanced trend
Table A-30 Trip
32 Trip
Table A-31 User Defined Function
Function Function
Code Code
190 User defined function declaration 194 User defined data export
191 User defined function one 198 Auxiliary real user defined function
192 User defined function two 199 Auxiliary digital user defined function
193 User defined data import — —
A-20 2VAA000844R0001 J
B. Symphony Plus SPC700 Control Processor Memory Utilization and Execution Times
B. Symphony Plus SPC700 Control Processor

The SPC700 Harmony Process Controller consists of the HC800 Control Processor module and the CP800 Communications Processor
module.
B.1 Memory Utilization and Execution Times
This section lists the module memory requirements for each function code supported by the SPC700 control processor. The SPC700
stores and processes function code configurations. Three quantities are given for the SPC700 memory utilization:
• The number of bytes of nonvolatile random access memory (NVRAM). The SPC700 module has 512 kbytes of
NVRAM memory.
• The number of bytes of random access memory (RAM). The SPC700 has 128 megabytes of total RAM
configuration memory.
• The checkpoint utilization byte size.
This section also lists the function code execution times (in microseconds) for the SPC700.
NOTE: Except where otherwise noted, execution times are given for worst case conditions.
Table B-1 shows the SPC700 memory requirements and the execution time for each supported function code.
NOTE: Refer to Memory Usage Equations in this section for the equations listed in Table B-1.
Table B-1 SPC700 Memory Utilization and Execution Times
Checkpoint Execution
Function NVRAM RAM
Description Utilization Times
Code (Bytes) (Bytes)
Byte Size (in µsecs)
1 Function generator 46 108 12 2.80
2 Manual set constant 12 58 12 0.75
3 Lead/lag 18 88 22 5.00
4 Pulse positioner 24 180 56 3.00
5 Pulse rate 16 88 18 7.00
6 High/low limiter 16 64 12 1.00
7 Square root 14 64 12 7.26
8 Rate limiter 18 80 18 2.98
9 Analog transfer 20 92 22 5.60
10 High select 16 68 12 1.18
11 Low select 16 68 12 1.16
12 High/low compare 16 64 12 0.97
13 Integer transfer 14 60 10 0.76
14 Four input summer 16 68 12 2.14
15 Two input summer 18 68 12 2.22
16 Multiply 14 64 12 1.85
17 Divide 14 64 12 2.11
18 PID error input 34 124 26 19.15
19 PID process variable and set point 36 132 30 20.96
2VAA000844R0001 J B-1
Memory Utilization and Execution Times B. Symphony Plus SPC700 Control Processor
Table B-1 SPC700 Memory Utilization and Execution Times (Continued)
Function NVRAM RAM
24 Adapt 12 66 12 1.25
26 Analog input/loop 12 72 18 1.33
30 Analog exception report 26 118 22 3.00
31 Test quality 16 68 10 2.33
32 Trip 12 54 10 0.93
33 Not 12 54 10 0.67
34 Memory 14 62 10 0.67
35 Timer 14 74 18 1.67
36 Qualified OR (eight input) 26 84 10 1.33
37 AND (two input) 12 56 10 0.67
38 AND (four input) 16 64 10 0.65
39 OR (two input) 12 56 10 0.56
40 OR (four input) 16 64 10 0.67
42 Digital input/loop 12 60 12 1.10
45 Digital exception report 12 82 16 2.76
48 Analog Exception Report with 32 126 22 3.00

High/Low Alarm Deadband
50 Manual set switch 12 52 10 0.67
51 Manual set constant (nontunable) 12 58 12 0.67
52 Manual set integer 12 52 10 0.56
55 Hydraulic servo5 62 430 88 1,723
58 Time delay (analog) 18 94 or Equa- 22 12.60

tion 1
59 Digital transfer 14 60 10 0.73
61 Blink 12 64 14 1.71
62 Remote control memory 28 112 18 2.67
65 Digital sum with gain (four input) 28 84 12 1.74
66 Analog trend
Normal mode (slow) 12 212 88 1.67
Fast mode 12 212 88 2.33
67 Digital Exception Report with 16 102 22 2.00

Alarm Deadband
68 Remote manual set constant 22 144 32 2.17

(REMSET)
69 Test alarm 12 60 12 0.67
B-2 2VAA000844R0001 J
Function NVRAM RAM
79 Control interface slave5

First function code 79 block in 50 354 68 15,430
segment 50 354 68 570
Other function code 79 blocks in
segment
80 Control station 84 382 76 7.19
81 Executive block 12 3752 62 0
82 Segment control 64 316 56 0
83 Digital output group5 32 120 12 98.00
84 Digital input group5 16 144 44 97.00
85 Up/down counter 24 92 18 1.73
86 Elapsed Timer 20 100 24 1.65
89 Last block 12 66 16 0
90 Extended executive 38 64 12 0
93 BASIC real output 12 80 24 0.49
94 BASIC boolean output 12 88 28 0.45
956 Module status monitor 22 124 34
96 Redundant analog input 22 122 34 4.37
97 Redundant digital input 14 74 16 1.39
98 Slave select 26 100 14 1.73
100 Digital output readback check 40 160 26 3.55
101 Exclusive OR 12 56 10 0.63
102 Pulse input/period5 26 126 20 118.00
103 Pulse input/frequency5 26 126 20 124.00
104 Pulse input/totalization5 28 156 32 148.00
109 Pulse input/duration5 26 126 20 117.00
110 Five input rung 24 90 14 1.67
111 Ten input rung 38 120 14 2.16
112 Twenty input rung 68 180 14 3.33
114 BCD input5 20 98 18 82.00
115 BCD output5 22 98 12 109.00
116 Jump/master control relay 12 68 10 0.33
117 Boolean recipe table 28 84 10 1.40
118 Real recipe table 48 118 12 1.60
2VAA000844R0001 J B-3
Function NVRAM RAM
119 Boolean signal multiplexer 32 102 10 1.30
120 Real signal multiplexer 32 106 12 1.39
121 Analog input/Cnet 22 98 20 1.98
122 Digital input/Cnet 20 66 12 2.78
123 Device driver 30 134 28 3.00
124 Sequence monitor 80 180 20 2.00
125 Device monitor 40 118 12 3.98
126 Real signal demultiplexer 12 108 24 1.30
128 Slave default definition5 44 98 12 1.00
129 Multistate device driver 60 184 34 3.90
132 Analog input/slave5 54 366 48 252.00
134 Multi-sequence monitor 96 284 36 0.89
135 Sequence manager 82 244 32 4.17
136 Remote motor control 52 202 46 6.55
137 BASIC real output/quality 12 96 32 0.56
138 BASIC boolean output/quality 12 80 24 0.49
139 Passive station interface 44 162 32 3.00
140 Restore Refer to

Largest NVM utilization formula in 104 12 1,600.38
(function code 165 with S2 function
= 249) code 140 104 12 25.93
Smallest NVM utilization
(function code 33)
141 Sequence master 80 158 24 1.77
142 Sequence slave 74 120 10 0.66
143 Invoke C 28 124 22 Program

dependent
144 C allocation Equation 2 Equation 3 Equation 4 1.00
145 Frequency counter/slave5 32 146 22 45.00
146 Remote I/O interface5 68 Equation 28 56 700
147 Remote I/O definition5 144 588 108 10.00
148 Batch sequence 36 Equation 5 Equation 6 Program

dependent
B-4 2VAA000844R0001 J
Function NVRAM RAM
149 Analog output/slave5

First function code 149 in 84 344 52 16,016
segment 84 344 52 16,015
Second function code 149 in
segment 84 344 52 702
(same ASO as first)
Additional function code 149s in
segment
151 Text selector 46 168 22 1.82
152 Model parameter estimator 28 368 26 3.33
153 Inferential smith controller 42 212 30 10.00

parameter converter
154 Adaptive parameter scheduler 36 240 28 5.00
155 Regression 68 Equation 7 Equation 8 4.26
156 Advanced PID controller 58 206 48 27.88
157 General digital controller 68 Equation 9 Equation 10 3.21
160 Smith predictor 36 358 122 10.48
161 Sequence generator 74 228 46 2.53
162 Digital segment buffer 16 94 24 1.26
163 Analog segment buffer 16 110 32 1.52
165 Moving average 16 Equation 11 Equation 12 5.77
166 Integrator 28 108 24 5.26
167 Polynomial
Most complicated 58 124 12 37.84
All zero 58 124 12 26.85
168 Interpolator 98 212 14 5.71
169 Matrix addition 44 188 44 3.97
170 Matrix multiplication 44 188 44 23.86
171 Trigonometric
Sine 14 64 12 7.38
Secant 14 64 12 8.10
172 Exponential 12 60 12 7.22
173 Power 14 64 12 11.50
174 Logarithm 14 66 12 5.00
177 Data acquisition analog 104 414 90 10.04
178 Data acquisition analog input/loop 20 150 44 3.57
2VAA000844R0001 J B-5
Function NVRAM RAM
179 Enhanced trend

Normal sampling 52 FDB + FOB Equation 13 5.68
Normal and statistical sampling 52 180 + 2 x Equation 13 10.92
Equation 13
190 User defined function declaration 30 Equation 14 12 1.00
191 User defined function one 56 532 + S16 94+ S16 Program
dependent
192 User defined function two 70 616 + S24 110 + S24 Program
dependent
193 User defined data import 48 Equation 17 70 + S5 1.19
194 User defined data export 48 Equation 18 58 + S4 4.38
198 Aux. real user defined function 38 166 24 0.71
199 Aux. digital user defined function 38 150 16 0.67
211 Data acquisition digital 62 326 78 6.30
212 Data acquisition digital input/loop 20 126 32 1.98
215 Enhanced analog slave definition5 32 232 26 558.00
216 Enhanced analog input definition5 42 130 16 218.00
217 Enhanced calibration command5 24 194 40 9.00
218 Phase execution 44 Equation 20 304 Program

dependent
219 Common sequence 46 Equation 15 Equation 16 Program

dependent
220 Batch historian 46 688 + S11 222 + S11 Program

dependent
221 I/O device definition Equation 1524 64 Note 1

21
222 Analog in/channel Equation 332 64 35.802

22
223 Analog out/channel Equation 332 64 49.652

23
224 Digital in/channel Equation 332 64 24.002

24
225 Digital out/channel Equation 332 64 16.002

25
226 Test status Equation 148 16 3.06

19
227 Gateway Equation 20556 76 41,194 3

29
B-6 2VAA000844R0001 J
B. Symphony Plus SPC700 Control Processor Memory Usage Equations
Function NVRAM RAM
228 Foreign device definition Equation 404 120 21.00

26
229 Pulse In/Channel Equation 480 84 126.00

27
241 DSOE interface SEM to MFP 126.00

No SED resynch performed 18 340 26
SED resynch performed (1/sec.) 18 340 26
247 Condition monitoring4,5 134 592 82 Note 4

NOTES:
1. Time dependent on the I/O block type configured and on the presence or absence of redundant
blocks.
2. With exception reports enabled.
3. Time for the maximum configuration.
4. Time dependent on the turbine instrumentation module type. Refer to the applicable product
instruction manual.
5. These function codes are for use with remote IO applications only. They may be used only when
accessing Harmony Rack IO modules via an RIO22 connected to an SPC700 using function codes 146 and
147.
6. Function code 95 may only be used to monitor the status of the SPC700 in which it resides. It may not be
used to monitor the status of other nodes or SPC700 controllers.
B.2 Memory Usage Equations
1. 72 + [8 x (S5)]
2. 12 + [1024 x (S2)]
3. 42 + [1024 x (S1)]
4. 10 + [1024 x (S1)]
5. 676 + [1024 x (S11)] + [a x (S12)]
where:
a = 2 (if S12 is positive)
- or -
a = 2048 (if S12 is negative)
6. 248 + [b x (S12)]
where:
- or -
7. 294 + [20 x (S7)]
8. 60 + [20 x (S7)]
9. 144 + [8 x (S21 + S22)]
10. 60 + [4 x (S21 + S22)]
11. 79 + [4 x (S2)]
12. 34 + [4 x (S2)]
13. a + [b x (S4)] + [c x (n{S3})],
where:
n{S3} = Number of modes selected for S3
if S2 = 0, 10, or 11, then a = 106, b = 12, and c = 8
if S2 = 1, 2, 5, 6, 7, 9, 12, or 13, then a = 100, b = 10, and c = 4
if S2 = 4 or 8, then a = 128, b = 25, and c = 32
2VAA000844R0001 J B-7
Function Blocks - SPC700 B. Symphony Plus SPC700 Control Processor
14. 82 + [10 x (S2)]

15. 490 + [292 x (S13)]
16. 378 + [142 x (S13)]
17. 214 + [2 x (S5)]
18. 202 + [4 x (S4)]
19. 27 + Size of string data in S2 + S3 + S4 + S5 + S10.
20. 1458 + [1024 x (S11)] + [2 x (S12)]
21. 90 + Size of string data in S1 + Size of string data in S30.
22. 92 + Size of string data in S1+ Size of string data in S23.
26. 48 + Size of string data in S1 + Size of string data in S2
+ Size of string data in S7
28. 1008 + (16 x (S4))
29. 48 + Size of string data in S1+ Size of string data in S2 + Size of string data in S24.
B.3 Function Blocks - SPC700
Table B-2 contains function code block number information for the SPC700 module.
Table B-2 SPC700 Module
Block No. Definition Function Code
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0
8 -9.2 E18
9 9.2 E18
10 Startup flag (0 = no, 1 = yes)
11 Memory display value
12 System free time in percent
13 Revision level
14 Reserved
B-8 2VAA000844R0001 J
B. Symphony Plus SPC700 Control Processor Module Status Information
Table B-2 SPC700 Module (Continued)
15 Task 1 elapsed time since previous cycle 82
16 Task 1 elapsed time current cycle (sec/min)
17 Task 1 processor utilization
18 Task 1 check point overrun count
19 Task 1 cycle time overrun (sec/min)
20 Hours, time of day 90
21 Minutes, time of day
22 Seconds, time of day
23 No time synchronization flag:

0 = time of day invalid
1 = time of day valid
24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
27 Day of week (1 to 7, Sunday = 1)
28 Reserved
29 Reserved
30 Configurable blocks Any allowed

function code -
refer to Table B-1
31999 Loop type: 89

1.0 = PN800
3.0 = PN800 with time-stamping
NOTE:
B.4 Module Status Information
Table B-3 and Table B-4 explain the controller module status bits and bytes.
Table B-3 Byte and Bit Description - SPC700
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 FTX BAC RIO LIO CFG NVF NVI STA
3 Error code
4 Error code descriptor (1)
6 ETYPE
7 Reserved R1F R2F Reserved HN800A HN800B
2VAA000844R0001 J B-9
Module Status Information B. Symphony Plus SPC700 Control Processor
Table B-3 Byte and Bit Description - SPC700 (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
8 Reserved
9 Reserved RIOID ETHER Reserved
10 PRI CFC Reserved CHK RID RDEXP OCE RDDET
11 PSA PSB Reserved RNO Reserved
12 Reserved CSP Net Swap Net Mis- Net Idle 1 Net idle 2
match
13 Reserved
14 Module nomenclature
15 Revision letter (ASCII)
16 Revision number (ASCII)
Table B-4 Byte Description - SPC700
Field Size
Byte Field Description
or Value
12 ES 80 Error summary: 0 = good, 1 = errors
MODE 60 Module mode: 00 = configure, 10 = error, 11 = execute
TYPE 1F Module type code: (15)16 = Enhanced status
2 FTX 80 First time in execute: 0 = no, 1 = yes
BAC 40 Backup status: 0 = good, 1 = bad
RIO 20 Summary remote input status: 0 = good, 1 = bad
LIO 10 Summary local input status: 0 = good, 1 = bad
CFG 08 Online configuration changes being made
NVF 04 Summary NVRAM failure status: 0 = good, 1 = fail
NVI 02 Summary NVRAM initialized state: 0 = no, 1 = yes
STA 01 Digital station status: 0 = good, 1 = bad
B-10 2VAA000844R0001 J
Table B-4 Byte Description - SPC700 (Continued)
Field Size
or Value
3-5 Error 3 4 5
Note 1 Code
NVRAM error:
01 01 — Write failure
02 — Checksum failure
03 — Bad data
FF — Reset during write
02 (1) (2) Analog input reference error:

(1), (2) = block number of control interface I/O module block
03 (1) (2) Missing I/O module or expander board:

(1), (2) = block number of I/O module or station
05 (1) (2) Configuration error – undefined block:

(1), (2) = block number making reference
06 (1) (2) Configuration error – input data type is incorrect:

08 (1) (2) Trip block activated:

(1), (2) = block number of trip block
09 — — Segment violation - priority set the same in two segments or more than
eight segments defined.
0F — — Primary module has failed and the redundant module configuration is

not current
10 — — Primary module has failed and the dynamic RAM data in the redundant
module is not current
11 — — NVRAM write failure error
1E (1) (2) Duplicate device definition label – multiple function code 221 function
blocks contain the same device label.
(1), (2) = block number making reference.
20 — — Program format error - inconsistent format table
File system error:

21 00 00 Backup cannot take over due to uninitialized file system.
FF FE Directory has not been configured.
FF FF List of file system free memory is corrupted.
(1) (2) (1), (2) = Number of files with errors.
62 ETYPE 1F Enhanced module type = (24)16
7 — — Reserved
— — Reserved
R1F 20 Redundancy link channel 1 failure: 0 = good, 1 = fail
— — Reserved
— — Reserved
HN800A 02 HN800 channel A failure: 0 = good, 1 = fail
HN800B 01 HN800 channel B failure: 0 = good, 1 = fail
8 — — Reserved
2VAA000844R0001 J B-11
Field Size
or Value
9 — — Reserved
— — Reserved
— — Reserved
— — Reserved
RIOID 08 Remote I/O Controller: 0 = no, 1 = yes
ETHER 04 Ethernet Installed: 0 = no, 1 = yes
— — Reserved
— — Reserved
10 PRI 80 Module is primary versus backup; set to 1 in the primary module.
CFC 40 Configuration current (latched until backup is reset). Set when LED 7 is
enabled (1 = on or blinking) on the backup module.
— — Reserved
CHK 10 Backup has completed checkpointing (latched until backup is reset).

Always set to 0 on the primary module. Follows LED 8 (1 = on or blink-
ing) on the backup module.
RID 08 Redundancy ID. Determined by the position in the MB710 mounting

base.
RDEXP 04 Redundancy expected. Always set to 1 on the backup module. Follows

state of function code 90, specification S3, ones digit on the primary
module.
OCE 02 Online configuration is enabled. Follows setting of online configuration

enable pole on virtual dipswitch.
RDDET 01 Redundancy detected (latched until module is reset or it changes from

backup to primary or primary to backup). Set to 1 when a properly con-
figured redundant module is detected.
11 PSA 80 Power Status A: 0 = OK, 1 = failed/bad
PSB 40 Power Status B: 0 = OK, 1 = failed/bad
— — Reserved
— — Reserved
RNO 08 Redundancy NVM overrun (latched indication). Set to 1 in primary

module if NVM checkpoint overruns have occurred. NVM checkpoint
overruns cause the primary module to reset the backup module.
— — Reserved
— — Reserved
— — Reserved
B-12 2VAA000844R0001 J
Field Size
or Value
12 — — Reserved
— — Reserved
— — Reserved
CSP 10 Communication status problem: 0 = no, 1 = yes.
Net Swap 08 Network LAN A/B Swapped: 0 = no, 1 = yes.

If this bit is a '1' / YES, then SPC700 detects one or more nodes on the
Network having their (PN800) LAN A/B Ethernet connections swapped
(i.e. LAN A is connected to LAN B and LAN B is connected to LAN A).
Net Mis- 04 Network LAN A/B Mismatch: 0 = no, 1 = yes

match
If this bit is a '1' / YES, then SPC700 detects that its (PN800) LAN A/B
Ethernet connections are operating in different modes (i.e. A= 10 MHZ,
B= 100 MHZ, or A= Full Duplex, B= Half Duplex).
Net Idle 1 02 Error on PN00 LAN 'A'. No connection on RJ45 for PN800 LAN A
(labeled PN800 A on the MB705 or MB710 base).
Net idle 2 01 Error on PN00 LAN 'B'. No connection on RJ45 for PN800 LAN B
(labeled PN800 B on the MB705 or MB710 base).
13 — 00 Reserved
142 — FF Module nomenclature number (1E)16 =30 for the SPC700
152 — FF Revision letter (in ASCII code), for example, (41)16 = A
162 — FF Revision number (in ASCII code), for example, (30) 16 = 0
NOTE:
1. Byte 3 is displayed on the front panel LEDs when the module is in ERROR mode.
2. (x)16 denotes a hexadecimal number. The equivalent decimal or ASCII character is to be used. Hex to
ASCII Code conversion charts are readily available on the Internet.
2VAA000844R0001 J B-13
B-14 2VAA000844R0001 J
C. Symphony Plus HC800 Control Processor Memory Utilization and Execution Times
C. Symphony Plus HC800 Control Processor

The HPC800 Harmony Process Controller consists of the HC800 Control Processor module and the CP800 Communications Processor
module.
C.1 Memory Utilization and Execution Times
This section lists the module memory requirements for each function code supported by the HC800 module. The HC800 module is the
component of the HPC800 Harmony Process Controller module in which the function code configurations are stored and processed.
Three quantities are given for the HC800 module memory utilization:
• The number of bytes of nonvolatile random access memory (NVRAM). The HC800 module has 1.9 megabytes of
NVRAM memory.
• The number of bytes of random access memory (RAM). The total RAM configuration memory for the HC800
module is 16 megabytes.
This section also lists the function code execution times (in microseconds) for the HC800 module.
Table C-1 shows the HC800 module memory requirements and the execution time for each supported function code.
NOTE: Refer to Memory Usage Equations in this section for the equations listed in Table C-1.
Table C-1 HC800 Module Memory Utilization and Execution Times
Function NVRAM RAM
1 Function generator 46 108 12 2.80
2 Manual set constant 12 58 12 0.75
3 Lead/lag 18 88 22 5.00
4 Pulse positioner 24 180 56 3.00
5 Pulse rate 16 88 18 7.00
6 High/low limiter 16 64 12 1.00
7 Square root 14 64 12 7.26
8 Rate limiter 18 80 18 2.98
9 Analog transfer 20 92 22 5.60
10 High select 16 68 12 1.18
11 Low select 16 68 12 1.16
12 High/low compare 16 64 12 0.97
13 Integer transfer 14 60 10 0.76
14 Four input summer 16 68 12 2.14
15 Two input summer 18 68 12 2.22
16 Multiply 14 64 12 1.85
17 Divide 14 64 12 2.11
18 PID error input 34 124 26 19.15
19 PID process variable and set point 36 132 30 20.96
2VAA000844R0001 J C-1
Memory Utilization and Execution Times C. Symphony Plus HC800 Control Processor
Table C-1 HC800 Module Memory Utilization and Execution Times (Continued)
Function NVRAM RAM
24 Adapt 12 66 12 1.25
25 Analog input (periodic sample) N/A, see function codes 205
26 Analog input/loop 12 72 18 1.33
30 Analog exception report 26 118 22 3.00
31 Test quality 16 68 10 2.33
32 Trip 12 54 10 0.93
33 Not 12 54 10 0.67
34 Memory 14 62 10 0.67
35 Timer 14 74 18 1.67
36 Qualified OR (eight input) 26 84 10 1.33
37 AND (two input) 12 56 10 0.67
38 AND (four input) 16 64 10 0.65
39 OR (two input) 12 56 10 0.56
40 OR (four input) 16 64 10 0.67
41 Digital input/bus (periodic sample) N/A, see function code 206
42 Digital input/loop 12 60 12 1.10
45 Digital exception report 12 82 16 2.76
48 Analog Exception Report with 32 126 22 3.00

High/Low Alarm Deadband
50 Manual set switch 12 52 10 0.67
51 Manual set constant (nontunable) 12 58 12 0.67
52 Manual set integer 12 52 10 0.56
55 Hydraulic servo5 62 430 88 1,723
58 Time delay (analog) 18 94 or Equa- 22 12.60

tion 1
59 Digital transfer 14 60 10 0.73
61 Blink 12 64 14 1.71
62 Remote control memory 28 112 18 2.67
63 Analog input list (periodic sample) N/A, see function code 205
64 Digital input list (periodic sample) N/A, see function code 206
65 Digital sum with gain (four input) 28 84 12 1.74
66 Analog trend
Normal mode (slow) 12 212 88 1.67
Fast mode 12 212 88 2.33
C-2 2VAA000844R0001 J
Function NVRAM RAM
67 Digital Exception Report with 16 102 22 2.00

Alarm Deadband
68 Remote manual set constant 22 144 32 2.17

(REMSET)
69 Test alarm 12 60 12 0.67
79 Control interface slave5

First FC 79 block in segment 50 354 68 15,430
Other FC 79 blocks in segment 50 354 68 570
80 Control station 84 382 76 7.19
83 Digital output group5 32 120 12 98.00
84 Digital input group5 16 144 44 97.00
85 Up/down counter 24 92 18 1.73
86 Elapsed Timer 20 100 24 1.65
89 Last block 12 66 16 0
93 BASIC real output 12 80 24 0.49
94 BASIC boolean output 12 88 28 0.45
96 Redundant analog input 22 122 34 4.37
97 Redundant digital input 14 74 16 1.39
98 Slave select 26 100 14 1.73
100 Digital output readback check 40 160 26 3.55
101 Exclusive OR 12 56 10 0.63
102 Pulse input/period5 26 126 20 118.00
103 Pulse input/frequency5 26 126 20 124.00
104 Pulse input/totalization5 28 156 32 148.00
109 Pulse input/duration5 26 126 20 117.00
110 Five input rung 24 90 14 1.67
111 Ten input rung 38 120 14 2.16
112 Twenty input rung 68 180 14 3.33
114 BCD input5 20 98 18 82.00
115 BCD output5 22 98 12 109.00
2VAA000844R0001 J C-3
Function NVRAM RAM
116 Jump/master control relay 12 68 10 0.33
117 Boolean recipe table 28 84 10 1.40
118 Real recipe table 48 118 12 1.60
119 Boolean signal multiplexer 32 102 10 1.30
120 Real signal multiplexer 32 106 12 1.39
121 Analog input/Cnet 22 98 20 1.98
122 Digital input/Cnet 20 66 12 2.78
123 Device driver 30 134 28 3.00
124 Sequence monitor 80 180 20 2.00
125 Device monitor 40 118 12 3.98
126 Real signal demultiplexer 12 108 24 1.30
128 Slave default definition5 44 98 12 1.00
129 Multistate device driver 60 184 34 3.90
132 Analog input/slave5 54 366 48 252.00
134 Multi-sequence monitor 96 284 36 0.89
135 Sequence manager 82 244 32 4.17
136 Remote motor control 52 202 46 6.55
137 BASIC real output/quality 12 96 32 0.56
138 BASIC boolean output/quality 12 80 24 0.49
139 Passive station interface 44 162 32 3.00

Largest NVM utilization formula in 104 12 1,600.38
(FC 165 with S2 = 249) Function
Smallest NVM utilization (FC 33) Code 140 104 12 25.93
141 Sequence master 80 158 24 1.77
142 Sequence slave 74 120 10 0.66

dependent
144 C allocation Equation 2 Equation 3 Equation 4 1.00
145 Frequency counter/slave5 32 146 22 45.00
146 Remote I/O interface5 68 Equation 28 56 700
147 Remote I/O definition5 144 588 108 10.00

dependent
C-4 2VAA000844R0001 J
Function NVRAM RAM
149 Analog output/slave5

First FC 149 in segment 84 344 52 16,016
Second FC 149 in segment 84 344 52 16,015
(same ASO as first)
Additional FC 149s in segment 84 344 52 702
151 Text selector 46 168 22 1.82
152 Model parameter estimator 28 368 26 3.33
153 Inferential smith controller 42 212 30 10.00

parameter converter
154 Adaptive parameter scheduler 36 240 28 5.00
155 Regression 68 Equation 7 Equation 8 4.26
156 Advanced PID controller 58 206 48 27.88
157 General digital controller 68 Equation 9 Equation 10 3.21
160 Smith predictor 36 358 122 10.48
161 Sequence generator 74 228 46 2.53
162 Digital segment buffer 16 94 24 1.26
163 Analog segment buffer 16 110 32 1.52
165 Moving average 16 Equation 11 Equation 12 5.77
166 Integrator 28 108 24 5.26
167 Polynomial
Most complicated 58 124 12 37.84
All zero 58 124 12 26.85
168 Interpolator 98 212 14 5.71
169 Matrix addition 44 188 44 3.97
170 Matrix multiplication 44 188 44 23.86
171 Trigonometric
Sine 14 64 12 7.38
Secant 14 64 12 8.10
172 Exponential 12 60 12 7.22
173 Power 14 64 12 11.50
174 Logarithm 14 66 12 5.00
177 Data acquisition analog 104 414 90 10.04
178 Data acquisition analog input/loop 20 150 44 3.57
179 Enhanced trend

Normal sampling 52 FDB + FOB Equation 13 5.68
Normal and statistical sampling 52 180 + 2 x Equation 13 10.92
Equation 13
190 User defined function declaration 30 Equation 14 12 1.00
2VAA000844R0001 J C-5
Function NVRAM RAM
191 User defined function one 56 532 + S16 94+ S16 Program
dependent
dependent
193 User defined data import 48 Equation 17 70 + S5 1.19
194 User defined data export 48 Equation 18 58 + S4 4.38
198 Aux. real user defined function 38 166 24 0.71
199 Aux. digital user defined function 38 150 16 0.67
205 Analog Input List/CW800 (Periodic 30 302 110 9.92

Sample)
206 Digital Input List/CW800 (Periodic 30 206 62 0.43

Sample)
207 Module Status Monitor/CW800 16 147 48 2.22
211 Data acquisition digital 62 326 78 6.30
212 Data acquisition digital input/loop 20 126 32 1.98
215 Enhanced analog slave definition5 32 232 26 558.00
216 Enhanced analog input definition5 42 130 16 218.00
217 Enhanced calibration command5 24 194 40 9.00
218 Phase execution 44 Equation 20 304 Program

dependent

dependent

dependent

21
222 Analog in/channel Equation 332 64 35.802

22
223 Analog out/channel Equation 332 64 49.652

23
224 Digital in/channel Equation 332 64 24.002

24
225 Digital out/channel Equation 332 64 16.002

25
226 Test status Equation 148 16 3.06

19

29
C-6 2VAA000844R0001 J
C. Symphony Plus HC800 Control Processor Memory Usage Equations
Function NVRAM RAM
228 Foreign device definition Equation 404 120 21.00

26
229 Pulse In/Channel Equation 480 84 126.00

27
241 DSOE interface SEM to MFP 126.00

247 Condition monitoring4,5 134 592 82 Note 4

NOTES:
blocks.
instruction manual.
5. These function codes are for use with remote I/O applications only. They may be used only when
accessing Harmony Rack I/O modules through an RIO22 module connected to an HC800 module using
function codes 146 and 147.
6. Function code 95 may only be used to monitor the status of the HC800 module in which it resides. It may
not be used to monitor the status of other nodes or HPC800 Controller modules. Use function codes 207
and 226 to monitor the status of other modules.
C.2 Memory Usage Equations
1. 72 + [8 x (S5)]
2. 12 + [1024 x (S2)]
3. 42 + [1024 x (S1)]
4. 10 + [1024 x (S1)]
5. 676 + [1024 x (S11)] + [a x (S12)]
where:
- or -
6. 248 + [b x (S12)]
where:
- or -
7. 294 + [20 x (S7)]
8. 60 + [20 x (S7)]
9. 144 + [8 x (S21 + S22)]
10. 60 + [4 x (S21 + S22)]
11. 79 + [4 x (S2)]
12. 34 + [4 x (S2)]
13. a + [b x (S4)] + [c x (n{S3})],
where:
2VAA000844R0001 J C-7
Function Blocks C. Symphony Plus HC800 Control Processor

14. 82 + [10 x (S2)]
15. 490 + [292 x (S13)]
16. 378 + [142 x (S13)]
17. 214 + [2 x (S5)]
18. 202 + [4 x (S4)]
20. 1458 + [1024 x (S11)] + [2 x (S12)]
28. 1008 + (16 x (S4))
29. 48 + Size of string data in S1+ Size of string data in S2 + Size of string data in S24.
C.3 Function Blocks
Table C-2 contains function code block number information for the HC800 module.
Table C-2 HC800 Module Function Code Blocks
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0
8 -9.2 E18
9 9.2 E18
13 Revision level
14 Reserved
C-8 2VAA000844R0001 J
C. Symphony Plus HC800 Control Processor Module Status Information
Table C-2 HC800 Module Function Code Blocks (Continued)

24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
27 Day of week (1 to 7, Sunday = 1) 90
28 Reserved
29 Reserved

function code -
refer to Table C-1
31999 Loop type: 89

1.0 = PN800
3.0 = PN800 with time-stamping
C.4 Module Status Information
The HPC800 Harmony Process Controller module consists of the HC800 Control Processor module and the CP800 Communications
Processor module. The HC800 module has a 16-byte status record. The status report provides summary flags for error conditions,
module type, and firmware revision level. The status reports are viewable from a Human System Interface (HSI).
To interpret the status bytes, convert each hexadecimal byte to its binary equivalent. For example (PN800 mode):
Byte 1 0x75 = 01110101
Table C-3 and Table C-4 explain the HC800 Control Processor module status bytes and data bits. Refer to I.9 for the CP800
Communications Processor module status bytes and data bits.
Table C-3 HC800 Module Status Byte and Data Bit Description
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 FTX BAC RIO LIO CFG NVF NVI STA
2VAA000844R0001 J C-9
Module Status Information C. Symphony Plus HC800 Control Processor
Table C-3 HC800 Module Status Byte and Data Bit Description (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
3 Error code
6 ETYPE
7 CWA CWB RDA RDB PER HN800A HN800B
8 Reserved
9 CW800A CW800B BATLOW Reserved RIOID ETHER EP1 EP2
11 PSA PSB Reserved SOA RNO Reserved
12 Reserved HC800 HC800

module module
firmware firmware
build build
number number
13 Reserved
Table C-4 HC800 Status Byte Description
Field Size
or Value
STA 01 Digital station status: 0 = good, 1 = bad
C-10 2VAA000844R0001 J
Table C-4 HC800 Status Byte Description (Continued)
Field Size
or Value
3-5 Error 3 4 5
Note 1 Code
NVRAM error:
03 — Bad data





09 — — Segment violation.

not current
2A (1) (2) Not enough memory for UDF:

File system error:

22 (1) (2) Invoke C error:

24 (1) (2) C program stack overflow:

28 (1) (2) User defined function (UDF) reference is invalid:

29 (1) (2) UDF block cannot read program file:

2B (1) (2) Missing UDF declaration:

2C (1) (2) Wrong UDF type:

2VAA000844R0001 J C-11
Field Size
or Value
3-5 Error 2D (1) (2) Missing UDF auxiliary block:

(cont) Code (1), (2) = block number making reference
2E (1) (2) UDF compiler and firmware are incompatible:

7 — — Reserved
— — Reserved
— — Reserved
— — Reserved
8 — — Reserved
9 CW800A 80 CW800 Bus A failure: 0 = good, 1 = fail
CW800B 40 CW800 Bus B failure: 0 = good, 1 = fail
BATLOW 20 NVRAM Battery low: 0 = good, 1 = replace battery
— — Reserved
RIOID 08 Remote I/O Controller: 0 = no, 1 = yes
ETHER 04 Ethernet Installed: 0 = no, 1 = yes
EP1 02 Foreign device interface Ethernet port (labeled EN1 B on the MB810
base) status: 0 = good, 1 = fail
EP2 01 SOE time synchronization Ethernet port (labeled EN1 A on the MB810
base) status: 0 = good, 1 = fail
— — Reserved

RID 08 Redundancy ID. Follows setting of redundancy ID pole on the dip-

switch.

module.

enable pole on dipswitch.

C-12 2VAA000844R0001 J
Field Size
or Value
— — Reserved
SOA 10 Status output alarm. Indicates the status of the system +24 volt power
and the I/O block power (logic and field power for a single cabinet).
0 = OK, 1 = alarm.

— — Reserved
— — Reserved
— — Reserved
12 — 00 HC800 module firmware build number
13 — — Reserved
142 — FF Module nomenclature number (0A)16 = 10 for the HC800
2
NOTE:
2. (x)16 denotes a hexadecimal number. The equivalent decimal or ASCII character is to be used. Hex to
2VAA000844R0001 J C-13
C-14 2VAA000844R0001 J
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 Memory Utilization and Execution Times
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800
D.1 Memory Utilization and Execution Times
This section lists the module memory requirements for each function code. Three quantities are given for the BRC-300, BRC-400, BRC-
410 and HPG800 memory utilization:
• The number of bytes of nonvolatile random access memory (NVRAM). The BRC-300 module has a total
configuration memory of 415 kilobytes of NVRAM. The BRC-400, BRC-410 and HPG800 modules have a total
configuration memory of 1.9 megabytes of NVRAM.
• The number of bytes of random access memory (RAM). The BRC-300, BRC-400, BRC-410 and HPG800 modules
have a total configuration memory of 7.56 megabytes of RAM.
This section also lists the function code execution times (in microseconds) for the BRC-300, BRC-400, BRC-410 and HPG800.
Table D-1 shows the BRC-300, BRC-400, BRC-410 and HPG800 memory requirements and the execution time for each function code.
NOTE: Refer to Memory Usage Equations in this section for the equations listed in Table D-1.
Table D-1 BRC-300/400/410 and HPG800 Memory Utilization and Execution Times
Function NVRAM RAM
1 Function generator 46 96 12 6
2 Manual set constant (signal gener- 12 44 12 2

ator)
3 Lead/lag 18 66 22 8
4 Pulse positioner 24 84 24 4
5 Pulse rate 16 70 18 7
6 High/low limiter 16 52 12 3
7 Square root 14 52 12 24
8 Rate limiter 18 62 18 7
9 Analog transfer 20 70 22 14
10 High select 16 56 12 4
11 Low select 16 56 12 4
12 High/low compare 16 52 12 3
13 Integer transfer 14 50 10 2
14 Summer (4-input) 16 56 12 6
15 Summer (2-input) 18 56 12 7
16 Multiply 14 52 12 6
17 Divide 14 52 12 7
18 PID error input 34 98 26 44
19 PID (PV and SP) 36 102 30 48
24 Adapt 12 54 12 2
2VAA000844R0001 J D-1
Memory Utilization and Execution Times D. Harmony Bridge Controller (BRC-300/400/410) and HPG800
Table D-1 BRC-300/400/410 and HPG800 Memory Utilization and Execution Times (Continued)
Function NVRAM RAM
25 Analog input (periodic sample) 12 110 38 3
26 Analog input/loop 12 66 20 4
30 Analog exception report 26 120 40 8
31 Test quality 16 58 10 5
32 Trip 12 42 10 2
33 Not 12 42 10 2
34 Memory 14 52 10 2
35 Timer 14 56 18 7
36 Qualified OR (8-input) 26 74 10 7
37 AND (2-input) 12 46 10 2
38 AND (4-input) 16 54 10 3
39 OR (2-input) 12 46 10 2
40 OR (4-input) 16 54 10 3
41 Digital input (periodic sample) 12 98 32 4
42 Digital input/loop 12 60 14 3
45 Digital exception report 12 88 32 7
48 Analog exception report with 32 126 72 9

high/low alarm deadband
50 Manual set switch 8 40 10 2
51 Manual set constant 12 36 8 2
52 Manual set integer 12 36 8 2
55 Hydraulic servo 62 430 88 1,723
58 Time delay (analog) 18 Equation 1 22 8
59 Digital transfer 14 50 10 2
61 Blink 12 50 14 8
62 Remote control memory 28 104 22 11
63 Analog input list (periodic sample) 28 294 122 11
64 Digital input list (periodic sample) 28 198 74 11
65 Digital sum with gain 28 72 12 8
66 Analog trend
Normal mode (slow) 12 376 340 6
Fast mode 12 376 340 4
67 Digital exception report with alarm 16 102 48 8

deadband
D-2 2VAA000844R0001 J
Function NVRAM RAM
68 Remote manual set constant 22 122 36 9

(REMSET)
69 Test alarm 12 48 12 4
79 Control interface slave

80 Control station 84 382 76 24
81 Executive 22 272 6 0
83 Digital output group 32 120 12 98
84 Digital input group 16 144 44 97
85 Up/down counter 24 92 18 5
86 Elapsed timer 20 100 24 7
87 Digital logic station interface 12 72 10 2
88 Digital logic station 42 170 26 98
89 Last block 12 58 12 0
93 BASIC real output 12 72 20 1
94 BASIC boolean output 12 92 36 1
95 Module status monitor 22 80 30 6
96 Redundant analog input 22 88 34 9
97 Redundant digital input 14 58 16 5
98 Slave select 26 86 14 5
100 Digital output readback check 40 134 26 21
101 Exclusive OR 12 46 10 2
102 Pulse input/period 26 126 20 118
103 Pulse input/frequency 26 126 20 124
104 Pulse input/totalization 28 156 32 148
109 Pulse input/duration 26 126 20 117
110 Rung (5-input) 24 76 14 5
111 Rung (10-input) 38 106 14 8
112 Rung (20-input) 68 166 14 13
114 BCD input 20 98 18 82
115 BCD output 22 98 12 109
2VAA000844R0001 J D-3
Function NVRAM RAM
116 Jump/master control relay 12 58 10 2
117 Boolean recipe table 28 74 10 5
118 Real recipe table 48 106 12 5
119 Boolean signal multiplexer 32 92 10 4
120 Real signal multiplexer 32 94 12 4
121 Analog input/Cnet 22 90 22 5
122 Digital input/Cnet 20 66 14 3
123 Device driver 30 116 32 9
124 Sequence monitor 80 158 20 3
125 Device monitor 40 106 12 16
126 Real signal demultiplexer 12 84 24 9
128 Slave default definition 44 98 12 1
129 Multistate device driver 60 160 38 11
132 Analog input/slave 54 366 48 252
134 Multi-sequence monitor 96 248 36 3
135 Sequence manager 82 192 32 14
136 Remote motor control 52 166 50 15
137 C and BASIC program real output 12 62 32 1

with quality
138 C or BASIC program Boolean out- 12 54 24 1

put with quality
139 Passive station interface 44 130 32 8

Largest NVM utilization formula in 92 12 4,500
Smallest NVM utilization (FC 33) Code 140. 92 12 108
141 Sequence master 80 134 24 9
142 Sequence slave 74 110 10 2

dependent
144 C allocation Equation 2 Equation 3 Equation 4 1
145 Frequency counter/slave 32 148 22 45
146 Remote I/O interface 68 Equation 28 56 1,469
147 Remote I/O definition 144 588 108 20
148 5 Batch sequence 36 Equation 5 Equation 6 Program

dependent
D-4 2VAA000844R0001 J
Function NVRAM RAM
149 Analog output/slave

(same ASO as first)
150 Hydraulic servo slave 32 148 42 120
151 Text selector 46 156 26 5
152 Model parameter estimator 28 342 26 2
153 Inferential Smith Controller (ISC) 42 182 30 10

parameter converter
154 Adaptive parameter scheduler 36 212 28 5
155 Regression 68 Equation 7 Equation 8 4
156 Advanced PID controller 58 158 48 64
157 General digital controller 68 Equation 9 Equation 10 6
160 Smith predictor 36 236 122 20
161 Sequence generator 74 182 46 7
162 Digital segment buffer 16 70 24 6
163 Analog segment buffer 16 78 32 6
165 Moving average 16 Equation 11 Equation 12 13
166 Integrator 28 84 24 9
167 Polynomial
Most complicated 68 112 12 74
All zero 68 112 12 28
168 Interpolator 98 198 14 22
169 Matrix addition 44 144 44 12
170 Matrix multiplication 44 144 44 84
171 Trigonometric
Sine 14 52 12 20
Secant 14 52 12 22
172 Exponential 12 48 12 18
173 Power 14 52 12 31
174 Logarithm 14 54 14 20
177 Data acquisition analog 104 334 94 24
178 Data acquisition analog input/loop 20 124 52 8
179 Enhanced trend

Normal sampling 52 FDB + FOB Equation 13 13
Normal and statistical sampling 52 180 + 2 x Equation 13 25
Equation 13
2VAA000844R0001 J D-5
Function NVRAM RAM
190 5 User defined function declaration 30 Equation 14 12 1
191 5 User defined function one 56 440 + S16 96 + S16 Program

dependent
192 5 User defined function two 70 508 + S24 112 + S24 Program
dependent
193 5 User defined data import 48 Equation 17 72 + S5 9
194 5 User defined data export 48 Equation 18 62 + S4 15
198 5 Aux. real user defined function 38 142 24 1
199 5 Aux. digital user defined function 38 134 16 1
210 Sequence of events slave 100 586 182 246
211 Data acquisition digital 62 260 211 34
212 Data acquisition digital input/loop 20 106 212 5
215 Enhanced analog slave definition 32 232 26 558
216 Enhanced analog input definition 42 114 216 218
217 Enhanced calibration command 24 154 217 9
218 5 Phase execution 43 Equation 20 218 Program

dependent
219 5 Common sequence 46 Equation 15 Equation 16 Program

dependent
220 5 Batch historian 46 476 + S11 226 + S11 Program

dependent

21
222 Analog in/channel Equation 298 64 179 2

22
223 Analog out/channel Equation 298 64 215 2

23
224 Digital in/channel Equation 298 64 96 2

24
225 Digital out/channel Equation 298 64 96 2

25
226 Test status Equation 144 16 42

19

29
228 Foreign device definition Equation 356 74 42

26
229 Pulse In/Channel Equation 472 80 257

27
D-6 2VAA000844R0001 J
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 Memory Usage Equations
Function NVRAM RAM
241 DSOE interface SEM to MFP 257

242 DSOE digital event interface

No data on SED I/O module 84 246 96 77
Data on SED I/O module 84 246 96 343
247 Condition monitoring 134 592 82 Note 4

NOTES:
blocks. Refer to Table D-2.
instruction manual.
5. Available in J0 and later releases.
Table D-2 FC221 Execution Times
Non-Redundant
Redundant Blocks
I/O Block Blocks
(µsecs)
(µsecs)
AIN-120 1,134 2,149
AOT-120 2,030 4,060
CIO-100 1,731 N/A
DIO-400 1,791 3,582
DOT-120 1,791 3,582
D.2 Memory Usage Equations
1. 72 + [8 x (S5)]
2. 12 + [1024 x (S2)]
3. 42 + [1024 x (S1)]
4. 10 + [1024 x (S1)]
5. 676 + [1024 x (S11)] + [a x (S12)]
where:
- or -
6. 248 + [b x (S12)]
where:
- or -
7. 294 + [20 x (S7)]
8. 60 + [20 x (S7)]
9. 144 + [8 x (S21 + S22)]
10. 60 + [4 x (S21 + S22)]
2VAA000844R0001 J D-7
Memory Usage Equations D. Harmony Bridge Controller (BRC-300/400/410) and HPG800
11. 79 + [4 x (S2)]
12. 34 + [4 x (S2)]
13. a + [b x (S4)] + [c x (n{S3})],
where:
14. 82 + [10 x (S2)]
15. 490 + [292 x (S13)]
16. 378 + [142 x (S13)]
17. 214 + [2 x (S5)]
18. 202 + [4 x (S4)]
20. 1458 + [1024 x (S11)] + [2 x (S12)]
+ Size of string data in S7.
28. 1008 + (16 x (S4)).
29. 48 + Size of string data in S1 + Size of string data in S2+ Size of string data in S12.
D-8 2VAA000844R0001 J
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 Function Blocks - BRC-300/400/410 and HPG800
D.3 Function Blocks - BRC-300/400/410 and HPG800
Table D-3 contains function code block number information for the BRC-300, BRC-400, BRC-410 and HPG800 modules.
Table D-3 BRC-300/400/410 and HPG800 Modules
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0
8 -9.2 E18
9 9.2 E18
13 Revision level
14 Reserved

24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
28 Reserved
29 Reserved
2VAA000844R0001 J D-9
Module Status Information D. Harmony Bridge Controller (BRC-300/400/410) and HPG800
Table D-3 BRC-300/400/410 and HPG800 Modules (Continued)

function code -
refer to Table D-1
31999 Loop type: 89

0.0 = Plant Loop
1.0 = Cnet
3.0 = Cnet with time-stamping
NOTE:
1. The highest configurable block number is 9998 for the BRC-300.
D.4 Module Status Information
Table D-4 and Table D-5 explain the controller module status bits and bytes.
Table D-4 Bit Description - BRC-300/400/410 and HPG800
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 FTX BAC RIO LIO CFG NVF NVI DSS
3 Error code
6 ETYPE
7 CWA CWB R1F R2F Reserved Reserved HnetA HnetB
8 Reserved
9 RA RB Reserved ETHER1 EP11 Reserved
11 Reserved Reserved Reserved SOA RNO Reserved Reserved Reserved
12-13 Reserved
NOTE:
1. BRC410 and HPG800 only.
Table D-5 Byte Description - BRC-300/400/410 and HPG800
Field Size
or Value
D-10 2VAA000844R0001 J
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 Module Status Information
Table D-5 Byte Description - BRC-300/400/410 and HPG800 (Continued)
Field Size
or Value
DSS 01 Digital station status: 0 = good, 1 = bad
3-5 Error 3 4 5
Note 1 Code
NVRAM error:
03 — Bad data





09 — — Segment violation.

not current
2VAA000844R0001 J D-11
Field Size
or Value
3-5 Error 2A (1) (2) Not enough memory for UDF:

File system error:







2D (1) (2) Missing UDF auxiliary block:


7 CWA 80 Controlway bus A failure: 0 = good, 1 = fail
CWB 40 Controlway bus B failure: 0 = good, 1 = fail
HnetA 02 Harmony net channel A failure: 0 = good, 1 = fail
HnetB 01 Harmony net channel B failure: 0 = good, 1 = fail
8 — — Unused
9 RA 80 Harmony net channel A relay fault: 0 = good, 1 = fail
RB 40 Harmony net channel B relay fault: 0 = good, 1 = fail
— — Unused
— — Unused
— — Unused
ETHER 04 Ethernet installed: 0 = no, 1 = yes (BRC410 and HPG800 only)
EP1 02 Foreign device interface Ethernet port status: 0 = good, 1 = fail

(BRC410 and HPG800 only)
— — Unused
D-12 2VAA000844R0001 J
D. Harmony Bridge Controller (BRC-300/400/410) and HPG800 Module Status Information
Field Size
or Value


switch.

module.


11 SOA 10 Status output alarm. Indicates the status of the system +24 volt power
and the I/O block’s power (logic and field power for a single cabinet).
0 = OK, 1 = alarm.

12-13 — 00 Reserved
14 — FF Module nomenclature: (06)16 = BRC-300, (07)16 = BRC-400
15 — FF Revision letter (in ASCII code), for example, (47)16 = G, (4A)16 = J
NOTE:
2VAA000844R0001 J D-13
D-14 2VAA000844R0001 J
E. Harmony Bridge Controller (BRC-100/200) Memory Utilization and Execution Times
E. Harmony Bridge Controller (BRC-100/200)
E.1 Memory Utilization and Execution Times
This section lists the module memory requirements for each function code. Two quantities are given for the BRC-100 and BRC-200
memory utilization. The first value is the number of bytes of nonvolatile random access memory (NVRAM). The second quantity is the
number of bytes of random access memory (RAM). The BRC-100 module has a total configuration memory of 441 kilobytes of NVRAM
and 1.5 megabytes of RAM. The BRC-200 module has a total configuration memory of 1.8 megabytes of NVRAM and 7.86 megabytes
of RAM.
This section also lists the function code execution times (in microseconds) for the BRC-100 and BRC-200 modules.
Table E-1 shows the BRC-100 and BRC-200 memory requirements and the execution time for each function code.
NOTE: Refer to Memory Usage Equations in this section for the equations listed in Table E-1.
Table E-1 BRC-100/200 Memory Utilization and Execution Times
Execution
Function NVRAM RAM
Description Times
(in µsecs)
1 Function generator 46 92 17
2 Manual set constant 26 40 7
3 Lead/lag 26 72 60
4 Pulse positioner 26 88 27
5 Pulse rate 26 72 49
6 High/low limiter 26 48 16
7 Square root 26 48 70
8 Rate limiter 26 64 49
9 Analog transfer 26 76 68
10 High select 26 52 21
11 Low select 26 52 21
12 High/low compare 26 48 16
13 Integer transfer 26 44 9
14 Four input summer 26 52 26
15 Two input summer 26 52 36
16 Multiply 26 48 29
17 Divide 26 48 33
18 PID error input 34 108 213
19 PID process variable and set point 36 116 230
24 Adapt 26 50 12
25 Analog input (periodic sample) 26 102 12
26 Analog input/loop 26 54 14
30 Analog exception report 26 102 38
2VAA000844R0001 J E-1
Memory Utilization and Execution Times E. Harmony Bridge Controller (BRC-100/200)
Table E-1 BRC-100/200 Memory Utilization and Execution Times (Continued)
Execution
Function NVRAM RAM
Description Times
(in µsecs)
31 Test quality 26 52 18
32 Trip 26 36 8
33 Not 26 36 8
34 Memory 26 46 10
35 Timer 26 58 27
36 Qualified OR (eight input) 26 68 24
37 AND (two input) 26 40 8
38 AND (four input) 26 48 11
39 OR (two input) 26 40 8
40 OR (four input) 26 48 11
41 Digital input (periodic sample) 26 90 13
42 Digital input/loop 26 42 12
45 Digital exception report 26 66 26
50 Manual set switch 26 36 7
51 Manual set constant (nontunable) 26 40 7
52 Manual set integer 26 36 7
55 Hydraulic servo 60 404 2,363
58 Time delay (analog) 26 Equation 1 56
59 Digital transfer 26 44 9
61 Blink 26 48 40
62 Remote control memory 28 96 40
63 Analog input list (periodic sample) 28 286 40
64 Digital input list (periodic sample) 28 190 39
65 Digital sum with gain (four input) 28 68 33
66 Analog trend
Normal mode (slow) 26 196 41
Fast mode 26 700 26
68 Remote manual set constant (REMSET) 26 128 33
69 Test alarm 26 44 13

First FC 79 block in segment 48 328 15,710
Additional FC 79 blocks in segment 48 328 1,054
80 Control station 84 366 118
81 Executive block 26 224 0
E-2 2VAA000844R0001 J
Execution
Function NVRAM RAM
Description Times
(in µsecs)
82 Segment control 64 284 0
83 Digital output group 32 90 134
84 Digital input group 26 114 133
85 Up/down counter 26 76 26
86 Elapsed timer 26 84 35
89 Last block 26 48 0
90 Extended executive 52 152 0
91 BASIC configuration Equation 2 Equation 3 5
92 Invoke BASIC 26 46 Program

dependent
93 BASIC real output 26 64 4
94 BASIC boolean output 26 72 4
96 Redundant analog input 26 106 44
97 Redundant digital input 26 58 23
98 Slave select 26 84 26
99 Sequence of events log 26 Equation 4 97
100 Digital output readback check 40 144 77
101 Exclusive OR 26 40 8
102 Pulse input/period 26 100 162
103 Pulse input/frequency 26 100 170
104 Pulse input/totalization 26 130 203
109 Pulse input/duration 26 100 160
110 Five input rung 26 74 20
111 Ten input rung 38 104 30
112 Twenty input rung 68 164 49
114 BCD input 26 72 113
115 BCD output 26 72 150
116 Jump/master control relay 26 52 6
117 Boolean recipe table 28 68 24
118 Real recipe table 48 102 24
119 Boolean signal multiplexer 32 86 21
120 Real signal multiplexer 32 90 21
2VAA000844R0001 J E-3
Execution
Function NVRAM RAM
Description Times
(in µsecs)
121 Analog input/Cnet 26 82 17
122 Digital input/Cnet 26 50 12
123 Device driver 30 118 33
124 Sequence monitor 80 162 15
125 Device monitor 40 102 77
126 Real signal demultiplexer 26 92 45
128 Slave default definition 44 72 4
129 Multistate device driver 60 168 40
132 Analog input/slave 54 340 346
133 Smart field device definition 36 144 14
134 Multi-sequence monitor 96 268 13
135 Sequence manager 82 208 66
136 Remote motor control 52 186 54
137 BASIC real output/quality 26 80 4
138 BASIC boolean output/quality 26 64 4
139 Passive station interface 44 146 37
140 Restore
Restore largest NVM utilization Equation 19 88 5,141
(FC 165 with S2 = 249)
Smallest NVM utilization (FC 33) Equation 19 88 123
141 Sequence master 80 142 33
142 Sequence slave 74 104 7
143 Invoke C 28 108 Program

dependent
144 C allocation Equation 5 Equation 6 5
145 Frequency counter/slave 30 120 62
146 Remote I/O interface 68 340 2,015
147 Remote I/O definition 144 480 27
148 Batch sequence 36 Equation 7 Program

dependent

First FC 149 in segment 82 318 16,414
Second FC 149 in segment 82 318 16,414
(same ASO as first)
Additional FC 149s in segment 82 318 1,298
150 Hydraulic servo slave 32 168 164
151 Text selector 46 152 20
E-4 2VAA000844R0001 J
Execution
Function NVRAM RAM
Description Times
(in µsecs)
152 Model parameter estimator 28 352 16
153 Inferential smith controller parameter converter 42 196 73
154 Adaptive parameter scheduler 36 224 38
155 Regression 68 Equation 8 28
156 Advanced PID controller 58 190 309
157 General digital controller 68 Equation 9 46
160 Smith predictor 36 342 146
161 Sequence generator 74 212 32
162 Digital segment buffer 26 78 22
163 Analog segment buffer 26 94 23
165 Moving average 26 Equation 10 96
166 Integrator 28 92 64
167 Polynomial
Most complicated 58 108 216
All zero 58 108 81
168 Interpolator 98 196 167
169 Matrix addition 44 172 86
170 Matrix multiplication 44 172 624
171 Trigonometric
Sine 26 48 149
Secant 26 48 161
172 Exponential 26 44 136
173 Power 26 48 228
174 Logarithm 26 50 152
177 Data acquisition analog 104 398 118
178 Data acquisition analog input/loop 26 134 30
179 Enhanced trend

Normal sampling 52 Equation 11 98
Normal and statistical sampling 52 Equation 11 188
184 Factory instrumentation protocol handler 42 1,342 3,123
185 Digital input subscriber 32 220 88
186 Analog input subscriber 32 252 468
187 Analog output subscriber 48 232 835
188 Digital output subscriber 48 208 91
190 User defined function declaration 30 Equation 12 5
2VAA000844R0001 J E-5
Execution
Function NVRAM RAM
Description Times
(in µsecs)
191 User defined function one 56 Equation 13 Program

dependent
192 User defined function two 70 Equation 14 Program

dependent
193 User defined data import 48 Equation 15 32
194 User defined data export 48 Equation 16 55
198 Auxiliary real user defined function 38 150 5
199 Auxiliary digital user defined function 38 134 5
210 Sequence of events slave 100 572 338
211 Data acquisition digital 62 310 123
212 Data acquisition digital input/loop 26 110 20
215 Enhanced analog slave definition 30 206 766
216 Enhanced analog input definition 42 114 299
217 Enhanced calibration command 26 178 12
218 Phase execution 44 Equation 25 Program

dependent
219 Common sequence 46 Equation 17 Program

dependent
220 Batch historian 46 Equation 18 Program

dependent
222 Analog in/channel Equation 21 298 3002
223 Analog out/channel Equation 22 298 3602
224 Digital in/channel Equation 23 298 1602
225 Digital out/channel Equation 24 298 1602
227 Gateway Equation 27 19,982 69,0003
228 Foreign device definition Equation 28 372 70
229 Pulse In/Channel Equation 29 452 430
241 DSOE data interface SEM to MFP

No SED resynch function performed 26 284 105
SED resynch performed once every second 26 284 470

No data available on SED I/O module 84 338 77
Data available on SED I/O module 84 338 795
E-6 2VAA000844R0001 J
E. Harmony Bridge Controller (BRC-100/200) Memory Usage Equations
Execution
Function NVRAM RAM
Description Times
(in µsecs)
247 Condition monitoring 133 544 Note 4

NOTES:
1. Time dependent on the I/O block type configured and on the presence or absence of redundant blocks.
Refer to Table E-2.
4. Time dependent on the turbine instrumentation module type. Refer to the applicable product instruction
manual.
Table E-2 FC221 Execution Times
Non-Redundant
Redundant Blocks
I/O Block Blocks
(µsecs)
(µsecs)
AIN-120 1900 3600
AOT-120 3400 6800
CIO-100 2900 N/A
DIO-400 3000 6000
DOT-120 3000 6000
E.2 Memory Usage Equations
1. 78 + [8 x (S5)]
2. 38 + [1024 x (S5)]
3. 4994 + 1024 [(S3) + (S4) + (S5)]
4. 96 + [9 x (S2)]
5. 12 + [1024 x (S2)]
6. 36 + [1024 x (S1)]
7. 826 + [1024 x (S11)] + [a x (S12)]
where:
- or -
8. 338 + [40 x (S7)]
9. 228 + [8 x (S21 + S22)]
10. 98 + [8 x (S2]
11. a + [b x (S4)] + [c x (n{S3})],
where:
if S2 = 1, 2, 5, 6, 7 or 9, then a = 380, b = 20, and c = 8
12. 78 + [10 x (S2)]
13. 520 + [2 x (S16)]
14. 604 + [2 x (S24)]
15. 256 + [3 x (S5)]
2VAA000844R0001 J E-7
Function Blocks - BRC-100/200 E. Harmony Bridge Controller (BRC-100/200)
16. 256 + [5 x (S4)]

17. 424 + [222 x (S13)]
18. 666 + [2 x (S11)]
19. 40 + N,
where:
N = Applicable function code size from Table 140-2. NVRAM is
set to 46 when N is less than six.
21. 92 + Size of string data in S1.
25. 1450 + [1024 x (S11)] + [2 x (S12)]
+ Size of string data in S4 + Size of string data in S6
+ Size of string data in S8 + Size of string data in S10
+ Size of string data in S19 + S15
+ [18 if 0 < (S15) <= 16,374,
else 36 if 16,374 < (S15) <= 32,748,
else 54 if 32,748 < (S15)]
E.3 Function Blocks - BRC-100/200
Table C-3 contains function code block number information for the BRC-100 and BRC-200 modules.
Table E-3 BRC-100/200 Module
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0
8 -9.2 E18
9 9.2 E18
E-8 2VAA000844R0001 J
E. Harmony Bridge Controller (BRC-100/200) Function Blocks - BRC-100/200
Table E-3 BRC-100/200 Module (Continued)
11 Memory display value 81 (continued)
13 Revision level
14 Reserved

24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
28 Reserved
29 Reserved

function code -
refer to Table E-1
9999 Loop type: 89

0.0 = Plant Loop
1.0 = Cnet
NOTE:
1. The highest configurable block number is 9998 for the BRC-100.
2VAA000844R0001 J E-9
Module Status Information E. Harmony Bridge Controller (BRC-100/200)
E.4 Module Status Information
Table E-4 and Table E-5 explain the controller module status bits and bytes.
Table E-4 Bit Description - BRC-100/200
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
3 Error code
6 ETYPE
7 CWA CWB R1F R2F Reserved Reserved HnetA HnetB
8 SIME SIMR SIMT SIMM Reserved
9 RA RB Reserved
11 Reserved Reserved Reserved SOA RNO Reserved Reserved Reserved
12-13 Reserved
Table E-5 Byte Description - BRC-100/200
Field Size
or Value
E-10 2VAA000844R0001 J
E. Harmony Bridge Controller (BRC-100/200) Module Status Information
Table E-5 Byte Description - BRC-100/200 (Continued)
Field Size
or Value
3-5 Error 3 4 5
Note 1 Code
NVRAM error:
03 — Bad data






not current
File system error:






2VAA000844R0001 J E-11
Field Size
or Value
3-5 Error 2B (1) (2) Missing UDF declaration:




2F (1) (2) BASIC program error:

(1), (2) = line number of error
HnetA 02 Harmony net channel A failure: 0 = good, 1 = fail
HnetB 01 Harmony net channel B failure: 0 = good, 1 = fail
8 SIME 80 Simulation enabled: 0 = normal operation, 1 = simulation active
SIMR 40 Simulation running/frozen: 0 = simulation frozen, 1= simulation running
SIMT 20 Simulation time rate: 0 = real time, 1 = slow/fast time
SIMM 10 Simulation mode: 0=INFI 90®/USM0x, 1=Harmony/SIM-100
9 RA 80 Harmony net channel A relay fault: 0 = good, 1 = fail
RB 40 Harmony net channel B relay fault: 0 = good, 1 = fail


switch.

module.


E-12 2VAA000844R0001 J
E. Harmony Bridge Controller (BRC-100/200) Module Status Information
Field Size
or Value
11 SOA 10 Status output alarm. Indicates the status of the system +24 volt power
0 = OK, 1 = alarm.

14 — FF Module nomenclature:(05)16 = BRC-100, (09)16 = BRC-200
15 — FF Revision letter (in ASCII code), for example, (46)16 = F
NOTE:
2VAA000844R0001 J E-13
E-14 2VAA000844R0001 J
F. Harmony Area Controller (HAC) Memory Utilization and Execution Times
F. Harmony Area Controller (HAC)
F.1 Memory Utilization and Execution Times
This section lists the module memory requirements for each function code. Three quantities are given for the HAC memory utilization:
• The number of bytes of nonvolatile random access memory (NVRAM). The Harmony area controller has a total
configuration memory of 2,097,150 bytes of NVRAM.
• The number of bytes of random access memory (RAM). The Harmony area controller has a total configuration
memory of 6,291,392 bytes of RAM.
• The checkpoint buffer RAM contained on the process I/O (PIO) board inside the HAC enclosure. This area is
physically separate from the main memory board, and it can have an impact on the size of a configuration. The
checkpoint buffer RAM has a total configuration memory of 2,070,000 bytes.
This section also lists the function code execution times (in microseconds) for the Harmony area controller.
Table F-1 shows the HAC memory requirements and the execution time for each function code.
Table F-1 HAC Memory Utilization and Execution Times
Function NVRAM RAM
Description Buffer RAM Times
(Bytes) (in µsecs)
1 Function generator 46 96 12 9
2 Manual set constant 12 44 12 4
3 Lead/lag 18 66 22 30
4 Pulse positioner 24 84 24 14
5 Pulse rate 16 70 18 25
6 High/low limiter 16 52 12 8
7 Square root 14 52 12 35
8 Rate limiter 18 62 18 25
9 Analog transfer 20 70 22 34
10 High select 16 56 12 11
11 Low select 16 56 12 11
12 High/low compare 16 52 12 8
13 Integer transfer 14 50 10 5
14 Four input summer 16 56 12 13
15 Two input summer 18 56 12 18
16 Multiply 14 52 12 15
17 Divide 14 52 12 17
18 PID error input 34 98 26 107
19 PID process variable and set point 36 102 30 115
24 Adapt 12 54 12 6
25 Analog input (peer-to-peer) 12 79 34 20
2VAA000844R0001 J F-1
Memory Utilization and Execution Times F. Harmony Area Controller (HAC)
Table F-1 HAC Memory Utilization and Execution Times (Continued)
Function NVRAM RAM
(Bytes) (in µsecs)
26 Analog input/loop 12 66 20 7
30 Analog exception report 26 120 40 19
31 Test quality 16 58 10 9
32 Trip 12 42 10 4
33 Not 12 42 10 4
34 Memory 14 52 10 5
35 Timer 14 56 18 14
36 Qualified OR (eight input) 26 74 10 12
37 AND (two input) 12 46 10 4
38 AND (four input) 16 54 10 6
39 OR (two input) 12 46 10 4
40 OR (four input) 16 54 10 6
41 Digital input/bus (peer-to-peer) 12 78 33 20
42 Digital input/loop 12 60 14 6
45 Digital exception report 12 88 32 13
50 Manual set switch 8 40 10 4
51 Manual set constant (nontunable) 12 36 8 4
52 Manual set integer 12 36 8 4
55 Hydraulic servo 60 332 88 1,182
57 Terminating executive 42 Equation 1 Equation 2 0
58 Time delay (analog) 18 Equation 3 22 28
59 Digital transfer 14 50 10 5
61 Blink 12 50 14 20
62 Remote control memory 28 104 22 20
63 Analog input list (peer-to-peer) 28 185 110 20
64 Digital input list (peer-to-peer) 28 137 62 20
65 Digital sum with gain (four input) 28 72 12 17
66 Analog trend
Normal mode (slow) 12 376 340 21
Fast mode 12 376 340 13
68 Remote manual set constant 22 122 36 17

(REMSET)
69 Test alarm 12 48 12 7
F-2 2VAA000844R0001 J
Function NVRAM RAM
(Bytes) (in µsecs)

80 Control station 84 316 80 59
83 Digital output group 32 96 10 67
84 Digital input group 16 88 42 67
85 Up/down counter 24 74 18 13
86 Elapsed timer 20 76 24 18
95 Module status monitor 22 80 30 11
96 Redundant analog input 22 88 34 22
97 Redundant digital input 14 58 16 12
98 Slave select 26 86 14 13
100 Digital output readback check 40 134 26 39
101 Exclusive OR 12 46 10 4
102 Pulse input/period 24 96 20 81
103 Pulse input/frequency 24 96 20 85
104 Pulse input/totalization 26 114 32 102
109 Pulse input/duration 24 96 20 80
110 Five input rung 24 76 14 10
111 Ten input rung 38 106 14 15
112 Twenty input rung 68 166 14 25
114 BCD input 20 70 18 57
115 BCD output 22 76 12 75
116 Jump/master control relay 12 58 10 3
117 Boolean recipe table 28 74 10 12
118 Real recipe table 48 106 12 12
119 Boolean signal multiplexer 32 92 10 11
120 Real signal multiplexer 32 94 12 11
121 Analog input/Cnet 22 90 22 9
122 Digital input/Cnet 20 66 14 6
123 Device driver 30 116 32 17
2VAA000844R0001 J F-3
Function NVRAM RAM
(Bytes) (in µsecs)
124 Sequence monitor 80 158 20 8
125 Device monitor 40 106 12 39
126 Real signal demultiplexer 12 84 24 23
128 Slave default definition 44 90 22 2
129 Multistate device driver 60 160 38 20
132 Analog input/slave 54 308 48 173
133 Smart field device definition 36 164 20 7
134 Multi-sequence monitor 96 248 36 7
135 Sequence manager 82 192 32 33
136 Remote motor control 52 166 50 27
137 BASIC real output/quality 12 62 32 2
138 BASIC boolean output/quality 12 54 24 2
139 Passive station interface 44 130 32 19

Largest NVM utilization formula in 92 12 2,571
Smallest NVM utilization (FC 33) Code 140. 92 12 62
141 Sequence master 80 134 24 17
142 Sequence slave 74 110 10 4

dependent
144 C allocation Equation 4 Equation 5 Equation 6 3
145 Frequency counter/slave 30 114 22 31
146 Remote I/O interface 68 290 54 1,008
147 Remote I/O definition 144 426 74 14

dependent

(same ASO as first)
150 Hydraulic servo slave 32 148 42 82
151 Text selector 46 156 26 10
152 Model parameter estimator 28 342 26 8
153 Inferential smith controller 42 182 30 37

parameter converter
F-4 2VAA000844R0001 J
Function NVRAM RAM
(Bytes) (in µsecs)
154 Adaptive parameter scheduler 36 212 28 19
155 Regression 68 Equation 9 Equation 10 14
156 Advanced PID controller 58 158 48 155
157 General digital controller 68 Equation 11 Equation 12 23
160 Smith predictor 36 236 122 73
161 Sequence generator 74 182 46 16
162 Digital segment buffer 16 70 24 11
163 Analog segment buffer 16 78 32 12
165 Moving average 16 Equation 13 Equation 14 48
166 Integrator 28 84 24 32
167 Polynomial
Most complicated 68 112 12 108
All zero 68 112 12 41
168 Interpolator 98 198 14 84
169 Matrix addition 44 144 44 43
170 Matrix multiplication 44 144 44 312
171 Trigonometric
Sine 14 52 12 75
Secant 14 52 12 81
172 Exponential 12 48 12 68
173 Power 14 52 12 114
174 Logarithm 14 54 14 76
177 Data acquisition analog 104 334 94 59
178 Data acquisition analog input/loop 20 124 52 15
179 Enhanced trend FDB + FOB

Normal sampling 52 memory Equation 15 49
Normal and statistical sampling 52 usage Equation 15 94
184 Factory instrumentation protocol 42 1274 84 1,562

handler
185 Digital input subscriber 32 178 60 44
186 Analog input subscriber 32 194 76 234
187 Analog output subscriber 48 214 32 418
188 Digital output subscriber 48 190 32 46
190 User defined function declaration 30 Equation 16 12 3
191 User defined function one 56 440 + S16 96 + S16 Program

dependent
2VAA000844R0001 J F-5
Function NVRAM RAM
(Bytes) (in µsecs)
dependent
193 User defined data import 48 Equation 19 72 + S5 16
194 User defined data export 48 Equation 20 62 + S4 28
198 Aux. real user defined function 38 142 24 3
199 Aux. digital user defined function 38 134 16 3
211 Data acquisition digital 62 260 84 62
212 Data acquisition digital input/loop 20 106 34 10
215 Enhanced analog slave definition 30 196 26 383
216 Enhanced analog input definition 42 114 16 150
217 Enhanced calibration command 24 154 40 6
218 Phase execution 43 Equation 22 308 + S12 Program

dependent

dependent

dependent

23
222 Analog in/channel Equation 298 64 702

24
223 Analog out/channel Equation 298 64 852

25
224 Digital in/channel Equation 298 64 502

26
225 Digital out/channel Equation 298 64 502

27

21
241 DSOE interface SEM to MFP

No SED resynch performed 18 315 30 53
SED resynch performed (1/sec.) 18 315 30 235

No data on SED I/O module 84 246 96 39
Data on SED I/O module 84 246 96 398
NOTES:
1. Time dependent on the I/O block type configured and on the presence or absence of redundant blocks.
Refer to Table F-2.
F-6 2VAA000844R0001 J
F. Harmony Area Controller (HAC) Memory Usage Equations
Table F-2 FC221 Execution Times
Non-Redundant
Redundant Blocks
I/O Block Blocks
(µsecs)
(µsecs)
AIN-120 1500 2800
AOT-120 2500 5000
CIO-100 2500 N/A
DIO-400 2400 4300
DOT-120 2300 4200
F.2 Memory Usage Equations
1. 485 + S2 + [16 x (S8)]

2. 400,174 + [16 x (S8)]
3. 72 + [8 x (S5)]
4. 12 + [1024 x (S2)]
5. 42 + [1024 x (S1)]
6. 10 + [1024 x (S1)]
7. 676 + [1024 x (S11)] + [a x (S12)]
where:
- or -
8. 248 + [b x (S12)]
where:
- or -
9. 294 + [20 x (S7)]
10. 60 + [20 x (S7)]
11. 144 + [8 x (S21 + S22)]
12. 60 + [4 x (S21 + S22)]
13. 79 + [4 x (S2)]
14. 34 + [4 x (S2)]
15. a + [b x (S4)] + [c x (n{S3})],
where:
16. 82 + [10 x (S2)]
17. 490 + [292 x (S13)]
18. 378 + [142 x (S13)]
19. 214 + [2 x (S5)]
20. 202 + [4 x (S4)]
22. 1458 + [1024 x (S11)] + [2 x (S12)]
2VAA000844R0001 J F-7
Function Blocks - HAC F. Harmony Area Controller (HAC)

F.3 Function Blocks - HAC
Table F-3 contains function code block number information for the Harmony area controller.
Table F-3 Harmony Area Controller
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0 81
8 -9.2 E18
9 9.2 E18
13 Revision level
14 Reserved
F-8 2VAA000844R0001 J
F. Harmony Area Controller (HAC) Module Status Information
Table F-3 Harmony Area Controller (Continued)

24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
28 Reserved
29 Reserved

function code -
refer to Table F-1
31999 Reserved 57
NOTE:
1. The highest configurable block number is 31,998 for the HC800, BRC-
400/410, HPG800 and HAC.
F.4 Module Status Information
Table F-4 and Table F-5 explain the controller module status bits and bytes.
Table F-4 Bit Description - HAC
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 FTX RDF RIO LIO CFG NVF NVI STA
3 Error code
4 Error code descriptor byte 1
5 Error code descriptor byte 2
6 ETYPE
7 CHnetA CHnetB RDA RDB PER COM IOHnetA IOHnetB
8 SIME Reserved Reserved SIMES Reserved
9 IOHnetRA IOHnetRB Reserved MOV NDT1 NDT2 NDC1 NDC2
11 PA PB PS SOA RNO NOL FDNL BFM
12 NODES RER1 RER2 TER1 TER2 RID1 RID2 RCF
2VAA000844R0001 J F-9
Module Status Information F. Harmony Area Controller (HAC)
Table F-4 Bit Description - HAC (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
14 Hardware nomenclature (hex)
15 Firmware revision letter (ASCII)
16 Firmware revision number (ASCII)
Table F-5 Byte Description - HAC
Field Size
or Value
TYPE 1F Module type=0x15 enhanced status (ETYPE).
RDF 40 Redundant failure status:

0 = good; no error or not configured for redundancy.
1 = bad; primary halted, backup controller module expected and
not present or halted.
RIO 20 Summary remote I/O status: 0=good, 1=bad.

Physical I/O that is not available over local I/O expander bus and Hnet, but
available via some other communications channel.
2 LIO 10 Summary local I/O status: 0 = good, 1 = bad.

(cont) Physical I/O that is available over local I/O expander bus and Hnet.
CFG 08 Online configuration:

0 = no change to configuration.
1 = backup module configuration changed.
NVF 04 NVRAM status: 0=good, 1=bad.
NVI 02 NVRAM initialized (default configuration): 0=no, 1=yes.
STA 01 Station error status: 0=good, 1=bad (no response).

Bad indicates station offline due to loss of station link communication.
F-10 2VAA000844R0001 J
Table F-5 Byte Description - HAC (Continued)
Field Size
or Value
3-5 Error 3 42 52
Code
Note 1
NVRAM error:
03 — Bad data

(1), (2) = block number of control I/O module function block
03 (1) (2) Missing rack I/O module:

04 — — Checkpoint buffer allocation error – configuration is too large to fit in avail-

able checkpoint memory.

06 (1) (2) Configuration error – input data type is incorrect. Specification S8 for function
code 57 was set too low.

09 — — Segment violation - priority set the same in two segments, or more than eight
segments defined.
0F — — Primary module has failed, and the redundant module configuration is not
current.
10 — — Primary module has failed, and the dynamic RAM data in the redundant
module is not current.
11 — — NVRAM write failure error.
1C — — Network I/O hardware is offline. Online configuration test cannot be com-

pleted.
1E (1) (2) Duplicate device definition label – multiple function code 221 function blocks
contain the same device label.
2VAA000844R0001 J F-11
Field Size
or Value
3-5 Error 3 42 52
Code
(cont)
1F (1) — Software licensing error. (1) equals:
01 - License key not valid.
02 - Function block license exceeded.
03 - C license not available.
04 - Batch 90/UDF license not available.
20 — — Program format error - inconsistent format table.
File system error:










6 ETYPE 1F Enhanced module type = 0x24 (module address 2 & 3).
7 CHnetA 80 Controller peer-to-peer Hnet channel/relay A failure: 0 = good, 1 = fail
CHnetB 40 Controller peer-to-peer Hnet channel/relay B failure: 0 = good, 1 = fail
RDA 20 Redundancy link channel 1 failure: 0 = good, 1 = fail
RDB 10 Redundancy link channel 2 failure: 0 = good, 1 = fail
PER 08 Peripheral failure: 0 = good, 1 = fail
COM 40 I/O Hnet communication established: 0=no, 1 = yes
IOHnetA 02 I/O Hnet channel A failure: 0 = good, 1 = fail
IOHnetB 01 I/O Hnet channel B failure: 0 = good, 1 = fail
8 SIME 80 Simulation enabled: 0 = no, 1 = yes. This field is set for both INFI 90 OPEN
and Symphony simulation.
SIMES 10 Hnet I/O block simulation enabled: 0 = no, 1 = yes. This field, in addition to
the SIME field, is set when Symphony simulation is enabled.
F-12 2VAA000844R0001 J
Field Size
or Value
9 IOHnetRA 80 I/O Hnet channel A relay fault: 0 = good, 1 = fail
IOHnetRB 40 I/O Hnet channel B relay fault: 0 = good, 1 = fail
MOV 10 Module memory overflow: 0 = no, 1 = yes
NDT1 08 Network I/O board drive transistor/relay one failure: 0 = no, 1 = yes
NDT2 04 Network I/O board drive transistor/relay two failure: 0 = no, 1 = yes
NCD1 02 Network I/O board channel one failure: 0 = no, 1 = yes
NCD2 01 Network I/O board channel two failure: 0 = no, 1 = yes
10 PRI 80 Primary/backup status: 0 = backup module, 1 = primary module
CFC 40 Configuration current (latched until backup is reset):

0 = configuration initialization not complete.
1 = all configuration initialization complete.
CHK 10 Backup has completed check pointing (latched until backup is reset).
0 = no, always set to 0 on the primary module.
1 = yes
RID 08 Redundancy ID. Indicates position on the backplane:

0 = left position, 1 = right position
RDEXP 04 Redundant module expected.

0 = no.
1 = yes, always set to 1 on the backup module.
Follows state of function code 90, specification S3 on the primary module.
OCE 02 Online configuration is enabled: 0 = no, 1 = yes.
RDDET 01 Redundant module detected: 0 = no, 1 = yes.

Latched until module is reset or it changes from backup to primary or primary
to backup.
11 PA 80 24 VDC logic power input A status: 0 = good, 1 = bad
PB 40 24 VDC logic power input B status: 0 = good, 1 = bad
PS 20 Internal power system non-fatal error: 0 = good, 1 = bad.

Status display on the HAC must be checked for further information on the
cause of the PS flag being set.
SOA 10 Status output alarm: 0 = good; 1 = bad.

Indicates the status of the system +24 volt power and the I/O block’s power
(logic and field power) for a single cabinet.
RNO 08 Redundancy NVM overrun (latched indication):

0 = no.
1 = yes, set to 1 in primary module if NVM checkpoint overruns
have occurred.
NVM checkpoint overruns cause the primary module to reset the backup
module.
NOL 04 Network I/O board offline: 0 = no, 1 = yes.
FDNL 02 Firmware download in progress: 0 = no, 1 = yes
BFM 01 Backup firmware mismatch:

0 = no.
1 = yes, backup has determined the primary firmware revision is different
from its own.
2VAA000844R0001 J F-13
Field Size
or Value
12 NODES3 80 Nodes offline: 0 = no, 1 = yes
RER1 40 Receive errors on loop channel 1: 0 = no, 1 = yes
RER2 20 Receive errors on loop channel 2: 0 = no, 1 = yes
TER1 10 Transmit errors on loop channel 1: 0 = no, 1 = yes
TER2 08 Transmit errors on loop channel 2: 0 = no, 1 = yes
RID1 04 Receiver idle on loop channel 1: 0 = no, 1 = yes
RID2 02 Receiver idle on loop channel 2: 0 = no, 1 = yes
RCF 01 Local Cnet loop communication failure: 0 = no, 1 = yes
14 — FF Module nomenclature: 0x08 = HAC
15 — FF Revision letter (in ASCII code). For example, 0x42 = B
16 — FF Revision number (in ASCII code). For example, 0x38 = 7
NOTES:
1. The error description corresponding to byte 3 is displayed on the front panel LCD display when the
module is in ERROR mode.
2. All block numbers are encoded in hexadecimal, with (1) equaling the most significant digits and (2)
equaling the least significant digits. Example: (1) = 4E, (2) = 20 is block number 20,000.
3. Active only when the controller is in execute mode.
F-14 2VAA000844R0001 J
G. Multi-Function Processors (IMMFP11/12) Memory Utilization and Execution Times
G. Multi-Function Processors (IMMFP11/12)
G.1 Memory Utilization and Execution Times
This appendix lists the module memory requirements and execution times for each available function code for the IMMFP11/12 multi-
function processors. Two quantities are given for these modules. The first value is the number of bytes of nonvolatile random access
memory (NVRAM). The second quantity is the number of bytes of random access memory (RAM). The IMMFP11 has a total configuration
memory of 62,656 bytes of NVRAM and 163,248 bytes of RAM. The IMMFP12 has a total configuration memory of 194,752 bytes of
NVRAM and 347,568 bytes of RAM.
Table G-1 shows the module memory requirements and execution times for each function code.
NOTES:
1. Except where otherwise noted, execution times are given for worst case conditions.
2. Refer to Memory Usage Equations in this section for the equations listed in Table G-1.
Table G-1 Module Memory Utilization and Execution Times
Execution
Function NVRAM
Description RAM Bytes Times
Code Bytes
(in µsecs)
1 Function generator 46 88 38
2 Manual set constant 12 40 17
3 Lead/lag 18 72 193
4 Pulse positioner 24 88 105
5 Pulse rate 16 72 220
6 High/low limiter 16 48 39
7 Square root 12 44 183
8 Rate limiter 18 64 126
9 Analog transfer 20 76 204
10 High select 16 52 49
11 Low select 16 52 49
12 High/low compare 16 48 36
13 Integer transfer 14 44 22
14 Four input summer 16 52 72
15 Two input summer 18 52 96
16 Multiply 14 48 84
17 Divide 14 48 104
18 PID error input 34 108 658
19 PID process variable and set point 36 116 752
24 Adapt 12 50 28
25 Analog input (same PCU node) 12 100 38
26 Analog input/loop 12 54 42
30 Analog exception report 26 102 120
31 Test quality 16 52 43
2VAA000844R0001 J G-1
Memory Utilization and Execution Times G. Multi-Function Processors (IMMFP11/12)
Table G-1 Module Memory Utilization and Execution Times (Continued)
Execution
Function NVRAM
Code Bytes
(in µsecs)
32 Trip 12 36 17
33 Not 12 3 19
34 Memory 14 46 23
35 Timer 14 58 54
36 Qualified OR (eight input) 26 68 60
37 AND (two input) 12 40 20
38 AND (four input) 16 48 27
39 OR (two input) 12 40 20
40 OR (four input) 16 48 27
41 Digital input/bus 12 88 38
42 Digital input/loop 12 42 33
45 Digital exception report 12 66 80
50 Manual set switch 12 36 16
51 Manual set constant (nontunable) 12 40 17
52 Manual set integer 12 36 17
55 Hydraulic servo 60 404 3,552
58 Time delay (analog) 18 Equation 1 141
59 Digital transfer 14 44 22
61 Blink 12 48 102
62 Remote control memory 28 96 91
63 Analog input list 28 286 167
64 Digital input list (module bus) 28 190 159
65 Digital sum with gain (four input) 28 68 89
66 Analog trend
Normal mode 12 196 112
Fast mode 12 700 70
68 Remote manual set constant (REMSET) 22 128 75
69 Test alarm 12 44 29

First FC 79 block in segment 48 328 16,302
Additional FC 79 blocks in segment 48 328 2,724
80 Control station 84 366 350
81 Executive block (MFP) 22 140 0
82 Segment control 64 260 0
G-2 2VAA000844R0001 J
Execution
Function NVRAM
Code Bytes
(in µsecs)
83 Digital output group 32 90 275
84 Digital input group 16 114 295
85 Up/down counter 24 76 64
86 Elapsed timer 20 84 66
89 Last block 12 40 0
90 Extended executive (MFP) 52 152 0
91 BASIC configuration Equation 2 Equation 3 15
92 Invoke BASIC 22 46 Program

dependent
93 BASIC real output 12 64 15
94 BASIC boolean output 12 72 15
96 Redundant analog input 22 106 105
97 Redundant digital input 14 58 56
98 Slave select 26 84 58
99 Sequence of events log 14 Equation 4 364
100 Digital output readback check 40 144 185
101 Exclusive OR 12 40 20
102 Pulse input/period 24 100 372
103 Pulse input/frequency 24 100 449
104 Pulse input/totalization 26 130 612
109 Pulse input/duration 24 100 379
110 Five input rung 24 74 45
111 Ten input rung 38 104 66
112 Twenty input rung 68 164 108
114 BCD input 20 72 300
115 BCD output 22 7 380
116 Jump/master control relay 12 52 17
117 Boolean recipe table 28 68 55
118 Real recipe table 48 102 56
119 Boolean signal multiplexer 32 86 48
120 Real signal multiplexer 32 90 49
121 Analog input/Cnet 22 82 80
2VAA000844R0001 J G-3
Memory Utilization and Execution Times G. Multi-Function Processors (IMMFP11/12)
Execution
Function NVRAM
Code Bytes
(in µsecs)
122 Digital input/Cnet 20 50 80
123 Device driver 30 118 110
124 Sequence monitor 80 162 45
125 Device monitor 40 102 359
126 Real signal demultiplexer 12 92 122
128 Slave default definition 44 72 15
129 Multistate device driver 60 168 137
132 Analog input/slave 54 340 1,065
133 Smart field device definition 36 144 60
134 Multi-sequence monitor 96 268 48
135 Sequence manager 82 208 192
136 Remote motor control 52 186 136
137 BASIC real output/quality 12 80 15
138 BASIC boolean output/quality 12 64 15
139 Passive station interface 44 146 160
140 Restore
Largest NVM utilization Equation 5 88 30,650
(FC 165 with S2 = 249)
Smallest NVM utilization (FC 33) Equation 5 88 635
141 Sequence master 80 142 120
142 Sequence slave 74 104 15
143 Invoke C 28 108 Program

dependent
144 C allocation Equation 6 Equation 7 17
145 Frequency counter/slave 30 120 122
146 Remote I/O interface 68 340 2,917
147 Remote I/O definition 144 480 243
148 Batch sequence 36 Equation 8 Program

dependent

First FC 149 in segment 82 318 18,494
Second FC 149 in segment 82 318 18,494
(same ASO as first)
Additional FC 149s in segment 82 318 3,071
150 Hydraulic servo slave 32 168 447
151 Text selector 46 152 47
152 Model parameter estimator 28 352 58
G-4 2VAA000844R0001 J
Execution
Function NVRAM
Code Bytes
(in µsecs)
153 Inferential smith controller parameter 42 168 284

converter
154 Adaptive parameter scheduler 36 224 128
155 Regression 68 Equation 9 105
156 Advanced PID controller 58 190 900
157 General digital controller 68 Equation 10 138
160 Smith predictor 36 342 530
161 Sequence generator 74 212 78
162 Digital segment buffer 16 78 54
163 Analog segment buffer 16 94 56
165 Moving average 16 Equation 11 240
166 Integrator 28 92 168
167 Polynomial
Most complicated 58 104 655
All zero 58 104 193
168 Interpolator 98 196 488
169 Matrix addition 44 172 230
170 Matrix multiplication 44 172 1,800
171 Trigonometric
Sine 14 48 510
Secant 14 48 555
172 Exponential 12 44 400
173 Power 14 48 850
174 Logarithm 14 50 480
177 Data acquisition analog 104 398 384
178 Data acquisition analog input/loop 20 134 118
179 Enhanced trend

Normal sampling 52 Equation 12 360
Normal and statistical sampling 52 Equation 12 734
184 Factory instrumentation protocol handler 42 1,342 5,222
185 Digital input subscriber 32 220 262
186 Analog input subscriber 32 252 1,009
187 Analog output subscriber 48 232 1,790
188 Digital output subscriber 48 208 241
190 User defined function declaration 30 Equation 13 16
2VAA000844R0001 J G-5
Memory Usage Equations G. Multi-Function Processors (IMMFP11/12)
Execution
Function NVRAM
Code Bytes
(in µsecs)
191 User defined function one 56 Equation 14 Program

dependent
192 User defined function two 70 Equation 15 Program

dependent
193 User defined data import 48 Equation 16 100
194 User defined data export 48 Equation 17 175
198 Auxiliary real user defined function 38 150 16
199 Auxiliary digital user defined function 38 134 16
210 Sequence of events slave 100 572 1,320
211 Data acquisition digital 62 310 448
212 Data acquisition digital input/loop 20 110 70
215 Enhanced analog slave definition 30 206 1,670
216 Enhanced analog input definition 42 114 584
217 Enhanced calibration command 24 178 33
219 Common sequence 46 Equation 18 Program

dependent
220 Batch historian 46 Equation 19 Program

dependent
241 DSOE data interface SEM to MFP

No SED resynch function performed 18 284 360
SED resynch performed once every 18 284 900
second

No data available on SED I/O module 84 338 300
Data available on SED I/O module 84 338 1,600
G.2 Memory Usage Equations
1. 78 + [8 x (S5)]
2. 38 + [1024 x (S5)]
3. 4994 + 1024 [(S3) + (S4) + (S5)]
4. 96 + [9 x (S2)]
5. Refer to function code 140, module memory utilization
6. 12 + [1024 x (S2)]
7. 36 + [1024 x (S1)]
8. 826 + [1024 x (S11)] + [a x (S12)]
where:
- or -
9. 338 + [40 x (S7)]
10. 228 + [8 x (S21 + S22)]
G-6 2VAA000844R0001 J
G. Multi-Function Processors (IMMFP11/12) Function Blocks - IMMFP11/12
11. 98 + [8 x (S2)]
12. a + [b x (S4)] + [c x (n{S3})],
where
n{S3} = Number of modes selected by S3
if S2 = 1, 2, 5, 6, 7 or 9, then a = 380, b = 20, and c = 8
13. 74 + [10 x (S2)]
14. 520 + [2 x (S16)]
15. 256 + [3 x (S5)]
16. 604 + [2 x (S24)]
17. 256 + [5 x (S4)]
18. 424 + [222 x (S13)]
19. 666 + [2 x (S11)]
G.3 Function Blocks - IMMFP11/12
Table G-2 contains function code block number information for the IMMFP11/12.
Table G-2 Function Blocks for the IMMFP11/12 Multi-Function Processors
0 Logic 0 81
1 Logic 1
2 0 or 0.0
3 -100.0
4 -1.0
5 0.0
6 1.0
7 100.0
8 -9.2 E18
9 9.2 E18
10 Start-up flag (0 = no, 1 = yes)
13 Revision level 81
14 Reserved
2VAA000844R0001 J G-7
Module Status Information G. Multi-Function Processors (IMMFP11/12)
Table G-2 Function Blocks for the IMMFP11/12 Multi-Function Processors

24 Year (0 to 99)
25 Month (1 to 12)
26 Day (1 to 31)
28 Reserved
29 Reserved
301 Configurable blocks Note 2
Note 3 Loop type: 89

0.0 = Plant Loop
1.0 = Cnet
NOTES:
1. The highest configurable block number is 9998 for IMMFP11/12.
2. Any allowed function code - refer to Table G-1.
3. The Block number is 9998 for IMMFP11/12.
G.4 Module Status Information
Table G-3 and Table G-4 explain the controller module status bits and bytes.
Table G-3 Bit Description - IMMFP11/12
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
3 Error code
6 ETYPE
7 CWA CWB Reserved Reserved Reserved Reserved Reserved Reserved
8 SIME SIMR SIMT Reserved
9 Reserved Reserved Reserved
11 Reserved Reserved Reserved Reserved RNO Reserved Reserved Reserved
G-8 2VAA000844R0001 J
G. Multi-Function Processors (IMMFP11/12) Module Status Information
Table G-3 Bit Description - IMMFP11/12 (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
12-13 Reserved
Table G-4 Byte Description - IMMFP11/12
Field Size or
Value
CFG 08 On-line configuration changes being made
2VAA000844R0001 J G-9
Table G-4 Byte Description - IMMFP11/12 (Continued)
Field Size or
Value
3-5 Error Code 3 4 5

Note 1
NVRAM error:
03 — Bad data


05 (1)( 2) Configuration error – undefined block:



09 — — Segment violation - priority set the same in two segments, or

more than eight segments defined.
0F — — Primary module has failed and the redundant module configura-

tion is not current
10 — — Primary module has failed and the dynamic RAM data in the
redundant module is not current
File system error:

G-10 2VAA000844R0001 J
G. Multi-Function Processors (IMMFP11/12) Module Status Information
Field Size or
Value

Note 1
(cont) 22 (1) (2) Invoke C error:








2F (1) (2) BASIC program error:

(1), (2) = line number of error
6 ETYPE 1F Enhanced module type = (24)16 = IMMFP11/12
8 SIME 80 Simulation enabled: 0 = normal operation, 1 = simulation active
SIMR 40 Simulation running/frozen: 0 = simulation frozen, 1= simulation

running
SIMT 20 Simulation time rate: 0 = real time, 1 = slow/fast time
CFC 40 Configuration current (latched until backup is reset). Set when

LED 7 is enabled (1 = on or blinking) on the backup module.
CHK 10 Backup has completed checkpointing (latched until backup is

reset). Always set to 0 on the primary module. Follows LED 8
(1 = on or blinking) on the backup module.
RID 08 Redundancy ID. Follows setting of redundancy ID pole on the

dipswitch.
RDEXP 04 Redundancy expected. Always set to 1 on the backup module.

Follows state of function code 90, specification S3, ones digit on
the primary module.
OCE 02 On-line configuration is enabled. Follows setting of on-line config-

uration enable pole on dipswitch.
RDDET 01 Redundancy detected (latched until module is reset or it changes

from backup to primary or primary to backup). Set to 1 when a
properly configured redundant module is detected.
2VAA000844R0001 J G-11
Field Size or
Value
11 RNO 08 Redundancy NVM overrun (latched indication). Set to 1 in pri-

mary module if NVM checkpoint overruns have occurred. NVM
checkpoint overruns cause the primary module to reset the
backup module.
14 — FF Module nomenclature: (01) 16 = IMMFP11, (02)16 = IMMFP12
15 — FF Revision letter (in ASCII code), for example, (46)16 = F, (47)16 = G
16 — FF Revision number (in ASCII code), for example, (38)16 = 8
NOTE:
G-12 2VAA000844R0001 J
H. Sequence of Events Monitor (INSEM01 and INSEM11/SPSEM11) Memory Utilization
H. Sequence of Events Monitor (INSEM01 and INSEM11/SPSEM11)
H.1 Memory Utilization
This appendix lists the module memory requirements for each available function code for the INSEM01 and INSEM11/ SPSEM11
(SEM11) Cnet to computer communications and sequence of events monitor. Two quantities are given for the module. The first value is
the number of bytes of nonvolatile random access memory (NVRAM). The second quantity is the number of bytes of random access
memory (RAM).
Table H-1 lists the configuration memory available the module. Table H-2 shows the module memory requirements for each function
code. Tables H-3 and H-4 explain module status.
Table H-1 Available Module Configuration Memory
NVRAM
Module RAM Bytes
Bytes
INSEM01 65,536 262,144
Table H-2 Module Memory Utilization for Function Codes
Function NVRAM RAM

Description
Code Bytes Bytes
243 Executive block (INSEM01) 24 50
244 Addressing interface definition 20 50
245 Input channel interface 28 52
246 Trigger definition 72 92
H.2 Module Status Information
Table H-3 and Table H-4 explain the controller module status bits and bytes.
Table H-3 Bit Description - INSEM01 and SEM11
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 FTX RIO LIO CFM ERM
3 CSP MOV LOP SDF NODE TYPE
4 NSF LR1 LR2 LT1 LT2 RI1 RI2 RCF
5 HOST
6 ETYPE
7-8 Reserved
9 NDT1 NDT2 NCD1 NCD2
10 - 13 Reserved
2VAA000844R0001 J H-1
Module Status Information H. Sequence of Events Monitor (INSEM01 and INSEM11/SPSEM11)
Table H-4 Byte Description - INSEM01
Field Size
or Value
MODE 60 Module mode: 00 = configure, 01 = fail, 10 = error, 11 = exe-

cute
TYPE 1F Module type code: (15)16 = enhanced status
CFM 08 Module in configure mode (MODE = 00): 0 = no, 1 = yes
ERM 01 Module in error mode (MODE = 10): 0 = no, 1 = yes
3 CSP 80 Communication status problem: 0 = no, 1 = yes
MOV 40 Memory overflow: 0 = good, 1 = bad
LOP 10 Off-line bridge for remote loop: 0 = no, 1 = yes
SDF 01 Security device failure
NODE 07 Node type: 0 = computer interface, 1 = operator interface unit

TYPE or management command system, 2 = operator interface unit
4 NSF 80 Node environment status flag: 0 = good, 1 = bad
LR1 40 Cnet 1 receive error: 0 = no, 1 = yes
LT1 10 Cnet 1 transmit error: 0 = no, 1 = yes
RI1 04 Receiver idle on channel 1 of central loop: 0 = no, 1 = yes
RI2 02 Receiver idle on channel 2 of central loop: 0 = no, 1 = yes
RCF 01 Ring communication failure: 0 = no, 1 = yes
5 HOST FF Value set by the computer (when non-zero, ES = 1)
6 ETYPE 20 Enhanced module type (2A)16 = INSEM01
7-8 — 00 Reserved
9 NDT1 01 NIS loop relay drive transistor 1 failure
NDT2 01 NIS loop relay drive transistor 2 failure
NCD1 01 NIS receive channel 1 disable
10 - 13 — — Reserved
14 — FF Module nomenclature (01)16 = INSEM01
15 — FF Revision letter (in ASCII code), for example, (45)16 = E
H-2 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits Introduction
I. Communications Modules Status Bytes and Data Bits
I.1 Introduction
This appendix describes the status bytes and data bits, and their descriptions for the following communications modules:
• CP700 Communications Processor Module
• CP800 Communications Processor Module
• INICT03/03A Cnet to Computer Transfer Module
• INICT12 Cnet to Computer Transfer Module
• INICT13A and SPICT13A Cnet to Computer Transfer Module
• INIET800 and SPIET800 Cnet to Computer Transfer Module
• INIIT03/13 and SPIIT13 Local Transfer Module
• INNPM11/12/22 and SPNPM22 Network Processing Module
• PNI800 Plant Network Interface 800 Module
• SPIPT800 INFI-NET to PN800 Transfer Module
• IOR800 and IOR810 Gateway
I.2 CP700 Communications Processor Module Status Information
The SPC700 Symphony Plus Process Controller module consists of the SC700 Control Processor module and the CP700
Communications Processor module. The CP700 module has a 16-byte status record. The status report provides summary
flags for error conditions, module type, and firmware revision level. The status reports are viewable from a Human System
Interface (HSI).
Byte 1 0x75 = 01110101
Table I-1 and Table I-2 explain the CP700 Communications Processor module status bytes and data bits. Refer to B.4 for
the SC700 Control Processor module status bytes and data bits.
Bit 7 0 = no errors
Bit 6/5 11 = execute mode
Bit 4-0 10101 = enhanced node type; reference byte 6 (ETYPE) for actual type.
Table I-1 CP700 Module Status Byte and Data Bit Description
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 Reserved
3 CSP MOV Reserved BKCFG BKSTS Reserved PSI
4 NSF RER1 RER2 TER1 TER2 Reserved
5 Reserved
6 ETYPE (0x25)
7 Reserved R1F R2F Reserved HN800A HN800A
8 Reserved
9 Reserved NET NET MIS- NET NET

SWAP MATCH IDLE 1 IDLE2
2VAA000844R0001 J I-1
CP700 Communications Processor Module Status Information I. Communications Modules Status Bytes and Data Bits
Table I-1 CP700 Module Status Byte and Data Bit Description (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
10 PRI CFC Reserved CHK Reserved RDEXP Reserved RDDET
11 Reserved PSA PSB
12 Reserved
13 Reserved
Table I-2 CP700 Communications Processor Module Status Bit Descriptions
Byte Field Field Size or Value Description
MODE 60 Module mode: 10 = error, 11 = execute
TYPE 1F Module type: 0x15 = enhanced status (ETYPE)
2 — 00 Reserved
— — Reserved
BKCFG 10 Redundant configuration: 0 = no, 1 = yes
BKSTS 08 Backup failed: 0 = no, 1 = yes
— — Reserved
— — Reserved
PSI 01 Primary/backup indicator: 0 = primary, 1 = backup
4 NSF 80 PN800 error: 0 = good, 1 = errors
RER1 40 Receive error: PN800 A: 0 = good, 1 = errors
RER2 20 Receive error: PN800 B: 0 = good, 1 = errors
TER1 10 Transmit error: PN800 A: 0 = good, 1 = errors
TER2 8 Receive error: PN800 B: 0 = good, 1 = errors
— — Reserved
— — Reserved
— — Reserved
5 — — Reserved
6 ETYPE 20 Enhanced module type: 0x25 = CP700 module
I-2 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits CP700 Communications Processor Module Status Information
Table I-2 CP700 Communications Processor Module Status Bit Descriptions (Continued)
7 — — Reserved
— — Reserved
— — Reserved
— — Reserved
8 — 00 Reserved
9 — — Reserved
— — Reserved
— — Reserved
— — Reserved
NET 08 Network LAN A/B swapped: 0 = no, 1 = yes

SWAP
If this bit is a 1/YES, then the CP700 module detects one
or more nodes on the network having their (PN800) LAN
A/B Ethernet connections swapped (LAN A is connected
to LAN B, LAN B is connected to LAN A).
NET 04 Network LAN A/B mismatch: 0 = no, 1 = yes

MIS-
If this bit is a 1/YES, then the CP700 module detects that
MATCH
its (PN800) LAN A/B Ethernet connections are operating
in different modes (A= 10MHZ, B= 100MHZ, or A= Full
duplex, B= Half Duplex)
NET 02 Error on PN800 LAN A. No connection on RJ45 for

IDLE1 PN800 LAN A (labeled EN2 A on the MB810 base)
NET 01 Error on PN800 LAN B. No connection on RJ45 for

IDLE2 PN800 LAN B (labeled EN2 B on the MB810 base)
2VAA000844R0001 J I-3
10 PRI 80 Module is primary versus backup; set to 1 in the primary

module.
CFC 40 Configuration current (latched until backup is reset). Set

when LED 7 is enabled (1 = on or blinking) on the
backup module.
— — Reserved
CHK 10 Backup has completed checkpointing (latched until

backup is reset). Always set to 0 on the primary module.
Follows LED 8 (1 = on or blinking) on the backup mod-
ule.
— — Reserved
RDEXP 04 Redundancy expected. Always set to 1 on the backup

module. Follows state of function code 90, specification
S3, ones digit on the primary module.
— — Reserved
RDDET 01 Redundancy detected (latched until module is reset or it

changes from backup to primary or primary to backup).
Set to 1 when a properly configured redundant module is
detected.
11 — — Reserved
— — Reserved
— — Reserved
— — Reserved
— — Reserved
— — Reserved
PSA 02 Power Status A: 0 = OK, 1 = failed/bad
12 — 00 Reserved
13 — 00 Reserved
14 — FF Module nomenclature: 0x1D = CP700
15 — FF Revision letter (in ASCII code). For example, 0x41 = A
I.3 CP800 Communications Processor Module Status Information
The HPC800 Harmony Process Controller module consists of the HC800 Control Processor module and the CP800
Communications Processor module. The CP800 module has a 16-byte status record. The status report provides summary
flags for error conditions, module type, and firmware revision level. The status reports are viewable from a Human System
Interface (HSI).
Byte 1 0x75 = 01110101
I-4 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits CP800 Communications Processor Module Status Information
Table I-3 and Table I-4 explain the CP800 Communications Processor module status bytes and data bits. Refer to C.4 for
the HC800 Control Processor module status bytes and data bits.
Bit 7 0 = no errors
Bit 6/5 11 = execute mode
Bit 4-0 10101 = enhanced node type; reference byte 6 (ETYPE) for actual type.
Table I-3 CP800 Module Status Byte and Data Bit Description
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 Reserved
3 CSP MOV Reserved BKCFG BKSTS Reserved PSI
4 Reserved
5 Reserved
6 ETYPE (0x25)
7 Reserved R1F R2F Reserved HN800A HN800A
8 Reserved
9 CW800A CW800B BAT LOW Reserved NET NET NET NET

SWAP MISMATCH IDLE 1 IDLE2
10 Reserved
11 PSA PSB Reserved
12 - 13 Reserved
14 Module nomenclature (0x1E for CP800)
Table I-4 CP800 Communications Processor Module Status Bit Descriptions
2 — 00 Reserved
2VAA000844R0001 J I-5
— — Reserved
— — Reserved
— — Reserved
4&5 — 00 Reserved
6 ETYPE 20 Enhanced module type: 0x25 = CP800
7 — — Reserved
— — Reserved
— — Reserved
— — Reserved
8 — 00 Reserved
BAT LOW 20 NVRAM Battery low: 0 = good, 1 = replace battery
— — Reserved
NET 08 Network LAN A/B Swapped: 0 = no, 1 = yes

SWAP
If this bit is a ‘1’ / YES, the CP800 detects one or more
nodes on the Network having their (PN800) LAN A/B
Ethernet connections swapped (i.e. LAN A is connected
to LAN B, LAN B is connected to LAN A.
NET 04 Network LAN A/B Mismatch: 0 = no, 1 = yes

MIS-
If this bit is a ‘1’ / YES, then CP800 detects that its
MATCH
(PN800) LAN A/B Ethernet connections are operating in
different modes (i.e. A= 10MHZ, B= 100MHZ, or A= Full

IDLE1 PN800 LAN A (labeled EN2 A on the MB810 base)

IDLE2 PN800 LAN B (labeled EN2 B on the MB810 base)
10 — — Reserved
I-6 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits INICT03/03A/13 and INICT12 Cnet to Computer Transfer Modules
— — Reserved
— — Reserved
— — Reserved
— — Reserved
— — Reserved
— — Reserved
12 — 00 Reserved
13 — 00 Reserved
14 — FF Module nomenclature: 0x1E = CP800
I.4 INICT03/03A/13 and INICT12 Cnet to Computer Transfer Modules
Table I-5 lists the fields that make up the INICT03/03A/13 and INICT12 module status report. Table I-6 describes each field
within the module status record.
Table I-5 INICT03/03A, INICT13 and INICT12 Status Bytes
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
3 PCUs MOV RINGs SDF NODE TYPE

(CSP) (LOP)
4 NSF RER1 RER2 TER1 TER2 RI1 RI2 RCF

(LR1) (LR2) (LT1) (LT2)
5 HOST
6 ETYPE
7-8 Reserved
10 - 12 Reserved
13 Module type
2VAA000844R0001 J I-7
INICT03/03A/13 and INICT12 Cnet to Computer Transfer Modules I. Communications Modules Status Bytes and Data Bits
Table I-6 INICT03/03A, INICT13 and INICT12 Status Bits
Field Size
or Value
MODE 60 Module mode: 00 = configure, 01 = fail, 10 = error, 11 = execute
3 PCUs 80 Communication status problem: 0 = no, 1 = yes

(CSP)
RINGs 10 Offline bridge for remote ring: 0 = no, 1 = yes

(LOP)
NODE 07 Node type: 0 = computer interface, 1 = operator interface unit or

TYPE management command system, 2 = operator interface unit
RER1 40 Cnet 1 receive error: 0 = no, 1 = yes

(LR1)

(LR2)
TER1 10 Cnet 1 transmit error: 0 = no, 1 = yes

(LT1)

(LT2)
RI1 04 Receiver idle on channel 1: 0 = no, 1 = yes
6 ETYPE 20 Enhanced module type (20)16 = INICT12 or INICT03/03A/13
7-8 — 00 Reserved
9 NDT1 01 NIS ring relay drive transistor 1 failure
NDT2 01 NIS ring relay drive transistor 2 failure
I-8 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits INIET800 and SPIET800 Cnet to Computer Transfer Modules
Table I-6 INICT03/03A, INICT13 and INICT12 Status Bits (Continued)
Field Size
or Value
13 — FF Module type: 1=SSM, 2=MCP
14 — FF Module nomenclature: (0C)16 = INICT12, (03)16 =

INICT03/03A/13
15 — FF Revision letter (in ASCII code). For example, (45)16 = E
16 — FF Revision number (in ASCII code). For example, (30)16 = 0
I.5 INIET800 and SPIET800 Cnet to Computer Transfer Modules
Table I-7 lists the lists the fields that make up the INIET800 and SPIET800 (IET800) module status report. Table I-8
describes each field within the module status record.
Table I-7 IET800 Status Bytes
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
3 PCUs MOV LFF RINGs SDF NODE TYPE

(CSP) (LOP)
4 NSF RER1 RER2 TER1 TER2 RI1 RI2 RCF

(LR1) (LR2) (LT1) (LT2)
5 HOST
6 ETYPE
7 RDA RDB
8 Reserved
10 - 12 Reserved
13 Module type
2VAA000844R0001 J I-9
INIET800 and SPIET800 Cnet to Computer Transfer Modules I. Communications Modules Status Bytes and Data Bits
Table I-8 IET800 Status Bits
Field Size
or Value
3 PCUs 80 Communication status problem: 0 = no, 1 = yes

(CSP)
One or more remote PCUs are offline
LFF 20 Licensing failure
RINGs 10 Offline bridge for remote ring: 0 = no, 1 = yes

(LOP)
NODE 07 Node type: 0 = computer interface, 1 = operator interface unit or

TYPE management command system, 2 = operator interface unit

(LR1)

(LR2)

(LT1)

(LT2)
6 ETYPE 20 Enhanced module type (20)16 = SSM/CIU/ICT/IET
7 RDA 20 Redundancy link bus A error
RDB 10 Redundancy link bus B error
8 — 00 Reserved
I-10 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits INIIT03 and INIIT13/SPIIT13 Local Transfer Module
Table I-8 IET800 Status Bits (Continued)
Field Size
or Value
9 NDT1 01 NIS ring relay drive transistor 1 failure
NDT2 01 NIS ring relay drive transistor 2 failure
14 — FF Module nomenclature:
(04)16 = IET800 in serial or Ethernet mode
15 — FF Revision letter (in ASCII code). For example, (45)16 = E
16 — FF Revision number (in ASCII code). For example, (30)16 = 0
I.6 INIIT03 and INIIT13/SPIIT13 Local Transfer Module
Table I-9 lists the fields that make up the INIIT03 and INIIT13/SPIIT13 (IIT13) module status report. Table I-10 describes
each field within the module status record.
Table I-9 IIT03/13 Status Bytes
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 SIO CIO NVI
3 PCUs MOV NODS BKCFG BKSTS RINGs PSI
41 NSFC RER1C RER2C TER1C TER2C RID1C RID2C RCFC
51 NSFS RER1S RER2S TER1S TER2S RID1S RID2S RCFS
6 ETYPE
7 - 13 Reserved

NOTE: 1. The last letter of the codes (S or C) in bytes 4 and 5 indicates if the status applies to the satellite
ring or the central ring.
2VAA000844R0001 J I-11
INNPM11/22, INNPM12 and SPNPM22 Network Processing Modules I. Communications Modules Status Bytes and Data Bits
Table I-10 IIT03/13 Status Bits
Field
Byte Field Size or Description
Value
MODE 60 Module mode: 01 = fail, 11 = execute
TYPE 1F Module type code: (15)16 = INIIT03
2 SIO 20 I/O status for data sourced by satellite ring PCUs:

0 = good, 1 = bad
CIO 10 I/O status for data sourced by central ring PCUs:

0 = good, 1 = bad
NVI 02 Default configuration: 0 = blocks configured, 1 = no blocks

configured (INIPT01 only)
3 PCUs 80 Nodes off-line: 0 = no, 1 = yes
MOV 40 Memory overflow: 0 = no, 1 = yes
BKSTS 08 Secondary failed: 0 = no, 1 = yes
RINGs 04 Rings off-line: 0 = on-line, 1 = off-line bridge for remote rings
PSI 01 Primary/secondary indicator: 0 = primary, 1 = secondary
4 - 51 NSF 80 Node environment status flag: 0 = good, 1 = bad
RER1 40 Receive errors on channel 1: 0 = no, 1 = yes
TER1 10 Transmit errors on channel 1: 0 = good, 1 = errors
TER2 08 Transmit errors on channel 2: 0 = good, 1 = errors
RID1 04 Receiver idle of channel 1: 0 = no, 1 = yes
RID2 02 Receiver idle of channel 2: 0 = no, 1 = yes
RCF 01 Ring communication failure (IIT03 only)
6 ETYPE FF Extended module type: (23)16 = IIT03
7 - 13 — 00 Reserved
14 — FF Module nomenclature: (03)16 = IIT03/13
15 — FF Revision letter (in ASCII code), for example, (42)16 = B

NOTE:
1. The last letter of the codes (S or C) in bytes 4 and 5 indicates if the status applies to the satellite ring or
the central ring.
I.7 INNPM11/22, INNPM12 and SPNPM22 Network Processing Modules
The INNPM12 presents two different status summaries depending on its mode of operation (i.e. Cnet or Plant Loop mode)
set with switch SW3. The INNPM11 and INNPM22/SPNPM22 (NPM22) operate only in Cnet mode. In Cnet mode the
I-12 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits Cnet Mode
modules have 16-byte module status records. When in Plant Loop mode, the INNPM12 module has a five-byte module
status record.
I.7.1 Cnet Mode
Table I-11 lists the fields that make up the status report for the INNPM11/12 and NPM22 modules in Cnet mode. Table I-12
describes each field within the module status record.
Table I-11 INNPM11/12 and NPM22 Cnet Mode Status Bytes
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 Reserved
3 CSP MOV BKCFG BKSTS PSI
4 NSF LR1 LR2 LT1 LT2 RI1 RI2 RCF
5 Reserved
6 ETYPE
7 CWA CWB
8 Reserved
10 - 13 Reserved
Table I-12 INNPM11/12/22 Cnet Mode Status Bits
Field Size
or Value
1 ES 80 Error summary: 0 = good, 1 = errors.
MODE 60 Module mode: 10 = error, 11 = execute.
TYPE 1F Module type: 0x15 = enhanced status (ETYPE).
2 — 00 Reserved
2VAA000844R0001 J I-13
Plant Loop Mode I. Communications Modules Status Bytes and Data Bits
Table I-12 INNPM11/12/22 Cnet Mode Status Bits (Continued)
Field Size
or Value
RCF 01 ring communication failure: 0 = no, 1 = yes
5 — 00 Reserved
6 ETYPE 20 Enhanced module type: 0x25 = INNPM12 or INNPM11
7 CWA 80 Controlway channel A failure: 0 = no, 1 = yes
CWB 40 Controlway channel B failure: 0 = no, 1 = yes
8 — 00 Reserved
9 NDT1 80 NIS ring relay drive transistor 1 failure: 0 = no, 1 = yes
NDT2 40 NIS ring relay drive transistor 2 failure: 0 = no, 1 = yes
NCD1 08 NIS receive channel 1 disable: 0 = no, 1 = yes
14 — FF Module nomenclature: 0x01 = INNPM12 or INNPM11
I.7.2 Plant Loop Mode
Table I-13 lists the fields that make up the INNPM12 module status report when in Plant Loop mode. Table I-14 describes
each field within the module status record.
Table I-13 INNPM12 Status Bytes (Plant Loop Mode)
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 Reserved
3 CSP MOV NSF BKCFG BKSTS PSI
4 LR1 LR2 LT1 LT2
5 Reserved
I-14 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits PNI800 Plant Network Interface 800 Module
Table I-14 INNPM12 Status Bits (Plant Loop Mode)
Field Size
or Value
TYPE 1F Module type: 0x08 = INNPM12 (Plant Loop mode)
2 — 00 Reserved
NSF 20 Node environment status flag: 0 = good, 1 = bad
4 LR1 40 Plant Loop 1 receive error: 0 = no, 1 = yes
LR2 20 Plant Loop 2 receive error; 0 = no, 1 = yes
LT1 10 Plant Loop 1 transmit error: 0 = no, 1 = yes
LT2 08 Plant Loop 2 transmit error: 0 = no, 1 = yes
5 — 00 Reserved
I.8 PNI800 Plant Network Interface 800 Module
Table I-3 lists the lists the fields that make up the IPNI800 module status report. Table I-16 describes each field within the
module status record.
Table I-15 PNI800 Status Bytes
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 RIO LIO
3 CSP MOV LFF
5 Reserved
6 ETYPE
7 Reserved
8 Reserved
9 NET NET ELANA ELANB

SWAP MIS-
MATCH
10 Reserved
2VAA000844R0001 J I-15
PNI800 Plant Network Interface 800 Module I. Communications Modules Status Bytes and Data Bits
Table I-15 PNI800 Status Bytes (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
11 PSA PSB
12-13 Reserved
Table I-16 PNI800 Status Bits
Field Size
or Value
2 RIO 20 Summary remote input status: 0 = good, 1 = bad

(Remote node is offline)
LFF 20 Licensing failure
4-5 Reserved
6 ETYPE 20 Enhanced module type (20)16 = SSM/CIU/ICT/IET
7-8 Reserved
9 NET 08 Network LAN A/B Swapped: 0 = no, 1 = yes

SWAP
If this bit is a '1' / YES, PNI800 has detected one or more nodes
on the Network as having their (PN800) LAN A/B Ethernet con-
nections swapped (i.e. LAN A is connected to LAN B, LAN B is
connected to LAN A.
LANM 04 Network LAN A/B Mismatch: 0 = no, 1 = yes

If this bit is a '1' / YES, PNI800 has detected that its (PN800)
LAN A/B Ethernet connections are operating in different modes
(i.e. A= 10 MHZ, B= 100 MHZ, or A= Full Duplex, B= Half
Duplex).
ELANA 02 Error on LAN A. No connection on RJ45 LAN A
ELANB 01 Error on LAN B. No connection on RJ45 LAN B
10 Reserved
I-16 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits SPIPT800 INFI-NET to PN800 Transfer Module
Table I-16 PNI800 Status Bits (Continued)
Field Size
or Value
12-13 Reserved
14 — 05 Module nomenclature:
(0x5)16 = PNI800
15 — FF Revision letter (in Hex). For example, (0x45)16 = E
16 — FF Revision number (in Hex). For example, (0x30)16 = 0
I.9 SPIPT800 INFI-NET to PN800 Transfer Module
Table I-17 lists the lists the fields that make up the SPITP800 module status report. Table I-18 describes each field within the
module status record.
The following table (Table I-17) lists the fields that make up the IPT800 module status report:
Table I-17 SPIPT800 Status Byte Description
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
2 SIO CIO
3 PCUs MOV BKCFG BKSTS RINGS PSI
4 NSF RER1 RER2 TER1 TER2 RID1 RID2 RCF
5 Reserved
6 ETYPE
7 Reserved
9 CW800A CW800B BAT NET NET NET NET

LOW SWAP MISMATCH IDLE 1 IDLE2
10 Reserved
11 PSA PSB
12 - 13 Reserved
14 Module nomenclature (0x5)
2VAA000844R0001 J I-17
SPIPT800 INFI-NET to PN800 Transfer Module I. Communications Modules Status Bytes and Data Bits
The following table (Table I-18) describes each field within the module status record:
Table I-18 SPIPT800 Status Bit Descriptions
2 SIO 20 I/O status for data sourced by satellite ring PCUs:

0 = good, 1 = bad
CIO 10 I/O status for data sourced by central ring PCUs:

0 = good, 1 = bad
3 PCUs 80 Nodes off-line: 0 = no, 1 = yes
MOV 40 Memory overflow: 0 = no, 1 = yes
RINGS 04 Rings off-line: 0 = on-line, 1 = off-line bridge for remote

rings
TER1 10 CNET 1 transmit error: 0 = no, 1 = yes
TER2 08 CNET 2 transmit error: 0 = no, 1 = yes
RID1 04 Receiver idle on channel 1: 0 = no, 1 = yes
RID2 02 Receiver idle on channel 2: 0 = no, 1 = yes
5 Reserved
6 ETYPE 20 Enhanced module type: 0x23= SPIPT800
7 Reserved
8 NDT1 08 NIS loop relay drive transistor 1 failure: 0 = no, 1 = yes
NDT2 04 NIS loop relay drive transistor 2 failure: 0 = no, 1 = yes
NCD2 01 NIS receive channel 2disable: 0 = no, 1 = yes
I-18 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits Module Status Information - Gateway Module IOR800 and IOR810
Table I-18 SPIPT800 Status Bit Descriptions (Continued)
BAT LOW 20 NVRAM Battery low: 0 = good, 1 = replace battery
NET 08 Network LAN A/B Swapped: 0 = no, 1 = yes

SWAP
If this bit is a ‘1’ / YES, the SPIPT800 detects one or
more nodes on the Network having their (PN800) LAN
A/B Ethernet connections swapped (i.e. LAN A is con-
nected to LAN B, LAN B is connected to LAN A.
NET 04 Network LAN A/B Mismatch: 0 = no, 1 = yes

MIS-
If this bit is a ‘1’ / YES, then SPIPT800 detects that its
MATCH
(PN800) LAN A/B Ethernet connections are operating in
different modes (i.e. A= 10MHZ, B= 100MHZ, or A= Full

IDLE1 PN800 LAN A (labeled CH 0 on module front plate)

IDLE2 PN800 LAN B (labeled CH 1 on module front plate)
10 — — Reserved
12-13 Reserved
14 — FF Module nomenclature: 5 = SPIPT800
I.10 Module Status Information - Gateway Module IOR800 and IOR810
Tables I-19 and I-20 explain Symphony Plus IOR800/810 status bytes.
Table I-19 Byte and Bit Description - IOR800/810
Bit
Byte
7 6 5 4 3 2 1 0
1 ES MODE TYPE
3 Error code
6 ETYPE
7 Reserved R1F R2F PERERR HNCOM HN800A HN800B
8 Reserved
2VAA000844R0001 J I-19
Module Status Information - Gateway Module IOR800 and IOR810 I. Communications Modules Status Bytes and Data Bits
Table I-19 Byte and Bit Description - IOR800/810 (Continued)
Bit
Byte
7 6 5 4 3 2 1 0
9 HN800A HN800B BATLOW Reserved

Relay Relay
10 PRI CFC CFGCHG CHK RID RDEXP RANK RDDET
11 PSA PSB Reserved SOA Reserved Reserved Reserved Reserved

(IOR800
only)
12 PRT1ERR PRT1OPR PRT1S Reserved
13 Reserved
Table I-20 Byte Description - IOR800/810
Field Size
or Value
MODE 60 Module mode: 00 = configure, 01 = failed, 10 = error, 11 = execute
I-20 2VAA000844R0001 J
I. Communications Modules Status Bytes and Data Bits Module Status Information - Gateway Module IOR800 and IOR810
Table I-20 Byte Description - IOR800/810 (Continued)
Field Size
or Value

Note 1
NVRAM error:
03 — Bad data




not current
62 ETYPE 1F Enhanced module type = (B1)16
7 — — Unused
— — Unused
PERERR 08 Peripheral Error: 0 = good, 1 = hardware fault
HNCOM 04 HN800 Communications established: 0 = Yes, 1 = No
8 — — Unused
9 HN800A 80 HN800 channel A relay failure: 0 = good, 1 = fail 3

Relay
HN800B 40 HN800 channel B relay failure: 0 = good, 1 = fail 3

Relay
BATLOW 20 NVRAM Battery low: 0 = good, 1 = replace battery
2VAA000844R0001 J I-21
Module Status Information - Gateway Module IOR800 and IOR810 I. Communications Modules Status Bytes and Data Bits
Table I-20 Byte Description - IOR800/810 (Continued)
Field Size
or Value
CFGCHG 20 Configuration changed: 0 = none, 1 = configuration changed since last

update


switch.

module.
RANK 02 Rank valid: 0 = Yes (primary is valid), 1 = No

SOA 10 IOR 800 only

Status output alarm. Indicates the status of the system +24 volt power
0 = OK, 1 = alarm.
12 PRT1ERR 80 Port 1 error: 0 = OK, 1 = failed
PRT1OPR 40 Port 1 Inoperative: 0 = good, 1 = S800 module bus failure
PRT1S 20 Port 1 Status Change: 0 = no change, 1 = Port 1 status has changed
13 — 00 Reserved
142 — FF Module nomenclature number (08)10 = 8 for the IOR800/810

2
NOTE:
2. (x) 16 denotes a hexadecimal number. The equivalent decimal or ASCII character is to be used. Hex to
3. IOR800 only. The IOR810 does not have HN800 channel relays.
I-22 2VAA000844R0001 J
J. Point Quality Definition General Description
J. Point Quality Definition
J.1 General Description
This appendix defines the point quality flag states for analog I/O, digital I/O, and module bus I/O.
NOTE: The control module can be configured to trip or continue operation upon the loss of an I/O module.
J.2 Individual Analog Inputs
Each analog input is compared to a low value of -0.75 VDC and a high value of 5.25 VDC. If the input goes outside either limit, the value
is held to the limit and the point quality flag indicates bad.
J.3 Group Analog Inputs
If an I/O module is not connected, all points in the group will have their point quality flag set to bad.
J.4 Group Analog Outputs
All outputs are read back by feedback input circuitry. If the feedback voltage signal does not match the requested software output value,
the point quality is set to bad for that output.
J.5 Digital I/O
If the I/O definition block is configured to use an I/O module, but the I/O module is not installed, the point quality flag for the associated
module I/O group will be set to bad, and the control module generates a problem report.
J.6 Peer-to-Peer and Module Bus I/O
If input data cannot be read for a period of 2.0 seconds (S2 of FC 90 = 0.250 sec.), the flag will be set to bad. A new attempt will be made
to read the data at least every 20 seconds.
NOTE: After the point quality flag is set to indicate bad quality, the receiving module retains and uses the last good value that was
obtained.
The Harmony controllers utilize a configurable retry period for determining bad quality. The base retry period is configured in the extended
executive (function code 90) base periodic sample I/O period S2. This specification (S2) also determines the time resolution for all
periodic sample I/O pole periods configured in the module. This includes the segment control (function code 82) periodic sample I/O
period S13. All periodic sample I/O periods should be configured in multiples of function code 90, S2. To determine the typical time
required to mark a periodic sample I/O point bad, multiply function code 90, S2 by eight.
Example:
function code 90, S2  0.250 sec.
0.250 sec.  8.000  2.000 sec.
A point will not continue to retry at the function code 90, S2 period after being marked bad. The bad point retry is only performed once
every 20 seconds.
2VAA000844R0001 J J-1
Peer-to-Peer and Module Bus I/O J. Point Quality Definition
J-2 2VAA000844R0001 J
K. Console Engineering Unit Descriptions Engineering Unit Descriptions Tables
K. Console Engineering Unit Descriptions
K.1 Engineering Unit Descriptions Tables
Table K-1 Human System Interface (Conductor VMS/NT)
Code Description Code Description
0 and 1 Blank 9 CFS
2 % 10 CFM
3 DEG F 11 LB/HR
4 DEG C 12 GAL
5 PSIA 13 AMPS
6 PSIG 14 IN HG
7 IN H2O 15 KLB/HR
8 GMP 16 - 255 Configurable
2VAA000844R0001 J K-1
Engineering Unit Descriptions Tables K. Console Engineering Unit Descriptions
K-2 2VAA000844R0001 J
ABB Inc. NOTICE
Document Number: 2VAA000844R0001 J

Power Generation This document contains information about one or more
Wickliffe, Ohio, USA ABB products and may include a description of or a ref-
erence to one or more standards that may be generally
E-Mail: powergeneration@us.abb.com relevant to the ABB products. The presence of any such
www.abb.com/controlsystems description of a standard or reference to a standard is
not a representation that all of the ABB products refer-
enced in this document support all of the features of the
described or referenced standard. In order to determine
ABB AG the specific features supported by a particular ABB
product, the reader should consult the product specifi-
Power Generation cations for the particular ABB product.
Mannheim, Germany ABB may have one or more patents or pending patent
E-Mail: powergeneration@de.abb.com applications protecting the intellectual property in the
ABB products described in this document.
www.abb.com/controlsystems The information in this document is subject to change
without notice and should not be construed as a com-
mitment by ABB. ABB assumes no responsibility for
any errors that may appear in this document.
ABB Pte. Ltd. Products described or referenced in this document are
Power Generation designed to be connected and to communicate informa-
tion and data through network interfaces, which should
Singapore be connected to a secure network. It is the sole respon-
E-Mail: powergeneration@sg.abb.com sibility of the system/product owner to provide and con-
www.abb.com/controlsystems tinuously ensure a secure connection between the
product and the system network and/or any other net-
works that may be connected.
The system/product owners must establish and main-
tain appropriate measures, including, but not limited to,
the installation of firewalls, application of authentication
measures, encryption of data, installation of antivirus
programs, and so on, to protect these products, the net-
work, its system, and interfaces against security
breaches, unauthorized access, interference, intrusion,
leakage, and/or theft of data or information.
ABB performs functionality testing on the products and
updates that we release. However system/product own-
ers are ultimately responsible for ensuring that any
product updates or other major system updates (to
include but not limited to code changes, configuration
file changes, third-party software updates or patches,
hardware change out, and so on) are compatible with
the security measures implemented. The system/prod-
uct owners must verify that the system and associated
products function as expected in the environment in
which they are deployed.
In no event shall ABB be liable for direct, indirect, spe-
cial, incidental or consequential damages of any nature
or kind arising from the use of this document, nor shall
ABB be liable for incidental or consequential damages
arising from use of any software or hardware described
in this document.
This document and parts thereof must not be repro-
duced or copied without written permission from ABB,
and the contents thereof must not be imparted to a third
party nor used for any unauthorized purpose.
The software or hardware described in this document is
furnished under a license and may be used, copied, or
disclosed only in accordance with the terms of such
license. This product meets the requirements specified
in EMC Directive 2014/30/EU and in Low Voltage Direc-
tive 2014/35/EU.
Copyright © 2014 by ABB.

All rights reserved.
Release: May 2017

Function Code Application Manual PDF

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Function Code Application Manual PDF

Uploaded by

Copyright:

Available Formats

Symphony Plus - Harmony

S+ Engineering for Harmony

Copyright © 2014 ABB.

All rights reserved.

Release: May 2017

1. Function Generator...................................................................................... 1-1

2. Manual Set Constant Signal Generator) .................................................... 2-1

3. Lead/Lag ....................................................................................................... 3-1

4. Pulse Positioner ....................................................................................... 4-1

5. Pulse Rate..................................................................................................... 5-1

6. High/Low Limiter.......................................................................................... 6-1

7. Square Root.................................................................................................. 7-1

8. Rate Limiter .................................................................................................. 8-1

9. Analog Transfer............................................................................................ 9-1

10. High Select ................................................................................................. 10-1

11. Low Select ...................................................................................................11-1

11.1 Applications .................................................................................................... 11-1

12. High/Low Compare .................................................................................... 12-1

13. Integer Transfer.......................................................................................... 13-1

14. Summer (4-Input) ....................................................................................... 14-1

15. Summer (2-Input) ....................................................................................... 15-1

16. Multiply ....................................................................................................... 16-1

17. Divide .......................................................................................................... 17-1

18. PID Error Input ........................................................................................... 18-1

19. PID (PV and SP).......................................................................................... 19-1

24. Adapt........................................................................................................... 24-1

25. Analog Input (Periodic Sample)................................................................ 25-1

26. Analog Input/Loop ..................................................................................... 26-1

30. Analog Exception Report .......................................................................... 30-1

31. Test Quality................................................................................................. 31-1

32. Trip .............................................................................................................. 32-1

33. 33 Not .......................................................................................................... 33-1

34. Memory ....................................................................................................... 34-1

34.1 Applications .................................................................................................... 34-1

35. Timer ........................................................................................................... 35-1

36. 36 - Qualified OR (8-Input)......................................................................... 36-1

37. AND (2-Input).............................................................................................. 37-1

38. AND (4-Input).............................................................................................. 38-1

39. 39 OR (2-Input) ........................................................................................... 39-1

40. OR (4-Input) ................................................................................................ 40-1

41. Digital Input (Periodic Sample)................................................................. 41-1

42. Digital Input/Loop ...................................................................................... 42-1

45. Digital Exception Report ........................................................................... 45-1

50. Manual Set Switch ..................................................................................... 50-1

51. Manual Set Constant ................................................................................. 51-1

52. 52 Manual Set Integer ................................................................................ 52-1

55. Hydraulic Servo.......................................................................................... 55-1

57. Node Statistics Block ................................................................................ 57-1

58. Time Delay (Analog) .................................................................................. 58-1

59. Digital Transfer........................................................................................... 59-1

61. Blink ............................................................................................................ 61-1

62. Remote Control Memory ........................................................................... 62-1

63. Analog Input List (Periodic Sample) ........................................................ 63-1

64. Digital Input List (Periodic Sample) ......................................................... 64-1

65. Digital Sum With Gain ............................................................................... 65-1

66. Analog Trend .............................................................................................. 66-1

67. Digital Exception Report with Alarm Deadband...................................... 67-1

68. Remote Manual Set Constant (REMSET)................................................. 68-1

69. Test Alarm................................................................................................... 69-1

79. Control Interface Slave.............................................................................. 79-1

80. Control Station ........................................................................................... 80-1

81. Executive .................................................................................................... 81-1

82. Segment Control ........................................................................................ 82-1