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An Active PFC Boost Converter Topology for

Power Factor Correction


Pratap Ranjan Mohanty Anup Kumar Panda Dhiman Das
Senior Member, IEEE

Department of Electrical Engineering, National Institute of Technology, Rourkela, India-769008

Abstract— This paper introduces a single-stage active delivered to the load is more than the real power that the load
power factor correction (PFC) AC-DC converter which absorbs.
provides almost unity power factor and minimizes the THD to
7.4 %. For a constant DC output voltage a single phase diode
bridge rectifier with a large output capacitor is considered in
this paper. This standard topology has a shortcoming of
introducing lower order harmonics and become cause of poor
power factor, which needs to be improved. MATLAB
Simulation software is used to simulate a simulation model of
350 W output for both passive and active PFC methods.
Simultaneously, the experimental prototype for 350W/390V
output with active PFC method is designed and experimental
results are verified.

Keywords— Power factor correction (PFC), Boost PFC


converter, Active PFC method, Passive PFC method

I. INTRODUCTION
Diode rectifiers is the most common useful means for
power conditioning and hence used in electronics utilities
designed for power distribution network. The rectifier unit
acts as nonlinear load and introduces lower order harmonics. (a)
The rectified sine wave voltage with large output capacitor
draws pulsating current with high amplitude from their
Voltage (volt)

200 Input Voltage


source, shown in fig. 1(b). Hence, based on the loading Output Voltage
condition the conduction angle differs. As a result, the input 0
current is non-sinusoidal and highly distorted with significant
number of lower order harmonics. This signifies that the -200
power factor is very poor [1-3] which is a major problem in 0.02 0.03 0.04 0.05 0.06
higher power level (200W to 500 W and higher). Time (sec)
50
Current (amp)

Therefore, the prime task is to improve the power factor Input Current
by making the source current sinusoidal with least current
harmonic in conformity to standards IEEE 519, IEC 1000-3 0
and IEC-6000-3-2 margins. To diminish the difficulties
defined above, power factor correction (PFC) circuits are
being increasingly used [4-6]. -50
0.02 0.03 0.04 0.05 0.06
In this paper, the work is concerned to the causes of input Time (sec)
current distortion and input power factor in single phase (b)
rectification with output capacitor. PFC methods based on
Fig. 1. (a) Full Wave Bridge Rectifier (b) Voltage and Current
passive and active topologies are discussed in this paper and Waveforms of Bridge Rectifier
by using active PFC topology the source current is made
sinusoidal with minimum THD and almost unity power Ideally, PF is cos Ф, that is for sinusoidal source voltage
factor. and source current. But in actual practice, the presence of
nonlinear load makes the source current non-sinusoidal and
II. SIGNIFICANCE OF POWER FACTOR hence, mathematically PF is:
PFC is the technique to make the line current sinusoidal PF = Kp cos Ф = [0,1] (1)
and in phase with line voltage with reduced input current where cos Ф is the displacement factor of line voltage
harmonics in order to meet the standard. Also, it can be said
that PFC is a procedure of neutralizing the unwanted effects
I1rms
and current. And Kp = is named as distortion factor,
of electric loads that create below unity power factor (PF < I rms
1). When PF is under unity value, the apparent power describes the harmonic limit of the current referred to

978-1-4673-6540-6/15/$31.00 ©2015 IEEE


fundamental. Again, the distortion factor is related to THD

Voltage (volt)
and is mathematically; 200 Input Voltage
Output Voltage
1 0
Kp = (2)
2
1 + THDi -200

where THDi is the total harmonic distortion and is defined 0.02 0.03 0.04 0.05 0.06
as: Time (sec)
2

Current (amp)
Input Current


n=2
I 2 n ,rms
THDi = (3)
I1, rms 0
High PF has the following advantages:
1. Reduced voltage distortion
2. Large active power -2
0.02 0.03 0.04 0.05 0.06
3. Least RMS current Time (sec)
4. Large number of load can be connected
(b)

III. TECHNIQUES OF PFC SCHEME Fig. 2. (a) Passive PFC Rectifier Circuit (b) Voltage and Current
Waveforms
Based on types of circuit elements used, PFC method is
categorized as “Passive” and “Active” PFC method. The In general, active PFC method comprises a suitable DC-
passive elements are only used in conjunction to the diode DC converter [4-6] in conjunction with the diode rectifier
rectifier in passive PFC method. In this, the simple approach operating with a suitable control technique. Considering the
is the addition of inductor and capacitor in conjunction with suggestion of author [4-7], a conventional boost converter is
the diode rectifier at source end or output end depending on taken in this paper for active PFC method since it has better
required features. efficiency and simple gate drive circuit. Fig. 3 represents a
conventional DC-DC Boost converter. The input current is
The diode bridge rectifier revealed in Fig. 2(a) with the continuous and smooth due to front end inductor of the
below specifications is simulated using MATLAB simulation boost converter. Since the name indicates, the converter has
software. V1=230Vrms 50Hz, load = 350 W, C0 =470 µF, an advantage of step-up conversion ratio and hence the input
and filter values La= 130 mH, Ld=200 mH, L3 =200 mH, current cross over distortion is limited.
C3=5.6 µF, L5=100 mH and C5=4.04 µF. The power factor
are obtained as PF=0.76 and input current THD is 13.78%. The diode is reverse biased during the ON-state of switch
Also, the output voltage (Vo) of 235 VDC is obtained. Passive and hence the output section is isolated. The boost inductor
PFC method is simple and rugged. But heavy and bulky size stores energy during ON period of switch. The output section
of filter and poor dynamic response of this method limit the receives the stored energy of the inductor and as well as the
scheme. Simultaneously, this method is deficit in voltage input supply energy during the OFF-state of the switch. An
regulation. Also, the fundamental line current may show a output capacitor is employed to ensure a constant output
significant phase shift even at reduced line current harmonic. voltage level. The following expression represents the
relation between the input and output voltage;
Vo T 1
= =
Vin Toff 1 − D
(4)
where D, is termed the duty factor of the switch and
mathematically, it is expressed as;
Ton
D= (5)
T
And
1
T=
f sw
(6)
where fsw is the switching frequency of the converter.
The basic circuit diagram for PFC with boost converter
is presented in fig. 4. Here, the output filter capacitor of
diode rectifier is eliminated and a boost converter along
with a filter capacitor is included with the rectifier unit. As a
result, the narrow current pulses due to output filter
(a) capacitor and the diode rectifier are avoided.
case of slight increase in load current, a drop in the load
voltage is observed accordingly. Within few cycle the load
voltage is required to be maintain to its desired DC level.
According to the equation (4), a large ON-time with constant
switching frequency have to be settled to attain the desired
regulated DC voltage and this is exercised by both the
control loop. The duty cycle and the ON-time recover to the
initial steady state within few cycle.
The above described required operation can be feasible
by a control IC, manufactured for PFC purposes. The prime
operational tool of the IC implementation are the voltage
and current sensing amplifiers, error signals processer and
Fig. 3. Conventional Boost Converter Topology generation of PWM control pulse for turn-on of Boost PFC
Considering equation (4), the switch ON-time ( ) is regulator. In this paper, a control IC, UCC28019 is
width modulated during the half sinusoid of input supply to employed for active PFC of 350 W/ 390 V AC-DC system.
crop constant DC voltage. Throughout this period a control The basic function of this IC is based on boost power factor
IC controls the ON time of switch. To maintain a selected correction. This control IC suitably works within the range
constant output voltage ( ), the control IC senses and of 100W to 2kW and over a wide-range general AC-line
compares it with a fixed reference value in a voltage error current. This controller is of 8- pin IC and the VSENSE pin
amplifier and generates a negative feedback signal to settle of the IC can be pulled down to below 0.77 V hence, the
the ON-time ( ). The switching ON-time is large at low controller can be worked at low power standby mode.
input sinusoid to boost the low input voltage and similarly, Additionally, this includes protection features like peak
current limit, open loop detection, soft-over current
the ON-time is comparatively small at high input sine-wave
detection, input brown-out detection, output under voltage
for maintaining constant DC voltage.
detection, and output over voltage protection.
Likewise, the ON-time of the same boost regulator is Simultaneously, this controller has important features like
width modulated to make the line current sinusoid shape. A universal off-line input voltage range, average current mode
negative feedback loop works to determine this ON-time. PWM control, a fixed oscillator frequency of 65 KHz,
This feedback loop generates an error voltage by comparing cycle-by-cycle peak current limiting, VCC under-voltage
the actual line current input to the reference current sine- lockout, enhanced dynamic response, soft-start and output
wave. The error voltage does the modulation of ON-time to of 350 W, 390 V. Fig. 4 represents the basic control diagram
enforce both the sine-waves to be in equal amplitude. for active PFC with UCC28019 respectively.
The same PWM technique [8] is used to keep the load
voltage constant and regulated during any load change. In

Fig. 4. Basic Control Diagram for Active PFC with UCC28019

to minimize the distortion and to make the power circuit


IV. DESIGN OF ACTIVE PFC CIRCUIT small. Based on the permissible level of high frequency
Some designing specification like the input voltage ripple current in the input the boost inductor value is chosen.
range, line frequency range, power output level, output
voltage limit are significant for designing of the active PFC In this paper, following equations are used for the
circuit and controller. In this paper, the specifications [9-10] selection of inductor.
are considered for the designing of active PFC circuit. In Vo − Vin
general, the output voltage is selected to keep at 5 to 10 D= (7)
percent higher than the peak input voltage. The switching Vin
frequency, fsw is chosen randomly which is high adequately
Vo D (1 − D ) voltage= 85VAC to 265VAC, Line frequency= 50Hz, Output
L( min ) ≥ (8) voltage= 390VDC, Power output= 350W, Switching
f SW I RIPPLE frequency= 65 kHz, unity power factor.
Output capacitor is designated based on the bellow
equation: TABLE I. MAJOR COMPONENTS AND THEIR DESINED
VALUES

⎛ 1 ⎞ Sl.No. Elements Selected Value


2 Po ⎜ ⎟ 1 CICOMP 1200pF
f
≥ 2 ⎝ 2 LINE ⎠
2 RISENSEfilter 221Ω
Co ( min ) (9) 3 CIN 0.33µF
Vo − V oHOLDUP( min ) 4 RSENSE 0.067Ω
5 CISENSEfilter 1000pF
The MOSFET and the diodes are used in this paper are 6 CVINS 0.68µF
7 RVINS1 6.5MΩ
based on the maximum current in the inductor and the
8 RVINS2 100KΩ
output voltage. The devices current rating is almost same to 9 RCV 33.2KΩ
the maximum current in the inductor and also, the devices 10 CV1 3.3µF
voltage rating is almost equal to the output voltage. Current 11 CV2 0.22µF
sensing resistor is used in ground return for current sensing. 12 CVSENSE 820Pf
13 RFB1 1MΩ
The controller IC, UCC28019 is used in this paper 14 RFB2 13KΩ
which works like switch-mode controller in Boost PFC 15 RGATE 3.3KΩ
operation. This IC provides a constant frequency of 65 kHz
and operates in continuous conduction mode. An internal TABLE II. A COMPARATIVE PERFORMANCE ANALYSIS
5V reference voltage is used for precise output voltage
Parameter Passive PFC Circuit (Simulated) Active PFC
regulation over typical 85 VAC to 265 VAC mains input Circuit
range. The system load can be within the range from 100 W With Output With Tuned Filter (Experimental
to 2 kW. Two loops are used to accomplish the regulation. Capacitor and Output Module)
The inner loop profiles the average input current to meet the (Without filter, Capacitor and
sinusoidal input voltage and simultaneously, the outer loop Fig.1) Load Side Inductor
(Fig.2)
guards the regulation of output voltage on pin VCOMP. The Line current 48A 1.7A 4A
internal gain parameters are governed at VCOMP to (Peak)
maintain a low-distortion steady-state input current wave. Output voltage 10.3V 6V 3.6V
ripple
The input capacitor is selected based on the equation: Power factor 0.42 0.974 0.99
Current THD 52.01% 13.4% 7.4%
I RIPPLE Voltage THD 14.8% 10.7% 3%
CIN = (10) Reactive power 0.742VAr 0.742VAr 0.986VAr
8 f SW VIN _ RIPPLE (max)
The sensing resistor is chosen considering the triggering
at 125% of maximum peak inductor current with least SOC
threshold, VSOC.
VSOC
RSENSE = (11)
I L _ PEAK (max)
RFB1 and RFB2 are the two resistors employed for voltage
feedback divider. RFB1 is the top voltage feedback divider
resistor and it is chosen as 1 MΩ value as suggested [7]. The
bottom voltage feedback divider resistor, RFB2 is selected
based on the equation:
VREF RFB1
RFB 2 = (12)
VO − VREF
Table I describes the major components and their Fig. 5 Experimental: Voltages and Current Waveforms of Active PFC
designed values used in this paper. with UCC28019 (Along Y-axis 5 amp/div is taken for current waveform and
50V/div is taken for voltage waveforms and Along X-axis 0.01 sec/div is
taken for all waveforms)
V. RESULT DISCUSSION
Fig. 6 describes the simulation result for passive PFC With this designed specification an experimental module
circuit of Fig. 2 and TABLE-II describes the comparative of an active PFC circuit is built. From TABLE-II, it is
performance of bridge rectifier with and without output observed that power factor is enhanced extremely to almost
capacitor. unity and also, the current harmonic is reduced significantly
by using the active PFC method.
Using the major components tabulated in TABLE-I the
active PFC circuit is designed with the specification: Line
Both the passive PFC method with tuned filter and the the active PFC scheme can be implemented for three phase
active PFC method improve the input power factor but a AC-DC system for power factor improvement. All together,
power factor of 0.99 (almost unity) is realized in this paper the reduction of filter size and the improvement of power
by active PFC method which is impossible in passive PFC density can be possible by using large switching frequency.
method. Considering the size, cost and number of circuit
elements are the main design concern, the active PFC circuit REFERENCES
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