Experiments on Analog System Design

Wave Shaping Circuits:

Tutorial I 1 week
Clipping and Clamping Circuits

Regulated Power Supply: Passive Filter

Tutorial II 3-Terminal IC voltage regulators 1 week

MOSFET Application Circuits:

MOSFET as a diode, Current mirror circuit and self
Tutorial III &IV biasing 2 weeks
Frequency response of RC Coupled amplifiers

Tutorial V Opamp basics 1 weeks

Linear Applications of OP-Amp:

Voltage to current converters, Integrators and

Tutorial VI &VII differentiators.

2 weeks
Active filters:
Low and High Pass Second order Butter worth filters

Nonlinear Applications of Op-Amp: Comparators,

Tutorial VIII 1 week
Schmitt trigger circuits.

Waveform Generators:
1
Tutorial IX Op-Amp based sine, square and triangular wave
week
generators

Tutorial X 555 Timer: Astable and Monostable operation 1 week

1
Evaluation Plan:

 Continuous Evaluation – 60%

o Preparation, Performance, Documentation, Assignment (60%)
 Test - 40%

References:
1) B Razavi, ‘Fundamentals of Microelectronics, 2nd Edition, Wiley India, 2013
2) A.S. Sedra & K.C. Smith, "Microelectronic Circuits", 6th Edition, Oxford Univ. Press, 2010
3) Sergio Franco, “Design with Operational Amplifiers and Analog Integrated Circuits”, TMH, 3e,
2005
4) James M. Fiore, “Op - Amps and Linear Integrated Circuits”, Thomson Learning, 2001
5) David A. Bell, “Operational Amplifiers and Linear IC’s”, 2nd edition, PHI/Pearson, 2004.

Common instructions for the lab:

1) Be present well before the lab session time

2) Labs are to be done in groups of two or three.
3) Come prepared with designs, circuit diagrams, and simulation for the given
tutorial.
4) Observation book should have neatly written objective, circuit diagram, design
calculations, all component values, and expected graph/result for the given
tutorial. This book has to be maintained till the end of the semester.
5) Get your results verified before leaving laboratory
6) Simulate the circuits using LTspice before coming to the lab.

7) Do not scribble on Digital Trainer Kit and Working table.

8) Refer to data sheet of electronic components (Web resources)

2
Course learning outcomes:

At the end of this course, students will be able to

1) Design and implement wave shaping circuit, regulated power supply and
amplifier circuit using discrete components.
2) Design and verify biasing, frequency response of MOSFET based circuits.
3) Design, implement and verify Opamp circuits for various linear and non linear
applications.

3
 INTRODUCTION TO ANALOG SYSTEM DESIGN LABORATORY
Objectives: To get familiarized with the discrete analog devices and measuring
equipment.

Resistors :

Black Brown Red Orange Yellow Green Blue Violet Grey White
0 1 2 3 4 5 6 7 8 9
Band Indicate (colour) first digit of resistor value
1

Band Indicate (colour) second digit of resistor value

2

Band Indicate (colour) multiplier as power of Ten= 10(colour No.)

3

Band Silver, gold and no band indicate 10%, 5% and 20% tolerance in magnitude
4 respectively

Capacitors:

Capacitors are most often marked without the use of the colour code. Small value
capacitors are often coded with a three digit code; eg. 102. This is the value of the
4
capacitor stated in Pico farads. The third digit states the number of zero's to be written
after the first two digits: 102 = 1000pf as shown above. Capacitors having a value of
about 0.47 microfarad or greater are often Electrolytic or Tantalum (polarized) types.
Polarized capacitors are marked with the correct polarity on the body of the component.
If two component leads are of different lengths then the longer of the two component
leads is usually the + (positive) terminal.
Diodes:
All the Diodes are similar in appearance,
but the body of the device is often made
of glass. Most diodes have only one band
around its body. This is used to identify
the Cathode (symbol K) terminal.

MOS Transistors:
MOS transistors have three regions labeled as drain, source and gate. There are two
classes of MOSFETs: N-channel and P-channel. Refer MOS transistor data sheet before
using them for their electrical properties.
Multi-meters: This meter is a dual display auto ranging professional measuring
instrument with 3 3/4 digits LCD, capable of performing functions:

 DC voltage: 326mV±0.5%, 3.26/32.6/326V±0.3%, 1000V±0.5%

 AC voltage: 3.26/32.6/326/700V±0.8%
 DC current: 0.326/3.26/32.6/326mA±1.2%, 10A±2.0%
 AC current: 0.326/3.26/32.6/326mA±1.5%, 10A±3.0%
 Resistance: 326Ω/3.26kΩ/32.6kΩ/326kΩ/3.26MΩ±0.8%,
32.6MΩ±1.2%
 Capacitance: 326nF/32.6uF±3.0%
 Frequency: 32.6KHz±1.2%, 150KHz±2.5%
 Diode check: check forward or reverse
 Transistor check: 1~1000
 Continuity check: Built in buzzer will sound
Max. Display / LCD size: 3260/30/60mm

Function Generator: Oscilloscope:

5
 Tutorial I
Wave Shaping Circuits

Objectives: To test clipping and clamping circuits.

Case 1: Demonstrate a positive and negative source signal clipping circuits to clip
the input AC waveforms in series and shunt ways. Use a DC source of 5V.

Design Steps: Use diode 1N4007, with maximum current IMAX=5mA along with a DC
source of VDC=5V
Use a sine wave source of 10V peak.
V  VDC 10  5
Maximum diode current IMAX=5mA= iMAX = Solve for R. R→1kΩ.
R R

Clipping Circuits:

VO
VO
R=1K 5V

Vi Vi R=1K
5V

Fig 1.1 Fig 1.2

Procedure:
 Place the components on bread board and connect them as shown in the above
circuit diagrams.
 Set the source to supply a sine wave of 10 V peak and 1 kHz frequency.
 Set the DC voltage to 5 V.
 Connect the input and output of the circuit to the two channels of the CRO to
observe the input and output waveforms. Measure the voltage amplitude,
clipping voltage using CRO (Note: Both the channel ground should be
common).
 Set the CRO to display in XY mode to observe the transfer characteristics (both
the channels are set to same attenuation factor).
 Draw the observed waveforms.
6
Case 2: Design a clipper circuit to clip the input signal between two independent
levels (VR1=5V> VR2=2V).

Design steps: Use R=1K and Vi=10sin (2000 t)

D1 D2
VR1=5V

vi
VR2=2V
V0

Fig 1.3

Procedure:
 Connect the circuit on the breadboard as shown in the above circuit diagram.
 Set the source to supply a sine wave of 10 V peak and suitable frequency.
 Connect the input and output of the circuit to the two channels of the CRO to
observe the input and output waveforms. Measure the voltage amplitude,
clipping voltage using CRO.
 Set the CRO to display in XY mode to observe the transfer characteristics.
 Draw the observed output waveforms. Also plot the transfer characteristics
between output and input voltages.

7
Case 3: Demonstrate the signal clamping circuits to clamp the input square
waveforms. Use a DC source of 3V.

Study of clamping circuits

Vo Vo
0.47uF 0.47uF

Vi Vi

3V 3V

Fig 1.4
Procedure: Fig 1.5

 Connect the circuit on the breadboard as shown in the above circuit diagrams.
 Set the source to square wave with amplitude of 10V P-P and frequency of 1
kHz.
 Observe the input and output waveforms on CRO (in DC mode only).
 Draw the observed input and output waveforms.

Inference:

The clipper circuits, clip off some part of the waveform depending on the applied
reference voltage. Clipping circuits do not require energy storage elements. These
circuits can also be used as sine to square wave converter at low amplitude.

In clamping circuits, the waveform gets shifted to either positive side or negative side,
depending on the placement of Diode.

Conclusion:

Assignments:

1. Simulate all the circuits in tutorial 1 (Figure 1.1 to Figure 1.5) using LTspice
schematics. Perform the time domain (transient) analysis. Compare the test and
simulated results.
8
 Tutorial II

Regulated Power Supply and IC Voltage Regulator

Case(i)
Objectives: To test full wave rectifier with and without capacitor filter

Test a full wave rectifier with and without capacitor filter circuit to regulate the
DC output voltage from a single phase 230V, 50Hz AC supply using 230/12V
transformer. Use different capacitor values to observe the output waveform.
Calculate ripple factor.

230V, 1
50 Hz AC  
A 
V
C
RL
230/12V

Fig 2.1

Calculations without filter:

V 2V
Vrm s  m ; Vac  (Vrms  Vdc ) ; Vdc  m ;
2 2

2 

2
Vrms
Ripple factor (theoretical) = 2
 1  0.48
Vdc

Calculations with filter:

9
 1
Ripple factor with Capacitor filter= ; where f=50 Hz.
4 3 fCRL
Procedure:
 Connect the circuit as shown in Figure 2.1, without capacitor C and with resistor
100 ohm.
 Using a CRO, measure the maximum voltage Vm of the AC input voltage at the
rectifier input (across secondary windings of transformer) and AC voltage at the
output of the rectifier.
 Using a DC voltmeter, measure the DC voltage at the load resistance.
 Observe and plot the Waveforms at the secondary windings of transformer and
across load resistance.

Observations:

Ripple factor
Vdc Vac IL RL (ohm) =
Practical
(Volts) (Volts) (mA) Vdc/IL Theoretical
Vac/Vdc
Without C
filter
C=220F

C=470F

Inference: The rectification efficiency of full-wave rectifier is double of that of a half

wave rectifier. Average DC output voltage level of the rectifier can be increased by
connecting a suitable smoothing capacitor across output of the bridge.

Conclusion:

10
 Case (ii):

Objectives: To design and test IC based variable voltage regulators.

To design an adjustable voltage regulator using 7805 and LM317 for the following
specifications:

Output voltage Vo=9 to 15 V Output current Io=150 mA max (for 7805)

Output voltage Vo =3 to 15 V Output current Io=150 mA max (for LM317)

78XX
LM 317
R1
I2 I1 R1
Iadj I1
VDC RL VDC
R2 + RL +
R2
V V
I1+I2 I1+Iadj
- -

Design hints:

Vo = Vref (1+(R2/R1)) + IADJ R2

For 7805, Vref=5V, and IADJ =4.3mA as I2.

11
Assume:R1 as 1K and RL=1KΩ (avoid heating of regulator),
(VO  Vref ) R1
To calculate R2= ; R2min=430Ω ; R2max=1.075k Ω;
Vref  R1 I adj

Hence R2=(1kΩ pot+330Ω).

For LM317, Vref =1.25V and IADJ=100A.

With R1 as 1K; R2Min=1.296kΩ; R2Max=10.185kΩ.
Hence R2=(10kΩ pot +1 kΩ).

Procedure:

 Vary the resistance R2 to note down the corresponding change in the ouput
voltage.

Observations:

Input Voltage Vin =18V Input Voltage Vin = 18V

Resistance Output Voltage Resistance Output Voltage

R2 () V0 (V) R2 () V0 (V)

Inference:
In case of linear IC voltage regulators, output voltage is always less than input voltage.
Efficiency of linear IC regulators is high, if the difference between input and output
voltage is low.

Conclusion:
12
Assignment:

1. Suggest suitable modifications if the ripple factor  2%, with RL=100Ω and
VDC=15V.
2. Calculate the maximum power dissipated in each of the voltage regulator cases.
Hence suggest suitable issues to be kept in view if the same is to be used for
higher power applications.
3. Verify the experiment results of all the above circuits by simulating circuits
using LTspice.

13
 Tutorial III
MOSFET Application Circuits

Objectives:
 To understand the principle of operation of MOSFET diode connection and current
mirror circuit.
 To study self-bias

1. Design and implement a diode connection of MOSFET (2N7000) with ID=1mA.

Using this realize a 1mA current source (current mirror circuit).

VDD=12V

RD1=10K RD2
VDD=12V

RD1=10K

M1 M2

M1

Figure 5.2(a) Figure 5.2(b)

Design steps:
Assume VDS=VGS=2V (Refer to data sheet for valid assumption). Since RD1=10kΩ, we
get ID1=1mA=(VDD-VGS)/RD1.

Current mirror circuit:

VDS1=VGS1=VGS2=2V. Select different value of resistors RD2 and measure ID2 (ie.
4.7kΩ, 5.6kΩ, 6.8 kΩ, 8.2kΩ and 10kΩ).

14
Procedure:
 Rig up the circuit as shown in Figure 5.2(a) and select VDD=12V.
 Measure the voltage drop across RD1 and calculate ID1=(VDD-VGS)/RD1.
 Connect the circuit as shown in Figure 5.2(b)
 Measure the voltage drop across RD2 and calculate ID2=(VDD-VGS)/RD2 for
various values of RD2.

Observation (Table 5.1):

RD2 VRD2 ID2=(VRD2/RD2)

4.7 kΩ
5.6 kΩ
6.8 kΩ
8.2 kΩ
10 kΩ

Inference: The current mirroring is dependent upon the matching of the transistors.
Often the transistors need to be on the same substrate if they are to accurately mirror the
current. Also since output impedance is not infinite current varies with change in output
voltage.

Conclusion:

2. Design a MOSFET self-bias circuit for the following specifications:

Assume ID=10mA and VGS=1.56 V (Refer data sheet of MOS 2N7000)

Procedure:

 Switch on the power supply to MOSFET transistor drain circuit and set it to
20V.
 Measure biasing voltages and current VDS, VS, VG, VGS and ID.

15
 +20V

2K
4.7K

G M1

2.2K
470

Fig Q 4.1

Observations:

Voltage Theoretical Practical

VDS 5V
VS 5V
VG 6.26V
VGS 1.56V
ID 10mA

16
 Tutorial IV
MOSFET Application Circuits

Frequency response of RC coupled amplifier.

Objectives:
To design and test common source R-C coupled Amplifier circuit to meet the given
specifications

Design a common Source R-C coupled amplifier for the following specifications
VDD: 20V, bandwidth: 100Hz to 20 kHz, Gain: 30 dB (Approx.) and hence measure
the input and output resistance of the circuit

Design Steps: Vcc

RD
R1
Co
Cin
2N7000

Vs R2 C1
RS CS RL

Fig 5.1

From the Data sheet of N channel MOSFET 2N7000 Pm=350mW, gm=30mA/V,

IDmax=270mA; rds=100 kΩ.
To work MOSFET as amplifier the operating point should be in saturation region of
output characteristic. Select ID=10mA corresponding VGS=1.56V, Supply voltage
Vcc=20V and load resistance RL=100kΩ. Expected gain at mid band is 30.
V
Av  O  g m ( RD // RL // rds )
Vi
Solve the equation to get RD=1 KΩ;
Voltage drop across RD is VR D  I D RD  10V
Select as VDS=5V and VS=5V (as a thumb rule in amplifier design)
VS  I S RS  5V
RS  470 

17
VGS  VG  VS  VG  VGS  VS  1.56  4.7  6.26V  6.3V
Consider voltage divider biasing. Select current I1=I2=3mA (Device requirement)
VG  I 2 R2  R2  2.2k and VR1  VDD  VG  I1 R1  13.7V  R1  4.7k

Selection of Capacitors:

Coupling capacitor Cin, Co and Source bypass capacitor Cs affects lower cut off
frequency

At lower cut off frequency | X Cin | Ri  R1 || R2  1.5k

1
| X Cin |  Cin  1.1F (Hence connect two 2.2µF capacitors in series)
2f L Cin

CO

gmvgs RL
ro//RD

At high frequency where CO can also be represented by a short circuit, the output power
to load resistor RL is Pout= VD2 / RL. At low frequencies where the reactance XCO of
capacitance CO is not negligible, Pout is cut in half when XCO=RL. Thus the lower half-
power point for drain circuit occurs at frequency:
1
fL  ; CO=15.9nF (Connect three 4.7nF capacitors in Parallel)
2RL CO

To avoid the gain reduction (reduce the effect of Cs on low cut off frequency)

| X CO | 0.01RS  C S  330 F

By pass capacitors affect the upper cut off frequency. The stray capacitance across the
MOS FET terminals (by pass capacitor) are negligibly small and higher cut off
frequency due to this is very large. Hence upper cut off frequency is majorly affected by
the bypass capacitance C1.

18
 1
| X C1 | ( RD || RL || rds )  1k  C1   7.9nF
2f H ( RD || RL || rds )

(Connect two 4.7nF capacitors in Parallel across the load resistance RL)

Component values (Table 4.1):

R1 R2 RD RS RL Cin CS CO C1

Precautions:
 The signal generator must be kept at minimum output position.
 The power supply to the transistor drain circuit must be kept at minimum output
position.
 Do not apply the input signal to gate without biasing.

Procedure:
 Switch on the power supply to MOSFET transistor drain circuit and set it to
20V.
 Measure biasing voltages and current VDS, VS, VG, VGS and ID.
 To find the signal handling capacity of the amplifier, switch on the input
signal source.
 Keep the signal frequency at 2 kHz. Increase the amplitude of the input sine
wave and observe the output voltage signal. Note the maximum value of the
input voltage beyond which the output waveform getting distorted, which is
the maximum signal handling capacity.
 Set the input signal amplitude at a constant value below the maximum signal
handling capacity.
 Verify the mid band gain, Cut off frequencies to confirm the circuit
functioning.
 Record the output wave amplitude over a frequency range of 50Hz to 200
KHz, in steps, to calculate the gain.(Take more readings close to cut off
frequency)
Observations:
19
Biasing voltages (Table 4.2): Without applying input sine wave

Voltage Theoretical Practical

VDS 5V
VS 5V
VG 6.26V
VGS 1.56V
ID 10mA

Frequency response (Table 4.3):

Maximum signal handling capacity = mV
Input signal amplitude = mV

Trial Frequency Output voltage Voltage gain Gain in dB

No. (Hz) (Vo) Av=Vo/Vi = 20 log (Av)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

Inference:

20
Common emitter has a gain greater than unity. Frequency response of RC coupled
amplifier is limited by the reactive element (here capacitive). If amplifier circuit is made
up of resistors only, there should be no limits to the frequency response.

Conclusions:

Assignment:
1. Design a common Source R-C coupled amplifier for the following specifications
Vcc: 20V, bandwidth: 1kHz to 500 kHz, Gain: 30 dB (Approx.).
2. Plot frequency response of the MOSFET based RC coupled amplifiers designed
using LTspice.

21
 Tutorial V
Linear Applications of Op-amp
Objectives:

 To design, test an inverting and non-inverting Amplifier

 To measure the slew-rate and CMRR of operational-amplifier

1. Design and test op-amp based inverting and non-inverting amplifier circuits for a
closed loop gain of 8.
RF RF

R1 R1
2 2
7 7
741
741 Vs 741
741
4 6 4 6
3 3

Vs

Fig. 5. 1. B
Fig. 5.1.A

Sl. Feedback Resistance in phase Output voltage Voltage gain Av=Vo/Vi

No. ohms shift (Vo) Th. Pr.
Non-Inverting Amplifier

Inverting Amplifier

22
2. Determine the Slew Rate.
RF

R1
2
7
741
741
Vs 4 6
3

Fig 5.2

Procedure:
 Set the input source Vs for small rise and fall times (fs about 5KHz).
 Adjust the time-base of the oscilloscope so that only one changing edge of the
output waveform Vo can be viewed, so that the change in voltage ΔVo and the
change in time Δt are clearly noticed. Use these values to calculate the slew rate
S=Δ Vo/ Δt. Volts/ sec.
 Calculate the maximum frequency limit (for sine wave inputs) imposed due to
the slew rate of the op-amp using the equation.
 f s (max)= S / (2**peak value of the output voltage wave form)
 Also at any frequency (say at 10KHz) and a definite gain the maximum value of
output voltage (Undistorted)Vmax = S/(2** f s ) V.
 Practically verify f s (max) and Vmax.

Slew rate of the given Op-amp is:

Maximum value of undistorted output voltage at 10 kHz is:

Results & Comments:

23
3. Design and test a Voltage to Current converter with grounded load and study the
suitability of this circuit for current source applications

R4
Note:
R3 Resistors R4/R3= R2/R1;
2 7
6 Also say R4=R3=R2=R1=R=15KΩ=>
3 vo
4 IL = Vi/R
R1
VL

vi + R2
IL RL

Fig.5. 3

RL=10K Vi=10V

Theoretical Practical Theoretical Practical

Vi IL Vi VL IL RL IL RL VL IL
(V) (mA) (V) (V) (mA) (KΩ) (mA) (KΩ) (V) (mA)

4 4 1 1
6 6 3.3 3.3
8 8 4.7 4.7
10 10 8.2 8.2
10 10

Procedure:
1. To understand the voltage to current conversion
 Vary Vi from 4 V to 10 V, Keeping RL constant
 Measure VL to find variations in IL

2. To understand the current source behaviour of V to I Conversion

 Keep Vi constant and vary RL
 Measure VL and hence calculate IL
Observations/Conclusion:

24
Assignment Questions:

1. Design a differential amplifier with the following performance requirements and

determine CMRR.
• Magnitude of the voltage gain ≈ 5
• Input resistance seen by each source ≈1 kΩ

2. Design and test an Op–amp based circuit of Fig. 5.4 to estimate and hence verify
the voltage VBC

5k

10k
7 B
6
10k
4
vs 10k 15k

10k
C

Fig 5.5

25
 APPENDIX-A
List of components available in the ASD Laboratory
Low Power Resistors
4.7ohm 10ohm 33ohm 47ohm
100ohm 150ohm 180ohm 220ohm
330ohm 470ohm 560ohm 680ohm
820ohm 1kohm 1.2kohm 1.5kohm
1.8kohm 2.2kohm 3.3kohm 4.7kohm
5.6kohm 6.8kohm 8.2kohm 10kohm
¼W
12kohm 15kohm 18kohm 22kohm
33kohm 47kohm 56kohm 68kohm
82kohm 100kohm 120kohm 150kohm
180kohm 220kohm 330kohm 470kohm
560kohm 820kohm 1Mohm
4.7ohm 10ohm 33ohm 47ohm
100ohm 150ohm 180ohm 220ohm
330ohm 470ohm 560ohm 680ohm
820ohm 1kohm 1.2kohm 1.5kohm
1.8kohm 2.2kohm 3.3kohm 4.7kohm
1W 5.6kohm 6.8kohm 8.2kohm 10kohm
12kohm 15kohm 18kohm 22kohm
33kohm 47kohm 56kohm 68kohm
82kohm 100kohm 120kohm 150kohm
180kohm 220kohm 330kohm 470kohm
560kohm 820kohm 1Mohm
5W 10ohm 33ohm 47ohm 100ohm
Potentiometers
100ohm 1kohm 10kohm 25kohm 100kohm
Electrolyte Capacitors
2.2μf/63v 4.7μf/63v 10μf/63v 22μf/63v 47μf/63v
100μf/63v 220μf/63v 330μf/63v 470μf/63V 2200μf/63v
Ceramic Disc Capacitors
2.2kpf 3.3kpf 4.7kpf 100kpf 0.001μf
0.01μf 0.1μf 0.022μf 0.22μf 0.047μf 0.47μf
Low Power Diodes
IN4001 IN4007 BA159
3- Terminal Voltage Regulator IC’s
26
7805 7812 7815 7905 7912 7915 317
OP-Amp / Timer IC’s
741

Ground 1 8 +Vcc

Trigger 2 7 Discharge
555
Output 3 6 Threshold
Reset 4 5 Control voltage

Pin diagram of 555

Fig.5.2.A

27