Session 13

Introduction to Field Effect

Transistors (FET)
Electronic Components and Circuits
Enrique San Millán / Celia López
 Field Effect Transistors FET
OBJECTIVES
• To know the structure of the device and the transistor
effect
• To know and distinguish different FET transistor types
• To understand the current-voltage characteristic of the
device
• To identify the operating regions
Cut-off, Saturation, Ohm (triode)
• To analyze FET circuits basic cases in DC
• To know small-signal model for FET transistors

UC3M 2010 CCE - Session 13 2

 Field Effect Transistors (FET)
Types Mode Channel
MOSFET Enhancement/ Channel N (or N-MOS)
(Metal-Oxide Semiconductor FET) Accumulation Channel P (or P-MOS)

Depletion Channel N (or N-MOS)

Channel P (or P-MOS)
JFET Junction Channel N
(Joint FET) Channel P

Basic characteristics

Unipolar: only one carrier type (electrons in N-channel and holes in P-
channel)

Control of Current (I) through Voltage (V) (BJT devices control I through I)

Three terminals:

Source (S): provides carriers

Gate (G): controls carriers flow

Drain (D): receives carriers

UC3M 2010 CCE - Session 13 3

 Structure of Channel-n
Enhancement MOS Transistor
D G S
Oxide
Metal
(SiO2)

Drain
region
n+ n+ Drain (D)
Gate (G) Source (S)
L Metal Oxide
Source
(SiO2)
p-type region
substrate
(Body) Channel Channel
region n+ n+
region

p-type L
B substrate
(Body)

D D D D Body (B)

G B G B G G B

S S S S

UC3M 2010 CCE - Session 13 4

 n-MOS Transistor Operation
G
induced
n-type S
D VGS
channel

+u +u

e- e-
e- e- B
p-type substrate
GND

G VDS
D iD VGS
iG = 0 S
iS =iD

+u +u

iD
induced
n-type channel
B
p-type substrate
GND

UC3M 2010 CCE - Session 13 5

 n-MOS Operation: Triode region
iD (mA) vGS = Vt+2 V
0,4
vGS = Vt+1,5 V
0,3

vGS = Vt+1 V
0,2

vGS = Vt+0,5 V
0,1

vGS ≤ Vt

G 0 50 100 150 200 vDS (mV)

D VGS VDS (small)
iD S
iG = 0
iS =iD

+u +u

iD
induced
n-type channel
B
p-type substrate

GND

UC3M 2010 CCE - Session 13 6

n-MOS Operation: Saturation region
iD

Triode Saturation
vDS<vGS - vt vDS ≥ vGS - vt

vGS > vt

G
VDS vDS
D VGS vDSsat = vGS - vt
iD S
iG = 0
iS =iD

+u +u

iD
n-channel

B
p-type substrate

GND

UC3M 2010 CCE - Session 13 7

 Current-Voltage Characteristic
iD (mA)
vDS<vGS - vt vDS ≥ vGS - vt
iD Triode Saturation region
iG = 0 + region
VDS
- 2,0 vGS = Vt+2,0
+
VGS iD = iS vDS= vGS - vt
1,5
-
vGS = Vt+1,5
1,0
vGS = Vt+1,0
0,5
vGS = Vt+0,5

0 1 2 3 4 vDS (V)

Triode region vGS ≤ Vt (cutoff)

[
i D = K 2 (V GS − V t )V DS − V DS
2
]

Saturation region (ID does not depend on VDS) 1 W
K= µ nCox
2 L
iD = K (VGS − Vt ) 2

UC3M 2010 CCE - Session 13 8

 Output Characteristics: Saturation
iD (mA)

2,0

1,5

vDS ≥ vGS - vt
1,0

0,5

0 0,5 1 1,5 2 2,5 3

vGS (V)
vt

Saturation region (ID does not depend on VDS)

iD = K (VGS − Vt ) 2
UC3M 2010 CCE - Session 13 9
 Current-Voltage Characteristic
Triode Saturation region
iD
region

vGS = Vt+2,0V

Slope = 1/ro
vGS = Vt+1,5V

vGS = Vt+1,0V

vGS = Vt+0,5V

vDS
-VA = -1/λ
vGS ≤ Vt (cutoff)

VA is the channel modulation voltage, producing a similar effect to the Early voltage in BJT
devices.
If we consider this effect then:
iD = K (VGS − Vt ) 2 (1 + λVDS )
UC3M 2010 CCE - Session 13 10
 p-channel MOSFET (P-MOS)
Source (S) Drain (D) Drain (D)
Gate (G) Gate (G) Source (S)
Polysilicon Gate
Oxide

Thick
SiO2
n+ n+ (isolation) p+ p+

n-well
p-type body

S S
S

In enhancement p-mos there is a G B

G B G

channel if: V GS ≤ V t < 0

V DS ≥ V GS − V t triode region S
S D D

V DS ≤ V GS − V t saturation region G B

UC3M 2010 CCE - Session 13

11
 Depletion MOSFET
Equivalent behavior to enhancement MOSFET devices, except for

Manufactured channel:

When VGS<0 channel is reduced (e- leave Gate region)

When V GS ≤ V t < 0 channel disappears (cut-off region)

iD (mA) Triode Saturation region

D
region vDS ≥ vGS - vt
D
vDS<vGS - vt
36 vGS = 2V (Vt+6)
32 G
G B
28 vDS= vGS - vt
24 vGS = 1V (Vt+5)
S
S
20

16 vGS = 0V (Vt+4)
D
12

8 vGS = -1V (Vt+3)

G B
vGS = -2V (Vt+2)
4
vGS = -3V (Vt+1)
S
0 2 4 6 8 10 12 14 vDS (V)
vGS ≤ -4 V (Vt)

UC3M 2010 CCE - Session 13 12

 Summary

In enhancement n-MOS there is a
In enhancement p-MOS there is a
channel if: V GS ≥ V t > 0 channel if: V GS ≤ V t < 0
V DS ≤ V GS − V t in triode region V DS ≥ V GS − V t in triode region
V DS ≥ V GS − V t in saturation region V DS ≤ V GS − V t in saturation region
iD
p-channel p-channel n-channel n-channel
enhancement depletion depletion enhancement

0 vGS

In depletion n-MOS there is a
In depletion p-MOS there is a

channel if: V GS ≥ V t , V t < 0 channel if : V GS ≤ V t , V t > 0
V DS ≤ V GS − V t in triode region V DS ≥ V GS − V t in triode region
V DS ≥ V GS − V t in saturation region V DS ≤ V GS − V t in saturation region
UC3M 2010 CCE - Session 13 13
 Junction Field Effect Transistor (JFET)
Drain Drain

N channel P channel
n-type p-type
Drain
Drain

Channel
Gate

p-type
Gate

Channel
Gate

Gate

n-type
Gate
Gate

Source Source
Source
vDSsat= vGS - vp Source

IDS IDS
2 2
iD = K (VGS − V p ) , K = I DSS / V p Triode region Saturation region vGS0 = 0
2
 VGS 
iD = I DSS 1 − 
 V  vGS1 = VGS0
 p 
Saturation vGS2 = VGS1
region
vGS3 < VGS2
Triode
Cutoff region region Cutoff region vGS4 < VP VDS
vGS
vp
UC3M 2010 CCE - Session 13
14
 DC bias point:
Load line
ID Triode Saturation
vGS = VDD

vGS > V1B

VDD

RD C vGS = V1B
B
vo = vDS Load line
slope = -1/RD
v1 Q
+ IDQ
vGS < V1B

vGS=v1 - vGS = V1Q

A vGS = …
vDS =vo
0 VOC VOB=VIB-VIt VOQ=VDSQ VDD

UC3M 2010 CCE - Session 13

15
 FET transistor as amplifier:
vo
Q1 Q1 in Q1
cutoff saturation in triode region

VDD
X A
Slope at Q = voltage gain

vO

VOQ=VOQ Q Time

B
VOB
C
VOC
Vt VIQ VIB=VOB+Vt VDD vi
vi

UC3M 2010 CCE - Session 13 16

 Small-signal model
G D G D
+ +
vgs gmvgs vgs gmvgs ro
- -

S S
iD (mA)
vDS<vGS - vt vDS ≥ vGS - vt
Triode Saturation Triode Saturation

2,0 vGS = Vt+2,0

iD

vDS= vGS - vt vGS = Vt+2,0V

1,5
vGS = Vt+1,5 Slope = 1/ro
1,0
vGS = Vt+1,5V
vGS = Vt+1,0
0,5 vGS = Vt+1,0V
vGS = Vt+0,5 vGS = Vt+0,5V

vDS
0 1 2 3 4 vDS (V) -VA = -1/λ
vGS ≤ Vt
vGS ≤ Vt (cutoff) (cutoff)

UC3M 2010 CCE - Session 13 17

 Small-signal parameters
G D
+
vgs gmvgs ro
-

iD S

In MOSFETs
An almost
linear segment Slope = gm ∂iD
id gm = = 2 K (V GS − V t )
∂ V GS v ds =V DSQ
Q t
ID

In JFETs
∂iD I DSS  V GS 
0 vt vGS gm = = −2 1 − 
vOV ∂ V GS Vp  Vp 
vgs v ds =V DSQ  

UC3M 2010 CCE - Session 13 18

 Small-signal parameters
G D
+
vgs gmvgs ro
-

1 ∂iD I
Triode Saturation = ≈ λI D = D
iD
ro ∂ v DS VA
vGS = Vt+2,0V

Slope = 1/ro
vGS = Vt+1,5V VA
ro =
vGS = Vt+1,0V ID
vGS = Vt+0,5V

vDS
-VA = -1/λ
vGS ≤ Vt
(cutoff)

UC3M 2010 CCE - Session 13 19

 Exercise:
Operation regions. Saturation
VDD= 10 V
EXAMPLE
|Vt| = 2 V ID
R
L=10um
W=100um VD

λ=0
2
µ n C ox = 20 uA / V

a) Design the circuit in order to obtain a ID=0.4mA

b) Calculate the value of R and voltage VD for that value of current

UC3M 2010 CCE - Session 13 20

 Exercise:
Operation regions. Triode region

VDD= 5 V
EXAMPLE

VDD = 5 V ID
R

K = 0.5 mA/V2

|Vt| = 1 V VD = 0,1 V

a) Design the circuit for obtaining VD=0.1V

b) Calculate the equivalent resistance of the transistor in this case

UC3M 2010 CCE - Session 13 21

 Proposed exercise
VDD= +10V
Example

K = 0.5 mA/V2
RD = 6 kΩ
RG1 = 10 MΩ
|Vt| = 1 V

RG2 = 10 MΩ
RS = 6 kΩ

a) Analyse this circuit and calculate the voltage in every node and
the current in every line
b) Obtain the equivalent small-signal circuit

UC3M 2010 CCE - Session 13 22