Iterative Architecture AES

for Secure VLSI based System Design

A Summer Internship project report submitted to AP IIIT, RGUKT, RK Valley

in successful completion of the summer internship project in the degree of Bachelor of Technology
in
Electronics and Communication Engineering

Done By

Y.Narasimha Sai

R141295

Under the guidance of

Mr .Kartheek

At 1000KV TECHNOLOGIES

1
 DECLERATION BY STUDENT

We certify that,
As a part of our 4th year academic curriculum, I joined under the guidance of
Mr.Kartheek (Project Guidance) at 1000KV TECHNOLOGIES for our Summer Internship project
program of 2019-2020. Duration of Summer Internship project is 13/05/2019 to 24/07/2019. In this
Summer Internship project,I developed our knowledge and practical experiences. This is our
original work and it has been out presented earlier in this manner. This information is purely
academic interest.

Y.NARASIMHA SAI
ID.NO: R141295

2
 CERTIFICATE

This is to certify that 1000KV TECHNOLOGIES embodies the original work done by
Y.NARASIMHA SAI during this Summer Internship project submission as a partial fulfillment of
the requirement for the System Design Project of Masters of Electronics and Communication
engineering 4th year, In the semester of the Rajiv Gandhi University of Knowledge and
Technologies.

Internal guide Head of the Department

Lecturer Head & Asst.Professor
ECE Department ECE Department
RGUKT, RK- Valley RGUKT, RK- Valley

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 ACKNOWLEDGEMENT

Every successful task involves the support of many intellectuals and their encouragement of
knowledge for us. The word thanks would really be small to express our gratitude, yet this is all we
can do. We deeply express our acknowledgements to all the people who directly or indirectly helped
in our endurances. It is pleasure to us to add heart full words for the people who were part of this
training in numerous ways and gave us their never ending support right from the stage the training
was conceived.

We wish to express our deep sense of gratitude to Dr.Mr. Sudharshan Rao, Director of RK Valley,
for their consistent help and encouragement.

At the outset, We sincerely acknowledge my sense of gratitude to our Head of the Electronics
&Communication Engineering department Asst Prof Mr. A. SREEKANTH REDDY for his
encouragementand co-operation in carrying out the project work.
We take this opportunity to express our deep sense of gratitude and indebtedness to our guide
Mr.Chandra Reddy Lecturer,Department of ECE for those valuable support,suggestions and
constructive criticisms throughout 3rd year Internship project.

I thank Mr.Kartheek, Project Co-ordinator, of 1000KV TECHNOLOGIES for permitting to do

internship training and took keen interest on us and encouraged us in every effort.

It is my pleasure to express thanks to all who have some way or the other helped to complete this
project.

Finally, I thank my parents, friends and well wishers, without whom I would not have achieved
anything inmy life.

Above all, it is true that the grace and blessing of God the Almighty that made this endeavor a
success.

Y.NARASIMHA SAI (R141295)

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Chapter Page.No

ACKNOWLEDGEMENT I

ABSTRACT 1

TABLE OF CONTENTS

LIST OF FIGURES

Chapter I

1.1 Cryptography Basics:

1.2 Symetric Encryption

1.2.1Evaluation Criteria and Final Score of AES Finalist Algorithms

1.2.2Comparison betweendifferentAES Finalist Algorithms

1.3 Advanced Encryption Standard

1.3.1.THE AES CIPHER

1.3.2 AES Algorithm

Chapter II

2.1 Brief History of AES

2.2 Complete View of AES Algorithm

2.2.1. Main Program

2.2.2 Key Expansion

2.2.3 AddRound Key

2.2.4 Middle Rounds

2.2.4.1 SubBytes

2.2.4.2 ShiftRows

2.2.4.3 MixColumns

2.2.5 Final Round

Chapter iii

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 ii) Results

iii) Reports

Chapter IV

i) Applications

ii) Advantages

iii) Disadvantages

iv) Conclusion

list of Figures

Fig 1

Fig 2a

Fig 2b

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Fig 3

Fig 4

Fig 5

Fig 6

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 ABSTRACT

In this digital age of communication, private and confidential data is exchanged over internet and
stored in digital mediums. This data is constantly under increasing threat. Encryption is one of the
techniques to protect sensitive data. AES is considered to be one of most capable encryption
algorithm in cryptography.Advanced Encryption Standard (AES) is the standard for secret key
encryption. The goal of AES is to achieve secure communication. And it is based on design
principle known as substitution and permutation network. as this is 128 bit AES algorithm since it
will accepts 128 bits of plaintext and master key of size128 bits. The 128 bits cipher text block is
produce after the plaintext block is processed by round function number of times. This algorithm
uses a combination of Exclusive-OR operation (XOR), Substitution with S-Box, Row and Column
rotation and a Mix column. Plaintext, ciphertext and intermediate state block can be depicted as 4*4
matrix form. In this paper, in the proposed work present the details of the 128 bits AES Encryption
and Decryption structure and conduct a fault injection attack against the unprotected AES. The
methodology to be employed is Verilog HDL.

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 Chapter 1
1.1 Cryptography Basics:
Cryptography is usually referred to as “the study of secret”. Before one can begin to understand
cryptography, there are several key concepts that must be understood. Firstly, there are the terms
plaintext and cipher text. Plaintext refers to data that is unencrypted while ciphertext refers to the
data that has been encrypted.Encryption is the process of converting normal text to unreadable
form. Decryption is the process of converting encrypted text to normal text in the readable form.
There are two main categories of cryptography depending on the type of security keys used to
encrypt/decrypt the data. These two categories are: Asymmetric and Symmetricencryption
techniques.

A keyacts as a password that is used to encode and decode data. In the case of symmetric
encryption, the key that is used to encrypt the data is the same key that is used to decrypt the data.
As a general rule, larger key sizes allow for a larger number of key combinations, which makes it
more difficult for an attacker to correctly guess the key, thereby increasing security.A roundis
another cryptographic term. The number of rounds that an encryption algorithm uses refers to the
number of iterations that data is encrypted. The purpose for having more rounds is to achieve a
higher level of security, because an increase in rounds translates to an increase in encryption. By
increasing the amount of encryption that is done, the resulting ciphertext becomes more statistically
unrelated to the original plaintext.

1.2.Symmetric Encryption:
Symmetry encryption technique is also called as single key cryptography. It uses a single key. In
this encryption process the receiver and the sender has to agree upon a single secret (shared) key.
Given a message (called plaintext) and the key, encryption produces unintelligible data, which is
about the same length as the plaintext was. Decryption is the reverse of encryption, and uses the
same key as encryption.Rijndael(AES), MARS, RC6, Serpent, and Twofish these are most used
symmetric algorithms.

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1.2AES finalist algorithms:
The US government wanted to standardize a cryptographic algorithm which will be used
universally by them called AES (Advanced Encryption Standards).In 1997 NIST announceda
program to develop and choose an Advanced Encryption Standard to replace the aging Data
Encryption Standard (DES).They solicited algorithms from the cryptographic community, with the
intent of choosing a single standard. Fifteen algorithms were submitted to NIST in 1998, and NIST
chose five finalists in 1999.These are Rijndael(AES), MARS, RC6, Serpent, and Twofish.

1.2.1Evaluation Criteria and Final Score of AES Finalist Algorithms:

NIST focused their evaluation of each algorithm based on the followingcriteria. In order of their
stated importance, they were:1.Security(the most important factor in the
evaluation)2.Cost3.Algorithm and Implementation Characteristics. On the basis of these criteria
NIST chose the best algorithm and after voting and the final score-

1.2.2Comparison betweendifferentAES Finalist

Algorithms:ArchitecturalComparison:Based on the Architecture of these shortlisted
algorithms comparisoncan be summed up through a table as shown below-

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11
1.3 Advanced Encryption Standard:
AES can be implemented in hardware or software. Hardware implementation would be faster and
secure as compared to software implementation. This paper explains iterative architecture
implementation of AES using VerilogHDL.The Advanced Encryption Standard (AES) is a standard
for the encryption of electronic data. The AES-128 Algorithm includes the following functions i.e.
128-bit key size, Automatic Round key calculation and Encryption or decryption functions. In this
paper, we design the 128 bit AES algorithm in encryption and decryption process. We conduct a
fault attack against the unprotected AES by using VHDL code.

Fig 1: Block Diagram of AES

Plaintext: Plain text is add input Data by using algorithm.

2
Encryption algorithm: The encryption algorithm performs substitution and permutation values or
document or data on input text (Plain text).

Secret Key: The secret key is also input to the encryption algorithm. The exact substitutions and
permutations performed depend on the key used, and the algorithm will produce a different output
depending on the specific key being used at the time.

Cipher text: This is the scrambled message produced as output. It depends on the plaintext and the
key. The cipher text is an apparently random stream of data, as it stands, is unintelligible.

Decryption Algorithm: This is essentially the encryption algorithm run in reverse. It takes the
cipher text and the secret key and produces the original plaintext.

These cryptographic Algorithms are use for protection of the user data so that only the permitted
user is allowed to access it and it is a science of information security. Unlike DES, the decryption
algorithm differs from the encryption algorithm.

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1.3.1.THE AES CIPHER
AES is a symmetric block cipher, Like DES. This means that it uses the same key for both
encryption and decryption. However, AES is quite different from DES in a number of ways. The
algorithm Rijndael allows for a variety of block and key sizes and not just the 64 and 56 bits of
DES’ block and key size. The
block and key can in fact be chosen independently from 128, 160, 192, 224,
3
256 bits i.e diffent AES algorithm. and need not be the same. However, the AES standard states that
the algorithm can only accept a block size of 128 bits and a choice of three keys - 128, 192, 256
bits. Depending on which version is used, the name of the standard is modified to AES-128, AES-
192 or AES- 256 respectively. As well as these differences AES differs from DES in that it is not a
feistel structure

1.3.2 AES ALGORITHM

AES is a symmetric key block with a data block length of 128 bits, which supports different key
lengths of 128, 192 or 256 bits. The AES is a round-based encryption algorithm. The number of
rounds for key length 128 bits is 10, for key length 192 bits is 12 rounds, and for 256 bits 14
rounds. In the encryption of the AES algorithm, each round performs four transformations namely
SubBytes, ShiftRows, MixColumns and AddRoundKey, while the final round does notperform the
MixColumns transformation. The key used in each round which is called the round key, this is
generated from the initial key by a separate key scheduling module of AES.

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14
 Chapter 2
2.1 History of Advanced Encryption Standard
The Advanced Encryption Standard (AES), also known as Rijndael(its original name), is a
specifi-cation for the encryption of electronic data established by the U.S. National
Institute of Standards and Technology (NIST) in 2001.

AES is a subset of the Rijndael cipher[5] developed by two Belgian cryptographers, Joan
Daemen and Vincent Rijmen, who submitted a proposal to NIST during the AES selection
process. Rijndael is a family of ciphers with different key and block sizes.

For AES, NIST selected three members of the Rijndael family, each with a block size of 128 bits,
but three dif-ferent key lengths: 128, 192 and 256 bits.

AES has been adopted by the U.S. government and is now used worldwide. It supersedes
the Data Encryption Stan- dard (DES), which was published in 1977. The algo-rithm
described by AES is a symmetric-key algorithm, meaning the same key is used for both
encrypting and decrypting the data.

In the United States, AES was announced by the NIST as U.S. FIPS PUB 197 (FIPS 197)
on November 26, 2001.This announcement followed a five-year stan-dardization process
in which fifteen competing designs were presented and evaluated, before the Rijndael
cipher was selected as the most suitable (see Advanced Encryp-tion Standard process for
more details).

AES became effective as a federal government standard on May 26, 2002

after approval by the Secretary of Com- merce. AES is included in the ISO/IEC 18033-3
stan-dard. AES is available in many different encryption
6
pack-ages, and is the first (and only) publicly accessible cipher approved by the National
Security Agency (NSA) for top secret information when used in an NSA approved cryp-
tographic module (see Security of AES, below).
The name Rijndael (Dutch pronunciation: [ˈrɛindaːl]) is a play on the names of the two
inventors (Joan Daemen and Vincent Rijmen).

2.2 Complete View of AES ALGORITHM :

In this section, we will explain AES in brief with the computations, rounds and steps
involved in encryption and decryption.The AES in present work operates on 128 bitswhich
are considered in 4X4 bytes array. Each array is called as state. The size of input block,
output block is 128 bits represented by four columns of matrix. This gives Nb=4, which
shows4bytes or 32 bits in state matrix. The length of cipher key is ‘K’. The possible length
is 128,192 or256 bits. This gives Nk= 4, 6 or 8, which shows number of columns in Cipher
Key Array. Byte oriented transformations will give encrypted or decrypted states. The
number of round depends on the key size; numbers of rounds are represented by Nr. In
present case key length (Nk) is 4 hence number of rounds (Nr) are 10. When key length
(Nk) is 6 rounds will be 12 and key length of 8 requires 14 rounds. The AES algorithm
consists of four phases as shown in fig.1.

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 7

Encryption and decryption in AES are carried out by specific ciphers and its inverse. The plain text
is applied as input along with cipher key for encryption. The encrypted output will be considered as
input for the Decryptor. The encrypted output with inverse cipher is applied to Decryptor. The
output of
Decryptor is plain text. The four phases are as follows below.

2.2.1.Key Expansion : Round keys are derived from the cipher key using the Rijndael’s

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17
 Fig-
The AES key expansion algorithm takes as input a four-word (16-byte) key and produces a linear
array of 44 words (176 bytes). This is sufficient to provide a four-word round key for the initial
AddRoundKey stage and each of the 10 rounds of the cipher. The pseudocode on the next page
describes the expansion.

2.2.2 Initial Round AddRoundKey : Each byte of the state is combined with the round key
using a bit-wise operation.
Here Input is 128bits or 32 Words or 16Bytes
Output is 128bits or 32 Words or 16Bytes

2.2.3.Middle Rounds : Nr = 1 till Nr-1 Repeatedly perform the following transformations:

2.2.3.1 SubBytes : a non-linear substitution step where each byte is replaced with
another according to a lookup table.

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The SubBytes phase of AES involves splitting the input into bytes and passing each through a
Substitution Box or S-Box. Unlike DES, AES uses the same S-Box for all bytes. To read this Table,
the byte input is broken into two 4-bit halve
Here
First four bits are - Rows
Next four bits are – Columns

Size of S-BOX Matrix is - 16 x 16

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20
21
2.2.3.1 ShiftRows : a transposition step where each row of the state is shifted cyclically a certain
number of steps.
ShiftRows. In the ShiftRows phase of AES, each row of the 128-bit internal state of the cipher is
shifted. The rows in this stage refer to the standard representation of the internal state in AES,
which is a 4x4 matrix where each cell contains a byte.

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2.2.3.3 MixColumns : a mixing operation which operates on the columns of the state, combining
the four bytes in each column.

MixColumntransformations

Inverse MixColumntransformations.

4.

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2.2.4 AddRoundKey : same as described above.

2.4 Final Round (no MixColumns) :

1. SubBytes : same as described above.
2. ShiftRows : same as described above.
3. AddRoundKey : same as described above.

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 Chapter 3
Decryption
When an authorized user receives the encrypted message, with the help of a secretive symmetric
key, original message can be extracted out from the ciphertext. Thisciphertext is passed through
AESdecryptingtransformation of 10 rounds before thisgibberish message is decryptedto a
meaningful message. The last round of 10 transformations is displayed with results using
MATLAB.
The encrypted data assumed here is the one that follows from the previous section.
ciphertext =»p¥Y×® ̈5&8çK ̈
Since AES is a symmetric cipher, it will be using same cipher key for encryption and decryption
both. For decrypting in MATLAB as well, the fed cipher key is taken into process for different
roundsof operation in inverse order. Since in this decryption section, last round of operation is
shown, which isalmost similar in actionto the first round of operation in encryption side (except for
Inverse MixColumn operation), the last expanded key will be the cipherkey.

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3.1 Inverse Shift Row

The next transformation is Inv_shift_rowoperation, wherein each element of the previous state is
cyclically shifted to its right in the prerequisite order and form the next state.The next state from
this operation

3.2 InvSubByte

The next transformation isInv_sub_byte operation, wherein each element of the previous state is
replaced by a new element from aninverse substitution table, which is derived from the substitution
table. The next state from this operation.

3.3 InvMixColumn: This procedure is similar to MixColumn transformation in its operation with
the difference that an InvMixColumn constant matrix is used for multiplication. This constant
matrix is inverse of the one used during MixColumn transformation.

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3.4 AddRoundKey

Following the algorithm, lastround of AES 128 bit variant,takesas input the 16 bit hexadecimal
cipher key, passes it through KeyExpansion transformation and gives a 4x4 matrix of the cipher key
characters

During last round transformation, the initial state matrix and expanded key is XORed in the
add_round key transformation to produce thenext state matrix as is shown below.

Finally the original message is derived from the ciphered message using the ciphered key and the
cipher text, with this finalround of AES transformationsas shown in equation .
Decipher_text =NIT ROURKELA
This text is displayed to the authorized receiver who is having the correct cipher key for decrypting
the ciphered message, let alone an intruder who is trying to capture the key and eventually the
message.

Technology
VLSI:
Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by
combining thousands of transistors into a single chip.VLSI began in the 1970s when complex
semiconductor and communication technologies were being developed. The microprocessor is a
VLSIdevice.

Tools Used
Software :

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 Xilinx14.5
Language:
Verilog HDL

Top Level Block

RTL Schematic :

Advantages :

➢ As it is implemented in both hardware and software, it is most robust security protocol.

➢ It uses higher length key sizes such as 128, 192 and 256 bits for encryption. Hence it makes
AES algorithm more robust against hacking.

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 ➢ It is most common security protocol used for wide various of applications such as wireless
communication, financial transactions, e-business, encrypted data storage etc.
➢ It is one of the most spread commercial and open source solutions used all over the world.
➢ No one can hack your personal information.
➢ For 128 bit, about 2128 attempts are needed to break. This makes it very difficult to hack it
as a result it is very safe protocol.

Disavdantages :

➢ It usses too simple algebraic structure.

➢ Every block is always encrypted in the same way.
➢ Hard to implement with software.
➢ AES in counter mode is complex to implement in software taking both performance and
security into considerations.

Applications :

➢ Aes can be used anywhere Symmetric Key Cryptography is needed

➢ Many Banking Systems used AES-128 and AES-256 to Secure Online Banking or
Internet Banking.

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Conclusion:-

The iterative design implemented in this work gives symmetric encryption and decryption cycles.
The encryption process is slow compare to decryption. The area requirement in VLSI based design
is at prime. Iterative design will reuse same hardware in each round which will consume less area.
The crypto core implemented is as per Standard AES.

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