Name- Dinesh Ramu Kabadagi

Roll No. 23 Batch- S2

Date-
EXPERIMENT No. 2(B)

Aim: Study the behavior of circuit.

TOOL: Multisim simulator

CIRCUIT DIAGRAM:

CIRCUIT ANALYSIS:

Total resistance of a circuit = (Resistance of R1||Resistance of voltmeter U3) + (Resistance of

R2||((Resistance of Ammeter U1 + Resistance of R3)|| Resistance of voltmeter U2)+ Resistance of
Ammeter U4

Total resistance of a circuit = (( ((51K Ω+30K Ω) ||100KΩ )+10KΩ ) ||20KΩ )

= 14.70Ω

Current in loop 1 = V1 / Total resistance

= 15/ 19.026

= 0.78839 A
Voltage drop across R1 = (R1||Resistance of voltmeter U3)* Current in loop 1

= (1KΩ|| 10 Ω)* 0.78839 A

= 7.8019 V

Voltage drop across R2 = V1 – VR1

= 15 – 7.8019

=7.1981 V

Current in loop 2 = VR2 / (Resistance of Ammeter U1 + Resistance of R3)

= 7.1981/110Ω

= 0.065 A

PROCEDURE:

1) Draw the circuit and save.

2) Calculate values for all voltages and currents in the circuit.
3) Select Simulate/Run from the menu to solve the circuit and check the measured values
against the calculated values.

OBSERVATION:

PARAMETER THEORETICALLY CALCULATED MEASURED IN MULTISIM

Current in loop 1 0.78839 A 0.788 A
Current in loop 2 0.065 A 0.065 A
Voltage across R1 7.8019 V 7.806 V
Voltage across R2 or R3 7.1981 V 7.194 V

CONCLUSION:

Theoretical and observed circuit parameter values are nearly same.

 Name- Dinesh Ramu Kabadagi
Roll No. 23 Batch- S2
Date-

EXPERIMENT No. 9

AIM: To study adjustable voltage regulator IC’s (LM317)

APPARATUS: NI Multisim 11.0

CIRCUIT DIAGRAM:

1. When R3 is at 0%.

2. When R3 is at 50%
 3. When R3 is at 100%.

ANALYSIS:

𝑅2
We know for LM317, Vo = 1.25 ∗ (1 + )
𝑅1

i. At R3 = 0%
0
Vo = 1.25 * (1 + 270) = 1.250 V
ii. At R3 = 50%
900
Vo = 1.25 * (1 + 270) = 5.416 V
iii. At R3 = 100%
1.8𝑘
Vo = 1.25 * (1 + 270
)= 9.583 V

PROCEDURE:

1. Design the circuit as per circuit diagram.

2. Save the design and run the simulation.
3. Observe the output voltage by keeping potentiometer at 0%, 50% and 100%.
4. Verify the calculated and observed results.

OBSERVATION:

CALCULATED Vo PRACTICAL Vo
At R= 0% 1.250 V 1.252 V
At R= 50% 5.416 V 5.471 V
At R=100% 9.583 V 9.683 V

CONCLUSION:

By using multisim, we studied and designed LM317 as an adjustable voltage regulator. We

observed the output voltage changes by keeping potentiometer at different positions.
PROCEDURE:

1. Select the parity generator IC and connect the Logic inputs and LED’s as per the circuit diagram.

2. Save the circuit design.

3. Now, Start the simulation and record the output reading(s).

OBSERVATIONS

INPUT OUTPUT
EVEN (pin 5) ODD (pin 6)
A B C D E F G H I
1 0 1 0 1 0 0 0 0 0 1
1 0 1 0 1 1 0 0 0 1 0
Input having an even number of 1 0
parity(i.e. even no. of Logic HIGH’s)
Input having an odd number of 0 1
parity(i.e. odd no. of Logic HIGH’s)

CONCLUSION:

When the logic input data has even parity, it generates Logic HIGH signal at EVEN pin.

When the logic input has odd parity, it generates logic HIGH signal at ODD pin.