Literature review on PLL

The concept of Phase locked loop(PLL) was described early by a British researchers who
developed an alternative to Edwin Armstrong's superheterodyne receiver, the Homodyne
or direct-conversion receiver in 1923. However, the local oscillator would rapidly tuned
in frequency .It was then improved by Henri de Bellescize by adding an automatic
correction signal to maintain the output signal in the same phase as the input signal. The
technique of PLL is formally introduced. It is widely used for synchronization purposes
especially for nowadays, the emergence of electronic application such as radio,
telecommunications and computers. It includes the frequency synchronization in coherent
detection, coherent demodulation or radio transmission, frequency recovery, frequency
division and multiplication and demodulation. PLLs are more commonly used for digital
data transmission, but can also be designed for analog information. (Retrieved from
http://en.wikipedia.org/wiki/Phase-locked_loop )

Phase
Input Detector(PD) Error Signal
signal(fi) Low Pass Filter(LPF) Voltage Controlled
VCO inputOscillator(VCO)

VCO output

Figure 1: Block diagram of PLL

A phase-locked loop (PLL) is a control system that constantly adjusts an output signal to
match in phase and lock on the frequency of an input “reference” signal. A PLL has three
core components. They are

1. Phase Detector(PD)
2. Low Pass Filter
3. Voltage Controlled oscillator(VCO)

Reviews of PLL Subcircuits

Phase detector(PD) – To compare the phase between input reference frequency and the
VCO output. The resulting error signal which is proportional to the phase difference
normally is usually in the form of pulses. It is then sent to a low pass filter and used to
drive a voltage-controlled oscillator (VCO) which creates the control voltage.
 Low Pass Filter(LPF) – To stabilize the control voltage to the VCO with a corner
frequency. Basically it shows how the loop response when dealing with disturbances,
changes and how fast the loop can achieve lock and damping. On the other hand, it can
limit the ripple appear at the phase detector which can be used to attenuate the energy. It
still can produce dc voltage corresponding to the phase differences of the two-phase
detector inputs by filtering out the high frequency components of the multiplication
output of the phase detector.

Voltage Controlled oscillator(VCO) – To tune the dc signal produced by low pass filter
to the phase related to the input reference phase. There is a phase detector that used to
lock the VCO to the desired input phase and when the loop is phase-locked(fo=fi), only a
phase difference between the VCO and input signal exist. If the phase difference is
detected, the phase detector will generate error signal and bring VCO back to the
reference phase and frequency.

Basic Operation

PLL operation is basically implemented through the combination of these three core
elements as follows:

1. Accepting an input at certain frequency and generating an output which has a

certain related to the input reference signal. The phase difference as well as error
signal is produced.
2. Control dc voltage is produced after feeding the error signal into LPF which
proportional to this phase difference.
3. Control voltage is produced to controls the VCO frequency. If there is an
identical phase between two signals, the VCO control voltage is 0V and its
frequency stays unchanged. Conversely, if there is a phase difference between
them, VCO control voltage and consequently cause the VCO output to alter its
phase and frequency to match with the input signal. The

This is an electronic system which finds the phase relationship between input signal and
output signal in the phase detector. The output frequency is controlled by feedback. It is
compared to the input, and if there is a phase difference between them, the frequency is
altered to reduce the difference. Normally, PLL has many interesting application such as
frequency synthesizer, generating a signal, modulate or demodulate a signal. Commonly
it is used for digital transmission and also can be designed for analog application.
(Retrieved from: http://mysite.du.edu/~etuttle/electron/elect12.htm)
 Frequency Synthesizer

Frequency synthesizer is a PLL circuit for generating one or more output signals which
its frequency has a certain relation to the frequency of the input reference signal.
Basically, it uses the frequency divider to get the feedback and thus synchronizes the
frequency and phase with the input frequency signal. A signal of a target frequency will
be generated by multiplying the reference frequency signal with frequency divider ratio
after that.

PLL frequency synthesizer has the following components which are similar as PLL
circuits but adding some enhancement: controlled voltage supplying circuit, an input
reference signal generator, a voltage controlled oscillator (VCO), a phase frequency
comparator, low pass filter, and a variable frequency divider.

Input PLL
reference
Controlled voltage fi(t)
signal Phase Detector(PD) Low Pass Filter
supplying circuit
generator
VCO input
VCO output
Frequency Voltage
Divider Controlled
Oscillator

Block diagram of Frequency Synthesizer using PLL

Basic Operation

The reference signal generator is to generate a reference signal which its frequency has
the certain relation with the reference frequency. The output frequency is firstly fed
through a frequency divider back to the input of the system, producing a negative
feedback loop. The phase detector detects the phase difference between an output
frequency of the reference oscillator and an output frequency of the frequency divider
circuit. And if the error signal is increased caused by the drifting of output frequency, a
signal matching with this phase difference will be supplied as the control voltage to the
VCO through the low pass filter in opposite direction. This is to minimize the phase
difference between the frequency divided signal and the reference signal (Retrieved from
 http://www.electronics-manufacturers.com/products/rf-microwave-components/pll-
frequency-synthesizer/ )

Component part
PLL
fi(t)
Voltage Regulator 555 timer Phase Detector(PD) Low Pass Filter

VCO input
VCO output
Frequency Divider Voltage Controlled Oscillator

PLL Frequency Synthesizer block diagram being implemented

By referring to the block diagram, there are four main parts in the PLL frequency
synthesizer. They are controlled voltage supplying circuit, an input reference signal
generator, PLL circuit and a variable frequency divider.

Controlled voltage supplying circuit

For this part, we decide to use a voltage regulator as a controlled voltage supplying
circuit since it has the characteristic of maintain a constant voltage level. Voltage
regulator, it may use an electromechanical mechanism, or passive or active electronic
components. Depending on the design, it may be used to regulate one or
more AC or DC voltages. For some regulators if the output voltage is too high, the
regulation element is commanded to produce a lower voltage. So, the output voltage is
held roughly constant. (Retrieved from http://www.radio-electronics.com/info/rf-
technology-design/pll-synthesizers/frequency-synthesiser-tutorial-basics.php). For this
assignment, we use it to maintain a constant voltage level, 5V.

Input reference signal generator

In order to generate a constant reference frequency for input signal, we decided to use
555 timers. The IC we used is NE555. The NE555 is a very stable controller which
capable of producing accurate time delays or oscillation. It is suitable to use as a
frequency oscillator for this frequency synthesizer phase locked loop.

Phase Lock Loop (PLL) circuit

For the phase locked loop circuit, we used the IC CD74HC4046AE. The 74HC4046A is a
basic phase-locked- looped IC which has included a linear voltage-controlled oscillator
and three different phase comparators (PC1, PC2 and PC3) with a common signal input
amplifier and a common comparator input. We used the Phase comparator 2 which gives
us no phase difference exists between SIG IN and COMPIN over the full frequency range of
the VCO. Besides, the loop is controlled by positive signal transitions and the duty
factors of SIGIN and COMPIN are not important. The VCOOUT and its lock range is
determined by the voltage of input VCOIN signal and the capacitor and resistors
connected to pins 6, 7, 11 and 12. The loop filter components are connected to pin 13 and
9.

Figure 1. Pin numbers with respect of components used

Figure 2. The IC of CD74HC4046A

Frequency Divider

For the frequency divider part, we used 3 74HC390. We have chosen the IC which gives
certain fixed dividing ratio. With the help of the switches certain dividing ratio can be
chosen by the user. By using a programmable divider, we can use a wide variety of
dividing ratio with the combination of switches. However, the complexity and cost will
also increase. Therefore, we chose to use the IC 74HC390.

Applications for PLL frequency synthesizers include wireless base stations, mobile
handsets, personal digital assistants (PDAs), broadband wireless access, satellite
communications, and local area networks (LANs). (Retrieved from
http://www.globalspec.com/LearnMore/Telecommunications_Networking/RF_Microwav
e_Wireless_Components/PLL_Frequency_Synthesizers )