Unit - IV

Contents
Arithmetic Operations
– Introduction
– Flags
– Incrementing & Decrementing
– Addition
– Subtraction
– Multiplication
– Division
– Decimal Arithmetic
Jump and Call Opcodes
– Introduction
– Jump and Call program range
– Call and Jump Subroutines
– Call and Returns
– Interrupts and Returns
Program Status Word
Register Bank Selector
 Flags
The 8051 has four Arithmetic Flags:
–Carry Flag (CY)
–Auxiliary Carry (AC)
–Overflow (OV)
–Parity (P)
 Carry Flag (CY)
The Carry flag is set whenever there is a
carry out from D7 bit.
This flag bit is affected after an Addition or
Subtraction.
It can also be set to ‘1’ or ‘0’ directly by an
instruction such as “SETB C” and “CLR C”.
Where “SETB C” is “Set bit Carry”
“CLR C” is “Clear carry”
 Auxiliary Flag (AC)
If there is a carry from D3 to D4 during
an ADD or SUB operation, this bit is set.
This flag is used by instructions that
perform BCD arithmetic.
 Parity Flag (P)

The parity flag reflects the number

of 1s in the A register only.
If the A-register contains an odd
number of 1s, then P=1.
 If A-register has even number of 1s,
then P=0.
 Overflow Flag (OV)
The Overflow flag is set whenever the result
of a signed number operation is too large,
causing the high-order bit to overflow into the
sign bit.
This flag is only used to detect errors in
Signed arithmetic operations.

Note: The Carry flag is used to detect errors in

Unsigned arithmetic operations.
 Instructions that affect flag bits

The Flag bits CY,

OV, AC and P are
affected by ADD
and SUB
instructions.
Example: 3-1
Example: 3-2
Example: 3-3
Incrementing and Decrementing
Mnemonic Operation

INC A Add a one to the A-register.

INC Rr Add a one to register Rr.

INC add Add a one to direct address.

INC @Rp Add a one to the contents of the address of Rp.

INC DPTR Add a one to the 16-bit register.

DEC A Subtract a one from the A-register.

DEC Rr Subtract a one from register Rr.

DEC add Subtract a one from direct address.

Subtract a one from the contents of the address of
DEC @Rp Rp.
 Addition Instruction
ADD A, source ;A = A + source
The instruction ADD is used to add two
operands.
• Destination operand is always in register A.
• Source operand can be a register, immediate
data, or in memory.
• Memory-to-memory arithmetic operations
are never allowed in 8051 Assembly
language.
Example:

PF=0, since there are

zero ones

CY=1
PF=0
AC=1
• R0=40H, R2=5, A=0, R7=0 0000 0000
• ADD A, @R0 » A= 0+7D=7DH 0111 1110
0111 1110
• A=7D and CY=0. R7=0 & jumps to NEXT
instruction.

• R0=41H, R2= 4 0111 1110

1110 1011
• ADD A, @R0 » A= 7D+EB= 68H 10110 1000
• A=68H and CY=1. R7=1

• R0=42H, R2= 3
0110 1000
• ADD A, @R0 » A= 68+C5= 2DH 1100 0101
• A=2DH and CY=1. R7=2 10010 1101
• R0=43H, R2=2 0010 1101
• ADD A, @R0 » A= 2D+5B=88H 0101 1011
• A=88H and CY=0 R7=2. 1000 1000

• R0=44H, R2= 1
• ADD A, @R0 » A= 88+30=B8H 1000 1000
0011 0000
• A=B8H and CY=0 R7=2. 1011 1000

• R0=45H, R2= 0
• ADD A, @R0 » A= B8+0= B8H
A=B8H and R7=2
 Subtraction
In many microprocessor there are two different
instructions for subtraction:
SUB and SUBB (subtract with borrow)
In the 8051 we have only SUBB
The 8051 uses adder circuitry to perform
the subtraction.

SUBB A, source ;A = A – source – CY

To make SUB out of SUBB, we have to make CY=0
prior to the execution of the instruction.
 SUBB when CY = 0
The steps of the hardware of the CPU in
executing the SUBB instruction.
1. Take the 2’s complement of the subtrahend
(source operand)
2. Add it to the minuend (A)
3. Invert the carry
These three steps are performed for every
SUBB instruction by the internal hardware of
the 8051 CPU.
After these three steps the result is obtained and
flags are set.
 Example:
Show the steps involved in the following.
CLR C ; make CY=0
MOV A, #3FH ; load 3FH into A (A=3FH)
MOV R3, #23H ; load 23H into R3 (R3=23H)
SUBB A, R3 ; subtract A-R3, place result in A
(Step 1)
A = 3F (Step 2)
0011 1111 1) 0010 0011
R3 = 23 0010 0011 2) 1101 1100
1C 3) 1
1101 1101

0 CF=0 (Step 3)
 Multiplication
• The 8051 supports byte by byte multiplication only
• The byte are assumed to be unsigned data.
 Division
• The 8051 supports byte over byte division only
• The byte are assumed to be unsigned data.

DIV
Jump Instructions
 Conditional Jump Instructions
Bit Jumps:
Bit jumps all operate according to the status of the
carry flag in the PSW or the status of any bit-
addressable location. All bit jumps are relative to the
program counter.
Bit Jump Instructions:
Byte Jumps:
 Byte jumps- jump instructions that test bytes of
data- behave as bit jumps.
 If the condition that is tested is true, the jump is
taken.
 If the condition is false, the instruction after the
jump is executed.
 All byte jumps are relative to the program
counter.
Conditional Jump Instructions
Unconditional Jump Instructions
CALL Instructions