INDIAN SCHOOL OF MINES

ELECTRICAL ENGINEERING DEPARTMENT

PROJECT REPORT
ON
SOLAR ENERGY HARVESTING WITH PHOTOVOLTAIC CELL

SUBMITTED TO: SUBMITTED BY :

PROFESSOR K.C .JANA RAHUL CHAKRAVORTY (2012JE0698)

ELECTRICAL ENGINEERING VINIT MALIK (2011JE0012)

DEPARTMENT REDDY MOHAN NAIDU(2012JE0636)

ROHIT KUMAR (2012JE0882)

 Acknowledgement

Apart from the efforts of ours, the success of any project depends largely on
the encouragement and guidelines of many others. We take this opportunity
to express our gratitude to the people who have been instrumental in the
successful completion of this project.

We would like to show our greatest appreciation to Prof. K.C.JANA . We can’t

say thank you enough for his tremendous support and help. We feel motivated
and encouraged every time we attend his meetings. Without his
encouragement and guidance this project would not have materialized.

The guidance and support received from all the members who contributed and
who are contributing to this project, was vital for the success of the project.
We are grateful for their constant support and help.
 TABLE OF CONTENT

 SIMULATION OF PHOTOVOLTAIC MODEL

SIMULATION OF CONVERTER MODEL

SIMULATION OF MAXIMUM POWER

POINT TRACKING WITH CONVERTER

SIMULATION OF MULTILEVEL INVERTER

TOPOLOGY WITH REDUCED NO. OF
SWITCHES
 PHOTOVOLTAIC MODEL
Photovoltaic cell models have long been a source for the description
of photovoltaic cell behaviors for researchers and professionals. The
most common model used to predict energy production in
photovoltaic cell modeling is the single diode circuit model shown in
Figure-1. The ideal photovoltaic module consists of a single diode
connected in parallel with a light generated current source ( Isc ) as
shown in Figure-1. The equation for the output current is given by:

I = ISC – ID
Where

ID = ISCref(exp(qVoc/kAT) – 1)

Solar cell model using single diode

The light current depends on both irradiance and temperature. It is

measured at some reference conditions. Thus, Where is the
photocurrent in (A) which is the light-generated current at the
nominal condition (25oC and1000W/m2), Ki is the short-circuit
current/temperature co- efficient at (0.0017A/K), and are the
actual and reference temperature in K, is the irraiation on the
device surface, and 1000W/m2 is the nominal irradiation. Equation
(2) does not adequately represent the behavior of the cell when
subjected to environmental variations, especially at low voltage. A
more practical model is shown in Figure-2, where and represents
series and parallel resistance, respectively.In this propose model, a
current source which depends on solar radiation and cell
temperature; a diode in which the inverse saturation current
depends mainly on the operating temperature; a series resistance
and a shunt resistance which takes into account the resistive
losses.

IPV = NPISC – NSI0{exp(q(VPV+IPVRS)/NSkAT) – 1} – VPV + (IPVRS/RP)

Where k is the Boltzmann constant (1.38 x 10-23 J K-1), q is the

electronic charge (1.602 x 10-19 C), T is the cell temperature (K); A is
the diode ideality factor, the series resistance (Ω) and is the
shunt resistance (Ω). is the number of cells connected in series =
36. Np is the numbr of cells connected in parallel = 1,

Figure-2. Solar cell model using single diode with

The equation that describes the I-V characteristic of the circuit in
Figure-2 is given by -
ISC – ID –(VD/RP) – IPV = 0

Thus

IPV = ISC – ID – (VD/RP)

And the reverse saturation current Irs is given as:
Irs = ISCref{exp(qVOC/NSkAT) – 1}

The module saturation current I0 varies with the cell temperature

which is given by

I0 = Irs{(T/Tref)3 * exp(qCgTrefT/Ak(T-Tref))}

Where Irs is the diode saturation current (A). The basic equation
that describes the current output of the photovoltaic (PV) module
of the single-diode model is as given in equation The nonlinear and
implicit equation given by Equation depend on the incident solar
irradiance, the cell temperature, and on their reference values.
These reference values are generally provided by manufacturers of
PV modules for specified operating condition such as for which the
irradiance is 1000W/m2 and the cell temperature is 25oC. Real
operating conditions are always different from the standard
conditions, and mismatch effects can also affect the real values of
these meatoparameters The use of the simplified circuit model for
this work makes it suitable for power electronics designers to have
an easy and effective model for the simulation of photovoltaic
devices with power converters. The value of the parallel resistance is
generally high and hence neglected to simplify the model . A
procedure based on Simulink model to determine the values
to these parameters is proposed. The evaluation of these model
parameters at real condition of irradiance and temperature of the
target PV modules are then determined according to their initial
values.
 V
o
c

SIMULINK MODELING FOR PV MODULE

MXS 60 PV Module is taken as the reference

module for simulation and the data sheet details are given in Table-
1. A block diagram of the stage by stage model based upon the
equations of PV model is represented in Simulink environment as
given in Figures 3 to 9. These models are developed in moderate
complexity to include the temperature dependence of the photo
current source, the saturation current through the diode, and a
series resistance is considered based upon the shackle diode
equation as in (1)-(8). Since the main objective is to develop a
functional PV model for the Simulink environment, the system is
modeled to supply power to the load.

Table-1 Parameter specification of MXS 60 PV module

Parameter Variable Value
Maximum power Pm 60W
Maximum voltage Vm 17. 1V
Current at max power Im 3. 5A
Open cct voltage Voc 21. 06V
Short cct current Isc 3.74
Total No. of cells in series
Ns 36
Total No. of cells in
Parallel Np 1
Figure-3. This model calculates the short circuit current at given
operating temperature

. This model calculates the reverse saturation current through the

diode using equation
This model takes reverse saturation current, module reference
temperature and the module operating temperature as input and
calculates module saturation current

This model takes operating temperature in Kelvin and calculates the

product NsAkT
This model executes the function given by equation

This model contains all the six model interconnected together

 This is the final model which takes irradiation, operating
temperature and .Module voltage as input and gives the output
current and output voltage .

THE SIMULATION RESULTS

The model of the PV module was implemented sing a Matlab
Simulink model. The model parameters are evaluated during
execution using the equations listed as in the previous section. The
PV module chosen for this simulation is MXS60, which provides
60W nominal maximum power and has 36 series connected cells.
The parameter specification of the module is as shown in Table-
1. The model was built in stages as indicated above starting from
stage A to the final model. The subsystem contains all the
mathematical equations of every stage model block. Figure-10
shows the I-V output characteristics of PV module with varying
irradiance at the constant temperatures. It is depicted that the
PV output current varies drastically with insulation conditions and
there is an optimum operating point such that the PV system delivers
its maximum possible power to the load. The optimum operating
points changes with the solar insulation, temperature and load
conditions. Figure-11 shows the P-V out characteristics of the PV
module with varying irradiance at the constant temperatures . From
the graphs when the irradiance increases, the current and voltage
output also increases. This result shows the net increase in power
output with an increase in irradiance at the constant temperatures.
Furthermore, it is well known that for a certain PV panel, the voltage-
power characteristics are fixed for each insolation without
intersection, as shown in Figure-11. Hence, for any given PV voltage
and power, the corresponding insolation can be estimated The I-V
and P-V characteristics under constant irradiance with varying
temperature are presented in Figure 12 and 13, respectively.
When the operating temperature increases, the current output
increases marginally but the voltage output decreases drastically,
which result in net reduction in power output with a rise in
temperature.
 CONVERTER

PV arrays are built up with combined series/parallel combinations of

PV solar cells, which are usually represented by a simplified
equivalent circuit model . The PV cell output voltage is a function of
the photocurrent which is mainly determined by the load current
and the solar radiation level during the operation.

𝑉𝑐 = 𝐴𝑘 𝑇𝑐/e*𝑙𝑛{𝐼𝑝h +𝐼0−𝐼𝑐/𝐼0}− 𝑅𝑠 𝐼𝑐 (1)

where the symbols are defined as follows:

e : electron charge ( 1.602 × 10−19 ℃ )

k : Boltzmann constant ( 1.38 × 10−23 J/K )

Ic : Cell output current, A

Iph: Photocurrent - a function of irradiation level and

junction temperature, A

I0 : Reverse saturation current of diode (0.0002 A).

Rs: Series resistance of cell (0.001 Ω).

Tc: Reference cell operating temperature (20 °C).

Vc: Cell output voltage, V.

Both k and Tc should have the same temperature unit, i.e. ℃ or

Kelvin. The curve fitting factor A is used to adjust the I-V
characteristics of the cell obtained from eq.(1) to the actual
characteristics obtained by testing. Equation(1) gives the voltage of a
single solar cell which is then multiplied by the number of the cells
connected in series to calculate the full array voltage. Since the array
current is the sum of the currents flowing through the cells in parallel
branches, the cell current IC is obtained by dividing the array current
by the number of cells connected in parallel before being used in
eq.(1), which is only valid for a certain operating temperature T c
with its corresponding solar irradiation level Sc. If the temperature
and solar irradiation level changes, the voltage and current output of
the PV array will follow this change. Hence, the effects of the
changes in temperature and solar irradiation levels should be
included in the final PV array model.

B. Temperature and Irradiation Correction factors

For a known temperature and a known solar irradiation level, a
model is obtained and then this model is modified tohandle different
cases of temperatures and irradiation levels.Let eq.(1) be the
benchmark model for the known operating temperature Tc and
known solar irradiation level Sc as given in the specification. When
the ambient temperature and irradiation level changes, the cell
operating temperature also changes, resulting in a new output
voltage and a new photocurrent value. The solar cell operating
temperature varies as a function of solar irradiation level and
ambient temperature. The ambient temperature Ta affects the cell
output voltage and cell photocurrent. These effects are represented
in the model by the temperature coefficients CTV and CTI for cell
output voltage and cell photocurrent, respectively, as
𝐶𝑇𝑉 = 1 + 𝛽(𝑇𝑎 − 𝑇𝑥 ) (2)

𝐶𝑇𝐼 = 1 +𝛾𝑇/𝑆(𝑇𝑎 − 𝑇𝑥 ) (3)

where, βT = 0.004 and γT = 0.06 for the cell used and Ta=20˚C is the
ambient temperature during the cell testing. This is used to obtain
the modified model of the cell for another ambient temperature Tx.
Even if the ambient temperature does not change significantly
during the daytime, the solar irradiation level changes depending on
the sunlight and clouds. A change in solar irradiation level causes a
change in the cell photocurrent and operating temperature, which in
turn affects the cell output voltage. If the solar irradiation level
increases

from Sx1 to Sx2, the cell operating temperature and the

photocurrent will increase from Tx1 to Tx2 and from Iphl to Iph2,
respectively. Thus the change in the operating temperature and the
photocurrent due to variation in the solar irradiation level can be
expressed with the help of two constants, CSV and CSI, which are the
correction factors for changes in cell output voltage VC and
photocurrent Iph, respectively.

𝐶𝑆𝑉 = 1 + 𝛽𝑇 𝛼(𝑆𝑥 − 𝑆𝑐 ) (4)

𝐶𝑆𝐼 =1/𝑆(𝑆𝑥 − 𝑆𝑐) (5)

where, Sc is the benchmark reference solar irradiation level during

the cell testing. Sx is the new level of the solar irradiation. The
temperature change ΔTC occurs due to the change in the solar
irradiation level which is obtained using
Δ𝑇𝑐 = 𝛼(𝑆𝑥 − 𝑆𝑐) - (6)

The constant αS represents the slope of the change in the cell

operating temperature due to a change in the solar irradiation level
and is equal to 0.2 for the PVA used. Using correction factors CTV,
CTI, CSV and CSI, the new values of the cell output voltage VCx and
photocurrent Iphx are obtained for the new temperature Tx and
solar irradiation Sx

𝑉𝐶𝑋 = 𝐶𝑆𝑉 𝐶𝑇𝑉 𝑉𝐶 (7)

𝐼𝑝*X = 𝐶𝑆𝐼 𝐶𝑇𝐼 𝐼ph (8)

VC and Iph are the benchmark reference cell output voltage and
reference cell photocurrent, respectively. The final model of the PV
Array is shown in the discussion section.

III. THE BOOST CONVERTER

Boost converters make it possible to efficiently convert a DC voltage
from a lower level to a higher level [5]. The fig. 2 depicts a step up
boost converter. It consists of a DC input voltage source VS, boost
inductor L, controlled switch S, diode D, filter capacitor C, and load
resistance R. The switch S is replaced with a MOSFET. Diode D is a
Schottky diode. Schottky diode offers a very small recovery period
with a minimum voltage drop across it during ON period. The metal-
semiconductor junction is responsible for the low voltage drop.
Design of the inductor L is very important and critical step in the
Boost Converter design. The design procedure is explained in the
following section.

IV. INDUCTOR DESIGN

A. Relation between Vout and Vin in Continuous Conduction The

idealized boost converter circuit is shown below in figure 3.
Under normal operation, the circuit is in continuous
conduction mode (i.e., iL is never zero) [6]
B. The circuit is assumed to be lossless so that P in = Pout or, Vin
ILavg = Vout * Iout where ILavg=Iin. Assuming continuous
conduction, the circuit has two states switch closed, and switch
open. They are shown in figures 4 and 5.
When the switch is closed, the diode is reverse biased and
open, iL increases at the rate of

𝑑 𝑖L/𝑑𝑡=𝑉𝐿/𝐿=𝑉𝑖𝑛/𝐿, 0 ≤ 𝑡 ≤ 𝐷𝑇 (9)

and the inductor is charging. When the switch is open, the diode is
forward biased, iL decreases at the rate of

𝑑 𝑖𝐿/𝑑𝑡=𝑉𝐿/𝐿= (𝑉𝑖𝑛 –𝑉𝑜𝑢𝑡)/ , 𝐷𝑇 ≤ 𝑡 ≤ 𝑇 (10)

and the inductor is discharging. The inductor voltage is shown in

figure 6. Fig. 6. Inductor Voltage Because of the steady-state inductor
principle, the average voltage VL across L is zero. Since VL has two
states, both having constant voltage, the average value is
(𝑉𝑖𝑛 𝐷𝑇 + 𝑉𝑖𝑛 −𝑉𝑜𝑢𝑡1−𝐷 𝑇)/𝑇= 0 (11)

The above expression reduced to

𝑉𝑜𝑢𝑡 =𝑉𝑖𝑛/(1−𝐷) (12)

B. Inductor current in continuous conduction The graph of iL is

shown in figure 7. Inductor Current From equation 9 and the
boundary condition ILmin=0,

Δ𝐼 =(𝑉𝑜𝑢𝑡 −𝑉𝑖𝑛 )(1−𝐷)/𝐿𝑏𝑜𝑢𝑛𝑑𝑎𝑟𝑦 𝑓=𝑉𝑖𝑛 −𝑉𝑖𝑛 (1−𝐷)/𝐿𝑏𝑜𝑢𝑛𝑑𝑎𝑟𝑦 𝑓=𝑉𝑖𝑛

𝐷/𝐿𝑏𝑜𝑢𝑛𝑑𝑎𝑟𝑦 𝑓= 2𝐼𝐿 𝑎𝑣𝑔 ,

so that

𝐿𝑏𝑜𝑢𝑛𝑑𝑎𝑟𝑦 = 𝐿𝑐𝑟𝑖𝑡 =𝑉𝑖𝑛 𝐷/2𝐼𝐿 𝑎𝑣𝑔 f=𝑉𝑖𝑛 𝐷/2𝐼𝑖𝑛 𝑓

will guarantee continuous conduction for all D. The inductor is

designed for specific scheme in this paper. . Inductor Design The
design procedure starts with the determination of the input states of
the inductor which are also the input parameters for the design. The
selection of topology, power developed Pout, switching frequency
fSW, output DC voltage Vout, minimum input voltage Vin min,
maximum input voltage Vin max, maximum temperature T, efficiency
of the inductor ηL, efficiency of the pre-regulator ηpreg are the
required parameters for the design problem. The equations used to
design the inductor are given below.

𝑃𝑡𝑜𝑡 = (1 − 𝜂𝐿)(𝑃𝑜𝑢𝑡 /𝜂𝑝 𝑟𝑒𝑔 ) 𝑊𝑎𝑡𝑡𝑠 (15)

𝑃𝑐𝑜𝑟𝑒 = 𝑃𝑡𝑜𝑡 2 = 𝑃𝑐𝑢 𝑊𝑎𝑡𝑡𝑠 (16)

Loss per core weight is given by

𝑝𝑖 = 𝑃𝑡𝑜𝑡 2 𝑤𝑡 𝑊𝑎𝑡𝑡𝑠 𝑝𝑒𝑟 𝑘𝑔 (17)

Core loss is also equal to

𝑃 = 6.5 𝑓𝑆𝑊 1.51 𝐵𝑎𝑐 1.74 𝑊𝑎𝑡𝑡𝑠 (18)

Having calculated the Lcrit and Iin we now calculate the energy storage
requirements of the inductor.

𝐸 = 0.5(𝐿𝑐𝑟𝑖𝑡 𝐼𝑖𝑛 𝑝𝑒𝑎𝑘 2 ) 𝑊𝑎𝑡𝑡𝑠 (19)

The required area product WaAc is given by

𝑊𝑎 𝐴𝑐 = 2𝐸×104 𝐵𝑚𝑎𝑥 𝐽 𝐾 𝑐𝑚2 (20)

where, J is the current density and K is the window utilization factor.

The number of turns and the air-gap required is given by the
following expressions.
𝑁 = 𝐿𝑐𝑟𝑖𝑡 𝐼𝑖𝑛 𝑐𝑟𝑖𝑡 ×104 𝐵𝑚𝑎𝑥 𝐴𝑐 (21)

𝑙𝑔 = 0.4 𝜋 𝑁 𝐼𝑖𝑛 𝑝𝑘 × 10−4 𝐵𝑚𝑎𝑥 – 𝑙𝑚 𝜇 Δ 𝑐𝑚 (22)

where lm is the magnetic mean length and μΔ is the incremental

magnetic permeability of the core material. The core can be selected
using the catalogue from the manufacturers. The details to to be
obtained from the manufacturers are the core dimensions a, b, c, d,
e, f, lm, area Ac, surface area SA. Refer to fig. 8 for the dimensions of
the core. The conductor area and the losses can be calculated by
taking current density and resistivity of copper into account.

METHODS FOR MPPT

There are many methods used for maximum power point tracking a
few are listed below:

• Perturb and Observe method

• Incremental Conductance method

• Parasitic Capacitance method

• Constant Voltage method

• Constant Current method

Perturb and Observe method

This method is the most common. In this method very less number
of sensors are utilized [5] and [6]. The operating voltage is sampled
and the algorithm changes the operating voltage in the required
direction and samples𝑑𝑃/𝑑𝑉. If 𝑑𝑃/ 𝑑𝑉 is positive, then the
algorithm increases the voltage value towards the MPP until 𝑑𝑃/
𝑑𝑉is negative. This iteration is continued until the algorithm finally
reaches the MPP. This algorithm is not suitable when the variation in
the solar irradiation is high. The voltage never actually reaches an
exact value but perturbs around the maximum power point (MPP).

Incremental Conductance method

This method uses the PV array's incremental conductance 𝑑𝐼/𝑑𝑉to
compute the sign of𝑑𝑃/𝑑𝑉. When 𝑑𝐼/𝑑𝑉is equal and opposite to the
value of I/V (where 𝑑𝑃/𝑑𝑉 = 0) the algorithm knows that the
maximum power point is reached and thus it terminates and returns
the corresponding value of operating voltage for MPP. This method
tracks rapidly changing irradiation conditions more accurately than
P&O method. One complexity in this method is that it requires many
sensors to operate and hence is economically less effective [5] and
[6].

P=V*I

Differentiating w.r.t voltage yields;

𝑑𝑃/𝑑𝑉 = (𝑉∗𝐼)/𝑑𝑉 (5)

𝑑𝑃/𝑑𝑉 = 𝐼 ∗ (𝑑𝑉/𝑑𝑉)+ 𝑉 ∗ (𝑑𝐼/𝑑𝑉) (6)

𝑑𝑃/𝑑𝑉 = 𝐼 + 𝑉 ∗ (𝑑𝐼/𝑑𝑉) (7)

When the maximum power point is reached the slope 𝑑𝑃/𝑑𝑉 = 0 .

Thus the condition would be;

𝑑𝑃/𝑑𝑉 = 0 (8)

𝐼 + 𝑉 ∗ (𝑑𝐼/𝑑𝑉) = 0 (9)

𝑑𝐼/𝑑𝑉 = − 𝐼/𝑉 (10)

Parasitic Capacitance method
This method is an improved version of the incremental conductance
method, with the improvement being that the effect of the PV cell's
parasitic union capacitance is included into the voltage calculation
[5] and [6].

Constant Voltage method

This method which is a not so widely used method because of the
losses during operation is dependent on the relation between the
open circuit voltage and the maximum power point voltage. The
ratio of these two voltages is generally constant for a solar cell,
roughly around 0.76. Thus the open circuit voltage is obtained
experimentally and the operating voltage is adjusted to 76% of this
value [8].

Constant Current Method

Similar to the constant voltage method, this method is dependent on
the relation between the open circuit current and the maximum
power point current. The ratio of these two currents is generally
constant for a solar cell, roughly around 0.95. Thus the short circuit
current is obtained experimentally and the operating current is
adjusted to 95% of this value [8]. The methods have certain
advantages and certain disadvantages. Choice is to be made
regarding which algorithm to be utilized looking at the need of the
algorithm and the operating conditions. For example, if the required
algorithm is to be simple and not much effort is given on the
reduction of the voltage ripple then P&O is suitable. But if the
algorithm is to give a definite operating point and the voltage
fluctuation near the MPP is to be reduced then the IC method is
suitable, but this would make the operation complex and more
costly.

FLOW CHART OF MPPT ALGORITHMS

The most widely used method for maximum power point racking are
studied here. The methods is

Figure 4.2: Flow chart of incremental conductance method

These two algorithms are implemented using the Embedded

MATLAB function of Simulink, where the codes written inside the
function block are utilized to vary certain signals with respect to the
input signals.
Result of simulation of convertor
MULTILEVEL INVERTER TOPOLOGY WITH REDUCED NO. OF
SWITCHES

A multilevel inverter is a power electronic system that synthesizes a desired

output voltage from several levels of dc voltages as inputs. Recently, multilevel
power conversion technology has been developing the area of power electronics
very rapidly with good potential for further developments. As a result, the most
attractive applications ofthis technology are in the medium to high voltage
ranges . A multilevel converter not only achieves high power ratings, but
also enables the use of renewable energy sources. Renewable energy sources
such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel
converter system for a high power application. The advantages of multilevel
converters is their smaller output voltage step, which results in high voltage
capability , lower harmonic components, lower switching losses, better
electromagnetic compatibility, and high power quality.Also it can operate at
both fundamental switching frequency and high switching frequency PWM. It
must be noted that lower switching frequency usually means lower
switching loss and higher efficiency

The results of a patent search show that multilevel inverter circuits have been
around for more than 25 years. Today, multilevel inverters are extensively used
in medium voltage levels with high-power applications ,applications include use
in laminators, pumps, conveyors, compressors, fans, blowers, and mills.
Subsequently, several multilevel converter topologies have been developed

Three different topologies have been proposed for multilevel inverters:

cascaded multi cell with separate dc sources, diodeclamped (neutral-clamped)
and capacitor-clamped (flyingcapacitors) . Each of these topologies has a
different mechanism for providing the voltage level. The first topology
introduced was the series H-bridge design but several configurations have been
obtained for this topology as well .Since this topology consists of series power
conversion cells,the voltage and power levels may be scaled easily. The
Hbridge topology was followed by the diode-clamped converter that utilized a
bank of series capacitors . The flyingcapacitor topology followed diode-
clamped after few years. Instead of series connected capacitors, this topology
uses floating capacitors to clamp the voltage levels . H-bridge inverters have
isolation transformers to isolate the voltage source but they do not need either
clamping diode or flying capacitor inverters.
CASCADED H-BRIDGE MULTILEVEL INVERTER
STRUCTURE

Conventional cascaded multilevel inverters is one of the most important

topologies in the family of multilevel and multi-pulse inverters . The cascade
topology allows the use of several levels of DC voltages to synthesize a desired
AC voltages. The DC levels are considered to be identical since all of them are
either a fuel cells or photovoltaics, natural choice, batteries, etc. Which is
requires least number of components when compared to diode-clamped and
flying capacitors type multilevel inverters and no specially designed transformer
is needed as compared to multi pulse inverter . A cascaded multi-level inverter
consists of a number of Hbridge inverter units with separate dc source for each
unit and it is connected in cascade or series as shown in Fig. 1. The full-bridge
(H-bridge) topology shown in Fig. 1 is used to synthesize a three unique output
voltages (+Vdc ,−Vdc and zero). by connecting the dc source to ac output side
by different combinations of the four switches S1, S2, S3, and S4. The overall
output voltage of multilevel inverter is given by:
V0 = V01 + V02 + V03 + V0n

Configuration of cascaded multilevel inverter

If all dc voltage sources in Fig. 1 equal to Vdc, the inverter is known as
symmetric multilevel inverter and The number of output phase voltage levels
Nstep in a cascade inverter is defined by :

Nstep = 2n +1 (2)

Where n is the number of separate dc sources (photovoltaic modules or fuel

cells) or the number of full-bridges and the maximum output voltage (Vomax) of
this n cascaded multilevel inverter is:

Vomax = n Vdc (3)

For asymmetric cascaded multilevel inverter, DC voltage sources of different

cells are non-equal. Asymmetric inverter provides an increased number of
voltage levels for the same cells number than its symmetric counterpart. If the
DC voltages of individual cells Fig. 1 are selected according to a geometric
progression with a factor of two or three .For n cascaded multilevel inverters,
then the number of voltage steps count is:

Nstep = 2n+1 – 1 if Vj = 2j-1 Vdc for j = 1,2,……. n 1 (4)

Nstep = 3n+1 – 1 if Vj = 3j-1 Vdc for j = 1,2,…. n 1 (5)

The maximum output voltages of these n cascaded multilevel inverters are:

Vomax = (2n – 1 )Vdc if Vj = (2j-1 )Vdc for j = 1,2,…. n (6)

Vomax = ((3n – 1 )/2 )Vdc if Vj = (3j-1)Vdc for j = 1,2,…..n (7)

Comparing the Eqs. (2)–(7), it can be seen that the asymmetric multilevel
inverters can generate more voltage steps and higher maximum output voltage
with the same number of bridges.

THE PROPOSED MULTILEVEL INVERTER

As the most important part in multilevel inverters are switches which define the
reliability, circuit size, cost, installation area and control complexity. The
number of required switches against required voltage levels is very important
element in the design. To provide a large number of output levels without
increasing the number of bridges, a new power circuit topology and a suitable
method to determine the dc voltage sources level for symmetrical and
asymmetrical multilevel converter are proposed in this paper. The proposed
circuit also provides decreased voltage stress on the switch by the series
configuration of the applied bidirectional switches. This subsequently enhances
the immunity from overvoltage and dv/dt breakdown. Fig .2 shows a
configuration of the proposed symmetrical multilevel inverter. In case of Fig. 3,
it generates 11- level shaped output voltage wave.

Suggested basic topology for a symmetrical inverter

Typical output waveform of 11- level

For increasing output voltage levels one power supply shall be added with one
switches only. This proposed method is different from the method in [17], since
it has less number of bidirectional switch and different from the conventional
inverters and method in [22], since it has less number of switches.

The effective number of output voltage steps (Nstep) in symmetric multilevel

inverter is:

Nstep = 2n -1 (8)

Where n represented the number of dc supplies and the maximum output

voltage (Vomax) of this n cascaded multilevel inverter is:

Vomax = (n-1)Vdc (9)

Vo can be increased by connecting the N basic circuit given in Fig 2 in series as

shown in Fig. 4. In this case only two switch of each unit turns on for the
operation of the converterat any given time [23].

N basic unit connected in series .

Fig. 5 shows a configuration of the proposed new basic element which used
for this implementation of single-stage asymmetrical inverter. The circuit
consists of k many dc voltage sources (cell) and it has two bidirectional
switches only.
According to Fig. 5, this topology is different from the conventional
inverters and the method in [22] since it has fewer of switches. While the
proposed topology is designed to produce the total dc by connecting the
modulation dc sources (Vdcl) to only one of remaining supplies (Vdc2
…..Vdck ), the design presented in [23] is based on establishing a series
connection of any number of the supplies Vdcl to Vdck. The new design
applies less number of bidirectional switches which leads to reduced
losses and overcomes the asymmetrical voltage step problem.
 New basic element (one stage) of asymmetric multilevel inverter with Kdc sources (cells).

DC sources should be chosen according to the equation below and arrangement

to produces output voltage without losing any level. Also For increasing output
voltage levels one power supply shall be added with one switch only. The dc
voltage sources are suggested to be chosen according to the following
algorithm:

Vdc1 = Vvdc (10-a)

Vdcj = 2(j-1)Vvdc if j = 2,3,…..k (10-b)

Contrary to method [23] by using this equation all levels can be obtained
without losing any level which reduces THD at the output. The number of
output voltage levels in a cascaded multi-level inverter is then:

Nstep = (2Vdck/Vdc1) +3 (11)

The maximum output voltage Vomax of this new topology is:

V0max = Vdck +Vdc1 (12)

 THE MODULATION SCHEME

There are several modulation strategies possible for multilevel inverters. This
paper uses multi-level triangular waves generation to generate the
modulating signals for the inverter switches as derived in [24] [25]. It can be
a useful solution for pulse generation for this topology. This technique in [26]
is called carrier redistribution (CR) technique. This technique is derived from
the triangular carrier that has individually the lowest switching frequency
among the multi- level PWM methods and it provides low harmonic distortion
[26]. It results small rippled current and the smallest harmonics in output
voltage and can be easily expanded to any level [26], [27].

Triangular comparison with sine wave for 7-level inverter

 SIMULATION RESULT

Fig. . Simulated input voltage to filter Vin. and corresponding Fourier spectrum.
Fig.. Simulated output voltage (VL). and corresponding Fourier spectrum.

Fig. . Output current (IL) and corresponding Fourier spectrum.

Fig.. Simulated input voltage to filter Vin and corresponding Fourier spectrum..

Fig. Simulated output voltage (VL) and corresponding Fourier spectrum..

Fig. Output current (iL) and corresponding Fourier spectrum.