IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.
2, FEBRUARY 2013
A Vector Space Decomposition Based Space Vector
PWM Algorithm for a Three-Level Seven-Phase
Voltage Source Inverter
Obrad Dordevic, Student Member, IEEE, Emil Levi, Fellow, IEEE, and Martin Jones, Member, IEEE
Abstract—This paper presents a novel modulation strategy
for a seven-phase three-level inverter, aimed at variable-speed
drive applications. Developed space vector pulsewidth modulation
(SVPWM) strategy is based on vector space decomposition (VSD)
approach and an analysis of multidimensional space vector projec-
tions in mutually orthogonal planes. The algorithm represents an
extension of a recently developed five-phase three-level SVPWM
algorithm and is considerably more complex, due to the existence
of three mutually orthogonal planes in a seven-phase system. The
difficulties of generalization of space vector strategies, which stem
from the nature of the multiphase systems, are highlighted. In-
creasing the number of phases from five to seven increases the
number of switching states from 35 = 243 to 37 = 2187 and the
number of orthogonal planes from two to three. This considerably
affects the complexity of the offline calculations. However, the final
implementation of the algorithm is simple. Developed SVPWM al-
gorithm is compared to an equivalent carrier-based strategy and
it is shown that they yield identical performance. The complex-
ity of the algorithms for real-time implementation is compared.
Simulation and experimental results, obtained using neutral-point
clamped inverter, verify the theoretical developments.
Index Terms—Carrier-based pulsewidth modulation (PWM),
seven-phase, space vector pulsewidth modulation (SVPWM),
three-level, vector space decomposition (VSD).
I. INTRODUCTION
NVESTIGATION of multiphase machines (with more than
I three phases), supplied from multilevel inverters, has re-
cently started attracting more attention, due to numerous good
features offered by such topologies [1]. Higher number of phases
and more levels in the inverter output leg voltage overcome
component voltage and current limits. Hence, multilevel multi-
phase structures represent an attractive solution for high power
applications.
The assumed structure of an ac machine in this paper is a
symmetrical seven-phase machine with sinusoidally distributed
Manuscript received December 22, 2011; revised April 11, 2012; accepted
May 24, 2012. Date of current version September 27, 2012. This work was
supported by the National Priorities Research Program (NPRP) under Grant
4-152-02-053 from the Qatar National Research Fund (a member of Qatar
Foundation). The statements made herein are solely the responsibilities of the
authors. Recommended for publication by Associate Editor J. R. Rodriguez.
The authors are with the School of Engineering, Technology and Mar-
itime Operations, Liverpool John Moores University, Liverpool, L3 3AF, U.K.
(e-mail: o.dordevic@2009.ljmu.ac.uk; e.levi@ljmu.ac.uk; m.jones2@ljmu.
ac.uk).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2012.2203148
0885-8993/$31.00 © 2012 IEEE
637
windings. A modulation strategy, applicable in conjunction with
this machine type, is required to produce only the fundamental
(sinusoidal) component in the output phase voltage, without any
low-order harmonics. Two main modulation concepts are in gen-
eral carrier-based and space vector techniques. The extension
of carrier-based strategies from two-level to higher number of
levels is well established for three-phase case [2]. Since carrier-
based techniques are independent of the number of phases, the
same carrier-based techniques as for three-phase case can be
directly applied to multilevel multiphase systems. Due to the
simplicity, they are usually the preferred choice. The existing
discussions of carrier-based strategies for control of multilevel
multiphase systems are predominantly related to the capacitor
voltage balancing of the neutral-point clamped (NPC) voltage
source inverter (VSI) for a five-phase passive load [3], [4].
As far as the space vector approach is concerned, the algo-
rithm of [5] is widely accepted as general for the three-phase
multilevel inverter. However, it leaves 1 degree of freedom un-
used, which enables a further optimization of the algorithm, as
demonstrated in [6]. A simple extension from three-phase to
multiphase space vector pulsewidth modulation (SVPWM) is
not possible, in contrast to the carrier-based approach. With an
increase in the number of phases, the number of space vectors
increases and, even more importantly, the analysis cannot be
conducted in a single (α–β) plane, as for a three-phase sys-
tem. Assuming that the phase number n is odd, the number of
planes that has to be considered simultaneously is (n − 1)/2
(star-connected load with isolated neutral point is assumed).
The existing SVPWM strategies for multilevel multiphase VSIs
apply to particular cases. The most frequently analyzed topol-
ogy is the five-phase three-level system. In the initial attempts of
using space vector approach to control this topology, the prin-
ciple of three-phase multilevel SVPWM was followed. Thus,
in [7], the first sector in the α–β plane was divided into three
triangular subsectors and only three space vectors per switching
period were used. This concept, however, does not consider the
second plane (x–y) and leads to the large amount of low-order
harmonics in this plane. This is so since the number of applied
space vectors in a switching period must equal the number of
phases. The same algorithm was applied for direct torque control
of two series-connected five-phase induction machines in [8].
Similarly, only the first plane was also considered in [9] and [10]
and less than five space vectors were used per switching period,
with the same consequences.
The requirement that the number of space vectors per switch-
ing period must equal the number of phases was respected
638 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013

Fig. 1. Analyzed topology of a three-level seven-phase NPC VSI supplying a machine.

in [11]–[14]. However, although the algorithm was presented as and prove identical operation of the presented space vector mod-
the space vector technique, it does not use vector space decom- ulation and carrier-based modulation with “double injection,”
position (VSD) that is a foundation for this approach. Instead, are presented in Section III. The particular realization that re-
the approach is based on the consideration of the multidimen- duces the execution time of the SVPWM algorithm is elaborated
sional space. The algorithm of [11] is in essence equivalent to and the computation time of the algorithms is compared. Con-
the carrier-based approach with level-shifted carriers, written in clusions are given in Section IV.
the matrix form. The application of a single-phase modulator to
five-phase three-level system was discussed in [15]. However, II. SPACE VECTOR ALGORITHM
the presented concept of single-phase modulator is also equiva-
The analyzed topology is the seven-phase three-level NPC
lent to the carrier-based approach with level-shifted carriers.
VSI, shown in Fig. 1. The discrete output levels of the inverter
The algorithm in [16] for five-phase three-level VSI is the first
legs can be 0, Vdc /2 and Vdc , when referenced to the dc-bus
one that develops SVPWM for multilevel multiphase VSIs using
negative rail. Using normalization, these levels are further de-
VSD approach and, therefore, considers space vector projections
noted as 0, 1, and 2, respectively. As already noted, the SVPWM
in all planes (two in five-phase case). A suitable modification of
algorithm is a modified version of the algorithm of [18]. The
the algorithm of [16] was further suggested in [17], where the
algorithm is divided into steps and each of the steps is described
comparison of the SVPWM algorithms with some carrier-based
in what follows.
techniques was presented for a five-phase three-level VSI. An
SVPWM algorithm for a three-level seven-phase VSI, based on
A. Three-Level Seven-Phase VSD
the VSD approach, was for the first time introduced in [18], by
extending the algorithm of [16]. For the space vector analysis, the space in which variables
This paper builds on the previous work reported in [17] map has to be defined in the first place. Commonly used trans-
and [18]. To start with, the algorithm of [18] is revisited and formation in this field [19] that defines space vectors in complex
it is then modified in the same manner as the three-level five- form for a seven-phase system is
phase SVPWM in [17]. Since the results in [17] show the ⎡ ⎤ ⎡ ⎤ ⎡ ⎤
X α −β 1 a a2 · · · a6 xa
equivalence between the modified SVPWM algorithm and a
⎢X ⎥ 2 ⎢ ⎢ 1 a a · · · a ⎥ ⎢ xb ⎥
2 4 12 ⎥ ⎢ ⎥
specific carrier-based algorithm with “double injection” for the ⎢ x 1 −y 1 ⎥
⎢ ⎥= ·⎢ ⎥ · ⎢ . ⎥ (1)
⎣ X x 2 −y 2 ⎦ 7 ⎢ 1 a a ··· a ⎥ ⎢ . ⎥
3 6 18
five-phase VSI, the same principle is applied to the carrier- ⎣ ⎦ ⎣ . ⎦
based three-level seven-phase pulsewidth modulation (PWM). 1 1 1 1
X0 ··· xg
Detailed simulation and experimental works using NPC inverter 2 2 2 2
and star-connected R–L load confirm the validity of the theo- where a = ej ·2π / 7 , [xa xb . . . xg ]T represents vector of cer-
retical considerations and prove that the two considered PWM tain variables of the system in terms of phase values, while
techniques yield the same performance. Finally, the complexity [X α −β X x1−y 1 X x2−y 2 X0 ]T represents vector of the
of the algorithms for online implementation is addressed. It is variables in the transformed space (i.e., multidimensional space
important to note that the algorithms are applied here without vector components in the 2-D planes). This transformation can
any additional means for capacitor voltage balancing. be applied to any set of symmetrical phase variables, such as
This paper is organized as follows. In Section II, the SVPWM reference phase voltages vk∗ , reference leg voltages vK ∗
, output
algorithm of [18] is summarized and the modification, based phase voltages vk , output leg voltages vK , currents, etc. The
on [17], is introduced. The difficulties encountered in the pre- axes of the new space (α, β, x1 , y1 , x2 , y2 and 0) are defined
liminary offline calculations are highlighted. Simulation and ex- with (1), and space vectors are determined with the projections
perimental results, which validate the theoretical considerations, onto each of these axes. Nature of the transformation is such
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM
Fig. 2. All 2187 states giving 2059 space vectors projections in the first (α–β)
plane for the three-level seven-phase system.
that these axes form mutually orthogonal 2-D planes and the
transformation represents the VSD.
The aim of the SVPWM algorithm is to obtain the desired
639
switching states in the α–β plane. By considering phase volt-
age reference signals (2) in time domain, one can see that
they change order each ωt = 2π/14 radians, where crossover
of the signals takes place. For example, in the first sector,
0 ≤ ωt < 2π/14, the order of reference phase signals is
va∗ ≥ vb∗ ≥ vg∗ ≥ vc∗ ≥ vf∗ ≥ vd∗ ≥ ve∗ . The instantaneous projec-
tion of these references into α–β plane is at V distance from the
origin and spans the angle equal to ωt with the α-axis. This
means that the crossover points in the time domain between
phase voltage sinusoidal references correspond to subdivision
into sectors in the α–β plane (see Fig. 2). Correlation between
the order of the reference phase voltages and the order of output
leg voltages in each sector would be useful for the elimination
of some switching states. However, it should be noted that ref-
erence phase voltages vk∗ and output leg voltages vK are of the
different nature (continuous and discrete signals), and they are
∗
linked through the reference leg voltages vK . Hence, the cor-
relation between the order of reference phase voltages vk∗ and
output leg voltages vK has to be established step-by-step. First,
∗
it will be shown that desired leg voltages vK always follow
∗
the order of reference phase voltages vk . Next, the conditions
when modulated discrete leg voltages vK follow the order of the
∗
continuous reference leg voltages vK will be given.
Reference phase and reference leg voltages are related
through

G
1
output. For the analyzed configuration, the vector of desired vk∗ (t) = vK
∗
(t) − ∗
vK ∗
(t) = vK (t) − C(t) (3)
n
phase voltages is a set of sinusoidal signals mutually phase K =A
shifted by 2π/7 radians

 where index K identifies the leg and takes the same values as
2π the load phase index k (1 to 7). It is clear from (3) that the
vk∗ = V · cos ωt − (k − 1) (2)
7 order of reference phase voltages is the same as the order of
reference leg voltages at all times. The same equation with
where k = 1 to 7 corresponds to phases a to g. PWM can be
the same conclusion can be given for obtained output leg and
realized by averaging output leg voltages vK in order to obtain
∗ phase voltages. Furthermore, if vi∗ ≥ vj∗ , i.e., vI∗ ≥ vJ∗ , during
reference leg voltages vK , in each switching period Ts . The only
the switching period Ts and if symmetrical PWM is utilized in
difference between reference phase voltages vk∗ and reference
∗ conjunction with the principle of minimum losses (application
leg voltages vK is in the zero-sequence component (common
of two nearest leg voltage levels), then the produced digital
mode voltage). After the application of (1) to the set of reference
values of output leg voltages will satisfy vI ≥ vJ . Thus, under
phase and reference leg voltages, one gets that in the resulting
the mentioned conditions, all four sets of voltages vk∗ , vK ∗
, vk ,
space vectors the only difference is in the projection onto the 0-
and vK will have the same order-per-sector.
axis. Since load neutral point is assumed isolated, only the space
Taking again the first sector as an example, one can say that
vectors of vk∗ and vK in the first three planes have to be consid-
obtained output leg voltages have to follow the same order as
ered. This is the common feature of the space vector algorithms.
the reference phase voltages, i.e., vA ≥ vB ≥ vG ≥ vC ≥ vF
There are 37 = 2187 possible switching states for the leg
≥ vD ≥ vE . This means in practice that space vectors whose
voltages and, according to [20], 37 − 27 = 2059 different phase
projections belong to the first sector in the α–β plane but do not
voltage space vectors. For the sake of illustration, only projec-
satisfy this order-per-sector law for obtaining sinusoidal output
tions of the space vectors in the first, α–β plane [application of
can be eliminated. One such example is switching state 2120012
the first row of (1)] are shown in Fig. 2. The reference voltages
that belongs to the first sector in the α–β plane, but does not
in (2) give the reference phase voltage in the first plane only,
satisfy required ordering for the first sector, since vB < vC .
while the references in the other two planes are equal to zero.
The number of switching states of interest can be significantly
reduced in this way, from 2187 to 297. The projection of remain-
B. Order-per-Sector Law and Reduction of the Number
ing 297 switching states into the α–β plane is shown in Fig. 3.
of Switching States Switching states are shown using decimal representation. For
A simple method for the elimination of the switching states example, switching state 2210002 in decimal notation is 2027
that are not useful was presented in [16]. The elimination is (since 2027 = 2·36 + 2·35 + 1·34 + 0·33 + 0·32 + 0·31 +
based on the comparison of the time-domain relationships and 2·30 ).
640
Fig. 3. Remaining switching states after application of the order-per-sector
law, in the α–β plane.
C. Determination of Possible Switching Sequences
Switching sequence represents the set of switching states
that should be applied during one switching period Ts . The
selection of switching states is simplified by the reduced number
of switching states after the application of the order-per-sector
law. For obtaining all reference values on average during each
switching period, switching sequence has to contain n space
vectors. Also, for loss minimization purposes, it is assumed
that each leg once increases and once decreases its level for a
single output level during the switching period. Symmetrical
sequences are desirable, so it is assumed that in the first half of
the switching period all legs increase their level, while in the
second half all legs decrease the level.
One interesting graphical solution for switching sequence de-
termination is given in [18], where transitions between switching
states are represented graphically. As an example, transition for
one level-up in the third leg (leg C) is taken. That means that
transition from [X1 X2 X3 X4 X5 X6 X7 ]T to [X1 X2 X3 +1 X4
X5 X6 X7 ]T switching state has taken place. With regard to the
transition in the α–β plane, this represents the distance between
projections of these two switching states. Using the first (α–β)
row of the transformation matrix (1), distance between these
two switching states in the α–β plane, i.e., the transition for a
single level in increasing direction, of the third leg is defined as
follows:
2 patterns. Therefore, switching sequences are not yet completely
Δ3 X α −β = · [X1 + a1 X2 + a2 (X3 + 1) + · · · + a6 X7 ]
7 determined at this stage. Also, some of the patterns cannot pro-
2 vide cancellation (i.e., zeroing of the average voltage) in the x–y
− · [X1 + a1 X2 + a2 X3 + · · · + a6 X7 ]
7
2 2 2 tion. These two problems will be addressed in the following two
= · a = · ej (2π /7)(3−1) . (4)
7 7
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013
With simple generalization of (4), this means that transition for
one level in the Kth leg maps into 2/7 scaled unit vector inclined
for 2π/7·(k − 1) radians with respect to the α-axis. The start
of the transition vector is in the first switching state. Single-
level increasing transitions in the α–β plane for all seven legs
are shown with appropriate arrows in Fig. 4(a) (if of interest,
the representation of the transition in the other planes can be
determined in the same way). The first sector of the α–β plane,
with reduced number of switching states according to the order-
per-sector law, and with all possible transitions, is shown in
Fig. 4(b).
As noted, it is assumed that in the first half of the switching pe-
riod only single-level increasing transitions occur and transition
takes place in each leg. For graphical construction of the first half
of the switching sequence all seven arrows from Fig. 4(a) must
be used (transition takes place in each leg) and each of them must
be used only once (transitions are for a single level). The last (the
eighth) switching state will be [X1 + 1 X2 + 1 X3 + 1 X4 + 1 X5
+ 1 X6 + 1 X7 + 1]T , and, according to (1), one gets that it has
the same projection into all planes as the first switching state, i.e.,
it is a redundant switching state. Thus, the transition trajectory,
which corresponds to the first half of the switching sequence,
forms in the α–β plane a closed oriented seven-angle polygon.
One such polygon is shown with oversized arrows in Fig. 4(b).
These polygons will be called “patterns” further on. It is clear
that the starting switching state of the sequence that forms a pat-
tern cannot be arbitrarily chosen; it has to be redundant. Next,
the starting switching sequence must not contain the highest
level (in three-level VSI this is 2), since an increase by one level
in that leg (increasing transitions are assumed to take place in the
first half of the switching period, Ts ) would lead to leg level 3,
which is not possible. Finally, eight potential starting switching
states of switching sequences are shown underlined in Fig. 4(b).
In the second half of the switching sequence, switching states
appear in the opposite order, so the orientation of the polygon is
opposite.
Determination of all closed seven-angle patterns is solved us-
ing MATLAB code. There are 64 closed patterns in the first sec-
tor, which is significantly more than in the five-phase case [16],
where there are only 16 patterns, and where they were deter-
mined manually and without use of graphical interpretation of
(4). However, the switching sequences are not uniquely deter-
mined with the switching patterns, since some of the patterns
contain more potential beginnings of the switching sequence
and correspond to more sequences. For example, the pattern in
Fig. 4(b), shown with oversized arrows, contains five potential
starting (underlined) switching states, i.e., there are five pos-
sible switching sequences that correspond to this pattern. So,
one can say that there is a switching sequence redundancy per
pattern. A total of 128 switching sequences correspond to all 64
planes. This means that each pattern has its region of applica-
sections.
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM 641

Fig. 4. (a) Graphical representation of single-level increasing transition in the α–β plane, for each leg. (b) The first sector in α–β plane with reduced number of
switching states and with all possible single-level increasing transitions.

D. Dwell Time Calculation and Sector Partitioning in the x–y plane where the reference voltage is zero. If the x–y
pattern is placed at the same side of the line that passes through
Dwell times are determined by space vector projections rather
than by particular switching state values. So, all redundant the origin, then this pattern cannot lead to the desired zero av-
switching sequences that correspond to the same pattern have erage value in this plane, and can be omitted from the further
analysis. In seven-phase case this method is not sufficient for the
the same dwell times for the space vectors at appropriate posi-
tions. The dwell times can be calculated in the standard way, reduction of the possible switching pattern number. To be more
from the volt-second balance equations in space vector domain. precise, only 18 out of 64 patterns can be eliminated using this
graphical method. The problem is that there are patterns with
For the seven-phase case, this equation is given as follows:
which cancellation in both of x–y planes can be achieved inde-
⎡ ⎤ ⎡ ⎤ ⎡⎤ pendently, but the solutions do no not overlap, meaning that x–y
T1 Vα 1 Vα 2 Vα 3 ··· Vα 7 −1 Vα∗ components cannot be cancelled in both planes at the same time.
⎢ T2 ⎥ ⎢ Vβ 1 Vβ 2 Vβ 3 ··· Vβ 7 ⎥ ⎢ V∗ ⎥ This is indeed one of the major additional difficulties, brought
⎢ ⎥ ⎢ ⎢ β ⎥
⎥
⎢ ⎥ ⎢ ⎢ ∗ ⎥
⎥
⎢ T3 ⎥ ⎢ Vx 1 1 Vx 1 2 Vx 1 3 · · · ⎢ Vx 1 ⎥
Vx 1 7 ⎥ in by the higher number of phases, compared to [16]. The com-
⎢ ⎥ ⎢ ⎢ ∗ ⎥
⎥ plexity of the algorithms for five and seven phase three-level
⎢ T4 ⎥ = ⎢ Vy 1 Vy 1 2 Vy 1 3 · · · ·⎢
Vy 1 7 ⎥ ⎥
⎢ ⎥ ⎢ 1 ⎢ Vy 1 ⎥ · Ts
⎥ case is highlighted in Table I (the table also includes informa-
⎢ ⎥ ⎢ ⎢ ∗ ⎥
⎥
⎢ T5 ⎥ ⎢ Vx 2 1 Vx 2 2 Vx 2 3 · · · ⎢ Vx 2 ⎥
Vx 2 7 ⎥ tion on relevant algorithm aspects that are yet to be addressed).
⎢ ⎥ ⎢ ⎢ ∗ ⎥
⎥
⎣ T6 ⎦ ⎣ Vy 2 1 Vy 2 2 Vy 2 3 · · · ⎣ Vy ⎦
Vy 2 7 ⎦ From Table I and from the explained algorithm steps, one can
2

T7 1 1 1 ··· 1 1
(5)
where Vγ i is the projection of the ith leg voltage space vector
of the selected pattern onto the axis γ, where γ = α, β, x1 ,
y1 , x2 , y2 , and i = 1 to 7, while Vγ∗ is the projection of the
reference voltage space vector onto γ-axis. Time intervals Ti , i
= 1 to 7, are times of application of the selected space vectors in
the pattern. Since generation of the sinusoidal reference voltage
is desired, one has in (5) Vα∗ = V cos(ωt), Vβ∗ = V sin(ωt),
∗
Vx1 = 0, Vy∗1 = 0, Vx2∗
= 0, Vy∗2 = 0.
An idea, related to the sector partitioning, has been introduced
in [16]. If the set of vectors Vγ i in (5) is already chosen, i.e.,
if the pattern is selected, the equation will not have physically
acceptable solution for arbitrary values of the reference, since
the dwell times of each switching state Ti must be in the range
from 0 to Ts . This means that each pattern has its region of
application; division of the sectors into subsectors can be done
in this manner. All 64 available patterns in the first sector must
be analyzed in this way.
In the five-phase case one intermediate step is sufficient to
omit some patterns from the analysis in advance [16]. This pro-
cess includes graphical analysis of the projections of the patterns
conclude that the algorithm complexity will further increase for
higher number of phases and higher number of levels.
The problem of sector partitioning is solved using MATLAB.
The program solves (5) for each of 64 (i.e., 64 −18 = 46)
switching patterns. The column matrix with reference values
in (5) is [V·cos(ϕ) V·sin(ϕ) 0 0 0 0 1]T , as already stated. The
square matrix in (5) contains projections onto α, β, x1 , y1 , x2 , and
y2 axes of all the seven space vectors that form a selected pattern.
For the selected pattern, program increases in incremental steps
values of V and ϕ gradually covering full region of the α–β
plane. If the solution of (5) exists for temporary pair of V and
ϕ, and if all the dwell times T1 to T7 are in the range from 0
to Ts , then the program plots a dot at V·ej ϕ position in the α–β
plane. This means that the current pair of V and ϕ (plotted dot)
belongs to the region of applicability for the selected pattern.
All pairs of V and ϕ (all plotted dots) represent the region
of application of the selected pattern. As an example of the
output of this code, Fig. 5 shows the area that is covered by
the pattern shown with oversized arrows in Fig. 4. Note that
the graphical method for the elimination of those patterns that
cannot provide cancellation in the second or in the third plane
is not necessary because these patterns will be recognized and
642
TABLE I
COMPARISON OF THE OFFLINE COMPLEXITY FOR THE FIVE-PHASE AND SEVEN-PHASE THREE-LEVEL SVPWM ALGORITHMS
Fig. 5. Plot from the MATLAB code: area that is encompassed by oversized
arrows in Fig. 4.
Fig. 6. Division of the first sector into subsectors.
eliminated anyway by this numerical procedure (executed by
the MATLAB program). For these patterns the solution of (5)
does not exist.
One finds in this way that only 18 out of 64 patterns in the
first sector have physically possible solution of (5) (solution
exists and all space vector dwell times are in the range from
0 to Ts ). These 18 patterns should not be confused with 18
patterns that can be eliminated graphically. Regions of appli-
cation of all of these 18 patterns are shown in Fig. 6. Partition
of the first sector into subsectors is obtained in this way. The
problem is solved numerically; however, analytical values for
subsector borders are desirable. One can see that borders are
straight lines and they form angles of 2 · 2π/14, 3 · 2π/14,
. . ., 6 · 2π/14 with the α-axis. The border of the subsector 1
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013
in Fig. 6 could be obtained analytically by solving (5) (which
looks too complicated), or by using the fact that this subsec-
tor is determined by the pattern to which the switching se-
quence corresponds: 00000000–1000000–1100000–1100001–
1110001–1110011–1111011–11111111, which is one of eight
redundant switching sequences for this pattern. This sequence
is specific since it contains only zeros and ones. This means that
it is obtainable by an equivalent two-level inverter (with halved
dc-bus value). Thus, one can say that the line AA represents
the border between two-level and three-level operation of the
inverter. The length of line OA is one-half of the value of the
maximum modulation index for the two-level seven-phase in-
verter (mm ax7,2 ), since the value of the dc-bus voltage of the
equivalent inverter is halved. If the modulation index m is de-
fined as the ratio of the fundamental peak of the phase voltage
over the Vdc /2, then, using analytical value for mm ax 7,2 [21],
one gets that the length of OA is given with
1 Vdc Vdc 1
OA = · mm ax 7,2 · = · . (6)
2 2 4 cos(π/14)
Since all angles are known, analytical values for all other lengths
in Fig. 6 can be determined using (6) and some geometry.
E. Switching Sequence Optimization
As already mentioned, each pattern can be realized with more
than one sequence. As the result of the previous step, it follows
that only 18 patterns (with corresponding 56 sequences) have
to be analyzed further. The basic optimization criterion is the
minimization of switching losses. So, it is desirable that all
subsector sequences have the same starting switching state, if
possible, to avoid additional switching when reference changes
subsector. Also, according to [16], more desirable sequences,
for better voltage balancing of dc-bus capacitor voltages, are
those that contain more “ones.” Switching state denoted with
“1” represents output voltage of inverter leg of Vdc /2. In that
case, for the analyzed NPC inverter configuration, output of
the leg is determined by the dc-bus mid-point so that the more
“ones” there are in the sequence (which encompasses all the
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM 643

TABLE II
SELECTED SWITCHING SEQUENCES FOR SUBSECTORS OF FIG. 6

relevant switching states applied in one switching period), better

the balancing of the capacitor voltages will be achieved. Using
these rules, final selection of the sequences for subsectors of
Fig. 6 is as shown in Table II. Only subsectors 17 and 18 have
different starting switching state.

F. Determination of the Subsectors

Determination of the subsector in which the reference is
in an arbitrary time instant is a necessary step for SVPWM
algorithms. When the subsector is determined, corresponding
switching sequence can be read from Table II, and times of ap-
plication for each switching state can be determined by (5). As
there are 18 subsectors in the first sector, leading to the total of
252 subsectors in the α–β plane, the change of the subsector is
Fig. 7. Geometrical explanation of subsector determination.
frequent and an efficient way of subsector determination has to
be used. One graphical method for the determination of the sub- first sector (0 ≤ ωt < 2π/14) are summarized in Table III. Note
sectors was presented in [16] for the five-phase case. The same that considering the length from the origin to the intersecting
principle can be used here for the seven-phase case, Fig. 7. As point, one has L11 = L21 = L31 = L41 = L51 , L12 = L22 = L32
already mentioned, all borders between subsectors are divided = L42 = L52 , and these will be denoted further with L1 and L2 ,
into five groups that form angles of 2 · 2π/14, 3 · 2π/14, . . . respectively, while L33 will be denoted as L3 . Analytical value
6·2π/14 with the α-axis. Axes orthogonal to these borders are of L1 is already given by (6), L2 can be directly obtained from L1
denoted with x5 , x4 , . . . x1 , respectively (see Fig. 7; use of sym- using simple geometry, while L3 corresponds to the maximum
bol x here is not related to the x–y planes). Intersections of sector modulation index for a seven-phase VSI [21] (L3 = 2·L1 )
border lines with axes x1 to x5 define points L11 , L22 , . . ., L52 .
Vdc 1
For subsector determination, it is enough to find the projections L1 = ·
of the reference vector Vref to the defined axes x1 to x5 (Vref1 4 cos(π/14)
to Vref5 ) and to compare the position of these projections with Vdc cos(2π/7)
the position of projections of the borders L11 , L22 , . . . L52 . For L2 = ·
2 cos(π/14)
example, if the reference is in the subsector 13, as it is shown in
Vdc 1
Fig. 7, this means that the reference is located down-left from L3 = · . (7)
the border with subsector 14, i.e., reference projection to the 2 cos (π/14)
x1 -axis vref1 ≤ L11 ; reference must be located down-right from
the border with subsector 11, i.e., vref5 > L51 ; considering the
G. Modification of the Algorithm
border with subsector 10, reference must be located up-right,
vref2 > L22 ; and from border with subsector 17, one gets vref5 ≤ Until now, the basic space vector algorithm from [18] has
L52 . Rules for the determination of all 18 subsectors inside the been reviewed. One modification of the algorithm is introduced
644
TABLE III
SUBSECTOR DETERMINATION FOR THE FIRST SECTOR
Fig. 8. Division of the first sector into subsectors after introduced
modification.
further, based on the corresponding modification in [17] for the
five-phase three-level VSI. At the moment, all subsectors from
1 to 16 in each sector have the same starting switching state. The
same starting switching states have subsectors 17 and 18 from
the next sector as well. This means that 14 additional switchings
appear during the fundamental period when the starting switch-
ing sequence changes. These additional switching transitions,
one increasing and one decreasing transition per fundamental
period, appear in each of seven legs. Two borders between sub-
sectors when these additional switching transitions occur in the
first and the second sectors are shown in Fig. 8.
Let us analyze the appearance of additional switching transi-
tions in time domain. If level-shifted carriers are assumed, they
are shifted vertically, and each occupies certain vertical zone.
The starting switching state changes every time when any of
the reference leg voltages change the carrier zone. For example,
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013
TABLE IV
SELECTED SWITCHING SEQUENCES FOR SUBSECTORS OF FIG. 8
when the reference leg voltage transits from the higher to the
lower carrier zone, the leg voltage that was switching between
levels 1 and 2 will start switching between levels 0 and 1, and
thus, the starting switching state will be changed. In seven-
phase case with pure sinusoidal references as in (2), change of
the carrier zone occurs at ωt = 1π/14, 3π/14, 5π/14, etc. Also,
certain injections (e.g., min–max injection, or those that contain
only integer odd multiples of the seventh harmonic that are in
phase with the reference signals) will not change the positions
of these crossing points. Thus, points where the reference leg
voltages change carrier zone determine additional 14 switchings
per fundamental period.
For the easier comparison with carrier-based approach, and
since switching sequence redundancy per pattern, i.e., per sub-
sector, exists, one additional subdivision per sector is intro-
duced. The additional subdivisions halve the main sectors, so
they are located at ωt = 1π/14, 3π/14, 5π/14 etc. Subsec-
tors with this new subdivision for the first sector in the α–β
plane are shown in Fig. 8. Switching sequences that correspond
to the new subdivision are chosen from redundant sequences
for subsectors in such a way to minimize losses when refer-
ence changes subsector. New switching sequences are given in
Table IV. Switching sequences for subsectors denoted without
additional index “dn” (i.e., without index, or with index “up”)
are the same as corresponding sequences in the original algo-
rithm (see Table II). Now, from Table IV, one can see that the
starting switching state is the same for all switching sequences
in the lower sector half 0 ≤ ωt < π/14 (they start with 1100001)
and for all in the upper sector half π/14 ≤ ωt < 2π/14 (starting
switching state is 1110001). The position of additional switch-
ing transitions (at new subdivisions) coincides now with those
in time domain.
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM
Fig. 9. Experimental setup.
Fig. 10. Phase voltage THD comparison for presented carrier-based and space
vector modulation strategies (simulations and experiments) for the linear mod-
ulation index range of m = 0.15 to 1.025.
With this subdivision the number of subsectors per sector is
increased from 18 to 24. For the determination of the subsector
only one more condition (ωt < π/14 or ωt ≥ π/14), in addition to
Table III, has to be examined. Although the algorithm appears
as more involved with this new subdivision, it will be shown
shortly, using simulation and experimental results, that the same
performance as with this modified SVPWM algorithm can be
easily obtained with carrier-based modulation using a proper
injection. Injection that leads to identical performance has been
645
Fig. 11. Current THD comparison for presented carrier-based and space vector
modulation strategies (experiments) for the linear modulation index range of
m = 0.15 to 1.025.
already used for three-phase carrier-based PWM and SVPWM
comparisons in [6] and [22]. The same technique was applied for
the five-phase three-level VSI in [17]. The injection uses min–
max injection applied first to the set of reference signals and then
to the fractional parts of the normalized reference signals; hence,
it is termed as “double injection.” For obtaining identical results
as space vector modulation technique, level-shifted carriers that
are in phase PD-PWM (phase disposition PWM [23]), must be
used.
III. SIMULATION AND EXPERIMENTAL RESULTS
Space vector and carrier-based modulators have been devel-
oped in MATLAB/Simulik software package. Although the of-
fline process of subsector and switching sequence determination
is quite tedious, the final model is very simple. In particular,
memory consumption in online realization is deliberately sac-
rificed to achieve a reduction in the computation time of the
algorithm. Namely, switching sequences for all subsectors from
the first (see Table IV), and from the second sector are stored in
the memory (48 switching sequences). Also, inverted matrices
for switching state application times from (5) are precalculated
and stored as constants for all of 48 stored sequences. There-
fore, after the determination of the subsector from the present
reference magnitude and angle, using the rules in Table III ex-
tended with additional examination of the half of the sector
to which the reference belongs (since additional subdivision
is introduced), only corresponding switching sequence and in-
verted matrix from (5) have to be read from the memory. By
multiplication of the loaded inverted matrix with the projec-
tions of the present reference to all axes (i.e., multiplication
with [Vα∗ Vβ∗ Vx1 ∗
Vy∗1 Vx2
∗
Vy∗2 1]T ), dwell times T1 ,
T2 , . . ., T7 can be calculated.
For the real-time implementation of the algorithms, dSpace
ds1006 hardware has been used. Experimental investigation was
performed using a seven-phase star-connected passive (R–L)
load, due to unavailability of the machine (this has no impact on
646 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013

Fig. 12. (a) Oscilloscope recording of the leg and phase voltage, and load current at m = 0.6, for considered carrier-based (left) and space vector (right) PWM
strategies (M-leg voltage, 260 V/div; Ch3-phase voltage, 250 V/div; Ch4-phase current, 500 mA/div; time = 10 ms/div), with associated (b) phase voltage and
(c) current spectra.

Fig. 13. (a) Oscilloscope recording of the leg and phase voltage, and load current at m = 1, for considered carrier-based (left) and space vector (right) PWM
strategies (M-leg voltage, 260 V/div; Ch3-phase voltage, 250 V/div; Ch4-phase current, 500 mA/div; time = 10 ms/div), with associated (b) phase voltage and
(c) current spectra.
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM
Fig. 14. Simulation results illustrating (a) leg and (b) phase voltage at m = 1, for considered carrier-based (left) and space vector (right) PWM strategies with
associated (c) phase voltage spectrum.
any voltage-related considerations and affects only the current
ripple, analysis of which is beyond the scope here). Two custom-
made three-level six-phase NPC inverters with common dc link
have been used to form a seven-phase NPC inverter. For dc-bus
supply, an external dc source Sorensen SGI 600/25 has been
employed, and the dc-bus voltage value has been set to Vdc =
600 V. Inverter dead time is 6 μs, and switching frequency has
been set to 2 kHz. The photograph of the experimental setup
is given in Fig. 9. The reference value has been changed using
V/f = const. law, where the 300 V (peak value) and 50 Hz have
been chosen as nominal values. Parameters and various settings
are the same in simulations and in experiments.
To validate the algorithms and prove the equivalence of the
presented space vector and carrier-based algorithms, total har-
monic distortion THD has been calculated for the full linear
modulation index range. THD is computed, on the basis of the
FFT results, according to
 portional to the square of the nominator in (8) when THD applies
h 2
i=2 Zi
THDz = (8)
Z1
where z stands for voltage or current, and Zi represents the ith
component in the spectrum. Value of h determines the last har-
monic in the spectrum whose frequency is lower than 21 kHz.
Since the switching frequency is 2 kHz, this means that harmon-
ics from the first ten side bands are included in the THD calcula-
tion. The voltage THD can be calculated also directly in the time
647
domain using Parseval’s theorem, as addressed in [24] and [25].
Simulation and experimental results for obtained phase voltage
THD are shown in Fig. 10. One can see that phase voltage THD
values for both strategies are identical, and the same values are
obtained by simulations and by experiments. Experimentally
obtained current THD is shown in Fig. 11. It can be seen that
the two PWM methods yield in essence identical current rip-
ple (i.e., THD) behavior, which means that the same switching
harmonic-related side-bands are produced and are mapped in
the three planes in the same manner. Due to hugely variable
impedance of the load, no attempt has been made to evaluate
the current THD by simulation. It should be emphasised that the
squared value of the nominator of the voltage THD is directly
related to the additional eddy current iron losses, caused by the
PWM induced voltage harmonics, when the inverter supplies
an electrical machine [24], [25]. On the other hand, additional
copper losses, caused by the PWM operation, are directly pro-
to the current, since this is the squared value of the current ripple
rms [26].
Since THD is a global figure of merit, the equivalence of
the presented algorithms is further confirmed by experimentally
recorded time-domain waveforms and spectra of the phase volt-
age and current for modulation indices m equal to 0.6 and 1.
The screenshots from the oscilloscope and associated spectra
are shown in Figs. 12 and 13. In essence, the waveforms and the
spectra are identical for all practical purposes.
648
To further confirm the correspondence between simulation
and experimental results, Fig. 14 shows simulation results for m
= 1 for the two modulation techniques. Comparison of the leg
and phase voltage time-domain traces and phase voltage spectra
with the experimental results in Fig. 13 confirms a very good
agreement indeed.
Finally, the complexity of the algorithms has been compared
by measuring the algorithm execution time on dSpace using the
dSpace Profiler tool. The execution time of the applied carrier-
based method is around 1.06 μs, while the execution time of
the space vector algorithm is around 2.25 μs. A relatively small
difference in the processor time consumption of the compared
algorithms is due to the particular realization of the space vec-
tor algorithm, which requires a lot of memory. The consumed
memory by the space vector algorithm is 2688 integer and 2352
real variables, while carrier-based method does not require any
memory. Also, carrier-based strategy does not need any offline
calculations, while the space vector algorithm, as demonstrated,
requires a very involved offline procedure. Thus, for practical
implementation the carrier-based realization will always be the
first choice. However, the importance of the SVPWM should
not be underestimated, since it gives a much better insight into
the switching behavior of the inverter and the mapping of the
harmonics into different planes. It should be noted that there
are situations where only space vector approach can be used to
explain physically the working of the system: this applies to, for
example, independent control of series-connected multiphase
multimotor drive systems [27], where no insight can be gained
from time (or, equivalently, carrier-based) domain, while com-
plex space vector domain makes analysis not only clear but also
easy to understand.
IV. CONCLUSION
A space vector algorithm, based on VSD and aimed at seven-
phase motor drives supplied from the three-level NPC VSI is
presented in this paper. The algorithm is introduced on the step-
by-step basis and the difficulties in solving some of the steps are
emphasized. Despite the complicated offline process, once when
the switching sequences and matrices for dwell times are deter-
mined, the final realization of the algorithm is rather simple. The
algorithm is compared by simulation and experimentally with
the carrier-based algorithm based on “double injection,” using
a passive seven-phase load. Comparison is based on phase volt-
age and current THD analysis, and on time-domain waveforms
and spectra. Identical performance is demonstrated for the two
PWM algorithms. However, complexity of the space vector al-
gorithm is, as always the case is, much higher.
REFERENCES
[1] E. Levi, “Multiphase electric machines for variable-speed applications,”
IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 1893–1909, May 2008.
[2] B. Wu, High-Power Converters and AC Drives. Hoboken, NJ: IEEE
Press–Wiley, 2006.
[3] B. Mwinyiwiwa, O. Ojo, and Z. Wu, “A five phase three-level neutral
point clamped converter using DSP and FPGA based control scheme,” in
Proc. IEEE Power Electron. Spec. Conf., Jeju, South Korea [CD-ROM],
2006, pp. 1–7.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 2, FEBRUARY 2013
[4] S. Karugaba, O. Ojo, and M. Abreham, “Carrier based PWM scheme for
a three-level diode-clamped five-phase voltage source inverter ensuring
capacitor voltage balancing,” in Proc. IEEE Appl. Power Electron. Conf.
Exhib., Orlando, FL, Mar. 2011, pp. 1194–1201.
[5] N. Celanovic and D. Boroyevich, “A fast space-vector modulation al-
gorithm for multilevel three-phase converters,” IEEE Trans. Ind. Appl.,
vol. 37, no. 2, pp. 637–641, Mar./Apr. 2001.
[6] B. P. McGrath, D. G. Holmes, and T. Lipo, “Optimized space vector
switching sequences for multilevel inverters,” IEEE Trans. Power Elec-
tron., vol. 18, no. 6, pp. 1293–1301, Nov. 2003.
[7] Q. Song, X. Zhang, F. Yu, and C. Zhang, “Research on PWM techniques
of five-phase three-level inverter,” in Proc. Int. Symp. Power Electron.,
Electr. Drives, Autom. Motion, Taormina, Italy, May 2006, pp. 561–565.
[8] J. Soltani, N. R. Abjadi, J. Askari, and G. R. A. Markadeh, “Direct torque
control of a two five-phase series connected induction machine drive using
a three-level five-phase space vector PWM inverter,” in Proc. IEEE Int.
Conf. Ind. Technol., Chengdu, China [CD-ROM], 2008, pp. 1–6.
[9] J. Huang and K. A. Corzine, “A new walking pattern SVM technique
for five-phase motor drives,” in Proc. IEEE Ind. Appl. Soc. Annu. Meet.,
Edmonton, Alberta, Canada [CD-ROM], 2008, pp. 1–8.
[10] C. M. Hutson, G. K. Venayagamoorthy, and K. A. Corzine, “Optimal SVM
switching for a multilevel multi-phase machine using modified discrete
PSO,” in Proc. IEEE Swarm Intell. Symp., St. Louis, MO [CD-ROM],
2008, pp. 1–6.
[11] O. López, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel
multiphase space vector PWM algorithm,” IEEE Trans. Ind. Electron.,
vol. 55, no. 5, pp. 1933–1942, May 2008.
[12] O. López, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel
multiphase space vector PWM algorithm with switching state redun-
dancy,” IEEE Trans. Ind. Electron., vol. 56, no. 3, pp. 792–804, Mar.
2009.
[13] J. I. Leon, O. Lopez, L. G. Franquelo, J. Doval-Gandoy, S. Vazquez,
J. Alvarez, and F. D. Freijedo, “Multilevel multiphase feedforward space-
vector modulation technique,” IEEE Trans. Ind. Electron., vol. 57, no. 6,
pp. 2066–2075, Jun. 2010.
[14] J.-S. Hu, K.-Y. Chen, T.-Y. Shen, and C.-H. Tang, “Analytical solutions
of multilevel space-vector PWM for multiphase voltage source inverters,”
IEEE Trans. Power Electron., vol. 26, no. 5, pp. 1489–1502, May 2011.
[15] J. I. Leon, S. Vazquez, J. A. Sanchez, R. Portillo, L. G. Franquelo, J.
M. Carrasco, and E. Dominguez, “Conventional space-vector modulation
techniques versus the single-phase modulator for multilevel converters,”
IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2473–2482, Jul. 2010.
[16] L. Gao and J. E. Fletcher, “A space vector switching strategy for three-
level five-phase inverter drives,” IEEE Trans. Ind. Electron., vol. 57, no. 7,
pp. 2332–2343, Jul. 2010.
[17] O. Dordevic, M. Jones, and E. Levi, “A comparison of PWM techniques
for three-level five-phase voltage source inverters,” in Proc. Eur. Power
Electron. Appl. Conf., Birmingham, U.K. [CD-ROM] paper 0620, 2011,
pp. 1–10.
[18] O. Dordevic, M. Jones, and E. Levi, “A space vector PWM algorithm for
a three-level seven-phase voltage source inverter,” in Proc. Eur. Power
Electron. Appl. Conf., Birmingham, U.K. [CD-ROM] paper 0123, 2011,
pp. 1–11.
[19] E. Levi, R. Bojoi, F. Profumo, H. A. Toliyat, and S. Williamson, “Multi-
phase induction motor drives—A technology status review,” IET Electr.
Power Appl., vol. 1, no. 4, pp. 489–516, Jul. 2007.
[20] O. López, E. Levi, F. D. Freijedo, and J. Doval-Gandoy, “Number of
switching state vectors and space vectors in multilevel multiphase con-
verters,” Electron. Lett., vol. 45, no. 10, pp. 524–525, 2009.
[21] E. Levi, D. Dujic, M. Jones, and G. Grandi, “Analytical determination of
DC-bus utilization limits in multiphase VSI supplied AC drives,” IEEE
Trans. Energy Convers., vol. 23, no. 2, pp. 433–443, Jun. 2008.
[22] F. Wang, “Sine-triangle versus space-vector modulation for three-level
PWM voltage-source inverters,” IEEE Trans. Ind. Appl., vol. 38, no. 2,
pp. 500–506, Mar./Apr. 2002.
[23] G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, “A
new multilevel PWM method: A theoretical analysis,” IEEE Trans. Power
Electron., vol. 7, no. 3, pp. 497–505, Jul. 1992.
[24] A. Ruderman and B. Reznikov, “PWM power converter voltage quality
bounds and their applicability to non-PWM control schemes,” in Proc. Int.
Conf. Optimization Electr. Electron. Equipment, Brasov, Romania, 2010,
pp. 58–68.
[25] A. Ruderman and B. Reznikov, “Time domain evaluation of filterless grid-
connected multilevel PWM converter voltage quality,” in Proc. IEEE Int.
Symp. Ind. Electron., Bari, Italy, Jul. 2010, pp. 2940–2945.
DORDEVIC et al.: VECTOR SPACE DECOMPOSITION BASED SPACE VECTOR PWM ALGORITHM 649

[26] D. Dujic, M. Jones, and E. Levi, “Analysis of output current ripple RMS Emil Levi (S’89–M’92–SM’99–F’09) received the
in multi-phase drives using polygon approach,” IEEE Trans. Power Elec- M.Sc. and Ph.D. degrees from the University of
tron., vol. 25, no. 7, pp. 1838–1849, Jul. 2010. Belgrade, Belgrade, Serbia, in 1986 and 1990,
[27] E. Levi, M. Jones, S. N. Vukosavić, and H. A. Toliyat, “A novel concept respectively.
of a multiphase, multimotor vector controlled drive system supplied from From 1982 to 1992, he was with the Department
a single voltage source inverter,” IEEE Trans. Power Electron., vol. 19, of Electrical Engineering, University of Novi Sad. In
no. 2, pp. 320–335, Mar. 2004. May 1992, he joined Liverpool John Moores Univer-
sity, Liverpool, U.K., where since September 2000, he
has been a Professor of electric machines and drives.
Dr. Levi serves as a Co-Editor-in-Chief of the
IEEE TRANSACTION ON INDUSTRIAL ELECTRONICS,
as an Editor of the IEEE TRANSACTION ON ENERGY CONVERSION, and as an
Editor-in-Chief of the IET Electric Power Applications. He is the recipient of
the Cyril Veinott award of the IEEE Power and Energy Society for 2009.

Obrad Dordevic (S’11) received the Dipl. Ing. de-
gree from the University of Belgrade, Belgrade,
Serbia, in 2008. Since 2009, he has been working to-
ward the Ph.D. degree in the Liverpool John Moores
University, Liverpool, U.K.
From 2008 to 2009, he was with the Digital Drive
Control laboratory, University of Belgrade. His main
research interests include the areas of power electron-
ics, electrostatic precipitators, and advanced variable
speed drives.
Martin Jones (M’07) received the B.Eng. degree
(First Class Hons.) from the Liverpool John Moores
University, Liverpool, U.K., in 2001. He was a Re-
search Student at the Liverpool John Moores Univer-
sity from September 2001 till Spring 2005, when he
received the Ph.D. degree.
He is currently a Reader at Liverpool John Moores
University.
Dr. Jones was a recipient of the IEE Robinson Re-
search Scholarship for his PhD studies.