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PRIME 2012, Aachen, Germany Session TG3 – Analog DC

A Low Power Bandgap Voltage Reference Circuit


with PSRR Enhancement
Lei Liao, Lukas Lohaus, Aytac Atac, Sebastian Strache, Ralf Wunderlich, and Stefan Heinen

Chair of Integrated Analog Circuits


RWTH Aachen University
Sommerfeldstrasse 24, D-52074 Aachen, Germany
Email: ias@rwth-aachen.de

Abstract—This paper presents a low power high PSRR VDD


bandgap voltage reference (BGR) circuit. Two concepts for PSRR M1 M2 M3
enhancement are investigated and evaluated in this work. The
designed BGR circuit operates with 2.7 V and generates a
I1 I2
reference voltage of 1.26 V. The BGR circuit provides -82.6 dB Vref
power supply rejection ratio (PSRR) at 1 MHz and the PSRR
at DC region is also below -80 dB. The PSRR enhancement R0
Q1 Q2
is implemented by using a low power low drop out voltage
regulator (LDO) integrated into the BGR circuit. The overall R1 R2 R3
current consumption of the design is less than 60 µA.
GND
I. I NTRODUCTION
Precise bandgap voltage references (BGR) are widely used Fig. 1. Low power bandgap circuit
in analog and mixed-signal applications, such as high per-
formance analog-to-digital converters (A/D) and switch-mode
voltage regulators [1]. Especially for battery powered devices, B. Solutions for PSRR Improvement of Bandgap Reference
the demand towards integration of RF, digital-baseband and Circuit
power management blocks into a single chip has recently been The main solution for improving the PSRR of a bandgap
increasing [2]. However, different circuit topologies operating reference circuit is to filter out the voltage fluctuations from
at various frequencies induce significant fluctuations on the the power supply, so that the bandgap reference can get a
power supply. These variations present a critical challenge, relative clean filtered supply voltage. This paper investigates
especially in low power bandgap design. In consequence, it two concepts for PSRR enhancement of the bandgap reference
is required to optimize the conflict of aims between high circuit. The first concept realizes a low pass effect by using
PSRR and low power consumption while maintaining high an integrated RC filter at the supply voltage side of the BGR
accuracy. This paper presents a conceptual design of a low circuit, so that the high frequency supply voltage fluctuations
power bandgap voltage reference with high PSRR. can be filtered out. However, due to the large area demand
A. Challenges of Low Power Bandgap Design of the integrated resistors and capacitors, the pole produced
by the RC element can not be placed in a low frequency
Fig. 1 shows the proposed topology of a BiCMOS bandgap
region. Therefore, this concept can only provide a PSRR
reference circuit [3]. By reducing the current consumption
enhancement in high frequency region. The second concept
of the bandgap reference circuit, the strong nonlinear effect
uses a low dropout voltage regulator (LDO) integrated into
of both diodes Q1 and Q2 will be significantly observed
the bandgap reference circuit to achieve the rejection of
on the generated reference voltage. As shown in Fig. 1,
power supply fluctuations. This concept is able to enhance
when the supply voltage of the bandgap reference circuit
the PSRR in high frequency as well as in low frequency
has a fluctuation, which can be caused by hard switching
regions. The challenge of this concept is to keep the power
behaviors from other circuit blocks, the current flow through
consumption low and to reduce the area demand of the low
both diodes Q1 and Q2 will also vary [4]. Due to the strong
dropout voltage regulator.
nonlinear effect of the diodes, the voltage potentials at the
inputs of the operational amplifier will also have a variation
that will produce a voltage ripple on the generated reference
II. C IRCUIT IMPLEMENTATION AND EVALUATION
voltage. When the high frequency supply voltage fluctuation
is strong, it will push both diodes Q1 and Q2 out of their Fig. 2 shows the proposed schematic of the bandgap ref-
correct operating points and causes a functional failure of the erence circuit [3]. Inside the circuit, the currents in M1 , M2
bandgap reference voltage. and M3 are set to be equal (I1 = I2 = I3 ). The resistors R1

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Paper TG33 PRIME 2012, Aachen, Germany

Start up circuit
is -71 dB. However, due to the limited bandwidth of the
M1 M2 M3
operational amplifier inside the bandgap circuit, the PSRR will
be reduced with increasing the frequency of the power supply
I1 I2 I3
variation. This bandgap circuit provides a PSRR of -30 dB at
Vref
300 kHz and -50 dB at 1 MHz. For integrated switch mode
R0
power supplies and chips with integrated high speed baseband
Q1 Q2
circuits, which induce very strong supply voltage variations at
R1 1 N R2 R3 high frequencies, the PSRR of this designed bandgap circuit
is not sufficient. Therefore an enhancement of the PSRR at
high frequency region is needed.
Fig. 2. Schematic of bandgap voltage reference circuit A. PSRR enhancement by using passive RC low pass filer
In order to filter out the high frequency fluctuations of the
supply voltage, a RC low pass filter is integrated into the
and R2 are also chosen equally. The reference voltage Vref
designed bandgap reference circuit. Fig. 5 shows the modified
of the bandgap reference circuit can be calculated by
   
R3 ln(N ) R3 RC Low Pass BGR circuit
Vref = I1 R3 = VT + VBE (1) Vdropout=0.2V
Start up circuit
R0 R1 VDD VoutRC=2.5V

with R dropout M1 M2 M3

VT ln(N ) VBE
I1 = + . (2) I1 I2 I3 Vref
R0 R1 Cf

By setting the value of N , the temperature effect of the Q1 Q2


R0

generated reference voltage Vref can be compensated [3]. R3


R1 R2
1 N
Fig. 3 shows the simulated bandgap reference voltage Vref

1.27
Fig. 5. Improved BGR circuit with RC low pass filter
Vref [V]

1.265
bandgap reference circuit. The capacitor and resistor values
1.26
should be chosen by considering the circuit area and supply
voltage drop. Especially, the resistor value of Vdropout should
0 20 40 60 80 100
o
Temperature [ C ]
be chosen carefully, that by losing of supply voltage the
bandgap circuit can still keep the correct operating point. The
Fig. 3. Output of Vref after temperature compensation value of the resistor Rdropout is set to be 12 kΩ so that the
voltage drop Vdropout on the resistor is 0.2 V by the 16 µA
as a function of temperature. The bandgap reference voltage current flow through the bandgap reference circuit. The value
is compensated and the variation of the reference voltage is of the used capacitor Cf is 50.4 pF. The pole produced from
less than 0.35 mV/o C. the integrated RC low pass filter is located at 263.15 kHz.
−20

−30

−40 w/o RC filter


/w RC filter 5.6 dB
−50
PSRR [dB]

−60

−70
PSRR [dB]

−80

−90

−100
2 3 4 5 6 7 8
10 10 10 10 10 10 10
Frequency [Hz]

Fig. 4. The simulated PSRR of designed bandgap

The designed bandgap reference circuit consumes 16 µA with


Frequency [Hz]
a supply voltage of 2.7 V. The simulated PSRR of the designed
bandgap circuit is shown in Fig. 4. It can be seen that the Fig. 6. Improvement of the PSRR
PSRR of the designed bandgap circuit in the DC region The simulation results of the comparison between the bandgap

214
PRIME 2012, Aachen, Germany Session TG3 – Analog DC

Low dropout voltage regulator BGR circuit


Operational amplifier Vdropout=0.2V Start up circuit
Vdd=2.7V Vout=2.5V

Mpass M1 M2 M3

Cdiv Rdiv

Rm
Vref
Cout
Cm
Rf
Vf
R0
Q1 Q2
Cf Rdiv
R1 R2 R3
1 N

Fig. 7. High PSRR bandgap voltage reference circuit

reference circuit with and without the included RC low pass a pass transistor Mpass and a resistor based voltage divider
filter are shown in Fig. 6. The PSRR at 1 MHz is enhanced with a feed forward capacitor Cdiv . The operational amplifier
by 5.6 dB and there is no significant PSRR improvement at is used for controlling the pass device Mpass to stabilize
300 kHz. This is due to the pole of the RC low pass filter, that the output voltage Vout . The feed forward capacitor is used
can not be placed at low frequencies since the value of the RC for improving the phase margin of the low dropout voltage
product is limited by the consumed circuit area. The start up regulator control loop [5]. This low dropout voltage regulator
operates with 2.7 V and the dropout voltage over the pass
transistor Mpass is set to 0.2 V. Therefore, the voltage supplied
VDD VDD=2.7V±150 mV @1MHz
to the bandgap reference circuit is 2.5 V.
The simulated open loop transfer function of the low dropout
Voltage [V]

Vout RC

1.26 V

Vref
Vripple=350 uV

Time [us]

Fig. 8. Transient start up simulation


PM=55°
behavior of the bandgap reference circuit with the integrated
RC filter is shown in Fig. 8. In the simulation, a 300 mV
(peak to peak) voltage fluctuation at 1 MHz is injected into
the power supply. Because the pole of the RC filter is placed at
Frequency [Hz]
263.15 kHz, which is relatively near to 1 MHz, the suppression
of the supply voltage fluctuation is not very strong. Therefore,
Fig. 9. Open loop transfer function of the LDO
the voltage VoutRC supplied to the bandgap reference circuit
has still a voltage ripple. This causes also a 350 µV voltage
ripple of the generated reference voltage Vref . voltage regulator is shown in Fig. 9. It can be seen that the
phase margin of the control loop is 55o which is sufficient to
B. PSRR enhancement by using low dropout voltage regulator ensure the loop stability.
In order to achieve a better PSRR enhancement and to Fig. 10 gives the simulation results of the improved PSRR. In
reduce the total capacitance used in the circuit, a low dropout the DC region, the improvement of the PSRR is 10.5 dB. Espe-
voltage regulator is designed and integrated into the bandgap cially, In the high frequency region due to the poles generated
reference circuit, so that the bandgap reference circuit is by low dropout voltage regulator, the improvement increases.
completely supplied by a regulated voltage. Fig. 7 shows the In this case, the improvements of PSRR are 17 dB at 300 kHz
schematic of this design. The applied low dropout voltage and 32.6 dB at 1 MHz compared to the bandgap reference
regulator consist of a miller compensated operational amplifier, circuit without LDO. As a result, a PSRR enhancement at

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Paper TG33 PRIME 2012, Aachen, Germany

TABLE I
T HE VALUE OF USED CAPACITORS
/w LDO
w/o LDO Capacitors used in RC filter
32.6 dB Name of capacitor Value
Cf 50.4 pF
Capacitors used in LDO circuit
17 dB Name of capacitor Value
Cout 5.6 pF
Cf 4 pF
Cm 2.5 pF
10.5 dB Cdiv 0.3 pF
Total C 12.4 pF
TABLE II
T HE ESTIMATED ADDITIONAL AREA
Name of the additional circuit area [WxL]
Passive RC filter 240 µm × 240 µm
LDO circuit 160 µm × 160 µm
Fig. 10. Improvement of the PSRR

all the frequencies is achieved. The start up behavior of the the current consumption of the bandgap reference circuit
improved bandgap reference circuit is shown in Fig. 11. In the increases by 42 µA. The overall current consumption of the
designed bandgap reference circuit is 60 µA. This gives a total
VDD VDD=2.7V±150 mV @1MHz power consumption of 162 µW at 2.7 V.
III. C ONCLUSION
The low power bandgap reference circuit with PSRR en-
Voltage [V]

Vout LDO
hancement is presented in this work. Two concepts for improv-
1.26 V ing the PSRR in the high frequency region are evaluated. Fi-
Vref nally, a significant enhancement of the PSRR at all frequencies
Vripple=30 uV

is achieved by using a low dropout voltage regulator integrated


into the bandgap reference circuit. The designed bandgap
reference provides -81 dB PSRR at DC region and -82.6 dB
Time [us]
PSRR at 1 MHz. The bandgap reference circuit operates with
2.7 V supply voltage and generates a reference voltage of
Fig. 11. Transient start up simulation
1.26 V. The overall power consumption of this design is less
start up simulation, after the rise up of the supply voltage, a than 162 µW, which is sufficient for low power applications.
300 mV (peak to peak) voltage fluctuation with a frequency of The circuit implementation is done by using 0.25 µm BiCOMS
1 MHz is injected into the power supply. The integrated low Process.
dropout voltage regulator circuit rejects most of the strong ACKNOWLEDGMENT
fluctuations that the bandgap reference can be supplied with
a relatively clean voltage of 2.5 V. It can be seen that the The authors would like to thank Dirk Bormann, and Tobias
generated reference voltage has a voltage ripple of 30 µV and Werth for fruitful discussions. The software support by the Ca-
the start up time is 28 µs. dence Academic Network (CAN) is gratefully acknowledged.
R EFERENCES
C. Discussion
[1] V. Gromov, A. Annema, R. Kluit, J. Visschers, and P. Timmer,
The in subsection II-A introduced concept provides a poor “A radiation hard bandgap reference circuit in a standard 0.13 um
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circuit area is increased by using a big capacitor. Therefore, 10.1109/TNS.2007.910170, vol. 54, no. 6, pp. 2727–2733, 2007.
[2] M. Hammes, C. Kranz, D. Seippel, J. Kissing, and A. Leyk, “Evolution on
this concept is not used into the implemented bandgap ref- soc integration: Gsm baseband-radio in 0.13 um cmos extended by fully
erence circuit. The concept introduced in subsection II-B has integrated power management unit,” Solid-State Circuits, IEEE Journal
a well enhanced PSRR at all frequencies and the total used of DOI - 10.1109/JSSC.2007.909344, vol. 43, no. 1, pp. 236–245, 2008.
[3] P. Malcovati, F. Maloberti, C. Fiocchi, and M. Pruzzi, “Curvature-
capacitors, which are dominating the circuit area, is reduced compensated bicmos bandgap with 1-v supply voltage,” Solid-State
by a factor of four. The detailed capacitor values of both Circuits, IEEE Journal of DOI - 10.1109/4.933463, vol. 36, no. 7, pp.
introduced concepts are listed in Tab. I. 1076–1081, 2001.
[4] E. Orietti, N. Montemezzo, S. Buso, G. Meneghesso, A. Ne-
The estimated area of the additional circuits are given in viani, and G. Spiazzi, “Reducing the emi susceptibility of a kuijk
Tab. II. The passive RC filter circuit needs an area of bandgap,” Electromagnetic Compatibility, IEEE Transactions on DOI -
240 × 240 µm2 and the low dropout voltage requires an area 10.1109/TEMC.2008.2004581, vol. 50, no. 4, pp. 876–886, 2008.
[5] R. Milliken, J. Silva-Martinez, and E. Sanchez-Sinencio, “Full on-chip
of 160 × 160 µm2 , which is less than half of the required area cmos low-dropout voltage regulator,” Circuits and Systems I: Regular
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