National University of Technology

(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

Introduction to Electrical Engineering and Computer Science (EECS)

NUTECH UNITS Credit Hours

Theory =3 Theory =3
Lab =0 Lab =0
Outside Preparation =9
Total = 12 Total =3

Prerequisite: None

COURSE DESCRIPTION:

This course introduces the students to the basic concepts of Electrical Engineering to be used in
the subsequent semesters. The course is comprised of two units, first unit gives an Introduction to
Boolean Algebra and Logic Gates and second unit covers the basic concepts of Circuit Theory.

COURSE OBJECTIVES:
1. Able to perform the conversion among different number systems
2. Familiar with basic logic gates -- AND,OR, NOT, XOR, XNOR.
3. Understand Boolean algebra and basic properties of Boolean algebra; able to simplify
simple Boolean functions by using the basic Boolean properties.
4. Able to optimize simple logic using Karnaugh maps, understand "don't care".
5. Familiar with basic sequential logic components: SR Latch, D Flip-Flop and their
usage and able to analyze sequential logic circuits.
6. To provide students the basic idea of how to design and simulate logic circuits.
7. To analyse physical circuits through the use of Kirchhoff’s laws and ideal circuit element
models.
8. The formulation of nodal/mesh equations for linear resistive circuits as a foundation

COURSE LEARNING OUTCOMES:

At the end of the course, students would be able to:
Learning Taxonomy
CLO PLO
Domain Level
1. Identify and explain fundamental concepts of
digital logic design including basic and universal
gates, number systems, binary coded systems, basic Cognitive 1 1
components of combinational and sequential
circuits.
2. Demonstrate the acquired knowledge to apply
Cognitive 2 1
techniques related to the design and analysis of
 National University of Technology
(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

digital electronic circuits including Boolean

algebra and multi-variable Karnaugh map methods.
3. Analyze small-scale combinational and sequential
Cognitive 2 1
digital circuits.
4. Acquire knowledge related to basic concepts,
network laws and theorems used to analyze linear
circuits.
5. To analyze and understand the linear circuits using
the network laws and theorems.

RECOMMENDED BOOKS:
1. M. Morris R. Mano, Charles R. Kime, Tom Martin, Logic and Computer Design
Fundamentals, 5th Edition.
2. Fawwaz T. Ulaby, et al. Circuit Analysis and Design. 1st Edition.
3. Charles K. Alexander, Matthew N. O. Sadiku, Fundamentals of Electric Circuits, 4th
Edition.

RELEVANT PROGRAM LEARNING OUTCOMES (PLOs):

The course is designed so that students will achieve the following PLOs:
1 Engineering Knowledge: ☐ 7 Environment and Sustainability: ☐
2 Problem Analysis: ☐ 8 Ethics: ☐
3 Design/Development of Solutions: ☐ 9 Individual and Team Work: ☐
4 Investigation: ☐ 10 Communication: ☐
5 Modern Tool Usage: ☐ 11 Project Management: ☐
6 The Engineer and Society: ☐ 12 Lifelong Learning: ☐

RELEVANCE OF COURSE TO REAL LIFE (PRACTICAL APPLICATIONS):

The modern have very fewer industrial processes which are complete without computers while the
logics, most often implemented as logic gates, are equally vital. In addition, the transformation of
 National University of Technology
(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

industry from mechanical control to electrical automation brought the electrical circuits to any
industry around the world.

ASSESSMENT SYSTEM:
Relative grading system will be followed to award grades. Weightage is as under:
Theoretical/Instruction No Percentage
Assignments 5 10%
Quizzes/Class Activities 5 10%
Project Based Activity 1 10%
Midterm Exam 1 30%
End Semester Exam 1 40%
Total 100%
CONDUCT IN THE CLASS:
• Discussion is encouraged in class but cross talking is not allowed.
• Everyone should be seated in the class 2 minutes before the start of the class.
• Leave / Absent will be considered as “ABSENT” in class, for which no retake of
Assignments, Quiz etc will be considered.
• Late submission of assignments will result in deduction of marks.
• Copying of assignments is strictly prohibited. Instead of marks, penalty will be imposed
on both parties.
• Phones should be on silent mode.
INSTRUCTOR:
Name: Dr. Adnan Saeed
Office: Level 04, Room 407, Academic Block, NUTECH
Email: adnansaeed@nutech.edu.pk
Class Hours: As per weekly schedule
Office Hours: Monday to Friday: 0900 – 1700hrs

INSTRUCTOR EXPERIENCE:
 National University of Technology
(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

Dr Adnan Saeed completed his doctoral studies with thesis titled: “Precise 3-D localization and
simulation of topographic objects in the synthetic aperture radar images” at the Technical
University Berlin (2014 to 2018), HEC-DAAD Scholar. Previously Dr Saeed worked as an
Assistant Professor at National University Fast, Islamabad, Pakistan (2012 to 2014).
Undergraduate level taught courses include:
● Circuit Analysis
● Microwave Engineering
● Digital Logic Design
● Microwave Propagation and Antenna Theory
 National University of Technology
(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

COURSE OUTLINE AND THEIR CONTRIBUTION TO PLOs:

Week Topic Covered Reading Assignment/ Home Work CLO PLO Assessment
No. No. Methodology

1 Number System, General Radix Ref. 1, Chap 1

Representation, Number
Conversion (Binary, Hexa and
Octa). NA
Complements of Numbers,
Arithmetic operations (Signed,
Unsigned), Coded Numbers (BCD,
Gray, Excess-3)
2 Boolean Logic, Logic Gates, Ref 1, Chap 2
Boolean Algebra (Postulates and 1
Theorems), DeMorgan’s
Theorems.
3 Function Synthesis, Minterm, Ref 1, Chap 3 2
Maxterms, Sum of Product.
4 Logic Minimization, Karnaugh Ref 1, Chap 3
Maps (3-4 variable), Don't Care Assignment, Quizzes
1
Conditions. Parity Generation and 1 OHT, Formative
Checking. Assessments
5 Binary Adder (Full Adder, Half Ref1, Chap 4, Section 4.3 – 4.7
Adder), Decoders, Synthesising 2
Larger Decoders.
6 Encoders, Multiplexers, Ref1, Chap 4
Synthesising Larger Multiplexers,
Function Implementation (Using
Decoders, Multiplexers)
7 Basic sequential logic Ref 1, Chap 5
components: SR Latch, D Flip-
Flop and their 2
usage and able to analyze
sequential logic circuits.
8 Midterm Exam
9 Nodes, Braches and Loops Ref 2, Chap 1
2
Kirchhoff’s Laws
 National University of Technology
(NUTECH)

Course Plan –Introduction to Electrical Engineering and

Computer Science (EE-1001)

Series Resistors and Voltage

Division. Parallel Resistors and
Current Division

10 Mesh Analysis Ref 2, Chap 2

Mesh Analysis with Current 1
Sources
11 Nodal Analysis Ref. 2 Chap 2
Nodal Analysis with Voltage 2
Source.

12 Ref. 2 Chap 2 2
Nodal versus Mesh Analysis
13 Linearity Property Ref. 2 Chap 2 3
Superposition Theorem

14 Source Transformation. Thevenin Ref. 2 Chap2 2

Norton and Superposition 1

Theorems.
15 Ref. 2 Chap 3 3
Introduction to RLC Circuits
16 Review 3

Final Exam End Semester Exam

Prepared By: Dr. Adnan Saeed

Approved By: Dr. Sajid Saleem

Vetted By: Dr. Umair Manzoor