CSE/IT/B.

TECH/Odd/Semester/CS301/2016

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Multiple choice Type Questions

1. In the decimal numbering system, what is the MSD?

[A] The middle digit of a stream of numbers
[B] The digit to the right of the decimal point
[C] The last digit on the right
[D] The digit with the most weight

2. A simple flip-flop
[A] is 2 bit memory
[B] is 1 bit memory
[C] is a four state device
[D] has nothing to do with memory

3. An SR flip flop cannot accept the following input entry

[A] Both input zero
[B] zero at R and one at S
[C] zero at S and one at R
[D] Both inputs one

4. The main difference between JK and RS flip-flop is that?

[A] JK flip-flop does not need a clock pulse
[B] there is feedback in JK flip-flop
[C] JK flip-flop accepts both inputs as 1
[D] JK flip-flop is acronym of junction cathode multivibrator

5. Radix of binary number system is _____?

[A] 0
[B] 1
[C] 2
[D] A & B

6. What is the Boolean expression for a three-input AND gate?

[A] X = A + B + C
[B] X = A · B · C
[C] X = A . B + C
[D] X = A B

7. A full subtracter circuit requires ________.

[A] two inputs and two outputs
[B] two inputs and three outputs
[C] three inputs and one output
[D] three inputs and two outputs

8. How is a J-K flip-flop made to toggle?

[A] J = 0, K = 0
[B] J = 1, K = 0
[C] J = 0, K = 1
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[D] J = 1, K = 1

9. Which of the following is correct for a gated D flip-flop?

[A] The output toggles if one of the inputs is held HIGH.
[B] Only one of the inputs can be HIGH at a time.
[C] The output complement follows the input when enabled.
[D] Q output follows the input D when the enable is HIGH.

10. How many outputs are on a BCD decoder?

[A] 4
[B] 16
[C] 8
[D] 10

11. Which digital system translates coded characters into a more useful form?
[A] encoder
[B] display
[C] counter
[D] decoder

12. Solving –11 + (–2) will yield which two's-complement answer?

[A] 1110 1101
[B] 1111 1001
[C] 1111 0011
[D] 1110 1001

13. Which of the following is minimum error code?

[A] Octal code
[B] Grey code
[C] Binary code
[D] Excess 3 code

14. Register is a ?
[A] Set of capacitor used to register input instructions in a digital computer
[B] Set of paper tapes and cards put in a file
[C] Temporary storage unit within the CPU having dedicated or general purpose use
[D] Part of the auxiliary memory

15. For which of the following flip-flop the output clearly defined for all combinations of two inputs?
[A] Q type flip-flop
[B] R S type flip-flop
[C] J K flip-flop
[D] T flip-flop

16. Any number with an exponent of zero is equal to:

[A] zero

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[B] one
[C] that number
[D] ten

17. What is the Boolean expression for a three-input AND gate?

[A] X = A + B + C
[B] X = A · B · C
[C] A · B · C
[D] A B

18. Which of the following expressions is in the sum-of-products (SOP) form?

[A] AB + CD
[B] AB(CD)
[C] (A + B)(C + D)
[D] (A)B(CD)

19. The systematic reduction of logic circuits is accomplished by:

[A] symbolic reduction
[B] using Boolean algebra
[C] TTL logic
[D] using a truth table

20. In the decimal numbering system, what is the MSD?

[A] The middle digit of a stream of numbers
[B] The digit to the right of the decimal point
[C] The last digit on the right
[D] The digit with the most weight

21. What is a digital-to-analog converter?

[A] It allows the use of cheaper analog techniques, which are always simpler.
[B] It takes the digital information from an audio CD and converts it to a usable form.
[C] It converts direct current to alternating current.
[D] It stores digital data on a hard drive.

22. The output of an AND gate is LOW ________.

[A] when any input is LOW
[B] all the time
[C] when all inputs are HIGH
[D] when any input is HIGH
23. On a master-slave flip-flop, when is the master enabled?
[A] when the gate is LOW
[B] when the gate is HIGH
[C] both of the above
[D] neither of the above

24. Popular application flip-flop are ?

[A] Counters
[B] Shift registers
[C] Transfer registers
[D] All of above

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25. The output of an OR gate is LOW when ________.

[A] all inputs are LOW
[B] any input is LOW
[C] any input is HIGH
[D] all inputs are HIGH

26. When used with an IC, what does the term "QUAD" indicate?
[A] 4 circuits
[B] 2 circuits
[C] 8 circuits
[D] 6 circuits

27. How many pins does the 4049 IC have?

[A] 20
[B] 16
[C] 14
[D] 18

28. The Boolean expression for a 3-input AND gate is ________.

[A] X = AB
[B] X = ABC
[C] X = A + B + C
[D] X = AB + C

29. Any number with an exponent of zero is equal to:

[A] one
[B] zero
[C] that number
[D] ten

30. Which of the following statements does NOT describe an advantage of digital technology?
[A] The values may vary over a continuous range.
[B] The circuits are less affected by noise.
[C] The operation can be programmed.
[D] Information storage is easy.

31. The generic array logic (GAL) device is ________.

[A] one-time programmable
[B] reprogrammable
[C] a CMOS device
[D] reprogrammable and a CMOS device

32. With regard to a D latch, ________.

[A] the Q output follows the D input when EN is LOW
[B] the Q output is opposite the D input when EN is LOW
[C] the Q output follows the D input when EN is HIGH
[D] the Q output is HIGH regardless of EN's input state

33. A correct output is achieved from a master-slave J-K flip-flop only if its inputs are stable while the:

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[A] clock is LOW

[B] slave is transferring
[C] flip-flop is reset

34. The output of an AND gate is LOW ________.

[A] all the time
[B] when any input is LOW
[C] when any input is HIGH
[D] when all inputs are HIGH

35. SR Flip flop can be converted to T-type flip-flop if ?

[A] S is connected to Q
[B] R is connected to Q
[C] Both S and R are shortend
[D] S and R are connected to Q and Q' respectively

The ________ circuit overcomes the problem of switching caused by jitter on the inputs.
Astable Multivibrator
(a) Monostable Multivibrator
(b) Bistable Multivibrator
(c) Schmitt Trigger

What is another name for a bistable multivibrator?

(a) an on-off switch
(b) an oscillator
(c) a flip-flop
(d) none of the above

An astable 555 timer has the following number of stable states:

(a) 0
(b) 1
(c) 2
(d) 3

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What is another name for a bistable multivibrator?

(a) an on-off switch (c) a flip-flop

(b) an oscillator (d) none of the above

l. An astable 555 timer has the following number of stable states:

(c) 2
(a) 0 (d) 3
(b) 1
1. Design a full subtractor using two half subtractors.
2. Implement the following function using all 4:1 MUX:
F= ∑m(0,2,3,6,8,9,12,14)
3. Implement a full adder circuit using a decoder and additional logic if required.
4. Minimize the following expression using a K-map and realize the simplified expression using NAND
gates only.
F(A,B,C,D) =∑m(1,2,3,5,6,11,12)+ ∑d(7,8,10,14)
5. Implement a clocked JK flip-flop using NAND gates.
6. What do you mean by Race-around condition of a flip-flop? How can it be overcome?
7. Implement the following function using 8:1 MUX:
F(A,B,C,D) = ∑m(0,2,4,8,9)
8. Perform the arithmetic operation (-25)10 + (15)10 in sign 2’s complement method. Assume 1- bit sign
and 6- bit information.
9. Simplify the following function using Karnaugh map and realize the expression using basic logic gates:
F(A,B,C,D)= ∑m(2,4,5,13,14) + ∑d(0,1,8,10)
10. Explain the Master-Slave flip-flop.
11. Realize a full subtractor using all NAND gates.
12. Impliment a 16:1 MUX by only 4:1MUX.
13. Simplify the expression using K-map Y= П M(0,1,4,5,6,8,9,12,13,14) and realize the expression using
basic logic gates.
14. Design a J/K flip-flop using D flip-flop.
15. What are the specifications of the D/A converter?
16. Draw and Explain the working Principle of CMOS.

1. (a) Perform the conversion from D flip-flop to S-R flip-flop.

(b)Design 16x8 memory RAM chip using two 16x4 memory RAM chips.
(c) Design a full subtractor using NAND gates and NOR gates.

2. (a) What is the difference between combinational and sequential circuits? What is flip-flop?
(b) Design a 3bits Gray code to binary converter using suitable logic gates. Convert the Gray Code 11011
to equivalent binary code.

3. (a)Draw the logic diagram of the master- slave JK flip-flop. Why is it called so? Explain it.
(b) Simplify the following function by tabular method:

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F= ∑ m(0,1,3,5,7,9,123,15)+ ∑d (4,6).

4. (a) Design a BCD to Seven segment decoder circuit by basic logic gates.
(b) What is called shift register? Design a MOD 6 synchronous binary UP counter using JK flip-flop and
other necessary logic gates.

5. (a) Construct a 5x32 decoder with four 3x8 decoders and a 2x4 decoder, show the block diagram only.
(b)Design a presettable 4-Bit asyncgronous counter using J-K flip-flop. A binary ripple counter is
required to count up to (16383)10. How many flip-flops are required?

6. (a) Write the definitions of BCD code and self complementing code with example. What is Gray Code?
What is ASCII code?
(b)What do you mean by Asynchronous inputs of a flip-flop? What is edge trigger flip-flop and why is it
required? Convert S-R flip-flop to J-K flip-flop.

7. (a) Describe the operation of a Flash type A/D converter with proper circuit. What are the advantages
and disadvantages of the Flash type A/D converter.
(b) Draw the state table of a JK flip-flop and write down its characteristic equation.

8. (a)Design a synchronous MOD 10 counter and draw the timing diagram.

(b)What are the main differences between a latch and a flip-flop? What is Edge trigger and Level trigger
clock pluse?

9. (a) Simplify the logic function using Quine-McCluskey method

F(A,B,C,D)= ∑m(0,1,2,3,5,7,8,9,11,14)
(b) What is Don’t care condition? How is it useful to simplify a Boolean expression? Simplify the
function F(A,B,C,D)= ∑m(1,3,7,11,15)+∑d(0,2,5).

10. (a) Find the complement of (735)8.

(b) Design a full adder circuit using two half adder circuits. Draw the logic circuit diagram for a 2 to 4
decoder with one active low enable line. Assume also that all the outputs of the decoders are active low.
(c) How do you cascade two 2to 4 decoders to make one 3 to 8 decoder? Draw the necessary circuit.

11. (a)What is ripple counter? Design a MOD-5 synchronous counter using J-K flip-flop.
(b) Describe the basic principle of successive approximation method for A/D converter.

12. (a) Draw the circuit for bit Johnson counter using D flip-flop and explain operation. Draw the timing
diagram for this 4 bit Johnson counter. How does this timing diagram differ from that of a ring counter?
(b) Perform the conversion from D flip-flop to JK flip-flop.

13. (a) What is multi-vibrator? Describe the operation of a 555 timer in astable mode and hence calculate
the duty cycle. In a monostable multivibrator R= 100KQ, and the time delay T= 100ms, Calculate the
value of C.

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13. Write short notes on any three of the following:

a) BCD adder.
b) CMOS Logic family.
c) Odd Parity Generator and Checker.
d) Johnson Counter.
e) Universal gate.
f) BCD to Excess-3 converter.
g) Successive approximation register type ADC.
h) Even Parity Generator and Checker.
i) Ring Counter.
j) EPROM.
k) SOP an POS canonical forms of binary function.
l) R-2R Ladder type DAC.
m) Comparator.
n) Bidirectional Shift Register.
o) PAL.
p) Class AB Amplifier

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