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STF 9 NK 90 Z
STF 9 NK 90 Z
STP9NK90Z, STW9NK90Z
N-channel 900 V, 1.1 Ω, 8 A, TO-220, TO-220FP, D2PAK, TO-247
Zener-protected SuperMESH™ Power MOSFET
Features
RDS(on)
Type VDSS ID Pw
max.
3
3 1
STB9NK90Z 160 W 1
2
Application
■ Switching applications Figure 1. Internal schematic diagram
D(2)
Description
The SuperMESH™ series is obtained through an
optimization of STMicroelectronics’ well-
established strip-based PowerMESH™ layout. In
G(1)
addition to pushing on-resistance significantly
lower, it also ensures very good dv/dt capability
for the most demanding applications. This series
complement STs’ full range of high voltage power
MOSFETs.
S(3)
AM01476v1
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
1 Electrical ratings
2 Electrical characteristics
Drain-source breakdown
V(BR)DSS ID = 1 mA, VGS= 0 900 V
voltage
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Input capacitance
Ciss 2115 pF
Output capacitance VDS = 25 V, f = 1 MHz,
Coss - 190 - pF
Reverse transfer VGS = 0
Crss 40 pF
capacitance
Equivalent output
Coss eq(1) VGS = 0, VDS = 0 to 720 V - 115 - pF
capacitance
Qg Total gate charge VDD = 720 V, ID = 8 A 72 nC
Qgs Gate-source charge VGS =10 V - 14 - nC
Qgd Gate-drain charge Figure 20 38 nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP
Figure 6. Safe operating area for TO-247 Figure 7. Thermal impedance for TO-247
Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations
Figure 14. Normalized gate threshold voltage Figure 15. Normalized on resistance vs
vs temperature temperature
Figure 16. Source-drain diode forward Figure 17. Normalized BVDSS vs temperature
characteristics
3 Test circuits
Figure 19. Switching times test circuit for Figure 20. Gate charge test circuit
resistive load
VDD
12V 47kΩ
1kΩ
100nF
RL 2200 3.3
µF µF
VDD IG=CONST
VD Vi=20V=VGMAX 100Ω D.U.T.
VGS 2200
RG D.U.T. µF 2.7kΩ VG
PW
47kΩ
PW 1kΩ
AM01468v1 AM01469v1
Figure 21. Test circuit for inductive load Figure 22. Unclamped Inductive load test
switching and diode recovery times circuit
L
A A A
D
FAST L=100µH VD
G D.U.T. DIODE 2200 3.3
µF µF VDD
S B 3.3 1000
B B µF µF
25 Ω VDD ID
D
RG S
Vi D.U.T.
Pw
AM01470v1 AM01471v1
Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform
90% 90%
IDM
10%
ID 10% VDS
0
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
L7
A
B
D
Dia
L5
L6
F1 F2
H G
G1
L2 L4
L3
7012510_Rev_K
mm
Dim
Min Typ Max
A 4.40 4.60
b 0.61 0.88
b1 1.14 1.70
c 0.48 0.70
D 15.25 15.75
D1 1.27
E 10 10.40
e 2.40 2.70
e1 4.95 5.15
F 1.23 1.32
H1 6.20 6.60
J1 2.40 2.72
L 13 14
L1 3.50 3.93
L20 16.40
L30 28.90
∅P 3.75 3.85
Q 2.65 2.95
0015988_Rev_S
mm.
Dim.
Min. Typ. Max.
A 4.85 5.15
A1 2.20 2.60
b 1.0 1.40
b1 2.0 2.40
b2 3.0 3.40
c 0.40 0.80
D 19.85 20.15
E 15.45 15.75
e 5.45
L 14.20 14.80
L1 3.70 4.30
L2 18.50
øP 3.55 3.65
øR 4.50 5.50
S 5.50
mm in c h
Dim
Min Typ Max Min Typ Max
A 4.40 4.60 0.173 0.181
A1 0.03 0.23 0.001 0.009
b 0.70 0.93 0.027 0.037
b2 1.14 1.70 0.045 0.067
c 0.45 0.60 0.017 0.024
c2 1.23 1.36 0.048 0.053
D 8.95 9.35 0.352 0.368
D1 7.50 0.295
E 10 10.40 0.394 0.409
E1 8.50 0.334
e 2.54 0.1
e1 4.88 5.28 0.192 0.208
H 15 15.85 0.590 0.624
J1 2.49 2.69 0.099 0.106
L 2.29 2.79 0.090 0.110
L1 1.27 1.40 0.05 0.055
L2 1.30 1.75 0.051 0.069
R 0.4 0.016
V2 0° 8° 0° 8°
0079457_M
D2PAK FOOTPRINT
6 Revision history
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