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Questa® Clock Domain Crossing

Verification

Student Workbook

 2018 Mentor Graphics Corporation


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Part Number: 073746


Table of Contents
Module 1: CDC Backgrounder: .......................................................................... 15
Objectives ........................................................................................................................................... 16

Agenda ............................................................................................................................................... 17

Today’s Devices Need Multiple Clocks............................................................................................. 18

What Is Meant by Clock-Domain Crossing (CDC)? ......................................................................... 19

Why CDC Errors Are Painful ............................................................................................................ 20

CDC Paths Cause Metastability ......................................................................................................... 21

Metastability Happens ........................................................................................................................ 22

Common Types of CDC Errors .......................................................................................................... 23

CDC Synchronizers ............................................................................................................................ 24

CDC Transfer Protocols ..................................................................................................................... 26

Simulation vs. Silicon Mismatch ....................................................................................................... 27

Reconvergence ................................................................................................................................... 28

Design for Reconvergence ................................................................................................................. 29

Single-Bit Reconvergence .................................................................................................................. 30

Real Clock-Domain Problems ............................................................................................................ 31

Common CDC Myths......................................................................................................................... 32

Agenda ............................................................................................................................................... 33

What Is Needed for CDC Verification? ............................................................................................. 34

CDC Verification Flow ...................................................................................................................... 35

Structural CDC Verification............................................................................................................... 36

Protocol Verification .......................................................................................................................... 37

Static Reconvergence Verification ..................................................................................................... 38

Dynamic Reconvergence Verification ............................................................................................... 39

Questa Clock Domain Crossing I


Verification
Table of Contents
The Role of Coverage ........................................................................................................................ 40

CDC Throughout The Design Flow ................................................................................................... 41

Summary ............................................................................................................................................ 44

Module 2: 5-Step Methodology: .......................................................................... 45


Objectives ........................................................................................................................................... 46

The CDC Test Planning Methodology ............................................................................................... 47

Step 1: Identify Potential Candidate................................................................................................... 48

Where to Apply CDC Analysis .......................................................................................................... 49

Where to Avoid CDC Analysis .......................................................................................................... 50

Step 2: Document CDC Requirements............................................................................................... 51

Define Operational Modes ................................................................................................................. 52

Determine Clock Scenarios ................................................................................................................ 53

Document Interface Signals ............................................................................................................... 54

Define Synchronization Rules ............................................................................................................ 55

Step 3: Formalize known exceptions ................................................................................................. 56

Step 4: Define CDC Coverage Goals ................................................................................................. 57

Monitor Coverage on CDC Paths....................................................................................................... 58

Step 5: Select Strategy........................................................................................................................ 59

Select Approach ................................................................................................................................. 60

Additional Considerations .................................................................................................................. 61

Module 3: Static CDC Analysis: ......................................................................... 63


Objectives ........................................................................................................................................... 64

Questa CDC Verification Methodology ............................................................................................. 65

Static CDC Analysis: Process ............................................................................................................ 66

Questa Clock Domain Crossing II


Verification
Table of Contents
Structural CDC Analysis: Flow.......................................................................................................... 67

Questa CDC Setup: ............................................................................................... 69


Objectives ........................................................................................................................................... 70

Set Basic Operation Conditions ......................................................................................................... 71

Controlling CDC: The CDC Control File .......................................................................................... 72

Running CDC: Batch or Script Mode ................................................................................................ 73

Library Mapping ................................................................................................................................ 74

HDL Language Compilation Steps .................................................................................................... 75

VHDL Compile Options .................................................................................................................... 76

CDC Tcl Shell Options ...................................................................................................................... 77

CDC Analysis Options ....................................................................................................................... 78

CDC Setup Tips ................................................................................................................................. 79

Structural CDC Analysis: Flow.......................................................................................................... 80

Analyze Clock Groups First… ........................................................................................................... 81

Structural CDC Analysis: Flow.......................................................................................................... 82

CDC Policy Checks Window ............................................................................................................. 83

CDC Setup Checks Window .............................................................................................................. 84

CDC Setup Review ............................................................................................................................ 85

Structural CDC Analysis: Flow.......................................................................................................... 87

Clock Classification and Use Model .................................................................................................. 88

Review Clock Trees ........................................................................................................................... 89

Review Clock Expression .................................................................................................................. 90

Clock Summary in cdc.rpt .................................................................................................................. 91

Clock Review ..................................................................................................................................... 92

Questa Clock Domain Crossing III


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Table of Contents
Clock Muxing Options ....................................................................................................................... 93

Static Clock Muxing........................................................................................................................... 94

cdc.rpt – I/O port info ......................................................................................................................... 95

Structural CDC Analysis: Flow.......................................................................................................... 96

I/O port domain assignments are critical............................................................................................ 97

Controlling CDC: Port Domains ........................................................................................................ 98

Controlling CDC: Port Attributes ...................................................................................................... 99

Refine Clock Groups and Input Domains ........................................................................................ 100

Controlling CDC: Clock Domains ................................................................................................... 101

Controlling CDC: Virtual Clocks ..................................................................................................... 102

Controlling CDC: Resets .................................................................................................................. 103

Controlling CDC: Netlist Reset Directive ........................................................................................ 104

Structural CDC Analysis: Flow........................................................................................................ 105

... Then Perform CDC Checks.......................................................................................................... 106

Structural CDC Analysis: Flow........................................................................................................ 107

CDC Output...................................................................................................................................... 108

CDC Settings Report ........................................................................................................................ 109

Using the GUI to Analyze Results ................................................................................................... 110

Controlling CDC: Signal Properties ................................................................................................. 111

Stable TX or RX ............................................................................................................................... 112

Configuration Register Stable (-ignore_stable_source) ................................................................... 113

Controlling CDC: SDC Support ....................................................................................................... 114

Import: SDC to Directive Mapping .................................................................................................. 115

Import: set_clock_groups & set_false_paths ................................................................................... 116

Export: Directive to SDC Mapping .................................................................................................. 117

Questa Clock Domain Crossing IV


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Table of Contents
Controlling CDC: User Preferences ................................................................................................. 118

Some Commonly Used Preferences ................................................................................................. 119

Formal CDC ..................................................................................................................................... 120

DUT Synthesis Controls: Black Boxes ............................................................................................ 121

DUT Synthesis Controls: Missing Modules..................................................................................... 122

DUT Synthesis Controls: Netlist Memory ....................................................................................... 123

DUT Synthesis Controls: Logic Pruning ......................................................................................... 124

Advanced Usage: ................................................................................................. 125


Objectives ......................................................................................................................................... 126

Using Performance Mode................................................................................................................. 127

CDC Performance Mode - Fast, Non-exhaustive Results ................................................................ 128

DUT Synthesis Controls: Empty Modules ....................................................................................... 129

DUT Synthesis Controls: Multi-Dimensional Arrays ...................................................................... 130

DUT Synthesis Controls: Constant Propagation .............................................................................. 131

Module 3.2: Reviewing Static Results: ............................................................. 133


Objectives ......................................................................................................................................... 134

Static CDC Analysis: Flow .............................................................................................................. 135

Expected Results .............................................................................................................................. 136

Interpreting Categories of Results .................................................................................................... 137

Severity: Violation ........................................................................................................................... 139

Violation Example: Missing Synchronizer ...................................................................................... 140

Signals Without a Synchronizer ....................................................................................................... 141

Violation Example: Combo Logic ................................................................................................... 142

Combination Logic Between Clock Domains .................................................................................. 143

Questa Clock Domain Crossing V


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Table of Contents
Severity: Caution .............................................................................................................................. 144

Caution Example: Data Mux ............................................................................................................ 145

Mux Synchronizers .......................................................................................................................... 146

Caution Example: Static Reconvergence ......................................................................................... 147

Reconvergence Detection ................................................................................................................. 148

Severity: Evaluated .......................................................................................................................... 149

Evaluated Example: 2-DFF Synchronizer........................................................................................ 150

Single-Bit 2-DFF Synchronizers ...................................................................................................... 151

Non-Default Severity Levels ............................................................................................................ 152

CDC Schemes .................................................................................................................................. 153

Flow-Based Synchronizer Detection ................................................................................................ 154

Achieving Closure ............................................................................................................................ 155

Module 3.2a: Synchronizer Flows: ................................................................... 157


Objectives ......................................................................................................................................... 158

CDC 2DFF & Pulse Synchronization:............................................................... 159


Objectives ......................................................................................................................................... 160

Controlling DFF-Based Synchronization ......................................................................................... 161

Single Edge Pulse Synchronization.................................................................................................. 162

Single Edge Pulse Synchronizer ...................................................................................................... 163

CDC DMUX & Handshake Synchronization: .................................................. 165


Objectives ......................................................................................................................................... 166

Data Mux Synchronization............................................................................................................... 167

Specify DMUX Enable .................................................................................................................... 168

DMUX No Hold ............................................................................................................................... 169

Questa Clock Domain Crossing VI


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Table of Contents
CDC Handshake Synchronizer Setup .............................................................................................. 170

CDC Handshake Scheme ................................................................................................................. 171

CDC FIFO Synchronization: ............................................................................. 173


Objectives ......................................................................................................................................... 174

Basic CDC FIFO Scheme ................................................................................................................ 175

CDC FIFO: With Register File ........................................................................................................ 176

CDC FIFO Scheme Categorization .................................................................................................. 177

Multi-Clock Memory Scheme .......................................................................................................... 178

Results Summary.............................................................................................................................. 179

Black Box Memory for FIFO ........................................................................................................... 180

Reconvergence Verification: .............................................................................. 181


Objectives ......................................................................................................................................... 182

Reconvergence Classified into 5 Categories .................................................................................... 183

Reconvergence of Bus Bit Synchronizers ........................................................................................ 184

Reconvergence of Bus Bits and Other Synchronizers ..................................................................... 185

Reconvergence of Gray-Coded Signals ........................................................................................... 186

New Scheme: Reconvergence_Gray ................................................................................................ 187

Example of Suppressed Reconvergence .......................................................................................... 188

Reconvergence Reporting Options................................................................................................... 189

Synchronizer Reporting: .................................................................................... 191


Objectives ......................................................................................................................................... 192

Report Base Schemes for Complex Synchronizers .......................................................................... 193

Module 3.3: Status Method: ............................................................................... 195


Objectives ......................................................................................................................................... 196

Questa Clock Domain Crossing VII


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Table of Contents
Status Method Benefits .................................................................................................................... 197

Incremental CDC Waiver Flow........................................................................................................ 198

Incremental Status Review ............................................................................................................... 199

Status in CDC Checks Window ....................................................................................................... 200

Status Attributes ............................................................................................................................... 201

Status Method ................................................................................................................................... 202

Modifying Severity and Status ......................................................................................................... 203

Status Details .................................................................................................................................... 204

Status Tcl Directive .......................................................................................................................... 205

CDC Report Item Command ............................................................................................................ 206

CDC Report Scheme ........................................................................................................................ 207

Creating Waivers With the CDC GUI.............................................................................................. 208

Add Comment to Status Waiver....................................................................................................... 209

Specify Status Display ..................................................................................................................... 210

Exporting Status Waivers ................................................................................................................. 211

Analysis Summary ........................................................................................................................... 212

Status Reporting ............................................................................................................................... 213

Waived Paths Mapped to Waivers ................................................................................................... 214

Waiver Conflict Resolution Rules.................................................................................................... 215

Wildcards in Waivers ....................................................................................................................... 216

Wildcards with Arrays ..................................................................................................................... 217

Controlling Wildcard Expansion ...................................................................................................... 218

Wildcards With Multi-Dimensional Arrays ..................................................................................... 219

Reuse of Block Level Waivers ......................................................................................................... 220

Tips for Writing Waivers ................................................................................................................. 221

Questa Clock Domain Crossing VIII


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Table of Contents
Module 3.4: CDC GUI: ....................................................................................... 223
Objectives ......................................................................................................................................... 224

Qverify GUI Options ........................................................................................................................ 225

CDC Debugger ................................................................................................................................. 226

CDC Checks Tab .............................................................................................................................. 227

CDC Checks Tab : Re-order Columns ............................................................................................. 228

Using the GUI – Compile/Run ......................................................................................................... 229

Project............................................................................................................................................... 230

Using the GUI .................................................................................................................................. 231

Using the GUI – Project Tab ............................................................................................................ 232

Using the GUI – Design Tab ............................................................................................................ 233

Using the GUI – Source and Schematic Windows .......................................................................... 234

Link to RTL Source.......................................................................................................................... 235

Path Tracing ..................................................................................................................................... 236

Using the GUI – Object Window ..................................................................................................... 237

Using the GUI – Clocks Tab ............................................................................................................ 238

CDC Checks View – Debug with Schematics ................................................................................. 239

CDC GUI Schematic View Hotkeys ................................................................................................ 240

Filter CDC Checks View.................................................................................................................. 241

Import/Export Filters ........................................................................................................................ 242

Trace to Port/Register/Clock Conflict .............................................................................................. 243

Generic Search ................................................................................................................................. 244

More Powerful Search ...................................................................................................................... 245

Regex Rules...................................................................................................................................... 246

Questa Clock Domain Crossing IX


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Table of Contents
Layout............................................................................................................................................... 247

Save/Restore State ............................................................................................................................ 248

Preferences ....................................................................................................................................... 249

Invoke on Specific Check ................................................................................................................ 251

Export the CSV ................................................................................................................................ 252

Excel CSV ........................................................................................................................................ 253

CDC Static Analysis : Lab 1 ............................................................................................................ 254

Reconvergence Viewing: ..................................................................................... 255


Objectives ......................................................................................................................................... 256

New Reconvergence View: Group by Tx Signal ............................................................................. 257

New Reconvergence View: Show Sets of Syncs ............................................................................. 258

Key Preference Setting: CDC Checks Hierarchy Depth .................................................................. 259

CDC Clock Colors ........................................................................................................................... 260

Module 3.7: Hierarchical CDC: ........................................................................ 261


Objectives ......................................................................................................................................... 262

Hierarchical CDC Analysis .............................................................................................................. 263

Agenda ............................................................................................................................................. 264

Questa CDC Hierarchical Data Model ............................................................................................. 265

Hierarchical CDC Analysis Flow ..................................................................................................... 266

Hierarchical CDC ............................................................................................................................. 267

Full Chip Hierarchical Model Variations ......................................................................................... 268

HDM Data Model – White Box Abstraction ................................................................................... 269

HDM White-box Abstraction ........................................................................................................... 270

HDM Data Model – Black Box Abstraction .................................................................................... 271

Questa Clock Domain Crossing X


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Table of Contents
HDM Black-Box Abstraction (iHDM) ............................................................................................ 272

HDM Data Model - User-Specified TCL HDM .............................................................................. 273

HDM Data Model............................................................................................................................. 274

HDM Decisions ................................................................................................................................ 275

HDM Bottom-Up Flow .................................................................................................................... 276

HDM Top-Down Use Model ........................................................................................................... 277

HDM Reconvergence ....................................................................................................................... 278

Is My Hierarchical Flow Bullet Proof? ............................................................................................ 279

Block-Level Conflicts ...................................................................................................................... 280

Top-Level Conflicts ......................................................................................................................... 281

Generate Reports for HDMs ............................................................................................................ 282

HDM Developer ............................................................................................................................... 283

Advanced HDM Capabilities ........................................................................................................... 284

HDM Block Compilation Without RTL .......................................................................................... 285

HDM Assumption Checks ............................................................................................................... 286

HDM Parameter Range Support ...................................................................................................... 287

Instance-Based Flow Background .................................................................................................... 288

Disable Parameter Checking ............................................................................................................ 289

Agenda ............................................................................................................................................. 290

Hierarchical Flow – Recommendations ........................................................................................... 291

Using SDC with Questa CDC/Formal: .............................................................. 293


Objectives ......................................................................................................................................... 294

SDC Use Model ............................................................................................................................... 295

SDC Use Models .............................................................................................................................. 296

Questa Clock Domain Crossing XI


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Table of Contents
SDC: create_clock ............................................................................................................................ 297

SDC: set_clock_groups .................................................................................................................... 298

SDC: set_clock_groups & set_false_paths ...................................................................................... 299

SDC Import Command..................................................................................................................... 300

Using SDC in Tcl Shell .................................................................................................................... 301

Questa Static: SDC Report Files ...................................................................................................... 302

SDC Export ...................................................................................................................................... 303

SDC Import Options......................................................................................................................... 304

SDC Directives ................................................................................................................................. 305

SDC: create_clock ............................................................................................................................ 306

SDC: create_generated_clock .......................................................................................................... 307

SDC: Port Domain Inference ........................................................................................................... 308

SDC Support: set_clock_groups ...................................................................................................... 309

SDC Support: Path Commands ........................................................................................................ 312

SDC Support: -add Option ............................................................................................................... 313

SDC Example for -add ..................................................................................................................... 314

Impact on Results (Netlist Clock) .................................................................................................... 315

Optimism With –add Can Miss Bugs! ............................................................................................. 316

When AddClock Paths Are Safe … ................................................................................................. 317

SDC Support: Collection Commands .............................................................................................. 318

Using SDC Collection Commands ................................................................................................... 319

Advanced SDC Control .................................................................................................................... 320

Customizing SDC Import ................................................................................................................. 321

Export: Directive to SDC Mapping .................................................................................................. 322

SDC Graph View ............................................................................................................................. 323

Questa Clock Domain Crossing XII


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Table of Contents
Questa 10.7 CDC Training: ................................................................................ 325
Objectives ......................................................................................................................................... 326

Questa Clock Domain Crossing XIII


Verification

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