CHAPTER 2

LOGIC GATES
 Lesson Outcome
At the end of the lesson, students
should be able to describe and
explain:
• Logic Gates: Symbols, Operations, truth tables, Timing Diagrams and Logic
Expressions
 NOT
 AND
 OR
 NAND
 NOR
 EX-OR
 EX-NOR
• IC Gates
 BASIC LOGIC GATES
• Logic gates are the • 7 types of Logic
basic building blocks Gates:
to form digital circuit. – INVERTER
• It has 1 o/p terminal. – AND
• O/p either HIGH – OR
(logic 1) or LOW (logic – NAND
0) depend on digital
level at i/p. – NOR
– Exclusive – OR
– Exclusive - NOR

ECE351 Chapter 2: Logic Gates 61

 2.1.1 NOT / INVERTER
• Used to complement a digital signal.
• It has only 1 output.

INPUT OUTPUT

A X
0 1
X  A
1 0

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 2.1.2 AND GATE
• It has 2 or more input.
• Operation for AND gates is multiplication ().
• O/p is HIGH when both input (A and B) are
HIGH.

INPUT OUTPUT
A
OUTPUT, X A B X
B
0 0 0
0 1 0
X  A B 1 0 0
1 1 1

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 TIMING DIAGRAM
Draw the waveform of X where X = A.B

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 2.1.3 OR GATE
• It has 2 or more input.
• Operation for OR gates is adding (+).
• O/p is HIGH whenever input A and B are
HIGH or both i/p are HIGH.

INPUT OUTPUT
A
X
A B X
0 0 0
B

0 1 1
X  A B 1 0 1
1 1 1

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 2.1.4 NAND GATE
• The o/p of NAND gate is inverted from o/p
of AND gate.

INPUT Output
NAND A B
A B X
X  A B 0 0 1 1
0 1 1 1
1 0 1 1

X  A B  A  B 1 1 0 0

ECE351 Chapter 2: Logic Gates 66

 2.1.5 NOR GATE
 The o/p NOR gate is inverted from OR
output.

INPUT Output
NOR A B
X  A B A B X
0 0 1 1
0 1 0 0
1 0 0 0
X  A  B  A B
1 1 0 0

ECE351 Chapter 2: Logic Gates 67

 2.1.6 EXCLUSIVE – OR GATE
 The o/p is 0 when both input are the same
 The o/p X-OR gate is inverted from X-NOR
output.
INPUT OUTPUT
X-OR
A B X
0 0 0
0 1 1
X  A B 1 0 1
X  AB  AB 1 1 0

ECE351 Chapter 2: Logic Gates 68

 2.1.7 EXCLUSIVE-NOR GATE
 The o/p is 1 when both input are the same
 The o/p X-NOR gate is inverted from X-OR
output.
INPUT OUTPUT
X-NOR
A B X
0 0 1
0 1 0
X  A B 1 0 0
X  A B  A B 1 1 1

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 SUMMARY of LOGIC GATES

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 2.2 IC GATES
• Digital logic gate circuits are manufactured as integrated circuits.
• A number of gates is enclosed in a single package called Dual Inline
Package (DIP) housing for plug in or feedthrough mounting, or Small
Outline Integrated Circuit (SOIC) for surface mounting.
• Part numbers specify what type of gates are enclosed.
• These part numbers are industry standards, meaning that a "74LS02"
manufactured by Motorola will be identical in function to a "74LS02"
manufactured by Fairchild or by any other manufacturer.
• Logic circuit part numbers beginning with "74" are commercial-grade TTL.
If the part number begins with the number "54", the chip is a military-
grade unit: having a greater operating temperature range, and typically
more robust in regard to allowable power supply and signal voltage levels.

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 Packaging - DIP

Packaging - SOIC

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 Common
TTL "DIP" circuit packages

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 Universality of NAND & NOR Gates

• NAND & NOR gates can be used as:

– Inverter gates
– AND gates
– OR gates

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 Universality of NAND
A X

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 Universality of NOR
A X

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 Exercise
1.Draw the output waveform C and D, given the input waveforms A and B as shown be

ECE351 Chapter 2: Logic Gates 77

 Exercise
2. Refer to the circuit and complete the truth table
given. A B C Z
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

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 Solution
2. Refer to the circuit and complete the truth table
given. A B C Z
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

ECE351 Chapter 2: Logic Gates 79

 Exercise
3. Construct a circuit logic based on the following
functions:
F1  ABC  BC
F 2  F1  AB

4. Reconstruct the following circuit by using only:

a) NAND gates
b) NOR gates

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 Exercise
4. Reconstruct the following circuit by using only:
a) NAND gates

ECE351 Chapter 2: Logic Gates 81

 Exercise
4. Reconstruct the following circuit by using only:
b) NOR gates

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 Revision Chapter 2

A AB A A B
B B

A A B A
B AB
B

83
Universal Property of NAND and NOR gates

• What does ‘Universal Gate’ imply?

The gate can be used to produce other gates
– This section will be focused on NAND/NOR as an
inverter (NOT), AND , OR and NOR/NAND.

84
Universal Property of NAND and NOR gates

A B

A
A
AB

B
B
 A B
 A B

85
Universal Property of NAND and NOR gates

AB

A
A

B
A B
B AB

 AB
 AB

86
1. Redraw NAND logic diagram by using AND and OR
logic gates

87
 Solution

A AB
B
( AB)(CD)
C
D
CD

Bubbles cancel A
A AB  CD B AB  CD
B

C C
D
D

Bubbles cancel

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2. Redraw NOR logic diagram by using AND and OR
logic gates

89
 Solution

A B
A
B
( A  B)  (C  D)
C
D
CD

Bubbles cancel A
A ( A  B)(C  D)
B
B

C ( A  B)(C  D)
C
D
D

Bubbles cancel

90
3.The following combinational circuit is
defined by:

Implement the circuit using

• NAND gates only
• NOR gates only

ECE351 Chapter 3: Boolean Algebra 91