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Analog Electronics

GATE - 2020/21

Practice

Analysis

Result

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 Analog Electronics

S NO. TOPICS PAGE NO.

1 BJT & Mosfet Analysis 1-9

2 OPAMP & Its Applications 1 - 11

3 Diode Circuits & Applications 1-9

4 Frequency Response, feedback, 1-7

Oscillator, & 555 Times
 CHAPTER – 01 BJT & MOSFET ANALYSIS

Q.1 In the BJT amplifier shown in the figure (C) An Emitter follower stage followed
is the transistor is biased in the forward by a common base stage
active region putting a capacitor across (D) A common base stage followed by a
RE will common Emitter stage
Q.4 For good stabilized biasing of the
transistor of the CE amplifier of fig. we
VC C should have
+
Rbias RL
+ +Vcc

Vin RE
Vout R2 Rc
- - +
+ R1  R2  RB
(A) Decrease the voltage gain and Vin R1 V0
RE
decrease the input impedance
- -
(B) Increase the voltage gain and
decrease the input impedance
(C) Decrease the voltage gain and
RE RE
increase the input impedance (A)  1 (B)  1
RB RB
(D) Increase the voltage gain and
RE RE
increase the input impedance (C)  hFE (D)  hFE
RB RB
Q.2 A transistor having   0.99 and
VBE  0.7 V, is used in the circuit of the Q.5 In the circuit of the figure, assume that
the transistor is in the active region. It
figure is the value of the collector
current will be has a large  and its base-emitter
+12V voltage is 0.7 V. The value of I c is
1kΩ
15V
1kΩ
10kΩ
RC
10kΩ IC

1kΩ
5kΩ
43 0Ω

Q.3 A cascade Amplifier stage is equivalent

to
(A) A common emitter stage followed (A) Indeterminate since Rc is not given
by a common base stage (B) 1 mA
(B) A common base stage followed by (C) 5 mA
an emitter follower (D) 10 mA
 2 | Analog Electronics
Q.6 The current gain of a bipolar transistor is 150. For a transistor with  of 200,
drops at high frequencies because of the operating point (VCE , I C ) is
(A) transistor capacitances
(B) High current effects in the base V
CC =6V
(C) Parasitic inductive elements
R2
(D) The Early effect R1
Q.7 The current gain of BJT is
g
(A) g m ro (B) m
ro
gm
(C) g m r (D)
r
(A) (2V, 2mA) (B) (3V, 2mA)
Q.8 If the transistor in the figure is in
(C) (4V, 2mA) (D) (4V, 1mA)
saturation, then
Q.11 Assuming VCEsat  0.2V and  = 50, the

C minimum base current ( I B ) required to

IC drive the transistor in the figure to
IB saturation is
β dc denotes the
3V
B dc current gain IC

1 k
IB
E

(A) I C is always equal to  dc I B

(B) I C is always equal to   dc I B
(C) I C is greater than or equal to  dc I B (A) 56 μA (B) 140 μA
(D) I C is less than or equal to  dc I B (C) 60 μA (D) 3 μA
Q.9 Generally, the gain of a transistor Q.12 Assuming that the  of the transistor is
amplifier falls at high frequencies due to extremely large and VBE = 0.7V, IC and
the
VCE in the circuit shown in the figure are
(A) Internal capacitances of the device
(B) Coupling capacitor at the input
(C) Skin effect
(D) Coupling capacitor at the output
Q.10 In the amplifier circuit shown in the
figure, the values of R1 and R2 are such
that the transistor is operating at
VCE = 3V and IC =1.5 mA when its 
 BJT & MOSFET Analysis | 3
5V IC
which one of the following statements is
TRUE?
2.2 k
VCC  9 V
4 k

RC  2.78 k
VCE RB  800 k
Cc

V0
Cc
β  100
1 k Vi
300 k VS ~
RE  0.3 k CE
RI R0

(A) The input resistance Ri increases

(A) IC =1mA, VCE = 4.7V
and the magnitude of voltage gain
(B) IC =0.5mA, VCE = 3.75V
A V decreases
(C) IC =1mA, VCE = 2.5V
(B) The input resistance Ri decreases
(D) IC =0.5mA, VCE = 3.9V
and the magnitude of voltage gain
Q.13 The circuit using a BJT with  =50 and A V decreases
VBE = 0.7 V is shown in the figure. The (C) Both input resistance Ri and the
base current I B and collector voltage VC magnitude of voltage gain A V
are respectively decrease
(D) Both input resistance Ri and the
20 V
2 kΩ magnitude of voltage gain A V
430 kΩ V0
increase
10 µ F Q.15 The voltage gain A V , of the circuit
1kΩ 40 µ F shown below is

13.7 volts

12 k
(A) 43μA and 11.4 Volts C vo
C 100 k
(B) 40μA and 16 Volts β  100
10 k
(C) 45μA and 11 Volts vi ~
(D) 50μA and 10 Volts
Q.14 The amplifier circuit shown below uses
a silicon transistor. The capacitors CC (A) AV  200 (B) AV  100
and C E can be assumed to be short at
(C) AV  20 (D) AV  10
signal at signal frequency and the effect
of output resistance r0 can be ignored. If Q.16 A good current buffer has
(A) Low input impedance and low
C E is disconnected from the circuit,
output impedance
 4 | Analog Electronics
(B) Low input impedance and high and collector currents are equal. Given
output impedance that VT  25 mV,VBE  0.7V , and the
(C) High input impedance and low BJT output resistance ro is practically
output impedance
infinite. Under these conditions, the mid
(D) High input impedance and high band voltage gain magnitude,
output impedance
Av  vo / vi V / V , is _________.
Q.17 If the emitter resistance in a common-
Vcc  12
emitter voltage amplifier is not by RC 2 k C2
73 k R1
passed, it will 10 µ F
+
10 µF
(A) Reduce both the voltage gain and C1
RL
V0
8 k
the input impedance Vi ~ 47 k  R2
RE CE
2 k
100 µ F -
(B) Reduce the voltage gain and increase
the input impedance
(C) Increase the voltage gain and reduce Statement for linked Answer
the input impedance Questions 21 & 22:
(D) Increase both the voltage gain and
the input impedance
In the following transistor circuit,
Q.18 A BJT in a common-base configuration VBE  0.7 V, re  25mV/I E and  and
is used to amplify a signal received by a
all the capacitances are very large.
50 antenna. Assume kT / q  25 mV.
The value of the collector bias current
VCC  9 V
(in mA) required to match the input 3 k
20 k
impedance of the amplifier to the Cc 2
impedance of the antenna is _______. Cc1
IE
Q.19 In the ac equivalent circuit shown, the 10 k CE 3 k
2.3 k
two BJT’s are biased in active region
and have identical parameters with
Q.21 The value of DC current I E is
  1 . The open circuit small signal
voltage gain is approximately _______. (A) 1 mA (B) 2 mA
(C) 5 mA (D) 10 mA
Q.22 The mid-band voltage gain of the
amplifier is approximately
Vo (A) -180 (B) -120
Vi (C) -90 (D) -60
Q.23 For the Amplifier circuit of fig. The
transistor has a  of 800. The mid band
Q.20 For the DC analysis of the Common- voltage gain V0 / Vi of the circuit will be.
Emitter amplifier shown, neglect the
base current and assume that the emitter
 BJT & MOSFET Analysis | 5
+15 V 10V

200 k 470  20K 2k

4.7 µ F +
+ 6.4 µ F  VC
Vout
Vin 100 k 
- -
(A) 0 (B) < 1
20K 4.3k
(C)  1 (D) 800
Q.24 A cascade connection of two voltage
amplifiers A1 and A2 is shown in the (a) 2 V (b) 4.6 V
(c) 8 V (d) 8.6 V
figure. The open-loop gain Avo , input
Q.27 Thermal runaway will take place if the
resistance Rin , and output resistance Ro quiescent point is such that
for A1 and A2 are as follows: 1
(a) VCE  VCC (b) VCE < VCC
A1 : Avo  10, Rin  10k , Ro  1k  2
A2 : Avo  5, Rin  5k , Ro  200 1
(c) VCE < 2 VCC (d) VCE <
VCC
2
The approximate overall voltage gain
Q.28 An amplifier circuit is shown in the given
vout / vin is figure
12V
+ + 4k
60k
Vin A1 A2 RL 1 k vo ut
 V0
- - 10 F
h FE = 150

Q.25 The voltage V0 of the circuit shown in the

Vs ~
given figure is 30 k 3.3k 50 F
 5V

2 The voltage gain  V0 Vs  is

 V0

(a) 4/3.33 (b) 100
5 C
B (c) 150 (d) 160
E
Q.29 In the circuit shown,
10 Volts

RC 2.5 k
(a) 5 V (b) 3.1 V
40 k Si Transistor
(c) 2.5 V (d) zero
 = 100
Q.26 The collector voltage VC of the circuit VBE = 0.7

shown in the given figure is approximately 2.7V

 6 | Analog Electronics
The transistor is biased at (a) Cut-off region
(a) 0 mA (b) 5 mA (b) Saturation region
(c) 3.9 mA (d) ∞ (c) Active region
Q.30 Consider the following circuit: (d) Either in active or saturation region.
5V Q.33 The current gain of a bipolar transistor
drops at high frequency because of
1 k
(a) Transistor capacitances
VC (b) High current effects in the base
1 M
(c) Parasitic inductive elements
VE (d) The early effect
2 k Q.34 The Collector and Emitter current levels for
a transistor with Common base dc current
gain of 0.99 and base current of 20 µ A are
What is the voltage difference to the respectively.
collector and Emitter  VCE  in the above (a) 2 mA and 1.98 mA
circuit? (b) 1.98µA and 2 mA
(a) 10/3 V (d) 0 V (c) 1.98 mA and 2 mA
(c) 5 V (d) 3 V (d) 2 mA and 1.98 µA
Q.31 Which of the following will be true for a CE Q.35 Leakage current approximately doubles for
transistor Amplifier if the emitter Resistor every 10o C increase in temperature of a
value is made equal to zero? silicon transistor. If a silicon transistor has
1. Its gain will increase ICBO  1000 nA at 30o C , what is its
2. Its stability will increase
leakage current at 90o C ?
3. Its gain will decrease
(a) 32 µA (b) 64 µA
4. Its stability will decrease.
(c) 16 µA (d) 128 µA

Select the correct answer from the codes Q.36 Transistor is in saturation when
given below: IC
(a) IB = IC (b) I B >
(a) 1 and 2 (b) 2 and 3 dc
(c) 3 and 4 (d) 1 and 4 IC
(c) IB = 0 (d) I B <
Q.32 The transistor as shown in the circuit is dc
operating in:
Q.37 Two identical nMOS transistors
5V
M1 and M2 are connected as shown below.
5 k The circuit used as an amplifier with th
input connected between G and S terminals
100 k C and the output taken between D and S
B
E
terminals, Vbias and VD are so adjusted that
both transistors are in saturation. The
5V transconductance of this combination is
 BJT & MOSFET Analysis | 7
i D Q.39 In the following circuit employing pass
defined as g m = while the output
vGS transistor logic, all NMOS transistors are
identical with a threshold voltage of 1V.
v DS
resistance is ro = , where i D is the Ignoring the body –effect, the output
i D voltages at P, Q and R are,
current flowing into the drain of
M2 , Let g mt , g m2 be the transcondcutances 5V 5V 5V
  
and ro1 , ro2 be the output resistance of
transistors M1 and M2 , respectively
5V
VD
D   
P Q R

Vbias M2
(a) 4V, 3V, 2V (b) 5V, 5V, 5V
(c) 4V, 4V, 4V (d) 5V, 4V, 3V
M1
Q.40 For the MOSFET shown in the figure, the
G
threshold voltage Vt = 2V and
S
1 W
Which of the following statements about K= C   = 0.1mA V 2 . The value
2 L
estimates for g m and ro is correct? of ID (in mA) is_____.
(a) g m  g m1.g m2 . ro2 and ro  ro1 + ro2 VDD = +12V

(b) g m  g m1 + g m2 . and ro  ro1 + ro2

R 1 10k
(c) gm  g m1 and ro  ro1 . g m2 . ro2
(d) g m  g m1 and ro  ro2
Q.38 In the circuit shown in the figure, transistor ID
R 2 10k
M1 is in saturation and has
transconductance gm = 0.01 siemens.
Ignoring internal parasitic capacitances and
assuming the channel length modulation 
VSS = - 5V
to be zero, the small signal input pole
frequency  in kHz  is_____. Q.41 For the circuit shown in the following figure
transistors M1 and M2 are identical NMOS
VDD
transistors. Assume that M2 is in saturation
1 k and the output is unloaded.

 V0
50pF

Vin M1
5 k
 8 | Analog Electronics
VDD (c) nearly equal to the g m of M1
(d) nearly equal to g m g0 of M2

Ibias RE Q.43 For the circuit shown, assume that the

NMOS transistor is in saturation. Its
Va Vout threshold voltage Vin = 1V and its
Ix
transconductance parameter
M1  M2
W
n Cox   = 1mA V 2 . Neglect channel
Is L
length modulation and body bias effects.
Under these conditions, the drain current ID
The current I s is related to Ibias as in mA is____.

(a) I x = Ibias + Is VDD = 8V

R1
3 M R D 1 k
(b) I x = Ibias
(c) Ix = Ibias - Is ID

 V 
(d) I x = I bias -  VDD - out  R2
 RE  5 M R s 1 k
Q.42 Two identical NMOS transistors
M1 and M2 are connected as shown below.
Vbias is chosen so that both transistors are in
saturation. The equivalent g m of the pair is
Iout
defined to be at constant Vout
Vi
I out
Vout

M2
Vbias

Vi M1

The equivalent g m of the pair is

(a) the sum of individual g m ’s of the
transistors
(b) the product of individual g m ’s of the
transistors
 CHAPTER – 01 BJT & MOSFET ANALYSIS

Answer Key : BJT & MOSFET Analysis

1 B 2 3.75mA 3 A 4 B 5 D
6 A 7 C 8 D 9 A 10 A
11 A 12 C 13 B 14 A 15 D
16 B 17 B 18 0.50mA 19 -1 20 128
21 A 22 D 23 C 24 34.72 25 A
26 C 27 A 28 C 29 C 30 C
31 D 32 B 33 A 34 C 35 B
36 B 37 C 38 57.87KHz 39 C 40 0.9 mA
41 B 42 C 43 2mA
 CHAPTER – 02 OPERATIONAL - AMPLIFIRE & APPLICATIONS

Q.1 For the operational amplifier circuit shown, 3R

the output saturation voltages are  15V.
R
The upper and lower threshold for the V1 
circuit are, respectively. Vo

  V2
Vin R
 Vout 2R

10 k

5 5
5 k (A) V1  3V2 (B) 2V1  V2
2 2
+ 3V
 3 7 11
(C)  V1  V2 (D) 3V1  V2
2 2 2
(A) 5V and -5V (B) 7V and -3V Q.5 The circuit shown represents
(C) 3V and -7V (D) 3V and -3V
Q.2 In the circuit shown, assume that the op- C2
12V
Vi 
amp is ideal. If the gain (V0 / Vin ) is – 12, the R2 Vo

value of R (in kΩ) is _____. 12V
 2V
10 k 10 k R1

R C1
10 k
Vin  (A) a bandpass filter
V0 (B) a voltage controlled oscillator

(C) an amplitude modulator
(D) an monostable multivibrator
Q.3 Assuming that the op-amp in the circuit Q.6 In the circuit shown, the op-amp has finite
shown below is ideal, the output voltage V0 input impedance, infinite voltage gain and
(in volts) is ____. zero input offset voltage. The output voltage
2 k Vout is
12 V
R2
1 k R1 I1
 
Vo
  Vout
I2
1V 12 V

Q.4 Assuming that the Op-amp in the circuit

shown is ideal, V0 is given by (A) I 2  R1 + R 2  (B) I2 R 2
(C) I1 R 2 (D) I1  R1 + R 2 
Q.7 in the low-pass filter shown in the figure,
for a cut-off frequency of 5 kHz, the value
of R 2 (in kΩ) is _____.
2 | Operational Amplifiers & Applications
R2 Q.10 The circuit below implement a filter
C between the input current I i and output

1 k 10nF voltage V0 . Assume that the op-amp is

Vi 
R1 Vo ideal. The filter implemented is a

L1

 
Ii R1
Q.8 In the circuit shown below what is the
 
output voltage (Vout ) if a silicon transistor Q 
 
and an ideal op-amp are used? Vo


+15V Q
1 k (A) low pass filter (B) band pass filter

Vout (C) band stop filter (D) high pass filter

Q.11 Assuming the Op-AMP to be ideal, the
5V + -15V
 voltage gain of the amplifier shown below is
R1

V0
(A) 15 V (B) 0.7 V

(C) +0.7 V (D) 15 V R2

Q.9 The circuit shown is a Vi +



R2 R3

R2 R3
C R1 +5V
 (A)  (B) 
     R1 R1
Input Output
 
 R R   R + R3 
(C)   2 3  (D)   2 
5V
 R1   R1 
Q.12 The OP-Amp circuit shown below
(A)low pass filter with represents a
1 C
f3dB  rad s
 R1 + R 2  C
1 R2
(B) high pass filter with f 3dB  rad s Vi L
 
R1C R1  Vo

1
(C) low pass filter with f 3dB  rad s
R1C
(D) high pass filter with (A) high pass filter (B) low pass filter
1 (C) band pass filter (D)band reject filter
f3dB  rad s
 R1 + R 2  C
 Analog Electronics| 3
Q.13 In the OP-Amp circuit shown, assume that (C) high pass, 10000 rad sec
the diode current follows the equation (D) low pass, 10000 rad sec
I = IS exp  V VT  .For Vi = 2V, V0 = V01 ,
Q.16 The input resistance R i of the amplifier
and for Vi  4V, V0 = V02 The shown in the figure is
Relationship between V01 and V02 is
30 k

10 k
2 k 
Vi  
 

Vo
VS ~ Ideal operational amplifier
Ri

(A) V02 = 2V01 30

(A) k (B) 10 k
(B) V02 = e2 V01 4
(C) 40 k (D) infinite
(C) V02 = V01In 2
Q.17 In the op-amp circuit given in the figure, the
(D) V01  V02 = VT In 2 load current i L is
Q.14 For the Op-Amp circuit shown in the figure, VS R1 R1
V0 is
2 k 

R2 

1 k
 
  Vo iL R2
1V
  RL
1 k
1 k
vs vs
(A)  (B)
(A) 2 V (B) 1 V R2 R2
(C) 0.5 V (D) 0.5 V vs vs
(C)  (D)
Q.15 The OP-amp circuit shown in the figure is a RL R1
filter. The type of filter and its cut-off
Q.18 The circuit in the figure is
frequency are respectively
10 k


10 k R R  Vout
 
Vin

Vi 
1F
1 k

(A) low-pass filter (B) high-pass filter

(A) high pass, 1000 rad sec
(C) band-pass filter (D) band-reject
(B) low pass, 1000 rad sec filter
4 | Operational Amplifiers & Applications
Q.19 An ideal op-amp is an ideal (B) R i = 0, A = , R 0 = 0
(A) voltage controlled current source
(C) R i = , A = , R 0 = 
(B) voltage controlled voltage source
(C) current controlled current source (D) R i = 0, A = , R 0 = 
(D) current controlled voltage source Q.24 Assume that the op-amp of the figure is
Q.20 If the op-amp in the figure is ideal, the ideal, If Vi is a triangular wave, then V0 will
output voltage Vout will be equal to be
R
5 k

C
1 k Vi 
2V  V0
Vout 
3V 
1 k

8 k
(A) square wave (B) triangular wave
(C) parabolic wave (D) sine wave
(A) 1 V (B) 6 V Q.25 In the circuit of the figure, V0 is
(C) 14 V (D) 17 V
+15 V
Q.21 An amplifier using an op-amp with a slew- 
rate SR= 1V/ µsec has a gain of 40dB. If V0
1 V 
this amplifier has to faithfully amplify
sinusoidal signals from dc to 20 kHz  15 V

without introducing any slew-rate induced

R
distortion, then the input signal level must
(A) -1 V (B) 2 V
not exceed.
(C) +1 V (D) +15 V
(A) 795 mV (B) 395 mV
Q.26 One input terminal of high gain comparator
(C) 79.5 mV (D) 39.5 mV
circuit is connected to ground and
Q.22 The inverting OP-AMP shown in the figure
sinusoidal voltage is applied to the other
has an open-loop gain of 100. The closed-
input. The output of comparator will be
loop gain V0 VS is
(A) a sinusoid
R 2 = 10k
(B) a full rectified sinusoid
(C) a half rectified sinusoid
R 1 = 1k (D) a square wave
 
VS Vi  Q.27 The circuit shown in the figure is that of
  V0
Vin 
V0

(A) - 8 (B) - 9
(C) - 10 (D) - 11 R1
Q.23 The ideal OP-AMP has the following R2

characteristics.
(A) R i = , A = , R 0 = 0 (A) a non-inverting Amplifiers
(B) an inverting Amplifier
 Analog Electronics| 5
(C) an oscillator 90 k

(D) a Schmitt trigger

1 k
Q.28 The output voltage V0 of the circuit shown V1 
in the figure is V2  V0
10 k 1 k
100 k

5 k

(A) ∞ (B) 0
 V0
2V +
 (C) 1000 (D) 1800
Q.32 The Op-Amp of figure shown below has a
100 k
very poor open loop voltage gain of 45 but
10 k
is otherwise ideal. The gain of the Amplifier
equals.
8 k
(A) -4 V (B) 6 V
(C) 5 V (D) -5.5 V
2 k

Q.29 Assume that the operational amplifier in 
 Vout
Vin
figure is ideal the current I through the 1K
ohm resistor is ____. (A) 5 (B) 20
(C) 4 (D) 4.5
2 k  V 
Q.33 The input resistance R IN   X  of the
 IX 

circuit in figure is
 1 k R 1  10 k  R 2  100 k
2 mA 
2 k


V
Q.30 The circuit of fig. uses on ideal OP-Amp for 
y

small positive values of Vin , the circuit

IX
works as VX

R 3  1 M

(A) +100 kΩ (B) -100 kΩ

R
Vin
 (C) +1MΩ (D) -1MΩ
 Vout Q.34 Assuming the operational amplifier to be
ideal, the gain Vout Vin for the circuit shown
(A) a half wave rectifier in figure is
(B) a differentiator
(C) a logarithmic Amplifier
(D) An exponential Amplifier
Q.31 The CMRR of the differential Amplifier of
the figure shown below is equal to
6 | Operational Amplifiers & Applications
10 kΩ 10 kΩ Q.37 For the Op-Amp circuit shown in figure,
determine the output voltage Vo .Assume
1 k
1 kΩ that the Op-Amp are ideal.
Vin  
 Vout
 1 k 2 k 4 k 8 k
1V

 
(A) -1 (B) -20 V0
 1 V 
(C) -100 (D) -120
Q.35 The output voltage  V0  of the Schmitt 1 k
3 k

trigger shown in figure swings between +

15V and – 15V. Assume that the operational
amplifier is ideal. The output will changes 8 20
(A) V (B) V
from + 15V to – 15V when the 7 7
instantaneous value of the input sine wave (C) -10V (D) None of these
is, Q.38 The circuit shown in figure uses an ideal
100 Op-Amp working with +5V and -5V power

Vi = 10sin  t V0 supplies. The output voltage V0 is equal to

10 k 1 k

 5V
3 k  
 V0
2V 
1mA
 5V
(a) 5V in the positive slope only.
(b) 5V in the negative slope only.
(C) 5V in the positive and negative slopes. (A) + 5V (B) – 5V
(D) 3V in the positive and negative slopes. (C) + 1V (D) – 1V
Q.36 For the oscillator circuit shown in figure, Q.39 Let the magnitude of the gain in the
the expression for the time period of inverting Op-Amp circuit shown be x with
oscillations can be given by (where   RC ) switch S1 open. When the switch is closed,
R the magnitude of gain becomes
S1
C

R R
V0 R
 
R
V0


x
(A) (B) x
(A)  ln 3 (B) 2 ln 3 2
(C)  ln 2 (D) 2 ln 2 (C) 2x (D) 2x
Q.40 A low-pass filter with a cut-off frequency of
30 Hz is cascaded with a high-pass filter
 Analog Electronics| 7
with a cut-off frequency of 20 Hz. The R2
resultant system of filters will function as C
 
(A) an all-pass filter. 15 V
R1
(B) an all-stop filter. Vin  
 Vout
(C) a band stop (band-reject) filter. 
15 V
(D) a band-pass filter.
Q.41 The Op-Amp shown in the figure is ideal. (A) low pass filter.
The input voltage (in Volt) is (B) band pass filter.
Vi  2sin  2 2000t  . The amplitude of (C) high pass filter.
the output voltage V0 (in Volt) is _____. (D) notch filter.
0.1 F
Q.44 The approximate transfer characteristic for
the circuit shown below with an ideal
  operational amplifier and diode will be
1 k 1 k
Vi  
 V0 VSS
 Vin 


D
Q.42 The saturation voltage of the ideal Op-Amp -VSS
shown below is 10V . The output voltage
V0
V0 of the following circuit in the steady-
R
state is
1 k
V0
(A)


 10 V
0.25 F
 Vin
 V0


10 V
2 k
V0
(B)


2 k

Vin
(A) square wave of period 0.55 ms.
(B) triangular wave of period 0.55 ms.
(C) square wave of period 0.25 ms.
(D) triangular wave of period 0.25 ms.
Q.43 The circuit shown below is an example of a
8 | Operational Amplifiers & Applications
V0 Q.47 In the circuit below, the operational
©
amplifier is ideal. If V1  10mV and
V2  50mV , the output voltage  Vout  is
Vin 100 k

10 k
V1 
V0 Vout
V2 
(D) 10 k
100 k

Vin
(A) 500 mV (B) 100 mV
Q.45 For the circuit shown below, assume that
(C) 600 mV (D) 400 mV
the Op-Amp is ideal.
R
Q.48 An Op-Amps circuit is shown in the figure.

R R R


R +Vsat
   +Vsat
R

  
  V Vi
 V0

2R  -Vsat
VS -Vsat
2R
R2

Which one of the following is TRUE?
R1
(C) v0  2.5vs (D) v0  5vs
Q.46 The op-amp shown in the figure is ideal.
The output of the circuit for a given input
v
The input impedance in is given by Vi is
iin
R   R 
Z (A)   2  Vi (B)  1  2  Vi
 R1   R1 
iin
  R 
V0
(C)  1  2  Vi (D)  Vsat or  Vsat

  R1 
v in ~ Q.49 In the Op- Amp circuit shown in the output
 R1
R2 would be
10k 
R R
(A) Z 1 (B)  Z 2
R2 R1 1k
10mA 
R1 Vo
(C) Z (D) Z 30mA 
R1 + R 2 1k

10k
 Analog Electronics| 9
(A) 400 mV (B) 300 mV Q.52 Which one of the following conditions
(C) 200 mV (D) 100 mV would give Vo = 0 in the circuit shown in
Q.50 Given that the open-loop of the Op-Amp the figure?
shown in the figure is 100000 = 10 , The  5
 R2

approximate output voltage  Vo  will be

R1 I
 12V 
Vo

10V  I
Vo
 R
12V
10k
- 12V
(A) R = R1 + R 2
(B) R = R 2 / R1
(A) + 12 V (B) – 12 V
(C) – 2 microvolt (D) – 0.2 V (C) R = R 2 - R1
Q.51 Under what condition will the (D) R = R1 R 2
instrumentation amplifier circuit given in Q.53 The Circuit shown in the given figure can
the figure possess highest CMRR? ( be used as a
R s1 and R s2 source resistances )

R2 R

V0
R1 Vi ~ 

Vo

R s1 R3
 R4 (A) Rectifier
Vs1 R s2
 (B) Voltage to frequency converter

Vs2 (C) Frequency to voltage converter
 (D) Logarithmic Amplifier
Q.54 The circuit diagram of an op-amp based
R R amplifier is shown in the given figure. The
(A) 1 = 3
R2 R4 Vout
ratio is equal to
R s1 + R1 R + R3 Vin
(B) = s2
R2 R4
R s1 + R 2 R + R4
(C) = s2
R1 R3
R s1 R
(D) = s2
R2 R4
10 | Operational Amplifiers & Applications

75K 75K 100k

470 k
 22k

10 k
  47 k
 2.2k
 
Vout
Vin 15K ~ 1 mv 

V0

(A) 9 (B) 11
(C) 10 (D) 21
(A) – 1.1 V (B) 1.1 V
Q.55 In the circuit shown in the given figure, the
(C) 1.0 V (D) 10 V
current flowing through resistance of 100Ω
would be Q.58 In the circuit shown in the given figure, Vo
is given by
 10V
10k 4.14k
1k


10 V 1M V0
sin t 

1 F

2V 

10V (A) sin  t -  4 

100 k
(B) sin  t +  4 
(C) sin t
(D) cos t
(A) 8 mA (B) 10 mA Q.59 An op-amp circuit is shown in the figure.
(C) 20 mA (D) 100 mA R
Q.56 Find Vo ? + VCC

3R


R  VCC V0
 C 
V0 R2
R
 
 4V R1

R

4 - 2cost  The output Vo will be (assume ideal op-
(A) – 0.75V (B)  4 cost V amp)
(C)  8 cost V (D) 16 V (A) equal to zero because the inputs is zero
Q.57 What is the output voltage Vo of the below (B) dependent on element values hence
circuit? nothing can be predicted without a
knowledge of element values
(c) a square wave varying between
 Analog Electronics| 11
+ VCC and - VCC (A) Square wave
(B) Triangular wave
(D) a sinusoidal wave of amplitude VCC
(C) Half-wave rectified sine wave
Q.60 If the inverting input terminal of an
operational amplifier is grounded and a (D) Full-wave rectified sine wav
sinusoidal voltage waveform is applied at
the non-inverting input terminal, the output
will be
Answer Key :Operational Amplifiers and Application

1 B 2 1 kΩ 3 12 Volts 4 D 5 D

6 C 7 3.18 kΩ 8 B 9 B 10 D

11 A 12 B 13 D 14 C 15 A

16 B 17 A 18 A 19 B 20 B

21 C 22 B 23 A 24 A 25 D

26 D 27 D 28 D 29 -4 mA 30 C

31 C 32 D 33 B 34 D 35 A

36 B 37 D 38 D 39 A 40 D
41 1.245 42 A 43 A 44 A 45 C
46 B 47 400 mV 48 D 49 C 50 D

51 B 52 D 53 D 54 B 55 A

56 -4Cos  t 57 B 58 A 59 C 60 A
A

 CHAPTER – 03 DIODE CIRCUITS & APPLICATIONS

Q.1 Assume that the diode in the figures has (A) both D1 and D 2 are ON
Von  0.7 V , but is otherwise ideal. (B) D1 is ON and D 2 is OFF
(C) both D1 and D 2 are OFF
R1 (D) D1 is OFF and D 2 is OFF
2 k i2

+ 2V 6 k R2
 Q.4 The diode in the circuit shown has
Von  0.7 V but is ideal otherwise. If
The magnitude of the current i 2 (in mA) is Vi  5 sin(t) volts, the minimum and
equal to _____. maximum values of Vo (in Volts) are,
Q.2 Two silicon diodes, with a forward voltage respectively,
drop of 0.7 V, are used in the circuit shown R1
in the figure. The range of input voltage Vi Vi
1k
Vo
R2
for which the output voltage Vo  Vi' is 1k

R
+ +
D1 D2
+ 2V
Vi Vo 
1V + 2V +

(A) -5 and 2.7 (B) 2.7 and 5
 
(C) -5 and 3.85 (D) 1.3 and 5
(A) 0.3 V< Vi < 1.3 V
Q.5 In the following limiter circuit, an input
(B) 0.3 V< Vi < 2 V
voltage Vi = 10 sin100 t is applied.
(C) 1.0 V< Vi < 2.0 V Assume that the diode drop is 0.7 V when it
(D) 1.7 V< Vi < 2.7 V is forward biased. The Zener breakdown
Q.3 In the figure, assume that the forward voltage is 6.8 V.
1k
voltage drops of the PN diode D1 and
Schottky diode D 2 are 0.7 V and 0.3 V, D1
Vi Vo
respectively. If ON denotes conducting state D2

of the diode and OFF denotes non- Z 6.8V

conducting state of the diode, then in the
The maximum and minimum values of the
circuit,
output voltage respectively are
1 k 20

(A) 6.1 V, -0.7 V (B) 0.7 V, -7.5 V

10V D1 D2
(C) 7.5 V, -0.7 V (D) 7.5 V, -7.5 V
2 | Analog Electronics
Q.6 In the voltage regulator shown in the figure, resistance is 10Ω. If the input voltage  Vi 
the load current can vary from 100 mA to range is from 10 to 16 V, the output voltage
500 mA. Assuming that the Zener diode is
ideal (i.e., the Zener knee current is the
 V0  ranges from
break down region), the value of R is 200
 

 R Vi V0

12V Variable Load

 5V 100 to 500 mA
 
(A) 7.00 to 7.29 V (B) 7.14 to 7.29 V
(C) 7.14 to 7.43 V (D) 7.29 to 7.43 V
(A) 7Ω (B) 70Ω
Q.10 In the circuit shown, assume that diodes D1
70
(C)  (D) 14Ω and D 2 are ideal. In the steady-state
3
condition the average voltage Vab (in Volts)
Q.7 The circuit shown in the figure is best
described as a across the 0.5 µF capacitor is _____.
1 F

~ 
Output

D1
50 sin( t) ~ D2

(A) bridge rectifier 0.5 F

(B) ring modulator    a
b
(C) frequency discriminatory Vab
(D) voltage doubler Q.11 A zener diode regulator in the figure is to be
Q.8 In a full- wave rectifier using two ideal designed to meet the specifications:
diodes, Vdc and Vm are the dc and peak IL  10 mA , V0 = 10 V and Vin varies from
values of the voltage respectively across a 30 V to 50 V. The zener diode has
resistive load. If PIV is the peak inverse Vz  10 V and I zk (knee current) = 1 mA.
voltage of the diode, then the appropriate For satisfactory operation
relationships for this rectifier are
Vm R
(A) Vdc = , PIV = 2Vm +
 I L  10 mA
IZ
Vm
(B) Vdc = 2 , PIV = 2Vm Vin V0 RL
 DZ
Vm
(C) Vdc = 2 , PIV = Vm 


(D) Vdc =
Vm
, PIV = Vm (A) R  1800
 (B) 2000  R  2200
Q.9 For the Zener diode shown in the figure, the (C) 3700  R  4000
Zener voltage at knee is 7 V, the knee
(D) R > 4000
current is negligible and the Zener dynamic
 Diode Circuits & Application| 3
Q.12 The transistor shunt regulator shown in the D1

figure has a regulated output voltage of 10
V, when the input varies from 20 V to 30 V. 2 D2
The relevant parameters for the zener diode Vi RL   Vo

and the transistor are: 10 V 5V


VZ  9.5V, VBE  0.5V, = 99. Neglect
(a) Vo
the current through R B . Then the maximum
power dissipated in the zener diode  PZ  and
10

the transistor  PT  are

10 Vi
20
 
IZ IC (b) Vo
VZ
Vin = 20 - 30V V0 = 10V

RB VBE  5

 
5 Vi
(A) PZ  75 mW, PT  7.9W © Vo
(B) PZ  85 mW, PT  8.9W
10
(C) PZ  95 mW, PT  9.9W 5
(D) PZ  115 mW, PT  11.9W
Q.13 A Zener diode in the circuit shown in below 5 10 Vi
figure has a knee current of 5 mA, and a (d) Vo
maximum allowed power dissipation of 300
mW. What are the minimum and maximum 10
load currents that can be drawn safely from
the circuit, keeping the output voltage Vo
constant at 6 V? 10 Vi
50
 Q.15 Assume that D1 and D 2 in figure are ideal
 diodes. The value of current I is

9V  Load
 D1 2 k
1 mA
 (DC) I
(A) 0 mA, 180 mA (B) 5 mA, 110 mA D2 2 k

(C) 10 mA, 55 mA (D) 60 mA, 180

mA (A) 0 mA (B) 0.5 mA
(C) 1 mA (D) 2 mA
Q.14 Assuming the diodes D1 and D 2 of the
Q.16 The equivalent circuits of a diode, during
circuit shown in figure to be ideal ones, the
forward biased and reverse biased
transfer characteristics of the circuit will be
conditions, are shown in the figure.
4 | Analog Electronics
D 
0.7 V Rt
   


+ 5.7V
      t
0 2
Fig. (a)
- 5V
10 k
Q.17 A clipper circuit is shown below
1 k
~ Vo 10 k 
10 sin  t
5V Vi ~ Vz  10V D
Vo

Fig. (b) 5V

If such a diode is used in clipper circuit of
Assuming forward voltage drop of the diode
figure given above, the output voltage  V0  to be 0.7 V, the input-output transfer
of the circuit will be characteristics of the circuit is
A  (a) Vo

+ 5V
4.3
0  2 t
Vi
4.3
- 5V (b) Vo
B 
10

+ 10
4.3

0  2 t 4.3 10
Vi
- 5.7V
© Vo

C 
5.7

+ 5.7V 0.7 Vi
5.7
0  2 t  0.7

(d) Vo
- 10V
10

 5.7 Vi
10
 5.7
 Diode Circuits & Application| 5
Q.18 Assuming that the diodes in the given saturation current and VT is thermal voltage
circuit are ideal, the voltage Vo is (= 25 mV) is biased at iD  2 mA . Its
10 k dynamic resistance is
(A) 25Ω (B) 12.5Ω
10 k
(C) 50Ω (D) 100Ω
10V Vo 15V
Q.22 The forward resistance of the diode shown
10 k
in figure is 5Ω and the remaining
parameters are same as those of ideal diode.
The DC components of the source current is
(A) 4 V (B) 5 V
(C) 7.5 V (D) 12.12 V
Q.19 The i-v characteristics of the diode in the Vi  Vmsin t ~ 45
Vi
 = 314 rad sec
circuit given below we
0v < 0.7 V
 Vm Vm
i=  v - 0.7 (A) (B)
 A v  0.7 V 50 50 2
 500
1 k
Vm 2Vm
(C) (D)
100 2 50 2
i
  Q.23 A voltage signal 10sin t is applied to the
10 V V circuit with ideal diodes, as shown in figure.

 The maximum and minimum values of the
output waveform Vout of the circuit are
The current in the circuit is
respectively.
(A) 10 mA (B) 9.3 mA
10 k
(C) 6.67 mA (D) 6.2 mA 
D2 D1

Q.20 Assuming the diodes to be ideal in the Vin ~ 4V 4V Vout

figure, for the output to be clipped, the input 10 k


voltage Vi must be outside the range
(A) +10 V and -10 V (B) +4 V and -4 V
(C) +7 V and -4 V (D) +4 V and -7 V
10 k
 Q.24 The current through the Zener diode in
D1 D2
figure is
Vi ~  10 k Vo
 2.2 k

1V 2V
  IZ

R Z , VZ RL 3.5 V
10 V
(A) -1 V to -2 V (B) -2 V to -4 V
(C) +1 V to -2 V (D) +2 V to -4 V 

Q.21 A diode whose terminal characteristics are R z = 0.1K, Vz = 3.3V

V
(A) 3.3 mA (B) 4.3 mA
related as i D  I s e VT
, where I s is the reverse
(C) 2 mA (D) 0 mA
6 | Analog Electronics
Q.25 A voltage 1000sin t Volts is applied (b)
V0

across YZ. Assuming ideal diodes, the

5V
voltage measured across WX in Volts, is
t


V0
1 k ©
5V
Y
 W X 
Z o t
   -5V

 1 k  V0
(d)
5V

(A) sin t
t
(B) sin t + sin t  2 10V


(C) sin t  sin t  2
(D) 0 for all t
Q.(26) The output voltage  Vo  of the circuit Q.(28) For an input of Vs = 5 sin t , (assuming
shown in the given figure is. ideal diode), circuit shown in the figure will
behave as a
1K

6.3V 0.1F

Vi = 13V V0

6.3V
Vs ~ V0

2V
(A) Zero (B) 5.7 V 

(C) 6.9 V (D) 12.9 V

Q.(27) For the circuit given in fig, assuming ideal (A) clipper, sine wave clipped at – 2V
diode, the output waveform Vo is (B) clamper, sine wave clamped at – 2V
R (C) clamper, sine wave clamped at Zero volt

(D) clipper, sine wave clipped at 2V
Vs = 10 sin  t ~ V0 Q.(29) Consider to following circuit:
5V D1 10k
 + +
V0
(a)
Vi 10k D2 V0
10V
10V
t
 
For the circuit shown above, which one of
the following is a correct statement?
(A) D 2 does not conduct for any value of Vi
 Diode Circuits & Application| 7
(B) Vo = 10V for all values of Vi > 10V Vo

(b)
(C) Vo = 0V for all values of Vi < 0V 18V

(D) Vo = 10V for all values of Vi > 0V

Q.(30) The Output Vdc from the below circuit is 0V
t
D idea l - 2V
  

100 F Vo
230 V
12V Vdc (c)
50 Hz C 0V t
- 2V
  

12 - 22V
(A) 12 2 (B)

24 12 Vo
(C) (D) (d)
 2
2V t

Q.(31) Select the correct output  Vo  wave –shape

- 18V
for given input  Vi  in the clamping
network given below:
Vi

Q.(32) Consider the below circuit, for

10V
Vi = Vm sin t , The output voltage V0 for
t R L   will be
C D
10V 

0.1 F +
  Vi D RL C V0
C Ideal 
diode
Vi Vo 
 (A) Zero (B) Vm
2V 
  (C) 2 Vm (D) Vm
Vo
Q.(33) The correct waveform for output  V0  for
(a) below network is
22V

2V
0V
t
8 | Analog Electronics
Q.33 Vi diode as shown. The regulated voltages
V01 ,V02 and source current I s are
10V
Is 1.5k
6V
t Ze

-10V 40V V02

Si
 V01
3.3V Z0
Ideal 2.2 k

 V0  (A) 2.4 V, 5.1V and 21.7mA

(B) 3V, 6V and 22.7mA
6.6 k
(C) 3.3V, 9.3V and 20.5mA
Ideal 2.2 k (D) 4V, 10V and 20mA
 Q.(35) A half – wave rectifier has an input voltage
V0 of 240V rms. If the stem – down transfer
(a)
has a turns ratio of 8 : 1, what is the peak
4.3V load voltage? Ignore diode drop.
(A) 27.5 V (B) 86.5 V
t
(C) 30.0 V (D) 42.5 V

V0
(b )

- 4.3V
Vi
(c)
+ 5V

-5V

Vi
(d)
+ 5V

-5V

Q.(34) A 40V dc, supply is connected across the

network comprising of Zener and silicon
 Diode Circuits & Application| 9

Answer Key : Diode Circuits & Application

1 0.25 mA 2 D 3 D 4 C 5 C
6 D 7 D 8 B 9 C 10 100
11 A 12 C 13 C 14 A 15 A
16 A 17 C 18 B 19 D 20 B
21 B 22 A 23 D 24 C 25 D
26 C 27 D 28 B 29 C 30 C
31 D 32 C 33 A 34 C &D 35 D
 CHAPTER – 04 F – RESPONSE, OSCILLATORS, & 555 TIMER

Q.1 In the circuit shown in Fig. is a finite gain Q.4 Which one of the following statements is
amplifier with a gain of K, a very large correct about an ac-coupled common-
input impedance, and a very low output emitter amplifier operating in the mid-band
impedance. The input impedance of the region?
feedback amplifier with the feedback (A) The device parasitic capacitances
impedance Z connected as shown will be behave like open circuits, whereas
Z coupling and bypass capacitances
behave like short circuits.
(B) The device parasitic capacitances,
   
coupling capacitances and bypass
Vi V0
N capacitances behave like open circuits.
  
(C) The device parasitic capacitances,
coupling capacitances and bypass
capacitances behave like short circuits.
 1
(A) Z 1 -  (B) Z 1 - K  (D) The device parasitic capacitances
 K behave like short circuits, whereas
coupling and bypass capacitances
 Z   Z  behave like open circuits.
(C)  (D) 
 K - 1  1 - K  Q.5 A bipolar transistor is operationg in the
Q.2 An npn transistor (with C = 0.3 pF) has a active region with a collector current of 1
unity gain cutoff frequency f T of 400 MHz mA, Assuming that the  of the transistor is
at a dc bias current Ic = 1 mA . The value 100 and the thermal voltage  VT  is 25 mA,
of its C  (in pF) is approximately The transconductance  g m  and the input
 VT = 26 mV  resistance  r  of the transistor in the
(A) 15 (B) 30 common emitter configuration, are
(C) 50 (D) 96 (A) g m = 25 mA V and r = 15.625 k
Q.3 An npn BJT has (B) g m = 40 mA V and r = 4.0 k
14
gm = 38 mA V, C = 10 F , (C) g m = 25 mA V and r = 2.5 k
13
C  = 4  10 F , and DC current gain
(D) g m = 40 mA V and r = 2.5 k
0 = 90. For this transistor f T and f are
Q.6 In a multi-stage RC-Coupled Amplifier the
(A) coupling capacitor.
fT = 1.64 108Hz and f = 1.47 1010Hz (A) Limits the low frequency response
(B) (B) Limits the high frequency response
fT = 1.47 1010Hz and f = 1.64 108Hz (C) Does not effect the frequency response
(D) Blocks the d.c components without
(C) effecting the frequency response.
fT = 1.33 1012Hz and f = 1.47 1010Hz Q.7 The feedback amplifier shown in Fig. has:
(D)
fT = 1.47 1010Hz and f = 1.33 1012Hz
2 | Analog Electronics

VCC (B) increases frequency and phase

distortions
(C) reduces bandwidth
(D) increases noise
Q.11 In a negative feedback amplifier using
voltage-series (i.e. voltage- sampling, series
mixing) feedback.
(A) R i decreases and R 0 decreases
(B) R i decreases and R 0 increases
(C) R i increases and R 0 decreases
(D) R i increases and R 0 increases
(A) Current – series feedback with large
input impedance and large output ( R i and R 0 denote the input and output
impedance. resistances respectively)
(B) Voltage – series feedback with large Q.12 The input impedance  Zi  and the output
input impedance and low output impedance. impedance  Z0  of an ideal trans-
(C) Voltage – shunt feedback with low input
conductance (voltage controlled current
impedance and low output impedance
source) amplifier are
(D) Current – shunt feedback with low input
(A) Zi = 0, Z0 = 0
impedance and output impedance.
Q.8 To obtain very high input and output (B) Zi = 0, Z0 = 
impedances in a feedback Amplifier, the
mostly used is (C) Zi = , Z0 = 0
(A) Voltage – series (D) Zi = , Z0 = 
(B) Current – series Q.13 In a transcondutance amplifier, it is
(C) Voltage – shunt desirable to have
(D) Current – shunt (A) a large input resistance and a large
Q.9 In a shunt – shunt negative feedback output resistance
Amplifier, as compare to the basic (B) a large input resistance and a small
Amplifier. output resistance
(A) both input and output impedance (C) a small input resistance and a large
decreases output resistance
(B) input impedance decreases but output (D) a small input resistance and a small
impedance increases output resistance
(C) input impedance increases but output Q.14 In a voltage-voltage feedback as shown
impedance decreases below, which one of the following
(D) both input and output impedance statements is TRUE if the gain k is
increases increased?
Q.10 Negative feedback in an amplifier
(A) reduces gain
 F- Response , Oscillators, & 555 Timer| 3

VCC

RC Io
   
Vin V1 A0 Vout V0
   

Rs

RE
Vs ~
  (A) Voltage shunt feedback
Vt = kVout K
  (B) Current series feedback
(C) Current shunt feedback
(A) The input impedance increase and
(D) Voltage series feedback
output impedance decreases
Q.17 A good transimpedance amplifier has
(B) The input impedance increases and
(A) low input impedance and high output
output impedance also increases
impedance
(C) The input impedance deceases and
(B) high input impedance and high output
output impedance also decreases impedance
(D) The input impedance decreases and (C) high input impedance and low output
output impedance increases impedance
Q.15 In the ac equivalent circuit shown in the (D) low input impedance and low output
figure, if iin is the input current and R F is impedance
very large, the type of feedback is Q.18 value of R in the oscillator shown in the
given figure, So chosen that it just oscillates
at an angular frequencies of ‘  ’. The value
of ‘  ’ and the required value of R will
RD respectively be
RD 100 k
Vout

M2
5 k

M1
V0
RF 
R
small signal i in
input
0.01F 10 mH 1 k
(A) voltage-voltage feedback
(B) voltage-current feedback
(C) current-voltage feedback (A) 105 rad sec, 2 104 
(D) current-current feedback (B) 2 104 rad sec, 2 104 
Q.16 The feedback topology in the amplifier
circuit (the base bias circuit is not shown for (C) 2  104 rad sec, 105
simplicity) in the figure is
4 | Analog Electronics

(D) 105 rad sec, 105 (C) Hartley oscillator with

Q.19 The circuit in the figure employs positive foscillation = 159.2 MHz
feedback and is intended to generate (D) Colpitts oscillator with
sinusoidal oscillation. If at a frequency foscillation = 159.2 MHz
Vf  f  1 o
f0 , B  f  = = 0 Then sustain Q.21 The circuit shown in the figure has an ideal
V0  f  6 op-amp. The oscillation frequency and the
oscillation at this frequency condition to sustain the oscillations,
respectively, are
R2 R1

R1

R2
 

Vo

Network V0 f 

 f 
Vf f  C 2R
2C R
  

(A) R 2 = 5R1 (B) R 2 = 6R1 1

(A) and R 1 = R 2
CR
R1 R1
(C) R 2 = (D) R 2 = 1
6 5 (B) and R 1 = 4R 2
Q.20 The oscillator circuit shown in the figure is CR
1
 VCC
(C) and R 1 = R 2
2CR
LC
1
(D) and R1 = 4R 2
2CR
Q.22 Consider the oscillator circuit shown in the
CC R1
L = 10 H
figure. The function of the network (shown
  V0 in dotted lines) consisting of the 100 kΩ
resistor in series with the two diodes
 connected back-to-back is to:
C1 = 2pF C 2 = 2pF
 1k 2.1k
R2
Re Ce


Vout
(A) Hartley oscillator with  C
foscillation = 79.6 MHz
(B) Colpitts oscillator with 1k
foscillation = 50.3 MHz
1k C
 F- Response , Oscillators, & 555 Timer| 5

(A) introduce amplitude stabilization by +5V V0

prevention the op amp from saturating
and thus producing sinusoidal
-5V +5V
oscillations of fixed amplitude Vi
©
(B) introduce amplitude stabilization by
forcing the op-amp to swing between
-10V
positive and negative saturation and
thus producing square wave oscillations +10V V0

of fixed amplitude
(C) introduce frequency stabilization by -5V +5V
Vi
forcing the circuit to oscillate at a single (d)
frequency
(D) enable the loop gain to take on a value -5V
that produces square wave oscillations
Q.23 Given the ideal operational amplifier circuit Q.24 Consider the Schmitt trigger circuit shown
shown in the figure indicate the correct below.
transfer characteristics assuming ideal
15V
diodes with zero cut –in voltage.
10k
10V
Vi 
V0
Vi 

10V V0


2k 10k

10k
0.5k 15V
2k
A triangular wave which goes from -12V to
12V is applied to the inverting input of the
+10V V0 OP-Amp. Assume that the output of the OP-
Amp swings from + 15V to – 15V . The
voltage at the non-inverting input switches
-8V -5V
Vi between
(a)
(A) – 12V and + 12V
-10V (B) – 7.5V and + 7.5V
+10V V0 (C) – 5V and + 5V
(D) 0V and 5V
-5V +8V Q.25 In the astable multivibrator circuit shown in
Vi
(b) the figure, the frequency of oscillation (in
KHz) at the output pin 3 is______.
-10V
6 | Analog Electronics

VCC
8 4
R A = 2.2k VCC Rec
7 Disch

R B = 4.7k 555 Timer

6 Thresh 3
Out

2
Trig
C = 0.022  F Gnd
1

Q.26 In the following astable multivibrator

circuit, which properties to v0 (t) depend on
R2 ?
R1


v 0 t 

R3
C

R2 R4

(A) Only the frequency

(B) Only the amplitude
(C) Both the amplitude and the frequency
(D) Neither the amplitude nor the frequency
 F- Response , Oscillators, & 555 Timer| 7

Answer Key : Frequency response, Oscillators, & 555 Timer

1 D 2 A 3 B 4 A 5 D
6 A 7 C 8 B 9 A 10 A
11 C 12 D 13 A 14 A 15 B
16 B 17 D 18 A 19 A 20 B
21 D 22 A 23 B 24 C 25 5.68
26 A