MST776-I Mstar PDF

MST776-I
Car TV Processor with PIP/POP and External SDRAM

Preliminary Product Brief Version 0.1
FEATURES
n Video Decoder n Video Processing
Ÿ Supports NTSC, PAL and SECAM video input Ÿ 2-D video de-interlacer
formats Ÿ Edge-oriented adaptive algorithm for smooth
Ÿ 2D NTSC and PAL comb-filter for Y/C low-angle edges
separation of CVBS input Ÿ PIP/POP with programmable size and location,
Ÿ Multiple CVBS and S-video inputs supports multi-video applications
司
Ÿ Supports Closed-caption and V-chip Ÿ 3-D video noise reduction for SDTV and 2-D
公
Ÿ Built-in anti-aliasing filter for analog-front-end video noise reduction for HDTV input
Ÿ ACC, AGC, and DCGC (Digital Chroma Gain Ÿ Brightness, contrast, saturation, and hue
Control) adjustment
限
n Analog Input
有
Ÿ 9-tap programmable multi-purpose FIR (Finite
技
Ÿ Supports RGB input format from PC, Impulse Response) filter
科ｍ
camcorders and GPS Ÿ Differential 3-band peaking engine
ｏ
Ÿ Supports YCbCr inputs from conventional video Ÿ Vertical peaking
source and HDTV
鑫．ｃ
Ÿ Luminance Transient Improvement (LTI)
Ÿ Supports video input 480i, 480p, 576i, 576p,
泉ｎ
Ÿ Chrominance Transient Improvement (CTI)
ａ
聚ｕ
720p, 1080i; RGB input resolution in 640x480, Ÿ Black Level Extension (BLE)
市
800x480, 800x600(SVGA), and 1024x768(XGA)
ｕｑ
Ÿ White Level Extension (WLE)
．ｊ
Ÿ 3-channel low-power 10-bit ADCs integration Ÿ Favor Color Compensation (FCC)
圳
for YCbCr or CVBS or S-Video; ADC frequency
ｗ
Ÿ 3-channel gamma curve adjustment
up to 86MHz
深ｗ
Ÿ Independent 6 color of saturation, hue, and
ｗ
Ÿ 3-channel 8-bit ADC for navigator RGB input; brightness control
ADC frequency up to 86MHz n Digital PWM Controller
Ÿ Supports RGB composite sync input (CSYNC), Ÿ Integrated general purpose digital PWM
SOY, SOG, HSYNC, and VSYNC control loop
Ÿ On-chip clock synthesizer and PLL Ÿ Programmable startup operating frequency
Ÿ Auto-position adjustment, auto-phase and period with output voltage regulation
adjustment, auto-gain adjustment, and Ÿ Programmable output current regulation;
auto-mode detection 40KHz~70KHz switching frequency, sync. to
n Digital Video Input HSYNC possible
Ÿ Supports ITU-R BT.656 digital video input and Ÿ Burst-mode or continuous-mode for output
progressive ITU-R BT.656 compatible input current regulation; 150Hz~300Hz burst-mode
format frequency, sync. to VSYNC possible
Ÿ Supports ITU-R BT.601 8/16-bit digital video Ÿ Programmable protection level for input
input voltage and fault detection
Ÿ Supports digital 666/888 input n LVDS/TTL Panel Interface
n Digital/Analog Output Ÿ Supports up to 8-bit single link LVDS
Ÿ 3-channel low-power 8-bit DAC for RGB output, Ÿ Supports up to 8-bit TTL panel output with
dynamic range 0.1-4.9 V TCON
Ÿ Supports digital panels up to 800x480,800x600
(SVGA), 960x540(QHD) and 1366x768(WXGA)
Version 0.1 -1- 11/23/2007

Copyright © 2007 MStar Semiconductor, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/

MST776-I
Ÿ Programmable 24-bit (RGB888) digital output Ÿ Supports 10-bit gamma table

with HSYNC/VSYNC or 18-bit (RGB666) digital Ÿ Supports H/V sync out from CVBS for old NAVI
output with TCON system
Ÿ Supports various displaying modes Ÿ Built-in step-down PWM circuits for input 1.8V
Ÿ Supports horizontal panorama scaling and 3.3V
n 2D Graphics Engine Ÿ Built-in step-up boost circuits (for VGL and
Ÿ Line draw, rectangle draw/fill and color VGH)
expansion acceleration Ÿ DC/DC level adjustment circuit
Ÿ 16/256-color graphic OSD with two
司
Ÿ 16-bit data bus for external SDR DRAM frame
non-overlapping display windows buffer
公
限
Ÿ Graphic display path of 720x576 with Ÿ Supports up to 8MB external SDR DRAM
有
anti-flicker filter interface
Ÿ One video display path of 720x576 with H/V Ÿ Supports 1Mbx16 embedded SDR DRAM
scaling from 0.5 to 2
技
Ÿ Spread spectrum clocks
n Miscellaneous
科ｍ
Ÿ Optional 3.3V/5V TCON pads with
ｏ
鑫．ｃ
Ÿ Built-in MCU programmable driving current
泉ｎ
Ÿ I2C bus interface for configuration setup Ÿ 216-pin LQFP package
BLOCK DIAGRAM 聚ｕａ
市ｕｑ
圳．ｊ
深ｗｗ
Digital RGB PIP/
Gamma
BT.656/601 ADC POP
ｗ
Table
RGB Overlay
YPbPr TCON
Video Graphics To LCD
Y/C ADC Scaler
Decoder OSD VCOM Panel
CVBS
Touch Panel DC/DC

UART 2M bytes DPWM
Keypad GPIO MCU MIU
/ I2C SDRAM DPWM
Output
IR
8M bytes Feedback
SDRAM Voltage
Version 0.1 -2- 11/23/2007


MST776-I
SYSTEM APPLICATION DIAGRAM

Flash / ROM 1.8/3.3V
Micro- PWM
Controller Step-Down
Back-light
TV / Cable Signal TV Tuner
司
Invertor
Video
公
Additional CVBS Decoder
DVD / VCD S-Video Signal
限
有
RGB ADC WVGA TFT Panel
Navigator TCON
800x480
HDTV YPbPr Signal YPbPr ADC

技
科ｏｍ
鑫
Deinterlacer /
．ｃ
泉ｎ
BT.656 TTL/LVDS
Scaler
聚ｕａ
2MB SDRAM
市 2MB SDRAM
ｕｑ
圳ｗ．ｊ
深ｗ
GENERAL DESCRIPTION
ｗ
The MST776-I is a high quality ASIC for Car TV and portable DVD player applications. It receives analog
NTSC/PAL/SECAM CVBS and S-Video inputs from TV tuners, DVD or VCR sources, including weak and distorted
signals, as well as analog RGB input from GPS systems. Automatic gain control (AGC) and 10-bit 3-channel
A/D converters provide high resolution video quantization. With automatic video source and mode detection,
users can easily switch and adjust variety of signal sources. Multiple internal adaptive PLLs precisely extract
pixel clock from video source and perform sharp color demodulation. PIP/POP is provided for multimedia
applications. Built-in line-buffer supports adaptive 2-D comb-filter, 2-D sharpening, and synchronization
stabler in a condensed manner. The output format of MST776-I supports 8-bit TTL or LVDS digital TFT-LCD
modules.
Version 0.1 -3- 11/23/2007


MST776-I
PIN DIAGRAM (MST776-I)
VI_DATA[10]
VI_DATA[11]
VI_DATA[12]
VI_DATA[13]
VI_DATA[14]
VI_DATA[15]
VI_DATA[16]
VI_DATA[17]
VI_DATA[18]
VI_DATA[19]
VI_DATA[20]
VI_DATA[21]
VI_DATA[22]
VI_DATA[23]
VD_HSYNCO
VD_VSYNCO
AVDD_MPLL
VI_DATA[6]
VI_DATA[7]
VI_DATA[8]
VI_DATA[9]
MDATA[15]
MDATA[14]
MDATA[13]
MDATA[12]
MDATA[10]
MDATA[11]
HSYNCIN2
VSYNCIN2
MDATA[9]
MDATA[8]
MDATA[7]
MDATA[5]
MDATA[4]
MDATA[3]
MDATA[6]
MDATA[2]
MDATA[1]
MDATA[0]
VD_CLKO
VI_CLKIN
AVDD_MI
VDDP_33
VDDP_33
DQM[1]
DQM[0]
VDDC
VDDC
GND
GND
WEZ
GND
XIN
FB
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
XOUT 1 162 CASZ
GND 2 161 RASZ
VD[5] 3 Pin 1 160 CSZ
VD[4] 4 159 MCLK
VD[3] 5 158 MCLKE
VD[2] 6 157 BADR[0]
VD[1] 7 156 BADR[1]
VD[0] 8 155 MADR[3]
HSYNCIN1 9 154 MADR[2]
VSYNCIN1 10 153 GND
VCLAMP 11 152 VDDP_33
REFP 12 151 MADR[1]
REFM 13 150 MADR[0]
AVDD_33 14 149 MADR[10]
GND 15 148 MADR[11]
BINP 16 147 MADR[9]
SOGIN 17 146 MADR[8]
GINP 18 145 MADR[7]
RINP 19 144 MADR[6]
PBINP 20 143 MADR[5]
SOY 21 142 MADR[4]
YINP 22 141 DACR
YINM 23 140 DACG
PRINP 24 139 AVDD_DAC
PRINM 25 138 DACB
C1INP 26 137 GND
XXXXX
XXXXXXXX
MST776-I
C1INM 27 136 DAC_REFM

YS1INP 28 135 DAC_REFP
YS1INM 29 134 VCOM_DC
CVBS1P 30 133 VCOM_AC
CVBS2P 31 132 GND
AVDD_33 32 131 GND
GND 33 130 VDDC
AVDD_18 34 129 GND
PWM_REXT 35 128 AVDD_LPLL
AVDD_PWM 36 127 ROUT[7]
GND 37 126 ROUT[6]
PGOOD 38 125 ROUT[5]
PWM_FB1 39 124 ROUT[4]
SENSE1 40 123 ROUT[3]
VDDP50_PWM 41 122 ROUT[2]
PWMOUT1 42 121 ROUT[1]
GND 43 120 ROUT[0]
PWMOUT2 44 119 GOUT[7]
PWM_FB2 45 118 GOUT[6]
SENSE2 46 117 VDDP_33
VDDP50_PWM 47 116 GND
DRVBST 48 115 GOUT[5]
GND 49 114 GOUT[4]
CSBST 50 113 GOUT[3]
BOOSTON 51 112 GOUT[2]
FBBST 52 111 GOUT[1]
QOR 53 110 GOUT[0]
Q1 54 109 BOUT[7]
100
101
102
103
104
105
106
107
108
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
INT
HWRESET
SPI_SDO
VDDC
LHSYNC
SDA
LVSYNC
FB2_DPWM
FB1_DPWM
VIN
AVDD_DPWM
SAR_IN
UART1_RX
SPI_SCZ
UART1_TX
GND
GND
GND
CS
GND
DTCON[0]
BOUT[0]
BOUT[3]
BOUT[4]
BOUT[1]
BOUT[2]
BOUT[5]
BOUT[6]
VDDP50_TP
SPI_SCK
LCK
WAKEUP
SCL
Q2
SAR3
SAR2
SAR1
SAR0
TP_X1
TP_Y1
TP_X2
TP_Y2
VDDP_33
SPI_SDI
VDDP_33
VDDP_50
GPIO_P01
GPIO_P02
GPIO_P03
GPIO_P04
GPIO_P05
GPIO_P06
GPIO_P00
LDE
Note: This pin diagram is based on 8-bit TTL output.
Version 0.1 -4- 11/23/2007


MST776-I
PIN DESCRIPTION
MCU Interface
Pin Name Pin Type Function Pin
SAR3 Analog Input SAR Low Speed ADC Input 3 61
SAR0 Analog Input SAR Low Speed ADC Input 0
司 64
SAR_IN Analog Input SAR Low Speed ADC Input for Keypad
公 66
SPI_SCK Output SPI Flash Serial Clock
限 81
SPI_SDI Output SPI Flash Data Input
有 82
SPI_SDO Input w/ 5V-tolerant
技
SPI Flash Data Output 83
SPI_SCZ Output
科
SPI Flash Chip Select
ｏｍ
84
GPIO_P00-GPIO_P06 I/O w/ 5V-tolerant
鑫．ｃ
General Purpose Input/Output; 4mA driving 87-93
泉
strength
ａｎ
INT Input
聚 External Interrupt Input
ｕ 73
市ｕｑ
CS Input w/ 5V-tolerant 3-Wire Serial Bus Chip Select; active high 77
SCL
圳
Input w/ 5V-tolerant
．ｊ
3-Wire Serial Bus Clock Input 78
SDA
深
I/O w/ 5V-tolerant
ｗｗ
3-Wire Serial Bus Data; 4mA driving strength 79
HWRESET Schmitt Trigger Input
w/ 5V-tolerant ｗ Hardware Reset; active high 80
Analog Video Interface

VCLAMP CVBS/YC Mode Clamp Voltage Bypass 11
REFP Internal ADC Top De-coupling Pin 12
REFM Internal ADC Bottom De-coupling Pin 13
PRINP Analog Input Analog Pr Input of HDTV 24
PRINM Analog Input Reference Ground for Analog Pr Input of HDTV 25
PBINP Analog Input Analog Pb Input of HDTV 20
SOY Analog Input Sync-on-Y Slicer Input 21
YINP Analog Input Analog Y Input of HDTV 22
YINM Analog Input Reference Ground for Analog Y Input of HDTV 23
BINP Analog Input Analog B Input of VGA 16
SOGIN Analog Input Sync-on-Green Slicer Input 17
GINP Analog Input Analog G Input of VGA 18
Version 0.1 -5- 11/23/2007


MST776-I

RINP Analog Input Analog R Input of VGA 19
C1INP Analog Input Analog Chroma Input for TV S-Video1 / 26
Analog Composite Input of TV CVBS4
C1INM Analog Input Reference Ground for Analog Chroma Input of TV S-Video1 27
/ Analog Composite Input of TV CVBS4
YS1INP Analog Input Analog Luma Input of TV S-Video1 / 28
司
YS1INM Analog Input
公
Reference Ground for Analog Luma Input of TV S-Video1 / 29
限
CVBS1P Analog Input
有
Analog Composite Input for TV CVBS1 30
CVBS2P Analog Input
技
Analog Composite Input for TV CVBS2 31
HSYNCIN1/ Schmitt Trigger Input HSYNC /
科ｏｍ
9
CSYNC w/ 5V-tolerant
鑫
Composite Sync for GPS RGB Input 1
．ｃ
VSYNCIN1 Schmitt Trigger Input VSYNC
泉ａｎ 10
聚ｕ
w/ 5V-tolerant
HSYNCIN2
市ｑ
Schmitt Trigger Input HSYNC for YPbPr/Digital RGB Input 2 206
w/ 5V-tolerant
圳．ｊｕ
VSYNCIN2
深
w/ 5V-tolerant
ｗｗ
Schmitt Trigger Input VSYNC for YPbPr/Digital RGB Input 2 207
FB
ｗ
Schmitt Trigger Input Fast Blank for GPS RGB Input
w/ 5V-tolerant
208
VD_HSYNCO Output Video Decoder Horizontal Sync Output for GPS 210
Synchronization
VD_VSYNCO Output Video Decoder Vertical Sync Output for GPS 211
Synchronization
VD_CLKO Output Video Decoder Display Clock Output for GPS 209
Synchronization
REFP_DAC DAC Top Reference Voltage Decoupling Cap. 1uF to Ground 135
REFM_DAC DAC Bottom Reference Voltage Decoupling Cap. 1uF to 136
Ground
DACB Analog Output Analog Video B Channel Output 138
DACG Analog Output Analog Video G Channel Output 140
DACR Analog Output Analog Video R Channel Output 141
Version 0.1 -6- 11/23/2007


MST776-I
Digital Video Interface

VI_CLKIN Input w/ 5V-tolerant Digital Video Input Clock 205
VI_DATA[23:0] Input w/ 5V-tolerant Digital Video Input Data [23:0] 185-196,
199-204, 3-8
ROUT[7:0] Output w/ Pull-down Red Channel Output 127-120
司
Resistor
公
GOUT[7:0] Output w/ Pull-down Green Channel Output 119, 118,
Resistor 115-110
BOUT[7:0] Output w/ Pull-down Blue Channel Output; programmable 限 109-102
Resistor
有
DTCON[0] Output TCON Output
技 101
LCK Output w/ Pull-down
科
LCD Output Clock; 6mA driving strength
ｏｍ
97
Resistor
鑫．ｃ
LVSYNC Output
泉ａ
LCD VSYNC; 6mA driving strength
ｎ 96
LHSYNC Output
聚ｕ
LCD HSYNC; 6mA driving strength
ｑ
95
LDE Output
市ｊｕ
Display Enable Output 94
圳ｗ．
深
Digital PWM Interface
ｗ
Pin Name
QOR
Pin Type
Output
ｗ
Function
Combined DPWM Output 1 and 2
Pin
53
Q1 Output DPWM Output 1 54
Q2 Output DPWM Output 2 55
FB2_DPWM Analog Input Input for 2nd Feedback Loop 57
FB1_DPWM Analog Input Input for 1st Feedback Loop 58
VIN Analog Input System Input Voltage Detection 59
Switching Power and PWM Interface

PWM_REXT Analog Input External Resistor to GND, 100k ohm Resistor for Internal 35
Reference Current
PGOOD Output Power Good Detector 38
PWM_FB1 Analog Input Error Voltage Feedback Input Pin for PWM1; voltage = 39
1.0V
SENSE1 Analog Input Sense Circuit Connection for PWM1 40
PWMOUT1 Output Switching Pulse Output for 3.3V DC-DC Converter 42
Version 0.1 -7- 11/23/2007


MST776-I

PWMOUT2 Output Switching Pulse Output for 1.8V DC-DC Converter 44
PWM_FB2 Analog Input Error Voltage Feedback Input Pin for PWM2; voltage = 45
1.0V
SENSE2 Analog Input Sense Circuit Connection for PWM2 46
DRVBST Analog Output Boost Converter Driving Output 48
司
CSBST Analog Input Boost Converter Current Sense 50
公
BOOSTON Analog Output Boost Converter On/Off Switch Control 51
限
FBBST Analog Input Boost Converter Output Voltage Feedback 52
DRAM Interface 有
技
科ｍ
BADR[1:0] Output
鑫
DRAM Memory Bank Address
．ｃｏ 156, 157
泉ｎ
CASZ Output Column Address Strobe; active low 162
DQM[1:0] Output
聚ｕａ
Data Mask for Low Byte; active high 175, 174
DQS[3:0] I/O
市
Data Strobe
ｕｑ
MADR[11:0] Output
圳
DRAM Memory Address
ｗ．ｊ 148, 149, 147-142,
深
155, 154, 151, 150
MCLK
MCLKE
Output
Output ｗｗ
DRAM Memory Positive Differential Clock
DRAM Memory Clock Enable
159
158
MDATA[15:0] I/O DRAM Memory Data Bus 184-180, 178-176,

173-166
CSZ Output Chip Select; active low 160
RASZ Output Row Address Strobe; active low 161
WEZ Output Write Enable; active low 163
Touch Panel Interface

TP_X1 Analog I/O Touch Panel X-axis Input/Output 1 67
TP_Y1 Analog I/O Touch Panel Y-axis Input/Output 1 68
TP_X2 Analog I/O Touch Panel X-axis Input/Output 2 69
TP_Y2 Analog I/O Touch Panel Y-axis Input/Output 2 70
Version 0.1 -8- 11/23/2007


MST776-I
UART Interface
UART1_RX Input w/5V-tolerant Universal Asynchronous Receiver 1 85
UART1_TX I/O w/5V-tolerant Universal Asynchronous Transmitter 1 86
VCOM Interface
Pin Name Pin Type Function
司 Pin
VCOM_AC Analog Output
公
Reference AC Voltage Output for Common Amplifier 133
VCOM_DC Analog Output
限
Reference DC Voltage Output for Common Amplifier 134
有
Misc. Interface
技
Pin Name Pin Type Function
科ｏｍ
Pin
XIN Analog Input
鑫
Crystal Oscillator Input
．ｃ 216
泉ｎ
ｕａ
XOUT Analog Output Crystal Oscillator Output 1
WAKEUP Input 聚 Device Wake Up
ｑ
72
市ｕ
Power Pins 圳ｗ．ｊ
Pin Name 深
Pin Type
ｗFunction Pin
AVDD_33
AVDD_18
3.3V Power
1.8V Power
ｗ Analog Power
Analog Power
14, 32
34
AVDD_PWM 5V Power Analog PWM Power 36
AVDD_DPWM 3.3V Power DPWM Power 60
AVDD_LPLL 3.3V Power LPLL Power 128
AVDD_DAC 5V Power DAC Power 139
AVDD_MI 3.3V Power Memory Power 164
AVDD_MPLL 3.3V Power MPLL Power 215
VDDC 1.8V Power Digital Core Power 74, 130, 198, 212
VDDP50_PWM 5V Power PWM Power 41, 47
VDDP50_TP 5V Power Touch Panel Power 71
VDDP_50 3.3V/5V Power Digital Input/Output Power for TCON 100
VDDP_33 3.3V Power Digital Input/Output Power 76, 99, 117, 152, 179,
214
GND Ground Ground 2, 15, 33, 37, 43, 49, 56,
65, 75, 98, 116, 129,
131, 132, 137, 153, 165,
197, 213
Version 0.1 -9- 11/23/2007


MST776-I
ELECTRICAL SPECIFICATIONS
Analog Interface Characteristics
Parameter MST776-I Unit
Min Typ Max
Resolution 10 Bits
ANALOG INPUT
Input Voltage Range

司
Minimum 0.5
公 V p-p
Maximum 1.5
限 V p-p
Input Bias Current

有 1 μA
SWITCHING PERFORMANCE
技
Maximum Conversion Rate
科 86
ｏｍ MSPS
Minimum Conversion Rate

鑫 12
．ｃ
MSPS
Maximum PLL Clock Rate

泉ａｎ
86 MHz
聚ｕ
Minimum PLL Clock Rate 10 MHz
市ｕｑ
PLL Jitter TBD ps p-p
Sampling Phase Tempco
圳ｗ．ｊ 15 ps/°C
深
DIGITAL INPUTS
Input Voltage, High (VIH)
Input Voltage, Low (VIL) ｗｗ 0.7 VDDP
0.8
V
Input Current, High (IIH) -1.0 μA
Input Current, Low (IIL) 1.0 μA
Input Capacitance 5 pF
DIGITAL OUTPUTS
Output Voltage, High (VOH) VDD - 0.1 V
Output Voltage, Low (VOL) 0.1 V

Notes
1. With Timing Interval Analyzer (TIA) measurement
Specifications are subjected to change without notice.
Version 0.1 - 10 - 11/23/2007


MST776-I
Absolute Maximum Ratings

Parameter Symbol Min Typ Max Units
5.0V Supply Voltages VVDD_50 -0.3 5.5 V
Input Voltage (5V tolerant inputs) VIN5Vtol -0.3 5.0 V
Input Voltage (non 5V tolerant inputs) VIN -0.3
司 VVDD_33 V
Ambient Operating Temperature TA -40
公 85 °C
Storage Temperature TSTG -40
限 150 °C
Junction Temperature TJ
有 150 °C
Thermal Resistance (Junction to Air) Natural θJA
技 TBD °C/W
Conversion
科ｏｍ
Thermal Resistance (Junction to Case)
鑫
θJC
．ｃ
TBD °C/W
泉ｎ
Natural Conversion
ａ
Note: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a
聚ｕ
stress rating only and does not imply functional operation of the device. Exposure to absolute maximum ratings for
ｑ
市
extended periods may affect device reliability.
ORDERING GUIDE
圳．ｊｕ
MARKING INFORMATION
ｗｗ
MST776-I
深
Model Temperature Package Package
Part Number
Range Description Option
MST776-I
MST776-I-LF
-40°C to +85°C
-40°C to +85°C
LQFP
LQFP
ｗ216
216
Lot Number
Operation Code A
Note: Product suffix “-LF” represents lead-free version. Operation Code B

Date Code (YYWW)
DISCLAIMER
MSTAR SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE
TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. NO
RESPONSIBILITY IS ASSUMED BY MSTAR SEMICONDUCTOR ARISING OUT OF THE APPLICATION
OR USER OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY
LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
Electrostatic charges accumulate on both test equipment and human body and can discharge
without detection. MST776-I comes with ESD protection circuitry; however, the device may be
permanently damaged when subjected to high energy discharges. The device should be handled
with proper ESD precautions to prevent malfunction and performance degradation.
REVISION HISTORY
Document Description Date
MST776-I_pb_v01 Ÿ Initial release Nov 2007
Version 0.1 - 11 - 11/23/2007


MST776-I
MECHANICAL DIMENSIONS
D1 A
A2
A1
司
公
限
有
技
科ｍ
E1
E
鑫．ｃｏ
泉ａｎ
聚ｑｕ
市ｕ
圳ｗ．ｊ
深ｗ
L1
ｗ c
Gauge Plane
θ
0.25mm
Seating Plane
b e
L
Symbol Millimeter Inch Symbol Millimeter Inch

Min. Nom. Max. Min. Nom. Max. Min. Nom. Max. Min. Nom. Max.
A - - 1.60 - - 0.063 θ 0° 3.5° 7° 0° 3.5° 7°
A1 0.05 - 0.15 0.002 - 0.006 L 0.45 0.60 0.75 0.018 0.024 0.030
A2 1.35 1.40 1.45 0.053 0.055 0.057 L1 1.00 REF. 0.039 REF.
D 26.00 1.024 b - 0.18 - - 0.007 -
D1 24.00 0.945 c - 0.08 - - 0.003 -
E 26.00 1.024 e 0.40 BSC 0.016 BSC
E1 24.00 0.945
Version 0.1 - 12 - 11/23/2007


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MST776-I

Car TV Processor with PIP/POP and External SDRAM

Version 0.1 -1- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Ÿ Programmable 24-bit (RGB888) digital output Ÿ Supports 10-bit gamma table

Touch Panel DC/DC

Version 0.1 -2- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

SYSTEM APPLICATION DIAGRAM

HDTV YPbPr Signal YPbPr ADC

Version 0.1 -3- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

PIN DIAGRAM (MST776-I)

C1INM 27 136 DAC_REFM

Note: This pin diagram is based on 8-bit TTL output.

Version 0.1 -4- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Analog Video Interface

Version 0.1 -5- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Pin Name Pin Type Function Pin

Version 0.1 -6- 11/23/2007

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Digital Video Interface

Switching Power and PWM Interface

Version 0.1 -7- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Pin Name Pin Type Function Pin

ｗ ．ｊ 148, 149, 147-142,

MDATA[15:0] I/O DRAM Memory Data Bus 184-180, 178-176,

Touch Panel Interface

Version 0.1 -8- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Version 0.1 -9- 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Input Voltage Range

Input Bias Current

Minimum Conversion Rate

Maximum PLL Clock Rate

Sampling Phase Tempco

Input Voltage, High (VIH)

Input Voltage, Low (VIL) ｗ ｗ 0.7 VDDP

Input Current, High (IIH) -1.0 μA

Input Current, Low (IIL) 1.0 μA

Output Voltage, High (VOH) VDD - 0.1 V

Output Voltage, Low (VOL) 0.1 V

Version 0.1 - 10 - 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Absolute Maximum Ratings

Note: Product suffix “-LF” represents lead-free version. Operation Code B

Version 0.1 - 11 - 11/23/2007

Free Datasheet http://www.datasheet4u.com/

Symbol Millimeter Inch Symbol Millimeter Inch

Version 0.1 - 12 - 11/23/2007

Free Datasheet http://www.datasheet4u.com/

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ｗ．ｊ 148, 149, 147-142,

Input Voltage, Low (VIL) ｗｗ 0.7 VDDP