BE (ECE) Third Year 2019 20 PDF

SDMCET: Syllabus
Academic Program: UG
Academic Year 2019-20
Syllabus
V & VI Semester B.E.
Electronics & Communication Engineering
SHRI DHARMASTHALA MANJUNATHESHWARA COLLEGE OF

ENGINEERING & TECHNOLOGY,
DHARWAD – 580 002
(An Autonomous Institution recognized by AICTE & Affiliated to VTU, Belagavi)
Ph: 0836-2447465 Fax: 0836-2464638 Web: www.sdmcet.ac.in
V & VI Sem B.E (EC): 2019– 20 1

SDMCET: Syllabus
SDM College of Engineering & Technology, Dharwad
It is certified that the scheme and syllabus for V & VI semester of UG

program in Electronics and Communication Engineering is recommended by
Board of Studies of Electronics and Communication Engineering Department
and approved by the Academic Council, SDM College of Engineering &
Technology, Dharwad. This scheme and syllabus will be in force from the
academic year 2019-20 till further revision.
Principal Chairman BOS & HOD
V & VI Sem B.E (EC): 2019– 20 2

SDMCET: Syllabus
SDM College of Engineering & Technology, Dharwad-02

Department of Electronics & Communication Engineering
College – Vision and Mission
VISION:
To develop competent professionals with human values

MISSION:
1. To have contextually relevant Curricula.

2. To promote effective Teaching Learning Practices supported by Modern
Educational Tools and Techniques.
3. To enhance Research Culture.
4. To involve Industrial Expertise for connecting classroom content to real life
situations.
5. To inculcate Ethics and impart soft-skills leading to overall Personality
Development.
SDMCET- Quality Policy

• In its quest to be a role model institution, committed to meet or exceed the
utmost interest of all the stake holders.
SDMCET- Core Values

• Competency
• Commitment
• Equity
• Team work and
• Trust
V & VI Sem B.E (EC): 2019– 20 3

SDMCET: Syllabus
Department - Vision and Mission

VISION:
Fostering excellence in the field of Electronics & Communication Engineering,

showcasing innovation, research and performance with continuous Industry –
Institute Interaction with the blend of Human values.
MISSION:
M1: To provide quality education in the domain of Electronics &
Communication Engineering through state of the art curriculum, effective
teaching learning process and the best of laboratory facilities.
M2: To encourage innovation, research culture and team work among students.
M3: Interact and work closely with industries and research organizations to
accomplish knowledge at par.
M4: To train the students for attaining leadership with ethical values in
developing and applying technology for the betterment of society and
sustaining the global environment.
Programme Educational Objectives (PEOs):
PEOs are broad statements that describe career and professional

accomplishments that the program is preparing the graduates to accomplish after
few years of graduation. The PEOs are defined based on core competence,
breadth of engineering knowledge, professionalism, learning environment.
The graduates, after few years of graduation will be able to:
I. Apply the latest in-depth knowledge in the field of Electronics and
Communication Engineering with Mathematical applications to address real life
challenges.
II. Exhibit the confidence for independent working and / or spirit to work
cohesively with group.
III. Readily be accepted by the Industry globally.
IV. Develop design skills, fault diagnosis skills, communication skills and
create research orientation.
V & VI Sem B.E (EC): 2019– 20 4

SDMCET: Syllabus
V. Inculcate professional, social ethics and to possess awareness regarding
societal responsibility, moral and safety related issues.
Programme Outcomes (POs):

1. Engineering knowledge: Apply the knowledge of mathematics, science,
engineering fundamentals, and an engineering specialization to the solution
of complex engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze

complex engineering problems reaching substantiated conclusions using first
principles of mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering

problems and design system components or processes that meet the
specified needs with appropriate consideration for the public health and
safety, and the cultural, societal, and environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge

and research methods including design of experiments, analysis and
interpretation of data, and synthesis of the information to provide valid
conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques,

resources, and modern engineering and IT tools including prediction and
modeling to complex engineering activities with an understanding of the
limitations.
6. The engineer and society: Apply reasoning informed by the contextual

knowledge to assess societal, health, safety, legal and cultural issues and
the consequent responsibilities relevant to the professional engineering
practice.
7. Environment and sustainability: Understand the impact of the professional

engineering solutions in societal and environmental contexts, and
demonstrate the knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and

responsibilities and norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a

member or leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities

with the engineering community and with society at large, such as, being
able to comprehend and write effective reports and design documentation,
make effective presentations, and give and receive clear instructions.
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SDMCET: Syllabus
11. Project management and finance: Demonstrate knowledge and

understanding of the engineering and management principles and apply
these to one’s own work, as a member and leader in a team, to manage
projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest context
of technological change.
PROGRAM SPECIFIC OUTCOMES (PSOs)
13. Design economically and technically sound analog and / or digital systems
based on the principles of signal processing, VLSI and communication
Engineering (PO-13)
14. Integrate hardware – software, and apply programming practices to realize the
solutions in electronics domain. (PO-14)
V & VI Sem B.E (EC): 2019– 20 6

SDMCET: Syllabus
Scheme for V Semester B. E. (E&CE)

Teaching Examination
CIE Theory (SEE) Practical (SEE)
Course Code Course Title L-T-P Credits Max. *Max. Duration Max. Duration
(Hrs/Week)
Marks Marks in hours Marks In hours
15UECC500 Information 4-0-0 4 50 100 03 - -

Theory & Coding
15UECC501 Digital Signal 4-0-0 4 50 100 03 - -
Processing
15UECC502 Digital 4-0-0 4 50 100 03 - -
Communication
15UECC503 CMOS VLSI 4-0-0 4 50 100 03 - -
Design
15UECL504 Microcontroller & 0-0-2 1 50 - - 50 03
VLSI Laboratory
15UECL505 DSP Laboratory 0-0-2 1 50 - - 50 03
15UECE51X Elective –I 4-0-0 3 50 100 03 - -
15UECE52X Elective -II 4-0-0 3 50 100 03 - -
Total 24-0-4 24 400 600 100

Elective –I
Object Oriented
15UECE510 Programming 4-0-0 3 50 100 03 - -
using C++
Advanced Digital
15UECE511 4-0-0 3 50 100 03 - -
System Design
Digital Switching
15UECE512 4-0-0 3 50 100 03 - -
Systems
DSP
15UECE513 4-0-0 3 50 100 03 - -
Architecture
Scientific
15UECE514 Computing using 4-0-0 3 50 100 03 - -
Python
Elective –II
15UECE520 System Verilog 4-0-0 3 50 100 03 - -
Operating
15UECE521 4-0-0 3 50 100 03 - -
System
Digital Image
15UECE522 4-0-0 3 50 100 03 - -
processing
15UECE524 IC Fabrication 4-0-0 3 50 100 03 - -
V & VI Sem B.E (EC): 2019– 20 7

SDMCET: Syllabus
Technology
Scheme for VI-Semester B. E. (E&CE)

Teaching Examination
Course CIE Theory (SEE) Practical (SEE)
Course Title L-T-P
Code (Hrs/Week)
Credits Max. *Max. Duration Max. Duration
Marks Marks in hours Marks In hours
Management,
Entrepreneurship
15UECC600 4-0-0 4 50 100 03 - -
and Intellectual
Property Rights
15UECC601 ARM Processor 4-0-0 4 50 100 03 - -
Analog & Mixed
15UECC602 4-0-0 4 50 100 03 - -
Mode VLSI Design
Microwave & Radar
15UECC603 4-0-0 4 50 100 03 - -
Engineering
ARM Processor
15UECL604 0-0-2 1 50 - - 50 03
Laboratory
15UECL605 Mini project 0-0-8 4 50 - - 50 03
15UECE63X Elective –III 4-0-0 3 50 100 03 - -
15UECE64X Elective –IV 4-0-0 3 50 100 03 - -
Total 24-0-10 27 400 600 100
Elective –III
15UECE630 Speech Processing 4-0-0 3 50 100 03 - -
15UECE632 Cryptography & 4-0-0 3 100 03 -

50 -
Network Security
15UECE634 Fuzzy Logic 4-0-0 3 50 100 03 - -
Elective –IV
15UECE641 Data structure using 4-0-0 3 100 03 -

50 -
C++
15UECE644 Digital Signal 4-0-0 3 100 03 -
50 -
Compression
15UECE645 Artificial Neural 4-0-0 3 100 03 -
50 -
Networks
CIE: Continuous Internal Evaluation SEE: Semester End Examination
L: Lecture T: Tutorials P: Practical S: Self-study
*SEE for theory courses is conducted for 100 marks and reduced to 50 marks.
V & VI Sem B.E (EC): 2019– 20 8

SDMCET: Syllabus
V-Semester
15UECC500 Information Theory and Coding (4-0-0) 4
Contact Hours: 52
Course Learning Objectives (CLOs):
Students will learn the basic concepts of information theory and coding, including
information theory, source coding, channel model, channel capacity, channel coding. The
main purpose of this course is to introduce students to the wireless communication
system.
Course outcomes (COs):

Description of the Course Outcome: Upon Mapping to POs (1,12) / PSOs (13,14)
completion of the course, the student will be Level 3 Level 2 Level 1
able to Substantial Moderate Slight
CO-1 Explain the basic concepts of
information theory. 1,2
CO-2 Design and evaluate the Markov
Model, Communication Channel to 3 13
improve the efficiency.
CO-3 Construct the codes using different
source coding algorithms. 3 1,2
CO-4 Design and Analyze linear Block
codes for error detection and 3 13
correction capabilities.
CO-5 Design and Analyze Binary Cyclic
codes for error detection and 3 1,2
correction capabilities.
CO-6 Construct and decode the
convolutional codes using different 5
techniques.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
Levels 1.66 1.66 3 - 1 - - - - - - - 1.5 -
Pre-requisites:
Digital circuit design, Probability theory and algebra and Digital communication
Course Contents:
1. Entropy: Introduction, Measure of information, Entropy of a zero 06 Hrs
memory source, Logarithmic inequalities, Properties of Entropy,
External property, Information rate, Extension of a zero memory
source.
V & VI Sem B.E (EC): 2019– 20 9
SDMCET: Syllabus
2. Markov sources: Average information content of symbols in long 10 Hrs

dependent (With memory) sequences. Markov statistical model for
information sources, Entropy and information rate of Markov
sources, Communication Channels, Discrete communication
channels: Rate of information transmission over a discrete channel,
Capacity of a discrete memory less channels, continuous channels:
Shannon-Hartley law and its implications. Mutual information.
3. Source encoding: Definition of codes, Basic properties of codes, 10 Hrs
Construction of instantaneous codes: Kraft inequality, McMillan’s
Inequality, code efficiency and redundancy, Shannon’s noiseless
coding theorem, construction of some basic codes: Shannon binary
coding, Shannon-Fano coding, Huffman coding.
4. Error Control Coding: Types of errors, types of codes, Linear 07 Hrs
Block Codes: Matrix description of linear block codes. Error
detecting and correcting capabilities of linear block codes, Lookup
table decoding using standard array, Single error correcting
hamming codes.
5. Binary Cyclic Codes: Algebraic structures of cyclic codes, 07 Hrs
Encoding using an (n-k) bit shift register, Syndrome calculation,
Error detection and error correction, BCH codes, RS codes, Golay
codes, Shortened cyclic codes, Burst error correcting codes, Cyclic
Redundancy Check (CRC) Codes.
6. Convolution Codes: Encoding of convolution codes: Time domain 12 Hrs
approach and transform domain approach, systematic convolution
codes, state diagrams, tree and trellis diagrams. Decoding of
convolution codes: Viterbi algorithm, sequential decoding: Stack
algorithm.
Activity beyond Syllabus:

Simulation of different source coding and channel coding algorithms by using MATLAB,
Verilog and C programs.
Reference Books:
1. K. Sam Shanmugam, “Digital and analog communication systems”, John
Wiley, 2005.
2. Simon Haykin, “Digital communication”, John Wiley, 2003.
3. Ranjan Bose, “Information Theory, Coding and Cryptography”, Tata
McGraw-Hill Publication, 2002.
4. Satyanarayana P.S. “Concepts of Information Theory & coding”, Dynaram
Publications, 2005
5. Andrew S Tanenbaum, “Computer Networks”, PHI, 3/e, 2001.
V & VI Sem B.E (EC): 2019– 20 10
SDMCET: Syllabus
15UECC501 Digital Signal Processing (4-0-0) 4

Contact Hours: 52
The course focuses on Discrete Fourier Transforms, properties and their
applications. It also deals with the design of analog and digital filters using various
methods and their realization.
Course Outcomes (COs):

Description of the course outcome: Mapping to POs (1,12) / PSOs
Upon completion of the course, the student (13,14)
will be able to Level 3 Level 2 Level 1
Substantial Moderate Slight
CO-1 Compute Discrete Fourier
Transform(DFT) and Inverse DFT
1, 2
and study of their properties
CO-2 Apply the properties of DFT to 13
1, 2
solve signal processing problems
CO-3 Optimize the computation of DFT 2, 3, 12 13
CO-4 Design analog filters to satisfy the
2, 3 12
given specifications
CO-5 Design digital filters to satisfy the
2, 3 12
given specifications
CO-6 Realize hardware structure for
3 12
digital filters
Pos/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3 3 3 - - - - - - - - 2.3 1.5 -
levels
Pre-requisites:
Signals and Systems, Engineering Mathematics
Course Contents:
1. Discrete Fourier Transforms (DFT): Introduction to Digital Signal 08 Hrs

Processing, Frequency domain sampling and reconstruction of
discrete time signals, The Discrete Fourier Transform, Properties
of DFT, Linear Filtering Methods based on the DFT, Frequency
analysis of signals using DFT.
2. Efficient Computation of the DFT: Radix-2 FFT algorithms for 08 Hrs
V & VI Sem B.E (EC): 2019– 20 11
SDMCET: Syllabus
the computation of DFT and IDFT: Decimation-In-Time (DIT) and
Decimation-In-Frequency (DIF) algorithms, Comparison of direct
computation and FFT computation of DFT, Applications of FFT
algorithms.
3. Pole-Zero Placement Method for Design of Simple Filters: 06 Hrs
Ideal filter characteristics, Simple IIR & FIR digital filters, Notch
filters, Comb filters, All pass filters, Digital Resonators, Digital
Sinusoidal Oscillators.
4. Design of Analog IIR Filters: Butterworth and Chebyshev type - I, 08 Hrs
Design of analog filters, frequency transformations in analog
domain.
5. Design of Digital IIR Filters: IIR filter design by Approximation of 08 Hrs
Derivatives, Impulse Invariance and Bilinear Transformation,
frequency transformations in digital domain (LPF, HPF only)
6. Design of Digital FIR filters: Symmetric and Antisymmetric FIR 07 Hrs
filters, Design of Linear phase FIR filters using windows method
and frequency sampling method, Design of FIR Differentiators,
Design of Hilbert Transformers.
7. Implementation of Discrete-Time Systems: Structures for IIR 07 Hrs
systems: Direct-Form, Cascade-Form, Parallel-Form, Structures
for FIR systems: Direct-Form, Cascade-Form, Linear phase
realization.

Simulation of signal processing tasks using MATLAB.
Reference Books:
1. Proakis & Monalakis, “Digital Signal Processing: Principles, Algorithms &
Applications”, 4/e, Pearson Education, New Delhi, 2007.
2. Sanjit K. Mitra, “Digital Signal Processing”, 2/e Tata Mc-Graw Hill, 2004.
3. Li Tan, “Digital Signal Processing Fundamentals and Applications”, Elsevier,
2003.
4. Emmanuel C. Ifeachor, Barrie W. Jervis, “Digital Signal Processing: A Practical
Approach”, 2/e, 1999, Pearson Education.
15UECC502 Digital Communication (4-0-0) 4

Contact Hours: 52
Course Learning Objectives(CLOs):
The course focuses on mathematical representation of signals, communication system,
communication channel and channel noise. It deals with the conversion of analog to
digital signal through the process of sampling, quantizing and various types of encoding.
V & VI Sem B.E (EC): 2019– 20 12
SDMCET: Syllabus
Various modulation and demodulation techniques are dealt along with error performance
in the presence of channel noise and comparative study between tehm. The course also
deals with modulation techniques used for the secured data transmission.
Course Outcomes(COs):
Description of the Outcome - Upon completion of Mapping to POs (1-12) / PSOs
the course, the student will be able to: (13,14)
Level 3 Level 2 Level 1
CO-1 Apply theoretical bounds on sampling
1,2
rates
CO-2 Choose suitable coding technique for data
2 3
transmission
CO-3 Describe the generation and detection of
3 13
various digital modulation schemes
CO-4 Analyze the effect of channel on baseband
1,2 4
and bandpass signal transmission
CO-5 Compare various digital modulation
12
schemes
CO-6 Study and analyze the spread spectrum
1,2,3
techniques for secured data transmission
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.3 2.5 2.3 1 - - - - - - - 2 2 -
levels
Pre Requisites:
Analog Communication, Digital Signal Processing
Course Contents:
1. Sampling Process: Low pass sampling theorem, Quadrature sampling 10 Hrs.
of band pass signals, signal distortion in sampling, practical aspects of
sampling and signal recovery, Natural sampling, Flat top sampling,
Sample and hold circuit for signal recovery, Pulse Amplitude
Modulation, Time Domain Multiplexing.
2. Waveform Coding Techniques:, Quantization, quantization noise and 08 Hrs.
signal to noise ratio, robust quantization, Pulse Code Modulation
Differential Pulse Code Modulation, Delta Modulation, Adaptive Delta
Modulation, coding speech at low bit rates, applications.
3. Baseband Shaping for Data Transmission: Discrete PAM signals, 08 Hrs.
power spectra of discrete PAM signals. Inter-symbol Interference,
Nyquist criterion for distortionless base-band binary transmission,
V & VI Sem B.E (EC): 2019– 20 13
SDMCET: Syllabus
correlative coding, eye pattern, baseband M-ary PAM systems, adaptive
equalization for data transmission.
4. Detection and Estimation: Model of a digital communication system, 05 Hrs.
Gram-Schmidt Orthogonalization Procedure, Geometric interpretation of
signals, Detection of known signals in noise, Probability of error,
Correlation receiver, Matched filter receiver.
5. Digital Modulation Techniques: Digital Modulation formats, Coherent 14 Hrs.
binary modulation techniques, Coherent quadrature modulation
techniques, Non-coherent binary modulation techniques, Comparison of
Binary and Quaternary Modulation techniques, M-ary Modulation
Techniques, Power Spectra, Bandwidth efficiency.
6. Spread Spectrum Modulation: Pseudo noise sequences, A notion of 07 Hrs.
spread spectrum, direct sequence spread coherent binary PSK, signal
space dimensionality and processing gain, probability of error,
frequency hop spread spectrum, applications.

Simulation of communication concepts using MATLAB
Reference Books:
1. Simon Haykin, “Digital Communications”, John Wiley & Sons, 2014.
2. B. P. Lathi, Zhi Ding, “Modern Analog and Digital communication Systems”, Oxford
University Press, Fourth edition, 2010.
3. Taub Schilling, “Principles of Communication System”, McGraw Hill, Fourth edition.
15UECC503 CMOS VLSI Design (4-0-0) 4

Contact Hours: 52
The course focuses on the theory, fabrication and design principles of CMOS devices and
circuits. The course concentrates on the study and analysis of various combinational and
sequential MOS logic circuits for digital VLSI applications.
Course Outcome (COs):

Description of the course outcome: Mapping to POs (1-12) / PSOs
Upon completion of the course, the student will (13,14)
be able to Level 3 Level 2 Level 1
CO-1 Explain the theory, construction and the
characteristics of MOS structures and - - 1,2,13
logic circuits.
V & VI Sem B.E (EC): 2019– 20 14

SDMCET: Syllabus
CO-2 Elaborate the steps and processes
involved in the VLSI fabrication - - 1,2,4
technology.
CO-3 Apply layout rules to design various
5 1,2 9,3
digital VLSI circuits.
CO-4 Estimate the parasitics for various MOS
- 1 2
layouts.
CO-5 Perform a comparative study of
2 4,13 1,5,9
different MOS circuit technologies.
CO-6 Identify and describe the challenges
13 12 2,4
involved in digital CMOS VLSI design
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1 1.5 1 1.3 2 - - - 1 - - 2 2 -
Level
Course Contents:
1. MOS Transistor: The Metal Oxide Semiconductor (MOS) Structure, 10 Hrs
The MOS System under External Bias, Structure and Operation of
MOS Transistor, MOSFET Current-Voltage Characteristics, MOSFET
Scaling and Small-Geometry Effects. MOS Inverters: Static
Characteristics: Introduction, Resistive-Load Inverter, Inverters with n-
Type MOSFET Load, CMOS Inverter.
2. Fabrication Technology: Introduction, Czochralski growth process, 6 Hrs
Fabrication processes: Thermal oxidation, Diffusion, Ion implantation,
Photo lithography, Epitaxy, metallization and interconnections, Ohmic
and Schottky contacts, fabrication of resistors and capacitors.
3. Basic CMOS Technology: Basic CMOS technology: P-Well / N-Well / 10 Hrs
Twin Well process, MOS mask layer, Stick diagrams, Lambda based
design rules, Schematic and Layouts.
4. Basic Circuit Concepts: Sheet resistance, standard unit capacitance, 6 Hrs
concepts delay unit time, Inverter delays, driving capacitive loads,
Propagation delays, PVT analysis and Process corners.
5. Combinational MOS Logic Circuits & Sequential MOS Logic 12 Hrs
Circuits: Introduction, MOS logic circuits with depletion nMOS loads,
CMOS logic circuits, complex logic circuits, CMOS Transmission gate,
Introduction to sequential MOS logic circuits, Behavior of bistable
elements, SR latch circuit, clocked latch and flip flop circuits.
6. Dynamic logic Circuits: Introduction, Basic principles of pass 8 Hrs
transistor circuits, voltage bootstrapping, synchronous dynamic circuit
techniques, dynamic CMOS circuit techniques, high performance
dynamic CMOS circuits, Semiconductor Memories.
V & VI Sem B.E (EC): 2019– 20 15

SDMCET: Syllabus
Activity Beyond Syllabus:

Mini Projects using modern tools.
Reference Books:
1. Sung Mo Kang & Yusuf Leblebici, “CMOS Digital Integrated Circuits: Analysis and
Design”, 3/e, McGraw-Hill, 2008.
2. Kanaan Kano, “Semiconductor Devices”, 3/e,Pearson education, 2004.
3. Douglas A Pucknell& Kamran Eshragian, “Basic VLSI Design”, 3/e, PHI, 2005.
15UECL504 Microcontroller & VLSI Laboratory (0-0-2):1

Contact Hours: 36
Microcontroller part of laboratory requires a thorough understanding of Digital Circuits
and Programming skills. The course mainly focuses on assembly level language
programs and interfacing programs to interface different hardware components. VLSI part
of laboratory focuses on the design, verification and performance aspects of various
CMOS digital circuits in terms of schematic and layouts followed by simulations using
Cadence

Description of the Outcome: Upon Completion Mapping to POs (1,,12) / PSOs
of the course the student will be able to (13,,14)
CO-1 Apply the knowledge of the instruction
set of 8051 to develop programs for 1,2 3,5,14 12
various applications.
CO-2 Program the 8051 microcontroller at the
3,5,14 9 11,12
Hardware level
CO-3 Interface various peripheral devices 3,5,14 6, 9 11,12
CO-4 Demonstrate the working of digital
circuits and apply the design steps of
1, 2 5 13
VLSI flow to build the schematic and
layouts of basic digital circuits.
CO-5 Analyze and perform the DC and
2 1,5 -
transient analysis of VLSI digital circuits.
CO-6 Compare and evaluate the
2 10,13 1,4,14
performance of digital circuits.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.25 3 2.67 1 2.4 2 - - 2 2 1 1 1.5 2.25
Level
V & VI Sem B.E (EC): 2019– 20 16

SDMCET: Syllabus
Pre-requisites:
Analog Electronic Circuits, Digital circuits, Concepts of Programming 8051 and
Basics of CMOS VLSI design.
Contents:
1. Microcontroller Experiments:
1) Control and conditional loops based programs: sorting, Finding 18 Hrs
largest element in an array.
2) Subroutines: Conditional CALL & RETURN.
3) Code conversion: BCD – ASCII; ASCII – Decimal; Decimal -
ASCII; HEX – Decimal and Decimal – HEX.
4) Generate different waveforms Sine, Square, Triangular, and
Ramp using DAC interface to 8051 Microcontroller; change the
frequency and amplitude.
5) Stepper Motor control interface to 8051 Microcontroller.
6) Alphanumeric LCD panel interface to 8051 Microcontroller.
2. VLSI Experiments:
Draw the Schematic and Layout for the following logic circuits 18 Hrs
mentioned below. Perform DC, Transient, Parametric analysis,
Verify the Design Rule Check and Layout versus Schematic (LVS)
check.
1) Inverter, Buffer, Transmission gate, Basic / Universal gates.
2) Flip-Flops: RS, D, JK, Master slave RS, D and JK.
3) Serial / Parallel adder.
4) Johnson / Ring counter.
5) Design Multiplexer, Demultiplexer.
6) A single stage Differential amplifier.
15UECL505 Digital Signal Processing Laboratory (0-0-2):1

Contact Hours: 36
The laboratory course enables students to get practical experience in processing of

signals, design of filters and realization of systems.
V & VI Sem B.E (EC): 2019– 20 17

SDMCET: Syllabus
Description of the course outcome: Upon Mapping to POs (1,12) /
completion of the course, the student will be able PSOs (13,14)
to Level 3 Level 2 Level 1
CO-1 Perform signal manipulations and
1,2
Compute response of LTI systems
CO-2 Compute DFT and inverse DFT and Verify
1,2
the properties.
CO-3 Apply properties of DFT to solve signal
1,2
processing problems
CO-4 Design analog filters to satisfy the given
2, 3 13
specifications
CO-5 Design digital filters to satisfy the given
2, 3 13
specifications
CO-6 Demonstrate the applications of signal
2,3 13
processing
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.7 2.8 3.0 - - - - - - - - - 1.0 -
levels
Experiment List:
1. Basic signal processing operations.
2. Response of LTI systems.
3. Computation of DFT/IDFT and verification of properties.
4. Frequency analysis of signals using DFT.
5. Linear filtering of long data sequence using DFT.
6. Efficient computation of DFT.
7. Design analog IIR filters for the given specifications and their realization.
8. Design digital IIR filters for the given specifications and their realization.
9. Design digital FIR filters for the given specifications.
10.Applications of signal processing.
Reference Books:
1.Proakis & Monalakis, “Digital Signal Processing: Principles, Algorithms &
Applications”, 4/e, Pearson Education, New Delhi, 2007.
2. Sanjit K. Mitra, “Digital Signal Processing”, 2/e Tata Mc-Graw Hill, 2004.
3. Li Tan, “Digital Signal Processing Fundamentals and Applications”, Elsevier, 2003.
4. Emmanuel C. Ifeachor, Barrie W. Jervis, “Digital Signal Processing: A Practical
Approach”, 2/e, Pearson Education.
V & VI Sem B.E (EC): 2019– 20 18

SDMCET: Syllabus
ELECTIVE - I
15UECE510 Object Oriented Programming using C++ (4-0-0): 3
Contact Hours: 52
The course focuses on features of Object Oriented Programming language with C++
as an example. Each aspect will be explained with the help of suitable applications.

Description of the course outcome: Upon Mapping to POs (1-12) / PSOs
completion of the course, the student will be able (13,14)
CO-1 Describe various features of Object 5,12 1 2,3,14
Oriented Programming, objects and

classes, Control statements, operator
overloading, inline functions with respect
to C++ language, structures, Compare
C++ with C.
CO-2 Construct elementary C++ programs 1,2,5,14 12
with C++ arithmetic, increment,

decrement, assignment, relational,
equality and logical operators.
CO-3 Compare and Contrast between 5,12
standard library functions and user

defined functions
CO-4 Apply the concepts of objects, classes, 5,12 14 4
polymorphism and inheritance to build

real time problem statements.
CO-5 Demonstrate and apply virtual function 5,12 14 4
and overloading concepts to real life

problem statements.
CO-6 Model real time problem statements 5,12 14
using pointers to functions, pointer to

structure and pointers to objects.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 2.5 2 1 1 2.6 - - - - - - 2.5 - 2
V & VI Sem B.E (EC): 2019– 20 19

SDMCET: Syllabus
Pre-requisites:
C programming language.
Course Contents:
1. Introduction: Object Oriented Programming Characteristics of

Object Oriented Programming languages, C++ and C, Basic
Program Construction, Output using cout, Directives, 6 Hrs
Comments, Integer and character variables, Input with cin,
Floating Point Types, Type Bool, setw manipulator, Type
conversion, Arithmetic Operators, Library Functions.
Loops and Decisions: Relational Operators, loops, decisions,
Logical Operator, Precedence summary, Control Statements,
Structures, Enumerations.
2. Functions: Passing Arguments to Functions, Returning Values 8 Hrs
from Functions, Reference Arguments, Overloaded Functions,
Inline Functions, Default Arguments. Function templates,
Pointers: Addresses and pointers, the address-of operator &,
Pointers and functions, new and delete operators.
3. Objects and Classes: A simple Class, C++ Objects as 9 Hrs
Physical Objects, C++ Objects as Data Types, Constructors,
and Objects as Function Argument, default copy Constructor,
Returning Objects from Functions, Structures and class.
Pointers to objects.
4. Arrays and Strings: Array Fundamentals, Function 9 Hrs
Declaration with Array Arguments, Arrays as Class Member
Data, Arrays of Objects. C- Strings, The standard C++ string
class, pointers and arrays, Pointers and c-type strings.
5. Operator Overloading: Overloading Unary Operators, 4 Hrs
Overloading Binary operators.
6. Inheritance: Derived Class and Base class, Derived class 8 Hrs
Constructors, Overriding Member Functions, Public and Private
Inheritance. Friend functions, Friend classes.
7. Virtual Functions and Polymorphism: Virtual Functions, The 8 Hrs
Virtual Attribute Is Inherited, Virtual Functions Are Hierarchical,
Pure Virtual Functions.

Hobby Projects and Case study
V & VI Sem B.E (EC): 2019– 20 20

SDMCET: Syllabus
Reference Books:
1. R. Lafore, “Object Oriented Programming using C++”, Galgotia Publications, 2004.
2. Herbert Schildt, “C++: The Complete Reference”, fourth edition, McGraw Hill
OSBORNE publications.
3. K R Venugopal, Rajkumar, T Ravishankar, “Mastering C++”, Second Edition, Tata
McGraw Hill Publishing Company Limited, New-Delhi.
4. S. B. Lippman& J. Lajoie, “C++ Primer”, 3/e, Addison Wesley, 2000.
15UECE511 Advanced Digital System Design (4-0-0) 3

Contact Hours: 52
The course focuses mainly on design of advanced digital systems using finite state machines
and SM charts. It also discusses the implementation of advanced digital circuits on
programmable devices of varied complexity.
Course outcomes:
Description of the course outcome: Mapping to POs (1,12) / PSOs (13,14)
Upon completion of the course, the Level 3 Level 2 Level 1
student will be able to Substantial Moderate Slight
CO-1 Elaborate the various concepts 2,14 4
of digital circuits.
CO-2 Build the various arithmetic 2 1 3,14
operations using programmable
logic devices.
CO-3 Design the sequential circuits 3 5,13,14 1
using SM charts.
CO-4 Construct the programmable 4 2,3,13 1
device for floating point
arithmetic operations.
CO-5 Compare CPLD & FPGA - 4,5,14 1
architectures.
CO-6 Evaluate digital circuits using 4,14 2 1
hardware testing techniques.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 1.4 2.2 1.5 1 2 - - - - - - - 2 2
V & VI Sem B.E (EC): 2019– 20 21

SDMCET: Syllabus
Pre-requisites:
Digital circuits &. Basic Electronics
Course Contents:
1. Review of Logic Design Fundamentals: Combinational 4 Hrs
and Sequential Circuits, Boolean Algebra and
Algebraic Simplification, Karnaugh Maps, Universal
Gates, Hazards in Combinational Circuits,Flip-Flops and
Latches, Fundamentals of Moore and Mealy Sequential
Networks, Timings, Set-up and Hold Times, Synchronous
Designs, Tristate Logic and Busses.
2. Designing with Programmable Logic Devices: Read 9 Hrs
Only Memories, Programmable Logic Arrays (PLAs),
Programmable Array Logic (PALs), other sequential
Programmable Logic Devices(PLD), Design of Traffic
Light Controller, Key Pad Scanner Design.
3. Design of Networks for Arithmetic Operations: Design 9 Hrs
of Serial Adder with Accumulator,State Graphs for Control
Networks, Design of Binary Multiplier, Multiplication of
Signed Binary Numbers, Design of Unsigned Binary
Divider.
4. Digital Design with SM Charts & Floating Point 8 Hrs
Arithmetic: State machine charts, Derivation of SM
charts, Realization of SM charts, Implementation of the
Dice Game, Alternative Realization for SM charts using
Microprogramming, Linked State Machines.
5. Floating Point Arithmetic: Representation of Floating 7 Hrs
Point Numbers using IEEE 754 Standard, Floating-Point
Multiplication, other Floating Point Operations.
6. Designing with Programmable gate arrays and 8 Hrs
complex Programmable logic devices: Xlinix 3000
Series FPGAs, Designing with FPGAs, Xlinix 4000 Series
FPGAs, using a One-Hot State Assignment, Altera
Complex Programmable Logic Devices(CPLDs), Altera
FLEX 10KSeries CPLDs.
7. Hardware Testing and Design for Testability: Testing 7 Hrs
Combinational Logic, Testing Sequential Logic, Scan
Testing, Boundary Scan, Built-In-Self-Test.

Design of 4-bit or 8-bit Processor using freeware or licensed tool.
V & VI Sem B.E (EC): 2019– 20 22

SDMCET: Syllabus
Reference Books:
1. Charles H. Roth. Jr, “Digital Systems Design using VHDL”, Thomson Learning, Inc,
9threprint, 2006.
2. Stephen Brown &ZvonkoVranesic, “Fundamentals of digital logic design with VHDL”,Tata
McGraw-Hill, New Delhi, 2/e, 2007.
3. Mark Zwolinski, “Digital System design with VHDL”, 2/e, Pearson Education, 2004.
4. Volnei A Pedroni, “Digital Electronics and design with VHDL”, Elsevier Science, 2009.
5. Samir Palnitkar,“Verilog HDL - A Guide to Digital Design and Synthesis”, Sun Micro
Systems Press, 2/e, PHI, 2003
15UECE512 Digital Switching Systems (4-0-0)3

Contact Hours: 52
Knowledge of Digital circuits and Analog Communication is required as a prerequisite.
The course focuses on various switching techniques, parameters that affect the quality,
performance measures of switching system, characterization and modeling of switching
system.

Description of the course outcome: Upon Mapping to POs (1,12) / PSOs
completion of the course, the student will be (13,14)
able to Level 3 Level 2 Level 1
CO-1 Describe the evolution of 1 13
telecommunication systems and
explain basics of various switching
systems and telecommunication
networks.
CO-2 Identify and compare various 1,2,13
switching systems on the basis of
their configuration, technology and
architecture.
CO-3 Identify and compare various 1,2,13 14
electronic switching systems, their
firmware along with multistage
networks.
CO-4 Discuss various space and time 1 13
division switching configurations with
multistage switching.
CO-5 Calculate network traffic load and its 1,2,3 13
parameters
V & VI Sem B.E (EC): 2019– 20 23

SDMCET: Syllabus
CO-6 Describe the basics of ISDN and its 1 13
background , goals ,protocols and
structures
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 2.0 1.6 3 1.6 1
Pre-requisites:
Analog Communication and Digital Communication
Course Contents:
1. Introduction: Evolution of Telecommunication, Simple 9 Hrs
Telephone Communication, Basics of a Switching System,
Manual Switching System, Major Telecommunication
Networks. Advantages of Digital Voice Networks,
Disadvantages of Digital Voice Networks.
2. Switching & Signaling for analog Telephone networks – 6 Hrs
Switching concepts – Cross-bar switching – Supervisory
signaling – E & M signaling – In-band & out-of-band signaling.
3. Electronic Space Division Switching: Stored Program 12 Hrs
Control, Centralized SPC, Distributed SPC, Software
Architecture, Application Software, Enhanced Services, Two-
stage, Three-stage and n-stage Networks.
4. Time Division Switching: Basic Division Space and Time 10 Hrs
Switching, Time Multiplexed Space and Time Switching,
Introduction to Combination Switching, Three-stage and n-
stage Combination Switching.
5. Traffic Engineering: Introductory terminology – Blockage, 8 Hrs
Lost Calls, Grade of Service – Erlarg and Poisson Traffic
formulas – one- way and both-way circuits – QOS.
6. ISDN - ISDN - background & goals of ISDN – protocols – 7 Hrs
structures – ATM and B-ISDN – User-Network interface (UNI)
configuration and architecture – Introduction to ATM cell
structure.
References Books:
1. Thyagarajan Viswanathan, “Telecommunication Switching Systems and
Networks”, PHI, 2010.
2. John. C. Bellamy, “Digital Telephony, 3rd Edition, John Wiley and Sons Inc.,
2010.
3. J E Flood, “Telecommunication switching, Traffic and Networks”, Pearson
V & VI Sem B.E (EC): 2019– 20 24

SDMCET: Syllabus
Education, 2008.
4. Roger L. Freeman, Wiley Series in Telecommunications and Signal Processing
5. N. N. Deb, Telecommunication System Engineering
6. J E Flood, “Telecommunication switching, Traffic and Networks”, Pearson
Education, 2008.
15UECE513 DSP Architecture (4-0-0) 3
Contact Hours: 52
Digital Signal Processor Architecture focuses on various architectural requirements
of a digital signal processor, programming aspects and interfacing the processor to
memory and I/O devices considering as exampleTMS320C54xx.
Course outcome (COs):

Description of the Outcome: Upon completion of Mapping to POs (1-12) / PSOs
the course, the student should be able to (13,14)
CO-1 EIaborate the basics of various 1, 4 2 14
architectural requirements of a digital

signal processor.
CO-2 Analyze the addressing modes and 1,2 14
instruction types
CO-3 Analyze and distinguish the instructions 1, 3 14
set of TMS320C54xx
CO-4 Apply the knowledge of architecture and 14 12
instructions set to develop programs for

signal processing and analyze accuracy
of computation
CO-5 Discuss the methodology of interfacing 3 14
the processor to memory and I/O devices

with Illustrative examples.
CO-6 Discuss the applications of DSP with 3 14
Illustrative examples.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 3 2.5 2.3 3 - - - - - - - 2 3 1.7
V & VI Sem B.E (EC): 2019– 20 25

SDMCET: Syllabus
Pre-requisites:
Engineering Mathematics, Digital Signal Processing
Course Contents:
1. Introduction To Digital Signal Processing: Introduction, A 7 Hrs
digital signal processing system, the sampling process,
discrete time sequences, Discrete Fourier Transform (DFT)
and Fast Fourier Transform (FFT), linear time invariant
systems, Digital filters, Decimation and Interpolation, Analysis
and Design tool for DSP systems.
2. Computational Accuracy In DSP Implementation: 7 Hrs
Introduction, Number formats for signals and coefficients in
DSP systems, Dynamic range and precision, Sources of error
in DSP implementations, A/D conversion error, DSP
computational error and D/A Conversion error.
3. Digital Signal Processing Devices: Introduction, Basic 6 Hrs
architectural features, DSP computational building blocks, Bus
architecture and memory, Data addressing capabilities,
Address generation unit, Programmability and Program
execution, Speed issues.
4. Programmable Digital Signal Processors: Introduction, 6 Hrs
Architecture of TMS320C54xx digital signal processors: Bus
structure, Central processing unit, internal memory and
memory mapped registers, Data addressing modes of
TMS320C54xx processors, Memory space of TMS320C54xx
processors.
5. TMS320C54xx Instructions And Programming, On-chip 7 Hrs
peripherals, Interrupts of TMS320C54xx processors, Pipeline
operation of TMS320C54xx processors.
6. Implementation Of Basic DSP Algorithms: Introduction, The 7 Hrs
Q-notation, Linear Convolution, Circular Convolution, FIR
Filters, IIR Filters, Interpolation Filters, Decimation Filters,
Adaptive Filters, butterfly computation and FFT implementation
on the TMS320C54xx.
7. Interfacing Memory And Parallel I/O Peripherals To 6 Hrs
Programmable DSP Devices: Introduction, Memory space
organization, External bus interfacing signals, Memory
interface, Parallel I/O interface, Programmed I/O, Interrupts
and I/O, Direct memory access(DMA). Interfacing Serial
Converters to a Programmable DSP device: Introduction,
Synchronous Serial Interface (SSI), A multi channels buffered
serial port (McBSP).
V & VI Sem B.E (EC): 2019– 20 26
SDMCET: Syllabus
8. A Codec Interface Circuit: Codec-DSP interface circuit.
Applications of programmable DSP devices: Introduction, A
6 Hrs
DSP system, DSP-based Biotelemetry receiver, A speech
processing system, An image processing system.

Computation and simulation using DSP algorithms.
Reference Books:
1. Avtar Singh and S. Srinivasan, “Digital Signal Processing”, Thomson Publications,
2004.
2. Lapsley et al. DSP Processor Fundamentals, Architectures & Features”S. Chand &
Co, 2000.
3. B.VenkataRamani and M. Bhaskar, “Digital Signal Processors, Architecture,
Programming and Applications”, TMH, 2004
15UECE514 Scientific Computing using Python (4-0-0) 3

Contact Hours: 52
The course focuses on programming concepts in Python. It includes basic numerical
algorithms covering interpolation, integration, differentiation, ODE and PDE solvers, and basic
linear algebra. Demonstrate computing principles and domain applications that use
programming concepts.

completion of the course, the student will be able (13,14)
CO-1 Examine Python syntax and semantics 1
and be familiar to use Python flow control
and functions.
CO-2 Demonstrate proficiency in handling 1
Strings and File Systems.
CO-3 Develop, run and manipulate Python 2
Programs using core data structures like
Lists, Dictionaries, use Regular
Expressions.
CO-4 Interpret the concepts of Object-Oriented 2
Programming as used in Python
CO-5 Identify and debug coding errors in a 1
V & VI Sem B.E (EC): 2019– 20 27

SDMCET: Syllabus
program.
CO-6 Implement domain specific applications 13
in Python.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2 2 1
Pre-requisites:
Familiarity with basic programming concepts.
Course Contents:
1. Introduction: About Python, Installing Python, The command line. 01 Hrs

2. The core Python language I: The Python shell, Numbers, variables, 10 Hrs
comparisons and logic, Python objects I: strings, Python objects II:
lists, tuples and loops, Control flow, File input/output, Functions.
3. Interlude: simple plotting with pylab: Basic plotting, Labels, legends 12 Hrs
and customization, More advanced plotting.
The core Python language II: Errors and exceptions, Python objects
III: dictionaries and sets, Pythonic idioms: “syntactic sugar”, Operating
system services, Modules and packages, An introduction to object-
oriented programming.
4. IPython and IPython Notebook: IPython, IPython Notebook. 11 Hrs
Numpy: Basic array methods, Reading and writing an array to a file,
Statistical methods, Polynomials, Linear algebra, Matrices, Random
sampling, Discrete Fourier transforms.
5. Matplotlib: Matplotlib basics, Contour plots, heat maps and 3D plots. 10 Hrs
SciPy: Physical constants and special functions, Integration and
ordinary differential equations, Interpolation, Optimization, data-fitting
and root-finding.
6. General scientific programming: Floating point arithmetic, Stability 08 Hrs
and conditioning, Programming techniques and software development.

Implement simple real-time application in Python.
Reference Books:
1. Christian Hill, “Learning Scientific Programming with Python”, Cambridge
University Press, 2015.
2. Sandeep Nagar, “Introduction to Python for Engineers and Scientists: Open
Source Solutions for Numerical Computation”, Apress Publication, 2018.
3. T.R. Padmanabhan, “Programming with Python”, Springer, 2016.
4. Allen B. Downey, “Think Python”, Second Edition, O’Reilly Publication, 2015.
V & VI Sem B.E (EC): 2019– 20 28

SDMCET: Syllabus
ELECTIVE – II
15UECE520 System Verilog (4 - 0 - 0) 3
Contact Hours: 52
Knowledge of HDL programming, Programming in C++ and Digital system Design
are required as prerequisites. The course focuses on coding guidelines for system
Verilog, data types, data structures supported, subroutines, methods of testing the
program.

Description of the course outcome: Upon Mapping to POs (1,,12) / PSOs
completion of the course, the student will be (13,,14)
CO-1 Establish the relevance of System 1
Verilog as a Hardware Description
and Verification Language (HDVL).
CO-2 Identify the Language constructs 1 4
and their usage.
CO-3 Realize the importance of 1 4
utilization of Data structures such
as array, structures and unions.
CO-4 Demonstrate the coding skills for 3,4 13,14
synthesis.
CO-5 Elaborate the importance of 1,3 4 13
Verification and its guidelines,
design proper verification bed
using Language
CO-6 Demonstrate design skills and 1 3 4,13,14
Verification strategies and
illustrate white box verification with
proper usage of assumptions,
assertions and coverage.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2.5 2.3 1 2.3 1 1
Pre-requisites:
Basic Verilog, Programming using C++ and Digital System Design.
V & VI Sem B.E (EC): 2019– 20 29

SDMCET: Syllabus
Contents:
1. Introduction to System Verilog:

System Verilog origins ,Generations of the System Verilog 7 Hrs
standard, Donations to System Verilog , Key System Verilog
enhancements for hardware ,design, System Verilog
Declaration Spaces , Packages ,Package definitions ,
Referencing package contents, Synthesis guidelines , $unit
compilation-unit declarations, Coding guidelines, System
Verilog identifier search rules ,Source code order, Coding
guidelines for importing packages into $unit , Synthesis
guidelines , Declarations in unnamed statement blocks , Local
variables in unnamed blocks, Simulation time units and
precision ,Verilog’s timescale directive, Time values with time
units , Scope-level time unit and precision , Compilation-unit
time units and precision.
2. System Verilog Literal Values and Built-in Data Types: 9 Hrs
Enhanced literal value assignments ‘define enhancements,
SystemVerilog variables, Using 2-state types in RTL models ,2-
state type characteristics , Relaxation of type rules, Signed and
unsigned modifiers, Static and automatic variables,
Deterministic variable initialization, Type casting, Constants
System Verilog User-Defined and Enumerated Types, User-
defined types, Enumerated types.
3. System Verilog Arrays, Structures and Unions: Structures. 8 Hrs
Unions , Arrays , The foreach array looping construct X, Array
querying system functions, The $bits “sizeof” system function
,Dynamic arrays, associative arrays, sparse arrays and strings.
4. System Verilog Procedural Blocks, Tasks and Functions: 9 Hrs
Verilog general purpose always procedural block, System
Verilog specialized procedural blocks, Enhancements to tasks
and functions.
5. Verification Guidelines: The Verification Process, The 9 Hrs
Verification Methodology Manual , Basic Test bench
Functionality, Directed Testing, Methodology Basics,
Constrained-Random Stimulus , What Should You
Randomize?, Functional Coverage , Test bench Components,
Layered Test bench , Building a Layered Test bench ,.12
Simulation Environment Phases, Maximum Code Reuse, Test
bench Performance.
6. Connecting the Test bench and Design: Separating the Test 10 Hrs
bench and Design, The Interface Construct, Stimulus Timing,
V & VI Sem B.E (EC): 2019– 20 30
SDMCET: Syllabus
Interface Driving and Sampling, Program Block Considerations,
Connecting It All Together, Top-Level Scope, Program–Module
Interactions, System Verilog Assertions, The Four-Port ATM
Router, The Ref Port Direction.

Verification using Test bench programs.
Reference Books:
1. System Verilog For Design A Guide to Using System Verilog for Hardware
Design and Modeling by Stuart Sutherland, Simon Davidmann, PeterFlake,
Foreword by Phil Moorby Second Edition, Springer Publications.
2. System Verilog for Verification A Guide to Learning the Testbench Language
Features by Chris Spear and Greg Tumbush, third edition by Springer
Publications.
3. Digital System Design with System Verilog by Mark Zwolinski -Pearson
Education, 2009
15UECE521 Operating System (4-0-0) 3

Contact Hours: 52
The course focuses on concepts of structure and function of computer operating
systems; processes and threads; synchronization and mutual exclusion;
deadlock and starvation; memory management; virtual memory; process
scheduling; I/O and storage devices, and file management. Prior knowledge on
basic C programming required.

Description of the course outcome: Mapping to POs (1,12) / PSOs
Upon completion of the course, the (13,14)
student will be able to Level 3 Level 2 Level 1
CO-1 Classify the Operating systems. 1,2
CO-2 Describe the structure of OS. 1,2
CO-3 Explain process, inter process
communication and solve 3 1,2
process scheduling problems.
CO-4 Explain the process of
synchronization and solve solve 3 1,2 14
deadlock problems.
V & VI Sem B.E (EC): 2019– 20 31

SDMCET: Syllabus
CO-5 Elaborate the memory
management and solve page 3,14
replacement problems.
CO-6 Identify the security issues,
authentication and explain the
3,14
working of Linux operating
system.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 1.75 1.75 3 1 2.33
Course Contents:
1. Introduction to operating systems: Introduction to OS, user 4 Hrs

view, system view, Classification of OSs, features and
applications.
Operating system structures: System components, OS
Services, System calls, System programs, System structure,
Virtual machines.
2. Process Scheduling: Process concept, Process scheduling, 8 Hrs
Operation on processes, cooperating processes, Inter
process communication. Threads overview, CPU scheduling-
Basic concepts, scheduling criteria, Scheduling algorithms,
multiple processor scheduling, Real time scheduling.
3. Process Synchronization: The Critical section problem, 12 Hrs

Synchronization hardware, Semaphores, problems of
synchronization, Critical regions, monitors. Deadlock -
System model, Deadlock characterization, Methods for
handling deadlocks - Deadlock prevention, deadlock
avoidance, Deadlock detection and solution for deadlock.
4. Storage Management: Overview, Main memory 7 Hrs
management- Background, Swapping, Contiguous allocation,
Paging, Segmentation, Segmentation with paging.
5. Virtual memory - Background, Demand paging, Process 12 Hrs
creation, Page replacement algorithms, Allocation of frames,
thrashing. File System interface - File concept, Access
methods, Directory structure, File system mounting, File
system implementation, Directory implementation, Allocation
methods and free space management. Mass storage
structures – Disk structure, Disk scheduling methods, Disk
6management, Swap space management.
6. OS Security: Goals of protections, the security issues, 6 Hrs
V & VI Sem B.E (EC): 2019– 20 32

SDMCET: Syllabus
Authentication, System threats, Securing systems and
facilities, Intrusion detection.
7. Case Study - Linux operating system: Features of Linux,
applications, Linux and Windows OS installation procedure, 3 Hrs
Inter-process communication.

Simulation of algorithms used in OS.
Reference Books:
1. Abraham Silberschatz, Peter Baer Galvin, Greg Gagne ─ “Operating
System Concepts”, 6th edition, John Wiley & Sons.
2. Milan Milankovic ─ “Operating system concepts and design”, 2nd
Edition, McGraw-Hill.
3. Harvey M Deital ─ “Operating systems”, Addison Wesley Publications
4. D.M Dhamdhere ─ “Operating systems - A concept based Approach”,
Tata McGraw-H ll.
15UECE522 Digital Image Processing (4-0-0): 3

Contact Hours: 52
The course focuses on fundamentals in image processing like image sampling,
quantization, various image enhancement techniques in spatial and frequency
domain, color image processing, and concepts of detection of discontinuities, edge
linking and boundary detection.

Description of the course outcome: Upon Mapping to POs(1-12) /
completion of the course, the student will be PSOs(13,14)
(3) (2) (1)
CO-1 Describe image acquisition, its 1
representation and fundamentals in
image processing.
CO-2 Apply suitable image enhancement 2 1,13
technique based on application.
CO-3 Differentiate between the 2 3 12
techniques of image enhancement in
spatial and frequency domains
CO-4 Compare various image restoration 2 1, 13
techniques
V & VI Sem B.E (EC): 2019– 20 33

SDMCET: Syllabus
CO-5 Explain the fundamentals of color 12
image processing
CO-6 Compare various image 12
segmentation techniques
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1.7 3.0 2.0 1.7 2.0
Level
Pre-requisites:
Digital signal processing, Probability & random process, Engineering mathematics.
Course Contents:
1. Introduction: Digital image processing, Fundamental 4 Hrs

steps in digital image processing, Components of digital
image processing systems.
2. Digital Image Fundamentals: Elements of visual 6 Hrs
perception, Image sensing and acquisition, Image
sampling and quantization, Basic relationship between
pixels, Linear and non linear operations.
3. Image Enhancement in Spatial Domain: Basic gray 9 Hrs
level transformation, Histogram processing, Enhancement
using arithmetic and logic operations, Spatial filtering,
Smoothing and sharpening spatial filters.
4. Image Enhancement in Frequency Domain: Smoothing 9 Hrs
frequency domain filters, Sharpening frequency domain
filters, Homomorphic filtering.
5. Image Restoration: Noise models, Restoration in the 8 Hrs
presence of noise, Spatial filtering, Periodic noise
reduction by frequency domain filtering, Linear position
invariant degradation, Estimating degradation function,
Inverse filtering, Minimum mean square error filtering,
Constrained least squares filtering, Geometric mean filter,
Geometric transformations.
6. Color Image Processing: Color fundamentals, Color 8 Hrs
models, Pseudo color image processing, Basics of full
color image processing, Color transformations, Smoothing
and sharpening concept.
7. Image Segmentation: Detection of discontinuities, Edge 8 Hrs
linking and boundary detection, Thresholding, Region-
V & VI Sem B.E (EC): 2019– 20 34

SDMCET: Syllabus
based segmentation.

Simulation based Projects
Reference Books:
1. C Gonzalez and Richard E Woods, Rafael, “Digital Image Processing”, 2/e,
Pearson Education, 2005.
2. Anil K Jain, “Fundamentals of Digital Image Processing”, Pearson Education,
PHI, 2001
3. B Chanda and D Dutta Majumdar, “Digital Image Processing and Analysis”,
PHI, 2003.
15UECE523 IC Fabrication Technology (4 - 0 - 0) 3

Contact Hours: 52
The objective of the course is to provide detailed knowledge about fabrication steps
required for IC design. The course focuses on understanding the detailed procedure of
Ion Implantation, Annealing, Oxidation, Lithography, Chemical Vapor Deposition and
Metal Film Deposition techniques.
Description of the Outcome: Upon completion of Mapping to POs (1,12) / PSOs
the course, the student should be able to (13,14)
CO-1 Understand the basics of fabrication
4,13 3 1,2
steps and their importance and safety
procedures.
CO-2 Analyze the concepts of Ion implantation
4,13 1,2,3
modeling and annealing technology.
CO-3 Describe the solid state diffusion
4,13 1,3
modeling and Technology.
CO-4 Explain the process of oxidation and
1,13 2,4,
Lithography in fabrication using thin films
CO-5 Analyze the process of chemical vapor
4 13
deposition and metal film deposition
CO-6 Describe the plasma and rapid based
3,13 6,7 4
thermal processing
V & VI Sem B.E (EC): 2019– 20 35

SDMCET: Syllabus
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
levels 2.0 1.67 2.25 2.5 2.0 2.0 2.83
Pre-requisites:
Basics of Analog Electronics, Engineering Mathematics, Engineering Physics.
Course Contents:
1. Introduction to IC Technology: Basic fabrication steps and 6 Hrs

their Importance. Environment of IC Technology: Concepts of
Clean room and safety requirements, Concepts of Wafer
cleaning processes and wet chemical etching techniques.
2. Impurity Incorporation: Solid State diffusion modeling and 8 Hrs
technology; Ion Implantation modeling, technology and damage
annealing, characterization of Impurity profiles
3. Oxidation: Kinetics of Silicon dioxide growth both for thick, 10 Hrs
thin and ultra thin films, Oxidation technologies in VLSI and
ULSI, Characterization of oxide films, High k and low k
dielectrics for ULSI.
4. Lithography: Photolithography, E-beam lithography and 14 Hrs
newer lithography techniques for VLSI/ULSI, Mask generation.
Chemical Vapour Deposition Techniques: CVD techniques for
deposition of polysilicon, silicon dioxide, silicon nitride and
metal films; relations for the currents, Ebers Moll Model
5. Epitaxial growth of silicon: modeling and technology. Metal 14 Hrs
Film Deposition: Evaporation and sputtering techniques,
Failure mechanisms in metal interconnects Multi-level
metallization schemes. Plasma and Rapid Thermal Processing:
PECVD, Plasma etching and RIE techniques; RTP techniques
for annealing, growth and deposition of various films for use in
ULSI.
Seminar on related Semiconductor Devices, Theme Based Projects.
Reference Books:
1. S.M.Sze(2nd Edition )”VLSI Technology”, McGraw Hill Companies Inc.
2. C.Y. Chang and S.M.Sze (Ed), “ULSI Technology”, McGraw Hill Companies Inc.
3. Stephena, Campbell, “The Science and Engineering of Microelectronic Fabrication”,
Second Edition, Oxford University Press.
4 James D.Plummer, Michael D.Deal, ”Silicon VLSI Technology” Pearson Education
V & VI Sem B.E (EC): 2019– 20 36
SDMCET: Syllabus
VI-Semester
15UECC600 Management, Entrepreneurship & IPR (4-0-0) 4
Contact Hours: 52
This course focuses on concepts of Entrepreneurship, concepts of Management
and about the Intellectual Property Rights. Entrepreneurship part discusses about
Small Scale Industries, Government and Institutional support and details of
preparation of Project Report. Management part discusses about Planning,
Forecasting, Organizing & Staffing, Motivating and Controlling. Intellectual Property
Rights part discusses various legal aspects of Copyright, Patents and Trademarks.
CO-1 Explain the concepts of 8,9,10,12 6,11
Entrepreneurship, Management
and IPRs.
CO-2 Describe the functions of Small 9,10,11,12 8 6,7
Scale Industries and discuss their
Government and Institutional
support.
CO-3 Discuss Management 8,9,10,11 5,12
principles/process and illustrate
Planning, Organising, Motivating
and Controlling.
CO-4 Analyse different legal aspects for 6,8
various Intellectual Property Rights
as applied to Industries/
Organizations.
CO-5 Identify various factors of 8,9,10,11,12 5,6,11 7
entrepreneurship to establish own
Industry/Business.
CO-6 Apply the concepts of 7,9,12 5,6,10,11 3,4
Management, Entrepreneurship
and IPRs to real life situations in
corporate world.
V & VI Sem B.E (EC): 2019– 20 37

SDMCET: Syllabus
1 2 3 4 5 6 7 8 9 10 11 12 13 14
POs/PSOs
Mapping
Level - - 1 1 2 2 1.7 2.8 3 2.8 2.5 2.8 - -
Course Contents:
1. Entrepreneurship:
Foundations of Entrepreneurship: Meaning of 4 Hrs
entrepreneur, functions of entrepreneur, types of
entrepreneur, concept of entrepreneurship, role of
entrepreneurs in economic development, barriers of
entrepreneurship.
2. Small Scale Industry: Definition, characteristics, objects, 4 Hrs
role of SSI in economic development, advantages of SSI,
steps to start as SSI, impact of liberalization, privatization,
globalization on SSI, definition of ancillary and tiny industry.
3. Government and Institutional Support: Nature of support 4 Hrs
of government, objectives and functions of SISI, SIDBI, DIC,
single window agency, KSSIDC, KSFC.
4. Preparation of Project Report: Meaning of project
identification, project report, contents and formulation, 6 Hrs
identification of business opportunities, feasibility studies,
types and purpose.
5. Management
Planning, Forecasting and Decision Making: Nature of 5 Hrs
Planning, the foundation of planning, some planning
concepts, forecasting, nature of decision making,
management science, tools for decision-making.
6. Organizing and staffing: nature of organizing, traditional 6 Hrs
organizational theory, technology and modern organization
structures, staffing technical organization, authority and
power; delegation, meeting & committees.
7. Motivating: Motivation, leadership, motivating and leading 3 Hrs
technical professionals.
8. Controlling: process of control, financial controls, and non- 3 Hrs
financial controls.
9. Intellectual Property Rights
Introduction: Meaning and forms of intellectual property 4 Hrs
right, competing rationale for protection, international
conventions, world court.
10. Copyright : Meaning of copyright, content of copy right,
ownership and rights, Period of copyright, assignment and 4 Hrs
V & VI Sem B.E (EC): 2019– 20 38
SDMCET: Syllabus
relinquishment of copyright, license, infringement of copy
right, fair use, offenses and penalties.
11. Patents: Concept of patent, patentable inventions,
procedure for obtaining patent, rights and obligations of 5 Hrs
patent holders, infringements and remedies, offenses and
penalties.
12. Trademarks : Definition, Concepts, Advantages of 4 Hrs
registration, Known and Well known trademarks, Grounds
for acceptance, Grounds for non-acceptance, Procedure for
registration of trademark, Infringement of trademark,
Offences and penalties.

Seminar on Professional Ethics
Reference Books:
1. "Management and Entrepreneurship" – N.V.R. Naidu, T. Krishna Rao, I.K.
International Publishing House Pvt. Ltd.
2. "Managing Engineering and Technology", Daniel L Babcock, Lucy C Morse,
Third Edition, PHI, India
3. N.K. Acharya, ─ "Text book on Intellectual Property Rights", Asia Law House,
Hyderabad, 4th Edition.
15UECC601 ARM Processor (4-0-0) 4

Contact Hours: 52
The course focuses on Learning of ARM architecture focusing on ARM7 and ARM
Cortex M3 architecture. Taking the advantages of RISC methodology, ARM,
THUMB instruction set architectures and application development upon ARM
boards.

CO-1 Identify and describe the advantages 14 1
of RISC architecture
CO-2 Discuss the architecture, processor 3 5,12 1
modes, instruction types and
programming model of ARM7TDMI.
CO-3 Distinguish between ARM and 3 14
V & VI Sem B.E (EC): 2019– 20 39
SDMCET: Syllabus
THUMB instruction set architecture and
assess the performance measure of an
application developed using these
instruction set architectures.
CO-4 Demonstrate programming skills using 2,3 14 1
Assembly Level Language and High
Level Language such as C
CO-5 Write the program of Interrupt Service 4,5 1
Routine (ISR) for various sources of
interrupts.
CO-6 Explain different types of assemblers 5,4,12 14
of ARM7TDMI
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1 2 3 - 2.3 - - - - - 2.5 - - 2.4
Levels
Pre-requisites:
Knowledge of any processor/Controller, High level programming language
Course Contents:
1. Introduction: History of RISC, Embedded system hardware 6 Hrs
and software, ARM Begins, The Creation of ARM Ltd , ARM
Today , Architecture revisions, The Computing Device,
Number Systems, Representations of Numbers and
Characters , Integer Representations, Floating-Point
Representations, Character Representations , Translating
Bits to Commands, The Tools ,The ARM7TDMI
Programmer's Model , Pipeline, Introduction, Data Types,
Processor Modes, Registers, Program Status Registers, The
Control Bits, The Mode Bits, The Vector Table.
2. First Programs: Introduction, Program 1: Shifting Data, 7 Hrs
Running the Code, Examining Register and Memory
Contents, Program 2: Factorial Calculation, Program 3:
Swapping Register Contents, Programming Guidelines,
Assembler Rules and Directives: Introduction, Structure of
Assembly Language Modules, Predefined Register Names,
Frequently Used Directives, Macros, Miscellaneous
Assembler Features.
3. Loads, Stores and Addressing: Memory, Loads and 3 Hrs
Stores-The Instructions, Operand Addressing Pre-Indexed
Addressing, Post-Indexed Addressing, Endianness.
4. Constants and Literal Pools: The ARM Rotation Scheme,
V & VI Sem B.E (EC): 2019– 20 40

SDMCET: Syllabus
Loading Constants into Registers Loading Addresses into 5 Hrs
Registers, Logic and Arithmetic, Flags and Their Use, The N
Flag, The V Flag, The Z Flag, The C, Flag, Comparison
Instructions, Data Processing Operations, Boolean
Operations, Shifts and Rotates.
5. Addition/Subtraction: Multiplication, Multiplication by a
Constant, Division, Fractional Notation, Loops and Branches, 7 Hrs
Introduction, Branching, Looping, While Loops, For Loops,
Do While Loops, More on Flags, Conditional Execution,
Straight-Line Coding, Tables, Look-up Tables, Jump Tables,
Binary Searches ,Subroutines and Stacks, The Stack,
Subroutines, Passing Parameters to Subroutines, The ARM
APCS.
6. Exception Handling: Interrupts, Error Conditions, Processor 5 Hrs
Exception Sequence, The Vector Table, Exception Handlers,
Exception Priorities, Procedures for Handling Exceptions,
Reset Exceptions, Undefined Instructions, Interrupts, Aborts.
7. Memory-Mapped Peripherals: The LPC2104, The UART, 6 Hrs
The Memory Map, Configuring the UART, Writing the Data to
the UART, Putting the Code Together, Running the Code,
The LPC2132 The DIA Converter, The Memory Map,
Configuring the DI A Converter, Generating a Sine Wave,
Putting the Code Together, Running the Code.
8. THUMB: Introduction, THUMB Instructions, Differences 3 Hrs
Between ARM and THUMB, THUMB Implementation and
Use , How to Compile for THUMB.
9. Mixing C and Assembly: Inline Assembler, Inline Assembly 5 Hrs
Syntax, Restrictions on Inline Assembly Operations,
Embedded Assembler, Embedded Assembly Syntax,
Restrictions on Embedded Assembly Operations, Calling
Between C and Assembly.
10. Background of ARM and ARM Architecture: Instruction 5 Hrs
Set Development, the Thumb-2 Instruction Set Architecture
(ISA), Cortex-M3 Processor Applications,
Overview of ARM Cortex3: Fundamentals, Registers,
Operation Modes, The Built-In Nested Vectored Interrupt
Controller, The Memory Map, The Bus Interface, The
Memory Protection Unit, The Instruction Set, Interrupts and
Exceptions Debugging Support, Characteristics Summary.
Keil and other developing platform and ARM free kits; Carry out GPS, GSM,
Graphic LCD, RFID, Bluetooth interfacing.
V & VI Sem B.E (EC): 2019– 20 41
SDMCET: Syllabus
Reference Books:
1. William Hohl, “ARM Assembly Language Programming, Fundamentals and
Techniques”, CRC Press
2. Joseph Yiu, “The Definitive Guide to ARM Cortex-M3”, Newenes Publication
3. Andrew Sloss, Dominic Symes, Chris Wright, “ARM System Developer’s Guide:
Designing Optimizing System Software”, Morgan Kaufmann, 2004.
4. Steve Furber, “ARM System-on-Chip Architecture”, 2/e, Pearson Education, 2000.
15UECC602 Analog and Mixed Mode VLSI Design (4-0-0) 4

Contact Hours: 52
The course focuses on Analog and Mixed Mode VLSI Design considering the basic
requirements of circuit design, difficulties in the design phase and various circuit examples.
The course considers widely used analog circuits such as OPAMP, ADC, DAC, current source
and sinks, mirrors and PLL as examples for the discussion.
Description of the Outcome: Upon completion Mapping to POs (1-12) / PSOs
the course, the student will be able to (13,14)
CO-1 Explain the characteristics and short
1
channel effects of MOS devices
CO-2 Analyse and design various
configurations (CS, CD, CG) of single 2,3,13 1
stage amplifiers.
CO-3 Design the analog circuits such as op-
amps, current sources, current sinks and 2,3,13
current mirrors.
CO-4 Compare data converter fundamentals
13,14 4,5
and build data converter architectures.
CO-5 Explain PLL and its applications.
1,13
CO-6 Estimate the performance parameters of

3,4,13,14
analog and mixed circuits.
POs/PSOs→ 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.33 3 3 2.5 2 3 3
Level
Pre-requisites:
Analog Electronics, Network Analysis, Digital circuits &. Basics of CMOS VLSI Design.
V & VI Sem B.E (EC): 2019– 20 42

SDMCET: Syllabus
Course Contents:
1. Introduction to analog Design: Introduction to MOS, MOS V/I 6 Hrs
characteristics, second order effects, MOS device models.
2. Single stage amplifiers: Basic concepts, common source stage: 12 Hrs
common source stage with resistive load, CS stage with diode
connected load, CS stage with current source load, CS stage with
triode load, CS stage with source degeneration, source follower,
Common gate stage, Cascode stage.
3. Current Sinks, Sources and Mirrors: Current sinks and sources, 6 Hrs
techniques to improve performance of current sinks and sources,
current mirrors, effects to cause current mirror to be different from
ideal situation.
4. Operational Amplifiers: General considerations, Single stage 8 Hrs
Op-Amps, two stage Op-Amps, gain boosting, comparison,
common mode feedback, slew rate, power supply rejection ratio,
Comparator
5. Data Converter fundamentals & architectures: Introduction, 12 Hrs
sample and hold characteristics, digital to analog converter(DAC)
specifications, analog to digital converter(ADC) specifications,
DAC architectures: Resistor string, R-2R ladder network, Charge
scaling DACs, ADC architectures: Pipeline ADC, Successive
approximation ADC
6. Phase Locked Loops: Simple PLL, Basic PLL Topology, 8 Hrs
Dynamics of Simple PLL, Charge Pump PLLs, Non ideal effects in
PLLs, Delay Locked Loops and Applications.

Simulation of analog circuits and data converters.
Reference Books:
1. Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Tata McGraw-Hill
Edition 2008.
2. R. Jacob Baker, Harry W. LI, David E. Boyce, “CMOS Circuit Design, lay out and
Synthesis”, IEEE press, 2005.
3. Phillip E. Allen & Douglas R. Holberg, “CMOS Analog Circuit Design”, 2/e, New York
Oxford, Oxford University.
V & VI Sem B.E (EC): 2019– 20 43

SDMCET: Syllabus
15UECC603 Microwave and Radar Engineering (4- 0 - 0) 4
Contact Hours: 52
The course focuses on the study of transmission lines, waveguides and the devices
used in microwave transmitter and receiver. RADAR being an important application of
microwaves is chosen for the study.

Description of the course outcome: Mapping to POs (1-12) / PSOs (13,14)
Upon completion of the course, the Level 3 Level 2 Level 1
student will be able to Substantial Moderate Slight
CO-1 Derive the equations to model a
transmission line with distributed 1,2 4 13
circuit theory, define the
performance parameters of a
transmission line and explain
the significance of impedance
matching, analyze the properties
of microstrip lines
CO-2 Analyze the modes of wave
propagation in a rectangular 1 4
waveguide and derive scattering
matrix for various waveguide
components.
CO-3 Demonstrate the working of
different microwave 4
semiconductor devices and
discuss their performance and
applications.
CO-4 Appreciate the need for special
kinds of tubes used for 4
microwave applications and
describe the working principle of
microwave tubes used for
amplification and generation.
CO-6 Outline the concepts of Radar
and illustrate the different forms 13 1
of Radar and their applications
1 2 3 4 5 6 7 8 9 10 11 12 13 14
POs/PSOs
V & VI Sem B.E (EC): 2019– 20 44

SDMCET: Syllabus
Mapping
2.33 2.0 - 2.0 - - - - - - - - 1.5 -
levels
Pre-requisites:
Analog Communication, Digital Communication, Electromagnetic Theory.
and Analog Electronics.
Course Contents:
1. Introduction to Microwaves: Microwave Frequency 02 Hrs
Bands, Applications of Microwaves
2. Transmission Lines: Introduction, Transmission-Line 08 Hrs
Equations and solutions, Reflection Coefficient and
Transmission Coefficient, Standing Wave and Standing-
Wave Ratio, Line Impedance and Admittance, The Smith
Chart, Impedance Matching, Microstrip Lines.
3. Waveguides: Introduction, Reflection from a conducting 06 Hrs
plane, Propagation between Parallel Plates, Rectangular
Waveguides - TE and TM modes (Mathematical analysis),
Rectangular Cavity Resonator, Q Factor of a Cavity
Resonator.
4. Waveguide Components: Microwave Hybrid Circuits, 08 Hrs
Directional Couplers, Circulator and Isolator (S-matrix
analysis).
5. Transferred Electron and Avalanche Transit Time 06 Hrs
Devices : Introduction, Gunn-Effect Diodes- Ga As Diode,
Ridley-Watkins - Hilsum Theory, Modes of Operation, Read
Diode, IMPATT Diode, TRAPATT Diode, BARITT Diode.
6. Microwave Tubes: Limitations of Conventional tubes, Two 10 Hrs
Cavity Klystron Amplifier, Reflex Klystron Oscillator, Apple
Gate Diagram, Applications, Construction and Working
Principle of Magnetron and TWT, Applications.
7. An Introduction to Radar: Basic Radar, The simple form of 12 Hrs
the Radar range equation, Radar block diagram, the origin
of Radar, Radar frequencies, Applications of Radar, MTI
and Pulse Doppler Radar, Delay line Cancellers, Digital MTI
processing

Study of microwave components, Conduction of Microwave related
Experiments
Reference Books:
V & VI Sem B.E (EC): 2019– 20 45

SDMCET: Syllabus
1. Samuel Y Liao, “Microwave Devices and Circuits”, 4th Ed., Pearson, 2008
2. "Introduction to Radar systems-Merrill I Skolnik", 3rd Ed, TMH, 2001.
3. "Microwaves and Radar" by M.Kulkarni.
4. Sisodia and Gupta, ─ “Microwaves”, New Age International
5. Somanathan Nair, ─ “Microwave Engineering”, Sanguine Technical Publishers
15UECL604 ARM Processor Laboratory (0 - 0 - 2) 1

Contact Hours: 36
ARM assembly as well as high level language programming skill development.
Description of the course Mapping to POs (1,,12) / PSOs
CO outcome :Upon completion of (13,,14)
the course, the student will be Level 3 Level 2 Level 1
CO-1 Write assembly level program to 2,3,4,5 1,14
solve problems.
CO-2 Identify the different working 2,14
modes of ARM.
CO-3 Illustrate the advantages of 2 14
THUMB instruction set.
CO-4 Demonstrate programming skills 2,3 14 1
using Assembly Level Language
and Embedded C.
CO-5 Implememt optimization 14 2,3
techniques and explore Trade
Offs
CO-6 Analyze and apply the 3,4,5 14 1
capabilities of ARM for
application development.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
1 2.8 2.75 3 3 2.16
Level
Prerequisites:
1. Digital circuits
2. Knowledge of high level language and any processor/controller
List of Experiments
V & VI Sem B.E (EC): 2019– 20 46

SDMCET: Syllabus
1. Swap 2 register contents without using temporary register.
2. Factorial of a given number, Arranging in ascending and descending order.
3. Implementing expressions and finding number of 1s in a 32-bit number.
4. Perform 32 bit multiplication, producing a 64-bit result, using only UMULL
and logical operations.
5. Addition and subtraction of two128-bit numbers.
6. Conversion of upper case to lower case and vice versa.
7. Routine that reverses the bits in a register.
8. Find the maximum value and minimum value in a list of 32-bit numbers
located in memory.
9. Routine that performs parity check and bitwise palindrome.
10. Application development examples using high level language on
LPC 2148.
Reference Books:
1. William Hohl, “ARM Assembly Language Programming, Fundamentals and
Techniques”, CRC Press
2. Joseph Yiu, “The Definitive Guide to ARM Cortex-M3”, Newenes Publication
3. Andrew Sloss, Dominic Symes, Chris Wright, “ARM System Developer’s
Guide: Designing Optimizing System Software”, Morgan Kaufmann, 2004.
4. Steve Furber, “ARM System-on-Chip Architecture”, 2/e, Pearson Education,
2000.
15UECL605 Mini Project (0 - 0 - 8) 4

Contact Hours: 60
Mini project is a core project course at undergraduate VI semester level. The course
focuses on executing a project work based on knowledge of fundamental courses of
lower semesters.
Description of the course outcome: Mapping to POs (1,,12) / PSOs
Upon completion of the course, the student (13,,14)
will be able to Level 3 Level 2 Level 1
CO-1 Identify technical / social problem
and formulate a problem statement 2 6, 7
CO-2 Propose technical approach

2 6, 7 11
towards solution
CO-3 Implement the solution in hardware
1, 3, 12 9, 10, 13
and / or software
CO-4 Organize the topics in a systematic 9 12
V & VI Sem B.E (EC): 2019– 20 47

SDMCET: Syllabus
manner and Prepare the report in a
specific format
CO-5 Present the work in a systematic
5, 9 12, 13
manner.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3 2.5 3 - 3 1.5 1.5 - 2.67 2 1 2.3 2 -
Level
ELECTIVE –III
15UECE630 Speech Processing (4-0-0) 3
Contact Hours: 52
The course focuses on classification of speech sounds, models of speech production. It
also deals with speech processing techniques in time and frequency domain and
various speech processing applications.

able to: Level 3 Level 2 Level 1
CO-1 Explain the characteristics of speech
1
signal
CO-2 Describe mathematical model for
1, 3
speech production mechanism
CO-3 Illustrate various techniques of feature
1, 2 12 13
extraction
CO-4 Differentiate between the various
2 12
techniques of feature extraction
CO-5 Discuss applications of speech signal
2, 3 12, 13
processing
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3.0 3.0 3.0 - - - - - - - - 1.3 1.0 -
Level
Pre-requisites:
Digital Signal Processing
Course Contents:
1. Production and Classification of Speech Sounds: Introduction, 07 Hrs
V & VI Sem B.E (EC): 2019– 20 48

SDMCET: Syllabus
mechanism of speech production, Acoustic phonetics: vowels,
diphthongs, semivowels, nasals, fricatives, stop and affricates, Digital
Models for Speech Sounds.
2. Time-domain Methods for Speech Processing: Time dependent 07 Hrs
processing of speech, short-time energy and average magnitude,
short-time average zero crossing rate. Speech vs. silence detection,
pitch period estimation using parallel processing approach, short-time
autocorrelation function, Pitch period estimation using autocorrelation.
3. Frequency Domain Methods for Speech Processing: Introduction, 08 Hrs
definitions and properties, Fourier transforms interpretation and linear
filter interpretation, sampling rates in time and frequency, Filter Bank
Summation and Overlap Add methods for short-time synthesis of
speech, Spectrographic displays, Pitch detection.
4. Linear Predictive Coding of Speech: Basic principles of linear 08 Hrs
predictive analysis, computation of the gain of the model, Solution of
LPC equations, Prediction error signal, Frequency domain
interpretation of Linear Predictive Analysis, Relationship between
various speech parameters, Synthesis of speech from linear predictive
parameters, Applications of LPC parameters.
5. Homomorphic Speech Processing: Introduction, homomorphic 07 Hrs
systems for convolution, the complex cepstrum of speech, Pitch
detection, Formant estimation, homomorphic vocoder.
6. Speech Synthesis: Principle, Synthesis Based on Waveform Coding, 07 Hrs
Synthesis Based on Analysis-synthesis Method, Synthesis Based on
Speech Production Mechanism, Synthesis by Rule, Text-to-speech
Conversion.
7. Speech Recognition: Principles of Speech Recognition, Speech 08 Hrs
Period Detection, Spectral Distance Measures, Structure of Word
Recognition System, Dynamic time Warping, Hidden Markov Model.

MATLAB simulation of theoretical concepts.
Reference Books:
1. L. R. Rabiner and R. W. Schafer, “Digital Processing of Speech Signals", Pearson
Education (Asia), 2004.
2. SadaokiFurui, “Digital Speech Processing, Synthesis and Recognition”, Marcel
Dekker, INC
3. Lawrence Rabinar and B. Juang,‘Fundamentals of Speech Recognition”, Pearson
Education, 2003.
4. T. F. Quatieri, “Discrete Time Speech Signal Processing”, Pearson Education Asia,
2004.
V & VI Sem B.E (EC): 2019– 20 49
SDMCET: Syllabus
15UECE632 Cryptography and Network Security (4-0-0) 3

Contact Hours: 52

The course focuses on different symmetric and asymmetric cryptographic techniques. It focuses
on the study of encryption/ decryption algorithms of symmetric and asymmetric techniques,
Hash functions, Message authentication codes, Digital signature algorithms and firewalls, also
on the application of cryptographic techniques to email security and network security.

Description of the outcome: Upon completion of the Mapping to POs (1-12) / PSOs
course, the student will be able to (13,14)
CO-1 Identify and Illustrate security services, - 2 1
security threats and mechanisms to counter
them.
CO-2 Analyze and Apply different encryption and 1, 2 3, 4 -
decryption of symmetric cryptographic
techniques to protect data.
CO-3 Demonstrate different authentication and - 4,14 2
digital signature algorithms, key
management techniques and types and
configurations of firewalls.
CO-4 Describe different cryptographic techniques 1 4,14 -
to provide authentication and confidentiality
in email and web security.
CO-5 Compare symmetric and asymmetric 2 3,4 14
encryption techniques.
CO-6 Discuss firewall types and configurations. - 1, 2 3
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2.2 2.2 1.6 2 - - - - - - - - - 1.6
Level
Pre-requisites:
Communication networks and finite fields.
V & VI Sem B.E (EC): 2019– 20 50

SDMCET: Syllabus
Course Contents:
1. Overview: Introduction to ISO-OSI Model, Services, Mechanisms 02 Hrs
and attacks, OSI security architecture, Model for network security.
2. Classical Encryption Techniques: Symmetric cipher model, 06 Hrs
Substitution techniques, Transposition techniques, Rotor
machines, Steganography, Problems.
3. Block Ciphers and DES (Data Encryption Standards): 06 Hrs
Simplified DES, Block cipher principles, DES, Strength of DES,
Block cipher design principles, Block cipher modes of operation,
Problems.
4. Advanced encryption standard: Evaluation criteria for AES, The 06 Hrs
AES cipher, problems.
5. Public Key Cryptography and RSA: Principles of public key 04 Hrs
cryptosystems, RSA algorithm, Problems.
6. Other Public Key Crypto Systems and Key Management: Key 10 Hrs
management, Diffie-Hellman key exchange, Elliptic curve
arithmetic, Elliptic curve cryptography, Problems.
7. Message Authentication, Hash Functions and Digital 04 Hrs
signatures: Authentication requirements, Authentication functions,
Message authentication codes, Hash functions, Security of hash
functions and MAC’s, Digital signature, Digital signature standard,
Problems.
8. Electronic Mail Security: Pretty good privacy, Data compression 05 Hrs
using ZIP, Radix-64 conversion.
9. IP Security: Overview, IP security architecture, Authentication 05 Hrs
header, ESP (Encapsulating Security Pay load).
10. Firewalls: Firewall design principles; trusted systems. 04 Hrs

Simulation and Analysis of cryptographic techniques.
Reference Books:
1. William Stallings, “Cryptography and Network Security,” 4/e, Pearson Education
(Asia) Pte. Ltd. / Prentice Hall of India, 2011.
2. C. Kaufman, R. Perlman, and M. Speciner, "Network Security: Private
Communication in a Public World,” 2/e, Pearson Education (Asia), 2002.
3. AtulKahate, “Cryptography and Network Security”, Tata McGraw-Hill, 2003.
4. Eric Maiwald, “Fundamentals of Network Security”, McGraw-Hill, 2003.
V & VI Sem B.E (EC): 2019– 20 51

SDMCET: Syllabus
15UECE634 Fuzzy Logic (4 - 0 - 0) 3
Contact Hours: 52
The objective is to introduce the students to the fundamentals of Fuzzy Logic. It
also aims at making the students design simple fuzzy logic based controllers for
solving the problems. The applications in different domains of engineering are also
included or case studies.

Description of the Outcome: Upon Mapping to POs (1,12) / PSOs
completion of the course, the student should (13,14)
be able to Level 3 Level 2 Level
Substantial Moderate 1
Slight
CO-1 Elaborate the basics of fuzzy logic
4,13 3 1,2
CO-2 Describe the structure of a simple
fuzzy logic based system 4,13 2,3 1
CO-3 Explain the various algorithms
involved in designing fuzzy systems 2,13,14 5 1
CO-4 Calculate the values of performance
parameters for a given snap shot 2,13,14 1,3
of a system
CO-5 Explain the mode of communication
within a fuzzy system 1,2 13 10
CO-6 Describe types of fuzzy systems
required for sample case studies 4,13,14 1,2 3
1 2 3 4 5 6 7 8 9 10 11 12 13 14
POs/PSOs
Mapping
- - - - - -
levels 1.66 2.33 1.75 3.0 2.0 1.0 2.83 3.0
Pre-requisites:
Basic set theory including union, intersection, complementation etc.;
Basic arithmetic knowledge.
Course Contents:
1. Introduction: Background, Uncertainty and imprecision, 2 Hrs
Statistics and random processes, Uncertainty in information,
Fuzzy sets and membership, Chance versus ambiguity.
2. Classical sets: Operations on classical sets, Properties of 5 Hrs
V & VI Sem B.E (EC): 2019– 20 52
SDMCET: Syllabus
classical sets, Mapping of classical sets to functions, Fuzzy
sets, fuzzy set operations, Properties of fuzzy sets, sets as
points in Hypercubes.
3. Classical relations and fuzzy relations: Cartesian product, 7 Hrs
Crisp relations, cardinality of crisp relations, operations on
crisp relations, properties of crisp relations, Compositions,
Fuzzy relations- cardinality of fuzzy relations, operations on
fuzzy relations, properties of fuzzy relations, Fuzzy
Cartesian product and composition, Non interactive fuzzy
sets, Tolerance and equivalence relations crisp equivalence
relation, crisp tolerance relation, fuzzy tolerance, Value
assignments- Cosine amplitude, Max-min Method, other
similarity methods.
4. Membership functions: Features of the membership 7 Hrs
function, Standards forms and boundaries, fuzzification,
Membership value assignments-intuition, inference, Rank
ordering, Angular fuzzy sets, Neural networks, Genetic
algorithms, Inductive reasoning.
5. Fuzzy to crisp conversions: Lambda-cuts for fuzzy sets, 4 Hrs
Lambda-cuts for fuzzy relations, Defuzzification methods,
Extension principle-crisp functions, Mapping and relations.
6. Classical logic and fuzzy logic: Classical predicate logic- 6 Hrs
tautologies, Contradictions, Equivalence, Exclusive OR and
Excusive NOR, Logical proofs, Deductive Inferences, Fuzzy
logic, Approximate reasoning, Fuzzy tautologies,
Contradictions, Equivalence and logical proofs, Other forms
of the implication operation, Other forms of the composition
operation.
7. Fuzzy rule based systems: Natural language, Linguistic 6 Hrs
hedges, Rule based systems, canonical rule forms,
Decomposition of compound rules, Likelihood and truth
qualification, Aggregation of fuzzy rules, Graphical
techniques of inference.
8. Fuzzy classification: Classification by equivalence relations- 7 Hrs
crisp relations, Fuzzy relations, cluster analysis, Cluster
validity, C-Means clustering-hard Means(HCM), Fuzzy C-
Means(FCM), Classification metric, Hardening the fuzzy C-
partition, Similarity relations from clustering.
9. Fuzzy Control Systems: Review of Control systems theory, 8 Hrs
simple fuzzy logic controllers, general fuzzy logic controllers,
special form of fuzzy logic control system models, examples
of fuzzy control system design, industrial application of fuzzy
V & VI Sem B.E (EC): 2019– 20 53
SDMCET: Syllabus
logic, control of blood pressure during anesthesia, fuzzy
logic application to image processing equipment, image
stabilization for camcoders, customer adaptive fuzzy control
of home heating system, adaptive fuzzy systems.
1. Simple examples may be given on the various concepts/algorithms for better
understanding of the subject.
2. Mini project on different domains of engineering may be considered.
Reference Books:
1. Timothy J. Ross, _ “Fuzzy logic with Engineering applications”, McGraw-Hill,
2011.
2. George J. Klir and Tina A. Folger. ”Fuzzy sets, Uncertainty and information”,
Prentice Hall of India, 2011.
3. B. Kosko. _ “Neural networks and fuzzy systems: A dynamical system
approach”, Pearson Education, 1996.
4. Kazao Tanaka, “An Introduction to fuzzy logic for practical applications”,
Springer-Verlag, New York, 2001.
ELECTIVE – IV
15UECE641 Data Structures Using C++ (4 - 0 - 0) 3
Contact Hours: 52
The course is aimed at introducing the students to the basics of data structures.
Basics of linked lists, stack, queues and trees etc are dealt with. An introductory
chapter on pointers revises the important concepts required to imbibe the
knowledge of data structures. Real life examples enhance the effectiveness of the
course.
CO-1 Apply various concepts of C++ like
Arrays, Strings, Structures, Unions,
1,2,13 3
Files, Pointers and Functions in
solving problems.
CO-2 Understand and Implement the
operational aspects of linked lists
1,2,3 12
(using pointers) like creation,
insertion, deletion and searching in
V & VI Sem B.E (EC): 2019– 20 54

SDMCET: Syllabus
problem solving.
CO-3 Realize and Implement the
operational aspects of stack in
1,2,3 12
problem solving using Arrays and
Pointers.
CO-4 Explain the operational aspects of
queue in problem solving using 1,2,3 12
Arrays and Pointers.
CO-5 EIaborate the operational aspects
of trees in problem solving using 1,2,3 12
Arrays and Pointers.
CO-6 Compare the operational aspects
of AVL trees & BST in problem 1,2,3 12
solving.
CO-7 Implement Hash concept in
1,2,3 12
problem solving.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
3 3 2.8 - - - - - - - - 2 3 -
Level
Prerequisites:
Knowledge of programming in C++
Course Contents:
1. Structure, unions and Pointer Revisit: Motivation for 08 Hrs.
using structures. Pointer, access data from memory
through pointer, pointer to structures. Motivation for
dynamic memory requirement. Realizing arrays using
pointer and dynamic memory allocation. Importance of
memory management during allocation and de-allocation
of memory.
2. Lists: Constructing dynamic data structures using self- 10 Hrs.
referential structure (using the same realized linked Lists),
operations on lists. Doubly Linked list. Application of Lists
in sorting.
3. Stack: Realization of stack and its operations using static 10 Hrs.
and dynamic structures. Application of stack in converting
an expression from infix to postfix and evaluating a postfix
expression. Heterogeneous stack using Unions.
4. Queues: Realization of queues (FIFO, Double-ended 08Hrs.

queue, Priority queue) and its operations using static and
dynamic data structures.
V & VI Sem B.E (EC): 2019– 20 55
SDMCET: Syllabus
5. Trees: Types of trees and their properties, Realization of 12 Hrs.
trees using static and dynamic data structures. Operations
on Binary trees and their application in searching (BST and
AVL Tree), Binary heap as priority queues.
6. Hash Table: Realizing effective hash table with proper 04 Hrs
data structure and hash function, its application.

Real-time examples of applications may be discussed.
Reference Books:
1. Aaron M. Tenenbaum, Yedidyah Langsam and Moche J. Augenstein, “Data
Structures using C & C ++” , Pearson Education/ PHI, 2006
2. E. Balagurusamy, “Programming in ANSI C”, 4/e, Tata McGrawHill
3. Behrouz A. Foruzan and Rechard F. Gilberg, “Computer Science A Structured
Programming Approach Using C”, 2/e, Thomson, 2003.
4. Robert Kruse and Bruce Leung, “Data structures and Program Design in C”,
Pearson Education, 2007.
5. D. Samantha, “ Classic Data Structures”, 2001, Eastern Economy edition, PHI
15UECE644 Digital Signal Compression (4-0-0) 3

Contact Hours: 52
Course Learning Objectives(CLOs):
The course focuses on basic concepts of Data Compression. It also focuses on
various techniques, as applicable to multimedia signals.
Description of the Outcome – Upon Mapping to POs (1-12) / PSOs (13,14)
completion of the course, the student will be
CO-1 Understand the importance of data 1

compression.
CO-2
Measure the performance of data 1
compression algorithms
CO-3
Distinguish the basic techniques 2 3
of lossless and lossy compression.
CO-4
Differentiate between lossless and 2
lossy data compression.
V & VI Sem B.E (EC): 2019– 20 56

SDMCET: Syllabus
CO-5
Select methods and techniques 2
appropriate for the task.
CO-6
Understand the most common file 1 14
formats for image and video.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping
2 2.67 2 - - - - - - - - - - 1
Level
Pre-requisite:
Probability, Information Theory
Course Contents:
1. Introduction: Compression Techniques-Lossless Compression, 02 Hrs.

Lossy Compression; Measures of Performance, Modeling and
Coding.
2. Huffman Coding: The Huffman Coding Algorithm, Adaptive Huffman 07 Hrs.
Coding, Golomb Codes, Rice Codes, Tunstall Codes, Applications of
Huffman Coding.
3. Arithmetic Coding: Introduction, Coding a Sequence, Generating a 07 Hrs.
Binary Code, Comparison of Huffman and Arithmetic Coding,
Adaptive Arithmetic Coding, Applications.
4. Dictionary Techniques: Introduction, Static Dictionary, Adaptive 07 Hrs.
Dictionary, Applications.
5. Context-Based Compression: Introduction, Prediction with Partial 07 Hrs.
Match (ppm), The Burrows-Wheeler Transform.
6. Lossless Image Compression: Introduction, CALIC, JPEG-LS, 07 Hrs.
Multiresolution Approaches, Facsimile Encoding.
7. Transform Coding: Introduction, The Transform, Karhunen-Loeve 07 Hrs.
Transform, Discrete Cosine Transform, Discrete Sine Transform,
Discrete Walsh-Hadamard Transform, Quantization and Coding of
Transform Coefficients, Application to Image Compression—JPEG,
Application to audio compression.
8. Video Compression: Introduction, Motion Compensation, Video 08 Hrs.
Signal Representation, ITU-T Recommendation H.261, H.263,
Asymmetric applications-MPEG1, MPEG2, MPEG4.

Simulation of various Data compression algorithms.
Reference Books:
1. Khalid Sayood, “Introduction to Data Compression”, 4th Edition, Morgan

Kauffman Publishers, 2012.
2. David Salomon, “Data Compression: The Complete Reference”, 4th Edition,
Springer, 2000
V & VI Sem B.E (EC): 2019– 20 57

SDMCET: Syllabus
3. N. Jayant and P. Noll, “Digital Coding of Waveforms: Principles and
Applications to Speech and Video”, Prentice Hall, 1984.
4. Ze-Nian Li and Mark S Drew, “Fundamentals of Multimedia", Pearson
Education, 2004.
15UECE645 Artificial Neural Networks (4-0-0) 3

Contact Hours: 52

The course focuses on the basic neural network architectures and learning algorithms.
Applications of these will be discussed.

Mapping to Pos (1-12) / PSOs
Description of the course outcome:
(13,14)
Upon the completion of the course, the
student will be able to
Explain the role of neural networks
in engineering, artificial intelligence
CO-1 1
and learn basic neural network
architecture.
Differentiate between networks for
CO-2 supervised and unsupervised 2
learning.
Design single and multi-layer feed-
CO-3 3
forward neural networks.
Develop and train radial-basis

CO-4 1
function networks.
Analyze the performance of neural

CO-5 2
networks.
Apply the known techniques to

CO-6 1 14
various optimization problems.
POs/PSOs 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Mapping Level 2.33 3 2 - - - - - - - - - - 1
Pre-requisites:
Algebra; Calculus.
V & VI Sem B.E (EC): 2019– 20 58

SDMCET: Syllabus
Course Contents:
1. Introduction: What is a Neural Network?, Human Brain, Models 06 Hrs.

of a Neuron, Neural Networks Viewed as Directed Graphs,
Feedback, Network Architectures, Knowledge Representation,
Artificial Intelligence and Neural Networks.
2. Learning Processes: Introduction, Error-Correction Learning, 10 Hrs.
Memory-Based Learning, Hebbian Learning, Competitive Learning,
Boltzmann Learning, Credit Assignment Problem, Learning with a
Teacher, Learning without a Teacher, Learning Tasks, Memory,
Adaptation, Statistical Nature of the Learning Process, Statistical
Learning Theory, Probably Approximately Correct Model of
Learning.
3. Single Layer Perceptrons: Introduction, Adaptive Filtering 07 Hrs.
Problem, Unconstrained Optimization Techniques, Linear Least-
Squares Filters, Least-Mean-Square Algorithm, Learning Curves,
Learning Rate Annealing Techniques, Perceptron, Perceptron
Convergence Theorem, Relation Between the Perceptron and
Bayes Classifier for a Gaussian Environment.
4. Multilayer Perceptrons: Introduction, Some Preliminaries, Back- 12 Hrs.
Propagation Algorithm, Summary of the Back-Propagation
Algorithm, XOR Problem, Heuristics for Making the Back-
Propagation Algorithm Perform Better, Output Representation and
Decision Rule, Computer Experiment, Feature Detection, Back-
Propagation and Differentiation, Hessian Matrix, Generalization,
Approximation of Functions, Cross-Validation, Network Pruning
Techniques, Virtues and Limitations of Back-Propagation Learning,
Accelerated Convergence of Back-Propagation Learning,
Supervised Learning Viewed as an Optimization Problem,
Convolutional Networks.
5. Radial-Basis Function Networks: Introduction, Cover’s Theorem 09 Hrs.
on the Separability of Patterns, Interpolation Problem, Supervised
Learning as an Ill-Posed Hypersurface Reconstruction Problem,
Regularization Theory, Regularization Networks, Generalized
Radial-Basis Function Networks, XOR Problem, Estimation of the
Regularization Parameter, Approximation Properties of RBF
Networks, Comparison of RBF Networks and Multilayer
Perceptrons, Kernel Regression and its Relation to RBF Networks,
Learning Strategies.
6. Principal Components Analysis: Introduction, Some Intuitive 08 Hrs.
Principles of Self-Organization, Principal Components Analysis,
Hebbian-Based Maximum Eigenfilter, Hebbian-Based Principal
V & VI Sem B.E (EC): 2019– 20 59
SDMCET: Syllabus
Components Analysis, Computer Experiment: Image Coding,
Adaptive Principal Components Analysis Using Lateral Inhibition,
Two Classes of PCA Algorithm, Batch and Adaptive Methods of
Computation, Kernel-Based Principal Components Analysis.
Reference Books:
1. Simon Haykin, “Neural Networks-A Comprehensive Foundation”,
Second Edition, Pearson Education, 2007.
2. B. Yegnanarayana, “Artificial Neural Networks”, Prentice Hall,
2006.
3. Laurene Fausett, “Fundamentals of Neural Networks-
Architectures, Algorithms and Applications”, Pearson Education,
2004.
4. Robert J. Schalkoff, “Artificial Neural Networks", McGraw-Hill,
1997.
5. S. N. Sivanandam, S. Sumathi, S. N. Deepa, “Introduction to
Neural Networks using MATLAB 6.0", McGraw-Hill, 2007
V & VI Sem B.E (EC): 2019– 20 60

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SDMCET: Syllabus

SHRI DHARMASTHALA MANJUNATHESHWARA COLLEGE OF

Ph: 0836-2447465 Fax: 0836-2464638 Web: www.sdmcet.ac.in

V & VI Sem B.E (EC): 2019– 20 1

SDM College of Engineering & Technology, Dharwad

It is certified that the scheme and syllabus for V & VI semester of UG

Principal Chairman BOS & HOD

V & VI Sem B.E (EC): 2019– 20 2

SDM College of Engineering & Technology, Dharwad-02

College – Vision and Mission

To develop competent professionals with human values

1. To have contextually relevant Curricula.

SDMCET- Quality Policy

SDMCET- Core Values

V & VI Sem B.E (EC): 2019– 20 3

Department - Vision and Mission

Fostering excellence in the field of Electronics & Communication Engineering,

Programme Educational Objectives (PEOs):

PEOs are broad statements that describe career and professional

V & VI Sem B.E (EC): 2019– 20 4

Programme Outcomes (POs):

2. Problem analysis: Identify, formulate, review research literature, and analyze

3. Design/development of solutions: Design solutions for complex engineering

4. Conduct investigations of complex problems: Use research-based knowledge

5. Modern tool usage: Create, select, and apply appropriate techniques,

6. The engineer and society: Apply reasoning informed by the contextual

7. Environment and sustainability: Understand the impact of the professional

8. Ethics: Apply ethical principles and commit to professional ethics and

9. Individual and team work: Function effectively as an individual, and as a

10. Communication: Communicate effectively on complex engineering activities

V & VI Sem B.E (EC): 2019– 20 5

11. Project management and finance: Demonstrate knowledge and

PROGRAM SPECIFIC OUTCOMES (PSOs)

V & VI Sem B.E (EC): 2019– 20 6

Scheme for V Semester B. E. (E&CE)

15UECC500 Information 4-0-0 4 50 100 03 - -

Total 24-0-4 24 400 600 100

V & VI Sem B.E (EC): 2019– 20 7

Scheme for VI-Semester B. E. (E&CE)

15UECE632 Cryptography & 4-0-0 3 100 03 -

15UECE641 Data structure using 4-0-0 3 100 03 -

V & VI Sem B.E (EC): 2019– 20 8

Course outcomes (COs):

2. Markov sources: Average information content of symbols in long 10 Hrs

Activity beyond Syllabus:

15UECC501 Digital Signal Processing (4-0-0) 4

Course Outcomes (COs):

1. Discrete Fourier Transforms (DFT): Introduction to Digital Signal 08 Hrs

Activity beyond Syllabus:

15UECC502 Digital Communication (4-0-0) 4

Activity beyond Syllabus:

15UECC503 CMOS VLSI Design (4-0-0) 4

Course Outcome (COs):

V & VI Sem B.E (EC): 2019– 20 14

V & VI Sem B.E (EC): 2019– 20 15

Activity Beyond Syllabus:

15UECL504 Microcontroller & VLSI Laboratory (0-0-2):1

Course Outcome (COs):

V & VI Sem B.E (EC): 2019– 20 16

15UECL505 Digital Signal Processing Laboratory (0-0-2):1

The laboratory course enables students to get practical experience in processing of

V & VI Sem B.E (EC): 2019– 20 17

V & VI Sem B.E (EC): 2019– 20 18