R19

<Subject Code>
COMPUTER ARCHITECTURE AND ORGANIZATION
Course Category: Professional Core Credits: 3
Course Type: Theory Lecture -Tutorial-Practice: 3-0-0
Prerequisites: STLD Continuous Evaluation: 40
Semester end Evaluation: 60
Total Marks: 100
COURSE OUTCOMES

Upon successful completion of the course, the student will be able to:

CO1 understand the architecture of modern computer.

CO2 explain the role of CPU in performing arithmetic and logical operations.

CO3 demonstrate the micro-operations and instructions of the target computer.

CO4 explain the concepts of memory mapping techniques in a computer.

CO5 demonstrate the interfacing of various I/O devices.

Contribution of Course Outcomes towards achievement of Program Outcomes (1 – Low, 2 - Medium, 3 – High)

PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO PSO

1 2 3 4 5 6 7 8 9 10 11 12 1 2 3

CO1 2 1 - - - - - - - - - - - - -

CO2 3 2 2 - - - - - - - - - 1 1 -

CO3 3 2 3 - - - - - - - - - - 2 -

CO4 3 2 2 1 - - - - - - - - - 1 -

CO5 3 3 3 1 - - - - - - - - 1 - -

COURSE CONTENT
UNIT – I
INTRODUCTION TO COMPUTER ORGANIZATION AND ARCHITECTURE
Structure and function, designing for performance, components of a computer system, computer
functions, Interconnection structures, Bus interconnection, Instruction set architecture design and
hardware/software interface. Instruction types, addressing modes, basic I/O operations and load/store
architectures. Instruction and Instruction sequencing, conditional branches, Logic instructions, Shift and
Rotate instructions with various examples.

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UNIT – II
CENTRAL PROCESSING UNIT
CPU structures and function, Arithmetic and Logic Unit, Instruction formats, Data transfer and
manipulation, CISC and RISC architectures. Organization of single- and multi-cycle RISC
microprocessors. Data path and control logic. Micro-programming. Modern multi-core (Multiprocessing)
architectures. Programming for multi-core architectures – Parallelism

UNIT – III
CONTROL UNIT
Control memory, Address sequencing, computer configuration, microinstructions, microprogram
sequencing, wide branch addressing, microinstructions with next-address field. Symbolic
microinstructions, symbolic microprogram, control unit operations, Design of control unit

TECHNIQUES FOR IMPROVING COMPUTER PERFORMANCE

Pipelining and interleaving, pipelining impact on the ISA and system architecture, speed up achieved
through pipelining, pipeline hazards and forwarding, interlocks, and branch delay slots. Parallel processing,
RISC pipeline, vector processing and array processing,Super scalar design

UNIT – IV
MEMORY SYSTEMS AND MANAGEMENT
Basic memory circuits, ROM, RAM, EEPROM, Flash Memory, Cache memory, memory hierarchies,
caches: organization, size, implementation and Improve memory performance with caches, mapping
functions, interleaving, replacement algorithm, write policy and no of caches. Secondary storage: Magnetic
Hard Disk, Optical Disks, Solid State Disks and Arrays, Redundant arrays of inexpensive disks
(RAID),Virtualization and sharing computers – Memory management, virtual memory, time sharing and
process management

UNIT – V
INPUT/OUTPUT ORGANIZATION AND MULTI PROCESSING SYSTEMS
Peripheral devices, I/O devices/modules –Access, interfaces, modes of transfer – programmed, interrupt
driven and DMA. Interrupt hardware – Enabling and disabling, handling multiple devices, I/O processors,
Data communication processor. Buses – Synchronous Bus, Asynchronous bus, Interface Circuits, Standard
I/O interface – PCI, USB etc., Multiprocessing systems – Multiprocessor and its characteristics,
interconnection structures for multiprocessors, inter processor communication and synchronization

TEXT BOOKS
[1] Computer Organization, Carl Hamacher, ZvonksVranesic, SafeaZaky, 5/e, McGraw Hill.
[2] Computer System Architecture, M.Morris Mano, 3/e, Pearson/PHI
[3] Computer Organization and Architecture – William Stallings, 6/e, Pearson/PHI
REFERENCE BOOKS
[1] Structured Computer Organization – Andrew S. Tanenbaum, 4/e, PHI/Pearson
[2] Fundamentals or Computer Organization and Design, - SivaraamaDandamudi Springer Int. Edition
[3] Computer Organization and Architecture-John P.Hayes, 5th edition, MC GrawHill
WEB-RESOURCES
1. https://www.tutorialspoint.com/videos/computer_organization/index.htm
2. http://nptel.iitm.ac.in/video.php?subjectId=106106092
3. https://www.reference.com/technology/computer-organization-36c3a064b20f9b33

Dr.M.Ramasubba Dr.Narasimha G.Ratna Raj Dr.V.Sailaja

Dr.N.Balaji
Reddy Sharma N V S (BoS Chairman)
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