ACS COLLEGE OF ENGINEERING

#207, Kambipura, Mysore road, Banglore-74

Department of Computer Science & Engineering

Computer Organization Question Bank

Module-1
1. Explain with neat diagram basic operational concept of computer.
2. What is performance measurement? Explain overall SPEC rating for computer in a program suite.
3. Draw single bus structure, discuss about memory mapping I/O.
4. What is addressing mode? Explain all addressing modes with example.
5. Explain BIG-ENDIAN and LITTLE-ENDIAN method of byte addressing with example.
6. Explain Basic instruction types with example
7. What are assembler directives? Explain the various directives with examples.
8. Explain various shift and rotate instruction with neat diagram
9. What is stack and queue? Write the line of code to implement the same.
10. What is subroutine? How to pass parameters to subroutines illustrate with an explain
11. How to encode assemble insruction into 32-0bit word? Explain with examples.

Module-2
1. What is a interrupt? With example illustrate concept of interrupt.
2. Define exception. Explain 2 kinds of exception.
3. With a neat diagram explain DMA controller.
4. Explain PCI bus.
5. List SCSI bus signal with their functionalities.
6. Explain tree structure of USB with split bus operation
7. With supporting diagram explain the following with respect to interrupts:
(i) Vectored interrupt
(ii) Interrupt nesting
(iii) Simultaneous request
(iv) Daisy-chain method
8. With a neat diagram, explain the centralized arbitration and distributed bus arbitration scheme.
9. With a neat timing diagram illustrate the asynchronous bus data transfer during an I/O operation. Use
handshake scheme.
10. Write a note on register in DMA interface.
11. With a block diagram explain how the printer interfaced to processor.

Module-3
1. Briefly explain all mapping functions used in cache memory.
Or
Define cache memory, explain various types with a neat diagram.
2. With a neat diagram explain the internal organization of memory chip(2M x 8 and dynamic memory chip).
3. Explain the following (i) Hit Rate (ii) miss penalty (iii) valid bit (iv) Dirty bit (v) stale data
4. Draw a diagram and explain the working of 26 Megabit DRAM chip configuration as 2M x 8
5. Describe organization of an 2M x 32 memory using512k x 8 memory chip.
6. Explain synchronous DRAMS with a block diagram.
7. Define ROM, explain various types of ROMS.

Module-4
1. Draw 4-bit carry-look ahead adder and explain.
2. Perform multiplication for -13 and +9 using Booth’s algorithm and bit pair multiplication. Explain the
Booth’s algorithm of multiplication.
3. Design 16-bit carry-look ahead adder using 4-bit adder. Also unite the expression for Ci+1.
4. Perform following operation on the 5-bits signed numbers using 2’s complement representation system.
Also indicate whether overflow has occurred. (i) (-9) + (-7) (ii) (+7) - (-8).
5. Perform division operation on the following unsigned numbers using the restoring and non-restoring
method. Dividend=(10101)2 divisor= (00100)2

Module-5
1. With a neat diagram explain single-bus organization of data-path inside a processor.
2. What are the actions required to execute a complete instruction ADD (R3), R1
3. Explain multi-bus(or three bus) organization of data-path with a neat diagram. Write control sequence for
the instruction ADD R4, R5, R6 for the multiple bus organization.
4. Explain with neat diagram, micro-programmed control method design of control unit and write the micro-
routine for the instruction Branch<0.
5. Explain Hard wired control unit organization in a processing unit.
6. Write control sequence for an unconditional branch instruction.
7. Define Pipelining. Explain different hazards in pipelining.