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STLD Tutorials
UNIT: I
UNIT: II
i)(A+B). (C+D).(A’+B+D)
ii)(AB+A’B’).(CD’+C’D)
i ) x’yz+x’yz’+xy’z’+xy’z ;
ii) x’yz+xy’z’+xyz+xyz’
2. a) obtain the complement of following expressions :
i)A’C’+ABC+AC’
ii)A’B(D’+C’D)+B(A+A’CD)
i) x’yz+xy’z’+xyz+xyz’
ii) x’z+x’y+xy’z+yz
iii) x’y’z’+x’yz’+xy’z’+xy’z+xyz’
3. a)Express the following functions in sum of min terms& product of max terms:
i) F(A,B,C,D)=B’D+A’D+BD;
ii)F(x,y,z)=(xy+z)(xz+y)
i) AB’C+A’BC+ABC
ii) A+B’C(A+B+C’)
4.
5.
UNIT: III
1.
2.
3.Design Full Adder and Full Subtractor using only NAND gates.
4.
5.
6.
7. a) Explain in detail about 4-Bit Magnitude comparator?
b) Design Priority Encoder?
8.
UNIT: IV
1.
F1(A,B,C) = ∑(3, 5, 6, 7)
F2(A,B,C) = ∑(0, 2, 4, 7)
Implement the circuit with a PLA having 3 inputs , four product terms and two
outputs.
F1(A,B,C,D) = ∑(1,9,12,15)
F1(A,B,C,D) = ∑(0,1,2,3,7,9,11)
F2(A,B,C,D) = ∑(0,1,2,3,10,12,14)
UNIT-V
1.Draw the circuit diagram for J-K-flip flop using S-R-flip flop with AND gates.
Explain its operation using truth table.
2.
Give the transition table for the following flip-flops.
i. R-S flip-flop
ii. J-K flip-flop
iii. T flip-flop
iv. D flip-flop
3.
(a) Explain the operation of R-S master slave flip-flop. Explain its truth table.
(b) Explain the operation of master slave J-K flip-flop with neat sketch.
4.
Convert the following Flip-Flops
(a) T-Flip-Flop to J-K Flip-Flop
(b) D-Flip-Flop to T Flip-Flop
(c) J-K Flip-Flop to T Flip-Flop
5.
6.
UNIT: VI