Module 3 – NAND and NOR Implementation

By

Prof. C. Prayline Rajabai

Assistant Professor

School of Electronics Engineering

VIT University

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 Digital Logic Gates

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Universal Gates - NAND and NOR Gates
• A universal gate is a gate which can implement any Boolean function without need to
use any other gate type.
• The NAND and NOR gates are universal gates
• Implementing the logic circuits using NAND and NOR gates are economical and easier
to fabricate and are the basic gates used in all IC digital logic families.
• Implementation of a Boolean function using NAND gates require the function to be in
SOP form.
• Implementation of a Boolean function using NOR gates require the function to be in
POS form.

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NAND Gate as a Universal Gate
Inverter Using only NAND Gate
i) All NAND input pins connect to the input signal A gives an output A’
ii) One NAND input pin is connected to the input signal A while all other input pins
are connected to logic 1. The output will be A’

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NAND Gate as a Universal Gate
AND Using only NAND Gate

OR Using only NAND Gate

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NOR Gate as a Universal Gate
Inverter Using only NOR Gate
i) All NOR input pins connected to the input signal A gives an output A’
ii) One NOR input pin is connected to the input signal A while all other input pins
are connected to logic 0. The output will be A’

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NOR Gate is a Universal Gate
AND Using only NOR Gate

OR Using only NOR Gate

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Gate Equivalence
A NAND Gate is equivalent to an inverted-input OR gate

An AND gate is equivalent to an inverted-input NOR gate

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Gate Equivalence
A NOR gate is equivalent to an inverted-input AND gate.

An OR gate is equivalent to an inverted-input NAND gate.

Two NOT gates in series are same as a buffer because they cancel each
other as A’’ = A

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Exercise
Implement the SOP function F = XZ + Y’Z + X’YZ using NAND gates only
Soln: Being an SOP expression, it is implemented in 2-levels as shown
below.

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Exercise
Implement the POS function F = F = (X+Z) (Y’+Z) (X’+Y+Z) using NOR
gates only
Soln: Being an POS expression, it is implemented in 2-levels as shown
below.

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Procedure for obtaining NAND only circuits
• Simplify the function and express it in SOP form

• First stage - Draw a NAND gate for each product term of the expression that has
at least 2 literals. The inputs to each NAND gate are the literals of the term.

• Second stage – Draw a single NAND gate(or invert OR). The first stage outputs
will be the inputs of the second stage NAND gate.

• Any term in the expression with single literal requires an inverter in the first
stage.

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Procedure for obtaining NOR only circuits
• Simplify the function and express it in POS form

• First stage - Draw a NOR gate for each sum term of the expression that has at least 2
literals. The inputs to each NOR gate are the literals of the term.

• Second stage – Draw a single NOR gate(or invert AND). The first stage outputs will be the
inputs of the second stage NOR gate.

• Any term in the expression with single literal requires an inverter in the first stage.

Note : OR-invert(NOR) = invert AND

AND – invert(NAND) = invert OR

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Exclusive-OR implementations

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 Thank you

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