ASSIGNMENT 1

Digital Electronics (17EC34)

3rd Sem B Date: 06-09-2018

1. Place the following equations into proper canonical form:

P=f(a, b, c) = ab' + ab' + bc
T= f(a, b, c) =(a + b')(b' + c).
A= f(x,y,z) = (x’ (y+z’) +z’)y
F(a,b,c,d) = ᴫM( 0,3,5,10,15)

2. Expand f1 = (a + b’c + ac’d) into minterms &

f2= a (b’ + c) (a’ + c + d) into maxterms.

3. Simplify f(a, b, c, d) = ∑ (1,2,4, 11, 13, 14, 15) + dc(0, 5, 7,8, 10) using Karnaugh map
technique. & Obtain a minimal SOP expression for the function & realize using NAND
gates.

4. Design a three-input, one output minimal two-level gate combinational circuit which
has an output equal to 1 when majority of its inputs are at logic 1 and has an output
equal to 0 when majority of its inputs are at logic 0.

5. Simplify the following function using K – map

y = f(a, b, c, d) = ∑ m(2,3,4,5,13,15) + ∑ d(8,9,10,11)
y = f(a,b,c,d) = ᴫM(0,4,5,7,8,9,1l,12,13,15)
y = f(a,b,c,d,e) = ∑m(0,2,8,10,16,18,24,26)

6. Two motors M2 and M1 are controlled by three sensors S3, S2 and S1. One motor M2
is to run any time all three sensors are on. The other motor is to run whenever sensors
(S2 or S1) but not both are on and S3 is off. For all sensor combinations where MJ is
on, M2 is to be off except when all the three sensors are off and then both motors must
remain off. Construct the truth table and write the Boolean output equation.

7. A conveyor system brings raw material in from three different sources. The three
sources converge into a single output conveyor. Sensors mounted adjacent to each
source conveyor indicates the presence of raw material. All four conveyors have
separate motors so they can be individually controlled (on/off). It is required to design
a on/off control system of motors to meet the following conditions: If sources has the
product, then sources 2 and 3 must be turned off; if source 1 is empty, then either source
2 or 3 or both can be turned on. In the event that no product is available from the three
sources, the output conveyor must be turned off. If no product is available, the
respective source conveyor must be turned off i) Determine the number of inputs and
outputs; ii) Construct the truth table that describes the system.

8. Simplify using Quine McCluskey tabulation algorithm and find out the number of
prime implicants. f(a, b, c, d) = ∑ (2,3,4,5, 13, 15) + d (8,9, 10, 11).
9. Minimize f (a, b, c, d) = ∑ (0, 6, 7, 8, 9, 13) + ∑dc(5, 15) using quine McCluskey
method.

10. Use a K-Map to simplify that following functions:

i) f(A, B, C, D) = (A + B + C’) (B’+ D’)(A’+ C) (B+ C)
ii) f(A,B,C,D)= π(1,2,4,5, 7,8,10,11,13,14)

11. For the Boolean function f(w, x, y, z) = ∑m (0, 1,3, 7,8, 12)+∑d (5, 10, 13, 14) .
i) Find the set of prime implicants and
ii) Obtain the minimal SOP expressions using QM method

12. Design a combinational circuit using two 74LS138 ICs and NAND gates that generates
a logic 1 output when a majority of four inputs are true (logic 1). (IC 74LS138: 3-to –
8 decoder).

13. Construct a scheme to obtain a 4-to-16 line decoder using 74138 (3-8 line decoder).

14. Implement the following function pair using 74138 decoder.

F1 (a,b,c) = ∑m(0, 1, 3, 4, 6)
F2 (a,b,c) = π M( 1,3,4)
15. Design 4 to 16 line decoder using 2 to 4 line decoder which has active low outputs
and active low enable input. Explain the operation.

Programme Co-ordinator