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Analysis of the Effects of Harmonics on a Digital Protective Relay Operation

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 INNOVATION FOR SECURE AND
EFFICIENT TRANSMISSION GRIDS
CIGRÉ Belgium Conference
21, rue d’Artois, F-75008 PARIS Crowne-Plaza – Le Palace
Brussels, Belgium | March 12 - 14, 2014
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Analysis of the Effects of Harmonics on a Digital Protective Relay Operation

JAKUB JEDRZEJCZAK, GEORGE J. ANDERS, PRZEMYSLAW SEKALSKI

Lodz University of Technology
Poland

SUMMARY

This paper examines the effects of harmonics on operation of a digital distance relay. Because of
the need to fully understand and control the device characteristics, a relay with under–impedance,
under-voltage, and over–current independent protections has been built. An impedance characteristic
can be changed to either an offset mho, or a quadrilateral characteristic. Moreover, this inexpensive
device can work immediately as well as with a specific time delay. It has been designed to measure
a transmission line resistance, reactance, impedance (magnitudes of the two input signal phasors),
phase lead between voltage and current, real, and reactive powers. All measurements performed by the
experimental relay are within maximum error of 2% at 50 Hz.
Furthermore, two protection techniques: the Discrete Fourier Transform and the utilization of
orthogonal current and voltage components with signal delay have been tested in EMTP/ATP.
A detailed description of the algorithm used in the device and its features is given. This includes
presentation of an analog conditioning circuit, phasor estimation technique and protection criteria. The
results of studies involving signals with harmonics supplied to the relay are presented and analyzed.

KEYWORDS

Digital protective relay, distance relay, phasor estimation, EMTP/ATP, higher harmonics.

jakub.jedrzejczak@mail.utoronto.ca
 I. INTRODUCTION
With variable and intermittent system operation, particularly caused by switching on and off
Distributed Generations (DGs), significant harmonics are produced having potentially considerable
impact on electrical equipment and power system performance. In addition, raw signals (current /
voltage) from the power system could be distorted with some harmonics after passing through current
(CT) or potential transformer (PT) or capacitor voltage transformer (CVT). As reported by Hydro One
(Ontario, Canada), harmonics included in the current signal (mainly 1st, 3rd, 5th, 7th) may impact the
performance of any type of current-related relay (overcurrent or differential element) and harmonics
included in the current as well as in the voltage signal (mainly 1st and 3rd) may impact the performance
of any type of voltage-related element (directional or distance relay). In the latter case, current from
the CT is additionally scaled by an auxiliary CT and a potential divider.
Increasing use of DGs results in bidirectional power flows, because the increasing number of wind
farms introduces new sources of fault currents. Such currents may cause CT saturation, CVT
transients, power swings etc., and affect the correct operation of a distance relay. Current transformers
play a crucial role in overcurrent protection. They supply measured current to the relays. Based on the
CT characteristics and current magnitude, a purely sinusoidal current in CT primary circuit may
produce a non-sinusoidal current in the secondary and thus relay tripping time may be changed.
Primary currents may also have harmonic contents. Moreover, a large amount of even and odd
harmonic components is observed in a transformer loading current when the CT is in saturation. This
phenomenon may result in severe current distortions supplied to the protective relays. Large CT
transient errors may delay the digital relay operation [1].
The need for analysis of the effects of signals generated by wind and solar power plants on
protection system operation has been a motivation to build the digital protective relay. Another
motivation was lack of information from the digital relay manufacturers on the exact nature of the
algorithms employed in the commercial devices as well as a need to control the relay characteristics,
which normally are not amenable to controlled changes.
The device has a number of important and unique features. The most significant are: (a) a very low
cost, (b) an easiness to change to either an offset mho, or a quadrilateral impedance characteristic.
With this relay, signals distorted by the presence of harmonics can be thoroughly examined with the
aim of discovering whether they may cause unintentional operation of the tripping circuit or failure to
respond when called upon to operate in the presence of a fault, or/and severe harmonic components
from DGs. Moreover, using EMTP/ATP, it is possible to investigate whether the relay operation is
delayed or accelerated during a fault which is accompanied by harmonic components.
The custom built relay will also help with an explicit differentiation between usual behavior of the
system and a failure state, as it is necessary to know the possible range of impedance variations in both
conditions. The fully operational device has been proposed to test the influence of harmonics on the
digital protective relay operation.
In order to develop software, a Windows based PC has been used. Its stereo sound card is able to
produce up to two arbitrary waveforms to stimulate the relay. This required a creation of the analog
front end conditioning stage. It is based on the approach described in [2], where the concept of a relay
is outlined. The impact of higher harmonic components on the signal magnitudes is limited since the
PC sound card output produces positive and negative voltages, with the maximum amplitude of 1.17
VRMS. Therefore, it is necessary to scale all generated signals. However, the resizing of distorted
waveforms introduces a very similar effect as in coupling capacitor voltage transformers (CCVT)
operation. A CCVT may not reproduce the primary voltage exactly and can cause significant error in
the distance relay measurement. This error grows as the change in the voltage from pre-fault to fault is
increased [3]. Sound cards are also equipped with coupling capacitors. Their negative side effects can
be reduced by proper adjustment of each harmonic component phase.
As stated above, the purpose of this article is to examine the effects of harmonic distortions on
a digital protective relay performance. Therefore, both signal magnitudes and THDs are variable.
Hence, the protection algorithm (the Discrete Fourier Transform) and the front end stage has been
tested in the presence of harmonics (from real DGs) which distort and increase peak values of phase
currents and high voltages, appropriately scaled to the device operating range.
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 A number of excellent works describe various protection techniques in electrical power systems [4]-
[6]. Electronic filter design methods are presented in [7]. These sources are very helpful in
understanding a general construction and functions of digital relays.
The true RMS value of fault current supplied to the relay may be as low as 1–2% of the expected
RMS secondary current due to the low-ratio CT saturation [8]. Such a small portion of the actual
current presented to a primary protective relay is still very large compared with the CT or relay ratings
and may provide its correct operation. However, the fault current can be so high that it prevents the CT
from passing the signal to the relay. The relay does not see enough proportional secondary current
during severe faults and fails to trip which results in loss of zone selectivity [8]. This case has been
investigated in the article as well.
Power system harmonics increase and decrease both operating currents and time [9]. The IEEE
PSRC Working Group Report [10] states that distortion factors of 10% - 20% usually cause problems
in digital relay operation. Moreover, in accordance with the IEC 61000-4-7 standard, high harmonic
distortion may cause relay mal-operation due to odd harmonics that would corrupt the measurement of
the fundamental. Hence, digital relays can send a signal for breaker operation without a fault situation.
The susceptibility of a directional distance relay to harmonic distortion is reported in [11].
Theoretical and experimental analyses proved that waveform distortion affects the performance of
protective relays [12].
Furthermore, it is necessary to obtain the RMS value of the fundamental frequency signal to
correctly measure distorted signals. For this purpose, the Fourier transform (a software filter) is
recommended to extract the fundamental from the waveform. The application of the Fourier technique
to distance relaying is considered in [13] and proves an accurate fault detection. As an example,
a digital multifunction protective relay with a dual microprocessor architecture equipped with the DFT
algorithm is described in [14]. Its frequency and power related functions are immune to harmonic
distortions. The algorithm showed high measurement accuracy over a wide range of frequency
changes in [15] as well. Therefore, the DFT algorithm can be a very useful tool in the power system
protection applications and the best solution is to construct, program and test the relay to fully
understand its behavior in a harmonic environment.

The paper is organized as follows. Section II introduces the main design features of the device with
details given in the Appendix with the emphasis on a low cost solution and the flexibility of
modification of its characteristics. Section III contains the results and discussion of the tests performed
to characterize the effects of harmonics on the performance of the device.

II. A LOW-COST DIGITAL RELAY

This section describes main features of the digital relay built for this project.
A. Signal Conditioning Circuit
Analog inputs of the relay connect the electronics with the secondary circuits of current and voltage
transformers, integrated with a protected object (e.g. transmission line). The relay is equipped with the
front end analog stage (variable gain and fixed offset circuit), which is responsible for converting the
input signals to voltages compatible with the analog–to–digital converter used by the AVR ATmega32
controller.
The front end stage is designed to fulfill three functions: (a) input signal DC level shifting (creation
of an offset) – no negative voltage input can be converted; the PC sound card output is capacitively
coupled with maximum amplitude of 3.31 Vp-p, (b) input signal scaling, (c) antialiasing filtering.
In addition, the circuit provides microprocessor galvanic isolation from alternating voltage
(a complete electrical isolation between control and controlled circuits).
B. Discrete Fourier Transform
The signal processing module carries out analog–to–digital conversions and measuring procedures
of the protection device. Quantized input samples are stored in the microcontroller memory as
numbers. The relay makes use of the Discrete Fourier Transform algorithm to process the stored

2
samples and extract fundamental frequency components that can be used to classify waveforms into
acceptable, or indicative of a fault. Therefore, it is possible to compute all physical quantities within
relay error range.
The custom built digital relay calculates an inductive or capacitive impedance (impedance phasor)
of a modeled transmission line. Specific transmission line impedance is a distance between a particular
protection and a fault point. Moreover, the device presents information about both resistance and
reactance of the line and on this basis estimates real and reactive powers within maximum error of
2% at 50 Hz.
The relay measures phase lead between voltage and current in real time.
Details of the module implementation procedure are given in the Appendix.

III. RELAY OPERATION / HARMONIC ANALYSIS

Fig. 1 MATLAB GUI application for relay operation tests

This section contains main features of the MATLAB GUI application, EMTP/ATP simulations and
distance relay tests.
A. Digital Relay Test Set
To stimulate the relay, two waveforms must be generated containing both the pre-fault and fault
data. In order to verify phasor calculations and tripping times, the MATLAB GUI application Digital
Relay Test Set (see Fig. 1) capable of using the PC sound card as a function generator has been
designed.
This program allows generation of sine waveforms on two channels with a full control of
fundamental amplitudes, harmonic components, frequency and phase lead on both channels. One
channel is to produce the relay voltage signal, with the other producing a voltage proportional to the
current signal, if an inductive impedance is to be generated. If a capacitive impedance is needed, the
two channels are to be reversed when connected to the digital protective relay. For the sake of
convenience, the application is equipped with an algorithm that uses the Fast Fourier Transform to
compute and illustrate spectrums of generated signals.
Testing of the digital protective device would not be possible without a function used to simulate
a switching of wind or solar power plants, which is often accompanied with deformations of the
signals. This feature by default generates fundamental components of periodic waveforms with
appropriately selected amplitudes and frequencies. After the time chosen by a number of periods

3
option, the application generates harmonic signals. Therefore, it is feasible to reproduce a transition
from a sinusoidal to a non-sinusoidal state during normal operation of a modeled system, which
enables dynamic measurements. An example of such situation is presented in the separate graph (see
Fig. 2), where a phase lead between voltage and current at 0.1 s and general nature of the signals are
both visible.

Fig. 2 Transition from a sinusoidal to a non-sinusoidal current waveform

without a fault condition in electric power system: current – solid line, voltage – dashed line

In real systems the ratios of appropriate voltages and currents represent the line impedance at which
a fault occurs. The calculated complex number can be compared with the total positive sequence of the
protected zone, and if smaller, trip output is produced. MATLAB, a mathematical package, has been
used to implement the under-impedance criterion (see Fig. 3), while design concepts were being
formulated.

Fig. 3 System characteristics - fundamental frequency signals: voltage – dashed line,

current– solid line, transmission line impedance – dotted line, trip contact output – dash-dotted line

Fig. 3 depicts the microprocessor-based relay operation during a fault in the electric power system.
The trip contact output is high when the measured line impedance at which a short circuit has occurred
is below the adjusted value (1.341 Ω at 106 ms). The device with implemented under-impedance
criterion can be applied for distance relaying of high voltage transmission lines since it has built-in
quadrilateral and mho characteristics. Due to various inaccuracies within instrumental transformers,
transducers, or fault arc resistance, a rectangular or circular fault region is a requirement for the digital
protective relay.

4
 Also, an over-current and under-voltage protection functions have been included. The digital relay
responds to a rise in current flowing through the protected element over a predetermined value or to
a voltage drop on the capacitor voltage transformer, respectively. The over-current relay can be
applied for phase or ground fault protection and under-voltage feature can be used to detect voltage
drop along the line.
B. EMTP/ATP Simulations
The examination of harmonics impact on the protective relay arithmetical operation has been
conducted. The purpose of this analysis was to test the algorithm of the digital protective relay, while
being stimulated by fault sinusoidal and non-sinusoidal signals.
Inadvertent operation of the tripping circuit or failure to respond when called upon to operate in the
presence of a fault is closely related to the algorithm of a particular relay. If a distance protection is
based on true RMS value [4] or is equipped with the Fourier transformation then it extracts
fundamental components of current and voltage waveforms regardless of the total harmonic distortion.
However, if the same relay has implemented algorithm other than DFT (e.g. the utilization of
orthogonal components), measurements performed in a harmonic environment may be erroneous.
In view of the above, a comparison of two popular techniques: the DFT and the utilization of
orthogonal current and voltage components with signal delay has been performed in EMTP/ATP.
Neither the CT nor the CVT has been simulated.
Figs. 4, 5 and 8, 9 demonstrate high voltage waveforms and fault currents. Figs 6, 7 and 10, 11
depict relay calculations and trip signals during a fault in harmonics-free environment and in the
presence of harmonic components (voltage THD equals 71.07%, current THD equals 20.20%),
respectively.
Voltage U [V] Current I [A] (transient state)
90 8000
U[kV] [A]
45 4000
0 0
-45 -4000
-90 -8000
0,19 0,21 0,23 0,25 0,27 t [s] 0,29 0,19 0,21 0,23 0,25 0,27 [s] 0,29
(file Z_Fourier_NO_Harmonics.pl4; x-var t) v:X0001A v:X0001B (file Z_Fourier_NO_Harmonics.pl4; x-var t) c:X0001A-X0002A
v:X0001C c:X0001B-X0002B c:X0001C-X0002C

Fig. 4 3-phase sinusoidal high voltage waveforms

Fig. 5 3-phase sinusoidal current waveforms
The utilization of orthogonal components: Impedance Measurement The Discrete Fourier Transform: Impedance Measurement
1500 1500
Z[ ] Z[ ]
1200 1200

900 900

600 600

300 300

0 0
0.195 0.199 0.203 0.207 0.211 t[s] 0.215 0.195 0.204 0.213 0.222 0.231 t[s] 0.240
(file Z_Harmonics.pl4; x-var t) m:ZA m:TRIPA m:ZB m:TRIPB (file Z_Fourier_NO_Harmonics.pl4; x-var t) m:ZA m:TRIPA m:ZB
m:ZC m:TRIPC m:TRIPB m:ZC m:TRIPC

Fig. 6 3-phase line impedances and tripping signals - the utilization of orthogonal components
Fig. 7 3-phase line impedances and tripping signals - the DFT

5
 Voltage U [V] Fault Current I[A]: Transient State
200 7000
U[kV] I[A]
150 5250
100 3500
50 1750

0 0
-50 -1750
-100 -3500
-150 -5250

-200 -7000
0.190 0.195 0.200 0.205 0.210 0.215 t[s] 0.220 0.19 0.21 0.23 0.25 0.27 t[s] 0.29
(file Z_Harmonics_ORTO_Distortion_1st.pl4; x-var t) v:X0001A (file Z_Harmonics_ORTO_Distortion_1st.pl4; x-var t) c:X0001A-X0002A
v:X0001B v:X0001C c:X0001B-X0002B c:X0001C-X0002C
Fig. 8 3-phase non-sinusoidal high voltage waveforms
Fig. 9 3-phase non-sinusoidal current waveforms
The utilization of orthogonal components: Impedance Measurement The Discrete Fourier Transform: Impedance Measurement
2500 1500
Z[ ] Z[ ]
2000 1200

1500 900

1000 600

500 300

0 0
0.195 0.198 0.201 0.204 0.207 t[s] 0.210 0.195 0.204 0.213 0.222 0.231 t[s] 0.240
(file Z_Harmonics_ORTO_Distortion_1st.pl4; x-var t) m:ZA m:TRIPA (file Z_Harmonics_ORTO_Distortion_1st.pl4; x-var t) m:ZA m:TRIPA
m:ZB m:TRIPB m:ZC m:TRIPC m:ZB m:TRIPB m:ZC m:TRIPC
Fig. 10 3-phase line impedances and tripping signals - the utilization of orthogonal components
Fig. 11 3-phase line impedances and tripping signals - the DFT

To conclude, a significant presence of harmonic distortion does not interfere with the measurements
performed by the DFT algorithm. Hence, the Fourier transform is resistant to harmonics in contrast to
the utilization of the orthogonal current and voltage components with signal delay (5 ms). The digital
relay with the DFT, stimulated by sinusoidal and distorted fault waveforms operated correctly within
30 ms in both cases. The relay based on orthogonal components tripped differently for each phase and
harmonic content. In non-harmonic environment the protection tripped within the following times:
15.77 ms, 12.10 ms, 8.75 ms to isolate faults on phases: A, B, C, respectively. In harmonic polluted
environment the relay tripping times were the following: 6.51 ms, 12.56 ms, 9.30 ms. Therefore,
9.26 ms acceleration of the protection operation was noticed on phase A and a tripping delay of
0.46 ms and 0.55 ms was reported on phase B and C, respectively.
C. Digital Distance Relay Tests
The DFT algorithm from EMTP/ATP simulations has been implemented in the custom built digital
distance relay. All waveforms / Fourier spectrums were collected using Tektronix DPO 3034 300
MHz 2.5 GS/s oscilloscope and Fluke 225C 200 MHz 2.5 GS/s scopemeter with FlukeView software.
To demonstrate the correct operation of the device, measurements of non-distorted currents and
voltages have been made. By setting a non–harmonic signal on a current channel whose amplitude is
620 mV, while voltage channel is 980 mV, it is possible to compute impedance amplitude of 1.58 Ω.
The computed value of the line impedance is 1.61 Ω. Reversing the channels results in the theoretical
value of 0.63 Ω, and calculated value of 0.62 Ω. The generated impedance phase lead is 90⁰, while the
measured value is 89.91⁰ (-270.65⁰) – inductive character, -90.23⁰ (270.61⁰) – capacitive character.
In order to perform dynamic measurements, such as tripping time, MATLAB and its Data
Acquisition Toolbox has been used. The PC sound card generated 0.5 s pre-fault and 0.5 s fault data.
The relay closed the trip contact within 1.12 cycle, which corresponds to 22.4 ms (see Fig. 12). The
few–cycle relay reaction time indicated correct operation. The digital protective relay has been tested
in order to determine the range of possible tripping times. It has been noted that the relay responds to

6
a disturbance when stimulated by 50 Hz sine-waveforms, within 20.4 to 30.0 ms. One should bear in
mind that the analog filter phase response introduces delay of the fundamental frequency (50 Hz),
107⁰, which corresponds to a time delay equal to 5.94 ms. This value must be added to each
measurement of a tripping time.

Fig. 12 (1) Trip contact output, (2) pre-fault and fault current waveform

Reference measurement, at which the protection tripped correctly within 22.4 ms, was performed
with a voltage of 1.1 V and current of 440 mV, supplied to the relay. The device measured the
impedance equal to 2.5 Ω within 1% error. The reference measurement of sinusoidal waveforms
determines the proper operation of the digital distance relay. The impedance reach is set to 2 Ω. Each
change in the measurement, caused by harmonic distortions, may result in an inadvertent- or mal-
operation of the distance relay.
Moreover, harmonic components which are the subject of the following analysis come from real
electric power systems. In each case voltage THD is constant: 4.8% (1st and 3rd harmonics) and
changes line impedance values. Current waveforms are characterized by the increasing number of
harmonic components. It has been assumed that harmonics appear due to bidirectional power flows
from DGs. Moreover, the CT saturation may add both odd and even harmonics to the secondary
current supplied to the relay and such case has also been investigated.
The analysis results are presented in the following figures. It can be seen that higher harmonic
components decrease current amplitudes. This is due to the PC sound card generation range and signal
scaling performed by the Digital Relay Test Set (see Section III A). However, signal scaling does not
interfere with the nature of the tests. The difference compared to distorted signals present in real
systems is a decrease rather than increase in signal magnitudes. Hence due to the fixed amplitude
range, it is impossible to test the relay during fault conditions using PC, yet harmonic filtration test is
still feasible.

Fig. 13 Relay input signals: (1) voltage, (2) current

Fig. 14 Relay conditioned signals: (1) voltage, (2) current

It can be observed in Figs. 13 and 14 that higher harmonics result in noticeable current waveform
distortions which are considerably decreased by the analog front end circuit. The fundamental

7
amplitude of input voltage is 1.65 V and input current is 1.08 A (the theoretical impedance
ZT = 1.53 Ω). Spectrums of the relay input and conditioned current are illustrated in Figs. 15 and 16.

Fig. 15 Spectrum of the relay input current (THD = 46.35%)

Fig. 16 Spectrum of the relay conditioned current (THD = 3.86%)

It can be inferred from Fig. 15 and 16 that the third (7.3%) and fifth (45.7%) harmonic components,
present in the input current with THD equal to 46.35%, are properly filtered out by the three pole low
pass Butterworth antialiasing filter to 3.86%. The line impedance is scaled by the front end analog
circuit to ZF-E = 1.56 Ω (see Fig. 14). Hence, the DFT error is 0.64% (Zmag = 1.57 Ω).
For further examination of the computational error, greater harmonic components have been added
to the sinusoidal current waveform (see Figs. 17 and 18). The power signal harmonic analysis is
shown in Figs. 19 - 20.

Fig. 17 Relay input signals: (1) voltage, (2) current

Fig. 18 Relay conditioned signals: (1) voltage, (2) current

Fig. 19 Spectrum of the relay input current (THD = 70.91%)

Fig. 20 Spectrum of the relay conditioned current (THD = 5.80%)

It can be inferred from Fig. 17 to 20 that the third (58.1%) and fifth (40.7%) harmonic components,
present in the input signal with THD equal to 70.91% are properly filtered out to 5.80%. The input
voltage fundamental amplitude is 1.65 V and current is 1.16 A (the theoretical impedance
ZT = 1.43 Ω), (see Fig. 17). The line impedance is scaled by the front end analog stage to ZF-E = 1.53 Ω
(see Fig. 18). Hence, the DFT error is 0% (Zmag = 1.53 Ω). It has been concluded that such distortions

8
do not affect the relay measurements.
Finally, a highly distorted current, with both even and odd harmonic components, has been
generated (see Figs. 14 to 17). Such high fault currents may occur only for absolute extreme cases of
low-ratio saturated CTs [8].

Fig. 21 Relay input signals: (1) voltage, (2) current

Fig. 22 Relay conditioned signals: (1) voltage, (2) current

Fig. 23 Spectrum of the relay input current (THD = 159.31%)

Fig. 24 Spectrum of the relay conditioned current (THD = 18.60%)

When the digital protective relay is being energized by a signal with the odd and even harmonics
shown in Fig. 23, the front end analog circuit filters out higher order harmonic components to 18.30%
(2nd) and 2.90% (3rd) – THD is equal to 18.60% (see Fig. 24). The input voltage fundamental
amplitude is 1.65 V and current is 0.45 A (the theoretical impedance ZT = 3.67 Ω), (see Fig. 21). The
line impedance is scaled by the front end analog stage to ZF-E = 4.85 Ω, (see Fig. 22). Taking this into
account, the DFT calculation error is 0.21% (Zmag = 4.84 Ω).
In view of the above discussion, the appearance of harmonics in periodic signals do not cause the
DFT miscalculation. However, a false trip may occur, if the resulting relay calculation is of a lesser or
greater value than actual apparent impedance to the fault and may result in distance element under
reach or overreach, respectively.

Fig. 25 (1) Trip contact output, (2) pre-fault and fault current waveform

Fig. 25 depicts the delayed reaction of the digital protective relay (54.4 ms), when stimulated by

9
distorted signals with the higher order harmonic components (voltage 0.30 V THD equals 266.78%
and current 0.35 V THD equals 324.73%). Voltage phase is 90⁰ and current phase is 115⁰. Effective
THD of the input voltage and current, decreased by the analog front end circuit is 22.47% and 21.73%,
respectively.
Furthermore, the delayed reaction has also been observed for non-harmonic voltage and distorted
current. The delay is the consequence of the phase lead between harmonic voltage and current at the
fault inception. A typical transient response of the filtering stage during a transient state, marked by
“A cursor”, can be seen in Fig. 25. Such a response is caused by the analog three pole low pass
Butterworth filter which extracts higher harmonic components. Phase lead translates into the operating
times of the relay, due to the fact that the DFT algorithm computes signal phasors in both transient and
steady state. As a consequence, the relay cannot trip immediately. The delayed operation of a primary
distance relay may result in lack of protection selectivity. Additionally, a secondary, faster relay may
trip falsely and put additional components as well as the faulted one out of service.

IV. CONCLUSIONS
Since the presence of significant distortions of the signals picked up by the protective relays is now
a fact of life, this paper examined the effects of harmonics on the operation of a digital distance relay.
An inexpensive but fully functional digital protective relay has been designed, built and tested. The
necessary phasor estimation technique has been introduced and MATLAB software, essential for the
device examination, has been developed.
An important conclusion from the studies reported in this paper is that the Discrete Fourier
Transform is resistant to high harmonic components. However, it does not mean that a custom built
relay which principle of operation is based on the DFT technique is resistant to harmonics as well.
Higher order harmonic components affect magnitudes of currents and voltages which may result in
relay under-reach or over-reach. Consequently, a particular relay may trip inadvertently or may not
trip in the presence of a fault.
EMTP/ATP simulations have proved that a relay (without a software filter) utilizing orthogonal
components is vulnerable to harmonics. Its tripping times vary depending on a protected phase of
a transmission line and current/voltage THDs. Moreover, simulations have shown that the DFT
algorithm is characterized by a fixed tripping time.
The real-time analysis has confirmed simulation results. Furthermore, it has revealed that both
phase shift and significant appearance of odd and even higher harmonics in periodic signals causes
a delayed reaction of the relay with the DFT algorithm. The delay is caused by the front end analog
conditioning circuit and increases in proportion to the 2nd and 3rd harmonic. It has been shown that
distortion factor of 18.6% causes trip delay.
Finally, the digital relay operates slightly differently for each variation of the THD value. Different
settings of protection characteristics may result in its different performance as well.
The results presented in this article are preliminary and they provide a basis for further research
using Real Time Digital Simulator.

V. ACKNOWLEDGEMENTS
The authors would like to acknowledge support and encouragement from Mr. Larry Lee of Hydro
One transmission company in Ontario.

APPENDIX – DESIGN FEATURES OF THE CUSTOM DIGITAL RELAY

This section describes in more detail the structure and the functionality of the custom digital relay.
A. Signal Conditioning Circuit
Fig. 26 depicts an analog circuit block diagram which consists of a variable gain, fixed offset and
antialiasing filtering stage.

10
 Fig. 26 Analog signal conditioning block diagram
The inverting quad operational amplifier TL084 is applied to implement two electric circuits for
both input signals. Zener diode guarantees 4.7 V of the reference voltage in order to shift an input
signal level [2].
Since the amplification of signals is likely to change, it can be stated that driver tracks and controls
variable gain, which provides added flexibility. By using a CMOS switch, two voltage gains Av can be
selected, depending on the voltage generated by the microcontroller Vμc [2]:
𝐴𝑣 = 1,55, 𝑖𝑓 𝑉𝜇𝑐 = 0 𝑉
𝐴𝑣 = 0,155, 𝑖𝑓 𝑉𝜇𝑐 = 5 𝑉

Fig. 27 Signal conditioning circuit simulation: V(R1:1) – input voltage,

V(V5:+) – step function, V(R14:1) – output voltage (in 0 V÷5 V range)
Simulations in Fig. 27 and Fig. 28 present the analog conditioning circuit performance. The variable
gain feature can be software controlled. A maximum voltage value of the processed signals is 60 V.
When the variable gain is used, a voltage may reach 85 V.

Fig. 28 Signal conditioning circuit simulation: V(R1:1) – input voltage amplitude of 85 V,

V(V5:+) – step function, V(R14:1) – output voltage (in 0 V÷5 V range)

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 For filtering out the higher order harmonics, a Sallen – Key configuration of a three pole low pass
Butterworth antialiasing filter has been designed. It has been optimized in respect of the best slope
steepness in the range of the cutoff frequency. The filter has been prepared to have as flat frequency as
possible in the pass band in order to correctly process input signals and transform their spectrums.
Consequently, it provides safety to electromagnetic interference and suppresses frequencies above the
signal cutoff frequency (50 Hz).
Next, voltages and currents are being sampled and quantized by the analog–to–digital converter to
a discrete–time and discrete–amplitude signals.
The Butterworth low pass filter is designed with a gain of -1.5 dB at 50 Hz and a pass band of 60
Hz. The filter gain is -55 dB at the Nyquist frequency of the A/D stage, 500 Hz. Fig. 29 shows a Bode
magnitude plot, expressing the magnitude of the frequency response gain, and a Bode phase plot,
expressing the frequency response phase shift.

Fig. 29 Butterworth filter frequency response: attenuation and phase

A real–time operation of the front end analog conditioning circuit is shown in Fig. 30 and 31.

Fig. 30 Relay input signals: (1) voltage, (2) current

Fig. 31 Relay conditioned signals: (1) voltage, (2) current

Fig. 32 Digital protective relay for modeling of faults in power system

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The device itself is presented in Fig. 32.
B. Discrete Fourier Transform
The real and imaginary parts of a signal phasor are given by the following equations:

𝑁−1
2 2𝜋𝑘𝑛
𝑅𝑒{𝑉} = ∑ 𝑣𝑛 cos ( ) (1)
𝑁 𝑁
𝑛=0
𝑁−1
2 2𝜋𝑘𝑛
𝐼𝑚{𝑉} = − ∑ 𝑣𝑛 sin ( ) (2)
𝑁 𝑁
𝑛=0

where:
vn – sample data,
N – the number of samples in a data window,
n – the nth sample in a data window,
k – frequency index.

The magnitude and phase of a signal phasor are:

|𝑉| = √𝑅𝑒 2 (𝑉) + 𝐼𝑚2 (𝑉) (3)

𝐼𝑚(𝑉)
∠𝑉 = 𝑎𝑟𝑐𝑡𝑔 ( ) (4)
𝑅𝑒(𝑉)
where:
|V| – modulus of a signal phasor,
∠V – a signal phasor angle.

The Fourier’s coefficients determination of the sinusoidal functions enables computing amplitude
and phase of the two input signal phasors. The phasor angle is calculated in all four quadrants.
Therefore, it is easy to define, in real time, the impedance vector which characterizes a condition of
the electric power system. The relay quickly collects information about both current and voltage
phasors so that it is possible to examine precisely the state and dynamics of the system.
C. Additional Features
The digital relay, by means of a multi-master serial single-ended computer bus I2C, communicates
with the external real-time clock (an integrated circuit DS1678+) and records each tripping time in
case of a fault.
Essential announcements and measured magnitudes are presented on a liquid crystal display and are
sent simultaneously to the operator’s console or a superior system via RS–232 standard. A MAX232
integrated circuit is used to convert TTL level serial signals to the RS–232 standard and to support
a Human Machine Interface link.

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