ECE XXXX ANALOG IC DESIGN L T P J C

3 0 2 0 4
Prerequisite: None

Objectives:
 To design analog IC components and building blocks in CMOS technology.
 To understand the relationships between devices, circuits and systems.
 Emphasize the design of practical amplifiers, small systems and their design parameter
trade-offs.

Expected Outcome:
 An ability to analyze bias circuit using CMOS current mirror.
 An ability to design feedback and differential operational amplifier.
 An ability to analyze stability of operational amplifier.
 An ability to apply frequency compensation techniques for Amplifiers.
 An ability to analyze basic operation of PLL.

Student Learning Outcomes (SLO): 1,2,5,9,14,17

Module:1 Current source and Amplifier design: 8 Hours SLO:

1,2,5.9,14
MOS Small Signal models - MOS Current Sources and Sinks - Current Mirror: Basic Current
Mirrors - Cascode current Mirrors. Bandgap references. Single stage IC Amplifiers: Basic
concepts - Common source stage - Common gate stage - Cascode stage. Differential stage: Single
ended and differential operation - Basic Differential Pair.

Module:2 Frequency response and Noise analysis of 8 Hours SLO:

Amplifiers: 1,2,5,9,14

Miller effect - Frequency response of Common source stage - Common gate stage - Cascode stage
and Differential pair. Noise in Amplifiers: Common source stage - Common gate stage - Cascode
stage - Differential pair. Noise Bandwidth.

Module:3 Feedback Amplifiers: 7 Hours SLO:

1,2,5,9,14
Ideal feedback equation - Gain sensitivity - Effect of Negative Feedback on Distortion - Types of
Feedback Amplifiers. Feedback configurations: voltage-voltage – current voltage – current current
- voltage current feedback. Practical configurations and Effect of loading - Return Ratio Analysis.

Module:4 Operational Amplifier 8 Hours SLO:

1,2,5,9,14
Common mode Feedback circuits - Op Amp CMRR requirements - Need for single and
multistage amplifiers - Effect of loading in differential stage. Performance Analysis: DC gain -
frequency response – noise – mismatch - slew rate of cascode and two stage Op Amps - Fully
Differential Op Amps - Common-Mode feedback loop stability.

Module:5 Stability analysis 4 Hours SLO:

1,2,5,9,14
Basic Concepts - Instability and the Nyquist Criterion - Stability Study for a Frequency-
Selective Feedback Network - Effect of Pole Locations on Stability

Module:6 Frequency compensation 3 Hours SLO:

1,2,5,9,14
Frequency Compensation: Concepts and Techniques for Frequency Compensation – Dominant
pole - Miller Compensation - Compensation of Miller RHP Zero - Nested Miller - Compensation
of two stage OP Amps.

Module:7 Phase Locked Loops 4 Hours SLO:

1,2,5,9,14
Problem of Lock acquisition - Phase Detector - Basic PLL and its dynamics - Charge-pump PLL -
Non-ideal effects in PLL: PFD/CL non idealities – Jitter- Delay Locked Loop - Applications.

Module:8 Contemporary Topics: 3 Hours SLO:

1,2,5,9,14
Data converters - Δ-∑ converters - Switched Capacitor Circuits.

Total Lecture: 45 Hours

# Mode: Flipped Class Room, [Any one of Lecture to be videotaped], Use of physical and
computer models to lecture, Min of 2 lectures by industry experts

Text Books:
1. Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Second Edition, McGraw-
Hill, 2008.
2. Gray, Hurst, Lewis, and Meyer: “Analysis and design of Analog Integrated Circuits”, Fifth
Edition, John Wiley & Sons, 2009.

Reference Books:
1. Phillip E. Allen and Douglas R. Holberg, “CMOS Analog Circuit Design”, Third Edition,
Oxford University Press, 2013.
2. David Johns and Ken Martin, “Analog Integrated Circuit Design”, Second Edition, John
Wiley & Sons Inc., 2012

Typical Experiments SLO:

1,2,5,9,14,17
 Study of DC and small signal models of a MOS Transistor.
 Design of MOS current sources and mirrors.
 Design of single stage amplifiers (CS, CG and CD).
 Design of a MOS Differential amplifier with an active load.
 Design of a cascode amplifier with current mirror.
 Post-layout simulation of MOS current mirrors.
 Post-layout simulation of single stage amplifiers.
 Post-layout simulation of Differential amplifiers.
 Analysis and design of a 2-stage CMOS Op-Amp.
 Design of a 2-stage CMOS Comparator.
 Design and simulation of a CMOS Voltage Controlled Oscillator (VCO).
 Design of a CMOS Operational Trans-conductance Amplifier (OTA).