Professional Documents
Culture Documents
Analog & Digital Electronics Jan 2018 (2015 Scheme)
Analog & Digital Electronics Jan 2018 (2015 Scheme)
com
(~
08J .
~~CS32
USN o'fJ
Q
~d Semester B.E. Degree Examination, Dec.2017/Jall',zo 8
" ;~,.Av nal09 and Digital Electronics (ADI;)i~
\\':> r.
\.)~r 1___
(On"
~~~)
m
Time:' 3 hrs. ~~> ~\~~/ ~
"',,\ ax, Marks: 80
Note: Answer 6~E full question, choosing one fuD questio j\=q each module .
. v7/.(;;;> <'~ -'/
. ~(., Module-l
co
_0-:.-.:) .
1 a. Ex.plain the oper (~~nd :haracteristic.s ofN-channel JFE~T (08 Marks) (S;V.
b. With block diagram, ~)"p1~mthe operation ofa Astable m lV& tor usmg IC 555.
\ "C/J ,. ( (08 Marks)
g.
-<0~ ~'
<' (\ ,)
\..\ ""',.,..,.-:-.." . ((::::-
\\........
<,
\"( /~, , "'" <;» )
OR !'-' U
2 · h ci . di I :-:.:..\~ . f R~ ~ '11
W. It Circuit iagrarn, ~x~ am tfl~ oyera~lon o. a \ Cia a Ion OSCI,ator.
lo
a. (~6Mar~)
b. Fig. Q2(b), shows a Biasing co~fj'gl!!:atlon usmg(})~OSFET given that the saturation dram
current is 8mA and the pinch 0~1~~~ is -~\}_\
(/v.-;
/'tj ')('~~;'-...,
C v'l> ::d 9·~
ib V'O''> D·'t~
y
ik
~
<C~,
\"VI"
'~V ~)
w
,J ~~
~ <, <.,:../" ---)
,.,~JJ
(1/-;
~ (~~ c-
ia
<, -- ~/ •...
.,~Ul
Fig. Q2(b) ,-:;/'._
Determine the value o,(rilite1iource voltage drain current of:.t1ra:i~ource voltage. (06 Marks)
'~ .•.,;... ~)
c. Write the advantages of-J~SFET over JFET. '\::,---;/::'\ (04 Marks)
ed
/':) I"/J,
((
r,,~:/)
,"':' I V/,
'-' »
3 a. Give the si~
\;
r-:-:. <" '-J
Module-2 " .1'--'0)
)ogic circuit for following logic equation whereQ -r~sents don't care
«> ~
«:?/.,
.p
E 4
o a1--~'Vhai are Hazards? Explain the types of Hazards and it covers. (~}S)
Z
C
b";'---f:.)iscussBriefly an HDL Implementation models. (~~'rks)
~
w
lof2
.,/
£-~},
~\' CS32
\.)1 ~i
r '"'
/\ I'; ~/
(' /~/'\,\ '''- - Z,"
}~
I,/' /' " ,,~
\ \./,/,> . i"-,'
'-.--" . . Module-3 ' ~/'<':::)
5 a. Wh~\lltiplexer? Design a 32:1 multiplexer using 16:1 MUX and o~,~tmultiplexer,
\~) , i.,::;<:~~. (05 Marks)
b. Show l1OYVlus~ga 3 to 8 Decoder and multi input OR Gates follow~{~,~olean Expressions
m
can be rd('l~~~ultaneously. (6\-:,,'--' (06 Marks)
F(A, B, C) dv~»_~O,4, 6) , '-~(,' ;
F(A, B, C) = 2#-W?'
3, 7) J;'~:~ ,.
co
F(A, B, C) = ~)1~~f,5~ (~'\
c. Show how two 1'ttrJ 6 9fMUX can be connected to get 1 ~DEMUX. (05 Marks)
///\\ ·':'...
.J\v.'
<.(" }) \'\ \/
'.• _// -" I...... ",
"-=_/,/'< -: \ ;,,..," v
r ("\,'). .__
" ,./
g.
'\''\ ';/:: OR ! <, " t
lo
c. What is PLA? Design seven sew~ Display usijig,l>,LA. (06 Marks)
~ -,
(:~~hnl:~'O~'
7 a.
b.
Explain 4 bit serial in parallel out re~T.~>·,) (04 Marks)
Explain a 3 bit binary Ripple up counter~(Give the block diagram, truth table and output
waveforms. !'-::::::-,'> \'-:> (06 Marks) ib
ik
c. Explain the working of JK master S:l<Ni-fhp,):-,U5'p along with implementation using NAND
Gates. "' < .;,;::;' (06 Marks) t'~ ! "
'l
1'"/ .. /1
c:~::./
~')j
Module-5 --. '/
'/''\''
9 a. Expla~ 5 ?it ~~iYe divider with ?iagr~m.. . . '- «,-j (06 Marks)
b. Expla~n wrt~o~~~1ilagram the working principle of Digital clock. \\.:.i (05 Marks)
Explam ths::, ~1'S' Accuracy and Resolution for D/A converter. (:(V.,
.p
c. (05 Marks)
/}-:v-..\-'
s /):-:
~"----, r~'!\
'II
,(/!r-,
. '-'"'" ,> \'"
</ OR <",
w
<, r
20f2