EEEB 2044 / EEEB373 Microprocessor Systems

Semester 2 2019 / 2020

Name: Solution
Student ID:
Section: 3A / 3B
A
Quiz 2 (6 November 2019) – 20 marks (CO2)

This is a closed book quiz. You can use calculator for this quiz. There are four questions for this quiz.
You have 15 minutes for the quiz.

1) Explain the main difference between the following:

a. Microprocessor and microcontroller [2 marks]
A microprocessor is a processor packaged in a single integrated circuit, often requires
external memory, glue logic and peripheral and interface chips to operate. On the other
hand, a microcontroller is a computer implemented on a single Very Large Scale
Integration (VLSI) chip, which includes the microprocessor, and peripheral
components such as memory, timers, analog-to-digital converter, etc

b. von Neumann and Harvard computer architecture [2 marks]

The von Neumann Architecture uses only one memory block, and the memory holds
both the data and program. On the other hand, the Harvard Architecture uses two
memory blocks, one each for the data and program.

c. EPROM and Flash memory [2 marks]

Erasable Programmable Read-Only Memory (EPROM) can be electrically
programmable many times and erasable in bulk by subjecting it to strong ultraviolet
light. On the other hand, the flash memory can be both erasable and reprogrammable
many times electrically, but the erasure is by block or the entire chip at a time.

2) Answer the following short questions about the hardware architecture of the PIC18 MCUs:
a. What is the size of data bus of the PIC18 MCUs? [0.5 marks]

8 bits or 1 byte

b. What is the length (number of bits) of most instructions in PIC18? [0.5 marks]

16 bits or 2 bytes
EEEB 2044 / EEEB373 Microprocessor Systems
Semester 2 2019 / 2020

c. A PIC18 MCU uses 12-bit address to select its data memory. What is the size of the
data memory? Show your calculation. [1 mark]

212 = 4096 bytes = 4 KB

d. A PIC18 MCU has a program memory size of 2 MB. What is the size (number of bits)
of the Program Counter (PC), which is used to access this program memory?
[1 mark]

2 MB = 2,097,152 bytes = 221 ; so the PC is 21-bit long.

e. The STATUS register contains the arithmetic status of the ALU. List the five flags /
bits contained in the STATUS register. [2.5 marks]

N – Negative bit

OV – Overflow bit

Z – Zero flag

DC – Digit Carry / borrow bit

C – Carry / borrow bit

3) The PIC18 MCUs implement the Access Bank to reduce the problem caused by bank switching.
a. What is the size of the Access Bank in PIC18F? [0.5 marks]

256 bytes

b. What are the ranges of the data memory accessible by the Access Bank without the
need to use the bank switching? [2 marks]

Access bank can access the lowest 96 bytes (0x00 to 0x5F) and the highest 160 bytes
(0xF60 to 0xFFF) of the data memory space.

c. What is bank switching? How is it being used in PIC18 ? [3 marks]

The bank switching technique is used by PIC18 to allow for larger data memory to be
used while maintain a reasonable size of operand in the instruction. Using this
approach, data memory is divided into banks. Each bank consists of 256 bytes, which
can be addressed by 8 bits file register field in operand. For a data memory of 4MB,
this would result in 16 banks (since 4096/256 = 16). The bank selection is then held by
another register called the Bank Select Register (BSR).
EEEB 2044 / EEEB373 Microprocessor Systems
Semester 2 2019 / 2020

4) Explain about instruction pipelining features in PIC18 and discuss its benefits. [3 marks]

PIC18 implements the Harvard architecture which uses separate memory blocks for program
and data. Separation of data memory and program memory enables simultaneous access to both
memory blocks and making instruction pipelining possible.

The PIC18 divides most instruction execution into two stages – the instruction fetch and
instruction execution. With instruction pipelining, up to two instructions are overlapped in one
particular cycle – one instruction is in fetch stage while the other instruction is in execution
stage during that same cycle. Because of pipelining, each instruction appears to take one
instruction cycle to complete, hence faster execution.