ABSTRACT

Sorting is an important operation in a wide range of applications such as data

base, digital signal processing, searching and network processing. These sorting modules
are implemented using either ASICs or FPGAs to meet required performance. Generally
the inputs of sorting modules are integers, floating point numbers or data values. This
paper focuses on the design of partial sorting and max-set-selection units. We also
investigate the design and VLSI implementations of the partial sorting and max-set-
selection units with low latency, high throughput and modest resource requirements.
Modular techniques for designing the sorting modules with small and regular building
blocks connected in a modular fashion, because of reducing the verification time and
simplifying the design process. In this paper, we propose parallel sorting algorithms for
finding/ sorting M largest values from N inputs and then design scalable architectures
based on proposed algorithms. For sorting the values the bubble sorting technique also
proposed.