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EE143 S06 Review 2

Deposited thickness not uniform across wafer

a Wafer

H
Emission flux  (cos )n

Evaporation Source
Area=A
Professor N Cheung, U.C. Berkeley 1
EE143 S06 Review 2

Evaporation deposited
film

photo
resist Step coverage problem
is not the same
substrate as thickness nonuniformity
problem
Sputtering deposited
film

photo
resist

substrate
Professor N Cheung, U.C. Berkeley 2
EE143 S06 Review 2

Thermal Oxidation Model

stagnant
CG layer
Cs SiO2 Si

Note
Cs  Co Co
Ci
X0x

F1 F2 F3
gas diffusion reaction
transport flux flux
flux through SiO2 at interface

Professor N Cheung, U.C. Berkeley 3


EE143 S06 Review 2

CVD Deposition Rate [Grove Model by setting Xox =0]

film
D
= hG
Si 
 E
F1
F3 k s = ko e kT

  = thickness of stagnant layer

F1 = D [ CG - CS] / 
F1 = F3
F3 = kS CS
Professor N Cheung, U.C. Berkeley 4
EE143 S06 Review 2

ks depends only on temperature


hG depends on temperature, pressure and flow velocity

ks

hG

hG reduced

Professor N Cheung, U.C. Berkeley 5


EE143 S06 Review 2

Degree of Anisotropy

dm etching mask

B
hf film Af  1 
Bias B  d f  d m
2h f
substrate
df B can be  0 or  0. 0  Af  1
dm

substrate
df

Professor N Cheung, U.C. Berkeley 6


EE143 S06 Review 2

Etching profile depends on:


1) mask/film configuration
2) Film etching rate and anisotropy
3) Maks etching rate and anisotropy

SIMPLE EXAMPLE: Film etching 100% anisotropic


NO mask etching

= etching mask = film final


1 mm
x
1 mm

substrate substrate substrate

Professor N Cheung, U.C. Berkeley 7


EE143 S06 Review 2

Etching Selectivity S

v A ( vertical etching velocity of materal A)


S AB =
v B ( vertical etching velocity of materal B)

Wet Etching
S is controlled by: chemicals, concentration, temp.

RIE
S is controlled by:
plasma parameters, plasma chemistry,
gas pressure, flow rate & temperature.

Professor N Cheung, U.C. Berkeley 8


EE143 S06 Review 2

Importance of Etching Selectivity

A simple Example
Thickest SiO2
on wafer Thinnest SiO2 on wafer

When
ALL SiO2
is just cleared
1.1 mm 0.9 mm
SiO2

Si substrate
Si substrate

Professor N Cheung, U.C. Berkeley 9


EE143 S06 Review 2

How to Control Anisotropy ?

1) ionic bombardment to damage expose surface.


2) sidewall coating by inhibitor prevents sidewall etching.

Professor N Cheung, U.C. Berkeley 10


EE143 S06 Review 2

How to Control Selectivity ?


Rate SiO2
S=
Rate Si
E.g. SiO2 etching in CF4+H2 plasma
S
Rates P.R.
SiO2
Si
SiO2
Si H 2%
%H2 in (CF4+H2)

Reason: F *  H  HF  F * content 
 SiF4  The F* reaction with Si alone
is a chemical etching ( more isotropic)
Professor N Cheung, U.C. Berkeley 11
EE143 S06 Review 2

Effect of RIE process variables on etching characteristics

Control
variable

effect

Professor N Cheung, U.C. Berkeley 12


EE143 S06 Review 2

Self-Aligned Silicide Process (SALICIDE) using Ion


Implantation and Metal-Si reaction

poly-gate
TiSi2 (metal)

n+ n+

*Self-aligned structures are always preferred


for process integration

Professor N Cheung, U.C. Berkeley 13


EE143 S06 Review 2

Worst-Case Design Considerations for Etching

step height variation


variation of film etching mask
thickness can be eroded
across wafer during
film
Mask etching
step
film

Substrate

Professor N Cheung, U.C. Berkeley 14


EE143 S06 Review 2

Example: Dual Damascene Process


Etch mask for
top insulator layer
Slope due
to resist erosion
Etch stop for
top insulator layer

Etch mask for Final insulator


bottom insulator layer cross-section
Etch stop for
bottom insulator layer Overetch of bottom
insulator layer

Overetch of bottom Cu layer

Professor N Cheung, U.C. Berkeley 15

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