mine the optimum system size.
In the of the complete theoretical determination of
case of old d-c systems it will enable us
to study them from the viewpoint of
modernization of protective devices and to
correct the weak spots as they are dis-
covered.
We extend to the authors our congratu-
lations on their excellent and practical
paper.
W. R. Crites and A. G. Darling: Mr.
Eichenberg's comment concerning the
growth of d-c systems is very important.
The increase in the use of d-c systems means
that there is an increasing need for a stand-
ardized method of calculating fault currents
in these systems.
This paper is but one of several steps
toward an accepted practice for calculating
fault currents in d-c systems. It could not
have been written without the fundamental
theory given in the Linville paper and the
Linville and Ward papers. (See references
1 and 2 of the paper.) McClinton, Bran-
cato and Panoff checked the theory by test
and agreed, with some modification to the
saturation factor, that the theory could
represent actual conditions. (See reference
3.)
The next step consisted in calculation of
machine characteristics, tabulating and
plotting them as given in two reports to the
D-C Machinery Subcommittee.4,6 Snively
and Robinson showed how machine induct-
ance could be obtained by calculation and
by test. (See reference 5.) The character-
istics of some of the components of the ex-
ternal circuit are given in other works listed
in the references. The contribution which
this paper makes is that of a simplification
Digital Load Flow Studies
L. A. DUNSTAN
MEMBER AIEE
THIS PAPER describes a network
analysis performed digitally using
International Business Machines equip-
ment of the California Oregon Power
Company at Medford, Oreg., to perform
the calculations and to print out the re-
sults on a specially prepared circuit dia-
gram. Fundamentally this is a discus-
sion of improvements in the digital soltu-
tion of power networks described.' The
basic method of coding the network by
loops and a track has been continued and
is used for the example described herein.
A fundamental difference from the pre-
viously described method is that the
problem is worked in terms of currents
so that the solution is exact although it
may not fit the desired loading or trans-
former taps.
Several improvements in technique
were devised and used. All computing
AUGUST 1954
increased to decrease their d-c short-circuit
the rise of current to its maximum, and its
subsequent decay.
The responsibility for recommending a
short-circuit calculating procedure and an
application guide for interrupting devices
on d-c systems has been placed on a sub-
committee of the Low Voltage Air Breaker
Committee of the AIEE Committee on
Switchgear.
There is still much to be learned about the
actions of machines and other sources of
short-circuit current. Among the more im-
portant avenues of inv-2stigation which
could yield beneficial results, these are
suggested:
1. A better understanding of d-c short-
circuit currents from rectifiers feeding into
external elements of resistance and induct-
ance.
2. When two or more sources of current
feed into a common circuit, we need to
know what relationship those currents take
with respect to each other as each tries to
rise to its ultimate value. Does the pre-
dominant current stay as predominant or
become more so?
3. What happens to the rate of rise of
current as the point of fault is moved in
steps of increasing amounts of resistance or
inductance, or both, away from the termi-
nals of the source? This needs to be an-
swered for rectifiers as well as machines and
in the case of rectifiers, the effect of chang-
ing the amounts and proportions of primary
and secondary resistance and inductance
needs to be clarified.
4. Can adequate operating character-
istics be obtained from rectifiers in their
transformer or primary supply reactance is
was done in a "master deck" which con-
sisted of a set of cards for each step in the
problem. Each card in the master deck
had coding prepunched in it to control the
calculator used (602A) and to enable the
cards to be sorted into the proper se-
quence for computing or for printing out
on a circuit diagram. Most of the cards
in the master deck were blank in the
computing space at the beginning of a
problem and were punched during the
computation, although a few sets such as
the impedance deck, inverted matrix
deck, and load deck had data prepunched
in them.
To work a load flow problem a ma-
chine operator would reproduce a master
deck, so as to preserve the original for
future use, and would punch the loads
expressed as currents, the transformer
taps expressed as series voltages, and the
Dunstan-Digital Load Flow Studies
current while d-c voltage regulators are in
operation to maintain voltage for normal
loads and overloads?
5. Can industry establish for itself the
design characteristics of small and large rec-
tifiers so that the most economical combi-
nation of d-c circuit breakers and trans-
former reactance are selected and still satisfy
normal load characteristics?
6. What are the short-circuit capabilities
and characteristics of metallic rectifiers? of
storage batteries? What are the outputs of
electrolytic cells when a fault occurs into
which they can feed?
7. In what terms can d-c interrupting
devices such as breakers, contactors and
fuses be rated so that the application engi-
neer will know the time that elapses before
enough resistance is introduced into the cir-
cuit to prevent the current from going to
higher values, and will also know the maxi-
mum current to which the breaker or con-
tactor or fuse may be subjected without re-
spect to the rate at which the current will
rise through the device?
These are some of the things that need to
be solved to design d-c systems intelligently
and economically.
If the answers to these and similar ques-
tions were known, a long step would have
been taken toward the simplification of d-c
fault calculation.
Besides the intent of the authors to indi-
cate a simplified approach to obtaining the
critical values of short-circuit current from
d-c motors and generators, it is their hope
that, by so doing, broader and more inten-
sive interest in the fault characteristics of
all d-c sources and circuits will be aroused.
reference voltage in appropriate cards
from the master deck. The system en-
gineer would furnish these data to the
machine operator. The operator could
then follow a schedule of machine opera-
tions and without help from an engineer
could work and check all computations
and print out the results on a circuit
diagram.
The calculations required about 4
hours with the use of a relatively slow-
speed mechanical multiplier (602A) to
run from a schedule of loads, generation,
and transformer taps to a printed-out
circuit diagram. Some gain in computing
time was experienced by running two
cases simultaneouslv, and possibly three
Paper 54-143, recommended by the AIEE Trans-
mission and Distribution Committee and approved
by the AIEE Committee on Technical Operations
for presentation at the AIEE Winter General
Meeting, New York, N. Y., January 18-22, 1954.
Manuscript submitted October 19, 1953; made
available for printing December 7, 1953.
L. A. DUNSTAN is with the Bonneville Power Ad-
ministration, Portland, Oreg.
The author is indebted to the California Oregon
Power Company for furnishing equipment. and man-
power to perform the study. Special appreciation
is expressed to Ralph Faber and Richard Issac of
that company.
825
 2800KW 5000KYAR Table 1. Master Deck for the California
DAY'Sp ~~~~~~KW KVAR 2300KW 8300KVAR Oregon Power Company Network Load Study
CREEI
7_______ DIXONVILLE
Is 7
WTOKETEE
7100KW 21200KVAR KW KVAR KW KVAR Set
12 KW KVAR K Numbers Titles

00 ........... Impedance in track

GRANT". 123 KVAAR2000KW 2700K5 W 0 01 . Impedance not in track
02 . Impedance matrix A
6KW 65002KVAR OK 03 . Unit matrix B
00KW 76500KVAR r W K 7 KW KVAR 04 . First reduction C
0 . Second reduction D
6000KW 20000KVAR 13 7KW KVAR 5600KW 18400KVAR 06 . Negative reciprocals E
07 . Inverted matrix F
99 . Matrix inversion special
08 . Load currents
GRANTS 8O250KW 41000KVAR KW KVAR KW 26000KVAR 09 . Special impedance set
PASS 66 10 . Sum of load current
2 45 KW KVAR KW
11 . Special load sums
i T 234
KW KKVVARg KVAR 12 . Sum of load times impedance
2345KW KVAR 61000W~ IIBOOOKVAR 13 .
14 .
Transformer ratio
Sum of sets 12 and 13 by loops
iV, 2 KW KVAR/ 1 . Inverted matrix multiplier
I ~~KW 8 300 KVAR 16 . Loop flows
6000KW SOOOKVAR/ 4 KW KA QK V 17 . Sending line currents
PARK SI r- 2
KW
LONE PINE 12S/.5
K VAR
13 30 McCLOUD
S
20
18 .
19 .
Receiving line currents
Voltage track currents
KW KVAR
234KW KVAR/ 6000KW 18700KVAR 20 . Transformer currents
21 . Unit multipliers for transformers
22 Print voltage
23 . Load voltage
flr2345KW KVAR 6000KW 19800KVARKW VA 24 . Sending voltage
2 . Receiving voltage
26 . Load power
MEDFORD 27 . Load power correction
28 . Corrected load power
8 2500KW 70200KVAR KW1700330007KW KVAR 29 . Sending power
30 . Receiving power
31 . Bus check
5KW KVA 32 . Voltage check
KW I8000KVAR KW KVAR 30 . Spacing deck
OOKW
16 27
SOOKVA
COPCO 2 66
5
67 KW9 WE ED 66 '_;2 2 2 4
KW KVAR -'
KW KVAR 9500KW 3020OOKVAR
67 KW KVAR 2100OOKW 32300KVAR? KW KVAR invert, and it is estimated that a 12-loop
7KW KVAR
matrix in complex numbers -would re-
IOOOOOKW 53600KVAR
67KW KVAR _
6 KW
1650OOKW 2 60OOKVA R
KVAR quire about 10 hours to invert and check
YREKA- 26 LITTLE SHASTA 25 CSEL 26200KW 41 500KVAR using the 602A. The coding for matrix
KW KVAR KW KVA R inversion used would become more com-
KW KVAR
plex for more than 12 loops because of
only 12 punch positions in a card. The
Fig. 1. Coding and impedance diagram bulk of the time required to set up the
master deck was not devoted to matrix
inversion, but rather to the design and
cases could have been run simultaneously but the printed diagrams were redrafted drafting of the printout diagram and the
in 8 hours. The results have an accuracy to make better originals for reproduction punching and testing of control coding in
much better than that obtainable with a for this paper. the various sets of cards.
network analyzer, an important factor
when losses of power and reactive power Master Deck Network Coding
are studied or compared.
Table I shows the numbering and titles Fig. 1 is an impedance diagram and
Printout Diagram assigned to the 35 sets of cards comprising also shows how the network is coded by
the master deck. The first nine sets of loops and a "track." The track is a
A circuit diagram was prepared for a cards, sets 00 through set 99, were used closed path through all busses in the net-
proposed circuit under study with the to compute the inverted matrix which is work and could have been one of the
busses arranged in three columns and done only once for any number of studies loops if desired. The sending end quan-
spaced so that standard tabulating equip- of the same network. Only the imped- tities in Fig. 1 represent line impedances,
ment would print three columns of com- ance set and the sets beginning with 08 the sending kilowatts represent resistance,
plex numbers opposite the busses or direc- are used in working a specific load study, and the sending kilovars represent react-
tional arrows. Then ozalid prints of the and it is this phase of the work which ance. These quantities are in the per-
circuit diagram could be run through the may be performed by machine operators unit sv-stem at 100,000 kva base and are
tabulator along with the computing in about 4 hours without help from an given to 5 decimals. For example, the
cards and the numbers representing power engineer, line from Toketee at Dixonville (upper
flows and bus voltages could be printed Setting up the master deck for this right of diagram) is listed as 2,300 kw
on the diagram. All computing cards in problem required about a week's time and 8,300 kilovars to the sending end,
the master deck had printout coding, an working only evenings on the project. which means that the resistance of this
important aid in detecting sources of Inverting the 7-loop matrix in complex line is 0.023 per-unit ohm and the react-
errors. Figs. 1, 2, 3, and 4 were originally numbers took one evening. A larger ance is 0.083 per-unit ohm. The receiving
printed on circuit diagrams from cards, matrix would of course take longer to kilowatts in Fig. 1 represent the loop
826 Dunstan Digital Load Flow Studies AUGUST 1 954
numbers for each line. For example, the I5122000KW 5 00KVAR
receiving end of the line from Days KW KVAR + ~~KW KVAR 5 150OW 5 IOOOKVAR
Creek to Grants Pass 125 is marked 12 DAYS
CREEK
._ ~DIXONVIL LE.s TOKETEE-
O
00KW 9 3300KVAR 51K OtA
kw which means that this line is in loops __5 72050KW 4700KVAR S 28000KW 9 2000KVAR
1 and 2. _ KW KVARK
The numbers printed opposite the
busses in Fig. 1 are track sequence num-
bers and the track may be traced from GRANTS
KW
~~~~~ - 820AR 9 OOVA- 9 2945OKW 9 1600KVAR

these numbers. Medford, the third bus PASS 125 KW KVA6LDRA PROSPECT 125-_
OO5230KW 9 5700KVAR |_ KW KVAR KW 'YA
from the bottom in the left column, is the s 4850KW 5 10400KVAR 9- 4
340K 9900KVAR KW KVAR
starting end of the track as shown by its KW K NE 00W
numbers 1, 15, and 32. For convenience ~~~iN'KW KVAF/
R
in tracing the track the first few busses are O
60KW 5 71 0KAR 664 5 27001KW 9 IOOOKVAR 9 29450KW 9 1600KVAR
GRANTS-
Medford, Park Street, Grants Pass 66, PASS66 -;5~
~~~~~~~~K KVAWR260YR
_POPCT6 5 4750KW 9 11500KVAR
Gold Ray, Prospect 66, Prospect 125, KW KVA ,' 5 92450KW 9 6800KVAR ',
Days Creek, Dixonville, Toketee, Dixon-
ville, Days Creek, etc. KW KVAR
5 95150KW 9 7800KVAR
9 17500KW S 4500 KVAR
KW KVAR 5 17950KW 9 195001VAR
LONE PINE A2
ST.-' '75_ 17500KW 9 4500K!V,
Current Flows PARK McCLOUD
KW KA
KW KVAR 5 17950KW 9 19600KVAR
Fig. 2 shows the loads and generations KW KVAR|
expressed as currents, and the summation
of these currents flowing down the track. KVAR
5 46400KW 9 18200KVAR KW K(VA R
_ KW
|5 400KW 9 O1400KVAR KW KVAR
The line currents shown in Fig. 2 are MEDFORD COPC02 125- WEED 1255 '0
5 43700KW 9 17200KVAR
progressive totals of the load and gen- .5 48751)KW 5 10400KVAR
KW KYAR t 5 66700KW 9 9100KYAR
eration currents and are easily formed by
an addition run with load cards and line
cards properly interspersed. KW KVAR 595150KW 9 7800KVAR 5 920t)KW 9 3900KVAR
5 42650KW 5 26200KVAR
The currents in Figs. 2 and 3 are given FALL 'COPCO 2 66
-- ~~WUE
D666 - KW KVA R
to -a decimals in the per-unit system. CREEK '5 50000K<W 9 IOOOOKVAR
F 5 52500KW9 34000KVAR 5 5 800XKW 9 1200YAR
The 5's and 9's preceding the in-phase KW KVAR t KW KVAy I
~~~KW KVAR
and quadrature components of current
indicate signs, a 5 indicating a plus quan- 5 43900KW 5 58 00KVA R KW KVAR |
I KW KVAR |
tity and a 9 indicating a negative quan- KW KVA R i5 56900KW 9 200KVAR I
tity or a current flowing opposite the YREKA _-
I
LITT LE S HASTA' 1~CATEL 5 500K W 5 40001CYAR
5 1300 KW 9 6000KVAR 5 IOOKW 9 IOOOKVAR
arrow. Generally the quadrature com- X5 5001KW 5 4000KVAR
ponent of current flows in the opposite
direction from reactive power which is Fig. 2. Summation load currents
the reason for the numerous instances of
the components of current flowing in op-
posite directions. and the series voltages inserted to repre- reactive power. Reactive power flows
A voltage in each of the seven loops sent off-nominal transformer taps. and reactive loads should be corrected for
resulting from the current flows in Fig. 2 line charging, -but this step was omitted
is obtained by multiplying these current Voltage Calculation because the small charging current for
flows by the line impedances and sum- this particular network did not warrant
ming the products by loops. Off-nominal Voltages in the network are computed the extra half-hour of computing involved.
transformer ratios are represented by a serially starting with an assumed voltage The transformer off-nominal voltage
series voltage inserted at the trans- at some reference bus and following the ratio was taken care of by a series volt-
former, and these series voltages must also track summiing the impedance drops and age, and the current ratio is accounted for
be summed by loops. The loop voltages series voltages for transformer taps by correcting the load at the transformer
from the currents in Fig. 2 and from the throughout the network. This computa- low-voltage bus.
transformer ratios are multiplied by the tion is discussed subsequently as an illus- The generation, load and loss listed at
inverse of the impedance matrix resulting tration of card handling. the top of Fig. 4 was formed by addition
in a set of loop currents which will pro- runs of the load cards. Generation was
duce compensating voltages in each loop Completed Study plus load and load was minus load so that
to satisfy Kirchhoff's law that the sum- the total of all load cards was the loss,
mation of voltage about each loop must Fig. 4 shows the completed study in- the total of the plus load cards was the
equal zero. cluding check quantities. Voltages were generation, and the total of the minus
Fig. 3 shows the line currents resulting determined as discussed and are printed load cards was the load.
from combining the loop flows which are out in rectangular co-ordinates. The
listed at the bottom of Fig. 3 with the voltage printed opposite each transformer Checks
line currents in Fig. 2. Fig. 3 is a cur- is the series voltage inserted to represent
rent diagram showing the actual currents the off-nominal ratio. The bus voltages In running a network study it is im-
which would flow under the assumed were multiplied by the conjugates of the portant to have a way of checking that
schedule of load and generation currents, currents in Fig. 3 to form the power and the series of calculations have been cor-

AUGUST 1954 Dunstan-Digital Load Flow Studies 827

 00
t-0 CASE No. 2
00 TR TAPS
LONE PINE 118750 7 1000 GENERATION 229254 125181
GR PASS 115000 7 1000 LOAD 210492 68678
PROSPECT 132000 7 1200 LOSSES 18762 56483
COPCO2 125000 71200
WEED 127500 71000

5
18474 W 5

59619 5 ON72KV 150089KW 5 38241KVAR 5 5 56916KVAR

155264K(W
CREEK 1976UILEN 59885 5 26160 ,5 103252 5 38633
5 917K:W572KV TOKETEE 5 155264KW 5 56916KVAR

IF
GRNT 56190KW 519GOLDA 5 21744KW 529732KVAR 9354W58IKA

937424KW 54312K 5 664KV919KW AR46VA

GRANTSI 9F 956583KW 9 10032KVAR 5473W5I5KA

9 19335KW GOLD9 W43O2K3KVA

ti
;;t PASS 66 175 27653KW 5 48483KVAR ~E 9
C.,)
It-+.
937W525KA 7532KW 5 28025KVAR
9 20743KW 5 6695KVA PN
;;t 5 3407KW 5
54427KW 5 2IOKA 24362KVAR 5
357026KW 5 91274KVAR
9688KW
5 S6SKVAR 9 3565KW 9 7247KVAR 5680KW 9 330KVA 9
t
t'i .
5100000 5 OC2 5992 598WE055852 525
VIZ
t4 . 5 437003KW 5 I700VA2 9 6370KW5 5
704KA 39836KW 5 68336KVAR
Q
1-- 526KW 5 925K 04VR
2539KVAR 9K 85KA
t--, 5 102465 5 2426~~9660 585
(Z) 5 2120KW
5 332OKVAR 94670K 5 771PROKPAR5 8937KW 5 1049K6A
k 9 45963KW 1371KVAR 9~496KW9625VR5!13KW575KT
I.lj 47734KW
5 I0I96KVAR 5 43964KW 5 2S664KVAR 5 12146KVAR
53697KW
I 9 41756KW 9 4967KVA
(Z) 5 62475KW 9 21785KVAR 549W93TKA
F23
MEDFORD--
I
5000KW
5 9IO00OVAR 9 52500KW 9 30780KVAR 5 34248KW 9 I3900KVAR _______________032 KW__71 4KV R
t4.
m
C-,) 5 910611 9 270562 939 9
12KW 5 49KVARr 5 Al 5 17618KW 484
93084
R ~\_f5976264 9 649
86KW 9O5KVAR p

LITL SHASARCASTELLA656500KW52400KKAR FALL 5 412072KW 5 S2120KVAR 5 7118KW 5 31943KVA R 5 47162KW 9 19749KVAR

CREEKT LITTLEW SH5KASTRAT L
9 41830KW 9 1650KVAR 5F N10W 9OOKVAR

5 500KW 5 4000KVAR
U
LOOP CURRENTS
LOOF P 5 3 1157 8 I8926
LOOF P2 9 37830 9220107 YREKA
LGOOF P3 9 1430 5 7746
LOOF P4 5 37573 9 e5204
LOOP P5 0 46459 9 1639
LOOP PI6 5 6467 5 21275
LOOF P 7 9 54551 9 91140

BUS CHECK
VOLTAGE CHECK
MEDFORD 5 5 LONE P66 5
1 WEED
0 66 5 99193 9 1905
PARK ST 5 9 2 FALL CREEK 2
Fig. 3 (above). 9 WEED 125 5 5 2953
Current diagram GR PASS 66 5 5 COPCO66 2 96562
5 COPCO 125 5 97979 5 1944
GOLD RAY 9 2 5 COPCO 5
125
COPCO 66 5 960 19 5 1634
?-3 PROSP 66 5
9 WEED 125 1
2 FALL CREEK 5 957 15 5 1246
5
PROSP 125 5 MC CLOUD MEDFORD 5 99994 9 4
DAYS CREEK 5 2 5 WEED 66 1 LONE P 66 5 10 1452 5 767
DIXONVILLE 5 5 CASTELLA LONE P 125 5 9 1638 5
TOKETEE 5 5
9 3884
Fig. 4 (right). Load flow LIT SHASTA 2 DIXONVILLE 5 5
diagram PAS 125 5 2 5 YREKA I 99865 26160
OR CREEK 5 96619 5 19976
LONE P 125 9 15 2
VATS
MEDFORD 5 99999 9 4

MANUALLY PLACE
THE DECKS IN THE FOLLOWING SEQUENCE
I. 00 DECK (MULTIPLIER)
2. 21 DECK (MULTIPLIER)
3. 13 DECK (M'CAND)
4. 19 DECK (M'CAND)
5. 22DECK(ANSWER)
6. 23 DECK
(ANSWER)
7. 24 DECK
(ANSWER)
8. 25 DECK (ANSWER)
9. 32 DECK (ANSWER)
I
SORT
COLS. 76 TO 73
PICK UP IN REVERSE ORDER
UNIT I REFERENCE
MULTIPLIER THIRD VOLTAGE
FIRST SECOND
UNIT MULTIPLIER AND REFERENCE VOLTAGE CARDS MAY BE PLACED AS
SPECIFIED BY THE ENGINEER. PLACE THE CARDS AHEAD OF THE SPECI-
FIED REFERENCE BUS THEN PLACE THE CARDS ORIGINALLY AHEAD OF
THE REFERENCE BUS ON THE BACK OF THE DECK
I loads and generation as currents and the
CALCU LATOR
MULTIPLY BOARD
PROGRESSIVE TOTALS
CLEAR MACHINE
I reworked to reach the desired loadings,
SORT
TO SEPARATE DECKS
COLS. 26 a 25
I mastered by an engineer familiar with
Fig. 5. Card-handling chart
rectly performed. A voltage check and a it is probable that the multiplications of
bus check are listed at the bottom of the currents and voltages were correctly per-
study in Fig. 4. The voltage check is a formed.
list of the voltages computed at busses
a second or third time when summing Illustration of Card Handling
the voltage drops down the track. Thus
all busses which have more than one track- One of the steps in the card-handling
sequence number in Fig. 1 appear in the procedure is illustrated in Fig. 5. This is
voltage check. The check voltages the step at which voltage throughout the
should compare with the voltage printed network is calculated. Fundamentally
at the same bus in the circuit diagram this is a multiplication run wherein line
except for round-off error. Inasmuch as impedances are multiplied by line cur-
the voltages were calculated progressively, rents to form voltage drops which are
it is probable that if a few bracketing progressively summed. Therefore, quan-
voltages are correct, the intervening volt- tities which are to be added, such as the
ages are also correct. reference voltage and the series voltages
Each power and reactive power listed for transformer taps, are not added di-
in Fig. 4 is the result of an independent rectly but are multiplied by a unit card to
multiplication of a bus voltage by the go in as products the same as the im-
conjugate of an appropriate current. pedance drops. The multiplier decks
The bus check is the sum of the power are the line impedance deck 00 and the
and reactive power entering each bus and unit multipliers for transformer ratios 21.
should equal zero. If this check holds, The multiplicand decks are the track cur-
AUGUST 1 954 Dunstan-Digital Load Flow Studies
rent deck 19 and the voltages representing
transformer ratios 13. The answer decks
are all voltage decks and include the
print voltage deck 22, the load voltage
deck 23, the sending voltage deck 24, the
receiving voltage deck 25, and the volt-
age check deck 32. The cards are sorted
in reverse track sequence so that volt-
age drops may be added instead of sub-
tracted. Since the track closes upon it-
self, the sorted deck may be cut at any
bus in the network as reference for the
voltage run. That is, the engineer can
set the voltage at any bus in the network,
and all the other bus voltages will be
computed with reference to this lead-off
voltage.
Iterative Procedure
The input data for the mechanized solu-
tion discussed herein are the loads and
generation expressed as currents, the
transformer taps expressed as series volt-
ages and a voltage at any specified point.
A machine operator can process these data
and return to the system engineer a dia-
gram similar to Fig. 4, which is an exact
checked solution for the input data.
However, for the engineer to express the
transformer taps as series voltages he
must know or estimate the various bus
voltages. Thus a study may have to be
transformer taps, and voltage levels.
This adjustment procedure may be easily
his system.
Iterative procedure may also be used to
make a circuit change in a network. For
example if a line is to be added between
certain busses, the line current may be
estimated and added to the receiving end
bus, and deducted from the sending end
bus, and a case run with the changed bus
loadings. The actual current in the
added line equals the difference in ter-
minal bus voltages multiplied by the line
conductance so that any case run with-
out the line may be changed to a case
with the line by changing the loads at the
line terminal busses. This concept ena-
bles a system engineer to extend the use-
fulness of a network which has been
coded for computation until there are a
sufficient number of changes in the net-
work to justify a new coding and master
deck.
Conclusion
The digital load flow study appears to
be attractive to those who have no net-
work analyzer available and to engineers
829
who must study losses either for system
economy or for contractual reasons.
Once a network is coded to a master deck
of computing cards and a printout dia-
gram drafted, it is ready for instant use at
any future time and need not wait to be
plugged and set. Although the setting
up of the master deck is a rather special-
ized procedure, the use of the digital load
flow method can be mastered by any-
system engineer, and the computing re-
duced to routines familiar to machine
operators.
Reference
1. MACHINE COMPUTATION OF POWER NETWORK
PERFORMANCE, L. A. Dunstan. AIEE Trans-
actions, vol. 66, 1947, pp. 610-24.
. This paper presents a scheme for making
Discussion
J. M. Henderson (General Electric Com-
pany, Schenectady, N. Y.): This paper is
very interesting as it describes a simple
method of making load flow studies on
punched-card accounting machines. This
development should be of considerable inter-
est to utility companies, since many of them
have available the type of equipment which
the author used in solving the problem out-
lined in the paper.
The method given by Mr. Dunstan re-
quires the system engineer to estimate, in
advance, voltages and phase angles at all
network load busses. This enables the
engineer to transform a given schedule of
power and reactive loads to a set of complex
load currents. The load currents are then
impressed on the network and the resulting
branch flows, bus voltages, and power and
reactive loading are readily determined. If
the initial estimate of bus voltages and
angles is not close, the resultant power and
reactive loading on the system will not
match the desired loading. In this case
the engineer must modify the impressed
load currents and determine system per-
formance with the new set of load currents.
Thus, by a cut-and-try process which some-
times might be quite laborious, the perform-
ance of the system can be determined for
the desired system load schedule.
I agree with the author that the method
is of considerable value to those who have
no network analyzer available. I am also
of the opinion that where available the net-
work analyzer will always be used in prefer-
ence to the method outlined in the paper,
since the analogue approach gives suffi-
ciently accurate results much more quickly
and easily.
We have also developed an iterative
method for the numerical solution of power
flow problems. The process yields an accu-
rate solution for a given set of impressed
power and reactive loads, as well as for
fixed transformer voltage ratios and phase
shifts. This method has been programmed
for use on a card programmed calculator
and has been applied frequently to relieve
the work backlog on our network analyzers.
Solution of load flow problems is essen-
830
tially a trial-and-error process since it is
seldom possible to specify beforehand an
adequate number of parameters to define the
problem. For this reason the equivalent of
one study on a network analyzer requires,
in general, several runs on the digital com-
puter. Obviously, the number of runs re-
quired on the digital machine to produce an
acceptable solution for the system condition
under consideration increases with the com-
plexity of the system. Because of this, we
have found that the digital solution of power
flow problems on the card programmed cal-
culator is economical with respect to solu-
tion on the network analyzer only when con-
sidering relatively simple systems. For
systems containing more than four or five
loops and with more than 24 lines, the net-
work analyzer has been found superior.
J. L. Gabbard, Jr. (Carbide and Carbon
Chemicals Company, Oak Ridge, Tenn.):
load flow studies of power systems using a
type of digital computing equipment acces-
sible to the engineers of many power sys-
tems. It also presents figures illustrating
how studies can be carried out on a routine
basis without changing the character of the
study.
Approximately 1 year ago Mr. Dunstan
suggested to me a scheme similar to the one
presented in this paper that could be used in
making digital load flow studies. The sug-
gestions were followed, and a number of
digital load flow studies have been made
successfully. For these studies a card pro-
grammed calculator was used which made it
possible to calculate at a faster rate and
with considerably less card handling than
the author describes. Another advantage
was the ability to work directly from mega-
watt and megavar schedules. However,
the method of loop flows and trucks de-
scribed in this and in previous papers was
used. 1,2
To date my work has been limited to the
gaseous diffusion plant system of the
Atomic Energy Commission at Paducah,
Ky., which is a small system from the stand-
point of the numbers of busses and loops.
In studying this system digitally, it was
divided into sections, a transmission section
and a distribution section, which exhibited
different characteristics. The transmission
system converged to a balanced condition
(+1/2 per cent of desired generation and
loads) within three iterations while the dis-
tribution system required twice as many
iterations. The difference is due to the
greater impedance in the distribution system
which was increased by representing in-
ternal voltages of the loads.
By writing equations for the slack ma-
chine outputs, the successive iterations re-
quired to reach a balance were carried out
with no operator adjustments A program
for automatically adjusting transformer tap
settings to hold regulated voltages has been
used. Performing these system adjust-
ments manually between iterations does not
present a difficult problem, however,
A feature of digitally calculated load flows
not mentioned in this paper is that the di-
vision of load between two suppliers can be
made with great accuracy and in accord-
ance with a predetermined schedule. For
the Paducah Plant where power is received
from two suppliers over 17 lines and at four
Dunstan-Digital Load Flow Studies
separate busses, this division had proved to
be a time-consuming operation using a net-
work calculator. On a digital computer this
division of load was done automatically and
with no appreciable increase in time.
Experience has given increased confidence
in the use of the digital computer in solving
network problems, and its use is being ex-
tended to the other gaseous diffusion plants
of the Atomic Energy Commission.
REFERENCES
1. See reference 1 of the paper.
2. THE GENERAL SOLUTION METHOD OF POWER
NETWORK ANALYSIS, Lyle A. Dunstan. AIEE
Transactions, vol. 67, pt. I, 1948, pp. 631-39.
Harold E. Miller and Charles B. Walton
(Federal Power Commission, Washington,
D. C.): Mr. Dunstan has improved the
technique of the application of his general
solution method to the analysis of power
networks. In his latest paper he demon-
strates that an analysis can be performed
utilizing International Business Machines
(IBM) equipment to perform the calcula-
tions and to print the results on a circuit
diagram. Those who have studied his
method know that it enables the general
solution of any kind of a bilateral linear elec-
tric network in general terms. This general
solution makes possible the application of
various voltage, current, and load conditions
to the network and the rapid calculation of
the resulting flows. It is possible to deter-
mine quickly the impedance between any
two points in a network. The initial solu-
tion is, however, tedious with an ordinary
electric calculating machine and the possi-
bility of error grows with the complexity of
the problem. The application of the IBM
equipment to the calculations reduces the
work and minimizes the possibility of error.
The automatic printing of the results on a
circuit diagram, which Mr. Dunstan has now
achieved, further eliminates the possibility
of transcription error.
It is our opinion that the author's
method warrants the attention of system
design and operating personnel. They may
find that once a general solution has been
obtained, it is easier and quicker to calculate
the effect of load changes than to depend on
network analyzers whose use must be sched-
uled. As they become more familiar with
the method, they may develop improve-
ments in both technique and method which
will extend its application to problems be-
yond the capability of present network
analyzers.
John Wallis (Oklahoma Gas and Electric
Company, Oklahoma City, Okla.): Engi-
neers who plan new transmission lines, sub-
stations, and power plants must continually
weigh the effects of alternative proposals on
the power flows in lines, on bus voltages, on
power losses, etc. The increasing com-
plexity of most power systems has therefore
resulted in greater use being made of a-c
calculating boards.
However, a-c calculating boards are not
continuously available to all. How, then,
can an engineer make the power-flow studies
needed for evaluating alternatives and for
formulating plans while awaiting an allo-
cation of time on an a-c analyzer? Mr.
Dunstan has provided one answer in his
AUGUST 1 954
paper describing an actual flow study made
on a digital computer, yielding exact an-
swers.
For some purposes, such as loss formula
studies, great accuracy may be necessary or
desirable. For some flow studies, however,
forecasted loads are used. Errors are cer-
tain to exist in predicting the magnitude and
dispersion of individual future loads.
Similarly, planned transmission lines may be
tried during a flow study. The length and
exact characteristics of lines not yet built
will not be known. It would be of interest
then if the author could state whether a
substantial saving in computing time will
be made if less accurate answers are re-
quired.
In the past 5 years of use by engineers in
this company, the inverted matrix procedures
and the solving of networks by methods
presented in the author's previous paper'
have afforded reasonably correct answers
from which planning can be done. Using
only the network reactances, problems for
parts of the system involving as many as
eight loops have been solved. In the
mathematical resolution of these networks,
flow coefficients were determined from the
inverted matrices, flows in various lines were
determined by superposition, and voltage
drop calculations were then made using both
resistance and reactance. Where there was
no great spread in the R to X ratio among
the various lines in the networks, the initial
sets of answers have usually been acceptable
even with these approximate methods.
This experience is convincing evidence
that the mathematical resolution of net-
works to determine flows is worthy of better
understanding by system engineers, espe-
cially planning engineers. For smaller sys-
tems without many interconnections and for
segments of systems as large as ours, which
contains nearly 60 loops, the mathematical
solutions are practicable and they do fulfill
needs that arise when trips to a-c boards are
not feasible.
For engineers who have access to IBM
card punch calculators and who understand
the setting up of the card decks and of
boards needed in the use of these machines,
the IBM equipment will undoubtedly fa-
cilitate matrix inversion and the solving of
networks. It should be mentioned, how-
ever, that where there are not too many
loops involved solutions can be made with
reasonable facility by using one of the auto-
matic calculators commonly found in most
engineering offices. Depending upon the
nature of the study to be made, sometimes a
system containing many loops can be re-
duced to a network of four to six loops by
wye-delta transformations and satisfactory
flow determinations can be derived for those
parts of the system of particular interest.
Our matrix inversions and flow calculations
have all been made on automatic key punch
calculators.
Despite efforts that have been made to
popularize matrix algebra, it remains a mys-
tery to many engineers, including this dis-
cusser. Nevertheless, the little bit of ma-
trix mathematics needed for calculating
flows in a power network can quickly be
learned by anyone who is reasonably pro-
ficient in ordinary algebraic solutions and
methods. Often it is not understood that
the original matrix is a set of impedances
which, with a little practice, can readily be
written in matrix form. The inverted ma-
AUGUST 1 954
trix is simply a set of transfer conductances
derived by inverting the matrix. The
methods of setting up the original matrix
and of inverslon have been clearly explained
by D. E. Richardson.2 Mr. Dunstan aptly
adopts a different convention for designat-
ing positive directions of power or current
flow than is used by Mr. Richardson with the
result that a negative unity must be used in
the inversion mathematics where Mr.
Richardson uses positive unity.
REFERENCES
1. See reference 1 of the paper.
2. ELECTRICAL NETWORK CALCULATIONS (book),
D. E. Richardson. D. Van Nostrand Company,
New York, N. V., Chaps. I-VIII, 1946.
Donald S. Wilgus (White Sands Signal
Corps Agency, Los Cruces, N. Mex.): This
paper is an excellent example of the results
that can be obtained by the use of a very-
small-scale digital computer in the solution
of digital load flow studies. Certainly the
IBM 602A is far from the ideal machine to
be used for these computations. If the
production of load flow studies (after matrix
inversion) compares very favorably to the
network analyzer, using the 602A, imagine
the results that could be obtained from some
of the present-day high-speed computers!
As power systems grow larger and more
complex, more and more attention will have
to be given to the resulting line losses in the
over-all design and operation of the system.
Digital load flows are a prerequisite to loss
studies since the network analyzer does not
give an accurate determination of these
losses. In many instances, power com-
panies who have network analyzers are
forced to turn to digital techniques to ob-
tain more accurate data.
One of the largest time-consuming oper-
ations is the coding of a power system dia-
gram. The usefulness of the pictorial pres-
entation should not be underestimated;
however, results could be obtained in much
less time if merely a tabulation of the results
would be made. The load flow diagram is,
to a large extent, an outgrowth of the use of
the network analyzer. Perhaps the accept-
ance of the tabulated data will only come
into being after digital load flows replace the
network analyzer type of load flow studies.
As brought out in the paper, after esti-
mating the loads and voltages at the busses
(and supplying the network data), there is
no further need for the attention of the
power system engineer. He is needed only
to evaluate the results and to determine con-
ditions for additional studies. As far as the
iterative procedure to balance the system is
concerned, mathematical techniques have
been worked out which could also be per-
formed by the machine operator.
In the example, certain busses such as
Copco 2 125, Copco 2 66, Fall Creek, Lone
Pine 125, Lone Pine 66, and Medford are
duplicated by the track (discounting the
busses to which radial lines are attached).
This duplication increases the time of
machine computation. Since the track is
determined to a large extent by the loop flows,
how can it be known that the assumed loop
flows will result in the minimum duplication
of busses by the track? This is also compli-
cated by the fact that the track must go
through the lines which have off-nominal
tap settingrs on the transformers.
Dunstan--Digital Load Flow Studies
T. H. Lee (The Detroit Edison Company,
Detroit, Mich.): The recent advances in the
art of automatic digital computers and their
general availability to the public have
created an atmosphere of eager receptiveness
and welcome to any new ideas of computer
applications for power system engineering.
It is our opinion that with presently avail-
able digital computers, the network analyzer
is preferred for most of the load flow
studies, but the digital solution deserves
special scrutiny because of its greater pos-
sible accuracy. Future improvements in
digital computers, such as in input-output
speed, memory access time and capacity,
and reduction in computer costs may make
the digital computer a competitive supple-
ment to the a-c network analyzer.
The digital load flow studies described by
the author may be defined as a problem
where the following quantities are specified:
1. Network: impedances, connections,
tap settings, etc.
2. Currents or watts and vars entering
(or leaving) every load and generator bus
except one.
3. Voltage at one bus.
The answers are the watt and var flows in
each network element and voltages at all the
busses.
A common complaint against the digital
load flow studies is that many such solu-
tions are required before the proper reactive
schedule and tap settings can satisfy the sys-
tem voltage conditions. In using the IBM
type 602A and other punched-card equip-
ment, many external adjustments of input
data are necessary in going from one digital
solution to another in order to improve on
voltages. The adjustment of input data
(reactive schedules and tap settings) is anal-
ogous to "balancing" an a-c network
analyzer study. Our experience with other
types of digital computers to date leads us to
believe that it is possible to perform the
balancing process as well as the digital load
flow studies automatically, i.e., without re-
quiring external adjustments or human
intervention. The idea of automatic solu-
tion of load flow studies where balancing is
performed by the machine has not actually
been tried out. Thus no figures on cost or
time are available at present.
An automatic digital computer has the
following characteristics:
1. It has a memory where data and in-
structions are stored.
2. The stored instructions are executed
one at a time, normally in a sequential
manner. However, the computer can also
be instructed to make decisions on the
yes-no type of question. Whether alter-
nate instructions are selected or not will de-
pend on the answer to the yes-no question.
3. Data and instructions stored in the
computer may be altered internally in the
course of a problem.
In an automatic solution of load flow stud-
ies, the problem starts with the best guess
that is possible in the reactive schedule and
tap settings. After performing the digital
load flow study described by the author,
the computer is instruc ed to balance the
study and a new reactive schedule and tap
settings are made up. These new inputs
are used for the next digital load flow study
and the process is repeated until satisfactory
831
voltage levels are reached. Balancing is
possible in an automatic digital computer
because the questions which the a-c network
analyzer engineers ask themselves when they
balance a board study can be reduced to the
yes-no type of questions. For example, we
ask if the voltage of an area is within accept-
able limits. If the voltage is too low, a pos-
sible question might be to ask if there is any
unused synchronous condenser capacity in
that area. If the answer is yes, the reactive
output of the condenser would be increased
accordingly; if the answer is no, or if the re-
quired increase exceeds the permissible limit,
the reactive output would be scheduled for
its maximum and the computer proceeds to
ask similar questions of the generators affect-
ing that area. The amount of adjustment
necessary to improve the voltage can be pre-
determined from the engineer's experience
with the system. Inquiries directed at tap
changers would be more elegant because
voltages in other load areas will be affected.
However, the ability of the computer to
remember things can be utilized advantage-
ously. Several digital load flow studies with
automatic balancing may be necessary be-
fore a satisfactory study can be completed.
These automatic load flow studies would
correspond very closely to the a-c network
analyzer approach, which in turn should re-
semble actual power system operating re-
quirements and limitations.
The automatic load flow studies have the
following advantages:
1. Automatic solution of load flow studies
in the manner desired by power system engi-
neers.
2. A single program (or set of instruc-
tions) for balancing may be used for a num-
ber of studies, e.g,. for all the winter peak
load studies at one stage of system expan-
sion.
3. Slight changes in the program could
adapt one set of system conditions to an-
other, e.g., light load and peak load con-
ditions might mean testing for different
ranges of satisfactory voltages and reactive
output limitations.
We believe that with cheaper and better
automatic digital computers available in the
future, this type of network solution will
come into general acceptance.
G. W. Bills (Bonneville Power Administra-
tion, Portland, Oreg.): This paper on the
application of digital techniques to the load
flow analysis of power systems greatly
832
clarifies the digital method. The procedure
as outlined in reference 1 of the paper was
not one that an IBM machine operator
could be expected to follow as easily as that
given in the present paper.
Automatic printout of load flow diagrams
is certainly one of the striking advantages of
the digital method as compared to the a-c
network analyzer. Anyone who has read
or recorded load flow diagrams from an a-c
network analyzer will testify as to the tedi-
ousness and slowness of this task. In fact,
because of this Bonneville Power Adminis-
tration hopes to have automatic printout of
load flow diagrams on its a-c analyzers some-
time in the future.
It is true that load flow studies made digi-
tally have greater accuracy than a-c network
analyzers with respect to inflows and out-
flows of real and reactive power at busses
and line losses, but one difficulty with digital
analysis which is not inherent in a-c network
analyzers is that of converging to a given set
of loads. For example, to compare losses
of a system for two operating conditions,
assuming the same set of bus loads for each
condition, an a-c analyzer is not adequate,
but neither is the digital procedure unless it
is possible to converge accurately on a set of
loads.
Our experience in converging on loads
indicates considerable difficulty is to be
expected for systems which have more than
ten loops. What accuracy would Mr. Dun-
stan expect in converging on a given set of
loads with his system? Would it be prac-
tical to analyze systems having more than
20 loops by the digital technique assuming
that a 602.A calculating punch is available?
If the convergence problem can be solved,
the digital method, utilizing high-speed,
large storage computers, should be able to
compete advantageously with a-c network
analyzers.
L. A. Dunstan: The discussers have brought
forth a number of ideas concerning comput-
ing machines and convergence which were
not included in the paper and I am appreci-
ative, especially since most of the comments
come from engineers who had actual experi-
ence at solving networks digitally. Mr.
Henderson and Mr. Gabbard have applied
the card programmed calculator to network
analysis, a machine considerably more ele-
gant than the 602A I used, whereas Mr.
Miller, Mr. Walton, and Mr. Wallis have
applied the desk calculator. This repre-
sents a spread of perhaps 50 to 1 in calcu-
Dunstan-Digital Load Flow Studies
lation speed being applied to the same type
of problem. Mr. Wilgus and Mr. Lee sug-
gest application of large high-speed com-
puters to network analysis. Thus far the
machines used for computation by the au-
thor and the discussers have been dictated
by the matter of availability rather than
appropriateness to the problem. In my
opinion a digital computer could be built
especially tailored to network analysis which
could outstrip either network analyzers or
present digital computers both in speed and
cost for this particular problem.
The question of number of iterations re-
quired to converge on a given load schedule
was brought up, and Mr. Lee and Mr.
Gabbard suggest automatic procedures to
converge on the load schedule. I have used
manual adjustment because it is quite simple
and there are a number of artifices which
might be difficult to program, and, more im-
portant, it is quite probable that the system
engineer may wish to change his schedule of
taps and reactive loads based upon the re-
sults of an iteration. Mr. Henderson states
that a greater number of iterations are neces-
sary to solve a large system than to solve a
small system, but this is contrary to my ex-
perience. In working a digital load study
for any particular case the total load or total
generation, over-all power factor of load or
generation, and over-all voltage level may
be adjusted precisely to desired values by
adjusting all load and generation currents
(and series voltages for taps) in proportion
and by adjusting the reference voltage with-
out working another iteration. Thus for
comparing losses for alternate plans the
over-all loading and voltage level may be
held precisely the same even though the dis-
tribution of loads among the busses may not
be exactly on schedule.
Mr. Henderson suggests that the card
programmed calculator is economical with
respect to the network analyzer only for
small studies and Mr. Bills questions whether
the 602A may be used beyond 20 loops.
I am presently setting up a large study of
60 loops which exceeds the capacity of any
network analyzer in the country today.
It is now estimated that this system will
require approximately 30 hours for a single
iteration using the 602A.
Mr. Wilgus' question regarding optimi-
zation of network coding to minimize com-
putation is an interesting one and one to
which the author has no answer. An inter-
esting speculation along this line is to pro-
gram the computer to code the network by
loops as well as solving it.
AUGUST 1954