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LST UCORRMALGOSWITCH:;

iHNHM3H
+++ HUAWEI6900 2020-03-10 08:50:11
O&M #13910076
%%/*1880618080*/LST UCORRMALGOSWITCH:;%%
RETCODE = 0 Execution succeeded.

List Connection-Oriented Algorithm Switches


-------------------------------------------
Channel Configuration Strategy Switch = CFG_DL_BLIND_DETECTION_SWITCH::ON
= CFG_HSDPA_64QAM_SWITCH::ON
= CFG_HSDPA_MIMO_SWITCH::ON
= CFG_HSPA_DTX_DRX_SWITCH::OFF
= CFG_HSPA_HSSCCH_LESS_OP_SWITCH::OFF
= CFG_IMS_SUPPORT_SWITCH::ON
= CFG_LOSSLESS_DLRLC_PDUSIZECHG_SWITCH::OFF
= CFG_LOSSLESS_RELOC_CFG_SWITCH::OFF
= CFG_MULTI_RAB_SWITCH::ON
= CFG_PDCP_IPV6_HEAD_COMPRESS_SWITCH::OFF
= CFG_PDCP_RFC2507_HC_SWITCH::OFF
= CFG_PDCP_RFC3095_HC_SWITCH::OFF
= CFG_HSDPA_MIMO_WITH_64QAM_SWITCH::OFF
= CFG_HSDPA_DC_SWITCH::ON
= CFG_HSUPA_16QAM_SWITCH::OFF
= CFG_RAB_REL_RMV_HSPAPLUS_SWITCH::OFF
= CFG_PTT_SWITCH::OFF
= CFG_EDPCCH_BOOSTING_SWITCH::OFF
= CFG_HSDPA_DCMIMO_SWITCH::OFF
= CFG_FREE_USER_SWITCH::OFF
= CFG_DC_MIMO_DYNAMIC_SELECT_SWITCH::OFF
= CFG_HSUPA_DC_SWITCH::OFF
= CFG_HSDPA_4C_MIMO_SWITCH::OFF
= CFG_HSDPA_4C_SWITCH::OFF
= CFG_HSDPA_DBMIMO_SWITCH::OFF
= CFG_HSDPA_DB_SWITCH::OFF
= CFG_RCS_E_SWITCH::OFF
= CFG_FACH_AM_RLC_RETRANSMIT_PARA_SWITCH::OFF
= CFG_DCH_SRB_AM_RLC_RETRANS_PARA_SWITCH::OFF
= CFG_HSDPA_SFDC_SWITCH::OFF
= CFG_HSDPA_DF3C_SWITCH::OFF
= CFG_SRB_BICASTING_SWTICH::OFF
Channel Configuration Strategy Switch 1 = CFG_AM_RLC_HE_SWITCH::OFF
= CFG_FACH_TRB_RETRANSMIT_PARA_SWITCH::OFF
= CFG_RNC_TRB_RETRANSMIT_PARA_SWITCH::OFF
= CFG_HSDPA_INTERNBDB_SWITCH::OFF
= CFG_CS_AMR_DCHENH_SWITCH::OFF
= CFG_4PS_ON_ERACH_SWITCH::OFF
Dynamic Resource Allocation Switch = DRA_AQM_SWITCH::ON
= DRA_DCCC_SWITCH::ON
= DRA_HSDPA_DL_FLOW_CONTROL_SWITCH::ON
= DRA_HSDPA_STATE_TRANS_SWITCH::ON
= DRA_HSUPA_DCCC_SWITCH::ON
= DRA_HSUPA_STATE_TRANS_SWITCH::ON
= DRA_PS_BE_STATE_TRANS_SWITCH::ON
= DRA_PS_NON_BE_STATE_TRANS_SWITCH::OFF
= DRA_R99_DL_FLOW_CONTROL_SWITCH::ON
= DRA_THROUGHPUT_DCCC_SWITCH::OFF
= DRA_VOICE_SAVE_CE_SWITCH::OFF
= DRA_VOICE_TTI_RECFG_SWITCH::OFF
= DRA_BASE_COVER_BE_TTI_RECFG_SWITCH::ON
= DRA_BASE_COVER_BE_TTI_L2_OPT_SWITCH::ON
= DRA_BASE_RES_BE_TTI_RECFG_SWITCH::ON
= DRA_BASE_RES_BE_TTI_L2_OPT_SWITCH::OFF
= DRA_BASE_ADM_CE_BE_TTI_RECFG_SWITCH::ON
= DRA_BASE_ADM_CE_BE_TTI_L2_OPT_SWITCH::OFF
= DRA_IP_SERVICE_QOS_SWITCH::OFF
= DRA_DCH_THROU_DCCC_ENH_SWITCH::OFF
= DRA_CSPS_NO_PERIOD_RETRY_SWITCH::ON
= DRA_SMART_FAST_STATE_TRANS_SWITCH::OFF
= DRA_PCH_UE_SMART_P2D_SWITCH::OFF
= DRA_BASE_RES_BE_TTI_INIT_SEL_SWITCH::ON
= DRA_BASE_COVER_BE_TTI_INIT_SEL_SWITCH::OFF
= DRA_F2U_SWITCH::OFF
= DRA_BASE_LOAD_HBD_INIT_SEL_SWITCH::OFF
Dynamic Resource Allocation Switch 2 = DRA_BASE_COVER_BE_E2D_INITSEL_OPT_SWITCH::OFF
= DRA_PCPICH_ECN0_ON_RACH_UPDATE_SWITCH::ON
= DRA_BASE_COVER_BE_E2D_INITSEL_SWITCH::OFF
= DRA_BASE_COVER_BE_E2D_SWITCH::OFF
= DRA_D2F_OVER_IUR_SWITCH::OFF
= DRA_CSPS_0K_RATE_UP_SWITCH::OFF
= DRA_CSPS_BOTH_ULDL_RATE_UP_SWITCH::ON
= DRA_PS_STATE_TRANS_WHEN_CS_REL_SWITCH::ON
= DRA_BASE_COVER_E2D_DCCC_SWITCH::OFF
= DRA_WEB_FACH_DELAY_OPT_SWITCH::OFF
= DRA_D2F_LIMIT_WITH_CS_IU_CON_SWITCH::OFF
= DRA_D2P_WHEN_PS_INACT_SWITCH::OFF
= DRA_INTELL_STATE_TRANS_ON_LOAD_SWITCH::OFF
= DRA_BASE_COVER_LOAD_SRB_H2D_SWITCH::OFF
= DRA_THROUGHPUT_BE_STATE_TRANS_SWITCH::OFF
= DRA_THROUGHPUT_BE_D2F_SWITCH::OFF
= DRA_BASE_CALL_REESTABLISH_SRB_H2D_SWITCH::OFF
= DRA_RRC_FACH_NODEB_UNAVAILABLE_SWITCH::OFF
= DRA_BE_LITTLE_RATE_THD_SWITCH::OFF
= DRA_BE_INIT_BIT_RATE_TYPE_CSPS_SWITCH::OFF
= DRA_SRB_HRETRY_AFTER_RB_RFG_DRD_SWITCH::OFF
= DRA_PCH_L2_MC_REL_SWITCH::OFF
= DRA_BASE_COVER_UlR99_CQIPO_SWITCH::OFF
= DRA_BASE_LOAD_MULTI_LINK_CONTROL_SWITCH::OFF
= DRA_EFACH_D2P_DISABLE_SWITCH::OFF
= DRA_WEB_EFACH_DELAY_OPT_SWITCH::OFF
= DRA_CELL_DCCC_MC_THD_SWITCH::OFF
= DRA_SERVICE_BASED_FAST_F2D_ENH_SWITCH::OFF
= DRA_DIFF_SERVICE_ON_LOWACTIV_SWITCH::OFF
= DRA_CSPS_RATEUP_CONTROL_SWITCH::OFF
= DRA_BASE_COVER_SRB_E2D_RRC_SWITCH::OFF
Dynamic Resource Allocation Switch 3 = DRA_BASE_COVER_BE_SRB_E2D_SWITCH::OFF
CS Algorithm Switch = CS_AMRC_SWITCH::OFF
= CS_HANDOVER_TO_UTRAN_DEFAULT_CFG_SWITCH::ON
= CS_IUUP_V2_SUPPORT_SWITCH::ON
= CS_VOICE_DYN_CH_CONF_SWITCH::OFF
= CS_AMRC_WB_CMP_SWITCH::OFF
= CS_AMRC_NB_CMP_SWITCH::OFF
= CS_AMRC_WB_RATE_ADJUST_GRADUALLY_SWITCH::OFF
= CS_WAMR_SF_RECONF_SWITCH::OFF
= CS_COMB_WAMRC_SWITCH::OFF
= CS_COMB_NAMRC_SWITCH::OFF
= CS_LDR_AMR_RATEUP_OPT_SWITCH::OFF
= CS_AMR_TRFO_CMP_SWITCH::OFF
= CS_COMB_AMRC_POWERLDR_SWITCH::OFF
= CS_IMMEDIATE_RATE_CONTROL_OPT_SWITCH::OFF
= CS_TRFO_MUTI_UL_RATE_CONTROL_SWITCH::OFF
= CS_RB_AMR_TFI_CMP_SWITCH::ON
= CS_AMR_RB_RECFG_BEFORE_CONNECT_SWITCH::OFF
= CS_DLBLER_MEAS_SWITCH::OFF
= CS_AMR_WB_OPTIMIZATION_SWITCH::OFF
= CS_AMR_NB_OPTIMIZATION_SWITCH::OFF
= CS_TRFO_AMRC_DEACT_SWITCH::OFF
= CS_IMMEDIATE_RATE_CONTROL_DEACT_SWITCH::OFF
Power Control Switch = PC_DL_INNER_LOOP_PC_ACTIVE_SWITCH::ON
= PC_DOWNLINK_POWER_BALANCE_SWITCH::ON
= PC_EFACH_ECN0_DYN_ADJ_SWITCH::OFF
= PC_FP_MULTI_RLS_IND_SWITCH::ON
= PC_HSUPA_HARQNUM_AUTO_ADJUST_SWITCH::ON
= PC_INNER_LOOP_LMTED_PWR_INC_SWITCH::OFF
= PC_OLPC_SWITCH::ON
= PC_RL_RECFG_SIR_TARGET_CARRY_SWITCH::OFF
= PC_SIG_DCH_OLPC_SWITCH::OFF
= PC_UL_SIRERR_HIGH_REL_UE_SWITCH::OFF
= PC_CFG_ED_POWER_INTERPOLATION_SWITCH::OFF
= PC_HSUPA_COVER_EN_AT_POLIMIT_SWITCH::ON
= PC_HSUPA_DATA_CH_PO_ADAPTIVE_ADJ_SWITCH::OFF
= PC_HSUPA_LITRETNUM_AUTO_ADJUST_SWITCH::OFF
= PC_OLPC_FASTDOWN_OPTIMIZE_SWITCH::OFF
= PC_HSUPA_LITRETNUM_INIT_SEL_SWITCH::OFF
= PC_CQI_CYCLE_BASE_CELLLOAD_SWITCH::OFF
= PC_CQI_CYCLE_BASE_COVERAGE_SWITCH::OFF
= PC_CQI_CYCLE_BASE_CS_PLUS_PS_SWITCH::OFF
= PC_BLER_TARGET_BASE_CELLLOAD_SWITCH::OFF
= PC_HSUPA_DATA_CH_PO_INIT_SEL_SWITCH::OFF
= PC_PILOT_PO_OPTI_SWITCH::OFF
= PC_HSUPA_LOWRATE_FLEXPC_SWITCH::OFF
= PC_COMB_HSUPA_LOWRATE_FLEXPC_SWITCH::OFF
= PC_FP_MULTI_RLS_IND_SEND_TIME_OPT_SWITCH::OFF
= PC_HSUPA_RGSTEPTHDCONFIG_CORRECT_SWITCH::ON
= PC_OLPC_FASTDOWN_OPT_LIMIT_CS_SWITCH::OFF
Power Control Switch 1 = PC_OLPC_EXCLD_EMPTYRB_SWITCH::OFF
= PC_OLPC_EXCLD_EMPTYRB_ALL_SERVICE_SWITCH::OFF
= PC_HSUPA_TTI_2MS_COVER_IMP_SWITCH::ON
= PC_ASYMMETRY_MEAS_SWITCH::OFF
Compatibility Switch = CMP_IU_IMS_PROC_AS_NORMAL_PS_SWITCH::OFF
= CMP_IU_SYSHOIN_CMP_IUUP_FIXTO1_SWITCH::OFF
= CMP_IUR_H2D_FOR_LOWR5_NRNCCELL_SWITCH::OFF
= CMP_IUR_SHO_DIVCTRL_SWITCH::ON
= CMP_UU_AMR_SID_MUST_CFG_SWITCH::OFF
= CMP_UU_ADJACENT_FREQ_CM_SWITCH::OFF
= CMP_UU_IGNORE_UE_RLC_CAP_SWITCH::ON
= CMP_UU_SERV_CELL_CHG_WITH_ASU_SWITCH::OFF
= CMP_UU_SERV_CELL_CHG_WITH_RB_MOD_SWITCH::ON
= CMP_UU_VOIP_UP_PROC_AS_NORMAL_PS_SWITCH::ON
= CMP_UU_FDPCH_COMPAT_SWITCH::OFF
= CMP_UU_AMR_DRD_HHO_COMPAT_SWITCH::OFF
= CMP_IU_QOS_ASYMMETRY_IND_COMPAT_SWITCH::OFF
= CMP_F2P_PROCESS_OPTIMIZATION_SWITCH::ON
= CMP_UU_IOS_CELL_SYNC_INFO_REPORT_SWITCH::OFF
= CMP_UU_INTRA_FREQ_MC_BESTCELL_CIO_SWITCH::OFF
= CMP_UU_SIB11_SIB12_WITH_1A1D_SWITCH::OFF
= CMP_F2F_RLC_ONESIDE_REBUILD_SWITCH::OFF
= CMP_D2F_RLC_ONESIDE_REBUILD_SWITCH::ON
= CMP_RAB_5_CFG_ROHC_SWITCH::OFF
= CMP_RAB_6_CFG_ROHC_SWITCH::OFF
= CMP_RAB_7_CFG_ROHC_SWITCH::OFF
= CMP_RAB_8_CFG_ROHC_SWITCH::OFF
= CMP_RAB_9_CFG_ROHC_SWITCH::OFF
= CMP_HSUPA_MACD_FLOW_MUL_SWITCH::OFF
= CMP_SMLC_RSLT_MODE_TYPE_SWITCH::OFF
Compatibility Switch2 = CMP_RELOCIN_IUUPVER_NOTCHG_SWITCH::OFF
= CMP_IUBR_DM_RTT_ALTERNATIVE_FMT_SWITCH::OFF
= CMP_IUR_CMCF_SWITCH::OFF
= CMP_STTD_RL_ADD_SWITCH::OFF
= CMP_STTD_ASU_SWITCH::OFF
= CMP_RAB_DRD_ROLLBACK_PUNISH_SWITCH::OFF
= CMP_IUR_CELLCAP_BITMAP_TRANSFORM_SWITCH::OFF
= CMP_MOCN_PLMN_SEL_SWITCH::OFF
= CMP_LOSSLESS_RELOC_RLCPDUSIZECHG_SWITCH::OFF
= CMP_CS_FIXED_RATE_WHEN_PS_EXIST_SWITCH::OFF
= CMP_SRB_H_AMR_DRD_HHO_SWITCH::OFF
= CMP_UU_AMR_DRD_HHO_COMPAT_ENH_SWITCH::OFF
= CMP_SINGLE_PTT_USE_DL_ENL2_SWITCH::OFF
= CMP_F2D_RLC_ONESIDE_REBUILD_SWITCH::ON
= CMP_DRD_SRBOVERH_SWITCH::ON
= CMP_AMRC_FIXED_INITRATE_SWITCH::OFF
= CMP_DL_LOAD_BALANCE_SWITCH::OFF
= CMP_AMR_A_SUBFLOW_ZERO_BLOCK_SWITCH::OFF
= CMP_IUR_MULTI_RL_ADD_RETRY_SWITCH::OFF
= CMP_MBDR_CALL_TYPE_OTHER_AS_AMR_SWITCH::OFF
= CMP_SRNSR_WAMR_MODE_0_RESTORE_SWITCH::OFF
= CMP_GSM_NCELL_BAND_1900M_SWITCH::OFF
= CMP_ACTIVESET_REPORT_WITH_SYN_SWITCH::ON
= CMP_READSFN_IND_IN_SIB_SWITCH::ON
= CMP_UE_NOT_USE_DL_ENL2_EXIST_PTT_SWITCH::OFF
= CMP_RELOC_IN_FACH_DEL_DCH_SWITCH::OFF
= CMP_CELL_UPDATE_FACH_TRFFIC_MC_OPT::ON
= CMP_MR_AGPS_MC_MSG_SEND_OPT_SWITCH::OFF
Compatibility Switch3 = CMP_REL_MR_AGPS_BF_D2F_SWITCH::OFF
= CMP_MR_AGPS_NOT_SUPP_STAT_TRANS_SWITCH::OFF
= CMP_RBSETUP_DRD_SRBOVERH_SWITCH::ON
= CMP_RBCFG_DRD_SRBOVERH_SWITCH::ON
= CMP_IUPC_SUPP_ECNO_PATHLOSS_MEAS_SWITCH::OFF
= CMP_PS_RBSETUP_DRD_EXIST_IUCS_SWITCH::ON
= CMP_IUPC_DETECT_SET_PATHLOSS_MEAS_SWITCH::OFF
= CMP_IUPC_CARRY_IMSI_IMEI_SWITCH::OFF
= CMP_SIB_WITH_FILTERCOEF_SWITCH::OFF
= CMP_IUPC_PATHLOSS_CALC_OPT_SWITCH::OFF
= CMP_HO_INTER_RAT_OPT_SWITCH::OFF
Service Mapping Strategy Switch = MAP_HSUPA_TTI_2MS_SWITCH::ON
= MAP_INTER_RAT_PS_IN_CHANLE_LIMIT_SWITCH::OFF
= MAP_PS_BE_ON_E_FACH_SWITCH::OFF
= MAP_PS_STREAM_ON_E_FACH_SWITCH::OFF
= MAP_PS_STREAM_ON_HSDPA_SWITCH::ON
= MAP_PS_STREAM_ON_HSUPA_SWITCH::ON
= MAP_SRB_6800_WHEN_RAB_ON_HSDSCH_SWITCH::OFF
= MAP_SRB_ON_DCH_OR_FACH_CS_RRC_SWITCH::OFF
= MAP_CSPS_TTI_2MS_LIMIT_SWITCH::ON
= MAP_CSPS_PS_UL_USE_DCH_SWITCH::ON
= MAP_CSPS_PS_DL_USE_DCH_SWITCH::OFF
= MAP_CSPS_MC_LIMIT_SWITCH::OFF
= MAP_CSPS_RL_RESET_0K_LIMIT_SWITCH::ON
= MAP_PS_BE_SETUP_DCH0K_SWITCH::OFF
PS Rate Negotiation Switch = PS_BE_EXTRA_LOW_RATE_ACCESS_SWITCH::OFF
= PS_BE_INIT_RATE_DYNAMIC_CFG_SWITCH::OFF
= PS_BE_IU_QOS_NEG_SWITCH::ON
= PS_RAB_DOWNSIZING_SWITCH::ON
= PS_STREAM_IU_QOS_NEG_SWITCH::ON
= PS_BE_STRICT_IU_QOS_NEG_SWITCH::OFF
= HSPA_ADPTIVE_RATE_ALGO_SWITCH::OFF
= PS_CM_COV_H2D_0K_SWITCH::OFF
= PS_CMACTIVE_PROCESS_OPT_SWITCH::ON
= PS_CMTIMEOUT_UP_LIMIT_SWITCH::OFF
= PS_STREAM_IU_QOS_NEG_ENHANCE_SWITCH::OFF
= PS_STREAM_IU_QOS_RENEG_SWITCH::ON
= PS_AMBR_ENABLE_SWITCH::OFF
= PS_VIDEO_RSCP_MEAS_SWITCH::OFF
Direct Retry Switch = DR_RRC_DRD_SWITCH::ON
= DR_RAB_SING_DRD_SWITCH::ON
= DR_RAB_COMB_DRD_SWITCH::OFF
= DR_INTER_RAT_DRD_SWITCH::ON
= DR_RAB_COMB_DRD_SWITCH_FOR_CSUSER::ON
= DR_INTER_RAT_CSPS_MULTI_RAB_DRD_SWITCH::OFF
= RAB_DRD_FAIL_ROLLBACK_PUNISH_OPT_SWITCH::OFF
HandOver Switch = HO_ALGO_HCS_SPEED_EST_SWITCH::OFF
= HO_ALGO_LDR_ALLOW_SHO_SWITCH::ON
= HO_ALGO_MBMS_FLC_SWITCH::OFF
= HO_ALGO_OVERLAY_SWITCH::OFF
= HO_INTER_FREQ_HARD_HO_SWITCH::ON
= HO_LTE_SERVICE_PSHO_OUT_SWITCH::OFF
= HO_INTER_RAT_CS_OUT_SWITCH::ON
= HO_INTER_RAT_PS_3G2G_CELLCHG_NACC_SWITCH::OFF
= HO_INTER_RAT_PS_3G2G_RELOCATION_SWITCH::OFF
= HO_INTER_RAT_PS_OUT_SWITCH::ON
= HO_INTER_RAT_RNC_SERVICE_HO_SWITCH::ON
= HO_INTRA_FREQ_DETSET_INTO_ACTSET_SWITCH::ON
= HO_INTRA_FREQ_DETSET_RPRT_SWITCH::ON
= HO_INTRA_FREQ_HARD_HO_SWITCH::ON
= HO_INTRA_FREQ_RPRT_1J_SWITCH::OFF
= HO_INTRA_FREQ_SOFT_HO_SWITCH::ON
= HO_MC_MEAS_BEYOND_UE_CAP_SWITCH::OFF
= HO_MC_NCELL_COMBINE_SWITCH::ON
= HO_MC_SIGNAL_IUR_INTRA_SWITCH::ON
= HO_MC_SIGNAL_SWITCH::OFF
= HO_MC_SNA_RESTRICTION_SWITCH::OFF
= HO_LTE_PS_OUT_SWITCH::ON
= HO_LTE_SERVICE_PS_OUT_SWITCH::OFF
= HO_H2G_SRVCC_SWITCH::OFF
= HO_INTRA_FREQ_HIGHPRIOR_2D2F_SWITCH::ON
= HO_CIO_1D_USED::OFF
= HO_HCS_SPD_INI_BSD_UE_SWITCH::OFF
= HO_L2U_EMGCALL_SWITCH::OFF
= HO_UMTS_TO_LTE_FAST_RETURN_SWITCH::ON
= HO_HHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_MULTIRAB_CSPS_HO_COV_PARA_SWITCH::OFF
HandOver Switch1 = HO_COMACROMICRO_INTER_FREQ_OUT_SWITCH::OFF
= HO_U2L_REDIR_BASED_ABSOLUTE_FREQ_SWITCH::ON
= HO_U2L_COV_PS_REDIRECT_SWITCH::OFF
= HO_U2L_COV_PS_HO_SWITCH::OFF
= HO_INTER_RAT_PENALTY_FOR_UNCFG_SWITCH::OFF
= HO_CS_IRATHHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_PS_IRATHHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_MC_INTRAFREQ_NCELL_COMBINE_SWITCH::ON
= HO_MC_INTERFREQ_NCELL_COMBINE_SWITCH::ON
= HO_MC_GSM_NCELL_COMBINE_SWITCH::ON
= HO_MC_LTE_NCELL_COMBINE_SWITCH::OFF
= HO_U2L_LOAD_PS_HO_SWITCH::OFF
= HO_U2L_LOAD_PS_REDIRECT_SWITCH::OFF
= HO_INTRA_FREQ_DETSET_INTO_ACTSET_OPTSWH::OFF
= HO_INTRA_DETSET_DRNC_CELL_INTO_ACTSET::OFF
= HO_1A_OR_1C_TRIG_SERV_CELL_CHG_SWITCH::OFF
= HO_1D_TRIG_SERV_CELL_CHG_JUDGE_SWITCH::OFF
= HO_SPID_MM_SWITCH::OFF
= HO_SRV_CELL_CHG_1D_RSCP_SWITCH::OFF
= HO_IUR_U2L_REDIR_SWITCH::ON
= HO_IUR_U2L_FAST_RETURN_SWITCH::ON
= HO_LTE_SERVICE_NEED_RSCP_SWITCH::OFF
= HO_GSMNCELL_OPGRP_CARRY_OVER_IUR_SWITCH::OFF
= HO_INTER_RAT_DRNC_GSMNCELL_FILTER_SWITCH::OFF
= HO_MC_INTRAFREQ_1A_REPLACE_1C_SWITCH::OFF
= HO_U2L_CONN_PRIO_SWITCH::OFF
= HO_GSMNCELL_OPGRP_CARRY_OVER_IUR_SWITCH2::OFF
= HO_SRVCC_FAST_RETURN_TO_LTE_SWITCH::OFF
= HO_CSFB_BASED_MEAS_FAST_RETURN_SWITCH::OFF
= HO_CSFB_BASED_RSCP_FAST_RETURN_SWITCH::ON
= HO_HANDOVER_FAST_RETURN_TO_LTE_SWITCH::OFF
HandOver Switch2 = HO_UL_UOLC_SWITCH::OFF
= HO_DC_HSUPA_IND_TWO_ACTIVESET::OFF
= HO_MC_EXT_LTE_BAND_SWITCH::ON
= HO_U2L_BASE_UE_LTE_MEAS_CAP_SWITCH::ON
= HO_REPORT_SWITCH::OFF
= HO_IMSI_MM_SWITCH::OFF
= HO_IUR_U2L_HO_SWITCH::OFF
= HO_IUR_PLMN_FILTER_SWITCH::OFF
= L2U_MLB_HO_IN_DED_PRIO_SWITCH::OFF
= HO_DL_SEC_FREQ_HO_SWITCH::OFF
= HO_CSFB_BASED_GRID_FAST_RETURN_SWITCH::OFF
= HO_U2L_SUPPORT_MULTI_BAND_SWITCH::OFF
= HO_IUR_U2L_SUPPORT_MULTI_BAND_SWITCH::OFF
= HO_MC_INTERFREQ_NCELL_CMB_OPT_SWITCH::OFF
= HO_INTER_FREQ_IUR_CTRL_SWITCH::OFF
= HO_GRID_BASED_LTE_SERVICE_PS_OUT_SWITCH::OFF
= HO_HSM_UE_INTRAHO_OPT_SWITCH::OFF
= HO_HSM_UE_STATIS_SWITCH::OFF
SRNSR Algorithm Switch = SRNSR_DSCR_IUR_RESRCE_SWITCH::ON
= SRNSR_DSCR_LOC_SEPRAT_SWITCH::ON
= SRNSR_DSCR_PROPG_DELAY_SWITCH::ON
= SRNSR_DSCR_SEPRAT_DUR_SWITCH::ON
= CU_WITH_RELOC_FOR_NO_NRNCCELL_CFG_SWITCH::OFF
= CU_WITH_RELOC_OPT_SWITCH::OFF
= SRNSR_DSCR_NOCFG_NRNC_CELL_SWITCH::OFF
CMCF Algorithm Switch = CMCF_DL_HLS_SWITCH::ON
= CMCF_UL_HLS_SWITCH::ON
= CMCF_UL_PRECFG_TOLERANCE_SWITCH::OFF
= CMCF_WITHOUT_UE_CAP_REPORT_SWITCH::OFF
= CMCF_UE_STATE_TRANS_COV_SWITCH::OFF
= CMCF_UE_STATE_TRANS_NCOV_SWITCH::OFF
Inter-RAT Incoming HO CFG Switch = IRAT_HO_CFG_HSDPA_64QAM_SWITCH::OFF
= IRAT_HO_CFG_HSUPA_16QAM_SWITCH::OFF
= IRAT_HO_CFG_HSUPA_TTI_2MS_SWITCH::OFF
= IRAT_HO_CFG_PRECFG_PARA_OPT_SWITCH::OFF
= L2U_HO_CFG_HSDPA_DC_SWITCH::OFF
CORRM Algorithm Reserved Switch 0 = RESERVED_SWITCH_0_BIT1::OFF
= RESERVED_SWITCH_0_BIT2::ON
= RESERVED_SWITCH_0_BIT3::OFF
= RESERVED_SWITCH_0_BIT4::OFF
= RESERVED_SWITCH_0_BIT5::OFF
= RESERVED_SWITCH_0_BIT6::OFF
= RESERVED_SWITCH_0_BIT7::OFF
= RESERVED_SWITCH_0_BIT8::OFF
= RESERVED_SWITCH_0_BIT9::OFF
= RESERVED_SWITCH_0_BIT10::OFF
= RESERVED_SWITCH_0_BIT11::ON
= RESERVED_SWITCH_0_BIT12::OFF
= RESERVED_SWITCH_0_BIT13::OFF
= RESERVED_SWITCH_0_BIT14::OFF
= RESERVED_SWITCH_0_BIT15::ON
= RESERVED_SWITCH_0_BIT16::OFF
= RESERVED_SWITCH_0_BIT17::OFF
= RESERVED_SWITCH_0_BIT18::OFF
= RESERVED_SWITCH_0_BIT19::ON
= RESERVED_SWITCH_0_BIT20::OFF
= RESERVED_SWITCH_0_BIT21::OFF
= RESERVED_SWITCH_0_BIT22::OFF
= RESERVED_SWITCH_0_BIT23::OFF
= RESERVED_SWITCH_0_BIT24::OFF
= RESERVED_SWITCH_0_BIT25::OFF
= RESERVED_SWITCH_0_BIT26::OFF
= RESERVED_SWITCH_0_BIT27::OFF
= RESERVED_SWITCH_0_BIT28::OFF
= RESERVED_SWITCH_0_BIT29::OFF
= RESERVED_SWITCH_0_BIT30::OFF
= RESERVED_SWITCH_0_BIT31::OFF
= RESERVED_SWITCH_0_BIT32::OFF
CORRM Algorithm Reserved Switch 1 = RESERVED_SWITCH_1_BIT1::ON
= RESERVED_SWITCH_1_BIT2::ON
= RESERVED_SWITCH_1_BIT3::ON
= RESERVED_SWITCH_1_BIT4::ON
= RESERVED_SWITCH_1_BIT5::ON
= RESERVED_SWITCH_1_BIT6::ON
= RESERVED_SWITCH_1_BIT7::ON
= RESERVED_SWITCH_1_BIT8::ON
= RESERVED_SWITCH_1_BIT9::ON
= RESERVED_SWITCH_1_BIT10::ON
= RESERVED_SWITCH_1_BIT11::ON
= RESERVED_SWITCH_1_BIT12::ON
= RESERVED_SWITCH_1_BIT13::ON
= RESERVED_SWITCH_1_BIT14::ON
= RESERVED_SWITCH_1_BIT15::ON
= RESERVED_SWITCH_1_BIT16::ON
= RESERVED_SWITCH_1_BIT17::ON
= RESERVED_SWITCH_1_BIT18::ON
= RESERVED_SWITCH_1_BIT19::ON
= RESERVED_SWITCH_1_BIT20::ON
= RESERVED_SWITCH_1_BIT21::ON
= RESERVED_SWITCH_1_BIT22::ON
= RESERVED_SWITCH_1_BIT23::ON
= RESERVED_SWITCH_1_BIT24::ON
= RESERVED_SWITCH_1_BIT25::ON
= RESERVED_SWITCH_1_BIT26::ON
= RESERVED_SWITCH_1_BIT27::ON
= RESERVED_SWITCH_1_BIT28::ON
= RESERVED_SWITCH_1_BIT29::ON
= RESERVED_SWITCH_1_BIT30::ON
= RESERVED_SWITCH_1_BIT31::ON
= RESERVED_SWITCH_1_BIT32::ON
CORRM Algorithm Reserved U32 Parameters 0 = 0
CORRM Algorithm Reserved U8 Parameters 0 = 0
CORRM Algorithm Reserved U8 Parameters 1 = 255
(Number of results = 1)

#NAME?
LST UUESTATETRANSTIMER:; LST UUESTATETRANSTIMER:;
iHNHM3H MBNAVI1H
+++ HUAWEI6900 2020-03-10 09:42:32 +++ MBSCBSC6900 2020-03-10 09:49:36
O&M #13910213 O&M #12615911
%%/*1880619146*/LST UUESTATETRANSTIMER:;%% %%/*1883342170*/LST UUESTATETRANSTIMER:;%%
RETCODE = 0 Execution succeeded. RETCODE = 0 Execution succeeded.

List UE State Transition Timer Parameters List UE State Transition Timer Parameters
----------------------------------------- -----------------------------------------
Cell Reselection Timer = 180 Cell Reselection Timer = 180
BE DCH to FACH Transition Timer = 5 BE DCH to FACH Transition Timer = 5
BE FACH or E_FACH to PCH Transition Timer = 65535 BE FACH or E_FACH to PCH Transition Timer = 65535
BE HS-DSCH to FACH Transition Timer = 5 BE HS-DSCH to FACH Transition Timer = 5
Realtime DCH or HSPA To FACH Transition Timer = 180 Realtime DCH or HSPA To FACH Transition Timer = 180
BE E-DCH to FACH State Transition Timer = 2 BE E-DCH to FACH State Transition Timer = 2
BE CPC to FACH Transition Timer = 5 BE CPC to FACH Transition Timer = 5
Realtime CPC to FACH Transition Timer = 180 Realtime CPC to FACH Transition Timer = 180
BE DCH to E_FACH Transition Timer = 5 BE DCH to E_FACH Transition Timer = 5
BE HSPA to E_FACH Transition Timer = 5 BE HSPA to E_FACH Transition Timer = 5
Realtime DCH or HSPA to E_FACH Transition Timer = 180 Realtime DCH or HSPA to E_FACH Transition Timer = 180
BE CPC to E_FACH Transition Timer = 5 BE CPC to E_FACH Transition Timer = 5
Realtime CPC to E_FACH Transition Timer = 180 Realtime CPC to E_FACH Transition Timer = 180
BE Abnormal AI-based H2F Timer = 31 BE Abnormal AI-based H2F Timer = 31
Inactive FACH to PCH Transition Timer = 10 Inactive FACH to PCH Transition Timer = 10
PS Inactivity Timer for D2P = 2 PS Inactivity Timer for D2P = 2
BE D/H2F State Transition Timer in High Load = 1 BE D/H2F State Transition Timer in High Load = 1
Event 4A Discard Timer for RB Parking UE = 60 Event 4A Discard Timer for RB Parking UE = 60
BE D2F/P Throughput-based Measurement Timer = 2 BE D2F/P Throughput-based Measurement Timer = 2
Throughput-based D2F/P Timer for BE with CPC = 10 Throughput-based D2F/P Timer for BE with CPC = 10
(Number of results = 1) (Number of results = 1)

#NAME? #NAME?
ANSTIMER:;%%

ion Timer = 65535

ition Timer = 180

Timer = 180

sition Timer = 180

n Timer = 180

king UE = 60
ement Timer = 2
E with CPC = 10
LST UPSINACTTIMER:; LST UPSINACTTIMER:;
MBNAVI1H iHNHM3H
+++ MBSCBSC6900 2020-03-10 09:51:45 +++ HUAWEI6900 2020-03-10 09:52:26
O&M #12615913 O&M #13910224
%%/*1883342171*/LST UPSINACTTIMER:;%% %%/*1880619148*/LST UPSINACTTIMER:;%%
RETCODE = 0 Execution succeeded. RETCODE = 0 Execution succeeded.

List PS User Inactive Detecting Timer List PS User Inactive Detecting Timer
------------------------------------- -------------------------------------
Conversational service T1 = 10 Conversational service T1 = 20
Conversational service T2 = 10 Conversational service T2 = 20
Streaming service T1 = 10 Streaming service T1 = 20
Streaming service T2 = 10 Streaming service T2 = 20
Interactive service T1 = 10 Interactive service T1 = 10
Interactive service T2 = 10 Interactive service T2 = 10
Background service T1 = 10 Background service T1 = 10
Background service T2 = 10 Background service T2 = 10
FAST DORMANCY USER T1 in CELL_PCH = 10 FAST DORMANCY USER T1 in CELL_PCH = 10
IMS signal T2 = 20 IMS signal T2 = 20
IMS signal T1 = 20 IMS signal T1 = 20
FAST DORMANCY USER T1 in CELL_DCH = 2 FAST DORMANCY USER T1 in CELL_DCH = 2
FAST DORMANCY USER T1 in CELL_FACH = 5 FAST DORMANCY USER T1 in CELL_FACH = 5
Inactivity Timer for CELL_DCH UEs in High Load = 2 Inactivity Timer for CELL_DCH UEs in High Load = 2
T1 for PS Services on 0K DCH = 7 T1 for PS Services on 0K DCH = 0
(Number of results = 1) (Number of results = 1)

#NAME? #NAME?
LST UUESTATETRANS:;
iHNHM3H
+++ HUAWEI6900 2020-03-10 14:29:13
O&M #13910819
%%/*1880619374*/LST UUESTATETRANS:;%%
RETCODE = 0 Execution succeeded.

List UE State Transition Parameters


-----------------------------------
Cell Reselection Counter Threshold = 9
Redundancy Coeff for State Transition = 80
BE D2F/R or F/R2P 4B Threshold = D64
BE D2F/R 4B Time = D5000
BE D2F/R 4B Pending Time = D1000
BE F2P 4B Time = D5000
BE F2P 4B Pending Time = D1000
BE F/R2D 4A Threshold = D1024
BE F/R2D 4A Time = D0
BE HS-DSCH2F 4B Threshold = D64
BE HS-DSCH2F 4B Time = D5000
BE HS-DSCH2F 4B Pending Time = D1000
BE F2HS-DSCH 4A Threshold = D1024
BE F2HS-DSCH 4A Time = D0
RT D/HSPA2F 4B Threshold = D64
RT D/HSPA2F 4B Time = D5000
RT D/HSPA2F 4B Pending Time = D16000
RT F2D/HSPA 4A Threshold = D1024
RT F2D/HSPA 4A Time = D240
E-DCH Throu Meas Period = 30
E-DCH2F 4B Threshold = 8
E-DCH2F 4B Period Amount = 2
E-DCH2F 4B Pending Period Amount = 4
BE F2E-DCH 4A Threshold = D1024
BE F2E-DCH 4A Time = D0
BE F2CPC_HS-DSCH 4A Threshold = D512
BE F2CPC_HS-DSCH 4A Time = D0
RT F2CPC_HSPA 4A Threshold = D512
RT F2CPC_HSPA 4A Time = D0
BE F2CPC_E-DCH 4A Threshold = D512
BE FACH2CPC_E-DCH 4A Time = D0
BE E_FACH2D 4A Threshold = D512
BE E_FACH2D 4A Time = D0
BE E_FACH2HS-DSCH 4A Threshold = D512
BE E_FACH2HS-DSCH 4A Time = D0
RT E_FACH2D/HSPA 4A Threshold = D512
RT E_FACH2D/HSPA 4A Time = D0
BE E_FACH2CPC 4A Threshold = D512
BE E_FACH2CPC 4A Time = D0
RT E_FACH2CPC_HSPA 4A Threshold = D512
RT E_FACH2CPC_HSPA 4A Time = D0
Fast Dormancy User FACH/E_FACH2DCH/HSPA 4A Threshold = D512
BE HSDPA Traffic Volume 4A Threshold = D1024
BE HSUPA Throu 4A Threshold = 64
Tx Interruption After Trigger = D2000
BE FACH2DCH/HSPA 4A Threshold = D512
Threshold for Smart P2D = 51
F2D Threshold Based Waiting Time = 0
F2D Penalty Time Based Waiting Time = 30
BE Abnormal AI-based H2F High Throughput Thld = 8
BE Abnormal AI-based H2F Low Throughput Thld = 8
BE Abnormal AI-based H2F High Traffic Thld = 102
BE Abnormal AI-based H2F Low Traffic Thld = 102
BE Abnormal H2F Penalty Timer = 60
H2F HSUPA Throu 4A Period Amount = 2
BE F2D/H Suspend Time After 4A of RB Parking UE = D16000
TRB BE F2D/H Suspend Time After 4A of RB Parking UE = D16000
4A Threshold for BE F2D/H of RB Parking UE = D16
4B Threshold for BE F2P of RB Parking UE = D8
DL BE F2D/H 4A Threshold in High Load = D512
UL BE F2D/E 4A Threshold in High Load = D256
RLC Retrans No. Factor for F2D on TX Waiting Time = 0
F2D Penalty Time based on TX Waiting Time = 0
E-RACH2E UL Event 4A Thld for BE Service = D1024
E-RACH2D Event 4A Thld for BE Service = D512
E-RACH2H DL Event 4A Thld for BE Service = D512
E-RACH2CPC UL Event 4A Thld for BE Service = D512
E-RACH2CPC DL Event 4A Thld for BE Service = D512
E-RACH2CELL_DCH UL Event 4A Thld for FD UE = D512
BE Low Throughput Threshold for D2F/P = 0
BE D2F/P Throughput-based Sub-Measure Period = 500
Pending Time for BE Low Throughput Indication = 10
BE D2F Abnormal Low Throughout Event Number = 2
UL Actual Load State for P2D = UL_NORMAL_STATE
DL Non-HSPA Power Load State for P2D = DL_NORMAL_STATE
ICR UE 4A Event Thld = D64
HSDPA low throughput threshold = 0
(Number of results = 1)

#NAME?
LST UCORRMALGOSWITCH:; LST UCORRMALGOSWITCH:; LST UCORRMALGOSWITCH:;
iHNHM3H MBNAVI1H RHNCG1H
= DRA_F2U_SWITCH = DRA_F2U_SWITCH = DRA_F2U_SW
= DRA_BASE = DRA_BASE = DRA_BASE
Dynamic Resource Allocation Switch 2 = D Dynamic Resource Allocation Switch 2 = D Dynamic Resource Allocation Switch 2 = D
= DRA_PCP = DRA_PCP = DRA_PCP
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_BASE_ = DRA_BASE_ = DRA_BASE_
= DRA_D2F_OV = DRA_D2F_OV = DRA_D2F_OV
= DRA_CSPS_0 = DRA_CSPS_0 = DRA_CSPS_0
= DRA_CSPS = DRA_CSPS = DRA_CSPS
= DRA_PS_ = DRA_PS_ = DRA_PS_
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_WEB_ = DRA_WEB_ = DRA_WEB_
= DRA_D2F_ = DRA_D2F_ = DRA_D2F_
= DRA_D2P_W = DRA_D2P_W = DRA_D2P_W
= DRA_INT = DRA_INT = DRA_INT
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_THR = DRA_THR = DRA_THR
= DRA_THRO = DRA_THRO = DRA_THRO
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_RRC = DRA_RRC = DRA_RRC
= DRA_BE_LI = DRA_BE_LI = DRA_BE_LI
= DRA_BE_I = DRA_BE_I = DRA_BE_I
= DRA_SRB = DRA_SRB = DRA_SRB
= DRA_PCH_L2 = DRA_PCH_L2 = DRA_PCH_L2
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_EFACH = DRA_EFACH = DRA_EFACH
= DRA_WEB_ = DRA_WEB_ = DRA_WEB_
= DRA_CELL_ = DRA_CELL_ = DRA_CELL_
= DRA_SER = DRA_SER = DRA_SER
= DRA_DIFF = DRA_DIFF = DRA_DIFF
= DRA_CSPS = DRA_CSPS = DRA_CSPS
= DRA_BASE = DRA_BASE = DRA_BASE
Dynamic Resource Allocation Switch 3 = D Dynamic Resource Allocation Switch 3 = D Dynamic Resource Allocation Switch 3 = D
CS Algorithm Switch = CS_AMRC CS Algorithm Switch = CS_AMRC CS Algorithm Switch = CS_AM
= CS_HAN = CS_HAN = CS_HAN
= CS_IUUP_V2 = CS_IUUP_V2 = CS_IUUP_V2
= CS_VOICE_ = CS_VOICE_ = CS_VOICE_
= CS_AMRC_WB = CS_AMRC_WB = CS_AMRC_WB
= CS_AMRC_NB_ = CS_AMRC_NB_ = CS_AMRC_NB
= CS_AMR = CS_AMR = CS_AMR
= CS_WAMR_S = CS_WAMR_S = CS_WAMR_S
= CS_COMB_WA = CS_COMB_WA = CS_COMB_WA
= CS_COMB_NA = CS_COMB_NA = CS_COMB_NA
= CS_LDR_AM = CS_LDR_AM = CS_LDR_AM
= CS_AMR_TRF = CS_AMR_TRF = CS_AMR_TRF
= CS_COMB_ = CS_COMB_ = CS_COMB_
= CS_IMME = CS_IMME = CS_IMME
= CS_TRFO = CS_TRFO = CS_TRFO
= CS_RB_AMR_ = CS_RB_AMR_ = CS_RB_AMR_
= CS_AMR_ = CS_AMR_ = CS_AMR_
= CS_DLBLER_M = CS_DLBLER_M = CS_DLBLER_M
= CS_AMR_WB = CS_AMR_WB = CS_AMR_WB
= CS_AMR_NB = CS_AMR_NB = CS_AMR_NB
= CS_TRFO_A = CS_TRFO_A = CS_TRFO_A
= CS_IMME = CS_IMME = CS_IMME
Power Control Switch = PC_D Power Control Switch = PC_D Power Control Switch = PC_D
= PC_DOWN = PC_DOWN = PC_DOWN
= PC_EFACH_ = PC_EFACH_ = PC_EFACH_
= PC_FP_MULT = PC_FP_MULT = PC_FP_MULT
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_INNE = PC_INNE = PC_INNE
= PC_OLPC_SWITCH = PC_OLPC_SWITCH = PC_OLPC_SW
= PC_RL_RE = PC_RL_RE = PC_RL_RE
= PC_SIG_DCH_ = PC_SIG_DCH_ = PC_SIG_DCH_
= PC_UL_SIR = PC_UL_SIR = PC_UL_SIR
= PC_CFG_ = PC_CFG_ = PC_CFG_
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_OLPC_ = PC_OLPC_ = PC_OLPC_
= PC_HSUPA_ = PC_HSUPA_ = PC_HSUPA_
= PC_CQI_CY = PC_CQI_CY = PC_CQI_CY
= PC_CQI_C = PC_CQI_C = PC_CQI_C
= PC_CQI_C = PC_CQI_C = PC_CQI_C
= PC_BLER_ = PC_BLER_ = PC_BLER_
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_PILOT_PO = PC_PILOT_PO = PC_PILOT_PO
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_COMB = PC_COMB = PC_COMB
= PC_FP_M = PC_FP_M = PC_FP_M
= PC_HSU = PC_HSU = PC_HSU
= PC_OLPC = PC_OLPC = PC_OLPC
Power Control Switch 1 = PC_O Power Control Switch 1 = PC_O Power Control Switch 1 = PC_O
= PC_OLPC = PC_OLPC = PC_OLPC
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_ASYMMET = PC_ASYMMET = PC_ASYMMET
Compatibility Switch = CMP_ Compatibility Switch = CMP_ Compatibility Switch = CMP_
= CMP_IU_S = CMP_IU_S = CMP_IU_S
= CMP_IUR = CMP_IUR = CMP_IUR
= CMP_IUR_SH = CMP_IUR_SH = CMP_IUR_SH
= CMP_UU_A = CMP_UU_A = CMP_UU_A
= CMP_UU_A = CMP_UU_A = CMP_UU_A
= CMP_UU_I = CMP_UU_I = CMP_UU_I
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU = CMP_UU = CMP_UU
= CMP_UU = CMP_UU = CMP_UU
= CMP_UU_FD = CMP_UU_FD = CMP_UU_FD
= CMP_UU_ = CMP_UU = CMP_UU
= CMP_IU = CMP_IU = CMP_IU
= CMP_F2P_ = CMP_F2P_ = CMP_F2P_
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU_S = CMP_UU_S = CMP_UU_S
= CMP_F2F_ = CMP_F2F_ = CMP_F2F_
= CMP_D2F_ = CMP_D2F_ = CMP_D2F_
= CMP_RAB_5 = CMP_RAB_5 = CMP_RAB_5
= CMP_RAB_6 = CMP_RAB_6 = CMP_RAB_6
= CMP_RAB_7 = CMP_RAB_7 = CMP_RAB_7
= CMP_RAB_8 = CMP_RAB_8 = CMP_RAB_8
= CMP_RAB_9 = CMP_RAB_9 = CMP_RAB_9
= CMP_HSU = CMP_HSU = CMP_HSU
= CMP_SMLC = CMP_SMLC = CMP_SMLC
Compatibility Switch2 = CMP_ Compatibility Switch2 = CMP_ Compatibility Switch2 = CMP_
= CMP_IUB = CMP_IUB = CMP_IUB
= CMP_IUR_CMCF = CMP_IUR_CMCF = CMP_IUR_CM
= CMP_STTD_R = CMP_STTD_R = CMP_STTD_R
= CMP_STTD_AS = CMP_STTD_AS = CMP_STTD_A
= CMP_RAB = CMP_RAB = CMP_RAB
= CMP_IUR = CMP_IUR = CMP_IUR
= CMP_MOCN_ = CMP_MOCN_ = CMP_MOCN_
= CMP_LOS = CMP_LOS = CMP_LOS
= CMP_CS_ = CMP_CS_ = CMP_CS_
= CMP_SRB_ = CMP_SRB_ = CMP_SRB_
= CMP_UU = CMP_UU = CMP_UU
= CMP_SING = CMP_SING = CMP_SING
= CMP_F2D_ = CMP_F2D_ = CMP_F2D_
= CMP_DRD_SR = CMP_DRD_SR = CMP_DRD_SR
= CMP_AMRC_ = CMP_AMRC_ = CMP_AMRC_
= CMP_DL_LO = CMP_DL_LO = CMP_DL_LO
= CMP_AMR = CMP_AMR = CMP_AMR
= CMP_IUR_ = CMP_IUR_ = CMP_IUR_
= CMP_MB = CMP_MB = CMP_MB
= CMP_SR = CMP_SR = CMP_SR
= CMP_GSM_ = CMP_GSM_ = CMP_GSM_
= CMP_ACT = CMP_ACT = CMP_ACT
= CMP_READS = CMP_READS = CMP_READS
= CMP_UE_ = CMP_UE_ = CMP_UE_
= CMP_RELO = CMP_RELO = CMP_RELO
= CMP_CELL = CMP_CELL = CMP_CELL
= CMP_MR_ = CMP_MR_ = CMP_MR_
Compatibility Switch3 = CMP_R Compatibility Switch3 = CMP_R Compatibility Switch3 = CMP_R
= CMP_MR = CMP_MR = CMP_MR
= CMP_RBSE = CMP_RBSE = CMP_RBSE
= CMP_RBCF = CMP_RBCF = CMP_RBCF
= CMP_IUP = CMP_IUP = CMP_IUP
= CMP_PS_R = CMP_PS_R = CMP_PS_R
= CMP_IUP = CMP_IUP = CMP_IUP
= CMP_IUPC_ = CMP_IUPC_ = CMP_IUPC_
= CMP_SIB_W = CMP_SIB_W = CMP_SIB_W
= CMP_IUPC = CMP_IUPC = CMP_IUPC
= CMP_HO_IN = CMP_HO_IN = CMP_HO_IN
Service Mapping Strategy Switch = MAP Service Mapping Strategy Switch = MAP Service Mapping Strategy Switch = MA
= MAP_INTE = MAP_INTE = MAP_INTE
= MAP_PS_BE = MAP_PS_BE = MAP_PS_BE
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_SR = MAP_SR = MAP_SR
= MAP_SRB = MAP_SRB = MAP_SRB
= MAP_CSPS_T = MAP_CSPS_T = MAP_CSPS_T
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_CSPS_MC = MAP_CSPS_MC = MAP_CSPS_M
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_PS_BE = MAP_PS_BE = MAP_PS_BE
PS Rate Negotiation Switch = PS_ PS Rate Negotiation Switch = PS_ PS Rate Negotiation Switch = PS_
= PS_BE_IN = PS_BE_IN = PS_BE_IN
= PS_BE_IU_QO = PS_BE_IU_QO = PS_BE_IU_QO
= PS_RAB_DOW = PS_RAB_DOW = PS_RAB_DOW
= PS_STREAM = PS_STREAM = PS_STREAM
= PS_BE_STR = PS_BE_STR = PS_BE_STR
= HSPA_ADPT = HSPA_ADPT = HSPA_ADPT
= PS_CM_COV_ = PS_CM_COV_ = PS_CM_COV_
= PS_CMACTI = PS_CMACTI = PS_CMACTI
= PS_CMTIME = PS_CMTIME = PS_CMTIME
= PS_STRE = PS_STRE = PS_STRE
= PS_STREAM = PS_STREAM = PS_STREAM
= PS_AMBR_ENA = PS_AMBR_ENA = PS_AMBR_EN
= PS_VIDEO_R = PS_VIDEO_R = PS_VIDEO_R
Direct Retry Switch = DR_RRC_ Direct Retry Switch = DR_RRC_ Direct Retry Switch = DR_RRC
= DR_RAB_SIN = DR_RAB_SIN = DR_RAB_SIN
= DR_RAB_COM = DR_RAB_COM = DR_RAB_COM
= DR_INTER_R = DR_INTER_R = DR_INTER_R
= DR_RAB_ = DR_RAB_ = DR_RAB_
= DR_INTE = DR_INTE = DR_INTE
= RAB_DRD = RAB_DRD = RAB_DRD
HandOver Switch = HO_AL HandOver Switch = HO_AL HandOver Switch = HO_AL
= HO_ALGO_ = HO_ALGO_ = HO_ALGO_
= HO_ALGO_MB = HO_ALGO_MB = HO_ALGO_MB
= HO_ALGO_OV = HO_ALGO_OV = HO_ALGO_OV
= HO_INTER = HO_INTER = HO_INTER
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_INTE = HO_INTE = HO_INTE
= HO_INTE = HO_INTE = HO_INTE
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_INTER = HO_INTER = HO_INTER
= HO_INTR = HO_INTR = HO_INTR
= HO_INTRA = HO_INTRA = HO_INTRA
= HO_INTRA = HO_INTRA = HO_INTRA
= HO_INTRA_ = HO_INTRA_ = HO_INTRA_
= HO_INTRA_ = HO_INTRA_ = HO_INTRA_
= HO_MC_M = HO_MC_M = HO_MC_M
= HO_MC_NCE = HO_MC_NCE = HO_MC_NCE
= HO_MC_SIG = HO_MC_SIG = HO_MC_SIG
= HO_MC_SIGNAL = HO_MC_SIGNAL = HO_MC_SIGN
= HO_MC_SNA = HO_MC_SNA = HO_MC_SNA
= HO_LTE_PS_O = HO_LTE_PS_O = HO_LTE_PS_O
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_H2G_SRVC = HO_H2G_SRVC = HO_H2G_SRV
= HO_INTR = HO_INTRA = HO_INTRA
= HO_CIO_1D_USED = HO_CIO_1D_USED = HO_CIO_1D_
= HO_HCS_SP = HO_HCS_SP = HO_HCS_SP
= HO_L2U_EMGC = HO_L2U_EMGC = HO_L2U_EMG
= HO_UMTS = HO_UMTS = HO_UMTS
= HO_HHO_ = HO_HHO_ = HO_HHO_
= HO_MULT = HO_MULT = HO_MULT
HandOver Switch1 = HO HandOver Switch1 = HO HandOver Switch1 = HO
= HO_U2L_ = HO_U2L_ = HO_U2L_
= HO_U2L_CO = HO_U2L_CO = HO_U2L_CO
= HO_U2L_COV = HO_U2L_COV = HO_U2L_COV
= HO_INTE = HO_INTE = HO_INTE
= HO_CS_ = HO_CS_ = HO_CS_
= HO_PS_ = HO_PS_ = HO_PS_
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_MC_GS = HO_MC_GS = HO_MC_GS
= HO_MC_LT = HO_MC_LT = HO_MC_LT
= HO_U2L_LOA = HO_U2L_LOA = HO_U2L_LOA
= HO_U2L_LO = HO_U2L_LO = HO_U2L_LO
= HO_INT = HO_INT = HO_INT
= HO_INTR = HO_INTR = HO_INTR
= HO_1A_O = HO_1A_O = HO_1A_O
= HO_1D_T = HO_1D_T = HO_1D_T
= HO_SPID_MM_S = HO_SPID_MM_S = HO_SPID_MM
= HO_SRV_CE = HO_SRV_CE = HO_SRV_CE
= HO_IUR_U2L_ = HO_IUR_U2L_ = HO_IUR_U2L_
= HO_IUR_U2 = HO_IUR_U2 = HO_IUR_U2
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_GSM = HO_GSM = HO_GSM
= HO_INTE = HO_INTE = HO_INTE
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_U2L_CON = HO_U2L_CON = HO_U2L_CON
= HO_GSM = HO_GSM = HO_GSM
= HO_SRVC = HO_SRVC = HO_SRVC
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_HAN = HO_HAN = HO_HAN
HandOver Switch2 = HO_UL_ HandOver Switch2 = HO_UL_ HandOver Switch2 = HO_UL
= HO_DC_HSU = HO_DC_HSU = HO_DC_HSU
= HO_MC_EXT = HO_MC_EXT = HO_MC_EXT
= HO_U2L_B = HO_U2L_B = HO_U2L_B
= HO_REPORT_SW = HO_REPORT_SW = HO_REPORT_
= HO_IMSI_MM_S = HO_IMSI_MM_S = HO_IMSI_MM
= HO_IUR_U2L_ = HO_IUR_U2L_ = HO_IUR_U2L_
= HO_IUR_PLM = HO_IUR_PLM = HO_IUR_PLM
= L2U_MLB_H = L2U_MLB_H = L2U_MLB_H
= HO_DL_SEC_ = HO_DL_SEC_ = HO_DL_SEC_
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_U2L_S = HO_U2L_S = HO_U2L_S
= HO_IUR_ = HO_IUR_ = HO_IUR_
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_GRID = HO_GRID = HO_GRID
= HO_HSM_U = HO_HSM_U = HO_HSM_U
= HO_HSM_UE_ = HO_HSM_UE_ = HO_HSM_UE_
SRNSR Algorithm Switch = SRN SRNSR Algorithm Switch = SRN SRNSR Algorithm Switch = SRN
= SRNSR_DSC = SRNSR_DSC = SRNSR_DSC
= SRNSR_DS = SRNSR_DS = SRNSR_DS
= SRNSR_DSC = SRNSR_DSC = SRNSR_DSC
= CU_WIT = CU_WIT = CU_WIT
= CU_WITH_RE = CU_WITH_RE = CU_WITH_RE
= SRNSR_DS = SRNSR_DS = SRNSR_DS
CMCF Algorithm Switch = CMCF_ CMCF Algorithm Switch = CMCF_ CMCF Algorithm Switch = CMCF
= CMCF_UL_HLS_ = CMCF_UL_HLS_ = CMCF_UL_HL
= CMCF_UL_ = CMCF_UL_ = CMCF_UL_
= CMCF_WI = CMCF_WI = CMCF_WI
= CMCF_UE_ = CMCF_UE_ = CMCF_UE_
= CMCF_UE_ = CMCF_UE_ = CMCF_UE_
Inter-RAT Incoming HO CFG Switch = I Inter-RAT Incoming HO CFG Switch = I Inter-RAT Incoming HO CFG Switch = I
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= L2U_HO_CF = L2U_HO_CF = L2U_HO_CF
CORRM Algorithm Reserved Switch 0 = RE CORRM Algorithm Reserved Switch 0 = RE CORRM Algorithm Reserved Switch 0 =
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
CORRM Algorithm Reserved Switch 1 = RE CORRM Algorithm Reserved Switch 1 = RE CORRM Algorithm Reserved Switch 1 =
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
CORRM Algorithm Reserved U32 Parameters 0 = 0 CORRM Algorithm Reserved U32 Parameters 0 = 0 CORRM Algorithm Reserved U32 Parameters 0
CORRM Algorithm Reserved U8 Parameters 0 = 0 CORRM Algorithm Reserved U8 Parameters 0 = 0 CORRM Algorithm Reserved U8 Parameters 0
CORRM Algorithm Reserved U8 Parameters 1 = 255 CORRM Algorithm Reserved U8 Parameters 1 = 0 CORRM Algorithm Reserved U8 Parameters 1
(Number of results = 1) (Number of results = 1) (Number of results = 1)
### ### ###
LST UCORRMALGOSWITCH:; LST UCORRMALGOSWITCH:; LST UCORRMALGOSWI
RHNCG3H RHNCG4H RHNHM3H
= DRA_F2U_SWITCH = DRA_F2U_SWITCH = DRA_F2U_SWITCH
= DRA_BASE = DRA_BASE = DRA_BASE
esource Allocation Switch 2 = D Dynamic Resource Allocation Switch 2 = D Dynamic Resource Allocation Switch 2 = D Dynamic Resource A
= DRA_PCP = DRA_PCP = DRA_PCP
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_BASE_ = DRA_BASE_ = DRA_BASE_
= DRA_D2F_OV = DRA_D2F_OV = DRA_D2F_OV
= DRA_CSPS_0 = DRA_CSPS_0 = DRA_CSPS_0
= DRA_CSPS = DRA_CSPS = DRA_CSPS
= DRA_PS_ = DRA_PS_ = DRA_PS_
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_WEB_ = DRA_WEB_ = DRA_WEB_
= DRA_D2F_ = DRA_D2F_ = DRA_D2F_
= DRA_D2P_W = DRA_D2P_W = DRA_D2P_W
= DRA_INT = DRA_INT = DRA_INT
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_THR = DRA_THR = DRA_THR
= DRA_THRO = DRA_THRO = DRA_THRO
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_RRC = DRA_RRC = DRA_RRC
= DRA_BE_LI = DRA_BE_LI = DRA_BE_LI
= DRA_BE_I = DRA_BE_I = DRA_BE_I
= DRA_SRB = DRA_SRB = DRA_SRB
= DRA_PCH_L2 = DRA_PCH_L2 = DRA_PCH_L2
= DRA_BASE = DRA_BASE = DRA_BASE
= DRA_BAS = DRA_BAS = DRA_BAS
= DRA_EFACH = DRA_EFACH = DRA_EFACH
= DRA_WEB_ = DRA_WEB_ = DRA_WEB_
= DRA_CELL_ = DRA_CELL_ = DRA_CELL_
= DRA_SER = DRA_SER = DRA_SER
= DRA_DIFF = DRA_DIFF = DRA_DIFF
= DRA_CSPS = DRA_CSPS = DRA_CSPS
= DRA_BASE = DRA_BASE = DRA_BASE
esource Allocation Switch 3 = D Dynamic Resource Allocation Switch 3 = D Dynamic Resource Allocation Switch 3 = D Dynamic Resource A
CS Algorithm Switch = CS_AMRC CS Algorithm Switch = CS_AMRC CS Algorithm Switch = CS_AMRC CS Algo
= CS_HAN = CS_HAN = CS_HAN
= CS_IUUP_V2 = CS_IUUP_V2 = CS_IUUP_V2
= CS_VOICE_ = CS_VOICE_ = CS_VOICE_
= CS_AMRC_WB = CS_AMRC_WB = CS_AMRC_WB
= CS_AMRC_NB_ = CS_AMRC_NB_ = CS_AMRC_NB_
= CS_AMR = CS_AMR = CS_AMR
= CS_WAMR_S = CS_WAMR_S = CS_WAMR_S
= CS_COMB_WA = CS_COMB_WA = CS_COMB_WA
= CS_COMB_NA = CS_COMB_NA = CS_COMB_NA
= CS_LDR_AM = CS_LDR_AM = CS_LDR_AM
= CS_AMR_TRF = CS_AMR_TRF = CS_AMR_TRF
= CS_COMB_ = CS_COMB_ = CS_COMB_
= CS_IMME = CS_IMME = CS_IMME
= CS_TRFO = CS_TRFO = CS_TRFO
= CS_RB_AMR_ = CS_RB_AMR_ = CS_RB_AMR_
= CS_AMR_ = CS_AMR_ = CS_AMR_
= CS_DLBLER_M = CS_DLBLER_M = CS_DLBLER_M
= CS_AMR_WB = CS_AMR_WB = CS_AMR_WB
= CS_AMR_NB = CS_AMR_NB = CS_AMR_NB
= CS_TRFO_A = CS_TRFO_A = CS_TRFO_A
= CS_IMME = CS_IMME = CS_IMME
Power Control Switch = PC_D Power Control Switch = PC_D Power Control Switch = PC_D Power C
= PC_DOWN = PC_DOWN = PC_DOWN
= PC_EFACH_ = PC_EFACH_ = PC_EFACH_
= PC_FP_MULT = PC_FP_MULT = PC_FP_MULT
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_INNE = PC_INNE = PC_INNE
= PC_OLPC_SWITCH = PC_OLPC_SWITCH = PC_OLPC_SWITCH
= PC_RL_RE = PC_RL_RE = PC_RL_RE
= PC_SIG_DCH_ = PC_SIG_DCH_ = PC_SIG_DCH_
= PC_UL_SIR = PC_UL_SIR = PC_UL_SIR
= PC_CFG_ = PC_CFG_ = PC_CFG_
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_HSUP = PC_HSUP = PC_HSUP
= PC_OLPC_ = PC_OLPC_ = PC_OLPC_
= PC_HSUPA_ = PC_HSUPA_ = PC_HSUPA_
= PC_CQI_CY = PC_CQI_CY = PC_CQI_CY
= PC_CQI_C = PC_CQI_C = PC_CQI_C
= PC_CQI_C = PC_CQI_C = PC_CQI_C
= PC_BLER_ = PC_BLER_ = PC_BLER_
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_PILOT_PO = PC_PILOT_PO = PC_PILOT_PO
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_COMB = PC_COMB = PC_COMB
= PC_FP_M = PC_FP_M = PC_FP_M
= PC_HSU = PC_HSU = PC_HSU
= PC_OLPC = PC_OLPC = PC_OLPC
ower Control Switch 1 = PC_O Power Control Switch 1 = PC_O Power Control Switch 1 = PC_O Power Con
= PC_OLPC = PC_OLPC = PC_OLPC
= PC_HSUPA = PC_HSUPA = PC_HSUPA
= PC_ASYMMET = PC_ASYMMET = PC_ASYMMET
Compatibility Switch = CMP_ Compatibility Switch = CMP_ Compatibility Switch = CMP_ Compati
= CMP_IU_S = CMP_IU_S = CMP_IU_S
= CMP_IUR = CMP_IUR = CMP_IUR
= CMP_IUR_SH = CMP_IUR_SH = CMP_IUR_SH
= CMP_UU_A = CMP_UU_A = CMP_UU_A
= CMP_UU_A = CMP_UU_A = CMP_UU_A
= CMP_UU_I = CMP_UU_I = CMP_UU_I
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU = CMP_UU = CMP_UU
= CMP_UU = CMP_UU = CMP_UU
= CMP_UU_FD = CMP_UU_FD = CMP_UU_FD
= CMP_UU = CMP_UU = CMP_UU
= CMP_IU = CMP_IU = CMP_IU
= CMP_F2P_ = CMP_F2P_ = CMP_F2P_
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU_ = CMP_UU_ = CMP_UU_
= CMP_UU_S = CMP_UU_S = CMP_UU_S
= CMP_F2F_ = CMP_F2F_ = CMP_F2F_
= CMP_D2F_ = CMP_D2F_ = CMP_D2F_
= CMP_RAB_5 = CMP_RAB_5 = CMP_RAB_5
= CMP_RAB_6 = CMP_RAB_6 = CMP_RAB_6
= CMP_RAB_7 = CMP_RAB_7 = CMP_RAB_7
= CMP_RAB_8 = CMP_RAB_8 = CMP_RAB_8
= CMP_RAB_9 = CMP_RAB_9 = CMP_RAB_9
= CMP_HSU = CMP_HSU = CMP_HSU
= CMP_SMLC = CMP_SMLC = CMP_SMLC
Compatibility Switch2 = CMP_ Compatibility Switch2 = CMP_ Compatibility Switch2 = CMP_ Compatib
= CMP_IUB = CMP_IUB = CMP_IUB
= CMP_IUR_CMCF = CMP_IUR_CMCF = CMP_IUR_CMCF
= CMP_STTD_R = CMP_STTD_R = CMP_STTD_R
= CMP_STTD_AS = CMP_STTD_AS = CMP_STTD_AS
= CMP_RAB = CMP_RAB = CMP_RAB
= CMP_IUR = CMP_IUR = CMP_IUR
= CMP_MOCN_ = CMP_MOCN_ = CMP_MOCN_
= CMP_LOS = CMP_LOS = CMP_LOS
= CMP_CS_ = CMP_CS_ = CMP_CS_
= CMP_SRB_ = CMP_SRB_ = CMP_SRB_
= CMP_UU = CMP_UU = CMP_UU
= CMP_SING = CMP_SING = CMP_SING
= CMP_F2D_ = CMP_F2D_ = CMP_F2D_
= CMP_DRD_SR = CMP_DRD_SR = CMP_DRD_SR
= CMP_AMRC_ = CMP_AMRC_ = CMP_AMRC_
= CMP_DL_LO = CMP_DL_LO = CMP_DL_LO
= CMP_AMR = CMP_AMR = CMP_AMR
= CMP_IUR_ = CMP_IUR_ = CMP_IUR_
= CMP_MB = CMP_MB = CMP_MB
= CMP_SR = CMP_SR = CMP_SR
= CMP_GSM_ = CMP_GSM_ = CMP_GSM_
= CMP_ACT = CMP_ACT = CMP_ACT
= CMP_READS = CMP_READS = CMP_READS
= CMP_UE_ = CMP_UE_ = CMP_UE_
= CMP_RELO = CMP_RELO = CMP_RELO
= CMP_CELL = CMP_CELL = CMP_CELL
= CMP_MR_ = CMP_MR_ = CMP_MR_
Compatibility Switch3 = CMP_R Compatibility Switch3 = CMP_R Compatibility Switch3 = CMP_R Compatib
= CMP_MR = CMP_MR = CMP_MR
= CMP_RBSE = CMP_RBSE = CMP_RBSE
= CMP_RBCF = CMP_RBCF = CMP_RBCF
= CMP_IUP = CMP_IUP = CMP_IUP
= CMP_PS_R = CMP_PS_R = CMP_PS_R
= CMP_IUP = CMP_IUP = CMP_IUP
= CMP_IUPC_ = CMP_IUPC_ = CMP_IUPC_
= CMP_SIB_W = CMP_SIB_W = CMP_SIB_W
= CMP_IUPC = CMP_IUPC = CMP_IUPC
= CMP_HO_IN = CMP_HO_IN = CMP_HO_IN
Mapping Strategy Switch = MAP Service Mapping Strategy Switch = MAP Service Mapping Strategy Switch = MAP Service Mapping
= MAP_INTE = MAP_INTE = MAP_INTE
= MAP_PS_BE = MAP_PS_BE = MAP_PS_BE
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_PS_S = MAP_PS_S = MAP_PS_S
= MAP_SR = MAP_SR = MAP_SR
= MAP_SRB = MAP_SRB = MAP_SRB
= MAP_CSPS_T = MAP_CSPS_T = MAP_CSPS_T
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_CSPS_MC = MAP_CSPS_MC = MAP_CSPS_MC
= MAP_CSPS_ = MAP_CSPS_ = MAP_CSPS_
= MAP_PS_BE = MAP_PS_BE = MAP_PS_BE
ate Negotiation Switch = PS_ PS Rate Negotiation Switch = PS_ PS Rate Negotiation Switch = PS_ PS Rate Neg
= PS_BE_IN = PS_BE_IN = PS_BE_IN
= PS_BE_IU_QO = PS_BE_IU_QO = PS_BE_IU_QO
= PS_RAB_DOW = PS_RAB_DOW = PS_RAB_DOW
= PS_STREAM = PS_STREAM = PS_STREAM
= PS_BE_STR = PS_BE_STR = PS_BE_STR
= HSPA_ADPT = HSPA_ADPT = HSPA_ADPT
= PS_CM_COV_ = PS_CM_COV_ = PS_CM_COV_
= PS_CMACTI = PS_CMACTI = PS_CMACTI
= PS_CMTIME = PS_CMTIME = PS_CMTIME
= PS_STRE = PS_STRE = PS_STRE
= PS_STREAM = PS_STREAM = PS_STREAM
= PS_AMBR_ENA = PS_AMBR_ENA = PS_AMBR_ENA
= PS_VIDEO_R = PS_VIDEO_R = PS_VIDEO_R
Direct Retry Switch = DR_RRC_ Direct Retry Switch = DR_RRC_ Direct Retry Switch = DR_RRC_ Direct R
= DR_RAB_SIN = DR_RAB_SIN = DR_RAB_SIN
= DR_RAB_COM = DR_RAB_COM = DR_RAB_COM
= DR_INTER_R = DR_INTER_R = DR_INTER_R
= DR_RAB_ = DR_RAB_ = DR_RAB_
= DR_INTE = DR_INTE = DR_INTE
= RAB_DRD = RAB_DRD = RAB_DRD
HandOver Switch = HO_AL HandOver Switch = HO_AL HandOver Switch = HO_AL Hand
= HO_ALGO_ = HO_ALGO_ = HO_ALGO_
= HO_ALGO_MB = HO_ALGO_MB = HO_ALGO_MB
= HO_ALGO_OV = HO_ALGO_OV = HO_ALGO_OV
= HO_INTER = HO_INTER = HO_INTER
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_INTE = HO_INTE = HO_INTE
= HO_INTE = HO_INTE = HO_INTE
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_INTER = HO_INTER = HO_INTER
= HO_INTR = HO_INTR = HO_INTR
= HO_INTRA = HO_INTRA = HO_INTRA
= HO_INTRA = HO_INTRA = HO_INTRA
= HO_INTRA_ = HO_INTRA_ = HO_INTRA_
= HO_INTRA_ = HO_INTRA_ = HO_INTRA_
= HO_MC_M = HO_MC_M = HO_MC_M
= HO_MC_NCE = HO_MC_NCE = HO_MC_NCE
= HO_MC_SIG = HO_MC_SIG = HO_MC_SIG
= HO_MC_SIGNAL = HO_MC_SIGNAL = HO_MC_SIGNAL
= HO_MC_SNA = HO_MC_SNA = HO_MC_SNA
= HO_LTE_PS_O = HO_LTE_PS_O = HO_LTE_PS_O
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_H2G_SRVC = HO_H2G_SRVC = HO_H2G_SRVC
= HO_INTRA = HO_INTRA = HO_INTRA
= HO_CIO_1D_USED = HO_CIO_1D_USED = HO_CIO_1D_USED
= HO_HCS_SP = HO_HCS_SP = HO_HCS_SP
= HO_L2U_EMGC = HO_L2U_EMGC = HO_L2U_EMGC
= HO_UMTS = HO_UMTS = HO_UMTS
= HO_HHO_ = HO_HHO_ = HO_HHO_
= HO_MULT = HO_MULT = HO_MULT
HandOver Switch1 = HO HandOver Switch1 = HO HandOver Switch1 = HO HandO
= HO_U2L_ = HO_U2L_ = HO_U2L_
= HO_U2L_CO = HO_U2L_CO = HO_U2L_CO
= HO_U2L_COV = HO_U2L_COV = HO_U2L_COV
= HO_INTE = HO_INTE = HO_INTE
= HO_CS_ = HO_CS_ = HO_CS_
= HO_PS_ = HO_PS_ = HO_PS_
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_MC_GS = HO_MC_GS = HO_MC_GS
= HO_MC_LT = HO_MC_LT = HO_MC_LT
= HO_U2L_LOA = HO_U2L_LOA = HO_U2L_LOA
= HO_U2L_LO = HO_U2L_LO = HO_U2L_LO
= HO_INT = HO_INT = HO_INT
= HO_INTR = HO_INTR = HO_INTR
= HO_1A_O = HO_1A_O = HO_1A_O
= HO_1D_T = HO_1D_T = HO_1D_T
= HO_SPID_MM_S = HO_SPID_MM_S = HO_SPID_MM_S
= HO_SRV_CE = HO_SRV_CE = HO_SRV_CE
= HO_IUR_U2L_ = HO_IUR_U2L_ = HO_IUR_U2L_
= HO_IUR_U2 = HO_IUR_U2 = HO_IUR_U2
= HO_LTE_SE = HO_LTE_SE = HO_LTE_SE
= HO_GSM = HO_GSM = HO_GSM
= HO_INTE = HO_INTE = HO_INTE
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_U2L_CON = HO_U2L_CON = HO_U2L_CON
= HO_GSM = HO_GSM = HO_GSM
= HO_SRVC = HO_SRVC = HO_SRVC
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_HAN = HO_HAN = HO_HAN
HandOver Switch2 = HO_UL_ HandOver Switch2 = HO_UL_ HandOver Switch2 = HO_UL_ HandO
= HO_DC_HSU = HO_DC_HSU = HO_DC_HSU
= HO_MC_EXT = HO_MC_EXT = HO_MC_EXT
= HO_U2L_B = HO_U2L_B = HO_U2L_B
= HO_REPORT_SW = HO_REPORT_SW = HO_REPORT_SW
= HO_IMSI_MM_S = HO_IMSI_MM_S = HO_IMSI_MM_S
= HO_IUR_U2L_ = HO_IUR_U2L_ = HO_IUR_U2L_
= HO_IUR_PLM = HO_IUR_PLM = HO_IUR_PLM
= L2U_MLB_H = L2U_MLB_H = L2U_MLB_H
= HO_DL_SEC_ = HO_DL_SEC_ = HO_DL_SEC_
= HO_CSFB = HO_CSFB = HO_CSFB
= HO_U2L_S = HO_U2L_S = HO_U2L_S
= HO_IUR_ = HO_IUR_ = HO_IUR_
= HO_MC_I = HO_MC_I = HO_MC_I
= HO_INTER_ = HO_INTER_ = HO_INTER_
= HO_GRID = HO_GRID = HO_GRID
= HO_HSM_U = HO_HSM_U = HO_HSM_U
= HO_HSM_UE_ = HO_HSM_UE_ = HO_HSM_UE_
RNSR Algorithm Switch = SRN SRNSR Algorithm Switch = SRN SRNSR Algorithm Switch = SRN SRNSR Alg
= SRNSR_DSC = SRNSR_DSC = SRNSR_DSC
= SRNSR_DS = SRNSR_DS = SRNSR_DS
= SRNSR_DSC = SRNSR_DSC = SRNSR_DSC
= CU_WIT = CU_WIT = CU_WIT
= CU_WITH_RE = CU_WITH_RE = CU_WITH_RE
= SRNSR_DS = SRNSR_DS = SRNSR_DS
CMCF Algorithm Switch = CMCF_ CMCF Algorithm Switch = CMCF_ CMCF Algorithm Switch = CMCF_ CMCF Alg
= CMCF_UL_HLS_ = CMCF_UL_HLS_ = CMCF_UL_HLS_
= CMCF_UL_ = CMCF_UL_ = CMCF_UL_
= CMCF_WI = CMCF_WI = CMCF_WI
= CMCF_UE_ = CMCF_UE_ = CMCF_UE_
= CMCF_UE_ = CMCF_UE_ = CMCF_UE_
T Incoming HO CFG Switch = I Inter-RAT Incoming HO CFG Switch = I Inter-RAT Incoming HO CFG Switch = I Inter-RAT Incom
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= IRAT_HO_ = IRAT_HO_ = IRAT_HO_
= L2U_HO_CF = L2U_HO_CF = L2U_HO_CF
Algorithm Reserved Switch 0 = RE CORRM Algorithm Reserved Switch 0 = RE CORRM Algorithm Reserved Switch 0 = RE CORRM Algorithm
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
Algorithm Reserved Switch 1 = RE CORRM Algorithm Reserved Switch 1 = RE CORRM Algorithm Reserved Switch 1 = RE CORRM Algorithm
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
= RESERVED_SW = RESERVED_SW = RESERVED_SW
hm Reserved U32 Parameters 0 = 0 CORRM Algorithm Reserved U32 Parameters 0 = 0 CORRM Algorithm Reserved U32 Parameters 0 = 0 CORRM Algorithm Rese
thm Reserved U8 Parameters 0 = 0 CORRM Algorithm Reserved U8 Parameters 0 = 0 CORRM Algorithm Reserved U8 Parameters 0 = 0 CORRM Algorithm Rese
thm Reserved U8 Parameters 1 = 0 CORRM Algorithm Reserved U8 Parameters 1 = 0 CORRM Algorithm Reserved U8 Parameters 1 = 0 CORRM Algorithm Rese
(Number of results = 1) (Number of results = 1) (Number of results = 1
### ### ###
LST UCORRMALGOSWITCH:;
RHNHM3H
= DRA_F2U_SWITCH::OFF
= DRA_BASE_LOAD_HBD_INIT_SEL_SWITCH::OFF
Dynamic Resource Allocation Switch 2 = DRA_BASE_COVER_BE_E2D_INITSEL_OPT_SWITCH::OFF
= DRA_PCPICH_ECN0_ON_RACH_UPDATE_SWITCH::ON
= DRA_BASE_COVER_BE_E2D_INITSEL_SWITCH::OFF
= DRA_BASE_COVER_BE_E2D_SWITCH::OFF
= DRA_D2F_OVER_IUR_SWITCH::OFF
= DRA_CSPS_0K_RATE_UP_SWITCH::ON
= DRA_CSPS_BOTH_ULDL_RATE_UP_SWITCH::OFF
= DRA_PS_STATE_TRANS_WHEN_CS_REL_SWITCH::OFF
= DRA_BASE_COVER_E2D_DCCC_SWITCH::OFF
= DRA_WEB_FACH_DELAY_OPT_SWITCH::OFF
= DRA_D2F_LIMIT_WITH_CS_IU_CON_SWITCH::OFF
= DRA_D2P_WHEN_PS_INACT_SWITCH::OFF
= DRA_INTELL_STATE_TRANS_ON_LOAD_SWITCH::OFF
= DRA_BASE_COVER_LOAD_SRB_H2D_SWITCH::OFF
= DRA_THROUGHPUT_BE_STATE_TRANS_SWITCH::OFF
= DRA_THROUGHPUT_BE_D2F_SWITCH::OFF
= DRA_BASE_CALL_REESTABLISH_SRB_H2D_SWITCH::OFF
= DRA_RRC_FACH_NODEB_UNAVAILABLE_SWITCH::OFF
= DRA_BE_LITTLE_RATE_THD_SWITCH::OFF
= DRA_BE_INIT_BIT_RATE_TYPE_CSPS_SWITCH::OFF
= DRA_SRB_HRETRY_AFTER_RB_RFG_DRD_SWITCH::OFF
= DRA_PCH_L2_MC_REL_SWITCH::OFF
= DRA_BASE_COVER_UlR99_CQIPO_SWITCH::OFF
= DRA_BASE_LOAD_MULTI_LINK_CONTROL_SWITCH::OFF
= DRA_EFACH_D2P_DISABLE_SWITCH::OFF
= DRA_WEB_EFACH_DELAY_OPT_SWITCH::OFF
= DRA_CELL_DCCC_MC_THD_SWITCH::OFF
= DRA_SERVICE_BASED_FAST_F2D_ENH_SWITCH::OFF
= DRA_DIFF_SERVICE_ON_LOWACTIV_SWITCH::OFF
= DRA_CSPS_RATEUP_CONTROL_SWITCH::OFF
= DRA_BASE_COVER_SRB_E2D_RRC_SWITCH::OFF
Dynamic Resource Allocation Switch 3 = DRA_BASE_COVER_BE_SRB_E2D_SWITCH::OFF
CS Algorithm Switch = CS_AMRC_SWITCH::OFF
= CS_HANDOVER_TO_UTRAN_DEFAULT_CFG_SWITCH::ON
= CS_IUUP_V2_SUPPORT_SWITCH::ON
= CS_VOICE_DYN_CH_CONF_SWITCH::OFF
= CS_AMRC_WB_CMP_SWITCH::OFF
= CS_AMRC_NB_CMP_SWITCH::OFF
= CS_AMRC_WB_RATE_ADJUST_GRADUALLY_SWITCH::OFF
= CS_WAMR_SF_RECONF_SWITCH::OFF
= CS_COMB_WAMRC_SWITCH::OFF
= CS_COMB_NAMRC_SWITCH::OFF
= CS_LDR_AMR_RATEUP_OPT_SWITCH::OFF
= CS_AMR_TRFO_CMP_SWITCH::OFF
= CS_COMB_AMRC_POWERLDR_SWITCH::OFF
= CS_IMMEDIATE_RATE_CONTROL_OPT_SWITCH::OFF
= CS_TRFO_MUTI_UL_RATE_CONTROL_SWITCH::OFF
= CS_RB_AMR_TFI_CMP_SWITCH::ON
= CS_AMR_RB_RECFG_BEFORE_CONNECT_SWITCH::OFF
= CS_DLBLER_MEAS_SWITCH::OFF
= CS_AMR_WB_OPTIMIZATION_SWITCH::OFF
= CS_AMR_NB_OPTIMIZATION_SWITCH::OFF
= CS_TRFO_AMRC_DEACT_SWITCH::OFF
= CS_IMMEDIATE_RATE_CONTROL_DEACT_SWITCH::OFF
Power Control Switch = PC_DL_INNER_LOOP_PC_ACTIVE_SWITCH::ON
= PC_DOWNLINK_POWER_BALANCE_SWITCH::ON
= PC_EFACH_ECN0_DYN_ADJ_SWITCH::OFF
= PC_FP_MULTI_RLS_IND_SWITCH::ON
= PC_HSUPA_HARQNUM_AUTO_ADJUST_SWITCH::ON
= PC_INNER_LOOP_LMTED_PWR_INC_SWITCH::OFF
= PC_OLPC_SWITCH::ON
= PC_RL_RECFG_SIR_TARGET_CARRY_SWITCH::OFF
= PC_SIG_DCH_OLPC_SWITCH::OFF
= PC_UL_SIRERR_HIGH_REL_UE_SWITCH::OFF
= PC_CFG_ED_POWER_INTERPOLATION_SWITCH::OFF
= PC_HSUPA_COVER_EN_AT_POLIMIT_SWITCH::ON
= PC_HSUPA_DATA_CH_PO_ADAPTIVE_ADJ_SWITCH::OFF
= PC_HSUPA_LITRETNUM_AUTO_ADJUST_SWITCH::OFF
= PC_OLPC_FASTDOWN_OPTIMIZE_SWITCH::OFF
= PC_HSUPA_LITRETNUM_INIT_SEL_SWITCH::OFF
= PC_CQI_CYCLE_BASE_CELLLOAD_SWITCH::OFF
= PC_CQI_CYCLE_BASE_COVERAGE_SWITCH::OFF
= PC_CQI_CYCLE_BASE_CS_PLUS_PS_SWITCH::OFF
= PC_BLER_TARGET_BASE_CELLLOAD_SWITCH::OFF
= PC_HSUPA_DATA_CH_PO_INIT_SEL_SWITCH::OFF
= PC_PILOT_PO_OPTI_SWITCH::OFF
= PC_HSUPA_LOWRATE_FLEXPC_SWITCH::OFF
= PC_COMB_HSUPA_LOWRATE_FLEXPC_SWITCH::OFF
= PC_FP_MULTI_RLS_IND_SEND_TIME_OPT_SWITCH::OFF
= PC_HSUPA_RGSTEPTHDCONFIG_CORRECT_SWITCH::ON
= PC_OLPC_FASTDOWN_OPT_LIMIT_CS_SWITCH::OFF
Power Control Switch 1 = PC_OLPC_EXCLD_EMPTYRB_SWITCH::OFF
= PC_OLPC_EXCLD_EMPTYRB_ALL_SERVICE_SWITCH::OFF
= PC_HSUPA_TTI_2MS_COVER_IMP_SWITCH::ON
= PC_ASYMMETRY_MEAS_SWITCH::OFF
Compatibility Switch = CMP_IU_IMS_PROC_AS_NORMAL_PS_SWITCH::OFF
= CMP_IU_SYSHOIN_CMP_IUUP_FIXTO1_SWITCH::OFF
= CMP_IUR_H2D_FOR_LOWR5_NRNCCELL_SWITCH::OFF
= CMP_IUR_SHO_DIVCTRL_SWITCH::OFF
= CMP_UU_AMR_SID_MUST_CFG_SWITCH::OFF
= CMP_UU_ADJACENT_FREQ_CM_SWITCH::OFF
= CMP_UU_IGNORE_UE_RLC_CAP_SWITCH::ON
= CMP_UU_SERV_CELL_CHG_WITH_ASU_SWITCH::OFF
= CMP_UU_SERV_CELL_CHG_WITH_RB_MOD_SWITCH::OFF
= CMP_UU_VOIP_UP_PROC_AS_NORMAL_PS_SWITCH::ON
= CMP_UU_FDPCH_COMPAT_SWITCH::OFF
= CMP_UU_AMR_DRD_HHO_COMPAT_SWITCH::ON
= CMP_IU_QOS_ASYMMETRY_IND_COMPAT_SWITCH::OFF
= CMP_F2P_PROCESS_OPTIMIZATION_SWITCH::OFF
= CMP_UU_IOS_CELL_SYNC_INFO_REPORT_SWITCH::OFF
= CMP_UU_INTRA_FREQ_MC_BESTCELL_CIO_SWITCH::OFF
= CMP_UU_SIB11_SIB12_WITH_1A1D_SWITCH::OFF
= CMP_F2F_RLC_ONESIDE_REBUILD_SWITCH::OFF
= CMP_D2F_RLC_ONESIDE_REBUILD_SWITCH::OFF
= CMP_RAB_5_CFG_ROHC_SWITCH::OFF
= CMP_RAB_6_CFG_ROHC_SWITCH::OFF
= CMP_RAB_7_CFG_ROHC_SWITCH::OFF
= CMP_RAB_8_CFG_ROHC_SWITCH::OFF
= CMP_RAB_9_CFG_ROHC_SWITCH::OFF
= CMP_HSUPA_MACD_FLOW_MUL_SWITCH::OFF
= CMP_SMLC_RSLT_MODE_TYPE_SWITCH::OFF
Compatibility Switch2 = CMP_RELOCIN_IUUPVER_NOTCHG_SWITCH::OFF
= CMP_IUBR_DM_RTT_ALTERNATIVE_FMT_SWITCH::OFF
= CMP_IUR_CMCF_SWITCH::OFF
= CMP_STTD_RL_ADD_SWITCH::OFF
= CMP_STTD_ASU_SWITCH::OFF
= CMP_RAB_DRD_ROLLBACK_PUNISH_SWITCH::OFF
= CMP_IUR_CELLCAP_BITMAP_TRANSFORM_SWITCH::OFF
= CMP_MOCN_PLMN_SEL_SWITCH::OFF
= CMP_LOSSLESS_RELOC_RLCPDUSIZECHG_SWITCH::OFF
= CMP_CS_FIXED_RATE_WHEN_PS_EXIST_SWITCH::OFF
= CMP_SRB_H_AMR_DRD_HHO_SWITCH::OFF
= CMP_UU_AMR_DRD_HHO_COMPAT_ENH_SWITCH::OFF
= CMP_SINGLE_PTT_USE_DL_ENL2_SWITCH::OFF
= CMP_F2D_RLC_ONESIDE_REBUILD_SWITCH::ON
= CMP_DRD_SRBOVERH_SWITCH::ON
= CMP_AMRC_FIXED_INITRATE_SWITCH::OFF
= CMP_DL_LOAD_BALANCE_SWITCH::OFF
= CMP_AMR_A_SUBFLOW_ZERO_BLOCK_SWITCH::OFF
= CMP_IUR_MULTI_RL_ADD_RETRY_SWITCH::OFF
= CMP_MBDR_CALL_TYPE_OTHER_AS_AMR_SWITCH::OFF
= CMP_SRNSR_WAMR_MODE_0_RESTORE_SWITCH::OFF
= CMP_GSM_NCELL_BAND_1900M_SWITCH::OFF
= CMP_ACTIVESET_REPORT_WITH_SYN_SWITCH::ON
= CMP_READSFN_IND_IN_SIB_SWITCH::ON
= CMP_UE_NOT_USE_DL_ENL2_EXIST_PTT_SWITCH::OFF
= CMP_RELOC_IN_FACH_DEL_DCH_SWITCH::OFF
= CMP_CELL_UPDATE_FACH_TRFFIC_MC_OPT::OFF
= CMP_MR_AGPS_MC_MSG_SEND_OPT_SWITCH::OFF
Compatibility Switch3 = CMP_REL_MR_AGPS_BF_D2F_SWITCH::OFF
= CMP_MR_AGPS_NOT_SUPP_STAT_TRANS_SWITCH::OFF
= CMP_RBSETUP_DRD_SRBOVERH_SWITCH::ON
= CMP_RBCFG_DRD_SRBOVERH_SWITCH::ON
= CMP_IUPC_SUPP_ECNO_PATHLOSS_MEAS_SWITCH::OFF
= CMP_PS_RBSETUP_DRD_EXIST_IUCS_SWITCH::ON
= CMP_IUPC_DETECT_SET_PATHLOSS_MEAS_SWITCH::OFF
= CMP_IUPC_CARRY_IMSI_IMEI_SWITCH::OFF
= CMP_SIB_WITH_FILTERCOEF_SWITCH::OFF
= CMP_IUPC_PATHLOSS_CALC_OPT_SWITCH::OFF
= CMP_HO_INTER_RAT_OPT_SWITCH::OFF
Service Mapping Strategy Switch = MAP_HSUPA_TTI_2MS_SWITCH::ON
= MAP_INTER_RAT_PS_IN_CHANLE_LIMIT_SWITCH::OFF
= MAP_PS_BE_ON_E_FACH_SWITCH::OFF
= MAP_PS_STREAM_ON_E_FACH_SWITCH::OFF
= MAP_PS_STREAM_ON_HSDPA_SWITCH::ON
= MAP_PS_STREAM_ON_HSUPA_SWITCH::ON
= MAP_SRB_6800_WHEN_RAB_ON_HSDSCH_SWITCH::OFF
= MAP_SRB_ON_DCH_OR_FACH_CS_RRC_SWITCH::OFF
= MAP_CSPS_TTI_2MS_LIMIT_SWITCH::ON
= MAP_CSPS_PS_UL_USE_DCH_SWITCH::ON
= MAP_CSPS_PS_DL_USE_DCH_SWITCH::ON
= MAP_CSPS_MC_LIMIT_SWITCH::OFF
= MAP_CSPS_RL_RESET_0K_LIMIT_SWITCH::ON
= MAP_PS_BE_SETUP_DCH0K_SWITCH::OFF
PS Rate Negotiation Switch = PS_BE_EXTRA_LOW_RATE_ACCESS_SWITCH::OFF
= PS_BE_INIT_RATE_DYNAMIC_CFG_SWITCH::OFF
= PS_BE_IU_QOS_NEG_SWITCH::OFF
= PS_RAB_DOWNSIZING_SWITCH::ON
= PS_STREAM_IU_QOS_NEG_SWITCH::OFF
= PS_BE_STRICT_IU_QOS_NEG_SWITCH::OFF
= HSPA_ADPTIVE_RATE_ALGO_SWITCH::OFF
= PS_CM_COV_H2D_0K_SWITCH::OFF
= PS_CMACTIVE_PROCESS_OPT_SWITCH::OFF
= PS_CMTIMEOUT_UP_LIMIT_SWITCH::OFF
= PS_STREAM_IU_QOS_NEG_ENHANCE_SWITCH::OFF
= PS_STREAM_IU_QOS_RENEG_SWITCH::ON
= PS_AMBR_ENABLE_SWITCH::OFF
= PS_VIDEO_RSCP_MEAS_SWITCH::OFF
Direct Retry Switch = DR_RRC_DRD_SWITCH::ON
= DR_RAB_SING_DRD_SWITCH::ON
= DR_RAB_COMB_DRD_SWITCH::OFF
= DR_INTER_RAT_DRD_SWITCH::ON
= DR_RAB_COMB_DRD_SWITCH_FOR_CSUSER::ON
= DR_INTER_RAT_CSPS_MULTI_RAB_DRD_SWITCH::OFF
= RAB_DRD_FAIL_ROLLBACK_PUNISH_OPT_SWITCH::OFF
HandOver Switch = HO_ALGO_HCS_SPEED_EST_SWITCH::OFF
= HO_ALGO_LDR_ALLOW_SHO_SWITCH::ON
= HO_ALGO_MBMS_FLC_SWITCH::OFF
= HO_ALGO_OVERLAY_SWITCH::OFF
= HO_INTER_FREQ_HARD_HO_SWITCH::ON
= HO_LTE_SERVICE_PSHO_OUT_SWITCH::OFF
= HO_INTER_RAT_CS_OUT_SWITCH::ON
= HO_INTER_RAT_PS_3G2G_CELLCHG_NACC_SWITCH::OFF
= HO_INTER_RAT_PS_3G2G_RELOCATION_SWITCH::OFF
= HO_INTER_RAT_PS_OUT_SWITCH::ON
= HO_INTER_RAT_RNC_SERVICE_HO_SWITCH::ON
= HO_INTRA_FREQ_DETSET_INTO_ACTSET_SWITCH::ON
= HO_INTRA_FREQ_DETSET_RPRT_SWITCH::ON
= HO_INTRA_FREQ_HARD_HO_SWITCH::ON
= HO_INTRA_FREQ_RPRT_1J_SWITCH::OFF
= HO_INTRA_FREQ_SOFT_HO_SWITCH::ON
= HO_MC_MEAS_BEYOND_UE_CAP_SWITCH::OFF
= HO_MC_NCELL_COMBINE_SWITCH::ON
= HO_MC_SIGNAL_IUR_INTRA_SWITCH::ON
= HO_MC_SIGNAL_SWITCH::OFF
= HO_MC_SNA_RESTRICTION_SWITCH::OFF
= HO_LTE_PS_OUT_SWITCH::OFF
= HO_LTE_SERVICE_PS_OUT_SWITCH::OFF
= HO_H2G_SRVCC_SWITCH::OFF
= HO_INTRA_FREQ_HIGHPRIOR_2D2F_SWITCH::OFF
= HO_CIO_1D_USED::OFF
= HO_HCS_SPD_INI_BSD_UE_SWITCH::OFF
= HO_L2U_EMGCALL_SWITCH::OFF
= HO_UMTS_TO_LTE_FAST_RETURN_SWITCH::ON
= HO_HHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_MULTIRAB_CSPS_HO_COV_PARA_SWITCH::OFF
HandOver Switch1 = HO_COMACROMICRO_INTER_FREQ_OUT_SWITCH::OFF
= HO_U2L_REDIR_BASED_ABSOLUTE_FREQ_SWITCH::OFF
= HO_U2L_COV_PS_REDIRECT_SWITCH::OFF
= HO_U2L_COV_PS_HO_SWITCH::OFF
= HO_INTER_RAT_PENALTY_FOR_UNCFG_SWITCH::OFF
= HO_CS_IRATHHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_PS_IRATHHO_WITH_INTRA_FREQ_MR_SWITCH::OFF
= HO_MC_INTRAFREQ_NCELL_COMBINE_SWITCH::ON
= HO_MC_INTERFREQ_NCELL_COMBINE_SWITCH::ON
= HO_MC_GSM_NCELL_COMBINE_SWITCH::ON
= HO_MC_LTE_NCELL_COMBINE_SWITCH::ON
= HO_U2L_LOAD_PS_HO_SWITCH::OFF
= HO_U2L_LOAD_PS_REDIRECT_SWITCH::OFF
= HO_INTRA_FREQ_DETSET_INTO_ACTSET_OPTSWH::OFF
= HO_INTRA_DETSET_DRNC_CELL_INTO_ACTSET::OFF
= HO_1A_OR_1C_TRIG_SERV_CELL_CHG_SWITCH::OFF
= HO_1D_TRIG_SERV_CELL_CHG_JUDGE_SWITCH::OFF
= HO_SPID_MM_SWITCH::OFF
= HO_SRV_CELL_CHG_1D_RSCP_SWITCH::OFF
= HO_IUR_U2L_REDIR_SWITCH::ON
= HO_IUR_U2L_FAST_RETURN_SWITCH::ON
= HO_LTE_SERVICE_NEED_RSCP_SWITCH::OFF
= HO_GSMNCELL_OPGRP_CARRY_OVER_IUR_SWITCH::OFF
= HO_INTER_RAT_DRNC_GSMNCELL_FILTER_SWITCH::OFF
= HO_MC_INTRAFREQ_1A_REPLACE_1C_SWITCH::OFF
= HO_U2L_CONN_PRIO_SWITCH::OFF
= HO_GSMNCELL_OPGRP_CARRY_OVER_IUR_SWITCH2::OFF
= HO_SRVCC_FAST_RETURN_TO_LTE_SWITCH::OFF
= HO_CSFB_BASED_MEAS_FAST_RETURN_SWITCH::OFF
= HO_CSFB_BASED_RSCP_FAST_RETURN_SWITCH::OFF
= HO_HANDOVER_FAST_RETURN_TO_LTE_SWITCH::OFF
HandOver Switch2 = HO_UL_UOLC_SWITCH::OFF
= HO_DC_HSUPA_IND_TWO_ACTIVESET::OFF
= HO_MC_EXT_LTE_BAND_SWITCH::ON
= HO_U2L_BASE_UE_LTE_MEAS_CAP_SWITCH::ON
= HO_REPORT_SWITCH::OFF
= HO_IMSI_MM_SWITCH::OFF
= HO_IUR_U2L_HO_SWITCH::OFF
= HO_IUR_PLMN_FILTER_SWITCH::OFF
= L2U_MLB_HO_IN_DED_PRIO_SWITCH::OFF
= HO_DL_SEC_FREQ_HO_SWITCH::OFF
= HO_CSFB_BASED_GRID_FAST_RETURN_SWITCH::OFF
= HO_U2L_SUPPORT_MULTI_BAND_SWITCH::OFF
= HO_IUR_U2L_SUPPORT_MULTI_BAND_SWITCH::OFF
= HO_MC_INTERFREQ_NCELL_CMB_OPT_SWITCH::OFF
= HO_INTER_FREQ_IUR_CTRL_SWITCH::OFF
= HO_GRID_BASED_LTE_SERVICE_PS_OUT_SWITCH::OFF
= HO_HSM_UE_INTRAHO_OPT_SWITCH::OFF
= HO_HSM_UE_STATIS_SWITCH::OFF
SRNSR Algorithm Switch = SRNSR_DSCR_IUR_RESRCE_SWITCH::ON
= SRNSR_DSCR_LOC_SEPRAT_SWITCH::ON
= SRNSR_DSCR_PROPG_DELAY_SWITCH::ON
= SRNSR_DSCR_SEPRAT_DUR_SWITCH::ON
= CU_WITH_RELOC_FOR_NO_NRNCCELL_CFG_SWITCH::OFF
= CU_WITH_RELOC_OPT_SWITCH::OFF
= SRNSR_DSCR_NOCFG_NRNC_CELL_SWITCH::OFF
CMCF Algorithm Switch = CMCF_DL_HLS_SWITCH::ON
= CMCF_UL_HLS_SWITCH::ON
= CMCF_UL_PRECFG_TOLERANCE_SWITCH::OFF
= CMCF_WITHOUT_UE_CAP_REPORT_SWITCH::OFF
= CMCF_UE_STATE_TRANS_COV_SWITCH::OFF
= CMCF_UE_STATE_TRANS_NCOV_SWITCH::OFF
Inter-RAT Incoming HO CFG Switch = IRAT_HO_CFG_HSDPA_64QAM_SWITCH::OFF
= IRAT_HO_CFG_HSUPA_16QAM_SWITCH::OFF
= IRAT_HO_CFG_HSUPA_TTI_2MS_SWITCH::OFF
= IRAT_HO_CFG_PRECFG_PARA_OPT_SWITCH::OFF
= L2U_HO_CFG_HSDPA_DC_SWITCH::OFF
CORRM Algorithm Reserved Switch 0 = RESERVED_SWITCH_0_BIT1::OFF
= RESERVED_SWITCH_0_BIT2::ON
= RESERVED_SWITCH_0_BIT3::OFF
= RESERVED_SWITCH_0_BIT4::OFF
= RESERVED_SWITCH_0_BIT5::OFF
= RESERVED_SWITCH_0_BIT6::OFF
= RESERVED_SWITCH_0_BIT7::OFF
= RESERVED_SWITCH_0_BIT8::OFF
= RESERVED_SWITCH_0_BIT9::OFF
= RESERVED_SWITCH_0_BIT10::OFF
= RESERVED_SWITCH_0_BIT11::ON
= RESERVED_SWITCH_0_BIT12::OFF
= RESERVED_SWITCH_0_BIT13::OFF
= RESERVED_SWITCH_0_BIT14::OFF
= RESERVED_SWITCH_0_BIT15::ON
= RESERVED_SWITCH_0_BIT16::OFF
= RESERVED_SWITCH_0_BIT17::OFF
= RESERVED_SWITCH_0_BIT18::OFF
= RESERVED_SWITCH_0_BIT19::ON
= RESERVED_SWITCH_0_BIT20::OFF
= RESERVED_SWITCH_0_BIT21::OFF
= RESERVED_SWITCH_0_BIT22::OFF
= RESERVED_SWITCH_0_BIT23::OFF
= RESERVED_SWITCH_0_BIT24::OFF
= RESERVED_SWITCH_0_BIT25::OFF
= RESERVED_SWITCH_0_BIT26::OFF
= RESERVED_SWITCH_0_BIT27::OFF
= RESERVED_SWITCH_0_BIT28::OFF
= RESERVED_SWITCH_0_BIT29::OFF
= RESERVED_SWITCH_0_BIT30::OFF
= RESERVED_SWITCH_0_BIT31::OFF
= RESERVED_SWITCH_0_BIT32::OFF
CORRM Algorithm Reserved Switch 1 = RESERVED_SWITCH_1_BIT1::ON
= RESERVED_SWITCH_1_BIT2::ON
= RESERVED_SWITCH_1_BIT3::ON
= RESERVED_SWITCH_1_BIT4::ON
= RESERVED_SWITCH_1_BIT5::ON
= RESERVED_SWITCH_1_BIT6::ON
= RESERVED_SWITCH_1_BIT7::ON
= RESERVED_SWITCH_1_BIT8::ON
= RESERVED_SWITCH_1_BIT9::ON
= RESERVED_SWITCH_1_BIT10::ON
= RESERVED_SWITCH_1_BIT11::ON
= RESERVED_SWITCH_1_BIT12::ON
= RESERVED_SWITCH_1_BIT13::ON
= RESERVED_SWITCH_1_BIT14::ON
= RESERVED_SWITCH_1_BIT15::ON
= RESERVED_SWITCH_1_BIT16::ON
= RESERVED_SWITCH_1_BIT17::ON
= RESERVED_SWITCH_1_BIT18::ON
= RESERVED_SWITCH_1_BIT19::ON
= RESERVED_SWITCH_1_BIT20::ON
= RESERVED_SWITCH_1_BIT21::ON
= RESERVED_SWITCH_1_BIT22::ON
= RESERVED_SWITCH_1_BIT23::ON
= RESERVED_SWITCH_1_BIT24::ON
= RESERVED_SWITCH_1_BIT25::ON
= RESERVED_SWITCH_1_BIT26::ON
= RESERVED_SWITCH_1_BIT27::ON
= RESERVED_SWITCH_1_BIT28::ON
= RESERVED_SWITCH_1_BIT29::ON
= RESERVED_SWITCH_1_BIT30::ON
= RESERVED_SWITCH_1_BIT31::OFF
= RESERVED_SWITCH_1_BIT32::ON
CORRM Algorithm Reserved U32 Parameters 0 = 0
CORRM Algorithm Reserved U8 Parameters 0 = 0
CORRM Algorithm Reserved U8 Parameters 1 = 0
(Number of results = 1)
LST UCORRMALGOSWITCH:; LST UCOR LST UCORRMALGOSWITCH:;
iHNHM3H MBNAVI1HRHNCG1H
= DRA_F2U_SWITCH::OFF = DRA_F2U_SWITCH::OFF
MBNAVI1H
= DRA_F2U_SWITCH::OFF
RHNCG3H
= DRA_F2U_SWITCH::OFF
RHNCG4H
= DRA_F2U_SWITCH::OFF
RHNHM3H
= DRA_F2U_SWITCH::OFF
LST UCORRMALGOSWITCH:; LST UCORRMALGOSWITCH:
RHNCG3H RHNCG4H
= DRA_F2U_SWITCH::OFF
LST UCORRMALGOSWITCH:; LST UCORRMALGOSWITCH:;
RHNHM3H
= DRA_F2U_SWITCH::OFF = DRA_F2U_SWITCH::OFF
F2U_SWITCH::OFF

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