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net

Code No: RR210202


RR
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD
B.Tech II Year I Semester Examinations, May/June-2013
Pulse and Digital Circuits
(Common to EEE, ECE)
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
---

1.a) Prove that an RC low pass circuit behaves as a good integrator if RC >15T where
T is the Period of the input sinusoid sin .
b) Write about Attenuators. [8+8]

2.a) With a neat diagram explain about Emitter- coupled Clipper.


b) Write about Diode comparator and its applications in pulse time modulation.

3.a)
L D
With appropriate diagrams explain about Transistor switching times.
[8+8]

4.
b)

12 , 6 ,
O R
Write about Saturation parameters of Transistor and their variation with
temperature.

Design a bistable multivibrator with following specifications


[8+8]

(minimum) = 25, Maximum trigger

5.a)
b)
frequency = 25KHz.

U W
Discuss about Transistor Bootstrap time base generators.
[16]

A Transistor Bootstrap Ramp generator is to produce 15V, 5ms output to a 2KΩ

= 22V,

N T
load resistor the ramp is to be linear with in 2%. Design a suitable circuit using
= -22V and Transistor with (min) = 25. The input pulse has
an amplitude of -5V, pulse width=5ms and space width = 2.5ms. [8+8]

6.a)
b)

7.a)
J
Write about frequency division by a RC controlled astable blocking oscillator.
Explain about (a) Phase delay (b) Phase Jitter. [8+8]

Derive expression for control voltages and their maximum and minimum values
for a four diode sampling gate.
b) Explain about a six diode sampling gate and mention its values specification.
[8+8]

8.a) With a neat circuit diagram and truth table explain the working of a NOT gate.
b) Draw the logic diagram of the following gates using AOI logic. (i) XOR
(ii) XNOR gates. [8+8]

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