SpyGlassPredictiveAnalyzerUserGuide PDF

SpyGlass® Predictive
Analyzer User Guide
Version 4.4.1
October 2010
Atrenta, Inc.
2077 Gateway Place, Suite 300
San Jose, California 95110
1-866-ATRENTA (1-866-287-3682)
http://www.atrenta.com
©Copyright 2001-2010 Atrenta, Inc. All rights reserved.

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owners.
Printed in the United States of America.

SpyGlass® Predictive Analyzer User Guide
Table of Contents
Preface........................................................................................................................... 25
About This Book .....................................................................................................................25
Contents of This Book ...........................................................................................................25
Typographical Conventions ..................................................................................................27
Introducing the SpyGlass Predictive Analyzer.......................................................... 29

Welcome to the SpyGlass Predictive Analyzer ...................................................................29
SpyGlass Features .................................................................................................................30
Setting Up the SpyGlass Licenses .......................................................................................31
Starting the SpyGlass Predictive Analyzer ..........................................................................31
Starting the SpyGlass Design Environment .......................................................................32
The SpyGlass Design Environment Setup................................................................................32
Starting the SpyGlass Design Environment on Different Platforms ..........................................33
Starting the SpyGlass Design Environment Standalone...........................................................33
Starting the SpyGlass Design Environment and Opening a Violation Database ......................33
Starting and Reconfiguring the SpyGlass Design Environment................................................35
Starting the SpyGlass Design Environment and Running SpyGlass Analysis..........................35
Starting the SpyGlass Design Environment and Loading a Profile or Template.......................36
Naming Violation Database File for the Next Run.....................................................................36
The SpyGlass Design Environment User Interface ...........................................................37
The SpyGlass Predictive Analyzer Concepts ............................................................ 41

The SpyGlass Predictive Analyzer Operations ....................................................................41
How SpyGlass Works ........................................................................................................41
How SpyGlass analyzes your design .................................................................................42
SpyGlass Built-in Checking ...................................................................................................44
Processing the HDL Designs ................................................................................................45
Processing Verilog Designs ......................................................................................................45
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Processing VHDL Designs ........................................................................................................47
The SpyGlass Rule Environment .......................................................................................... 49

Understanding the SpyGlass Rule Definitions ................................................................... 49
Rule Types and Order of Execution ................................................................................... 50
Mandatory Rules ............................................................................................................... 55
Running Specific Set of Rules ........................................................................................... 56
Atrenta Standard Policies .................................................................................................. 58
Customizing SpyGlass Rules ............................................................................................ 59
Processing Messages and Displaying Reports .................................................................. 60
About Message Reporting ................................................................................................. 60
About Rule Severity ........................................................................................................... 60
Predefined Rule Severity-Classes ..................................................................................... 61
FATAL Rule Severity-Class.......................................................................................................61
ERROR Rule Severity-Class.....................................................................................................62
WARNING Rule Severity-Class ................................................................................................63
INFO Rule Severity-Class .........................................................................................................63
DATA Rule Severity-Class ........................................................................................................63
High Profile Rules .............................................................................................................. 64
SpyGlass Results Summary ................................................................................................. 65
SpyGlass Exit Status ............................................................................................................. 66
About the Message Reports .................................................................................................. 70
The Reports Toolbar .......................................................................................................... 70
The Automatic Report ........................................................................................................ 71
Determining Available Report Formats .............................................................................. 71
Specifying a Report Format ............................................................................................... 72
Standard Report Formats .................................................................................................. 72
Grouping in Standard SpyGlass Reports ..................................................................................72
The count report ........................................................................................................................77
The inline report ........................................................................................................................78
The moresimple report ..............................................................................................................78
The moresimple_filesort report..................................................................................................80
The moresimple_rulesort report ................................................................................................80
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The moresimple_sevclass report ..............................................................................................80

The no_msg_reporting_rules report..........................................................................................80
The score report........................................................................................................................81
The sgra_report Report.............................................................................................................82
The sign_off report ....................................................................................................................82
The simple report ......................................................................................................................84
The Summary report .................................................................................................................85
The waiver report ......................................................................................................................86
Cross-probing from Standard Reports ...............................................................................88
Other Reports ....................................................................................................................89
The count_sevsort Report.........................................................................................................90
The moresimple_csv Report .....................................................................................................90
The score_detail Report............................................................................................................91
Sorting Messages in SpyGlass Reports ............................................................................91
Default Message Sorting in SpyGlass Reports .........................................................................91
User-defined Message Sorting in SpyGlass Reports................................................................92
SpyGlass Useful Files ............................................................................................................95

Files Generated during Default Run ..................................................................................95
Files Generated to Support Special Features ....................................................................96
Using the SpyGlass Design Environment.................................................................. 99

Overview ..................................................................................................................................99
Setting the Current Working Directory .................................................................................99
Setting the Operating Language .........................................................................................100
Working with Source Design Files ......................................................................................100
Working with Library Files ...................................................................................................101
Working with Profiles ...........................................................................................................101
Working with Templates .......................................................................................................102
Working with Messages .......................................................................................................103
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Messages in the Source Window ............................................................................................103

Messages in Schematic Windows...........................................................................................103
Messages in File/Design/Constraints/Instances Window........................................................103
Messages in Title Bar..............................................................................................................104
The SpyGlass Design Environment Menus and Toolbar.........................................105

Overview ............................................................................................................................... 105
The Menu Bar ....................................................................................................................... 105
File Menu ......................................................................................................................... 106
File > Read Source Filelist ......................................................................................................106
File > Read Profile...................................................................................................................106
File > Open Template..............................................................................................................107
File > Open VDB File...............................................................................................................108
File > Save Sources ................................................................................................................108
File > Save Profile ...................................................................................................................109
File > Save Template ..............................................................................................................111
File > Print RTL .......................................................................................................................111
File > Exit ................................................................................................................................111
Edit Menu ........................................................................................................................ 113
Edit > Clear All Selection.........................................................................................................113
Edit > Display Line Numbers...................................................................................................113
Edit > Edit Current Display File ...............................................................................................113
Edit > Find ...............................................................................................................................114
Edit > Goto Next Message ......................................................................................................116
Edit > Goto Previous Message................................................................................................116
Edit > Goto Next RTL line........................................................................................................117
Setup Menu ..................................................................................................................... 117
Setup > Run Options...............................................................................................................118
Setup > Source... ....................................................................................................................134
Setup > Library........................................................................................................................136
Setup > Set Working Directory................................................................................................144
Setup > Set Template Directory... ...........................................................................................144
Setup > Templates... ...............................................................................................................146
Setup > Policies/Rules/Parameters.........................................................................................147
Setup > Customize Rules........................................................................................................158
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Setup > Property Manager......................................................................................................159

Setup > License Manager... ....................................................................................................159
Setup > Set VDB File Name....................................................................................................161
Setup > Save/Restore DB.......................................................................................................161
Run Menu ........................................................................................................................163
Run > Analysis ........................................................................................................................163
Run > Library Compiler... ........................................................................................................164
Tools Menu .......................................................................................................................167
Tools > Modular Schematic.....................................................................................................167
Tools > Incremental Schematic...............................................................................................168
Tools > Waveform Viewer.......................................................................................................168
Tools > Waiver Editor..............................................................................................................168
Tools > Text Viewer ................................................................................................................181
Tools > View Logfile................................................................................................................182
Tools > Version Control...........................................................................................................182
Tools > Preferences................................................................................................................182
Report Menu ....................................................................................................................209
Report > Default > count .........................................................................................................209
Report > Default > inline .........................................................................................................210
Report > Default > moresimple ...............................................................................................210
Report > Default > moresimple_filesort...................................................................................211
Report > Default > moresimple_rulesort .................................................................................211
Report > Default > score .........................................................................................................211
Report > Default > sgra_report ...............................................................................................211
Report > Default > sign_off .....................................................................................................212
Report > Default > simple .......................................................................................................212
Report > Default > summary ...................................................................................................212
Report > Default > waiver .......................................................................................................213
Help Menu ........................................................................................................................213
Help > On-line Manuals...........................................................................................................213
Help > On-line Help.................................................................................................................213
Help > Shortcut Keys ..............................................................................................................214
Help > Icons Quick Reference ................................................................................................214
Help > About SpyGlass...........................................................................................................215
The Toolbar ...........................................................................................................................216

Methodology/Template Selector .............................................................................................218
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VDB File Button.......................................................................................................................218

Run Options Button .................................................................................................................218
Policies/Rules/Parameters Button...........................................................................................219
Run/Stop Toggle Button ..........................................................................................................219
Incremental Mode Button ........................................................................................................220
Modular Schematic View Button .............................................................................................222
Incremental Schematic (IS) View Button.................................................................................222
Waveform Viewer Button.........................................................................................................222
The Waiver Button...................................................................................................................223
Preferences Button..................................................................................................................223
Find in Source Button..............................................................................................................223
Next Message Button ..............................................................................................................223
The Status Bar ...................................................................................................................... 223
The SpyGlass Design Environment Windows..........................................................225

Overview ............................................................................................................................... 225
The File/Design/Constraints/Instances Window ............................................................... 225
File View Page ................................................................................................................. 227
File Names in the File View Page ...........................................................................................229
Searching Files........................................................................................................................231
Adding Files.............................................................................................................................231
Editing Files.............................................................................................................................232
Removing Files........................................................................................................................233
Viewing Files ...........................................................................................................................233
Waiving Rule Messages by File ..............................................................................................233
Setting Top Modules ...............................................................................................................235
Setting Stop Modules ..............................................................................................................236
Setting Stop Files/Directories ..................................................................................................236
Rearranging Files ....................................................................................................................238
Performing Version Control .....................................................................................................239
Design View Page ........................................................................................................... 239
Searching Modules..................................................................................................................241
Viewing Modules .....................................................................................................................241
Viewing List of Instances.........................................................................................................241
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Viewing Blackbox Information .................................................................................................242

Waiving Rule Messages by Module ........................................................................................249
Waiving Rule Messages by IP ................................................................................................251
Setting Top Modules ...............................................................................................................252
Setting Stop Modules ..............................................................................................................253
Viewing Message Count .........................................................................................................254
Constraints View Page .....................................................................................................254
Searching Files .......................................................................................................................255
Viewing Constraints Files........................................................................................................255
Adding Existing Constraints Files............................................................................................255
Creating New Constraints Files...............................................................................................256
Saving Constraints Files .........................................................................................................256
Renaming Constraints Files ....................................................................................................256
Removing Constraints Files ....................................................................................................256
Editing Constraints Files .........................................................................................................257
Waiving Rule Messages by File ..............................................................................................257
Instances View Page .......................................................................................................258
Searching Instances................................................................................................................261
Viewing Instances ...................................................................................................................262
Copying Instance Names/Paths..............................................................................................262
Viewing Instance Properties....................................................................................................262
Viewing Blackbox Information .................................................................................................263
The Source Window .............................................................................................................263

Loading Source Files .......................................................................................................264
Viewing Color Coding ......................................................................................................264
Inactive Code Display ......................................................................................................264
Setting Source View Options ...........................................................................................265
Selecting Text ...................................................................................................................265
Searching in Source Window ...........................................................................................265
Using the Navigation Bar .................................................................................................266
Interaction with Other Windows .......................................................................................266
Right-click Options ...........................................................................................................271
The HDL Navigator Window ................................................................................................273
Viewing Declarations of Signals as Loads/Drivers ...........................................................277
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Docking/Undocking the HDL Navigator Window ............................................................. 278

The Message Window ......................................................................................................... 279
Waiving Messages ........................................................................................................... 281
Interaction with Other Windows ....................................................................................... 281
Session Log Page ........................................................................................................... 282
Messages: Msg Summary Page ...................................................................................... 283
Msg Summary Toolbar ............................................................................................................284
Summary Matrix Window ........................................................................................................288
Message List Window .............................................................................................................290
Cross-probing from the Msg Summary Page ..........................................................................292
Messages: Msg Tree Page .............................................................................................. 293
Msg Tree Toolbar ....................................................................................................................301
Messages: Module Hierarchy Page ................................................................................. 315
File Page ......................................................................................................................... 316
Module Page ................................................................................................................... 318
Line Page ........................................................................................................................ 319
Serious Page ................................................................................................................... 320
Warning Page .................................................................................................................. 321
Info Page ......................................................................................................................... 322
Summary Page ................................................................................................................ 323
Waived Page ................................................................................................................... 324
Sorting and Filtering Results in Message Windows ........................................................ 326
The Modular Schematic Window ........................................................................................ 328
RTL Grouping Capabilities .............................................................................................. 331
Always/Process Blocks in the RTL Code ................................................................................331
Vectored Instances in the RTL Code ......................................................................................332
Grouping Registers and Combinational Logic.........................................................................334
Interaction with Other Windows ....................................................................................... 335
Using the Mouse .............................................................................................................. 336
Single-Clicking.........................................................................................................................337
Double-Clicking .......................................................................................................................337
Click-Drag Combinations.........................................................................................................338
Right-Clicking ..........................................................................................................................339
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Modular Schematic Window Menu Bar ............................................................................355

File > Print...............................................................................................................................355
File > Save As.........................................................................................................................356
File > Close .............................................................................................................................358
Edit > Undo .............................................................................................................................358
Edit > Redo .............................................................................................................................358
Edit > Clear All Items...............................................................................................................359
Edit > Find...............................................................................................................................359
Edit > Set Display Mode..........................................................................................................359
Edit > Show Case Analysis .....................................................................................................359
Edit > Clear All Case Analysis.................................................................................................360
Edit > Preferences...................................................................................................................361
View > Show Schematic Legend.............................................................................................361
View > Show Classic Legend Window....................................................................................361
View > Zoom > In ....................................................................................................................361
View > Zoom > Out .................................................................................................................362
View > Zoom > Fit ...................................................................................................................362
View > Pan > Left....................................................................................................................362
View > Pan > Right .................................................................................................................362
View > Pan > Up .....................................................................................................................362
View > Pan > Down.................................................................................................................362
View > Go To Parent Hierarchy ..............................................................................................363
Help.........................................................................................................................................363
The Incremental Schematic Window ..................................................................................363

Interaction with Other Windows .......................................................................................365
IS Probes .........................................................................................................................365
Using the Mouse ..............................................................................................................366
Single-Clicking ........................................................................................................................366
Double-Clicking .......................................................................................................................367
Click-Drag Combinations ........................................................................................................368
Right-Clicking ..........................................................................................................................370
Incremental Schematic Window Menu Bar ......................................................................377
File > Print...............................................................................................................................377
File > Close .............................................................................................................................379
Edit > Undo .............................................................................................................................379
Edit > Redo .............................................................................................................................380
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Edit > Clear All Items...............................................................................................................380

Edit > Find... ............................................................................................................................380
Edit > Set Display Mode..........................................................................................................381
Edit > Show Case Analysis .....................................................................................................381
Edit > Clear All Case Analysis.................................................................................................382
Edit > Preferences...................................................................................................................382
View > Show Schematic Legend.............................................................................................382
View > Show Classic Legend Window ....................................................................................383
View > Zoom > In ....................................................................................................................383
View > Zoom > Out .................................................................................................................383
View > Zoom > Fit ...................................................................................................................383
View > Pan Left .......................................................................................................................383
View > Pan > Right..................................................................................................................384
View > Pan > Up .....................................................................................................................384
View > Pan > Down.................................................................................................................384
The Legend Window ............................................................................................................ 384

Probing Modes ................................................................................................................ 385
Probe or Message Details ............................................................................................... 386
Viewing Sinks and Sources ............................................................................................. 388
The Spreadsheet Viewer Window ....................................................................................... 388
Formula Support in the Spreadsheet Viewer ................................................................... 389
Distinguishing Between Normal Data and Formulae...............................................................390
Adding/Modifying/Deleting Formula ........................................................................................390
Updating Cell Data ..................................................................................................................391
Checking Cyclic Dependency..................................................................................................391
Spreadsheet Viewer Menu Bar ........................................................................................ 392
File > Reload CSV File............................................................................................................392
File > Generate SDC...............................................................................................................392
File > Save CSV File ...............................................................................................................392
File > Save CSV File As..........................................................................................................392
File > Save Data Snapshot .....................................................................................................393
File > Print ...............................................................................................................................393
File > Close .............................................................................................................................393
Options > Sort... ......................................................................................................................394
Options > Configure Column Alignment..................................................................................394
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Options > Clear All Filters .......................................................................................................394

Options > Set Row Height.......................................................................................................395
Options > Set Spreadsheet Font.............................................................................................395
Options > Add Row .................................................................................................................395
Options > Open External Viewer.............................................................................................396
Options > Set External Viewer Path........................................................................................396
Spreadsheet Viewer Toolbar ............................................................................................396
Creating cdc_false_path Constraints ...............................................................................397
Cross-probing from the Spreadsheet Viewer ...................................................................398
Sorting and Filtering Results ............................................................................................399
The FSM Viewer Window .....................................................................................................402
FSM Viewer Context Menu ..............................................................................................403
save graph as..........................................................................................................................404
zoom in....................................................................................................................................405
zoom out .................................................................................................................................405
zoom fit....................................................................................................................................405
quit ..........................................................................................................................................405
all labels on .............................................................................................................................405
all labels off .............................................................................................................................405
find node .................................................................................................................................406
Waveform Viewer Window ...................................................................................................406

Cross-Probing in Waveform Viewer .................................................................................410
Signal Hiding Capability in Waveform Viewer .................................................................. 411
Right-Click Menu Options of the Waveform Viewer Window ...........................................412
Hierarchy Traversal Across the SpyGlass Design Environment Windows ....................413
Multi-Line Highlighting Support ..........................................................................................414
Analyzing VHDL Designs........................................................................................... 417

Overview ................................................................................................................................417
Specifying VHDL Design Files ............................................................................................417
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Using the IEEE-1076 VHDL-87 standard ............................................................................ 418

Performing syntax check on your design ................................................................................418
Working with VHDL libraries ............................................................................................... 419

Working with Atrenta-Supplied VHDL Libraries ............................................................... 419
Working with User-Compiled VHDL Libraries .................................................................. 419
Enabling RTL Rule-checking of VHDL Libraries .....................................................................422
Using Intermediate Logical Library Name Support in VHDL ...................................................422
Encrypting Compiled VHDL Design Units ...............................................................................425
Determining and Setting Design Dependencies ............................................................... 426

Determining design dependencies automatically ....................................................................426
Defining Design Dependencies ....................................................................................... 427
Skipping Specific Design Units ........................................................................................ 427
Working With Record Structures ........................................................................................ 428
Record-Mapping to Flattened Bus ................................................................................... 428
Handling VHDL Records ................................................................................................. 428
Specifying Constrains on Record Bits .....................................................................................429
Specifying Constrains on Array of Records.............................................................................430
Analyzing Verilog Designs .........................................................................................433

Overview ............................................................................................................................... 433
Specifying Verilog Design Files .......................................................................................... 434
Defining the Verilog Version ............................................................................................... 434
Using Verilog 2001 Constructs ........................................................................................ 434
Using SystemVerilog Constructs ..................................................................................... 436
Working with User-Defined Primitives ............................................................................. 437
Working with Verilog Libraries ........................................................................................... 437
Naming and Mapping Libraries ........................................................................................ 437
Precompiled Verilog Library Support ................................................................................. 438
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Working with Pre-compiled Verilog Libraries ....................................................................438

Structure of Pre-compiled Verilog Libraries ............................................................................439
Library Searching Mechanism.................................................................................................440
Working with Pre-compiled Verilog Libraries in SpyGlass design Environment ...............440
Enabling RTL Rule-checking of Pre-compiled Verilog Libraries .............................................442
Encrypting Pre-compiled Verilog Design Units .......................................................................442
Working with Pre-compiled Verilog Libraries in the Batch Mode ......................................443
Compiling Verilog Modules to a Verilog Library ......................................................................443
Mapping Pre-compiled Verilog libraries ..................................................................................443
Enabling RTL Rule-checking of Precompiled Verilog Libraries...............................................444
Encrypting Precompiled Verilog Design Units.........................................................................444
Working with Precompiled Verilog Libraries in the Mixed-Language Mode .....................445
Specifying Verilog Libraries Using the 'uselib Statement ................................................448
Including Defined Macros ....................................................................................................449
Including Common and Global Code .................................................................................449
Specifying Compressed Verilog Designs ...........................................................................450
Defining the top of a Dependency Tree ..............................................................................450
Skipping Specific Modules ..................................................................................................451
Rules analyzed before a Stopped Design Unit is detected ..............................................451
Working with the 'celldefine Modules .................................................................................451
Working with Memories .......................................................................................................454
Inferring Blackboxes ............................................................................................................454
How the Blackbox Inference Feature Works ....................................................................455
Using the Blackbox Inference Feature .............................................................................457
Checking the Inferred Information ....................................................................................458
Analyzing Mixed-Language Designs ........................................................................ 461

Overview ................................................................................................................................461
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Mixed-Language Design Semantics ................................................................................... 461

Using Atrenta Standard Policies ........................................................................................ 462
Specifying a Mixed-Language Design ................................................................................ 462
Using Language-Specific Settings ..................................................................................... 462
Rule Registration and Execution ........................................................................................ 463
RTL Description-Level Rules ........................................................................................... 463
Flat Netlist-Level Rules .................................................................................................... 464
Working with Mixed-Language Designs ............................................................................ 466
Designs with VHDL Library Design Units Instantiated in Verilog Modules ...................... 466
Designs with Verilog Library Modules Instantiated in VHDL Design Units ...................... 466
Handling BuiltIn Messages While Using Precompiled Dump .......................................... 467
Impact of the -addrules Option While Using Precompiled Dump .................................... 469
Impact of the -ignorerules Option While Using Precompiled Dump ................................ 469
Current Limitations .............................................................................................................. 470
Analyzing DEF Designs ..............................................................................................471

Overview ............................................................................................................................... 471
Specifying DEF Design Files ............................................................................................... 471
Specifying Library Files ...........................................................................................................472
Specifying LEF Files...............................................................................................................472
Controlling the RTL Synthesis Engine......................................................................475

Role of SpyGlass RTL Synthesis Engine ........................................................................... 475
Limiting Analysis of Memories ........................................................................................... 476
Preserving all instances and nets in a design .................................................................. 477
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Interpreting Synthesis Pragmas .........................................................................................477

Interpreting Synthesis Pragmas .......................................................................................478
Interpreting Synopsys translate_off/on Pragmas ....................................................................478
Interpreting Synopsys synthesis_off/on Pragmas ...................................................................479
Working with SpyGlass Messages ........................................................................... 481

Working with Multiple Messages ........................................................................................481
Selecting Auxiliary Messages Without a Main Message ..................................................483
Limiting the Messages .........................................................................................................483
Limiting the Number of Rule Messages ...........................................................................484
Waiving Messages ................................................................................................................485
Effects of Waiving Messages ...........................................................................................485
Waiving Messages Using the SpyGlass waive Constraint ...............................................486
Using the SpyGlass waive Constraint .....................................................................................486
Examples of Using the SpyGlass waive Constraint ................................................................493
Regular Expression and Wildcard Support in SpyGlass waive Constraint .............................494
Waiving Messages in waiver/sgdc files using SpyGlass Pragmas .........................................497
Support for Hierarchical Waivers ............................................................................................499
Waiving Messages using SpyGlass Pragmas ..................................................................503
Waiving Rule Messages for a Block of Code ..........................................................................503
Waiving Rule Messages for a Single Line of Code .................................................................505
Inserting Comments in Pragma Lines .....................................................................................510
Ignoring the SpyGlass Waiver Pragmas .................................................................................511
Existing Waiver Support in SpyGlass......................................................................................511
Handling SpyGlass Built-In Messages ............................................................................... 511

Handling Syntax Error Messages............................................................................................511
Handling Language Warning Messages .................................................................................511
Handling Synthesis Warning Messages..................................................................................512
Handling Synthesis Error Messages .......................................................................................512
Handling Internal Messages....................................................................................................513
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Working with Large Designs......................................................................................515

Overview ............................................................................................................................... 515
Rule Categorization ............................................................................................................. 515
Enabling Large Design Processing Mode ......................................................................... 516
Controlling the Large Design Processing Mode ............................................................... 516
Managing the Design Hierarchy ................................................................................519

Defining the Hierarchy ......................................................................................................... 519
Design Unit Selection Features .......................................................................................... 520
Specifying the Top-level Design Units ............................................................................. 520
Stopping Design Units ..................................................................................................... 520
Analyzing Selective Design Hierarchy ............................................................................. 523
Language-specific Behavior in use of the Top-Level Feature .......................................... 524
Summary ......................................................................................................................... 525
Defining the top and bottom of the design hierarchy ....................................................... 526
Skipping specific design units .......................................................................................... 527
Using Generics and Parameters ......................................................................................... 527
Using SpyGlass Design Constraints.........................................................................529

Overview ............................................................................................................................... 529
Creating the Design Constraints File ................................................................................. 530
Design Constraints File Structure .................................................................................... 530
SpyGlass Design Constraint Types ................................................................................. 531
Defining the Current Design ............................................................................................ 534
Specifying Signal Names ................................................................................................. 536
Signal Name Specification for Signal Types ...........................................................................536
Signal Name Specification for Design Hierarchy.....................................................................537
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Using Variables in SpyGlass Design Constraints Files ....................................................539

Conditionally specifying SGDC constraints .....................................................................541
The SpyGlass Design Constraints Files Processing ........................................................543
Processing SpyGlass Design and Waiver Pragmas ..........................................................544
Importing Block-Level SGDC Commands to Chip-Level ..................................................545
Constraints Migrated From Block-Level to Chip-Level .....................................................545
Creating Hierarchical SGDC File .....................................................................................546
Validating Hierarchical SGDC File ...................................................................................547
Implementing Scoping in SGDC Commands .....................................................................548
Scoping When Design is at Top-Level .............................................................................549
Scoping When Design is at a Block-Level .......................................................................552
Handling SystemVerilog Objects in SGDC .........................................................................554
SGDC Information in SpyGlass Policy Documents ...........................................................558
Special Features ......................................................................................................... 563

Viewing High-Level Results of a SpyGlass Run ................................................................563
Viewing Design Results ...................................................................................................564
Viewing Clock Results .....................................................................................................565
Viewing Constraints Results ............................................................................................566
Viewing Txv Results .........................................................................................................567
Viewing DFT Results ........................................................................................................568
Viewing Power Results ....................................................................................................569
Pattern Matching Across Features .....................................................................................570
Wildcard Mode .................................................................................................................570
Wildcard mode in SGDC commands ......................................................................................571
Wildcard mode in SDE ............................................................................................................572
Regular Expression Mode ................................................................................................572
Normal Mode ...................................................................................................................572
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Hierarchy Separator ........................................................................................................ 573

DFT Back Annotation Feature ............................................................................................. 573
Comparing the Results of Multiple SpyGlass Runs ......................................................... 575
Enabling the Results Comparison Feature..............................................................................576
Saving and Restoring Designs ........................................................................................... 578

Understanding the Design Save-Restore Feature ........................................................... 578
Licensing Requirements..........................................................................................................580
Handling Built-in Messages during Save-Restore Flow .................................................. 580
Handling Builtin Messages Based on the Type of Current Run ..............................................581
Impact of -addrules/-ignorerules Options ................................................................................581
Using the Design Save-Restore Feature in the SpyGlass Design Environment ............. 582
Using the Design Save-Restore Feature in the Batch Mode ........................................... 583
Pre-compiling and Using Gate Libraries ............................................................................ 584
Pre-compiling Gate Libraries ........................................................................................... 584
Overwriting/Adding Functional View of Library Cells...............................................................587
Using Pre-Compiled Libraries .......................................................................................... 590
Compressed Library File Support .................................................................................... 592
Supported Library Cells ................................................................................................... 593
Combinational Cell Support.....................................................................................................593
Sequential Cell Support...........................................................................................................594
Automatically Compiling Gate Libraries ............................................................................ 596

Precompiling Multiple Libraries in a Single SpyGlass Run ............................................. 598
Features of Single Step Precompilation .......................................................................... 599
Makefile Based Support in Step Precompilation ............................................................. 600
Combining Single-step Precompilation and Top-level Run .............................................. 601
The Memory Reduction Feature ......................................................................................... 602
Overview .......................................................................................................................... 602
Impact of Memory Reduction Feature on Rule-checking ................................................ 603
Other Effects of Memory Reduction ................................................................................ 605
Limitations of Memory Reduction in VHDL ...................................................................... 605
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Reporting Messages at Module Boundary .........................................................................606

Overview ..........................................................................................................................606
Identifying Modules ..........................................................................................................606
Enabling the Feature ........................................................................................................607
Impact of the Feature .......................................................................................................608
Working with Designs using DesignWare Components ...................................................608
Specifying Blackbox Internal Connections ........................................................................ 611
SDC to SGDC Translation ....................................................................................................613
Specifying the SDC File ...................................................................................................613
Enabling the Feature ........................................................................................................613
Support for Virtual Clocks in sdc2sgdc Flow...........................................................................614
Saving the SGDC Commands ................................................................................................616
Specifying the Mode of SDC File ............................................................................................616
Limitations ........................................................................................................................616
SpyGlass Results Analyzer .................................................................................................618
Other Usage Concepts ....................................................................................................620
Creating and Using Encrypted Precompiled Libraries .....................................................621
Creating Encrypted Library Dump ....................................................................................621
Using Encrypted Library Dump ........................................................................................622
On-the-Fly Migration of Violation Messages ......................................................................624
Overview ..........................................................................................................................624
On-the-Fly Migration ........................................................................................................624
Deriving Existing GuideWare Goals in a Template File ....................................................625
Specifications Provided in the Included/Inherited Template .............................................626
-rule/-addrule/-ignorerule(s) Specification ...............................................................................626
Parameter Specification ..........................................................................................................627
define_severity Specification...................................................................................................628
overloadrule Specification .......................................................................................................629
Checks Performed on the Template File ..........................................................................630
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Table of Contents
Using SpyGlass in the Batch Mode...........................................................................633

SpyGlass Batch Mode Operation ....................................................................................... 633
Using SpyGlass Command-line Options ........................................................................... 633
SpyGlass Command-line Options ...................................................................................... 636
SpyGlass Platform-related Options ................................................................................. 636
SpyGlass Informational Options ...................................................................................... 637
SpyGlass Mode Selection Options .................................................................................. 639
SpyGlass Policy Informational Options ........................................................................... 641
SpyGlass RTL Analysis Options ...................................................................................... 644
Other Command-line Options .......................................................................................... 744
SpyGlass Configuration File Setting Override Options ...........................................................746
SpyGlass Command-Line Utilities ...................................................................................... 750

The spyexplain Utility ....................................................................................................... 750
The spydocviewer utility .................................................................................................. 755
The spyhelpviewer utility ................................................................................................. 755
The SpyGlass Configuration File...............................................................................759

Overview ............................................................................................................................... 759
Structure of SpyGlass Configuration File .......................................................................... 760
General Configuration Settings ....................................................................................... 762
DEFAULT_STARTUP_MODE ................................................................................................762
DEFAULT_EXE_TYPE_ON_64BIT ........................................................................................763
USE_32_BIT_EXECUTABLE_ONLY......................................................................................763
Policy and Rules Configuration Settings ......................................................................... 763
DEFAULT_LANGUAGE_MODE .............................................................................................763
DEFAULT_TEMPLATE ...........................................................................................................764
DEFAULT_TEMPLATE_DIRECTORY....................................................................................764
DEFAULT_POLICY.................................................................................................................765
DEFAULT_POLICY_FOR_SPYEXPLAIN...............................................................................766
DEFAULT_REPORT_FORMAT..............................................................................................766
DEFAULT_REPORT_FORMAT_FOR_SLC ...........................................................................767
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DEFAULT_PRAGMA ..............................................................................................................767
DEFAULT_BBOX_MODEL .....................................................................................................767
AUTOENABLE_RULEGROUP_PARAMETER_CONTROL ...................................................768
AUTOENABLE_MEMORY_HANDLING .................................................................................768
AUTOENABLE_HUGE_SCHEMATIC_DISPLAY ...................................................................769
SDE_CONFIG_OPTIONS.......................................................................................................769
AUTOENABLE_BUILTIN_CHECKS_FOR_POLICY ..............................................................769
Configuration Settings for VHDL Designs ........................................................................770
VHDL_LIB_MAP .....................................................................................................................770
AUTOENABLE_VHDL_SORT ................................................................................................771
DEFAULT_VHDL_SORT_METHOD.......................................................................................771
Configuration Settings for Verilog Designs ......................................................................772
AUTOENABLE_INFERBLACKBOX........................................................................................772
AUTOENABLE_PRECOMPILED_VLOG................................................................................773
Other Configuration Settings ............................................................................................773
COMMAND_OPTION_FILENAME .........................................................................................773
COMMAND_FILE_ARGS .......................................................................................................774
SGDC_INCLUDE_FILE_PATH...............................................................................................774
OVERLOAD ............................................................................................................................775
SPYGLASS_DISPLAY_LANGUAGE......................................................................................776
DEFAULT_SLF_CONFIG_FILE..............................................................................................777
AUTOENABLE_GATESLIB_AUTOCOMPILE ........................................................................778
SpyGlass Functional Signal Processing.................................................................. 779

Recognizing Clocks .............................................................................................................779
Mixed-Language Design Syntax and Semantics Requirements ............................ 781

Overview ................................................................................................................................781
Mixed-Language Design Syntax and Semantics Requirements ......................................781
Instantiation of Verilog Modules in VHDL Architectures ...................................................782
Restrictions .............................................................................................................................786
Instantiation of VHDL Design Units In Verilog Modules ...................................................786
Examples of Instantiating VHDL Design Units in Verilog Modules .........................................787
Version 4.4.1 October 2010 xxiii

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Referencing VHDL Records across Language Boundaries ....................................................788

Mapping Data Types ........................................................................................................ 789
Mapping between VHDL Generics and Verilog Parameters ...................................................790
VHDL Port Mapping to Verilog Ports.......................................................................................790
Index.............................................................................................................................791
xxiv October 2010 Version 4.4.1

Preface
About This Book

The SpyGlass Predictive Analyzer User Guide describes how to use the
Atrenta® SpyGlass® Predictive Analyzer for rule-checking HDL
designs.
Contents of This Book

The SpyGlass Predictive Analyzer User Guide has the following
chapters:
Chapter Describes...
Introducing the SpyGlass Predictive About the SpyGlass Predictive
Analyzer Analyzer
The SpyGlass Predictive Analyzer The SpyGlass Predictive Analyzer
Concepts Concepts
Using the SpyGlass Design Environment The SpyGlass Design Environment
Basic Operating Principles
SpyGlass® Predictive Analyzer User Guide 25

Contents of This Book
Chapter Describes...
The SpyGlass Design Environment Menus The SpyGlass Design Environment
and Toolbar Menu Bar and Toolbar
The SpyGlass Design Environment The SpyGlass Design Environment
Windows windows and their purpose
Analyzing VHDL Designs Working with VHDL source
Analyzing Verilog Designs Working with Verilog source
Analyzing Mixed-Language Designs Working with Mixed-Language
source
Analyzing DEF Designs Working with DEF source
Controlling the RTL Synthesis Engine Features to control synthesis of your
source design
Working with SpyGlass Messages Features to control SpyGlass
Messages
Working with Large Designs Features to analyze very large
source designs
Managing the Design Hierarchy Features to control the design
hierarchy
Using SpyGlass Design Constraints SpyGlass Design Constraints feature
Special Features Special features like the Lib2RTL
feature and Memory Reduction
feature
Mixed-Language Design Syntax and Commonly acceptable Mixed-
Semantics Requirements Language design syntax and
semantics
SpyGlass Functional Signal Processing How SpyGlass works with special
signals like clocks, resets, etc.
Using SpyGlass in the Batch Mode How to use SpyGlass from
command-line
26 October 2010 Version 4.4.1

Preface
Typographical Conventions
This document uses the following typographical conventions:
To indicate Convention Used

Program code OUT = IN;
Object names OUT
Variables representing <sig-name>
objects names
Message Parameter name must start with P_
Message location OUT = IN;
Reworked example with OUT_CLK = IN;
message removed
Important Information NOTE: This rule...
The syntax described in this document uses the following convention:
Convention Indicate...
Square brackets “[ ]” An optional entry or parameter.
Braces “{ }” An entry that can be specified one or more times
Vertical bar “|” A list of choices out of which you can choose one
Horizontal ellipsis “. . .” Other items that are normally provided
Version 4.4.1 October 2010 27

Typographical Conventions

Introducing the SpyGlass
Predictive Analyzer
Welcome to the SpyGlass Predictive Analyzer

The Atrenta® SpyGlass® Predictive Analyzer is a powerful and
extendible tool for analyzing Hardware Description Language (HDL)
designs. SpyGlass can analyze designs written in the two major
hardware description languages: Verilog and VHDL as well as Mixed-
Language designs. In addition, SpyGlass also provides support for
analyzing DEF designs.
You can use SpyGlass to perform any of several industry-standard HDL
analysis and assessment programs, including OpenMORE™ and
STARC™. You can also use SpyGlass to analyze HDL source code
early in the design stage for syntax, semantic, and structural content,
and do complex checks later in the development process. For example,
you might initially use SpyGlass to check Register Transfer Level
(RTL) HDL descriptions. Later, you might use it to analyze gate-level
designs or designs that include both RTL and structural descriptions.

SpyGlass Features
SpyGlass Features
SpyGlass provides the following special features:
• Full language support for Verilog (IEEE 1364, Verilog 2001, and
SystemVerilog) and VHDL (VHDL-87 and VHDL-93).
• A rich suite of built-in rules, including:
• File checks, such as file names, design units per file and headers
• Naming checks on signals, ports, parameters, constants, clocks
and other constructs
• Style and related checks
• Coding for synthesis and related checks
• Design practice and related checks
• Area, timing and synchronization checks
• Clock and reset checks
• DFT, LowPower, Constraints, ERC and similar checks (cost
options)
• A variety of report format options so you can set up your own
reports
• Built-in engines, including RTL synthesis and flattening, to enable
detailed implementation tests including clocking, reset and
synchronization of asynchronous signals
• Two interfaces:
• A Graphical User Interface (GUI) called the SpyGlass Design
Environment or SDE
• A Batch execution for integration in corporate design flows
Additional features allow you to customize SpyGlass to meet your
company’s unique needs. See the SpyGlass Policy Customization
Guide for more details. Customization features include:

Introducing the SpyGlass Predictive Analyzer
• A Perl interface that provides extensive programmability, and

customization of error messages, error severity, and other
parameters
• User-created rules built as dynamically linked C libraries
• User-programmable reporting that allows you to generate message
reports as screen displays, hard copies, files, e-mail, Web pages, and
in other formats
SpyGlass top-level is a full Perl interpreter that allows extensive
integration, helping you to take advantage of open-source libraries for
Web programming, GUI management, and many other capabilities.
Setting Up the SpyGlass Licenses

The path to all license servers for SpyGlass can be given using the
ATRENTA_LICENSE_FILE variable. This enables routing of all
Atrenta client requests to the Atrenta license server. The path specified
for the ATRENTA_LICENSE_FILE variable can either point directly
to the license server, or more often to a copy of the license file on the
client machine, which contains the line ‘USE SERVER’. This line
causes the client to ignore the rest of the file and only use the preceding
lines to find the location of the server.
You can view the value stored in the ATRENTA_LICENSE_FILE
variable from the license debug information generated by using the
-LICENSEDEBUG option. See -LICENSEDEBUG for more details.
Starting the SpyGlass Predictive Analyzer

The SpyGlass Predictive Analyzer can be started in any of the
following modes:
• The SpyGlass Design Environment (Graphical User Interface) mode
See Starting the SpyGlass Design Environment for further details.

• The Batch mode

See Using SpyGlass in the Batch Mode for further details.
Starting the SpyGlass Design Environment

NOTE: All commands described in this document assume that the SpyGlass
Home directory is already in your machine’s path.
The SpyGlass Design Environment Setup

The SpyGlass Design Environment (SDE) does not require any
mandatory environment setup. However, you can set the following
optional environment variables to customize the SpyGlass Design
Environment operations:
Environment Variable Indicates... Default Value

SPYGLASS_HOME SpyGlass <your-inst-dir>/SPYGLASS_HOME
Home
directory
SPYGLASS_LOCAL Local $SPYGLASS_HOME/../../SpyGlass_templates
template
repository
SPYGLASS_TEAM Group $SPYGLASS_HOME/../../SpyGlass_templates
template
repository
ATRENTA_LICENSE_F SpyGlass <port-number>@<hostname>
ILE license
server
NOTE: The SPYGLASS_LOCAL and SPYGLASS_TEAM environment
variables have no impact on batch runs.

Starting the SpyGlass Design Environment on Different Platforms

The SpyGlass Design Environment can run on Solaris and Linux
platforms for both 32-bit and 64-bit architectures.
On the Solaris platform (64-bit) and the Linux platform (64-bit), the
32-bit SpyGlass binaries (SunOS5 and Linux2 binaries respectively)
are executed by default. To enforce 64-bit binary execution (SunOS7
and Linux4 binaries respectively), use the -64bit command-line
option.
Starting the SpyGlass Design Environment Standalone

You can start the SpyGlass Design Environment without specifying
any options, except the language specification command-line option
(-verilog, -vhdl, -mixed, or -def):
%>spyglass -verilog
%>spyglass -vhdl
%>spyglass -mixed
%>spyglass -def
Then, the SpyGlass Design Environment starts with only the operating
language set. Now, you can set up SpyGlass by selecting source files,
library files, SpyGlass Options, etc.
Use the -disablesplashscreen command-line option to invoke
the SpyGlass Design Environment without the Atrenta splash screen.
Starting the SpyGlass Design Environment and Opening a Violation Database

NOTE: The Violation Database files (.vdb files) are platform-independent but
are architecture-dependent. Thus, you should open a Violation Database file
generated on a 32-bit platform on any other supported 32-bit platform.
Similarly, you should open a Violation Database file generated on a 64-bit
platform on any other supported 64-bit platform.

Invoking with the Default Violation Database

You can start the SpyGlass Design Environment without specifying
any options using the following command if a Violation Database file
named spyglass.vdb (generated in an earlier SpyGlass Analysis run) is
present in the current directory and all components described in the
spyglass.vdb file also exist in the current directory:
%>spyglass -gui=sde
Then, the SpyGlass Design Environment opens with all components
described in the spyglass.vdb file displayed.
NOTE: If you just specify spyglass at the command-line and there is no
Violation Database file named spyglass.vdb in the current directory, then the
Atrenta Console GUI will be invoked
Invoking with a Named Violation Database

You can start SpyGlass Design Environment and load an existing
violation database (generated in an earlier SpyGlass analysis run) by
using the following command:
%>spyglass -vdbfile <vdb-file-name>
Where, <vdb-file-name> is a valid violation database file name.
Then, the SpyGlass Design Environment opens with all components of
the specified Violation Database file displayed.
NOTE: When you invoke SpyGlass with only the -vdbfile option
(assuming that the .vdb file exists), this means that you are invoking SpyGlass
for debugging the violations or generating reports. Therefore, the SpyGlass
Design Environment will open without any error message. However, if you
specify the -vdbfile option along with any other option, for example,
-reportfile, this means that SpyGlass is being invoked for another re-
run. In such cases, the Violation Database file is not loaded and a message
appears at the command-line prompting you to specify the language.
NOTE: The -vdbfile option is not honored with the -gui=console
command-line option.

NOTE: The behavior of the -vdbfile command-line option when used to

invoke the SpyGlass Design Environment is different from its behavior when
used in the batch mode. See -vdbfile for more details.
While invoking SDE on a 64bit machine, if you open a .vdb file that has
been created on 32bit machine, SpyGlass displays the following dialog:
Starting and Reconfiguring the SpyGlass Design Environment

You can start the SpyGlass Design Environment and also reconfigure
its settings using the following command:
%>spyglass <spyglass-options>
where <spyglass-options> is a valid set of SpyGlass command-line
options including the language specification command-line option
(-verilog, -vhdl, -mixed, or -def).
specified by <syglass-options> displayed.
Starting the SpyGlass Design Environment and Running SpyGlass Analysis

You can start the SpyGlass Design Environment and also run SpyGlass
Analysis immediately using the following command:
%>spyglass -run <spyglass-options>

specified by <syglass-options> displayed and SpyGlass Analysis is

run on these components.
NOTE: When running SpyGlass, the SpyGlass binary is picked by default from
the SPYGLASS_HOME area as specified in the run command. However, you
can specify a different location for the SpyGlass binary by setting the
SPYGLASS_EXE_PATH environment variable to point to the directory where
the binary is located as follows:
setenv SPYGLASS_EXE_PATH <directory where binaries are
placed>
Starting the SpyGlass Design Environment and Loading a Profile or Template

You can start the SpyGlass Design Environment and load an existing
Profile or Template (see Working with Profiles and Working with
Templates) using the following command:
%>spyglass -f <file-name>
where <file-name> is a valid Profile file name (.spp file) or Template
file name (.spq file).
Then, the SpyGlass Design Environment opens with all components of
the Profile or Template file displayed.
NOTE: If the -vdbfile command-line option is specified in the Profile file,
the SpyGlass Design Environment behavior is as described in Naming
Violation Database File for the Next Run.
Naming Violation Database File for the Next Run

You can start the SpyGlass Design Environment and specify the name
of the Violation Database for the next SpyGlass Analysis run using the
following command:
%>spyglass <spyglass-options>
-namevdb <vdb-file-name>


specified by <syglass-options> displayed. When you run an
analysis, the name of the generated Violation Database file will be
<vdb-file-name>.
SpyGlass can read the <vdb-file-name> file with any file extension.
The SpyGlass Design Environment User Interface

When you start the SpyGlass Design Environment, the SpyGlass
Design Environment user interface appears as shown below:

FIGURE 1. The SpyGlass Design Environment User Interface
Title Bar Navigator Window
Toolbar
File/De-
sign/Con-
straints/
Instances
window
Source
window
Message
window
Status Bar
The SpyGlass Design Environment user interface has the following

elements:
• The Menu Bar that has the SpyGlass Design Environment menu
options.
• The Toolbar that has icons for the important functions.
• The File/Design/Constraints/Instances Window that shows the
Source File Hierarchy, the Design Unit hierarchy, and the SpyGlass
Design Constraints Files

• The Source Window that displays the source description (HDL files,
SpyGlass Design Constraints files, Rule-generated text files, etc.)
• The HDL Navigator Window that displays the loads and drivers
declared for a signal.
• The Message Window that shows the message information in many
useful formats
• The Status Bar that shows information about the currently loaded
design
• The Modular Schematic Window (not shown in the illustration) that
displays the schematic view of the source design
• The Incremental Schematic Window (not shown in the illustration)
that displays the schematic view of the source design across
hierarchies
• The Waveform Viewer Window (not shown in the illustration) that
displays the waveform related to the selected message
• The Legend Window (not shown in the illustration) that displays
details of selected objects
You can trace SpyGlass GUI open and close operations. The GUI trace
details are logged in the spyglass_cmdline_debug.log file. For details
refer to section Files Generated to Support Special Features.


The SpyGlass Predictive
Analyzer Concepts
The SpyGlass Predictive Analyzer Operations
How SpyGlass Works

The Atrenta® SpyGlass® Predictive Analyzer analyzes a set of source
design files and associated library files, if any, based on the command-
line options supplied. After successful analysis, the SpyGlass Predictive
Analyzer generates a Violation Database and Design Schematic Data if
the rule-checking is configured to generate the schematic data.
The SpyGlass Design Environment (GUI of the SpyGlass Predictive
Analyzer) reads and displays the SpyGlass outputs — Violation
Database and Design Schematic Data.
As the SpyGlass Design Environment reads a Violation Database, it
creates a Profile file that has options used in SpyGlass Analysis
(available in the Violation Database).
SpyGlass functional model is summarized in the following figure:

The SpyGlass Predictive Analyzer Operations
FIGURE 1. SpyGlass Functional Mode
Schematic Data
Options
Source Files
SpyGlass
SpyGlass
Design Environment
Library Files
Violation Database Profile

Policies
How SpyGlass analyzes your design

When you run SpyGlass, it analyzes your design in three to six steps,
depending on which rule checks you request. SpyGlass calls only the
analysis tools you need to meet your requests, in order to give you the
fastest runtime.
The six phases of analysis are explained here:
1. SpyGlass interprets pre-compiler directives.
SpyGlass first reads and interprets all pre-compiler directives and
translate-on/translate-off pragmas.
NOTE: Pragmas are runtime commands embedded as comments in your
source code, and used with specific electronic design automation tools.
2. SpyGlass pre-processes policies.
SpyGlass next pre-processes the policies. If you use more than one
policy, the same rule might be specified in several policies.
SpyGlass analyzes the defined policies and removes duplicate rules.
Then SpyGlass processes the rules based on the order the policies

The SpyGlass Predictive Analyzer Concepts
are specified and in the order the rules are defined within the
policies.
3. SpyGlass checks style/Lint rules.
SpyGlass next orders the objects in your RTL design and performs
any checks you request for standard style and Linting rules. It then
logs rule messages and the location of each message in the Violation
Database for processing by the report generator. For each unit in the
design, SpyGlass checks first for HDL syntax and structural errors.
Then it reports with different levels of severity (see section below on
SpyGlass error messages). If you request only style or Linting
checks, SpyGlass ends its run at this point.
4. SpyGlass checks inference rules.
If SpyGlass detects no syntax messages in step 3, and if you have
asked for additional rule checks requiring inferred logic, SpyGlass
next transparently invokes its RTL synthesis engine. This creates an
internal gate-level, hierarchical design built around generic gates
that allows SpyGlass to accurately detect inferred logic such as
latches, flip flops and counters. The gate-level logic naming is
controlled within SpyGlass so any messages found in inferred logic
can easily be mapped back to the RTL code that caused it, which
simplifies debugging.
5. SpyGlass checks connectivity rules.
Once SpyGlass has checked the inferred logic, and if you have asked
for further checks, SpyGlass transparently flattens your design so it
can check complex connectivity rules. These include issues such as
correct synchronization logic at clock domain crossings, reset rules,
combinational loop detection, and DFT and cone analysis. In effect,
this phase can encompass any form of net list checking. As in the
synthesis phase, controlled naming maps any errors SpyGlass
detects back to your source code.
6. SpyGlass uses additional analysis engines
Depending on the complexity of a given rule, SpyGlass will also

SpyGlass Built-in Checking
make use of its internal cycle simulator and/or testability analyzer.

This enables advanced connectivity and behavior checking.
SpyGlass Built-in Checking

While analyzing or synthesizing RTL designs, SpyGlass performs
checks on the HDL syntax and structure. These checks are always
performed automatically, independently of which SpyGlass rules are
requested to be checked.
If any syntax or structure issues are found, SpyGlass generates the
corresponding standard error or warning messages (known as built-in
messages). These built-in messages are different from the rule
messages generated during rule-checking.
There are the following classes of such built-in messages:
TABLE 1. Built-in Messages Classes
Message Type Message Prefix

Syntax errors STX_
Language Warnings WRN_
Synthesis warnings SYNTH_
Synthesis errors SYNTH_
Post-elaboration syntax errors (VHDL only) ELAB_
Syntax Errors and Language Warning messages are language-specific,
that is, there are separate message sets for Verilog, VHDL, and Mixed-
Language respectively. Synthesis warnings and errors are language-
neutral for the most part. See the SpyGlass Built-In Messages
Reference for details of these message sets.
The ELAB_ messages may appear when a VHDL design is being
processed after elaboration. These messages relate to syntax issues and
have the same number and content as the syntax messages except they
have the ELAB_ prefix.

NOTE: Some of the rules in SpyGlass policies are mapped to the SpyGlass
built-in messages. Thus, when you run SpyGlass with rule-checking, some of
the standard warning and error messages are suppressed and equivalent rule
messages are generated in their place.
NOTE: If SpyGlass detects an internal software error, it reports the error as a
WARNING message. These errors are normally associated with a specific
rule’s implementation and the rule name is also reported. Any such error
messages should be reported to Atrenta Customer Support.
Processing the HDL Designs

Processing Verilog Designs
Processing Without Rule-Checking

When you run SpyGlass without rule-checking on a Verilog design, the
following process is followed:
Analyze
Start Exit
Design
Language Warnings (WRN_)

Syntax Errors (STX_)
Basic Synthesis Warnings and Errors (SYNTH_)
The SpyGlass Verilog processing without rule-checking has the

following steps:
1. SpyGlass analyzes the design and generates the following types of
standard built-in messages:
• Language Warning messages (WRN_ messages)
• Syntax Error messages (STX_ messages)

• Basic Synthesis Error and Warning messages (SYNTH_

messages)
2. SpyGlass exits.
Processing With Rule-Checking

When you run SpyGlass with rule checking on a Verilog design, the
Exit1
Analyze RTL Synthesize Netlist Exit2

Start Rule-checking
Design Design Rule-checking
Language Warnings (WRN_) Advanced Synthesis

Syntax Errors (STX_) Warnings and Errors (SYNTH_)
Basic Synthesis
Warnings and Errors (SYNTH_)
RTL Rule Messages (Mapped)
RTL Rule Messages (Direct) Netlist Rule Messages (Direct)
The SpyGlass Verilog processing with rule-checking has the following

steps:
• Basic Synthesis Error and Warning messages (SYNTH_
messages)
SpyGlass also generates rule messages (instead of built-in messages

mapped to the rules in the selected policies)

2. If the design has syntax errors (STX_ messages) after initial
processing, SpyGlass exits (shown as Exit1).
3. If the design does not have any syntax errors, SpyGlass performs
RTL rule-checking and generates rule messages as applicable.
4. SpyGlass synthesizes the design and generates the advanced
synthesis error and warning messages (SYNTH_ messages).
5. SpyGlass performs Netlist rule-checking and generates rule
messages as applicable.
6. SpyGlass exits (shown as Exit2).
Processing VHDL Designs
Processing Without Rule-Checking

When you run SpyGlass without rule-checking on a VHDL design, the
Analyze
Start Exit
Design
Language Warnings (WRN_)

Syntax Errors (STX_)
Basic Synthesis Warnings and Errors (SYNTH_)
The SpyGlass VHDL processing without rule-checking has the

following steps:

• Basic synthesis error and warning messages (SYNTH_ messages)

2. SpyGlass exits.
Processing With Rule-Checking

When you run SpyGlass with rule checking on a VHDL design, the
Exit2
Exit1
Analyze Elaborate RTL Synthesize Netlist

Start Design Rule-checking
Design Design Rule-checking
Syntax Warnings (WRN_) Advanced Synthesis

Syntax Errors (STX_) Warnings and Errors (SYNTH_)
Basic Synthesis
Warnings and Errors (SYNTH_)
RTL Rule Messages (Mapped)
Elaboration Warnings (ELAB_) Netlist Rule Messages (Direct)
RTL Rule Messages (Direct)
The SpyGlass Verilog processing with rule-checking has the following

steps:
• Syntax warning messages (WRN_ messages)
• Syntax error messages (STX_ messages)
• Basic synthesis error and warning messages (SYNTH_ messages)
SpyGlass also generates rule messages (instead of built-in messages
mapped to the rules in the selected policies)

2. If the design has syntax errors (STX_ messages) after initial

processing, SpyGlass exits (shown as Exit1).
3. If the design does not have any syntax errors, SpyGlass may perform
elaboration of the RTL design and generate elaboration time errors
or warnings (ELAB_ messages)
4. SpyGlass performs RTL rule-checking and generates rule messages
as applicable.
5. SpyGlass synthesizes the design and generates the advanced
synthesis error and warning messages (SYNTH_ messages).
6. SpyGlass performs Netlist rule-checking and generates rule
messages as applicable.
7. SpyGlass exits (shown as Exit2).
The SpyGlass Rule Environment
Understanding the SpyGlass Rule Definitions

Each SpyGlass policy whether standard or custom, is a PERL source
file that has the rule definition, the rule group definitions, and PERL
subroutines, if any.
Each rule has a number of attributes that decide how the rule will
function. Some of the important attributes are as follows:
• Rule name, which you use to specify that the particular rule should
be run
• Language, to which the rule applies. You would thus know whether
the rule works on Verilog Only, VHDL Only, or Mixed-Language
Designs.
• Severity of the rule, which indicates how important it is to fix your
source code
• Message displayed if your source code violates the rule

• Rule primitive that is called for the rule

Rule primitives are C functions, found either in the SpyGlass core or in
a shared library. They do the real work of checking rules against your
design and are parameterizable to produce different checks. The
primitive called for each rule is specified in the policy. However, in
normal use, the rule primitives and the rule attributes are transparent to
the user. The rule primitive extracts object data from the design
database, runs checks as defined by the parameters, and generates a
message as defined in the rule, if an error is found.
Rule Types and Order of Execution

SpyGlass rules are categorized to work on a particular design view of
your source file. There are rules that work on the source RTL
description, rules that work on the synthesized hierarchical netlists, and
rules that work on the flattened netlists. Consequently, the rules work
in the same order in which the corresponding design becomes
available.
The SpyGlass rule types by their order of execution are as follows:
1. SETUP type rules
The SETUP type rules are checked just before design analysis
phase. Hence, this category contains those rules that are independent
of HDL source code (Verilog or VHDL) or which are to be checked
inside analysis/synthesis engine. The SETUP type rules are as
follows:
• Rules for checking the command-line options (including the
policy-specific rule parameters) and existence of different custom
data requirements.
• Rules for checking the Liberty library files (.lib files)
• Rules for checking SpyGlass Design Constraints files
• Enabling of Analyzer built-in rules and Synthesis built-in rules.
NOTE: The Analyzer built-in rules and Synthesis built-in rules are only

enabled by standard built-in rule-primitives. Actual checking and rule

message generation occurs during actual analysis or synthesis.
2. RTLALLDULIST type rules
The RTLALLDULIST type rules operate on all RTL design unit
including those from pre-compiled libraries. For Verilog, a design
unit is a module, UDP, or macromodule. For VHDL, a design unit is
an entity, architecture, configuration, package or package body.
An RTLALLDULIST type rule is checked once on each RTL/
Library design unit in the design. These rules can access only the
local design unit data. They cannot access hierarchy information.
3. RTLDU type rules
The RTLDU type rules operate on a single RTL design unit. For
Verilog, a design unit is a module, UDP, or macromodule. For
VHDL, a design unit is an entity, architecture, configuration,
package or package body.
An RTLDU type rule is checked once on each design unit in the
design. These rules can access only the local design unit data. They
cannot access hierarchy information.
By default, the RTLDU type rules do not run on precompiled design
units instantiated in the design. To enable rule checking on such
design units, you need to specify the -hdllibdu command-line
option.
4. RTLDULIST type rules
The RTLDULIST type rules work on the complete RTL design (not
including the pre-compiled library design unit), without elaboration.
An RTLDULIST type rule is checked once on the complete design.
These rules can access only the local design unit data. They cannot
access hierarchy information.
By default, the RTLDULIST type rules do not run on precompiled
design units instantiated in the design. To enable rule checking on
such design units, you need to specify the -hdllibdu command-

line option.
5. ELABDU type rules
The ELABDU type rules work on the elaborated design units.
An ELABDU type rule is checked once on each design unit,
elaborated with unique set of parameters/generics with which it has
been instantiated. For example, if a module is instantiated 4 times
with a parameter value of 5 and 2 times with a parameter value of 7,
then the module would be elaborated only twice, (instead of 4+2)
once with 5 as the parameter value and once with 7 as the parameter
value.
6. RTLTOPDU type rules
The RTLTOPDU type rules are run on the top design unit,
determined by SpyGlass after design elaboration.
7. LEXICAL type rules
The LEXICAL type rules check on each design file, one at a time.
This category generally contains non-electronic and text-based
rules, such as line-length, tabs, indentation, naming conventions, etc.
By default, the LEXICAL type rules do not run on precompiled RTL
files. To enable rule checking on such design units, specify the -
hdllibdu command-line option.
8. VSDU type rules
The VSDU type rules check upon a synthesized object model of a
design unit.
A VSDU type rule is checked once on each synthesized design unit.
9. VSTOPDU type rules
The VSTOPDU type rules are run on the synthesized object model
for each top module hierarchy.
Since the RTL view is not available, such rules’ checking is limited
to only the synthesized object model.
10.BLOCKDU_CD type rules

The BLOCKDU_CD type rules run on user-specified design units

flattened down to the specified flattened partitions (called blocks)
and the blocks themselves.
Here, the design units are flattened only till the block boundaries and
each block in turn is flattened till the boundaries of its sub-blocks, if
any.
The BLOCKDU_CD type rules run on each specified design unit
and each block once.
Consider the following example where the design unit top has a
partition named blk1:
FIGURE 2. Processing with BLOCKDU_CD type rules
top top
blk1 blk1 blk1
Flattened area
In this case, each BLOCKDU_CD type rule is run once on the

design unit top flattened up to the block blk1 boundary and once
on the flattened block blk1.
11.FLATBLOCKDU type rules
The FLATBLOCKDU type rules run on user-specified flattened
design units and only the specified flattened partitions (or blocks)
within these design units.
Here, the design units and blocks are fully flattened till leaf-level.
The FLATBLOCKDU type rules run on each user-specified

flattened design unit and each specified block under the design unit
once.
Consider the following example where the design unit top has a
partition named blk1:
FIGURE 3. Processing with FLATBLOCKDU type rules
top top
blk1 blk1 blk1
Flattened area
In this case, each FLATBLOCKDU type rule is run on the design

unit top flattened down to leaf-level and on block blk1 flattened
down to leaf-level.
12.FLATDU type rules
The FLATDU type rules run on the Flat Object Model for each top
module in design.
13.FLATDU2_WOL type rules
The FLATDU2_WOL type rules run on the Flat Object Model
where the .lib instances are not flattened. Also, the .lib functionality is
not visible to these rules. Unlike the FLATBLOCKDU type rules,
the flattening of such rules is applied to the top-level design units
only.
The SpyGlass ERC policy has rules of this type which just use the
cell’s electrical information but not the cell functionality.
14.FLATDU2_WL type rules

The FLATDU2_WL type rules are same as the FLATDU2_WOL

type rules except these rules are designed to work with the SpyGlass
Logic Evaluator.
15.ALLVIEWS_WL type rules
The ALLVIEWS_WL type rule category is a special deprecated
case. The rules of this category require all design views (RTL,
Synthesized, and Flattened) in memory and are run after
FLATDU2_WL type of rules and before FLATDU type of rules.
From flattening point of view, they are similar to FLATDU2_WL
type of rules.
16.ALLVIEWS type rules
The ALLVIEWS type rule category is a special deprecated case.
The rules of this category require all design views (RTL,
Synthesized, and Flattened) in memory and are run only after rules
of all other categories have been run.
Mandatory Rules
In each SpyGlass run, some mandatory set of rules are automatically
run to check for various issues in the SGDC file, waiver file, sglib files,
design read and command line. Currently, these mandatory rules are
run even if you do not specify any SGDC or waiver file. This issue will
be fixed in some future SpyGlass release.
Following is the list of mandatory rules that are automatically run in
each SpyGlass run:
AnalyzeBBox checkDupCell CMD_template02 DetectTopDesig
nUnits
ElabSummary GenerateConfMa HdlLibDuCheck InferBlackBox
p
PrecompileLibC PrecompileLibCh PrecompileLibCh PrecompileLibCh
heck01 eck02 eck03 eck04

ReportSglibSum ReportSglibVersi ReportStopSumm ReportUDP_01

mary onSummary ary
ReportUDP_02 RtlDesignInfo SGDC_assume_p SGDC_clock05
ath01
SGDC_clock09 SGDC_fifo01 SGDC_force_ta0 SGDC_memory
5 writepin04
SGDC_powerdo SGDC_require_p SGDC_require_v ZeroSizeFile
mainoutputs02 ath03 alue03
SGDC_reset02 SGDC_reset03 SGDC_sdcschem SGDC_supply01
a02
SGDC_testmod SGDC_voltagedo SGDC_voltagedo SGDC_voltaged
e03 main05 main06 omain07
SGDC_waive01 SGDC_waive02 SGDC_waive03 SGDC_waive04
SGDC_waive33 SGDC_waive35 TargetLibraryChe
ck
Running Specific Set of Rules

The ON/OFF behavior of certain rules may depend upon some
parameters. Consider a policy, P1, which has rules, R1 and R2, such
that:
• The ON behavior of R1 is independent of any parameter
• The ON behavior of R2 is dependant on parameter, p1, such that if
p1 is set then R2 will run.
At the command prompt, typing the following commands would decide
which rule/rules would be executed:

• -policy P1
This will run the rule, R1.
• -policy P1 -p1
This will run both the rules, R1 and R2.
• -policy P1 -rules R2
This will run the rule, R2. In this case, adding command line -p1
will give the same result.
For example, in the lint policy, if the fast parameter is set, the
following rules would not run:
W18 W287a W287b W323 W336 W391 W392

W396 W401 W402 W402b W414 W415 W428
W438 W448 W541
At the command prompt, the following commands would decide which
rules would run:
• spyglass -verilog -batch -policy=lint test.v
This would run the rules given in the above table, in addition to all
the other rules in lint that are not dependant upon any parameter.
-fast
This would restrict the execution of the rules given in the above
table. However, all the other rules in lint that are not dependant on
any other parameter will run.
-rules W415
This would only run the W415 rule.

Atrenta Standard Policies

SpyGlass analyzes HDL source files using pre-defined rules contained
in policy files. A number of Atrenta Standard policies are installed with
SpyGlass.
The Atrenta Base Policies that are available with SpyGlass are:
• lint, which is based on the commonly accepted set of HDL rules for
detecting syntax errors and common connectivity errors such as
unused signals and undriven inputs.
• openmore, which is based on the OpenMORE standard developed
by Synopsys and Mentor Graphics, and which sets forth certain
coding styles and practices that enhance the reusability of HDL
design modules.
• starc/starc2002/starc2005, which is based on IP Reuse guidelines
compiled by Semiconductor Technology Academic Research Center
(STARC).
• area, which includes rules used to identify HDL that may cause
potential problems in silicon area downstream.
• clock-reset, which includes rules to check on the clock and reset
structures in the design
• latch, which includes rules related to latch based designs
• miscellaneous, which includes useful rules that cannot be classified
in any other default policies.
• timing, which includes rules to identify potential timing issues in
the design.
• erc, which checks a design for correct electrical connectivity at the
gate level.
In addition, there are Atrenta advanced policies available that can be
purchased separately:
• dft, which checks a design for testability issues at the RT level.

• constraints, which checks the suitability of the Synopsys Design

Constraints files
• lowpower, which checks the design for the structural, architectural,
and system level issues in order to reduce power.
• clock-reset, which include rules to check clocks, resets, and clock-
domain-crossings in the design
• power_est, which include rules for power estimation and power
reduction
• txv, which is used to verify correctness of timing exceptions and/or
check if critical paths can be ignored or relaxed during timing
sign-off.
Customizing SpyGlass Rules

SpyGlass allows you to customize a number of its functions to meet
your company’s needs. For example:
• Add your own rules or modify the pre-defined rules making use of
the pre-defined primitives.
See the SpyGlass Policy Customization Guide for more details.
• Modify the SpyGlass defaults for rule severities, messages, allowed
name syntax, or other parameters.
• Create new rule-primitives using an API (requires the optional
SpyGlass Builder product)
See the SpyGlass Builder Guide for more details.
• Create custom reports

Processing Messages and Displaying Reports
About Message Reporting

As described earlier, SpyGlass generates the corresponding rule
message whenever a particular rule is violated in the design. These rule
messages are reported in the following ways:
1. Written to the Violation Database
2. Written to a report file
3. Written to the SpyGlass log file
When you open a Violation Database in the SpyGlass Design
Environment, the rule messages are also displayed in various windows
and tabs. See other sections of this document for more details.
About Rule Severity

SpyGlass supports two levels of rule severity - rule severity-labels and
rule severity-classes.
Each SpyGlass rule has a rule severity-label and each rule severity-
label is classified under one of the predefined rule severity-classes.
Rule severity-labels are policy-specific and rule severity-classes are
predefined for SpyGlass.
After a SpyGlass Analysis run, the rule-checking summary is printed
that reports total rule messages found under each rule severity-label
and total rule messages found under each predefined rule severity-class
that is, the sum of total rule messages found under each rule severity-
label classified under that rule-severity class.
If no rule messages of a particular rule severity-label are found, that
rule severity-label is not reported in the rule-checking summary. If no
rule messages of all rule severity-labels under a particular rule severity-
class are found, that rule severity-class is not reported in the rule-

checking summary.
The rule severity-classes are reported in the order of decreasing
severity.
SpyGlass allows you to upgrade the severity of all the rules, whether
the rule is a built-in rule or not. However, to downgrade the severity of
a rule (built-in or non-built-in), you need to check for the following
cases:
• If a rule is a mandatory built-in rule that can be ignored,
downgrading the severity of that rule is allowed.
• If a rule is a mandatory built-in rule that cannot be ignored,
downgrading the of severity of that rule should NOT be allowed.
• If a rule is a non-built-in rule, downgrading the of severity of that
rule can be allowed as this does not impact the basic design OM.
Predefined Rule Severity-Classes

SpyGlass supports the following five rule severity-classes:
FATAL Rule Severity-Class

The FATAL rule severity-class is primarily used for a stopper situation
related to design rule-checking. Occurrence of a rule message of this
class aborts further rule-checking by SpyGlass and requires immediate
attention from the user so that rule-checking can be resumed.
Examples of messages of the FATAL rule severity-class are as follows:
1. Syntax Error in the input design source
Almost all syntax errors cause immediate termination of further
rule-checking by SpyGlass since syntax error indicates inability to
create a consistent design view that is required by later stages of
rule-checking by SpyGlass. Hence, such messages are identified as
FATAL class messages. However, certain simulation-related syntax
errors may be classified as non-FATAL messages because such

errors do not affect the synthesis-oriented design view that is

required by SpyGlass even when the constructs are syntactically
incorrect as per LRM specifications.
2. Custom policy assumptions about the design that are found to be
invalidated at runtime
One example of such assumption is when a custom policy requires
that assign statements are not used in the Verilog design source.
Then, there would be a rule in the policy that will run first and flag
all uses of assign statements. If this rule is violated, that is, if such
statement are actually found in a design, further rule-checking
cannot be performed because all subsequent rules do not take the
Verilog assign statement functionality into account.
In a large majority of SpyGlass runs, FATAL rule severity-class
messages are not expected. Occurrence of such messages indicate an
interrupted run and would normally require re-run of SpyGlass after the
reported problem has been fixed.
A rule of FATAL rule severity-class is always run completely.
However, if a rule message is found for a rule of FATAL rule severity-
class, no further rule-checking is performed.
ERROR Rule Severity-Class

The ERROR rule severity-class is normally used to indicate a design
error that would cause design functionality to be compromised.
Normally, such messages indicate an immediate bug in the design from
the perspective of design-integrity aspect being analyzed by the
SpyGlass run. Presence of such ERROR rule severity-class messages
require user to (usually) fix the design after suitable analysis. Applying
waiver on an ERROR rule severity-class message may require detailed
justification and approval in the SpyGlass use-model adopted by a
typical user. In contrast, other lower-precedence messages indicate
only a potential error situation or non-compliance with design
development guidelines that do not, however, directly impact the
design functionality.

Normally a few of these ERROR rule severity-class messages would be

expected on a typical in-development design. For a known good
design, ERROR rule severity-class messages will be few and typically
report only those design errors that are not verifiable by traditional
simulation and other verification procedures.
WARNING Rule Severity-Class

The WARNING rule severity-class is the next less-severe message
class after the ERROR rule severity-class. As described earlier, a key
characteristic of such messages is that these messages indicate only a
potential error situation or non-compliance with design development
guidelines that do not, however, directly impact the design
functionality. Hence, you can apply selective waivers on such
messages with relatively more freedom (and confidence) than say, an
ERROR rule severity-class message. However, from SpyGlass
perspective, such messages still carry a hint of caution and should not
be ignored without proper analysis.
INFO Rule Severity-Class

The INFO rule severity-class represents all SpyGlass rule-checking
output that is of informative nature. Such output may either be general
design statistics or may represent any kind of design query that a user/
policy may wish to perform.
Hence, while the count of FATAL, ERROR, or WARNING rule
severity-class messages can be used as a measure of design quality,
reporting of INFO rule severity-class output is not expected to be a
measure of design quality. Instead, it will depend on the design size and
amount of design statistics and query data that a user is intending to
extract.
DATA Rule Severity-Class

The DATA rule severity-class represents SpyGlass output not

belonging to any of other rule severity-classes. Such cases may be

secondary data to debug any of preceding rule messages or may
represent information that is not reported as part of usual SpyGlass
message reports or GUI display.
Typically, you would not be aware of this output. Such output is
intended for better diagnostics and usability support within SpyGlass
environment. You should not assume anything about the existence or
other details of this data.
Rule messages of DATA severity class are not displayed in the
SpyGlass Design Environment or SpyGlass reports except in the
Session Log Page of the The Message Window, where the total reported
messages are categorized according to the above predefined rule
severity classes (a category is shown in the Session Log Page only if
any message is reported for that category).
High Profile Rules

The high profile rules feature allows you to specify certain important
rules of a policy that have been identified as high-profile rules and then
have them reported first in all SpyGlass standard reports. This feature
ensures that these important rule messages are easily available and are
not lost in other rule messages.
For example, the following built-in rules have been made high-profile
rules:
• DetectTopDesignUnits
• DetectBlackBoxes
• ReportUnsynthesizedDU
Similarly, the Const_Sanity_Rule and the SDCPARSE rules of the
SpyGlass Constraints policy have been made high-profile rules.

SpyGlass Results Summary

At the end of a SpyGlass Analysis run, a results summary is generated
as shown in the following example:
------------------------------------------------------------
Results Summary:
------------------------------------------------------------
Command-line read: 0 error, 0 warning, 0 information message
Design Read : 0 error, 0 warning, 1 information message
Found 1 top module:
mod_2_10_1_6_test4 (file: ..source/test4.v)
Blackbox Resolution: 0 error, 0 warning, 0 information message

SGDC Checks : 0 error, 0 warning, 0 information message
** Policy starc : 2 errors, 0 warning, 0 information message
-----------------------------------------------------------------
Total : 2 errors, 0 warning, 1 information message
Total Number of Generated Messages : 3 (2 errors, 0 warning, 1 Info)

Number of Reported Messages : 3 (2 errors, 0 warning, 1 Info)
NOTE: It is recommended to first fix/reconcile fatals/errors

reported on lines starting with ** as subsequent issues might be
related to it. Please re-run SpyGlass once ** prefixed lines are
fatal/error clean.
-----------------------------------------------------------------
SpyGlass Exit Code 0 (Rule-checking completed with errors)
The first count set in the summary indicates the number of FATAL
severity-class messages found in the design. This column is not printed
if there are no FATAL severity-class messages.
The subsequent count sets indicate the count of messages found for
other severity-classes (ERROR, WARNING, and INFO). If there are no
messages found for one of these severity-classes, the corresponding
count set is reported as zero.
Message Count Summary

Next, the count of total generated messages, the waived messages, and
the reported messages is displayed as in the following example:

SpyGlass Exit Status
Total Number of Generated Messages : 3 (2 errors, 0 warning, 1 Info)

Number of Reported Messages : 3 (2 errors, 0 warning, 1 Info)
Number of Waived Messages : 1(0 errors, 1 warning, 0 Info)
In case, you have set a rule message reporting limit using the -lvpr
command-line option and some messages are suppressed, the count of
suppressed messages is reported as in the following example:
...
Number of Overlimit Messages : 25
(2 errors, 11 warnings, 12 Infos
...

In the end, the SpyGlass Exit status is reported. See SpyGlass Exit
Status for more details.

For better integration with other stream tools, SpyGlass now generates
its exit status code that gives you the exact status of the SpyGlass run.
By default, SpyGlass reports an exit code of 0 for a successful run and
prints one of the following messages:
• SpyGlass Exit Code 0 (Rule-checking completed
without errors or warnings)
with warnings)
with errors)
• SpyGlass Exit Code 0 (Informational command
executed, rule-checking not done)
You can use the -enable_pass_exit_codes command-line
option to report different exit codes for each of the above cases

depending on the type of message generated in the current run.

NOTE: Waived messages are not considered while deciding the exit status.
Only reported messages are considered.
• When the SpyGlass run has been completed without any error or
warning messages, the following SpyGlass Exit Status message is
printed:
SpyGlass Exit Code 0 (Rule-checking completed without
errors or warnings)
Typically, this situation indicates that your design is clean with
respect to the rules run.
• When the SpyGlass run has been completed without any error
messages but with warning messages, the following SpyGlass Exit
Status message is printed:
SpyGlass Exit Code 11 (Rule-checking completed with
warnings)
This status indicates that some rules of severity warning have been
violated. See WARNING Rule Severity-Class for understanding and
handling warning messages.
• When the SpyGlass run has been completed with error messages
(and possibly warning messages), the following SpyGlass Exit
Status message is printed:
SpyGlass Exit Code 12 (Rule-checking completed with
errors)
This status indicates that some rules of severity error have been
violated. See ERROR Rule Severity-Class for understanding and
handling error messages. In case, there are warning messages also,
see WARNING Rule Severity-Class for understanding and handling
warning messages.
• If you have executed an informational option of SpyGlass, the
following SpyGlass Exit Status message is printed:
SpyGlass Exit Code 20 (Informational command executed,
rule-checking not done)

Typically, no further action is required for this exit status.

When SpyGlass is unable to complete a run successfully, a different
exit status is reported as follows:
• When the SpyGlass run is terminated due to an abnormal error that
is not trapped by SpyGlass, the following SpyGlass Exit Status
message is printed:
SpyGlass Exit Code 1 (Abnormal termination - termination
not trapped by software)
This exit status indicates that some operating system-related
problem (like Stack Overflow and some out of memory issues). In
such case, the SpyGlass log file may also be incomplete since
SpyGlass was not able to trap the error signal and report suitably in
log file.
Typically, you need to check the machine resources available and
correct as required. If the problem persists, you need to report the
problem to Atrenta.
• When the SpyGlass run is terminated due to an error that is trapped
by SpyGlass, the following SpyGlass Exit Status message is printed:
SpyGlass Exit Code 3 (Abnormal termination - termination
trapped by software)
This exit status indicates that some operating system-related
problem (like Segmentation Fault or Memory Corruption) has
occurred but SpyGlass was able to trap the error signal and report
suitably in log file.
Typically, you need to check the gdb trace and stack trace printed in
the SpyGlass log file and take corrective action. After SpyGlass
traps the error signal, it tries to generate the moresimple report that
contains error messages and/or rule violations reported before the
end of run. If moresimple report is generated, it may contain useful
information which may help in debugging the situation. Along with
the error details given in the SpyGlass log file, send the moresimple
report to Atrenta Support.

• When the SpyGlass run is terminated due to a license failure, the

following SpyGlass Exit Status message is printed:
SpyGlass Exit Code 4 (License failure, rule-checking
aborted)
Check the license status and correct as required.
• When you forcibly terminate a SpyGlass run by killing the
corresponding process, the following SpyGlass Exit Status message
is printed:
SpyGlass Exit Code 5 (Rule-checking interrupted by User)
The SpyGlass-generated results may be incomplete in this case and
should not used.
• When the SpyGlass run is terminated due to a fatal design error
(syntax errors), the following SpyGlass Exit Status message is
printed:
SpyGlass Exit Code 6 (Rule-checking terminated due to
FATAL errors - design syntax error)
Typically, you need to check the design inputs and correct as
required. See FATAL Rule Severity-Class for understanding and
handling fatal messages.
• When the SpyGlass run is terminated due to incorrect usage and
incorrect/incomplete inputs, the following SpyGlass Exit Status
message is printed:
SpyGlass Exit Code 7 (Rule-checking terminated due to
FATAL errors - usage or run error)
Typically, you have missed providing some inputs that are essential
for SpyGlass rule-checking. Check your inputs and correct as
required. See FATAL Rule Severity-Class for understanding and
handling fatal messages.
• When the design cannot be saved probably because of incorrect save
database directory and so on, the following SpyGlass Exit Status
message is printed:
SpyGlass Exit Code 8 (Design database save failure, rule-

About the Message Reports
checking aborted)
Rectify the Save/Restore related options in the command-line to
solve this issue

When you check your design by applying rules, SpyGlass records rule
messages in a Violation Database. You can then choose among several
predefined report formats to display these messages or redirect reports
to files for later review. You can also use the SpyGlass Design
Environment to review them.
In addition, most Atrenta Standard Policies also generate their policy-
specific reports. See the respective Policy documentation for more
details.
The SpyGlass standard reports are created in the $CWD/
<vdb-name>_reports directory where $CWD is your current working
directory (default is current directory) and <vdb-name> is the name of
the Violation Database file as set with the -vdbfile command-line
option or the -namevdb command-line option (default is
spyglass). The policy-specific reports are created in the in the
$CWD/<vdb-name>_reports/<policy-name> directory where <policy-
name> is the policy mnemonic.
NOTE: All SpyGlass reports, including policy reports, that were earlier created
in the current working directory are now created in the
<vdb-name>_reports directory under the current working directory. Use the
--write_vdb_reports_in_wdir command-line option to revert to the earlier
behavior.
The Reports Toolbar

The Reports Toolbar is present in the standard SpyGlass reports and
policy-specific reports. This toolbar enables you to save, print, and
search for text in these reports. The report toolbar is shown below.

Print Next
Message
Save Find
The Automatic Report

Whenever you run a SpyGlass analysis without specifying a report
format to be generated, SpyGlass automatically generates The
moresimple report. You can change the automatic report format by
specifying the name of the report format you wish to create to the
DEFAULT_REPORT_FORMAT key.
Determining Available Report Formats

SpyGlass comes with several standard report formats. In addition, the
SpyGlass environment can be customized to include your own report
formats. To view the available SpyGlass standard report formats, use
the -printreportformats command-line option as follows:
spyglass -printreportformats
This command-line will print on the screen a simple list of the names of
all standard SpyGlass reports currently registered for use. These report
names can then be used with the -report command-line option,
described below, to select the required format.
The standard report formats supplied with SpyGlass are as follows:

TABLE 2. SpyGlass Standard Report Formats

count emacs inline
moresimple moresimple_filesort moresimple_rulesort
score sgra_report sign_off
simple summary tags
vim waiver moresimple_sevclass
no_msg_reporting_rule
Specifying a Report Format

To specify a single report format at run time, use the -report
command-line option as in the following example:
spyglass -vhdl -report summary -policy=lint \
mydesign.vhd
The above command requests SpyGlass to generate and display the
summary report on a VHDL file named mydesign.vhd.
If you want reports in more than one format, use the -report
command-line option for each report format as in the following
example:
spyglass -vhdl -report summary -report inline \
-policy=lint mydesign.vhd
The above command requests both the summary report and the inline
report on a VHDL file named mydesign.vhd.
Standard Report Formats
Grouping in Standard SpyGlass Reports

The following standard SpyGlass reports have been enhanced to
display the rule messages grouped into useful groups:
• The simple report

• The moresimple report

NOTE: The sign_off report has a section that is the same as the moresimple
report. Therefore, this section of the sign_off report has also been enhanced.
The rule messages are grouped in the reports in the following order:
In Batch Reports:
1. New, PreExisting, and Fixed/Missing messages
This grouping criteria is enabled in the Incremental mode.
NOTE: There is no further grouping inside Fixed/Missing messages group.
2. BuiltIn Messages vs Non-BuiltIn messages
This grouping criteria is always enabled.
3. Rule Templates
This grouping criteria is enabled when you run a template.
In SDE Reports:
1. New, PreExisting, and Fixed/Missing messages
NOTE: There is no further grouping inside Fixed/Missing messages group.
2. BuiltIn Messages vs Non-BuiltIn Messages
3. User Tags
These tags are applied on the rule messages by using the tagging
feature of SDE.
4. Rule Templates
NOTE: The grouping order of the rule messages in SDE reports is the same as
the grouping order selected by you in SDE. Refer to the Grouping Messages
section for details about the configuration of the above grouping order.
The generated reports contain different sections for leaf-level messages
within each of the above grouping orders.
For example, if you have selected two templates, namely T1 and T2, for
the current SpyGlass run and the Incremental mode is set, then the
reports will contain the following sections:

######################################################
New Messages -> BuiltIn
<New BuiltIn messages>
New Messages -> Non-BuiltIn -> Template=<NoTemplate>
<New Non-BuiltIn messages of the rules which do not
belong to any of the templates>
New Messages -> Non-BuiltIn -> Template=T1
<New Non-BuiltIn messages of the rules belonging only to
the template T1>
New Messages -> Non-BuiltIn -> Template=T1, T2
<New Non-BuiltIn messages of the rules belonging to both
the templates T1 and T2>
New Messages -> Non-BuiltIn -> Template=T2
<New Non-BuiltIn messages of the rules belonging only to
the template T2>
######################################################
######################################################
PreExisting Messages -> BuiltIn
<PreExisting BuiltIn messages>
PreExisting Messages -> Non-BuiltIn ->
Template=<NoTemplate>
<PreExisting Non-BuiltIn messages of the rules which do
not belong to any of the templates>
PreExisting Messages -> Non-BuiltIn -> Template=T1
<PreExisting Non-BuiltIn messages of the rules belonging
only to the template T1>
PreExisting Messages -> Non-BuiltIn -> Template=T1, T2
to both the templates T1 and T2>
PreExisting Messages -> Non-BuiltIn -> Template=T2
only to the template T2>
######################################################
######################################################
Fixed/Missing Messages

<Fixed/Missing messages>
######################################################
In SDE, additional sections corresponding to the user tags will be

created in the reports as follows:
######################################################
New Messages -> BuiltIn -> UserTag=”Fixed”
<New BuiltIn messages which have been tagged as “fixed”>
New Messages -> Non-BuiltIn -> UserTag=<NoTag> ->
<New Non-BuiltIn messages which have not been tagged and
belonging to the rules which do not belong to any of the
templates>
New Messages -> Non-BuiltIn -> UserTag=”Verified” ->
<New Non-BuiltIn messages which have been tagged as
“Verified” and belonging to the rules which do not belong
to any of the templates>
Template=T1
belonging to the rules which belong only to the template
T1>
New Messages -> Non-BuiltIn -> UserTag=”Fixed” ->
Template=T1
<New Non-BuiltIn messages which have been tagged as
“Fixed” and belonging to the rules which belong only to
the template T1>
Template=T1, T2
belonging to the rules which belong to both the templates
T1 and T2>
Template=T2


belonging to the rules which belong only to the template
T2>
######################################################
######################################################
PreExisting Messages -> BuiltIn -> UserTag=”Fixed”
<PreExisting BuiltIn messages which have been tagged as
“fixed”>
PreExisting Messages -> Non-BuiltIn -> UserTag=<NoTag>
-> Template=<NoTemplate>
<PreExisting Non-BuiltIn messages which have not been
tagged and belonging to the rules which do not belong to
any of the templates>
PreExisting Messages -> Non-BuiltIn ->
UserTag=”Verified” -> Template=<NoTemplate>
<PreExisting Non-BuiltIn messages which have been tagged
as “Verified” and belonging to the rules which do not
belong to any of the templates>
-> Template=T1
tagged and belonging to the rules which belong only to the
template T1>
PreExisting Messages -> Non-BuiltIn -> UserTag=”Fixed”
-> Template=T1
<PreExisting Non-BuiltIn messages which have been tagged
as “Fixed” and belonging to the rules which belong only to
the template T1>
-> Template=T1, T2
tagged and belonging to the rules which belong to both the
templates T1 and T2>
-> Template=T2
tagged and belonging to the rules which belong only to the

template T2>
######################################################
######################################################
Fixed/Missing Messages
<Fixed/Missing
messages>##################################################
####
The count report

The count report lists the number of times SpyGlass found each type of
message. It also displays the total number of messages of rules that you
previously waived or excluded.
FIGURE 4. Example of the count Report

The inline report

The inline report displays the messages annotated in your source code.
SpyGlass notes any messages found in your source code and displays
each message above the line containing the error. To help you spot the
messages, SpyGlass prefixes them with ‘>>>’.
FIGURE 5. Example of the inline Report
The moresimple report

The moresimple report is the default SpyGlass report and is similar to
the simple report. However, it does not truncate long names and
messages.

FIGURE 6. Example of the moresimple Report
The moresimple report displays:

• Name of the rule violated
• Alias of the rule (in the above example, no aliases were specified)
An alias is an alternative name for the rule. It can be a cross-
reference to a standards document, such as the OpenMORE standard
or in-house coding standard or guideline.
• Severity level of the message
• Name of the file where SpyGlass found the message
• Line number of the code containing the message

• Weight of the message

The weight is a number assigned based on the severity of the
message.
• A message explaining why SpyGlass logged the message
NOTE: The alias, severity level, weight, and message are defined in the
original rule.
NOTE: SpyGlass does not elaborate the dead code of a module, but performs
parsing of such code. However, violations due to parsing are not reported in the
moresimple report. Such violations are captured in the spyglass.log file.
The moresimple_filesort report

The moresimple_filesort report is similar to The moresimple report
except the rule messages are sorted in the order — file, severity,
weight, rule, and line number if the -sortrule command-line option is
not specified or in the order — file, severity, weight, rule (sorted based
on the -sortrule command-line option values), and line number if
the -sortrule command-line option is specified.
The moresimple_rulesort report

The moresimple_rulesort report is similar to The moresimple report
except the rule messages are sorted by the rule name first and for a
given rule, by their file and line.
The moresimple_sevclass report

The moresimple_sevclass report is similar to The moresimple report
with an additional information displaying the severity class.
The no_msg_reporting_rules report

The no_msg_reporting_rules displays the list of those rules that did not
produced any violation or were waived off during SpyGlass run.

This report can be generated in any of the following ways:

• If -report <report-name> has been specified on command-line
In this case, SpyGlass generates the
no_msg_reporting_rules report along with the
<report-name> report.
• If -report has not been specified, but a report, <report-name>
has been specified with the DEFALUT_REPORT_FORMAT key in
the setup file
In this case, SpyGlass generates the
no_msg_reporting_rules report along with the default
report, <report-name>.
The score report

SpyGlass also has a built-in scoring system for code checks. The report
generator notes how frequently each rule message occurs and computes
the score for each item. The score report displays the sum of all the
scores for the messages SpyGlass flags. This report does not show
weight scores but the overall score is still an indicator of the relative
quality of your design.

FIGURE 7. Example of the score Report
The sgra_report Report

The SpyGlass Results Analyzer report (sgra_report) generates an
encapsulated file containing the source files and messages.
See SpyGlass Results Analyzer for more details.
The sign_off report

The sign_off report lists summary and detailed information about the
SpyGlass analysis run.
The sign_off report has the following sections:
• The Header section has SpyGlass version, selected policies’
versions, user name, top-level design unit name(s) with file name
and line number information, template(s) used, if any, the current
working directory, counts of messages generated, messages waived,
if any, messages reported, and messages suppressed, if any.

• The Rule Setup Info section has list of SpyGlass command-line

options used in the Analysis run with the actual value passed and its
origin (command-line, template/session file, or SpyGlass
Configuration file). The source file details are printed at the end of
the list followed by unknown options, if any.
NOTE: When you create the sign_off report in the batch mode, the user-
specified values of the -rules, -ignorerules, and -addrules
command-line options are reported separately. However, when you create
the sign_off report from the SpyGlass Design Environment, the final
effective set of selected rules is reported against the -rules command-
line option (that is, the -ignorerules and -addrules command-
line options are not reported separately).
• The Policy Info section has the names, versions, and locations of
selected policies.
• The Constraints Info section has the details of user-specified
SpyGlass Design Constraints.
• The Parameter Info section has the list of user-specified rule
parameters with their applied values and origin (command-line,
template/session file, or SpyGlass Configuration file).
• The Waiver Info section has the list of applied waivers with waiver
comment, if any, waiver expression, and the number of messages
waived. This section also contains the spg_backref field. This
field is used to specify the back reference information about the
waiver command, i.e., the file and line number of the waiver file in
which the waiver command was specified.
• The Violation Info section has two sub-sections:
• The Summary Status sub-section has severity class, rule name,
message count, and rule short description for each rule that has
flagged a message. The list is sorted by the severity class.
• The Detailed Status sub-section has same details as The
moresimple report.

The simple report

The simple report lists every message detected. The simple report
truncates (cuts off) long names and messages to fit the report’s layout.
FIGURE 8. Example of the simple Report
The simple report displays:


• Message explaining why SpyGlass logged the message

NOTE: The rule severity level and rule message are defined in the original rule.
The Summary report

The Summary report displays a summary list of message counts by
each particular rule type along with the severity class and rule short
help.
The rules are grouped based on the default grouping criteria. Within
each group, the data is first sorted by the severity class and then by rule
name.
FIGURE 9. Example of the summary Report

The waiver report

The waiver report is generated whenever one or more rules are waived
during a SpyGlass analysis run. See Waiving Messages for details of
waiving messages.

FIGURE 10. Example of the Waiver Report

The Waiver report has three sections:

• The Design Issues Waiver Report section has actual waived
messages waived due to arguments other than the -ignore
argument or the -ip argument of the waive constraint
• The IP/Legacy Waiver Report section has the waived message count
due to the -ip argument of the waive constraint and the actual
waived messages waived if the -report_ip_waiver command-line
option is specified.
• The Adjustments Waiver Report section has the waived message
count due to the -ignore argument of the waive constraint and
the actual waived messages waived if the
-report_adjustment_waiver command-line option is specified.
The Waiver report also contains the spg_backref field. This field is
used to specify the back reference information about the waiver
command, i.e., the file and line number of the waiver file in which the
waiver command was specified.
See Waiving Messages Using the SpyGlass waive Constraint for details
of waive constraint.
Cross-probing from Standard Reports

SpyGlass provides cross-probing capability in the following SpyGlass
standard reports:
• The simple report
• The moresimple report (including The moresimple_rulesort report
and The moresimple_sevclass report)
• The waiver report
To enable cross-probing from these reports, hexadecimal violation
indexes have been included in these reports, which correspond to the
hexadecimal violation indexes generated for individual violation
messages.

NOTE: By default, a unique hexadecimal violation id is generated for each

violation message reported by the SpyGlass analysis run.
In the SpyGlass standard reports listed above, when you cross-probe
(by clicking) a violation message containing a unique hexadecimal
violation id, SpyGlass highlights relevant information in the following
SDE windows:
• The Source Window
• The following sections of The Message Window:
• Messages: Msg Tree Page
• File Page
• Module Page
• The Modular Schematic Window
• The Incremental Schematic Window
NOTE: If you change the settings to disable the hexadecimal violation indexes
(from the Annotate Message ID in Reports setting of the Misc Page of the
Tools > Preferences menu option), then the violation indexes are not
generated and hence cross-probing from the SpyGlass standard reports is also
disabled when the reports are generated again.
Other Reports
In addition to the standard reports, SpyGlass also provides other reports
(custom reports) that are designed for specific customer requirements
but can be used by all SpyGlass users.
You can generate these custom reports in the SpyGlass Design
Environment by specifying the following addition commands while
invoking SpyGlass Design Environment:
... -I <your-inst-dir>SpyGlass-x.y.z/SPYGLASS_HOME/
auxi/custom_reports -report <report-name> ...
Here, <your-inst-dir> is the location where SpyGlass is installed
and <report-name> is the name of the custom report.

SpyGlass-x.y.z indicates the current SpyGlass release, such as

SpyGlass-3.8.2 or SpyGlass-3.8.1.3.
Then, the specified report(s) are listed under Report > Default menu
option of the SpyGlass Design Environment.
You can create these reports in the batch mode by specifying the
following addition commands:
... -I <your-inst-dir>SpyGlass-x.y.z/SPYGLASS_HOME/
auxi/custom_reports -report <report-name> ...
The explanation of the commands is as described above for the
SpyGlass Design Environment.
NOTE: Custom reports are available on AS IS basis. Moreover, these reports
are not listed when the -printreportformats command-line option is
used (which lists only the standard SpyGlass report formats).
The count_sevsort Report

The count_sevsort report is an enhanced version of The count report
and has the rule message count for each rule of each severity label
grouped under their severity class.
For each rule, the severity label name, the rule name, and the rule
message count are reported.
The groupings are reported in decreasing severity class (FATAL,
ERROR, WARNING, and INFO). Under each severity class, the rule
message count is sorted based on the severity label (alphabetically),
and then on Rule name (alphabetically).
The moresimple_csv Report

The moresimple_csv report has the same details as The moresimple
report but in a comma-separated format without the header/footer lines.
You can open the generated moresimple_csv.rpt file in a Spreadsheet
program like Microsoft Excel.

NOTE: You cannot generate or open the moresimple_csv report in the

The score_detail Report

The score_detail report is an enhanced version of The score report and
has the following sections:
1. The first section has the detailed status showing the rule name, the
rule severity label, the rule message count multiplied by the rule
weight, and the rule score. The details are listed sorted by the
severity class (not reported) and alphabetically within the severity
class.
2. The second section has the summary status showing number of rules
flagged under each severity class and the total score for the severity
class.
The report has the grand total score for the design at the end.
Sorting Messages in SpyGlass Reports
Default Message Sorting in SpyGlass Reports

SpyGlass generates the following reports sorted for better usability:
TABLE 3. SpyGlass Sorted Reports

count moresimple simple
summary waiver
SpyGlass sorts the messages in these reports and the Message Tree by
the following criteria (provided the criterion is applicable to the report):
• Severity Class (decreasing from FATAL, Error, Warning, and Info)
• Rule Name (alphabetical)
• Source HDL Filename (alphabetical)

• Line number (ascending)

You can, however, modify the default sorting order of rule messages in
BATCH reports and Message Tree. To display the sorting criteria with
the severity label and rule weight, you can specify the
report_style command line option. The syntax is as follows:
--report_style=sort_sevlabel_wt
When this option is specified, SpyGlass sorts the messages in reports
and Message Tree by the following criteria :
• Severity Label (alphabetical)
• Rule Weight (descending)
• Severity Class (decreasing from FATAL, Error, Warning, Info)
• Rule Name (alphabetical)
• Source HDL filename (alphabetical)
• Line number (ascending)
User-defined Message Sorting in SpyGlass Reports

SpyGlass provides a predefined sorting order of messages in the
SpyGlass reports. By default, the messages are first sorted based on
their severity, followed by their rule name, and for a given rule, by their
file and line.
You can specify your own message sorting order based on message
components using the -sortrule command-line option.
The syntax of the -sortrule command-line option is as follows:
-sortrule <language>+<rule-name>+<sort-order>
NOTE: There are no spaces between any of the values.
Where:
• <language> is the rule language. You can specify the value of
<language> to be Verilog, VHDL, or Mixed. The rule for which
message sorting order is being defined must be registered for the

specified language. If the rule is specified for both languages, you

can optionally specify only one of the languages if you want to
specify the message sorting order for only that language.
• <rule-name> is the rule name
• <sort-order> is the user-defined sort order and is defined in the
following format:
<arg-number><arg-type><arg-sort-order>
Where:
• <arg-number> is the argument number.
To get the argument number, refer the rule message template in
the Policy ruledeck file. For example, the LPFSM16 rule of the
SpyGlass LowPower policy has the following message template:
Attribute '%1' found on enumerated type '%2' used for
encoding FSM states
Thus, the first argument is the attribute name and is specified as
1. The second argument is the state variable name and is
specified as 2.
Refer the corresponding rules reference document for explanation
of the rule message arguments.
• <arg-type> is the argument type.
In the above example, the argument type for both arguments is
string and is specified as s. The other possible argument types are
numerals (specified as n) and enumerated types (specified as e).
• <arg-sort-order> is the argument value sorting order as
ascending (specified as a) or descending (specified as d).
Consider the following example:
-sortrule Verilog+R1+2sa+1nd+3e/val1/val2/val3
The above specification indicates that it defines the message sorting
order of rule named R1 in the Verilog mode. Further, the message
sorting order is as follows:

1. First, sort the messages by 2sa, that is, sort by the value of the
second argument (2) which is a string argument (s) in ascending
order (a).
2. For messages with the same second argument value, sort by 1nd,
that is, sort by the first argument (1) which is a numeral argument
(n) in descending order (d).
3. For messages with the same first argument value, sort by 3e/
val1/val2/val3, that is, sort by the third argument (3) which is
an enumerated type argument (e) based argument values val1, val2,
and val3 in that order.
In addition to the argument-based sorting orders described above, you
can specify message sorting order by file (specified as f) and by line
number (specified as l), both in either ascending order (specified as a)
or descending order (specified as d). Thus, fd means that sort the
messages by file name in descending order. la means that sort by line
number in ascending order.
Consider the -sortrule specification in the above example with
addition values as follows:
-sortrule Verilog+R1+2sa+1nd+3e/val1/val2/val3+fd+la
This specification means that any sorting after the argument-based
sorting will be done first by file names in descending order and then by
line numbers in ascending order.
By default, the argument values are sorted in a case-sensitive manner.
Specify i (for ignore case) to indicate that the argument values are to
be sorted in a case-insensitive manner. Consider the following
example:
-sortrule Verilog+R1+2sai+1nd+3e/val1/val2/val3+fdi+la
The above specification indicates that argument-based sorting indicated
by 2sa and file-based sorting indicated by fd should be performed in
a case-insensitive manner.

SpyGlass Useful Files

SpyGlass generates some files during runtime to log runtime
information such as SpyGlass profile, violation database, runtime
reports, and log files. Some of the files are generated every time
SpyGlass is run. However, some files are generated only when
SpyGlass is run with some special features.
Files Generated during Default Run

During the default run, the following files and directories are created:
• spyglass.log:
This file is the log file of SpyGlass where the SpyGlass run details
are saved. These details include general information about SpyGlass
run such as the SpyGlass version and the arguments passed for a
particular run.
By default, the log file name is spyglass.log and is saved in the
current working directory. However, during runtime the name and
location of log file can be changed. For more information, refer to
the Logfile (-logfile) option in the Setup > Run Options... section.
• spyglass.vdb
This file is the file that stores the violation database. All violations
that are generated during the SpyGlass run are dumped in this file.
By default, the violation database file name is spyglass.vdb and is
saved in the current working directory. However, during runtime the
name and location of the file that stores the violation database can be
changed. For more information, refer to the Setup > Set VDB File
Name... section.
• spyglass_reports
This is a directory that is created in the current working directory of
SpyGlass. Some of the standard SpyGlass report files that are saved
in this directory are simple.rpt, moresimple.rpt, inline.rpt, count.rpt, and

sign-off.rpt.
In addition, SpyGlass also stores policy-specific reports such as
Audit-RTL.rpt and adv_cdc.rpt in the spyglass_reports directory. For
more information on reports, refer to the About the Message Reports
section.
• spyglass.out
This file is the screen-out file of SpyGlass in which runtime
information (output) and rule-checking information is saved.
By default, the screen-out file name is spyglass.out and is saved in
the current working directory along with spyglass.log. However
during runtime, if spyglass.log name or location is changed, the
screen-out file is also changed accordingly.
This file is not generated in batch Console and DesignWare batch
runs.
• spyglass_spysch
This is a directory that stores the internally generated files used for
internal SpyGlass processing or to support GUI features. This
directory is saved in the current working directory of SpyGlass.
Files Generated to Support Special Features

SpyGlass run can be customized to support some special features.
When SpyGlass runs with those special features another set of files/
directories are used to save data related to those features:
• spyglass.db: spyglass.db is the file that is used to save the synthesized
view of the design during the first analysis run. This file is used
when SpyGlass is run using the design save-restore feature. This
feature can be enabled using the -enable_save_restore
command line option. For more information, refer to the Saving and
Restoring Designs section.

• WORK: WORK is the directory in which precompiled libraries are

saved when SpyGlass is run using pre-compiled libraries.
By default, the directory where pre-compiled libraries can be saved is
WORK, which is saved in the current working directory. However, name
and location of this directory can be changed. This needs to be done
separately when using VHDL and Verilog pre-compiled libraries. For
more information, refer to the Working with User-Compiled VHDL
Libraries and Working with Pre-compiled Verilog Libraries sections.
• spyglass_cmdline_debug.log: The spyglass_cmdline_debug.log is a
command line trace log that enables you to understand how
SpyGlass arrives at the final set of command line options using the
initial option set provided by you. This feature can be enabled using
the -enable_cmdline_debug command line option.
You can also trace GUI operations in the SpyGlass Design
Environment. Some of the GUI operations that can be traced are
policy/rule selection/unselection, rule parameter changes, template
selection or expansion of option files etc.
In addition to GUI trace, the file also logs batch mode command-line
processing details. The file logs tracing of internal processing of
command line options, expansion of command files and templates,
internal aliasing of certain command line options, default options set
by SpyGlass, config keys settings and wildcard expansions of -f
files, design files, -I paths, SGDC file, and waivers.
This file when used with spyglass.log helps to understand the
processing of command-line options done by SpyGlass.
The file details are as follows:
• A new file is created for each new run of SpyGlass. But when
SpyGlass is run incrementally from the same SpyGlass
invocation, then the tracing data of subsequent runs is appended
to the already existing file.
• The trace done in SDE and batch mode is logged in different
sections of the file, marked by START and END blocks.

• The file is created in the current working directory.

Using the SpyGlass
Design Environment
Overview
This chapter describes the Atrenta® SpyGlass® Design Environment’s
basic working procedures.
Setting the Current Working Directory

The directory from which you invoke the SpyGlass Design
Environment is the current working directory. When you add source
file or library files, the SpyGlass Design Environment maintains a
relative relationship between these files and the current working
directory. You can change your current working directory while within
the SpyGlass Design Environment using the Setup > Set Working
Directory... menu option.
When you change your working directory, the relative relationship
between the current working directory and the source and library files
will reflect this change.
The setup information in the SpyGlass Design Environment, such as the

Setting the Operating Language
current working directory, VHDL library mapping information, and so

on, is called a profile. When you save the current profile; regardless of
which directory you save it to; you must reopen it from the current
working directory that was set when it was saved. If you attempt to read
a profile while your current working directory is set to a directory other
than the current working directory that was set when the profile was
originally created, the profile will not be able to locate the source or
library files.
It is strongly recommended that you save Profiles and Violation
Databases files in your current working directory.
Setting the Operating Language

The SpyGlass Design Environment requires you to specify the
operating language on invocation. You can specify it directly by
providing one of the language specification command-line options
(-verilog, -vhdl, -mixed, or -def) or indirectly through a
Violation Database file, a Profile file, or a Template file.
Within the SpyGlass Design Environment, you can set the operating
language from the Language Tab of the Setup > Run Options... menu
option.
Working with Source Design Files

When you invoke the SpyGlass Design Environment with a Violation
Database file or a Profile, the source design files described in the
Violation Database file or the Profile file are automatically loaded.
The first source design file found is also automatically displayed in the
Source window. You can view other source design files by clicking
their names in the File view page. You can view the RTL description
with line numbers using the Edit > Display Line Numbers menu
options.

Using the SpyGlass Design Environment
You can add or remove source design files in the current profile by
using the Setup > Source... menu option. You can also rearrange the
design files by dragging and dropping as described in Rearranging
Files.
You can edit a source design file using the Edit > Edit Current Display
File menu option.
You can print the currently displayed source design file File > Print
RTL menu option.
Working with Library Files

When you invoke the SpyGlass Design Environment with a Violation
Database file or a Profile, the library files described in the Violation
Database file or the Profile file are automatically loaded.
You can add or remove library files using the Setup > Library... menu
option.
Working with Profiles

The SpyGlass Design Environment allows you to save the current setup
information (called a profile) and use it later. To save the current
profile, use the File > Save Profile menu option. Profiles files are saved
with .spp suffix.
NOTE: All current setup information including the VHDL library mapping
information is saved in a Profile file.
You can load any Profile using the File > Read Profile menu option.
Once a Profile has been loaded, you can modify its settings as required
and run SpyGlass Analysis with the new settings. Then, you can also
save the modified Profile with same or different name/location using
the File > Save Profile menu option.

Working with Templates
Working with Templates

The SpyGlass Design Environment allows you to save the current
policy selection information (called a template) and use it later.
When you invoke the SpyGlass Design Environment with a Template,
it opens with the template configuration settings loaded.
You can also open any Template using the File > Open Template menu
option. In addition, you can load multiple templates together.
Once a Template has been loaded, you can modify its settings as
required and run SpyGlass Analysis with the new settings. Then, you
can save the modified Template with same or different name/location
using the File > Save Template menu option.
You can also save the current Profile as a Template as follows:
1. Set the Prompt to select Profile saving style preference in the Misc Page
of the Tools > Preferences menu option.
2. Modify the current Profile as required.
3. Choose the File > Save Profile menu option and click Save Without
Files in the dialog that appears.
4. In the Save As dialog that follows, provide the name/location of the
Template to be saved. Template files are saved with .spq or .spc
suffix.
NOTE: All current setup information except the VHDL library mapping
information is saved in a template file.
Customizing a Template File

Based on your requirement, you can customize a template file in any of
the following ways:
• By adding and/or removing rule(s) from a template
• By updating parameter value for rules

Using the SpyGlass Design Environment
• By using the -overloadrules option to change the attributes, such as

rule severity, for various rules.
• By defining your own rule severity by using the -define_severity
option.
• By deriving existing GuideWare templates in your template file by
using the -include_goal/-inherit_goal options.
For details, see Deriving Existing GuideWare Goals in a Template
File topic.
Working with Messages

Besides the message information displayed in The Message Window,
the SpyGlass Design Environment also displays message information
in other parts.
Messages in the Source Window

Messages found in a source design file, a library file, or a SpyGlass
Design Constraints file are highlighted in the Source window when you
double-click the message in The Message Window.
You can set the highlighting colors for different message severity types
using the Message Page of Tools > Preferences menu option.
Messages in Schematic Windows

You can highlight a message in the schematic windows by double-
clicking the message in The Message Window.
Messages in File/Design/Constraints/Instances Window

In the File/Design/Constraints/Instances window, the number of
messages found in source files, library files, design units, or constraints
files are indicated against their names.

Working with Messages
Messages in Title Bar

The total number of messages found in the design are displayed in the
title bar.

The SpyGlass Design
Environment Menus and
Toolbar
Overview
This chapter describes the features and uses of the SpyGlass Design
Environment menu bar, toolbar, and status bar.
The Menu Bar

The SpyGlass Design Environment menu bar gives you access to the
SpyGlass Design Environment functions that have been categorized
into the following menus:
• File Menu
• Edit Menu
• Setup Menu
• Run Menu
• Tools Menu
• Report Menu

The Menu Bar
• Help Menu
File Menu
When you click the File menu, the following options appear:
File > Read Source Filelist

This menu option reads the specified sources file (.spp files created by
using the File > Save Sources menu option) and loads the files
specified in the sources file.
File > Read Profile

This menu option is used to read an existing profile (.spp) file.
NOTE: When you change profiles, the file view, rules and policies, and settings

The SpyGlass Design Environment Menus and Toolbar
get updated to the new profile. The Design View page and Message Window
information gets removed until SpyGlass is run again.
When you select this menu option, the Open dialog appears. You can
navigate through your directory structure to locate the .spp file that
contains the information that you want to analyze. Open the .spp file by
either double-clicking the file, or clicking the file and then clicking
Open.
When you open an existing profile, all the option settings will
propagate to their proper positions in the SpyGlass Design
Environment.
When you select this menu item, the SpyGlass Design Environment
will check to see if you have made any changes to the existing profile
settings. If changes have been made, the SpyGlass Design Environment
prompts you to save those changes. To save the changes, you must
select the .spp file name. If the .spp file with the current name already
exists or you have not chosen a name for the .spp file, SpyGlass Design
Environment prompts you to rename your .spp file.
The Modular Schematic window, Incremental Schematic window, and the
Waveform Viewer window, if open, gets cleared (and the buttons are
disabled) when you load a new profile.
You can trace the GUI operation for opening a profile. The GUI
operation trace details are logged in the spyglass_cmdline_debug.log file.
For details refer to section Files Generated to Support Special
Features.
File > Open Template

This menu option is used to open a template file (a .spq file or a .spc
file).
navigate through your directory structure to locate the required
template file. Open the file by either double-clicking the file or clicking

The Menu Bar
the file and then clicking Open.

NOTE: You can also open a template file by using the <Shift>+<T> key
combination on your keyboard.
You can trace template open/close GUI operations. The GUI trace
details are logged in the spyglass_cmdline_debug.log file. For details
refer to section Files Generated to Support Special Features.
File > Open VDB File

This menu option is used to open an existing violation database file
(.vdb file).
navigate through your directory structure to locate the violation
database file that contains the information that you want to analyze.
Open the file by either double-clicking the file or clicking the file and
then clicking Open.
The Modular Schematic window, if open, gets cleared when you load a
new violation database file.
NOTE: If you already have an existing Violation Database file open when the
Open VDB File menu option is used, any changes made to the existing
violation database will be lost (unless saved as a profile or the SpyGlass
analysis is successfully run).
NOTE: You can also open an existing Violation Database file by using the
<Ctrl> + <O> key combination on your keyboard.
You can trace opening of a violation database file GUI operation. The
trace details are logged in the spyglass_cmdline_debug.log file. For
details refer to section Files Generated to Support Special Features.
File > Save Sources

This menu option save the details of currently specified source files

(Verilog/VHDL design files, SpyGlass Design Constraints files, and

Verilog library (-v/-y files)) in a Sources file (.spp file).
File > Save Profile

This menu option is used to save all current option settings (that is,
source files, libraries, policy selection and rule selections) to a
user-defined profile file (.spp file) or a template file (.spq file).
NOTE: An important difference between saving a profile file and naming a
violation database file is that the profile file gets created immediately, saving all
the setup information.
NOTE: All the current setup information including the VHDL library mapping
information is saved in a profile file.
You can save the current profile with source file details (as a profile
file) or without the source file details (as a template file).
When you select this menu option with the Prompt to select Profile saving
style preference set (from the Misc Page of the Tools > Preferences
menu option), the Save As dialog appears, as shown in the following
figure:
In the above dialog, click the Yes button to save the current profile as a
profile file, that is, with design file details.
Click the Save Without Files button to save the current profile as a
template, that is, without design file details.
You can select the Set Don’t show this dialog again option to clear the
Prompt to select Profile saving style preference for the current and
subsequent SpyGlass runs. That is, the profile files will always be

The Menu Bar
saved with the design file details.

Click the Cancel button to abort the save profile operation.
After clicking Yes or Save Without Files, the Save As dialog appears, as
shown in the following figure:
In the above dialog, navigate through the required directory structure to

locate the desired location for the Profile file or Template file. Enter the
file name and click Save.
When you select this menu option with the Prompt to select Profile saving
style preference not set (from the Misc Page of the Tools > Preferences
menu option), the Save As window appears. You can navigate through
your directory structure to locate the desired location for the Profile
file. Enter the file name and click Save.
This menu option saves all the settings in a format that can be passed
directly to SpyGlass using the -f command-line option (for example,
for future SpyGlass analysis jobs).
It is strongly recommended that you save Profile files in your current
working directory.
You can also open the Save Profile file window by pressing the <S>
key on the keyboard.

File > Save Template

This menu option is used to save the currently open template to a
user-defined template file (.spq file or .spc file).
When you select this menu option, the Save As dialog appears. In this
dialog, you can navigate through the required directory structure to
specify the desired location for the template file. Enter the file name
with the .spq or .spc suffix in this dialog, and click the Save button.
All current setup information except the VHDL library mapping
information is saved in a template file.
A template file has the same format as a session file normally specified
with the -f command-line option.
File > Print RTL

This option prints the currently displayed RTL source file.
When you select this menu option with a valid RTL file displayed, the
Print Command dialog appears. In this dialog, set the print command,
and click the Print button. This prints the displayed RTL source file.
File > Exit

This menu option is used to exit the SpyGlass Design Environment.
If you have made changes to your profile file that you wish to keep, you
must save these changes before you exit.
As in File > Save Profile, when you select this menu item, the
SpyGlass Design Environment checks if you have made any changes to
the profile settings. If changes have been made, the SpyGlass Design
Environment prompts you to save those changes. You can then save the
changed profile or abandon changes.
If you have set the Prompt before Exit from SpyGlass preference (from the
Misc Page of the Tools > Preferences menu option), the following

The Menu Bar
dialog appears when you choose the File > Exit menu option:
In the above dialog, click the Yes button to exit SpyGlass Design
Environment, or click the No button to cancel and continue working in
the SpyGlass Design Environment.
You can select the Don’t show this dialog again option to clear the Prompt
before exit from SpyGlass Design Environment preference for the current
and subsequent SpyGlass runs. That is, the SpyGlass Design
Environment will exit without confirmation when you choose the File >
Exit menu option.
If you have not set the Prompt before Exit from SpyGlass preference (from
the Misc Page of the Tools > Preferences... menu option), the SpyGlass
Design Environment exits without confirmation.
You can also use the <Ctrl> + <Q> key combination on the keyboard to
open the Exit confirmation dialog.

Edit Menu
When you click the Edit menu, the following options appear:
Edit > Clear All Selection

This menu option allows you to clear all current selections in the
You can also clear all items by pressing the <Shift>+<C> key
Edit > Display Line Numbers

This menu option is used to toggle on/off line numbering.
When you select this menu option, line numbering is toggled on or off
in the Source window.
You can also toggle line numbers by pressing the <L> key on the
keyboard.
Edit > Edit Current Display File

This menu option is used to edit your source files (both Verilog/VHDL
files and SpyGlass Design Constraints files).

The Menu Bar
When you select this menu option, the SpyGlass Design Environment
will launch your text editing program of choice, as defined by the
Specify Editor program setting in the Misc Page of the Tools >
Preferences menu option. If you have not specified a text editor in this
setting, the text editor pointed to by the EDITOR environment variable
is invoked. Otherwise, SpyGlass attempts to invoke the commonly-
used text editor of your operating platform.
The file currently being viewed in the Source window will open for
editing.
NOTE: If you have set gedit, kedit, or kwrite as the editor of your choice (as
defined by the Specify Editor program setting in the Misc Page of the Tools >
Preferences menu option), the cursor in the editor program will not be set to the
line highlighted in the Source window. Note that this behavior is specific to
editors, such as gedit, kedit, and kwrite. However, if VI or GVIM is set as editor,
the cursor in the editor is automatically set to the line highlighted in the Source
window of SpyGlass.
You can also launch your editor to modify the current file by pressing
the <E> key on the keyboard.
Edit > Find

This menu option is used to search for source files, files in the Session
Log page, File Tree, Design Tree, Constraints Tree, and Message Tree.
When you select this option, the Find dialog appears, as shown in the
following figure:

In the above dialog, enter the text that you want to search in the Find
Text textbox. Next, select any of the following options from the Find In
pull-down list and click the Search button.
You can select any of the following options in the Find In drop-down
list:
Option Description
Source This option is used to search your current source file (HDL
file or SpyGlass Constraints file) for a given string or
regular expression
Session Log This option is used to search the Session Log page in the
Message window for a given string or regular expression
File Tree This option is used to search the File view page for a
given filename
Design Tree This option is used to search the Design view page for a
given module name
Constraints Tree This option is used to search the Constraints view page
for a given file name
You can refine your search by choosing the following options:

• Case Insensitive: Selecting this option will search for each
occurrence of the Find Text string irrespective of the casing.
For example, if you entered Statement in Find Text field, and had the
Case Sensitive option checked, your search will locate each instance
of the text statement in your source file.
• Search Backwards: Selecting this option will cause your search to
seek your Find Text string from the current point toward the top of
your source file.
You can also open the Find Text in Source window by pressing the
<Ctrl>+<F> key combination on the keyboard.

The Menu Bar
Edit > Goto Next Message

This menu option is used to go to the next message in the design. The
source code line with the next message is also highlighted.
If there are no further messages in the current source file in the Source
window after the current message, this menu option opens the next
source file in the File View list (See The File/Design/Constraints/
Instances Window) and highlight the first message in that source file.
You can also go to the next message in the source code by pressing the
<N> key on the keyboard. Additionally, you can view the relevant
message description, which is highlighted in the Msg Tree page of the
Message window, although you may need to expand the message tree
to view the highlighted message.
NOTE: You can also view all the messages associated with the highlighted
source code line in the Line page of the Message window.
Edit > Goto Previous Message

This menu option is used to go to the previous message in the design.
The source code line with the previous message is also highlighted.
If there are no further messages in the current source file in the Source
window after the current message, this menu option will open the
previous source file in the File view list (See The File/Design/
Constraints/Instances Window) and highlight the last message in that
source file.
You can also go to the previous message in the source code by pressing
the <P> key on the keyboard. Additionally, you can view the relevant
message description, which is highlighted in the Msg Tree page of the
Message window, although you may need to expand the message tree
to view the highlighted message.

Edit > Goto Next RTL line

This menu option is used to highlight the next source code line with
message(s) after the source code line at the cursor location.
Then, you can view the message(s) associated with the highlighted
source code line in the Line Page of The Message Window.
If there are no further source code lines with message(s) in the current
source file in the Source window after the current cursor location, this
menu option will open the next source file in the File view list (See The
File/Design/Constraints/Instances Window) and highlight the first
source line with message(s).
You can also advance to the next source code line with message(s) in
the source code by pressing the <M> key on the keyboard.
Setup Menu
When you click the Setup menu, the following options appear:

The Menu Bar
Setup > Run Options...

This menu option is used to set additional important options for the
SpyGlass analysis that are not associated with policies and rules.
When you select this menu option, one of the language-specific options
windows will appear (depending on which HDL you chose).
The additional options that need to be set are categorized into menu
tabs as follows:
• Verilog Tab
• VHDL Tab
• Synthesis Tab
• Other Tab
• Language Tab
• Report Tab
Verilog Tab
If you start the SpyGlass Design Environment with the -verilog
option, selecting the Setup > Run Options menu option will open the
Options window to this tab.

FIGURE 11. Options > Verilog Tab
Relevant SpyGlass run options of this tab include: macro definitions,

parameter definitions, top-level modules, black-box modules, run
modes, and black-box error recognition.
• Macro definitions (+define)
If you want to enter any macros into your Verilog analysis run, enter
them into this field in the form of space-separated name=value pairs.
For example:
fee=1 fi=2 fo=3 fum=4
Setting this field is equivalent to using the +define+ command-
line option. See your Verilog reference for more details of the
+define+ command-line option.
A value for a macro need not be specified.
• Verilog Parameters (-param)
If you want to enter any parameters into your Verilog analysis run,
enter them into this field in the form of space-separated name=value
pairs. For example:

The Menu Bar
param1=1 size=2 param3=3 param4=4

Setting this field is equivalent to using the -param command-line
option.
• Treat these modules as top-level (-top)
If you want to enter any modules that should be set as top-level
modules in your Verilog analysis run, enter them into this field.
Multiple space-separated module names can be entered in the field.
Setting this field is equivalent to using the -top command-line
option.
• Working Directory (logical name) (-work)
If you are using Pre-compiled Verilog libraries, specify the logical
name of these libraries here.
In the Working Directory (logical name) field, you should enter the
directory that SpyGlass will use as a working directory as it runs its
analysis. Enter the full path for the working directory. For Example:
/HOME/SPYGLASS/working
By default, the working directory is set to WORK directory in the
current working directory.
Setting this field is equivalent to using the -work command-line
option.
• Disable Verilog 2000/2001 processing (-disablev2k)
This check box is used to turn on and off Verilog 2001 compatibility
mode. By default, this preference is switched off.
Setting this field is equivalent to using the -disablev2k
See Using Verilog 2001 Constructs for more details.
• Enable SystemVerilog processing (-enableSV)
This check box is used to turn on and off SystemVerilog
compatibility mode. By default, this preference is switched off.

Setting this field is equivalent to using the -enableSV command-line

option.
See Using SystemVerilog Constructs for more details.
• Clear Working Directory (-remove_work)
This check box is used to remove the contents (precompiled design
units) of the WORK directory and recompile all design units again
even when some design units were not required to be recompiled.
Setting this field is equivalent to using the -remove_work command-
line option.
VHDL Tab
If you opened the SpyGlass Design Environment with the -vhdl
option, selecting the Setup > Run Options menu option will open the
Options window to this tab.
FIGURE 12. Options > VHDL Tab
Relevant SpyGlass run options of this tab include: top-level entities,

working directory, automatically sorting VHDL files, VHDL87
compatibility, and clearing the working directory.

The Menu Bar
• VHDL Generics (-param)

If you want to enter any generics into your VHDL analysis run, enter
them into this field in the form of space-separated name=value pairs.
For example:
fee=1 fi=2 fo=3 fum=4
Setting this field is equivalent to using the -param command-line
option.
• Treat these entities as top-level (-top)
If you want to enter any entities that should be set as top-level
entities in your VHDL analysis run, enter them into this field.
Multiple space-separated entity names can be entered in the field.
Setting this field is equivalent to using the -top command-line
option.
• Working Directory (logical name) (-work)
In the Working Directory field, you should enter the directory that
SpyGlass will use as a working directory as it runs its analysis. Enter
the full path for the working directory. For Example:
/HOME/SPYGLASS/working
By default, the working directory is set to WORK directory in the
current directory.
Setting this field is equivalent to using the -work command-line
option.
• Automatically sort VHDL files (-sort)
This selector is used to set the VHDL file sorting method. By
default, this preference is set to None and there is no file sorting. You
can set this field to DU based sort or Lexical as required.
Setting this field is equivalent to using the -sort command-line
option.
• Run in VHDL87 compatibility mode (-87)

This check box is used to turn on and off VHDL87 compatibility

mode. By default, this preference is switched off.
Setting this field is equivalent to using the -87 command-line option.
• Clear Working Directory
This check box is used to remove the contents (precompiled design
units) of the WORK directory and recompile all design units again
even when some design units were not required to be recompiled.
Setting this field is equivalent to using the -remove_work command-
line option.
Synthesis Tab
Selecting the Synthesis tab will bring up the following window:
FIGURE 13. Options > Synthesis Tab
Relevant SpyGlass run options of this tab include: pragma

interpretation and compiling memory thresholds.
• Interpret these pragmas (-pragma)
If you want to enter any pragmas that should be set in your VHDL

The Menu Bar
analysis run, enter them into this field. Multiple space-separated

pragmas can be entered in the field.
Setting this field is equivalent to using the -pragma command-line
option.
• Upper threshold for compiling memories (-mthresh)
If you wish to set an upper threshold for compiling memories, enter
it in this field. If you enter a value, it must be a positive integer.
Setting this field is equivalent to using the -mthresh command-line
option.
Other Tab
Selecting the Other tab will bring up the following window:
FIGURE 14. Options > Other Tab
Relevant SpyGlass run options of this tab include: stop options,

maximum messages per rule, maximum messages by rule name,

Synopsys Gates Library, and any other options that you wish to pass to
SpyGlass.
• Black-box these modules (-stop)
If you want to enter any design units that should be set as black-box
entities in your analysis run, enter them into this field. Multiple
space-separated design unit names can be entered in the field.
Setting this field is equivalent to using the -stop command-line
option.
• Maximum violations per rule (default) (-lvpr)
If you wish to set an upper limit for messages per rule, enter it in this
field. If you enter a value, it must be a positive integer.
Setting this field is equivalent to using the -lvpr command-line
option.
• Maximum violations by rule name (-lvpr)
If you wish to set an upper limit for messages for particular rules,
enter them in this field in the form of space-separated name=value
pairs. For example:
W479=50
In this example, a limit of 50 messages has been set for rule W479 -
loop statement is incorrect.
Setting this field is equivalent to using the -lvpr command-line
option.
• Synopsys Gates Library (-gateslib)
Enter the full path name of the Synopsys Gates Library in this field.
Setting this field is equivalent to using the -gateslib command-line
option.
• SpyGlass Library file(s) (-sglib)
Enter the full path name of the pre-compiled SpyGlass Libraries

The Menu Bar
(from Synopsys Gates Library) in this field.

You can add multiple .lib or .sglib files by clicking ( ) next to the
text. This displays the Select Files window, as shown in the following
figure:
Select a file(s) from the Selected Directory section and click Add to
add the file(s).
Setting this field is equivalent to using the -sglib command-line
option.
• SpyGlass Output File Directory (-wdir)
Enter the full path name of the directory where SpyGlass output files
should be created.
Setting this field is equivalent to using the -wdir command-line
option.
• LEF Library File(s) (-lef)
Enter the name of the LEF file to specify the LEF files.
Setting this field is equivalent to using the -lef command-line option.

• Other command line options

In this field, you can add any other SpyGlass command-line options
that have not been previously added to your SpyGlass analysis run.
Add additional command-line options in this line as you would add
them to the command-line.
NOTE: The SpyGlass Design Environment does not interpret the
command-line options specified in the Other command line options field and
simply passes these options directly to the batch run. Moreover, any
command-line option specified here, for which an equivalent menu option/
dialog is available in the SpyGlass Design Environment, is not updated and
reflected within the SpyGlass Design Environment, although the intended
function of such command-line options is still performed during the
SpyGlass analysis run. Therefore, it is recommended that the Other
command line options field should not be used to specify those options for
which an equivalent menu option/dialog is available in the SpyGlass Design
Environment. For example, you must not specify the policy rule parameters
here as they must be set from the Setup > Run Options... menu option only.
• Other command line files
In this field, you can add any other files that have not been
previously added to your SpyGlass analysis run. Add additional files
in this line with all appropriate command-line options as you would
add them to the command line.
• List of stop file(s)(-stopfile) & stop dir(s)(-stopdir)
Using this option, you can specify any files/directories that should
be skipped for rule-checking in your analysis run. Skipping a file
using this option is equivalent to using the -stopfile
command-line option and skipping a directory is equivalent to using
the -stopdir command-line option.
When you click the ( ) icon in this option, the Stop File(s)/Dir(s)
dialog appears, as shown below:

The Menu Bar
See the Setting Stop Files/Directories section for details about

setting the stop files/directories.
After you apply the settings for stop files/directories as specified in
this option, the File view page in The File/Design/Constraints/
Instances Window is also updated and relevant icons for Stop Files
( )) and/or Stop Dirs ( ) are prefixed with the corresponding files
displayed in the File view page.
• Old VDB path (-old_vdbfile)
Using this option, you can specify the path for a previous Violation
Database file that will be considered as the reference file while
running SpyGlass in Incremental Mode.
See the Incremental Mode Button section for details about the

Incremental Mode option.

• Cache Directory (-cachedir)
Using this field, specify a cache directory where you want library
compilation to be performed.
If you leave this field blank, then the <cwd>/spyglass_cache is taken
as the default cache directory.
Setting this field is equivalent to using the -cachedir command-
line option.
• Logfile (-logfile)
This field sets the name and location of the SpyGlass log file.
By default, the log file name is spyglass.log and it is created in the
Setting this field is equivalent to using the -logfile command-line
option.
• Error on black-boxes (-nobb)
This check box is used to turn on and off errors on black-boxes. If
the SpyGlass run comes across a black-box, an error will be
generated. By default, this preference is switched off.
Setting this field is equivalent to using the -nobb command-line
option.
• Enable HDL Encryption (-enable_hdl_encryption)
This check box is used to enable encryption of VHDL/Verilog
libraries during compilation. By default, this preference is switched
off.
Setting this field is equivalent to using the -enable_hdl_encryption
• Disable Encrypted HDL Checks (-disable_encrypted_hdl_checks)
This check box is used to disable RTL rule-checking on the
encrypted design units. By default, this preference is switched off.

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Setting this field is equivalent to using the -

disable_encrypted_hdl_checks command-line option.
• Enable SDC to SGDC Translation
This check box is used to translate the SDC commands and generate
the corresponding SpyGlass Design Constraints commands, which
are then used by SpyGlass in the same run. By default, this
preference is switched off.
Setting this field is equivalent to using the -sdc2sgdc command-line
option.
• Check IP (-checkip)
This field specifies the design units on which the rule-checking
should be done.
Setting this field is equivalent to using the -checkip command-line
option.
• Check DU (-checkdu)
This field specifies the design hierarchy (level) for which synthesis
and rule-checking should be done.
Setting this field is equivalent to using the -checkdu command-line
option.\
• Hierarchical SGDC Modes
Using this option you can import and validate block-level SGDC
commands with respect to the chip-level. The following options are
available:
None (default): Block-level SGDC commands are not imported
Generation Mode: Enables the hierarchical migration of block-level
SGDC files to chip-level. Selecting this option is equivalent to using
the -gen_hiersgdc command-line option. See Creating Hierarchical
SGDC File section for more details.
Validation Mode: Enables the validation of hierarchically migrated
block-level SGDC commands to the chip-level. Selecting this option

is equivalent to using the -validate_hiersgdc command-line option.

See Validating Hierarchical SGDC File section for more details.
Language Tab
Selecting the Language tab will bring up the following window:
FIGURE 15. Options > Language Tab
Relevant SpyGlass run options of this tab include: Verilog, VHDL, Mixed,
and Def. When this tab is selected, the current language setting options
will be turned on.
• Verilog
Click this option if you wish to change the language selection from
VHDL, Mixed, or Def to Verilog.
• VHDL
Verilog, Mixed, or Def to VHDL.
• Mixed

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Verilog, VHDL, or Def to Mixed.

• Def
Verilog, VHDL, or Mixed to Def.
Changing the language will clear all the SpyGlass Design Environment
windows.
Report Tab
Selecting the Report tab will bring up the following window:
FIGURE 16. Options > Report Tab
Here, you can set up Reports-related options.

• Max Count Size (-report_max_size)
This field specifies the maximum number of messages for sorted
reports (simple, moresimple, and waiver reports).
By default, the sorted report files may contain an unlimited number
of messages. SpyGlass reads the messages from the Violation

Database file and creates a sorted report.

You can set the maximum number of messages sorted in a sorted
report to any number here. However, if the number of the messages
exceeds 1,00,000, then SpyGlass displays the following message
during report generation:
Generating moresimple report from './spyglass.vdb' to './
spyglass_reports/moresimple.rpt'
Reading VDB for Report <reportname> (read X of total
<total> messages)
Processing messages & Writing Report <reportname> ...
done
Setting this field is equivalent to using the -report_max_size
• Report Name (-report)
This field sets the reports to be generated as part of the analysis.
You can enter the names of the reports to be generated in a comma-
separated list.
The generated reports are saved as <report-name>.rpt files or
the file specified by the Report file (one file only) (-reportfile) setting.
Setting this field is equivalent to using the -report command-line
option.
• Report file (one file only) (-reportfile)
This field sets the name of the report file.
Then, all reports specified in the Report Name (-report) setting are
saved to this file.
Setting this field is equivalent to using the -reportfile command-line
option.
• Display report per policy (-report_per_policy)
This field sets whether the reports are generated for all policies
together or for each policy separately.

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By default, all reports specified in the Report Name (-report) setting

are generated for all policies together.
Setting this field is equivalent to using the -report_per_policy
Setup > Source...

This menu option is used to add source files (Verilog/VHDL/Def files
or SpyGlass Design Constraints files) to your setup. You can also
remove source files from your setup using this menu option.
NOTE: If you have already specified the file(s) to be analyzed in the SpyGlass
command-line, these files appear in the Selected Files list by default.
When you click this menu option, the source file selection dialog
opens:
FIGURE 17. Source File Selection Dialog
To work with Verilog/VHDL/Def files, select Design Files. To work

with SpyGlass Design Constraints files, select Constraints Files.

If you double-click a directory in the left list, all the files (of the
selected type) in that directory are displayed, allowing you to select
specific files. Add these files to the Selected Files (files to be analyzed)
list by selecting them and clicking Add. You can remove files from the
Selected Files list by selecting them and clicking Remove.
Use the Create button to create source files. When you click the Create
button, the Save As dialog appears where you can set the name, type
(Verilog, VHDL, or SpyGlass Design Constraints), and location of the
source file to be created. Once you click Save button of the Save As
dialog, the default text editor (as defined by the Specify Editor program
setting in the Misc Page of the Tools > Preferences menu option)
appears with the specified file opened. Add the required source code
and save the new file and exit the text editor. Now, refresh the file list
in the source file selection dialog and add the new file as required.
You can add files from multiple directories at one time.
If you add files with an existing Violation Database file open, the
message pages will not include messages in the newly added files until
SpyGlass has been rerun.
You can also open the source file selection dialog by using the
<Ctrl>+<U> key combination on your keyboard.
Convert Found Files (Verilog Only)

To save analysis search time and to control the order of analysis, the
SpyGlass Design Environment gives you the facility of converting the
Verilog files that are specified using the Library Files/Dirs(-v/-y) and
Library file extension(+libext) fields in the Verilog Specific Options tab of
the Setup > Library... menu option to source files.
When you click this button, the Conversion between Found Files And
Design Files dialog appears displaying all Verilog files found in the
directories specified using the Library Files/Dirs(-v/-y) field in the Verilog

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Specific Options tab of the Setup > Library... menu option that have the
file extension specified using the Library file extension(+libext) field in the
Verilog Specific Options tab of the Setup > Library... menu option:
Move the required files from the Found Files list to the Design Files list
as required and then click OK.
Setup > Library...

This menu option is used to add new Verilog/VHDL reference libraries
to your setup.
When you click this menu option, the Verilog/VHDL Library window
appears. This window has the following tabs:
• Library Mapping tab
• Precompile File Mapping tab
• Precompile Filelist Mapping tab
• Verilog Specific Options tab
Library Mapping tab

Under this tab, you can add a pre-compiled Verilog or VHDL library.

FIGURE 18. Verilog/VHDL Library Window - Library Mapping Page
To add a library, click the Add button. The following dialog appears:
To add a library, you must provide both the logical name and the
physical library name. The logical library name is the name of the
library as you used it when creating a pre-compiled Verilog library or in
your VHDL description. The physical library name is the full pathname
of the library file.
You can add a physical directory to store the physical libraries. To add a
physical directory, click the ( ) button. The Directory Selection dialog
appears, as shown in the following figure:

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In the above dialog, click the Create Directory button to open the Create
Directory window in which you can specify the name of your directory.
After creating the directory click the OK.button. This adds the created
directory in the Directory Selection window.
To remove a library file from the Library File list, click the Filename in
Library File list and then click Delete.
If you delete a library that is being used in the Precompile Mapping
page, the following dialog appears:
Clicking the Ok button will also delete the corresponding entries for
that logical library from the Precompiled Mapping page.
To modify the information of a library file from the Library File list,
click the Filename in Library File list and then click Edit or double-click
the Filename in the Library File list. The Modify a Library window

appears. Modify the information as required and click OK.

You can also open the Library window by pressing the <Shift>+<L> key
combination on the keyboard.
Precompile File Mapping tab

Under this tab, you can specify the -libhdlfiles information, and
a construct series of commands with their order preserved. You can
specify the Logical library and the RTL files on this page. The specified
precompiled libraries appear under the Precompiled Files node in the
File View Page.
To add a precompile library click ( ) and select a logical library name

from the drop-down list that displays the logical library names that
have been already defined in the Library Mapping page.
NOTE: You can only select the library name from the list of available library
names. Therefore, it is recommended to define the library mapping and then
precompile file mapping.
Click ( ) and browse to select the RTL file from the preferred location.
NOTE: You can also add multiple file names. In addition, you can also specify
wildcards and regular expressions that are automatically expanded when the

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selection is changed.
When you have made the changes, click OK. If the Precompile libraries
contain errors, then the following dialog appears:
Click the Cancel button to go to the Precompile Mapping page to

correct the error.
To delete a precompile library click ( ).
Use the ( ) and ( ) buttons to move the selected entries up and
down the list.
When you change an entry in the Precompile Mapping page, SpyGlass
performs the following sanity checks:
• Filename Existence Check
If no RTL file has been specified for a particular precompile
mapping, then the corresponding library is displayed in red color
and the following message appears in the form of a balloon tool-tip:
No filename specified
• Empty File Check
SpyGlass checks the size of the RTL file being used. If the file size

of all the specified RTL files is 0, then the corresponding library is

displayed in red color and the following message appears in the form
of a balloon tool-tip.
All files are of Zero size
• Read permission check
SpyGlass checks the permissions set on the RTL file. If a RTL file
being used is read-only, then the corresponding library is displayed
in red color and the following message appears in the form of a
balloon tool-tip.
Following files are not readable :
- <file-name>
where <file-name> is the name of the RTL file(s).
• Logical Library to physical path mapping check
If you delete/modify a library that is being used in the Precompile
Mapping page from the Library Mapping page, then SpyGlass
prompts you with the following dialog box:
Clicking the Ok button also deletes the corresponding entries for the
logical library from the Precompiled Mapping page.
Precompile Filelist Mapping tab

Under this tab, you can specify the -libhdlf information, and a
construct series of commands with their order preserved. You can
specify the Logical library and source file lists on this page.
To add a logical library, click ( ) and select a logical library name
from the drop-down list that displays the logical library names that

The Menu Bar
have been already defined in the Library Mapping page. Then, click
( ) and browse to select the source file list from the preferred location.
After specifying the required information, click the OK button.
When you change an entry in the Precompile Filelist Mapping page,
SpyGlass performs similar sanity checks as done in Precompile Mapping
page.
Verilog Specific Options tab

Under this tab, you can specify the Verilog library file names in the
conventional way (the -v/-y method).
FIGURE 19. Verilog/VHDL Library Window - Verilog Specific Options Page
Using this page, you can add library files, library directories, include
directories, and library file extensions.
• Library Files/Dirs(-v/-y)
Use this field to specify space-separated pathnames of the library
files and/or directories that you need. Alternatively, click Browse -v
to select the required library files and/or Browse -y to select the
required directories.
The library files added using this window are passed to the analysis

run using the -v command-line option. For example, if you entered

the /SPYGLASS/simlib.v library file, the equivalent command line
addition would be:
-v /SPYGLASS/simlib.v
The library directories added using this window are passed to the
analysis run using the -y command-line option. For example, if you
entered the /SPYGLASS library directory, the equivalent command
line addition would be:
-y /SPYGLASS
The library files and/or directories added using this window are
passed to the analysis run in the same order as specified in the Library
Files/Dirs(-v/-y) field.
• Include Dirs(+incdir)
Use this field to add include directories by specifying the full path
for the include directory that you need. Alternatively, click Browse
and navigate through the directory structure until you select the
required include directory. You can add multiple include directories
by specifying the full path for each directory, separated by a space in
the Include Dirs(+incdir) field, or by selecting the directories one after
another using the Browse button.
The include directories added using this window are passed to the
analysis run by using the +incdir command line option. For
example, if you entered the /SPYGLASS include directory, the
equivalent command-line addition would be:
+incdir+/SPYGLASS+
• Library file extension(+libext)
Use this field to add library file extensions. You can add multiple
library file extensions by specifying a space-separated list of
extensions in the Library file extension(+libext) field.
NOTE: Library file extensions must be entered if you have added library
directories in the Library Files/Dirs(-v/-y) field.

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The library file extensions added using this window are passed to the
analysis run using the +libext command line option. For example, if
you entered +libext+.v in the Library file extension(+libext) field,
the equivalent command-line addition would be:
+libext+.v
Setup > Set Working Directory...

This menu option is used to display and alter the current working
directory.
When you select this menu option, the current working directory is
displayed in the SpyGlass Current Working Directory window:
To change the current working directory, enter the full path of the new
working directory or click ( ) to browse and select the new working
directory. Then, click Change.
NOTE: Special care should be taken when changing the working directory
because all source and library files will become relative to the new working
directory. You must open a given Profile or Violation Database file from the
same relative current working directory from which it was originally created.
Setup > Set Template Directory...

This menu option is used to specify the current template directory.
By default, the standard Atrenta Templates directory (<your-inst-
dir>/SPYGLASS_HOME/Guideware/New_RTL directory) is selected.
Use this menu option to select another directory where your user-
defined templates are located.

You can specify one of the following:
Setting Indicates
New RTL block (Default) The GuideWare templates for the New_RTL
development methodology (installed at <your-inst-dir>/
SPYGLASS_HOME/GuideWare/New_RTL directory)
IP (RTL) The GuideWare templates for the IP_RTL
methodology (installed at <your-inst-dir>/
SPYGLASS_HOME/GuideWare/IP_RTL directory)
IP (Netlist) The GuideWare templates for the IP_netlist
SPYGLASS_HOME/GuideWare/IP_netlist directory)
Soc Integration & The GuideWare templates for the SoC methodology
Implementation (installed at <your-inst-dir>/SPYGLASS_HOME/
GuideWare/SoC directory)
SpyGlass Sub- The SpyGlass templates for various methodologies
Methodology Templates (installed at <your-inst-dir>/SPYGLASS_HOME/
Methodology/<methodology-name> directory

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Setting Indicates
Custom Any user-specified directory containing
methodologies/templates as an absolute path or a
path relative to the current working directory
SPYGLASS_LOCAL Any user-specified directory containing
methodologies/templates if the SPYGLASS_LOCAL
environment variable is set
SPYGLASS_TEAM Any user-specified directory containing
methodologies/templates if the SPYGLASS_TEAM
environment variable is set
The templates located in the directory specified by this menu option are
shown in the Methodology/Template Selector.
Setup > Templates...

This menu option is used to select the templates. When you select this
menu option the Methodology/Templates dialog is displayed, as shown
below.

You can also use the ( ) button on the toolbar to open the
Methodology/Templates dialog.
The dialog shows a treeview of Methodologies/Templates in the
current template directory. For each methodology or template, a short
description about the purpose of the methodology/template is shown.
Additionally, if you click the short description of a methodology or
template, a detailed description of the methodology/template is shown
in a small balloon window.
Use the Change... button (at the top-right corner of the Methodology/
Templates dialog shown above) to specify a different template
directory. See Setup > Set Template Directory... menu option for more
details.
To select/unselect a template, check/uncheck the button before its
name. To select multiple templates, check the Allow Multiple Selection
setting and then select multiple templates.
To unselect all currently selected templates, click Unselect All.
On completion, click OK to save the settings and exit.
NOTE: Clicking the OK button also reloads an already selected template.
You can trace template selection/expansion GUI operations. The GUI
trace details are logged in the spyglass_cmdline_debug.log file. For
Setup > Policies/Rules/Parameters...

This menu option is used to select or modify the policies and rules that
SpyGlass will use to analyze your source files.
When you select this menu option, the Policies/Rules/Parameters
window will open.

The Menu Bar
FIGURE 20. Policies/Rules/Parameters Window
The Policies/Rules/Parameters window has four sections:

• The Policies/Rules/Parameters toolbar
The Policies/Rules/Parameters toolbar is used for Searching Rules and
Parameters. It is also used for setting some miscellaneous options
for policy selection. See the Policies Selection - Miscellaneous
Options for details.
• The Policies section for the selecting the policies for analysis. See the
Selecting Policies section for details.
• The Rules section for selecting the rules used by the policy selected
in the Policies selection window. See the Selecting Rules section for
details.
• The Parameters section for selecting the rule parameters for the
policy selected in the Policies section. See the Selecting Parameters
section for details.

You can trace policy, rule, and rule parameter related GUI operations.
These include the following:
• Selecting/unselecting a policy/rule
• Selecting/unselecting a full/default policy
• Modifying rule parameter values
These operations are logged in the spyglass_cmdline_debug.log file. For
Selecting Policies
To include a policy for analysis, select the check box for that policy
in the Policies selection window. When a policy is selected, it
becomes active and will be used in the SpyGlass analysis.
The Power Estimation policy of SpyGlass uses a targeted SpyGlass
core version. As a result, you cannot run the Power Estimation
policy with any other SpyGlass policy. Thus, if you select the Power
Estimation Policy and some other SpyGlass policy, the following
dialog appears:

The Menu Bar
You can now either clear all other policies or clear the Power
Estimation Policy.
Policies Selection - Miscellaneous Options

You can also set the following miscellaneous options for policy
selection from the Options drop-down menu in the Policies/Rules/
Parameters toolbar:
• Allow Policy Customization - Selecting this check box allows you to
customize policies. Then, you can customize rules in the selected
policies.
• Full policy (-fullpolicy) - Selecting this check box selects all rules of
all selected policies. Setting this field is equivalent to using the -
fullpolicy command-line option.
• No policy (-policies=none) - Selecting this check box deselects all
rules of all selected policies except the SpyGlass Built-in rules
(available under the spyglass policy). Setting this field is
equivalent to using the -policies | -policy command-line option
with the none argument.
• Clear Policy Selection - Clicking this button will deactivate all
policies and rules except the SpyGlass Built-in rules (available
under the spyglass policy).
• Default Policy Selection - Clicking this button will deactivate all
policies and rules and restore policy selections to the SpyGlass
Design Environment defaults (currently, the Lint Policy with its
high-value rules will be selected).
• Show Advance Search Option - This option is used to perform
advanced search for rules and parameters. See Searching Rules
and Parameters for details on the Advance Search Option.
Selecting Rules
The Rules section of the Policies/Rules/Parameters Window displays
the Rules Selection window where all the rules for a policy, classified

into rule groupings, are arranged in a tree format.

Click + to the left of a rule group to expand the group and display any
rules or subgroups defined within it; click - to the left of an expanded
group to collapse it.
Clicking a rule in the Rules section highlights the corresponding rule
parameters in the Parameters section.
Double-click the Policy name, a rule group name, a rule subgroup
name, or an individual rule name to select or deselect for this SpyGlass
run. This is a toggle function: toggling an individual rule name selects/
deselects it; toggling a Policy name, a rule group name, or a rule
subgroup name selects/deselects all rules within that Policy, rule group,
or rule subgroup. You can also make these selections by selecting the
check box for the corresponding item.
Policy, rule group, and rule subgroup names are displayed with .
Policy, rule group, and rule subgroup names displayed bold-faced and
underlined indicate that all rules under the Policy, rule group, or rule
subgroup are selected for analysis. Policy, rule group, and rule
subgroup names displayed normal-faced and italic indicate that only
some rules under the Policy, rule group, or rule subgroup are selected
for analysis. Policy, rule group, and rule subgroup names displayed
normal-faced indicate that none of the rules under the Policy, rule
group, or rule subgroup are selected for analysis.
Rule names displayed normal-faced indicate that the rule is not
selected. Rule names displayed bold-faced and underlined indicate that
the rule is selected.
In addition, the rule overload status is indicated by the rule icon as

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follows:
Rule Icon Indicates...

Rule is normal state.
Rule is customized (overloaded).
Rule is locked on or off.
Rule is customized (overloaded) and locked on or off.
If you are not sure where a specific rule is defined, you can enter its
name or description (or partial name/description) in the Search String
field and click the Find button. The rule hierarchy expands to display
the first rule matching the string. If the display shows only the rule
name, a short description of the rule appears above the Search String
field. You can click Find again to locate the next match of the string.
NOTE: The rule search only works from the selected rule/group onwards in the
displayed rules. To search the complete set of rules, first select the top entry in
the Rules Selection screen.
To view the help on a particular rule, right-click the rule and select Help
from the context menu. This will open up a browser window and
display the rule description in HTML.
You can also right-click a rule and select the Customize This Rule... menu
option to customize the rules based on your requirements.
About Rule HTML Help

The SpyGlass Design Environment shows or creates Rule Help in
HTML format as follows:
1. First, the SpyGlass Design Environment looks for the following file:

<your-inst-dir>/SPYGLASS_HOME/htmlhelp/
<policy-name>/<rule-name>.htm
Where <policy-name> is the rule mnemonic (for example,
lint for SpyGlass Lint Policy or dft for SpyGlass DFT Policy)
and <rule-name> is the rule name. Thus, if you right-click the
Clock_sync01 rule of SpyGlass Clock-Reset Policy, the SpyGlass
Design Environment will look for the following file:
<your-inst-dir>/SPYGLASS_HOME/htmlhelp/clock-reset/
Clock_sync01.htm
If this HTML file is found, a browser window opens and displays
the HTML file.
2. If the Rule HTML file is not found, the SpyGlass Design
Environment looks for the following file:
<your-inst-dir>/SPYGLASS_HOME/htmlhelp/
<policy-name>/<policy-name>.htm
Where <policy-name> is the rule mnemonic.
If this HTML file is found, a browser window opens and displays
the HTML file.
3. If both the Rule and Policy HTML files are not found, the SpyGlass
Design Environment creates an HTML file named help.htm (in the
current working directory) that contains the Rule Description (pod-
cut section) in the Policy Ruledeck file. Then, a browser window
opens and displays the generated HTML file.
To customize the Rule HTML Help for site-specific description,
language, formatting, etc., create Help HTML files named
<rule-name>.htm for each rule and copy them to the
<your-inst-dir>/SPYGLASS_HOME/htmlhelp/<policy-name>
directory.
The SpyGlass Design Environment will then display your customized
HTML file when you right-click a rule name in the Rule Selection
window.

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Selecting Parameters
When a policy has been selected in the Policies section, the rule
parameters for that policy are displayed in the Parameters section of the
Policies/Rules/Parameters window. The parameters are arranged
alphabetically in the Parameters section of the Policies/Rules/Parameters
window. This section displays the default value for each parameter in
the Value field. You can change this default value by either selecting a
value from the available values in the drop-down list or by specifying a
value in the textbox. For example, if a policy includes a parameter with
a selection of values (for example yes and no), you can use the
drop-down list to select the value that you wish to use for analysis.
If a policy includes a parameter with an undefined value, the Value field
will be empty for this parameter. If you do not enter a value for an
undefined parameter when selecting the policy, the SpyGlass Design
Environment assumes a NULL value ("") for the parameter.
You can also set all the parameters to their default values by selecting
the Restore Defaults button.
When you click on a parameter, SpyGlass displays the help of that
parameter along with the help of the related rule(s) in the Help window
(below the Parameters section). The following example shows the
description of the casesize rule parameter used by the W453 rule of
the Lint policy:
NOTE: In case the parameter description is lengthy and does not fit in the Help
window, you can either use the scroll-bar of the Help window or resize the
window by dragging the upper edge of the window to view the full parameter
description.
You can also view the rules that are affected by a specific rule
parameter in the Parameters section of the Policies/Rules/Parameters

window. To do so, right-click the rule parameter in the Parameters

section. All the rules that are affected by the selected rule parameter are
listed in the context-menu. You can also click the rules listed here to
highlight the corresponding rule in the Rules section of the Policies/
Rules/Parameters window. If many rules are affected by the selected
rule parameter, then you can view the complete list of the rules affected
by the selected rule parameter by clicking the More... option from the
right-click context menu of the rule parameter. Then, all the affected
rules are listed in the Rules Affected by Parameter window for the
selected rule parameter. Here also, you can click the listed rules to
highlight the corresponding rule in the Rules section of the Policies/
Rules/Parameters window.
See the corresponding Policy Rules Reference for more details of the
Policy Parameters.
Performing Sanity Checks for Parameters

Sanity checks have been added in the SpyGlass Design Environment to
identify the valid values for a rule parameter. If you enter a wrong
value for a rule parameter, then the color of the rule parameter is
changed to red. Placing the mouse cursor over the rule parameter
displays a balloon help window that contains a brief description about
the valid values that can be entered for the rule parameter. These
checks are applicable only for rule parameters that do not take design
related inputs, such as integers, floating values, alphanumeric strings,
and so on.
NOTE: Currently, only the SpyGlass Base policies, the Clock-reset policy, and
the DFT policy have implemented this check. The parameter sanity checking
will be available for other polices in a future SpyGlass release.
Parameters Used in Multiple Policies

If a rule parameter is used in multiple policies and those policies are
included for a particular SpyGlass analysis run, then SpyGlass requires

The Menu Bar
that the value of that rule parameter is consistent/same for that run. If
however, conflicting values have been set for that rule parameter in the
policies that are included for a run, then SpyGlass displays the
following warning dialog message (when the Run button is clicked)
indicating that there is a conflict in some of the parameter values in the
current policy selection:
Here, you can either click Ok to reset all the rule parameter values to the
value that is set for that rule parameter in the alphabetically last policy.
For example, if the value of the rule parameter allviol is set as “no”
in the “morelint” policy and “yes” in the “openmore” policy and both
the policies are included in a specific SpyGlass run, then clicking Ok in
the above dialog will reset the value of the allviol rule parameter as
“yes” (the value set in the “openmore” policy) because alphabetically,
“openmore” comes after “morelint”.
To override this behavior and set a value of your choice for all the
conflicting rule parameter values, click the Modify button. Then, the
following window appears listing all the conflicting parameter values:
Here, you can select a single value for all the conflicting rule parameter
values by using the pull-down list alongside the rule parameters, which
lists the permissible values for each rule parameter.

You can click Cancel to abort the current run and go back to the Policies
Browser Window to explicitly correct the conflicting rule parameter
values.
Searching Rules and Parameters

You can also search for rules, parameters, or any text string in the
available policies that have a specified text in their description.
Enter the text to be searched in search string field of the Policies/Rules/
Parameters toolbar and then select from the following options from the
search drop-down list:
• Select Any to search rule names and short descriptions.
• Select Rule in Rule Tree to search rule names only for the currently
selected policy in the Policies section.
• Select Rule Across Policies to search rule names for all the policies
displayed in the Policies section.
Now click the Find icon and all rules that have the specified text in
their name (or short descriptions) are listed with their long
descriptions as displayed in the following example:

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FIGURE 21. Example of Search Rule by Keyword Results
• Select Parameter to search for specific rule parameters in the

Parameters section. To find a rule parameter, enter the full or partial
name of the rule parameter in the Search string field and click the
Find button. If an exact match is found, the specified rule parameter
is displayed in the rule parameter list along with a short description
of the rule parameter in the Notes section. If multiple matches are
found, then the first found rule parameter is displayed in the rule
parameter list. Repeatedly clicking the Find button displays the
subsequent rule parameters that match the search string along with a
short description of the currently displayed rule parameter in the
Notes section. This feature is especially useful while working with
policies that have large number of rule parameters.
Setup > Customize Rules...

This menu option is used to customize the rules for user requirements.

Setup > Property Manager

This menu option relates to the Auto-Verify and Clock-Reset policies.
See the SpyGlass Auto_Verify Rules Reference and SpyGlass
Clock-Reset Rules Reference respectively for more details.
Setup > License Manager...

This menu option is used to maintain the SpyGlass license features.
SpyGlass differentiates among the policies as follows:
Policy Type Policies

Basic Audits, Area, Clock-Reset, ERC, Latch, Lint, Miscellaneous,
MoreLint, OpenMORE, SRS, STARC, STARC2002, Timing, Xilinx
Advanced Aptix, Auto_Verify, Constraints, DFT, LowPower, LV, Power
Estimation, TXV, VCS
Custom Any custom policy whether created by Atrenta, OEMs, or users
The Basic set of policies now have one consolidated license feature for
all policies/rule-libraries whereas the other categories (Advanced and
Custom) continue to have individual license feature for each policy/
rule-library.
When you select this menu option, the License Manager window
appears:

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The License Manager window shows the SpyGlass license feature

status of advanced policies as follows:
• License features used
The license features used in the current setup (policy/methodology/
template/profile) are locked for the current session and are shown
greyed out with (In Use) suffix. You cannot release such license
features unless you change the current setup.
• License features available but not used
The license features not used in the current setup (policy/
methodology/template/profile) but available for selection (locking)
are shown in black text without any suffix. You can select (lock) or
release such license features.
• License features not available
The license features not purchased/installed are shown greyed out
with (Not Purchased) suffix. There are no actions possible on such
license features.
Releasing a License Feature

To release a license feature that is not been used in the current setup
(policy/methodology/template/profile), clear the check box next to the

license feature name and click OK.
Locking a License Feature

While all license features used in the current setup (policy/
methodology/template/profile) are automatically locked by the
SpyGlass Design Environment, you can also select (lock) other license
features for future use.
To select (lock) a license feature that is not being used in the current
setup (policy/methodology/template/profile), set the check box next to
the license feature name and click OK.
NOTE: At the time when SpyGlass Design Environment is invoked, if
-policy/-policies and -template/-templates is not
specified, the licenses of those policies that are specified in
DEFAULT_POLICY key in SpyGlass Configuration File are locked.
Setup > Set VDB File Name...

This menu option is used to prepare your SpyGlass analysis run to save
the resulting Violation Database file with a unique name.
When you select this menu option, the Set VDB File Name window
appears. You can navigate through your directory structure to locate the
desired location for the Violation Database file that will be created
when the SpyGlass analysis is run. Enter the file name with the .vdb
suffix and click Save.
NOTE: The new Violation Database file will not be created until after you have
successfully run the SpyGlass analysis.
Setup > Save/Restore DB...

This menu option enables the Design Save/Restore feature.
When you select this menu option, the Save/Restore Setup dialog

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appears:
During Design Save

To enable the Design Save/Restore feature, check Enable Save/Restore
setting. Then, specify the location of the directory where the design is
to be saved in Save/Restore Cache Directory setting. Use the Browse...
button to browse and select the directory.
Click Preferences... to set your Design Save/Restore preferences. The
Save/Restore Preferences dialog appears:
Check the policies for which design information should be saved even
if no rules of these policies have been selected to run.
During Design Restore

To enable the Design Save/Restore feature, check Enable Save/Restore

setting. Then, specify the location of the directory where the design
was saved earlier in the Save/Restore Cache Directory setting. Use the
Browse... button to browse and select the directory.
Click Preferences... to set your Design Save/Restore preferences. The
Save/Restore Preferences dialog appears. Check the Enable Quick
Restore setting if the current SpyGlass settings are not compatible with
the SpyGlass settings specified during design save. This setting
disables the rules that may require re-parsing and/or re-synthesis of the
design.
NOTE: If Save/Restore fails due to some reason, then the current profile file is
reloaded in SDE so that the previous run conditions are not lost.
NOTE: When you invoke SpyGlass with the -enable_save_restore
command-line option, then the Enable Save/Restore check box is
automatically selected and the Save/Restore Cache Directory and the
Preferences button are enabled. However, if you invoke SpyGlass without the
-enable_save_restore command-line option then all options are
disabled.
Run Menu
When you click the Run menu, the following options appear:
Run > Analysis

This menu option is used to start the analysis.
When you select this menu option, the SpyGlass Design Environment
starts an analysis run with your current setup. You can view the
SpyGlass status in the Session Log tab in the Message window as the
analysis is run.

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If you have not specified any source files or policies, the SpyGlass
Design Environment prompts you for them before it will run.
will check to see if a Violation Database file already exists with the
current name. If a Violation Database file with the current name
already exists, or you have not chosen a name for the Violation
Database file, the SpyGlass Design Environment will prompt you to
name your Violation Database file. If the Violation Database file
already exists, the SpyGlass Design Environment will ask you if you
want to save the impending analysis results with a different name.
When you are working with the default Violation database name
(spyglass.vdb), you are not prompted for the name.
You can also click the Run Button ( ) in the toolbar to start an analysis.
Run > Library Compiler...

Use this menu option to pre-compile the Synopsys Liberty™ files (.lib
files) to a SpyGlass-compatible format library file (.sglib files).
SpyGlass provides the feature of pre-compiling the Synopsys Liberty
files (.lib files) to a SpyGlass-compatible format library file (.sglib files)
that can be used as an input for main-line SpyGlass rule-checking.
Pre-compiling your gate libraries has the following advantages:
• You can check for and fix errors in the libraries before using them
with SpyGlass. This means that you need not wait for the SpyGlass
Analysis run to check such errors.
• You can create the SpyGlass-compatible format files (.sglib files)
that contain cell information including the functional view for
library cells.
When you select this menu option, the Library Compiler window
appears:

FIGURE 22. Library Compiler Window
Pre-Compiling Gate Libraries

To pre-compile your gate libraries, follow these steps:
1. Enter the names of gate library files, each separated by a space, in
the Synopsys Gates Library field. Alternatively, use the Browse button
to select the gate library files.
You can also specify compressed gates libraries. See Compressed
Library File Support for more details.
Then, click Run.
Every such run creates the following:
• A SpyGlass-compatible format library file named as
<libfile-name>.sglib
For example, library file named R123.lib is processed in to
R123.sglib. Similarly, library file named a45.slflib is processed in to

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a45.sglib.
• Standard SpyGlass output files but with different names
The log file is created with the name spyglass_lc_<libfile>.log and
the Violation Database file with the name spyglass_lc_<libfile>.vdb.
• Standard SpyGlass automatic report (moresimple report)
2. Check the automatic report.
In case, there are error messages, you need to fix the corresponding
problems. Refer to the log file for other details.
3. If the library has compiled without errors, use the generated
SpyGlass-compatible format library files in the SpyGlass Library
file(s) (-sglib) field of Other Tab of Setup > Run Options... menu
option.
4. Run SpyGlass analysis as before.
NOTE: After pre-compiling your gate libraries, you need not specify the
Gates Library files from the Synopsys Gates Library (-gateslib) field of Other
Tab of Setup > Run Options... menu option.
Adding Functional View of Un-translated Cells

You can add functional view for the cells where the functional view
could not be generated by the SpyGlass Library Compiler. You need to
re-compile the gate library by additionally providing the corresponding
synthesizable RTL description.
Re-compile your Gates Library files as described above by additionally
providing Verilog or VHDL files as follows:
• Verilog/VHDL Source files
Use the HDL File(s) field to specify Verilog/VHDL source files in the
usual manner.
• Verilog Library files
Use the Library Files(-v), Library Dirs(-y), and Library file extension(+libext)

fields to specify Verilog library files in the usual manner.

VHDL Library Files
Use the Library Mapping field to specify the VHDL library files in the
usual manner.
Overwriting Cell Functional Views

You can use the same procedure as described in Adding Functional
View of Un-translated Cells to overwrite the functional view of any
cell.
Tools Menu
When you click the Tools menu, the following options appear:
Tools > Modular Schematic

This menu option is used to open the Modular Schematic window.
When you select this menu option, the Modular Schematic window will
open and display the schematic of the given source file provided the

The Menu Bar
corresponding schematic data was generated during analysis. See The

Modular Schematic Window for more information.
You can also invoke the Modular Schematic window by pressing the
<V> key on the keyboard.
Tools > Incremental Schematic

This menu option is used to open the Incremental Schematic window.
See The Incremental Schematic Window for more information.
You can also invoke the Incremental Schematic window by pressing
the <I> key on the keyboard.
Tools > Waveform Viewer

This menu option is used to open the SpyGlass Waveform Viewer.
See the SpyGlass Auto-Verify Rules Reference for more details.
Tools > Waiver Editor

This menu option is used to waive messages displayed in the Message
window.
When you select this menu option, the SpyGlass Waivers Window
appears (as shown below). You can also invoke the Waivers Window
by pressing the <F> key on the keyboard.
NOTE: Starting with SpyGlass 3.9.0, the features of "Waivers" and "Filters"
have been unified. In previous releases of SpyGlass, two different
mechanisms, namely "Waivers" and "Filters", were used to essentially perform
the same function of temporarily limiting the scope of the displayed violation
messages. Starting with SpyGlass 3.9.0, the features of "Waivers" and "Filters"
have been unified in a single use-model, referred to as "Waivers", and the
usage of the term "Filters" has been discontinued.

FIGURE 23. SpyGlass Waivers Window
The Waivers Window has three sections:

1. The left section shows the treeview of the selected waiver files and
any unapplied waiver files (in the current working directory as well
as in the output directory specified by the -wdir command-line
option). Unused filter files are also listed along with the unused
waiver files. However, due to the unification of filters (and all
related features) into waivers from SpyGlass 3.9.0, the listed filter
files must first be converted into waivers before they can be used in
SDE (discussed in the Converting Filters into Waivers section).
The unapplied waiver files are displayed in red-colored text in the
treeview. For any hierarchical waivers used in the design, this

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technique of displaying any un-applied waiver files clearly indicates

that there are some edited block files which are yet to be migrated,
and hence not applied in the current session. In addition, if you edit a
block waiver file (for example, test2.swl), then its container top-level
waiver file (for example, test1.swl) that is importing test2.swl, will
also be shown as unapplied.
NOTE: If a waiver file is read-only, then a red icon ( ) appears along with
the waiver file. The red icon also appears in case of hierarchical migrated
waiver files, and pragma-based waiver files.
NOTE: Waiver files are files containing waive constraints. These files are
SpyGlass Design Constraints-format files.
2. The top-right section has a spreadsheet-like grid where you can
enable/disable individual waivers.
3. The bottom-right section has details of the waivers in the file
currently selected in the tree-view.
All the above sections in the Waivers Window are resizeable by
dragging the edges of the section. Moreover, all the rows and columns
of the spreadsheet-like grid of individual waivers are resizeable by
dragging the edges of the rows and columns.
When you invoke the Waivers Window, the following waiver files are
displayed under the respective treeviews:
• Waivers files specified using the -waiver command-line option or
the -sgdc command-line option while invoking the SpyGlass Design
Environment under the Waiver Files treeview
If no waiver files were specified, a virtual tree item named New
Waiver File is displayed.
• Any other waiver files available in the current setup (the current
working directory and the output directory specified by the -wdir
command-line option) are displayed under the Unused Files
treeview.
NOTE: The virtual tree items are placeholders only; you are expected to create

new files as required.

The Waivers Window contains four buttons at the bottom of the
window to apply/save the changes or to close the window. These
buttons are:
OK button: Applies the current waiver settings and exits the Waivers
window.
NOTE: SpyGlass prompts you for a re-run of SpyGlass when edited block
waiver files, which have changed from the last run of SpyGlass are applied, or
when some new hierarchical waive import commands are added in the waiver
files.
Apply button: Applies the current waiver settings (that is, any new
waiver expressions or any changes made to the existing waiver
expressions) in the Waivers window. Pressing this button only applies
the changes and does not close the window.
NOTE: When you select the Apply when created option in the Waiver section
of Misc Page in Preferences window, any message selected for waiving is
added to the Waivers window and also waived immediately. When you select
the Apply From Spread Sheet option, the message is just added to the Waivers
window and is waived only when you click Apply or OK in the Waivers window.
Cancel button: Closes the Waivers window, if there are no unapplied
changes present. If there are any unapplied changes, SpyGlass prompts
you to either cancel the action (takes you back to the Waivers window
so that you can apply changes) or continue with the action (closes the
Waivers window abandoning the unapplied modifications).
Saveall button: Saves the modifications/changes made to the Waiver
file. If you have any read-only files with unsaved changes, then
pressing the Saveall button prompts you to save the file by displaying
the Readonly Files dialog. Pressing the Continue button in this dialog,
saves the waiver files (other than read-only ones) to the disk. Pressing
the Cancel button does not save any file to the disk.

The Menu Bar
Creating New Waiver Files

To create a new waiver file, right-click anywhere in the Waiver Files
treeview and select New File... from the context menu. The Create new
waiver file dialog appears:
Enter the name of the new waiver file (normally with .swl extension).
Check Set as default if you want this new waiver file to be the default
waiver file. Click OK.
NOTE: The waiver files can have any extension. When you are creating a new
waivers file, the SpyGlass Design Environment suggests the .swl extension to
facilitate better recognition and handling. If you do not specify the file extension
for a waiver file, then by default, the .swl file extension is appended to the
waiver file name.
The new waiver file is created and added to the Waiver Files treeview.
However, the actual disk file is not created until you explicitly save the
file using the Save file as... option from the context menu. Waiver files
that are not yet saved on the disk are indicated with a red-colored icon
in the Waiver treeview.
Adding Existing Waiver Files

To add an existing waiver file, right-click anywhere in the Waivers
Files treeview and select Open File... from the context menu. The Open
file dialog appears. Browse your file system and select the file.
Selecting/Deselecting Waiver Files

You can enable a Waiver file listed under the Unused Files treeview by

right-clicking on the file name and then selecting Enable File. The
enabled file is added to the treeview and is removed from the Unused
File treeview.
To disable a selected Waiver file, right-click on the file name in the
Waiver Files treeview and then select Disable File. The disabled file is
removed from the treeview and is added to the Unused File treeview.
To remove a selected Waiver file from the treeview (including the
Unused Files treeview), right-click the file name and select Remove File
from the context menu. The file is removed from the treeview.
NOTE: Default waiver files that are not yet saved, indicated by a red colored
file icon with the alphabet “D” ( ), cannot be removed from the Waiver treeview
until they are first disabled.
Reloading Waiver Files

To reload a waiver file from the file system, right-click the file name in
the treeview and select Reload file.
NOTE: It is not advisable to edit the same file both inside and outside the
Waivers window simultaneously. One set of changes will be lost whenever the
file is saved and/or reloaded.
Setting a Waivers File as Default

To set a waiver file as default, right-click the file name in the Waiver
Files treeview and select Set file as Default. The selected waiver file will
be set as default for all SpyGlass sessions until you select a new waiver
file to be set as default.
The default waiver file name in the Waiver Files treeview is shown in
blue text and with the icon.
Creating Waiver Settings

To create new waiver settings for a waiver file, double-click on the

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waiver file name in the treeview (including the Unused Files treeview)
to select it. The waivers available in the file are displayed in the top
right table. The name of the selected file is displayed in the Waivers
Window title bar.
To add a new waiver, click Add Row button available in the top right
corner of the Waivers window. A new row is added to the table. To
delete an existing waiver, select the row corresponding to the waiver to
be deleted and click Delete Row button available in the top right corner
of the Waivers window. The selected waiver is deleted from the table.
You can also add/delete row(s) for waivers by using the right-click
menu options (discussed later in Right-click Menu Options).
You can view the list of rules for which waivers have been applied. The
count of such rules is displayed as a hyperlink in the Matched column of
the spreadsheet. When you click the count in the Matched column a list
rules for which the waiver has been applied is displayed in the context
menu. You can also click a rule to locate the message in the Waived
tree.
Make the required settings in the entry fields available in the bottom
right section of the Waivers window. The fields available in this section
are:
File: Use this field to specify the files for which the rule messages need
to be waived. You can also click ( ) and select a file from the File
Selection dialog.
Line: Use this field to specify the line for which the rule messages need
to be waived.
IP: Use this field to waive rule messages for the specified design unit
(IP blocks) or all design units specified in the IP library. You can also
click ( ) and select a file from the IP Selection dialog.
DU: Use this field to waive rule messages for the specified design unit
or all design units in the specified library. You can also click ( ) and
select a file from the DU Selection dialog.

Rule: Use this field to specify the rules, rule groups, or policies for
which the messages need to be waived.
Severity: Use this field to specify the severity class or severity label for
which the rule messages need to be waived.
Except: Use this field to specify the rules, rule groups, or policies for
which the messages need to be excluded.
Weight: Use this field to specify the weight of the rules that need to be
waived.
Comment: Use this field to add a comment for the specified waiver. By
default, when a row is added in the spreadsheet, the comment text box
displays information about the user who created the waiver and the
time when the waiver was created.
Message: Use this field to specify the message that needs to be waived.
In this section, at least one of the fields must be specified from one of
the following field groups:
Group 1: File/Line, IP, DU
Group 2: Rule, Severity
When more than one field is specified from Group 1, a message is
waived if any one of the Group 1 field criteria is met. When more than
one field is specified from Group 2, a message is waived only if all the
Group 2 field criteria are met. If fields from both Group 1 and Group 2
are specified, a message is waived only if any one of the Group 1 field
criteria is met and all Group 2 field criteria are met.
When you type a value in the File, Line, IP, DU, Rule, Severity, Except, or
Weight fields, the Waiver Expression column is dynamically updated with
the value entered by you. For example, if you enter the value
“NoXInCase-ML” in the Rule field, the Waiver Expression column is
dynamically updated as follows:
waive -rule “NoXInCase-ML”
NOTE: These waiver settings are same as those available in the SpyGlass

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waive constraint (see Waiving Messages Using the SpyGlass waive

Constraint for more details).
To enable regular expression support in field data, check the Enable
Regexp button, which also enables the Escape MetaChars button.
As you enter a message expression in the Message field, any
metacharacters entered are shown in red color. You can escape these
metacharacters yourself or use the Escape MetaChars button to
automatically escape the metacharacters. Escaped metacharacters are
displayed in normal (black) color. The message expression entered in
the Message field appears in the waiver description in the Waiver
Expression field of the table.
You can also enter/edit comments for the waivers in the User Comment
field. To do so, double-click the User Comment field and make the
required changes in the resultant Edit Comment window.
Check the Do not itemize matched messages button to report only the
number of messages waived (instead of individual messages) in the
waiver report.
To enable/disable a waiver item, check/uncheck the button next to the
waiver item under the second column in the waiver table.
To modify the settings of a waiver item, click on the waiver item. Its
details are displayed in the bottom right section. Modify as required.
Right-click Menu Options

Right-clicking any existing row of a waiver in the table displays the
following context menu options:
• Insert Waiver > Row Above
Select this option to insert a new waiver row above the currently
selected row.
• Insert Waiver > Row Below
Select this option to insert a new waiver row below the currently

selected row.
• Insert Import Waiver > Row Above
Select this option to import a new hierarchical waiver row above the
currently selected row. When you select this menu options then a
new row with the waive constraint is added above the selected row.
When you select the new row, the Waiver Editor window appears as
shown below.
You can specify the block to import the waivers specified in the
selected block-level design into the chip-level design in the Block
text box. Alternatively, you can click ( ) and browse to the
directory containing the required block.

The Menu Bar
You can specify the path of the waiver file in the File text box.
Alternatively, you can click ( ) and browse to the directory
containing the required file.
See the Support for Hierarchical Waivers section for details.
• Insert Import Waiver > Row Below
Select this option to import a new hierarchical waiver row below the
currently selected row. See the Support for Hierarchical Waivers
• Delete Row(s)
Select this option to delete the currently selected row(s).
• Display Comment
Select this option to view the complete text of the User Comment
field in a pop-up box.
• Set Row Height...
Select this option to set the row height between 1 (default) to 5 units
for the entire table. This option is useful if the table contains long
message expressions that do not fit in the default row height.
• Insert common Comment
Select this option to add a common comment to all the selected
waiver commands. When you select this option, SpyGlass displays
the Add Common Comment dialog. In this dialog, add the required
comment in the textbox, and click the OK button. This adds the
specified comment to all the selected waiver commands.
When the required settings have been made, click OK to apply the
current waiver settings and exit, click Apply to apply the current waiver
settings and continue, or click Save All to save the modifications and
continue. Click Cancel to abandon the unapplied modifications and exit.
If SpyGlass analysis has already been run on the current design and the
Msg Tree is displayed in the Message window, then any modifications
in the waivers settings are reflected in the current Msg Tree. However,

the Msg Tree itself is persistent and retains its expanded state.
NOTE: It is recommended that you save (or discard) the settings made in the
Waivers window before starting a new SpyGlass analysis. Otherwise, there
can be mismatch between the number of messages actually displayed in the
SpyGlass Design Environment (this is based on the current settings of Waivers
window) and the number of messages that should be displayed based on the
saved (physical) waiver files. The SpyGlass Design Environment also prompts
you if such a mismatch exists at the time of starting a SpyGlass analysis run.
Saving Files
To save a waiver file with its current waiver settings, right-click the
waiver file name and select Save file.
To save a waiver file with a different name or location, right-click the
waiver file name and select Save file as... The File Save As window
appears. Browse your file system to select the location and specify the
new waiver file name. Click Save. The original file is removed from the
treeview and the new file is added in its place.
NOTE: The waiver files are not saved automatically. You need to explicitly
save them or abandon them as required. You are also prompted to save the
unsaved waiver files, if any when you close the Waivers Window.
Converting Filters into Waivers

Starting with SpyGlass 3.9.0, filters (and all related features) have been
unified into waivers and the use of filters has been deprecated.
However, for historical reasons, you may have pre-existing filter files
that you may want to use in SpyGlass 3.9.0. In such cases, the pre-
existing filters must first be converted into waivers before they can be
used in SpyGlass 3.9.0.
As discussed earlier, the pre-existing filter files, which are already
present in the current working directory as well as in the output
directory specified by the -wdir command-line option, are also listed
in the Unused Files treeview in the SpyGlass Waivers Window. If you

The Menu Bar
want to use a specific filter file (.sfl file) listed here, right-click the file
and select Enable File option from the context menu. The Filters Error
dialog appears (as shown below) prompting you to confirm whether or
not you want to convert the selected filter file to a waiver file.
Here, the following two scenarios are possible:

• If you click “Yes”, the filters present in the filter file are converted
to corresponding waivers in a new waiver file (.swl file) with the
string “-waivers” appended to the file name. This new waiver file is
added to the Waiver Files treeview and also saved in the current
working directory. The original filter file still remains in the Unused
Files treeview. In case a waiver file already exists with the same
name as the new waiver file, then a browser window appears
prompting you to save the new waiver file with a different name.
The new waiver file can now be used as any other regular waiver
file.
• If you click “No”, the filter file (.sfl file) still gets added to the
Waiver Files treeview and the filters are applied as waivers.
However, the new waivers are not saved in the current working
directory. Thereafter, you can convert the added filter file into
waiver file and save it to the current working directory by
right-clicking the filter file in the Waiver Files treeview and then
selecting the Convert to waivers file option from the context menu.
In case any filter file (.sfl file) is present in the Waiver Files treeview
and you try to run a new SpyGlass analysis, then a window appears
(as shown below) indicating that filters are no longer supported and
prompting you to confirm whether or not you wish to convert the
listed filter files.

Here again, if you click “Yes”, the filters present in the listed filter
file (.sfl file) are first converted to corresponding waivers (in .swl
file) and then the waivers are applied for the current SpyGlass run.
The waiver file is also added to the Waiver Files treeview and saved
in the current working directory.
If you click “No” in the above window, the current SpyGlass
analysis run continues with the filters applied as waivers but the
waivers are not saved as a disk file.
Tools > Text Viewer

This menu option is used to view text files like those generated by
policies or any other text files in the SpyGlass Design Environment
Text file viewer.
When you select this menu option, the Open window appears. Select
the text file to be viewed. The SpyGlass Design Environment Text file
viewer appears displaying the selected text file. If the SpyGlass Design
Environment Text file viewer is already open displaying a text file
selected earlier, the new text file replaces the earlier text file.
To find a string in the displayed text, use Find. The search can be case-
sensitive or case-insensitive, both forward and backward in the file, and
by regular expressions.
To print the displayed text file, use Print.

The Menu Bar
Tools > View Logfile

This menu option is used to view to the log file created by a SpyGlass
run. When you select this option the LogFile Viewer dialog appears.
To find a string in the displayed text, click ( ). The search can be

case-sensitive or case-insensitive, both forward and backward in the
file, and by regular expressions.
To print the displayed file, click ( ).
To close the LogFile Viewer dialog click ( ).
Tools > Version Control

This menu option is used to configure a version control tool in
SpyGlass.
To configure a version control tool, click the Configure... sub-menu
option. When you select this option, the Version Control Page of the
Tools > Preferences dialog is displayed where you can specify the
version control settings.
You can also use the Tools > Version Control menu option to retrieve or
place the HDL file displayed in the Source Window, in the configured
version control tool.
Tools > Preferences

This menu option is used to set the SpyGlass Design Environment

preferences.
When you select this menu option, the Preferences window will open at
the Severity page.
Message Page
Use the Message page to set the color for each severity in the Msg Tree
and Msg Summary pages.
FIGURE 24. The SpyGlass Design Environment Preferences Window - Message Page
You can set the color for each severity class so that a message of the
given severity class is highlighted in the selected color. To set the
color, click the displayed color and the Choose color dialog appears:
Choose a highlighting color from the predefined color palette or click

Change Color to select more colors for the palette. Click OK to apply the

The Menu Bar
selected color.
The sample text is also displayed for each severity class.
Set the color scheme to your liking and click OK to apply the color
scheme to the Source window.
Fonts Page
Use the Fonts page set the font style and size of source code and that of
messages in the Source window and the Message window.
FIGURE 25. The SpyGlass Design Environment Preferences Window - Fonts Page
You can set the following Source Code display preferences:

• Source Font
Use the Source Font drop-down menu to select the font in which the
source code will be displayed in The Source Window.
• Font Size
Use the Font Size drop-down menu to select the font size in which
the source code will be displayed in the Source window.
• Message Tree Font
Use the Message Tree Font drop-down menu to select the font in
which the messages will be displayed in the Messages: Msg Tree

Page.
• Message Tree Font Size
Use the Message Tree Font Size drop-down menu to select the font
size in which the messages will be displayed in the Msg Tree page.
• Msg Summary Font
Use the Msg Summary Font drop-down menu to select the font in
which the messages will be displayed in theMessages: Msg
Summary Page.
• Msg Summary Font Size
Use the Msg Summary Font Size drop-down menu to select the font
size in which the messages will be displayed in the Msg Summary
page.
• Menu Font
Use the Menu Font drop-down menu to select the font in which the
menu options will be displayed in the menu bar.
• Menu Font Size
Use the Menu Font Size drop-down menu to select the font size in
which the menu options will be displayed in the menu bar.
Schematic Page
Use the Schematic page to set the appearance of the schematic
windows.

The Menu Bar
FIGURE 26. The SpyGlass Design Environment Preferences Window - Schematic Page
You can set the following preferences for the schematic windows:
• Show Annotation on Schematic Viewer
Set this option to disable the functions related to the Modular and
Incremental schematic windows. The Schematic Viewer is enabled
by default. However, when you disable this option, then you will not
be able to make changes in the schematic windows.
• Expand all signals of the Pinbus on Double Clicking
Set this option to have the schematic expanded to show all
connected nets and the objects connected to these connected nets
when a pinbus is double-clicked.
• Show List/Trace Connected Nets Dialog on Double Clicking

Set this option to show the List/Trace Connected Nets dialog whenever
a pinbus/netbundle/portbus is double-clicked.
• Show Tool-tip On Schematic Objects
Set this option to view a ToolTip whenever the mouse-cursor is
placed over an object in the schematic windows. The ToolTip
displays the full name of the object (net, pin, port, pin-bus, or
instance). By default, this option is set and the ToolTip is displayed
whenever the mouse-cursor is placed over an object in the schematic
windows.
• Show Instance Names
Set this option to turn on the display of instance names in the
schematic windows.
NOTE: This option is useful because in a netlist design, the debugging of a
violation message using the schematics becomes difficult if the instance
names are too long. In such a scenario, part of the instance name of the first
gate is overwritten by the instance name of the next gate and thus the
information becomes unreadable.
• Show Module Names
Set this option to turn on the display of module names in the
schematic windows.
• Show Atrenta Primitive Names
Set this option to turn on the display of module names of Atrenta
generic primitives (such as RTL_FD, RTL_AND, RTL_BUFF, etc.)
in the schematic windows. By default, this option is set and the
module names of the Atrenta primitives are not displayed in the
schematic windows. If this option is modified while the schematic
window(s) are open, then the schematic windows must be reloaded
to view the modified display.
• Maintain Relative Hierarchies for Instances in IS
This option is used to add the parent hierarchies of the instances that
are loaded/appended or cross-probed into Incremental Schematic

The Menu Bar
from any other window (such as, from RTL, Instance Browser,
Power Browser, Design Tree etc.). By default, this option is set to
on.
• Show All Possible Paths while extracting Fanin/Fanout Cone
Set this option to display all possible paths in the schematic
windows while extracting the fanin/fanout cone. By default, not all
paths are displayed.
• Show net Bundles in IS
Set this option to enable the display of netBundles in the Incremental
Schematic (IS). The netBundle takes the attributes of the constituent
nets. For example, if a net contained in the netBundle is partial
(dashed) or highlighted (colored), then the netBundle would also
appear the same.
• Disable Auto Filtering in Schematic Find
Set this option to disable the auto-filtering feature in the Find in
Modular Schematic dialog.
• HighlightWidth
Choose the highlighting width of the selected object in the schematic
windows from 1(thinnest) to 9 (thickest). The default width is 3.
• HighlightColor
Choose the highlighting color of the selected object in the schematic
windows by clicking the displayed color and by selecting a different
color from the color palette.
• GreymodeColor
Choose the color of the schematic display (except the message path)
when a message is cross-probed to the schematic windows (from the
Message treeview in Msg Tree page of the Message window) by
clicking the displayed color and selecting a different color from the
color palette.
• BackgroundColor

Choose the background color of the schematic windows by clicking

the displayed color and selecting a different color from the color
palette.
• Show names at net corners
Displays the net names at net corners.
• Show names at window borders
Displays the net names at the window boundary if the net does not
fit in the current display.
• Auto Expand all groups containing highlighted objects
This option is used to automatically expand all the groups in the
highlighted section of the schematic.
• Auto Expand only those groups which have highlighting completely
contained
This option is used to automatically expand only those groups that
are fully contained in the highlighted section of the schematic.
• Auto collapse any expanded groups before selecting a new violation
This option is used to collapse all expanded groups in the schematic
before a new violation is selected.
• Show Registers outside RTL groups
Use this option to view the registers outside the grouped RTL
blocks.
When the preferences for schematic windows are set, click OK.
Misc Page
Use the Misc page to set the miscellaneous preferences.

The Menu Bar
FIGURE 27. The SpyGlass Design Environment Preferences Window - Misc Page
You can set the following miscellaneous preferences:

• Show Toolbars
Set this option to show or hide the toolbars on the SpyGlass main
window and the toolbars on the Msg Summary, Msg Tree, File, and
Module pages in the Message window.
• SpyGlass Color Schemes
Set this option to view the SpyGlass Design Environment in the
Classic color scheme or Modern color scheme.
• Policy Customization
Set this option to allow policy customization. Then, you can
customize rules in selected policies. See Setup > Policies/Rules/
Parameters... for more details.
• Text Container
Set this option to enable or disable the display of extra information
in a text window when a violation is selected from Msg/File/Module

Tree windows.
• Show Tool-tip in Msg Tree, Msg Summary etc.
Set this option to enable or display the information that is displayed
as a tool-tip in the Msg Tree window, Msg Summary window and so
on.
• Show Message ID in Msg Tree, Msg Summary, etc.
Set this option to enable or disable unique hexadecimal message ids
in the relevant sections of The Message Window, such as Messages:
Msg Tree Page, Messages: Msg Summary Page, etc. (by default, this
is enabled). These indexes (when enabled) allow you to cross-probe
between the Message Window and other SDE windows.
• Annotate Message ID in Reports
Set this option to enable or disable unique hexadecimal message ids
in the standard SpyGlass reports (by default, this is enabled). These
ids (when enabled) allow you to cross-probe between standard
SpyGlass reports and other SDE windows. See Cross-probing from
Standard Reports for more details.
• Cross-probe from File/Module Tab to Message Tree
Set this option to enable/disable cross-probing from the File/Design
page to the Msg Tree page.
• Show dialog for fatal messages
Set this option to enable the display of fatal messages in a pop-up
window.
• Show warning if loading 32bit VDB on a 64bit Machine
Set this option to display a dialog informing the user that a .vdb file
created on a 32bit machine is being opened on a 64bit machine.
• Show Message Count Limit Exceeded Dialog
Set this option for the SpyGlass Design Environment to show a
dialog when the total message count for a rule has exceeded the limit
specified using the Maximum violations per rule (default) (-lvpr) setting in

The Menu Bar
the Other Tab of the Setup > Run Options... menu option or using
the -lvpr command-line option.
• Show Message Count Limit per rule Exceeded Dialog
dialog when the total message count for a rule has exceeded the limit
specified using the Maximum violations by rule name (-lvpr) setting in
the Other Tab of the Setup > Run Options... menu option or using
the -lvpr command-line option.
• Wrap text in RTL Window
Set this option to wrap the text displayed in the RTL tab of the
Source window so as to fit the text in the current width of the Source
window and hence avoid the use of horizontal scroll bar.
• Wrap text in Constraint Window
Set this option to wrap the text displayed in the Constraint tab of the
Source window so as to fit the text in the current width of the Source
window and hence avoid the use of horizontal scroll bar.
• Wrap Messages in Message, Waiver Tree
Set this option to wrap the message text displayed in the Msg Tree
page and Waived page of the Message window.
• Prompt while writing SpyGlass.vdb for a unique name
Set this option for the SpyGlass Design Environment to prompt for a
new unique name for the Violation Database file when you run
analysis in the SpyGlass Design Environment.
Clear this option to always save the Violation Database file as
spyglass.vdb in the current working directory.
With this option set and a valid source file open in the SpyGlass
Design Environment, the following dialog appears when you click
the Run/Stop Toggle Button or choose Run > Analysis menu option:

Click Yes to specify a new unique name for the Violation database
file. Then, the Save As window appears. You can navigate through
your directory structure to locate the desired location for the
Violation Database file that will be created when the SpyGlass
analysis is run. Enter the file name with the .vdb suffix and click
Save.
NOTE: The new Violation Database file will not be created until after you
have successfully run the SpyGlass analysis.
Click No to save the new Violation Database file as
spyglass.vdb in the current working directory. This action is
equivalent to clearing the Prompt while writing SpyGlass.vdb for a unique
name preference for the current SpyGlass run.
Click Cancel to abort the current SpyGlass run.
Set Don’t show this dialog again to clear the Prompt while writing
SpyGlass.vdb for a unique name preference for the current and
subsequent SpyGlass runs.
The Setup > Set VDB File Name... menu option overrides the Prompt
while writing SpyGlass.vdb for a unique name preference. That is, the
Violation Database file will be saved by the name set using the Setup
> Set VDB File Name... menu option and you would not be
promoted to enter a Violation Database file name even if the Prompt
while writing SpyGlass.vdb for a unique name preference is set.
• Prompt while overwriting vdb file
Set this option for the SpyGlass Design Environment to prompt for
confirmation while overwriting an existing Violation Database file
(set using the Setup > Set VDB File Name... menu option).
Clear this option for the SpyGlass Design Environment to overwrite
an existing Violation Database file without confirmation (set using

The Menu Bar
the Setup > Set VDB File Name... menu option).

With this option set, an existing Violation Database file with name
set using the Setup > Set VDB File Name... menu option, and a valid
source file open in the SpyGlass Design Environment, the following
dialog appears when you click Run/Stop Toggle Button or choose
Run > Analysis menu option:
Click Yes to overwrite the existing Violation database file.

Click No to save the message details of the current SpyGlass run in a
different Violation Database file. Then, the Save As window
appears. You can navigate through your directory structure to locate
the desired location for the Violation Database file that will be
created when the SpyGlass analysis is run. Enter the file name with
the .vdb suffix and click Save.
NOTE: The new Violation Database file name becomes the default Violation
Database file name as if it was specified using the Setup > Set VDB File
Name... menu option
Set Don’t show this dialog again to clear the Prompt while overwriting vdb
file preference for the current and subsequent SpyGlass runs.
Click Cancel to abort the current SpyGlass run.
• Prompt to select Profile saving style
current profile saving style (as a Profile with design file details or as
a Template without design file details) when you save the current
profile using the File > Save Profile menu option.
Clear this option to always save the current profile as a Profile File
with the design file details (using the File > Save Profile menu
option).

With this option set and a valid source file open in the SpyGlass
Design Environment, the following dialog appears when you choose
the File > Save Profile menu option:
Click Yes to save the current profile as a Profile file with design file
details.
Click Save Without Files to save the current profile as a Template File
without design file details.
Set Don’t show this dialog again to clear the Prompt to select Profile
saving style preference for the current and subsequent SpyGlass runs.
That is, the current profile will be always saved as a Profile File with
design file details.
Click Cancel to abort the Save Profile operation.
• Prompt before Exit from SpyGlass
confirmation when you exit the SpyGlass Design Environment using
the File Menu menu option.
Clear this option to exit the SpyGlass Design Environment without
confirmation (using the File Menu menu option).
With this option set, the following dialog appears when you choose
File Menu menu option:
Click Yes to exit the SpyGlass Design Environment.

Click No to cancel and continue working in the SpyGlass Design

The Menu Bar
Environment.
Set Don’t show this dialog again to clear the Prompt before exit from
SpyGlass preference for the current and subsequent SpyGlass runs.
That is, the SpyGlass Design Environment will exit without
confirmation when you choose the File Menu menu option.
• Show SpyGlass Progress Indicator
Progress Indicator on The Status Bar while performing major tasks.
As the Progress Indicator consumes resources, you may want to
switch off the Progress Indicator if you find deterioration in
performance.
• Overwrite old waivers while saving waivers file
Set this option to overwrite old waivers with the new ones while
saving the waivers file. If this option is not set, then old waivers are
commented out and new waivers are appended to the waivers file
while saving the file.
• -regexp option ‘on‘ by default while generating waiver
Set this option to keep the regular expression support on by default
while creating waivers.
• Handle meta characters in waiver generation
Set this option to handle meta characters (such as *) while
generating waivers in GUI.
This option is used to handle meta characters when waivers are
generated in any of the following ways:
• By selecting the Waive -> Selected Message(s) option from the
right-click menu of a violation message or a rule header in the
Msg Tree.
• By selecting the Waive -> This Exact Message option from the
right-click menu of a violation message or rule header in the Msg
Tree.

• Waiver
This option sets whether a message selected for waiving is added to
the Waivers table and also waiving immediately (select Apply when
created) or the message is just added to the Waivers table and is
waiving only when you click Apply or Ok in the Waivers table (select
Apply From Spread Sheet).
• Color Allocation
Select Absolute to use the severity class colors as the probe or
message colors, select Round-robin to automatically assign probe or
message colors from the color palette on round-robin basis, or select
Severity to automatically assign colors by message severity.
In the Absolute mode, the probe or message colors in the schematic
windows can be as decided by the policy (for example, the Clock-
reset policy) or can be the same as the severity class colors (set in the
Message Page of the Tools > Preferences menu option). The probe
or message colors in the Source window will be the same as the
severity class colors (set in the Message Page of the Tools >
Preferences menu option).
In Round-robin mode, the probe or message colors in Source
window and schematic windows are always same.
• Probing Mode
Use this option to set the probing modes. See Probing Modes for
more details.
• Auxiliary Message Display Mode
This option specifies the mode of combined schematic display of
multiple messages. See Working with Multiple Messages for further
details.
• Max No. of Messages
This option sets the maximum number of rule messages to be
displayed in the Msg Tree page. By default, 100000 messages are
displayed.

The Menu Bar
To view the balance messages, additional navigation options have

been provided from the View Pages option in the context menu of the
Msg Tree page.
• Max No. of Messages per rule
This option sets the maximum number of messages per rule to be
displayed in the MsgTree page. By default, 1000 messages are
displayed.
To view the balance messages, additional navigation options have
been provided from the View Pages option in the context menu of the
MsgTree page.
• Specify pdf file reader
This option sets the path to the PDF file viewer that is required for
viewing the printable SpyGlass documentation files.
This field is controlled as follows:
• The value of the SG_PDF_VIEWER environment variable, if set,
has the highest priority. Every time, you start the SpyGlass
Design Environment, this field shows the value of the
SG_PDF_VIEWER environment variable, if set and uses that
PDF viewer.
• You can change the PDF viewer for the current session by typing
the complete path and file name of the PDF viewer executable or
by clicking Browse and then search and select the executable file.
If the SG_PDF_VIEWER environment variable has not been set,
this setting will persist from session to session.
• If the SG_PDF_VIEWER environment variable has not been set
and you also do not set the Specify pdf file reader preference, the
SpyGlass Design Environment will try to invoke the commonly-
used PDF viewer of the particular platform.
• Editor Environment variable
This field shows the value of the EDITOR environment variable as
used by the Specify Editor program setting.

• Specify Editor program

This field sets the path to the text editor for viewing and editing text
files.
Type the complete path and file name of the text editor executable or
click Browse and then search and select the executable file.
If you do not set this preference, the SpyGlass Design Environment
will try to invoke the text editor specified in the EDITOR
environment variable or the commonly-used text editor of the
particular platform.
• Specify HTML Browser program
This field sets the path to the HTML File Browser for viewing the
SpyGlass HTML-based Help files.
This field is controlled as follows:
• The value of the SG_HTML_BROWSER environment variable, if
set, has the highest priority. Every time, you start the SpyGlass
Design Environment, this field shows the value of the
SG_HTML_BROWSER environment variable, if set and uses that
HTML File Browser.
• You can change the HTML File Browser for the current session
by typing the complete path and file name of the HTML File
Browser executable or by clicking Browse and then search and
select the executable file. If the SG_HTML_BROWSER
environment variable has not been set, this setting will persist
from session to session.
• If the SG_HTML_BROWSER environment variable has not been
set and you also do not set this preference, the SpyGlass Design
Environment will try to invoke the commonly-used HTML File
Browser of the particular platform.
• Select Waveform Viewer
This field sets the waveform viewer to view the waveform
associated with a rule message. You can select either SpyGlass

The Menu Bar
(default) viewer or the Debussy (nWave) waveform viewer. If you

select Debussy nWave waveform viewer, you need to set the path of
nWave in the corresponding field. Click the Browse button to browse
to the directory location of nWave executable and select the required
filename.
NOTE: You need to have a license to run the Debussy nWave waveform
viewer. Atrenta does not provide any license to run the Debussy waveform
viewer.
• Auto-Initialize WF Viewer
Set this option to initialize the waveform viewer in the background.
After selecting this option, you need to run SpyGlass again to
initialize the waveform viewer. Selecting this option will initialize
the waveform viewer for future SpyGlass runs as well. The Auto-
Initialize WF Viewer feature is switched off by default.
• Create cdc_false_path from:
Use this option to set the cdc_false_path constraint from a
source flip-flop to a destination flip-flop (Source FF, Dest FF option)
or from a source clock to a destination clock (Source Clk, Dest Clk
option).
• Don’t Show cdc_false_path setup dialog again
Use this option to show or hide the Select Clock/Flop dialog when
creating the cdc_false_path constraints for the Clock_sync01
rule.
• Select maximum number of objects that can be cross-probed from the
SGDC file:
Click the Select option and enter a number in the text field to specify
the number of objects to cross-probe. The default value is 25. You
can also select the Don’t show dialog to ask count of objects that can be
cross-probed from SGDC file to hide the display of the dialog that
appears at the time of cross-probing.
Select the All option to cross-probe all objects.

When the selection is to your liking, click OK.
Tabs Page
Use the Tabs page to set the additional Severity Class pages to be
displayed in the Message window, and to set up the Summary page of
the Message window.
FIGURE 28. The SpyGlass Design Environment Preferences Window - Tabs Page
You can set the following Tabs page preferences:

• Display File Page
Use this option to show or hide the File page in the Message
window.
• Display Module Page
Use this option to show or hide the Module page in the Message
window.
• Display Line Page
Use this option to show or hide the Line page in the Message
window.

The Menu Bar
• Display Serious Page

Use this option to show or hide the Serious page in the Message
window.
• Display Warning Page
Use this option to show or hide the Warning page in the Message
window.
• Display Info Page
Use this option to show or hide the Info page in the Message
window.
• Display Summary Page
Use this option to show or hide the Summary page in the Message
window. In addition, you can set the following Summary page
preferences:
• Show Unselected Rules
Use this option to show or hide in Summary page, the rules of all
selected policies that were not selected for the current analysis
run.
• Show Policy Parameters and Values
Use this option to show or hide in Summary page, the rule
parameters in all selected policies and their respective values as
used in the current analysis run.
• Highlight following Severity Classes in Red
Set this option to highlight in red color a Severity Class in the
Summary window if there are any rule messages of that Severity
Class.
Check the Severity Class name for which you want the feature.
Clear the Severity Class name if you do not want the feature for that
Severity Class.

HDL Navigator Page

Use the HDL Navigator page to show or hide the color of the RTL
source code. In addition, use the HDL Navigator page to view detailed
information about the drivers and loads declared for a signal.
You can set the following HDL Navigator page preferences:

• Stop at module port declarations
Use this option to restrict the Loads and Drivers results such that
while traversing the input/output cone, if module boundary is found
before any other instance, then the declaration is returned as the
load/driver. When this option is not selected, then even if module
boundary is found, the traversing continues until an instance or a
primary port (outside the module) is found.
• Show Color Coded syntax in RTL window
Use this option to view the color coding of the RTL source in the
The Source Window.
• Show signal declaration

The Menu Bar
Use this option to view the location of the signal declared in the
Source window.
• Show Drivers
Use this option to show or hide the columns of the table that contains
information about drivers declared for a signal.When you select the
Detailed View option, the ( ) button is enabled. Clicking the ( )
button displays the Configure Columns dialog as shown below.
To hide a column, select the name of the column from the Visible
Columns list and click the ( ) button. To make a hidden column
visible, select the column from the Hidden Columns list and click
the ( ) button. You can also change the order in which the columns
appear in the table by using the ( ) and ( ) buttons. For example,
in the above figure, if you want to display the HDL column before
the File column, then select the HDL column and click the ( )
button.
• Show Loads
Use this option to show or hide the columns of the table that contains
information about loads declared for a signal. When you select the
Detailed View option, the ( ) button is enabled. Clicking the ( )
button displays the Configure Columns dialog. You can configure
the columns as explained for the Show Drivers section.
• Show Properties

Use this option to show or hide the Properties field in the HDL
Navigator window
• Detailed View
Use this option to view detailed information, about the drivers and
loads that are declared for a signal in the Source window. When you
select this option, the information about the drivers and loads
appears in the The HDL Navigator Window in a tabular format with
columns containing information such as the file name, line number,
and the HDL code.
Version Control Page

Use the Version Control page to configure a version control tool in
SpyGlass. Configuring a version control tool ensures that you are
working on the latest HDL file. In addition, a version control tool
ensures that the changes in the file are not lost while modifying a
design.
NOTE: By default, SpyGlass uses the CVS version control tool. However, you
can integrate your own version control tool with SpyGlass.
Select the Enable Version Control check box from the Version Control
page to display the version control options as shown below:

The Menu Bar
You can set the following options in the Version Control page:
• Enable Version Control
Use this option to disable the version control tool.
• Run Version Control Command before invoking the file editor
Use this option to specify the version control command that should
be executed before editing a file. Select a command that you want to
execute from the drop-down list, before invoking the file editor.
NOTE: Only the commands that have been specified in the Version Control
Commands section are displayed in the drop-down list.
• Show Version Control command status of severity in popup dialog
Use this option to view the success result of the version control
command that you have executed for a file defined on the File View
Page.
You can select from the following available options:

• Error: Selecting this option displays an error in a pop dialog, if a

version control command is not executed successfully.
• All: Selecting this option displays all results related to the
execution of the version control commands in a popup dialog.
• Not Set: Selecting this option does not display the popup dialog.
• Execute Version Control Command in new console
Use this option to execute the version control command on a new
console window as shown below:
• Environment Variables
Use this section to add, modify, or delete the system configuration
variables related to the version control tool that you are using.
To add a variable, click ( ). The Add a Variable dialog appears
as shown below:
Enter the variable name in the Variable field and the value of the

The Menu Bar
variable in the Value field. Click OK to add the variable.

You can also modify an already specified variable. To do so, select
the variable that you want to modify in the Environment Variables
section and click ( ). Modify the variable in the Modify System
Variable dialog that appears and click OK to save the new variable
setting.
To delete a variable, select the variable and click ( ).
• Version Control Commands
Use this section to add, modify, or delete the commands related to
the version control tool that you are using.
To add a command, click ( ). The Add a Menu Label dialog
appears as shown below:
Add a label for the command name in the Menu Label text field and
the version control command in the Command field. Click OK to add
the command.
You can also modify an already specified command. To do so, select
the command that you want to modify in the Version Control
Commands section and click ( ). Modify the command in the
Modify System Variable dialog that appears and click OK to save the
new command setting.
To delete a command, select the command and click ( ).
Click the Restore Default button restore the default values of CVS,
which is the default version control tool used by SpyGlass.

Report Menu
When you click the Report menu, the following options appear:
• One item for each policy that was run and for which reports can be
generated
See the respective Rules Reference to know more about the policy
reports available.
• Item named Default that lists the standard SpyGlass reports
Selecting the corresponding menu option will open a Report window.
Report windows give the option of either saving the report as a file or
printing the report.
NOTE: All those reports that do not have any relevant information appear
disabled in the available list of reports. SpyGlass provides a tool-tip for such
disabled reports explaining the reason of not generating that report.
To find a string in the displayed report, use Find. The search can be
case-sensitive or case-insensitive, both forward and backward in the
file, and by regular expressions.
To print the displayed file, use Print.
NOTE: If the SpyGlass Design Environment is opened without a VDB loaded,
the Reports menu options can be directed to run on any VDB without actually
loading it into the SpyGlass Design Environment. First, select the report you
wish to run. Then, in the dialog that follows, select the VDB file on which to run
the selected report.
Report > Default > count

The count report lists the number of times SpyGlass found each type of
message. It is similar to the Report > Default > summary report but
also displays messages of rules you previously waived or excluded.

The Menu Bar
Report > Default > inline

The inline report has the RTL source file annotated with the messages
at the location where the messages were observed.
FIGURE 29. Example of inline Report
Report > Default > moresimple

The moresimple report is similar to the Report > Default > simple
report. However, it does not truncate long names and messages.
The moresimple report displays:
• ‘Alias’ of the rule (in the above example, no aliases were specified)
NOTE: An alias is a cross-reference to a standards document, such as the
Lint standard or in-house coding standard or guideline.
• Weight of the message
NOTE: The weight is a number assigned based on the severity of the rule
message. That is, higher the severity of the message, higher will be the

weight assigned. It is used when SpyGlass calculates Lint assessment of

your design.
• A message explaining why SpyGlass logged the message
NOTE: The alias, severity level, weight, and message are all contained in the
rule definition.
The messages in the moresimple report are sorted in the order of
Severity Class, Severity Label, Rule Name, File Name, and Line
Number.
Report > Default > moresimple_filesort

The moresimple_filesort report is similar to the existing moresimple report
except that the rule messages are sorted by the file name first and for a
given file, by their severity, weight, rule, and line number.
Report > Default > moresimple_rulesort

The moresimple_rulesort report is similar to the existing moresimple
report except that the rule messages are sorted by the rule name first
and for a given rule, by their file and line.
Report > Default > score

SpyGlass also has a built-in scoring system for code checks. The report
generator assigns a weight to each rule message based on the severity
of the message. The score report displays the score for a design as the
sum of the weights assigned to all the rule messages that are detected
during a SpyGlass Analysis run. The overall score is an indicator of the
relative quality of your design.
Report > Default > sgra_report

The SpyGlass Results Analyzer report (sgra_report) generates an

The Menu Bar
encapsulated file containing the source files and messages. See

SpyGlass Results Analyzer for more details.
Report > Default > sign_off

The sign_off report lists summary and detailed information about the
SpyGlass analysis run.
Report > Default > simple

The simple report truncates (shortens) long names and messages to fit
the report’s layout.
The simple report displays:
• Line number of the code where the corresponding rule violation
occurred
• Message explaining why SpyGlass logged the message
Note that the severity level and message are contained in the rule
definition.
Report > Default > summary

The Summary report displays a summary list of message counts by
each particular rule type along with the severity class and rule short
help.
The rules are grouped based on the default grouping criteria. Within
each group, the data is first sorted by the severity class and then by rule
name.

Report > Default > waiver

A waiver report is generated whenever one or more rules are waived
during a SpyGlass analysis run. This report lists all messages of waived
rules.
Help Menu
When you click the Help menu, the Help options appear.
Help > On-line Manuals

This menu option invokes The spydocviewer utility that displays the
SpyGlass printable (PDF) documentation in a tree format for easy
access. In addition, the Atrenta Standard Rule-Primitive documentation
(in text format) is also accessible.
By default, the spydocviewer utility searches for the acroread or
xpdf executables in your machine’s path for displaying the PDF files.
Use the Tools > Preferences > Misc Page > Specify pdf file reader option
or the new SG_PDF_VIEWER environment variable to set your PDF
viewer.
You can also use the F1 key on your keyboard to invoke the on-line
manuals.
Help > On-line Help

This menu option invokes The spyhelpviewer utility to display the
SpyGlass Documentation in HTML format.
By default, the spyhelpviewer utility searches for the netscape
executable in your machine’s path for displaying the PDF files. Use the
Tools > Preferences > Misc Page > Specify HTML Browser program
option or the new SG_HTML_BROWSER environment variable to set

The Menu Bar
your HTML Browser.
Help > Shortcut Keys

This menu option invokes the Shortcut Keys window that contains the
names of the shortcut keys combination used to open different
SpyGlass windows.
You can also use the <Ctrl>+F1 key combination on your keyboard to
invoke the Shortcut Keys window.
Help > Icons Quick Reference

This menu option invokes the Icons Quick Reference window that
contains the icons used in the SpyGlass Design Environment.

Help > About SpyGlass...

This menu option is used to display the SpyGlass version number and
Atrenta Contact information.
When you select this menu option, the About SpyGlass window will
open.

The Toolbar
Click Close to close this window.
The Toolbar
The SpyGlass Design Environment toolbar is primarily used after you
have set up the SpyGlass Design Environment (using the menu bar
options) and are ready to run SpyGlass analysis (or have already run
the analysis). From the toolbar, you can select a predefined-setup,
begin an analysis run, open the schematic windows, navigate through
the source files, and set waivers.
The SpyGlass Design Environment toolbar functions have been

categorized into the following menu and buttons (from left to right):
• Methodology/Template Selector
• Run Options Button
• Policies/Rules/Parameters Button
• Incremental Mode Button

• VDB File Button

• Run/Stop Toggle Button
• Modular Schematic View Button
• Incremental Schematic (IS) View Button
• Waveform Viewer Button
• The Waiver Button
• Preferences Button
• Find in Source Button
• Next Message Button
You can customize the SpyGlass Design Environment toolbar based on
your requirements. For example, you can show or hide the toolbar
buttons corresponding to the File, Edit, Run, Setup, and Tools menus. To
do this, right-click on the SpyGlass Design Environment toolbar and
select the menu for which you want to hide the toolbar buttons.
You can also hide the SpyGlass Design Environment toolbar by

selecting the Hide Toolbars menu option from the context menu.
If a toolbar is hidden, then you can display the toolbar by right-clicking
on the menu bar and selecting the Show Toolbars option from the
context menu. In addition, you can also display the hidden toolbar by
selecting the Show Toolbars option from the Misc Page of the
Preferences window.

The Toolbar
Methodology/Template Selector
You can select multiple templates to be run on your design. By default,
the following templates are selected:
• The templates specified using the -template command-line
option
• Or, the default template set using the DEFAULT_TEMPLATE
configuration file setting
• Or the templates used if you have opened an existing Violation
database file that was created using templates
The Methodology/Template selection section of the toolbar includes
the following:
• The View Selected Templates List text-box that displays the number
of templates currently selected and the name(s) of the currently
selected template. Clicking this templates list text-box displays a
balloon window with a short description about each of the currently
selected methodologies/templates.
• The Select Template(s) icon ( ) that is used to select the templates.
Refer to the Setup > Templates... section for more details.
VDB File Button

The VDB File button ( ) is used to open an existing Violation
Database file (VDB) file. Refer to the File > Open VDB File section for
more details.
NOTE: This button is hidden by default.
Run Options Button

The Run Options button ( )is used to invoke the Options window.
Refer to the Setup > Run Options... section for more details.

Policies/Rules/Parameters Button
The Policies/Rules/Parameters button ( ) is used to invoke the Rule/
Parameters window. Refer to the Setup > Policies/Rules/Parameters...
section for more details.
NOTE: The Policies/Rules/Parameters button is hidden by default.
Run/Stop Toggle Button

The Run/Stop toggle button is used to run and stop the SpyGlass
analysis. When SpyGlass design analysis is not running, the Run/Stop
toggle button is in the Run state ( ). During SpyGlass design analysis,
the Run/Stop toggle button changes to the Stop state ( ).
NOTE: In this document, the Run state of the Run/Stop toggle button will be
referred as “Run Button” and the Stop state will be referred as “Stop Button”.
Run Button
The Run button ( ) is used to run the SpyGlass analysis.
NOTE: Clicking the Run button is equivalent to running the SpyGlass analysis
using the Run > Analysis menu option.
When you click this button, the SpyGlass Design Environment starts an
analysis run with parameters that you have set up. You can view the
SpyGlass status using the Session Log Page in the Message window.
If you have not specified any source files, the SpyGlass Design
Environment will prompt you for them before it will run. Additionally,
if you have not specified any policies, the SpyGlass Design
Environment will use the lint, openmore, and morelint policies for its
run.
will check to see if a Violation Database file already exists with the
current name. If a Violation Database file with the current name
already exists, or you have not chosen a name for the Violation

The Toolbar
Database file, the SpyGlass Design Environment will prompt you to

name your Violation Database file.
NOTE: If the name of the Violation Database file is spyglass.vdb, then the
SpyGlass Design Environment will not prompt you for the Violation Database
name and start the analysis.
The SpyGlass Design Environment closes any open report file
windows when you start a new SpyGlass analysis run.
Stop Button
The Stop button ( ) is used to stop SpyGlass analysis run (initiated by
the Run Button or the Run > Analysis menu option).
The stop button is available only when a SpyGlass analysis is running.
When you click the stop button, the SpyGlass analysis is aborted and
the following message is printed to the Session Log Page of The
Message Window:
SPYGLASS Execution Stopped by User
As the SpyGlass analysis was not completed, the Violation Database
file generated till now may not have the complete or usable
information. Thus, you are asked:
Click Yes to load the Violation Database as it is. Clicking the No button
does not load the Violation Database.
Incremental Mode Button

This button ( ) is used to set the Incremental Mode option.
This option is useful if you want to compare the results (messages) of
two different SpyGlass runs.

In some situations, you may want to compare the analysis results

(messages) that are generated before and after some changes were
made to the design. For example, after making certain changes to the
design, you may want to check if these changes cause some new
violation message to appear, which were not present before the changes
were made.
When the Incremental Mode option is set, SpyGlass compares the
results of the current SpyGlass run against the results of a previous
SpyGlass run (which could be a previous run in the current session of
SpyGlass or an isolated run previously saved in some other area by
same/different user).
After the analysis is done with the Incremental Mode option set, the
violation messages in the Message Tree are categorized into:
• New Messages
These are the additional violation messages that were not reported in
the previous run but have been reported in the current run.
• PreExisting Messages
These are the violation messages that were reported in the previous
run as well as the current run.
If the Incremental Mode is set and there is no previous Violation
Database file (of an earlier SpyGlass run) present in the SpyGlass
working directory, then an error message is displayed.
You can also specify the previous Violation Database file (considered
as the reference file for Incremental Mode) that is present in a directory
other than the current SpyGlass Working directory. To do so, click the
Specify reference vdb file for incremental mode icon ( ) and browse
through the directory structure to open the reference Violation
Database file. Then, run the SpyGlass analysis again.
NOTE: The Incremental Mode button is hidden by default.

The Toolbar
Modular Schematic View Button

This button ( ) is used to open the Modular Schematic window.
NOTE: The Modular Schematic view button is available only if the schematic
information is available for the current set of source design files.
When you click this button, the Modular Schematic window will open,
and display the schematic of the given source file. No schematic will be
shown if SpyGlass has not been run to generate a Violation Database
file. See The Modular Schematic Window for more information on the
Modular Schematic window.
Incremental Schematic (IS) View Button

This button ( ) is used to open the Incremental Schematic window.
NOTE: The Incremental Schematic view button is available only if the
schematic information is available for the current set of source design files.
When you click this button, the Incremental Schematic window will
open. See The Incremental Schematic Window for more information on
the Incremental Schematic window.
Waveform Viewer Button

This button ( ) is used to open the SpyGlass Waveform Viewer
window.
This button is enabled only when a rule message with associated
waveform is selected (indicated by the waveform icon ( ) prefixed to
the rule message).
See the SpyGlass Auto_Verify Rules Reference for more details.

The Waiver Button

This ( ) button is used to access the Waivers Window that is also
invoked from the Tools > Waiver Editor menu option.
Preferences Button
The Preferences button ( ) is used to invoke the Preferences window.
Refer to the Tools > Preferences section for more details.
Find in Source Button

This button is used to search for source files, files in the Session Log
page, File Tree, Design Tree, Constraints Tree, and Message Tree.
When you enter the search string in the Find String text box and click
this button a drop-down menu appears that lists all the available
options. For more information on the various options, refer to the Edit
> Find section.
Next Message Button

This button is used to find the next occurrence of the search string.
The Status Bar

The status bar at the bottom of the SpyGlass Design Environment is as
shown below:

The Status Bar
Category and file name of

the file currently displayed
Progress Indicator Language in the Source view
Violation Database Total count of

File Name messages found
The status bar displays the following information:

• The Progress Indicator while performing major tasks
• The current language selection
• The name of the current Violation Database file
• The total number of messages in the Violation Database file if
SpyGlass analysis has already been run on the source files
• The currently displayed file in the Source view along with the file
category (RTL/Constraints/LIB)

The SpyGlass Design
Environment Windows
Overview
The SpyGlass Design Environment screen is organized into two
toolbars (the menu bar and the toolbar discussed in the previous
chapter) and three windows (the File/Design/Constraints/Instances
window, the Source window, the Message window, and the HDL
Navigator window). Additional windows (the Modular Schematic
window, the Incremental Schematic window, and the Legend window)
can also be opened, but they are not automatically opened with the
The File/Design/Constraints/Instances Window

The SpyGlass Design Environment File/Design/Constraints/Instances
window is used to display source and library file hierarchy (in the File
view page), the design hierarchy (in the Design view page), the
SpyGlass Design Constraints files and Synopsys Design Constraints
files (in the Constraints view page), and design unit instances (in the

Instances view page).

The File/Design/Constraints/Instances window shows the files and
design units using the following scheme:
Object Type Icon
Files
Source files
Library files
SpyGlass Design Constraints Files
File that is yet to be analyzed (just added or modified since last

analysis)
Design Units
Design units that are not synthesized
Synthesized design units not at leaf level
Synthesized leaf-level designs unit witl no RTL information

(blackboxes)
Unsynthesized leaf-level design units
Design units not at leaf level
Leaf-level design units with full RTL information
Leaf-level design units with no RTL information (blackboxes)
Leaf-level design units that are partially processed due to

pragma specification (like translate on or translate off)

The SpyGlass Design Environment Windows
Object Type Icon

Leaf-level design units that are stopped
Module that has been set as a stop module
Module that has been set as a top module
Leaf-level design units in gates library
Leaf-level design unit with no definition
Leaf-level design units from the SpyGlass-compiled gate library
Design file that has been set as a stop file
Parent directory that has been set as a stop directory
NOTE: For other related icons, refer to the Help > Icons Quick Reference
section.
File View Page

The File view page is the File Hierarchy Browser that displays the list
of source and library files that SpyGlass will analyze with this profile.

FIGURE 30. File View Page of the File/Design/Constraints/Instances Window
Source files and library files are shown in different groups.

Before SpyGlass analysis is run, the File View page shows only file
names in Red color (indicating that the file has not been analyzed since
last save). After SpyGlass analysis has been run, the File view page
shows file names in Black color (indicating that the file has been
analyzed since last save) and also shows design units found in each file
along with the number of messages found in each design unit and each
file.
In addition, the File View page lists all the precompiled files under the
Precompiled Files node. Under this note, the precompiled files displayed
in a hierarchical form based on their logical library names. The
Precompiled Files node is generated in the following scenarios:
• A .vdb file having information about the precompiled files is loaded.
• Any precompiled mapping information has been specified in the
Precompile Mapping tab of the Library... dialog.
The precompiled files that are used in the current SpyGlass run are
shown as ( ). However, the precompiled files that are not used in the
current SpyGlass run but are a part of the -libhdlfile specification
are shown in ( ). In addition, precompiled files that are encrypted are

shown in ( ).
You have the option to add a remove a precompiled file. To do this,
right-click a file and select the Add/Remove Precompile File context
menu option. The Verilog/VHDL Library window appears. You can
add or remove a precompile on the Precompile File Mapping tab of the
VHDL/Verilog Library window.
File Names in the File View Page

The SpyGlass Design Environment displays the source and library file
names based on their position relative to the current working directory
at the time the file was added.
If you have added files located below the current working directory in
the directory tree (call this Scenario1), then the files are listed in the
File view page by their position in the directory path relative to the
position of the Violation Database file. For example, if the current
working directory’s full path name is /SPY/verilog/version1/ and the file
to be analyzed has the full path name /SPY/verilog/version1/sourcefiles/
chip.v, then the File view page entry will be sourcefiles/chip.v.
On the other hand, if you have added files located above the current
working directory in the directory tree (call this Scenario2), then the
files are listed in the File view page by their position in the full
directory path position. For example, if the current working directory’s
full path name is /SPY/verilog/version1/sourcefiles/analysis1/ and the file to
be analyzed has the full path name /SPY/verilog/version1/sourcefiles/chip.v,
then the File view page entry will be: /SPY/verilog/version1/sourcefiles/
chip.v
This difference in two scenarios will become relevant in the following
predicaments:
In Scenario1, suppose that the working directory (/SPY/verilog/version1/)
does not have a spyglass.vdb file. If you launch the SpyGlass Design
Environment from the working directory using the following

command:
spyglass -verilog
Then, you add the /SPY/verilog/version1/sourcefiles/chip.v file as a source
file, once you set up the rest of the SpyGlass Design Environment
options (such as policy and rule selections), you are ready to run the
SpyGlass analysis.
Suppose, that you DO NOT run the analysis at this point in time.
Instead, you save the setup that you have made in a profile file (such as
testcase1.spp) for analysis at a future time (such as later that night).
In Scenario2, suppose that the working directory (/SPY/verilog/version1/
sourcefiles/analysis1/) does not have a spyglass.vdb file. If you launch the
SpyGlass Design Environment from the working directory using the
following command:
spyglass -verilog
Then, you add the /SPY/verilog/version1/sourcefiles/chip.v file as a source
file, once you set up the rest of the SpyGlass Design Environment
options (such as policy and rule selections), you are ready to run the
SpyGlass analysis.
Suppose, again, that you DO NOT run the analysis at this point in time.
Instead, you save the setup that you have made in a profile file (such as
testcase2.spp) for analysis at a future time (such as later that night).
Now, the predicament occurs when the current working directory’s full
path name has changed. In this case, if someone were to rename the /
SPY/verilog/version1 directory to /SPY/verilog/version2. If everything else was
left the same, then testcase1.spp from Scenario1 would still be valid
while testcase2.spp from Scenario2 would be unable to find the chip.v
file.
The reason for this result is the difference in how the source files are
recorded. With the relative relationship that the profile file and the
source files maintain in Scenario1, changing the path does not affect
the relationship of the files. However, with Scenario2, there is no

relative relationship, and a change in the full directory path will cause
the profile file to look for the source files in a directory that no longer
contains them (or even exists).
Searching Files
To search for a file in the File view page, right-click anywhere in the
File view page and select Find File... or choose Edit > Find. The Find
dialog appears. Select the File Tree option from the Find In pull-down
list, enter a search string and click Search. The first file whose name
contains the search string, is highlighted in the File view page.
Continue clicking Search to find more file names containing the search
string.
Adding Files
To add a file in the File page, right-click a node and select the Add file
option from the context menu. The Source dialog appears as shown
below:

Type the file name in the File Name text field and click Add.
Alternatively, browse to the directory that contains the file.
Click OK after you have added the required file(s).
Refer to the Setup > Source... section for more details.
Editing Files
To edit a file by selecting it in the File view page, right-click the file
name and select Edit File. The SpyGlass Design Environment launches
your text editing program of choice, as defined by the Specify Editor
program setting in the Misc Page of the Tools > Preferences menu
option and displays the selected file. If you have not specified a text
editor in this setting, the text editor pointed to by the EDITOR
environment variable is invoked. Otherwise, the SpyGlass Design
Environment attempts to invoke the commonly-used text editor of your
operating platform.

If you edit and save a source file listed in the File view page, the file
name is displayed in Red color to indicate that the file has been
modified since last analysis run.
Removing Files
To remove a file from the File view page, select the file and press the
<Delete> key on the keyboard or right-click the file name and select
Remove File.
The ‘deleted’ file is only removed from the File view page; it is not
physically deleted from the hard disk. Also, the messages for the
‘deleted’ file will remain displayed till you run the SpyGlass Analysis
again.
Viewing Files
Double-click a file name in the File view page and the corresponding
file is displayed in The Source Window.
Double-click a design unit name in the File view page and the file
containing the design unit is displayed in The Source Window with the
cursor at the first line of the design unit description (commented lines
at the beginning of the file are skipped).
Waiving Rule Messages by File

To waive rule messages by source files, right-click the file name and
select Waive Rules By File... from the context menu.
The Create Waiver window appears:

Select the Rule groups (using the pull-down list) or enter the rule
names for which you want to waive rule messages for the selected
source file.
Clicking the More Options button displays additional settings as shown
below:
Here, you can specify additional waiver settings, such as line/range,

exceptions, severity, weight, etc.You can also enter a comment for the
waiver in the Comment field.
You can use regular expressions while entering the names. You can also

invoke the help related to the use of regular expressions by clicking the
( ) button. When you click this button, the help related to the use of
regular expressions appears in a pdf format.
On completion, click Ok.
Setting Top Modules

To set a module as top module, right-click the module name in the File
view page and select Set Top Module... from the context menu. The Set
Module Top window appears with the name of the module displayed in
the Top Module field.
Click Ok to set the module as top module. The specified module is

prefixed with the icon to indicate it as the top module.
You can also set a module as the top module by entering the module
name in the top-level modules/entities field in the Verilog Tab or VHDL
However, if a top module already exists in the design hierarchy and you
try to set another module as the top module (by using any of the two
methods described above), a warning message is displayed to indicate
that a top module already exists with a higher/lower priority. Then, you
can set the new module as the top module or cancel the action.
NOTE: To remove a module as top module, right-click the module name in the
Design view page and select Remove Top Module... from the context menu.
You can trace top module setting/removing GUI operations. The details
of these operations are logged in the spyglass_cmdline_debug.log file.
For details refer to section Files Generated to Support Special
Features.

Setting Stop Modules

To set a module as stop module, right-click the module name in the File
view page and select Set Stop Module... from the context menu. The Set
Module Stop window appears with the name of the module displayed in
the Stop Module field.
Click Ok to set the module as stop module. The specified module is

prefixed with the icon to indicate it as the stop module.
NOTE: To remove a module as stop module, right-click the module name in the
File view page and select Remove Stop Module... from the context menu.
You can trace stop module setting/removing GUI operations. The
details of these operations are logged in the spyglass_cmdline_debug.log
file. For details refer to section Files Generated to Support Special
Features.
Setting Stop Files/Directories

To set the currently selected design file in the File view page as a stop
file, right-click the file name and select Stop > File(s) from the context
menu. The stop file is indicated with the stop file icon ( ) prefixed to
the design file name.
To set the parent directory of the currently selected design file in the
File view page as a stop directory, right-click the file name and select
Stop > Dir(s) from the context menu. The stop directory icon ( ) is
prefixed to the file name indicating that its parent directory is a stop
directory and all the design files within the parent directory are also
treated as stop files.
To reset a stop file as normal design file, right-click the file and select

Remove Stop > File(s) from the context menu. Similarly, to reset a stop
directory as normal directory, right-click a design file of the parent stop
directory and select Remove Stop > Dir(s) from the context menu. All the
design files within the parent directory will also be reset as normal
files.
You can view the collective list of all the stop files/directories by right-
clicking on any file in the File view page and selecting the
Stop > File(s) & Dir(s) or Remove Stop > File(s) & Dir(s) options from the
context menu. Then, the Stop File(s)/Dir(s) dialog appears as follows:
The top section of this dialog displays the list of files (in the File List
tab) and directories in the (Dir List tab). The bottom section of this
dialog displays the list of Stop Files (indicated by ) and Stop Dirs
(indicated by ).

To specify a file as Stop File, select the check-box for the file from the
list of files displayed in the File List tab. The specified file is added to
the list of Stop Files in the bottom section. To remove a file from the
list of Stop Files, simply clear the check-box for the file and the file is
removed from the list of Stop Files.
To specify a directory as Stop Dir, select the directory from the list of
directories displayed in the Dir List tab and click the Add Dir button.
The specified directory is added to the list of Stop Dirs in the bottom
section. To remove a directory from the list of Stop Dirs, select the
directory in the Stop Dirs list and click the Delete Dir button. The
selected directory is removed from the list of Stop Dirs.
You can also specify the above settings for stop files/directories using
the List of stop file(s)(-stopfile) & stop dir(s)(-stopdir) option in the Other Tab
of the Setup > Run Options... menu option.
NOTE: When you try to reset a stop file whose parent directory is marked as
stop directory, then you are prompted to confirm if you want to reset the parent
directory as normal directory. If you confirm to do so, then the parent directory
(and consequently all the files within that directory) are reset as normal files.
Rearranging Files
You can rearrange the source files shown in the File view page by
dragging and dropping files. Click on a file name and drag it up or
down (keeping the mouse button pressed). The mouse cursor changes
to indicate drag/drop operation. The name of source file being moved is
highlighted in Red color. As you move up and down the target file is
highlighted in Blue color. (The selected file is always moved to be
under the target file.) When you are at the desired location, release the
mouse button to drop the file. The source file view is updated.
This feature is especially useful for arranging VHDL files where the
order of processing is important.

Performing Version Control

You can configure a version control tool to ensure that you are working
on the latest HDL file. In addition, version control ensures that the
changes that you make in a file are not lost while modifying a design.
To enable version control, you need to configure a version control tool
in SpyGlass. The version control tool can be configured in the Version
Control Page of the Tools > Preferences dialog. You can also use the
Configure sub-menu option of the Tools > Version Control menu option
to configure the required version control tool.
Once version control is enabled, the following options are displayed
when you right-click a file in the File View page.
• Check In
Use this option to place the file that you have edited in the version
control tool.
• Check Out
Use this option to get a file from the version control tool.
• Get Latest
Use this option to get the latest version of a file from the version
control tool.
NOTE: The above mentioned commands are the commands related to CVS,
which is the is the default version control tool used by SpyGlass. However, you
can add/modify the existing commands based on your requirements. In
addition, you can also integrate your own version control tool with SpyGlass.
Design View Page

NOTE: The Design View Page is enabled only when SpyGlass is run or a .vdb
file is loaded.
The Design view page is the Design Hierarchy Browser that displays

the modules and instances in each source and library file that you are
analyzing with the current profile. This page will remain blank until
after the SpyGlass analysis has been completed or a valid Violation
Database file is loaded.
FIGURE 31. Design View Page of the File/Design/Constraints/Instances Window
The design hierarchy displays the multiple layers and dependencies of

the modules that you have analyzed using SpyGlass through a
hierarchical tree. Top-level modules are displayed as either root-level
modules or leaf-level modules, depicted as yellow folders in the
hierarchical tree.
Root-level modules are modules that contain “children” modules
(instances of other modules). A child module can contain leaf-level
modules, black-box modules, or children of its own.
Leaf-level modules are modules that contain no children. Leaf-level
modules can be top-level modules, or children of other modules
(depicted as white file icons).
Unsynthesizeable modules are the modules that contain coded behavior
and descriptions, but cannot be synthesized. In the design hierarchy,
root-level unsynthesizeable modules are depicted as green folders and
leaf-level unsynthesizeable modules are depicted as green files.
Black-box modules, depicted as black squares with a white “X” in the
hierarchical tree, are modules that contain no coded behavior or

description. These modules are usually children of other modules.

The design modules that are encrypted are shown in ( ).
Searching Modules
To search for a module in the Design view page, right-click anywhere
in the Design view page and select Find Module... or choose Edit > Find.
This opens the Find dialog. Select the Design Tree option from the Find In
pull-down menu, enter a search string and click Search. The first
module whose name contains the search string, is highlighted in the
Design view page. Continue clicking Search to find more module
names containing the search string.
Viewing Modules
Double-click a module name in the Design view page and the source
file containing the module is displayed in The Source Window with the
first line of the module description highlighted (initial commented lines
are skipped). Similarly, the corresponding gate is also highlighted in
The Modular Schematic Window.
Viewing List of Instances

To view the list of instances in the design, right-click the design unit
name in the Design view page and select Show Instance List... from the
context menu. The Instances window is displayed, as shown below:

NOTE: If the list of instances is long and does not fit in this window, you can
resize the window by right-clicking anywhere in the window and selecting
Configure page Size... option from the context menu.
In the Instances window, the instances are listed along with the full
hierarchical path of the instance. You can view the properties of the
instances listed here by right-clicking on the instance and selecting
Properties... from the context menu. The Instance List: Properties
window is displayed, as shown below:
Here, the instance name, the master module name, and the full
hierarchical path of the instance are displayed. The contents of this
window can be individually copied (using the right-click context menu
option or <Ctrl>+<C> key combination) and pasted at a different
location.
The instances that are encrypted are shown in ( ).
Viewing Blackbox Information

SpyGlass enables you to view the information about all the blackboxes
in the currently loaded design in a single window. To view this
information, right-click any blackbox module displayed in the Design
view page (indicated by black file icon ) and select
Show BlackBox Info... context menu option. The BlackBox Viewer

Here, comprehensive information about all the blackbox modules in the

currently loaded design is displayed in a tabular form. Each row in this
table represents the information about a blackbox module. The
information in each row is categorized in the following columns:
• Module
Displays the name of the blackbox module
• Cause
Displays the cause of the module being considered as a blackbox
• Remedy
Displays the suggested remedy for converting the blackbox module
to a regular module
• File
Displays the design file name in which the blackbox module is
present
• Line
Displays the line number in the design file where the blackbox
module is present
The information in the above columns can be sorted in ascending or
descending order by clicking the header of a column. Moreover,

information in each cell of the above table can be copied to the

clipboard by right-clicking the cell and selecting Copy from the context
menu options. The copied information can then be pasted in any other
application or location.
Setting the Sort Order

You can set the sorting order for the information displayed in each
column of the BlackBox Viewer window. To do so, right-click
anywhere in the window and select Set Sorting Order... from the context
menu (or click the Set sort order icon on the toolbar of the BlackBox
Viewer window). Then, the Set Sort Order window is displayed, as
shown below:
Here, all the columns that are currently displayed are listed along with
the sorting order for each column (by default, each column is sorted in
ascending order). You can set the sorting order for columns in the Black
Box Viewer window by selecting the check box for the columns and
changing the sorting order from the corresponding Order pull-down
list. Then, the information in the Black Box Viewer window will be

sorted for the columns (and their order) selected here. You can also
change (increase or decrease) the priority of the columns for sorting the
information within the entire table. To do so, select the entire row for
the column for which you want to change the priority and use the
move-up ( ) or move-down ( ) arrow to increase or decrease the
priority for the selected column. Then, the information within the
columns of the Black Box Viewer window will be sorted as per the
priority set for the columns. For example, if you want the information
in the Black Box Viewer window to be first sorted by Line, then by
Cause, and last by Remedy, then:
1. Select the check boxes for the Line, Cause, and Remedy columns.
2. Select the entire row for the Line column.
3. Click the move-up arrow as many times as required to place the row
for the Line column at the top level.
4. Similarly, change the priority for the Cause column and the Remedy
column by selecting the corresponding rows and using the move-up
or move-down arrows to place these columns in the required priority
(Line > Cause > Remedy).
When the sorting order is set as per your requirement, click Ok to
confirm. The information in the Black Box Viewer window will be
rearranged according to new sorting order.
Configuring the Columns

You can configure the display of the columns in the Black Box Viewer
window to show/hide columns and rearrange the placement of the
columns. To do so, right-click anywhere in the Black Box Viewer
window and select Configure Columns... from the context menu (or click
the Configure Columns icon on the toolbar of the BlackBox Viewer
window). The Give Column Order window appears, as shown below:

Here, you can set which columns should be visible/hidden by moving

the column names between the Hidden Columns and Visible Columns
section. Additionally, you can also rearrange the placement of the
displayed columns by selecting the column names in the Visible
Columns section and using the move-up or move-down arrows.
Setting Filters You can set filters on each column to view selective information in the
Black Box Viewer window. To filter the information displayed in a
column, right-click anywhere in the column and from the context
menu, select the required entry (that you want to view) from the list of
available entries for the column (by default, All is selected to display all
the entries for that column). You can also set custom filters for each
column. To do so, select the Custom... option from the right-click
context menu for the column. The Custom Filter window for the column
is displayed, as shown below:

Here, you can set filters for the selected column. To do so, select the
filter criteria (such as “Equals”, “Greater than”, and so on) from the
Filter Criteria pull-down list. Then, select the value for the filter criteria
from the Value pull-down list, which contains all the possible values for
that column. You can also add more than one filter on a column by
using the More button at the top-right corner of the Custom Filter
window. To delete a filter, click the delete icon ( ) for that particular
filter. When more than one filter is used, you can specify whether to
match any of the created filters or match all of the created filters (use
the corresponding check boxes at the top of the Custom Filter window).
When the filters are defined, click Ok to confirm. The defined filters
will be applied to the information in the Black Box Viewer window.
NOTE: You can clear all the applied filters by clicking the Clear all applied
filters icon ( ).
Viewing Instances of Blackbox

To view the instances of a blackbox module, right-click the row for the

blackbox module in the Black Box Viewer window and select Show
Instance List... from the context menu. The Instances window appears, as
shown below:
Here, all the instances of the selected blackbox module are listed along
with the full hierarchical path.
NOTE: If the list of instances is long and does not fit in this window, you can
resize the window by right-clicking anywhere in the window and selecting
Configure page Size... option from the context menu.
You can view the properties of the blackbox instances listed here by
right-clicking on the instance and selecting Properties... from the context
menu. The Instance List: Properties window is displayed, as shown
below:


location.
Cross-probing to Other SDE Windows

Each row in the Black Box Viewer window represents information
about the blackboxes in the currently loaded design. You can also
cross-probe other SDE windows from the Black Box Viewer window.
When you click a blackbox module name in the Black Box Viewer
window, the following probes are created in other SDE windows:
• The selected blackbox module is highlighted in the Design View
Page of the The File/Design/Constraints/Instances Window.
• The source code of the selected blackbox module is highlighted in
the The Source Window.
• The violation message corresponding to the selected blackbox
module is highlighted in the Messages: Msg Tree Page, File Page,
and Module Page of the The Message Window.
• The schematic information (if available) for the selected blackbox is
updated in The Modular Schematic Window and The Incremental
Schematic Window.
Waiving Rule Messages by Module

To waive messages by modules, right-click the module name and select
Waive Rules by Module... from the context menu.
The Create Waiver dialog is displayed with the selected module name
displayed in the Module field, as shown below:

Select the Rule groups or enter the rule names for which you want to
waive rule messages for the selected module.
below:

exceptions, severity, weight, etc. You can also enter a comment for the
You can use regular expressions while entering the names. You can also
invoke the help related to the use of regular expressions by clicking the

( ) button. When you click this button, the help related to the use of
regular expressions appears in a pdf format.
Waiving Rule Messages by IP

To waive messages by IP, right-click the module name and select Waive
Rules by IP... from the context menu.
The Create Waiver dialog is displayed with the selected IP name
displayed in the IP field, as shown below:
Select the Rule groups or enter the rule names for which you want to
waive rule messages for the selected IP.
below:


exceptions, severity, weight, etc. You can also enter a comment for the
You can use regular expressions while entering rule names. You can
also invoke the help related to the use of regular expressions by
clicking the ( ) button. When you click this button, the help related to
the use of regular expressions appears in a pdf format.
Setting Top Modules

To set a module as top module, right-click the module name in the
Design view page and select Set Top Module... from the context menu.
The Set Module Top window appears with the name of the module
displayed in the Top Module field.

Click Ok to set the module as top module. The specified module is

prefixed with the icon to indicate it as the top module.
You can also set a module as the top module by entering the module
name in the top-level modules/entities field in the Verilog Tab or VHDL
However, if a top module already exists in the design hierarchy and you
try to set another module as the top module (by using any of the two
methods described above), a warning message is displayed to indicate
that a top module already exists with a higher/lower priority. Then, you
can set the new module as the top module or cancel the action.
NOTE: To remove a module as top module, right-click the module name in the
Design view page and select Remove Top Module... from the context menu.
Setting Stop Modules

To set a module as stop module, right-click the module name in the
Design view page and select Set Stop Module... from the context menu.
The Set Module Stop window appears with the name of the module
displayed in the Stop Module field.
Click Ok to set the module as stop module. The specified module is

prefixed with the icon to indicate it as the stop module.
NOTE: To remove a module as stop module, right-click the module name in the
Design view page and select Remove Stop Module... from the context menu.

Viewing Message Count

To view the violation message count, right-click the module name in
the Design view page and select Tip : Message Count from the context
menu. The Message count for each module pop appears displaying the
violation count for the parent module and its child modules.
Constraints View Page

NOTE: The Constraints View Page is enabled only when SpyGlass is run or a
.vdb file is loaded.
The Constraints view page displays all the SGDC (SpyGlass Design
Constraints) files, CPF and UPF files that you have included for
analyzing you designs with the current profile.
FIGURE 32. Constraints View Page of the File/Design/Constraints/Instances Window

All the files in the Constraints view are listed under appropriate
categories. For example, all the SGDC files included for design
analysis in the current SpyGlass run are listed under the SGDC Files
category. Similarly, all the CPF and UPF files are listed under the CPF
Files and UPF Files categories, respectively.
After SpyGlass analysis is run, the SGDC file names in the Constraints
view page are appended with the number of rule messages generated (if
any) for each SGDC file.
Searching Files
To search for an SGDC file in the Constraints view page, right-click
anywhere in the Constraints view page and select Find File... from the
context menu or choose Edit > Find. This opens the Find dialog. Select
the Constraints Tree option from the Find In pull-down menu, enter a
search string and click Search. The first SGDC file whose name
contains the search string, is highlighted in the Constraints view page.
Continue clicking Search to find more SDGC file names containing the
search string.
Viewing Constraints Files

Double-click a constraints file name in the Constraints view page and
the corresponding file is displayed in The Source Window with the
cursor at the first line of the constraints file.
Adding Existing Constraints Files

To add an SGDC file, right-click anywhere in the Constraints view
page and select Add file... from the context menu. The Open dialog
appears. Enter the name of the SGDC file or browse your directory
structure to select the SGDC file and then click Open. The specified
SGDC file is added to the list of SGDC files in the Constraints view
page.

Creating New Constraints Files

To create a new SGDC file, right-click anywhere in the Constraints
view page and select New file... from the context menu. The Create new
file dialog appears. Enter a name of the new SGDC file and click OK. A
new SGDC file with the specified name is added to the list of SGDC
files in the Constraints view page (the file is also saved in your current
working directory). You can then edit this new constraints file (see
Editing Constraints Files section below) to specify SpyGlass Design
Constraints for your design analysis.
Saving Constraints Files

To save an SGDC file displayed in the Constraints view page at a
different location, select the file, right-click, and select Save As... from
the context menu. In the resultant Save As dialog, specify a new name
and location for the file and click the Save button.
NOTE: If you specify a file name and location that already exists, then a
warning dialog is displayed that prompts you to confirm whether or not you
wish to overwrite the existing file.
Renaming Constraints Files

To rename an SGDC file displayed in the Constraints view page, select
the file, right-click, and select Rename from the context menu. In the
resultant Rename file dialog, specify the new file name and click the
OK button. The selected SGDC file is renamed and saved in the current
working directory with the new name.
Removing Constraints Files

To remove an SGDC file from the Constraints view page, select the file
and press the <Delete> key on the keyboard or right-click the file name
and select Remove File.

The ‘deleted’ file is only removed from the Constraints view page; it is
not physically deleted from the hard disk. Also, the messages for the
‘deleted’ file remain displayed in the Message window till the
SpyGlass Analysis is run again.
Editing Constraints Files

To edit an SGDC file displayed in the Constraints view page, right-
click the file name and select the Edit Constraints option from the context
menu. The SpyGlass Design Environment launches your text editing
program of choice, as defined by the Specify Editor program setting in the
Misc Page of the Tools > Preferences menu option and displays the
selected file. If you have not specified a text editor in this setting, the
text editor pointed to by the EDITOR environment variable is invoked.
Otherwise, the SpyGlass Design Environment attempts to invoke the
commonly-used text editor of your operating platform.
Waiving Rule Messages by File

To waive rule messages by a constraints file, right-click the SGDC file
name and select Waive Rules By File... from the context menu.
The Create Waiver window appears with the SGDC file name already
in the File field, as shown below:
Select the Rule groups (using the pull-down list) or enter the rule
names for which you want to waive rule messages for the selected
constraints file.


below:

exceptions, severity, weight, etc.
You can use regular expressions while entering rule names. You can
also enter a comment for the waiver in the Comment field.
Instances View Page

NOTE: The Instances View Page is enabled only when SpyGlass is run or a
.vdb file is loaded.
The Instance view page is the Instance Hierarchy Browser that displays

the design unit instances in each source and library file that you are
analyzing with the current profile. This page remains blank until after
the SpyGlass analysis has been completed or a valid Violation
Database file is loaded.
FIGURE 33. Instances View Page of the File/Design/Constraints/Instances Window
The instance hierarchy displays the multiple levels and dependencies of

the design unit instances that you have analyzed using SpyGlass
through a hierarchical tree. In the Instance view page, the first column
lists the names of the design unit instances, the second column displays
the module/design unit corresponding to the instances listed in the first
column, and the third column displays the Pagination of Instances for
the hierarchy levels that contain a number of instances which exceed
the current page size set for the Instances view page.
Top-level instances are displayed as either root-level instances or
leaf-level instances, depicted as yellow folders in the hierarchical tree.
Root-level instances are instances that contain “children” instances
(instances of other design units). A child instance can contain leaf-level
instances, instances of black-box modules, or children of its own.
Leaf-level instances are instances that contain no children. Leaf-level

instances can be top-level instances, or children of other design unit

instances (depicted as white file icons).
Unsynthesizeable design unit instances are the instances that contain
coded behavior and descriptions, but cannot be synthesized. In the
hierarchical tree, root-level Unsynthesizeable instances are depicted as
green folders and leaf-level Unsynthesizeable instances are depicted as
green files.
Instances of black-box modules, depicted with black file icons in the
hierarchical tree, are design unit instances that contain no coded
behavior or description.
By default, the Instances view page has a fixed focus in the SpyGlass
Design Environment and is docked as the Instances tab integrated with
the File/Design/Constraints/Instances window. However, you can
undock the Instances view page and view it as a floating window by
right-clicking anywhere in the Instances page and selecting the Undock
option from the context menu. Then, the Instances view page is
displayed in the Instance Browser floating window, as shown below:
When the Instances view page is undocked to display the Instance

Browser window, then the Show Instance Browser icon ( ) is added to

the toolbar of the SpyGlass Design Environment window. Clicking this

icon redisplays the Instance Browser window.
You can again dock the Instance Browser window integrated with the
File/Design/Constraints/Instances window by right-clicking anywhere
in the Instance Browser window and selecting the Dock Window option
from the context menu. If the Instance Browser window is explicitly
closed (using the close button of this window), then it is automatically
docked back with the File/Design/Constraints/Instances window.
NOTE: When the size of the Instance Browser window is reduced beyond a
certain limit, the Options button appears. Clicking this button displays the
Hier.Path, Case Insensitive, and RegExp options in a drop-down list.
Pagination of Instances
You can configure the page size for the Instances view page to set the
number of instances that are simultaneously displayed for each level in
the instance hierarchy. To do so, right-click anywhere in the Instances
view page and select the Configure Page Size... option from the context
menu. Set the required page size either by selecting a pre-defined size
from the Set Page Size pull-down list or by entering a number in the text
field for the page size.
For a design unit instance, if the number of instances in a hierarchy
level exceed the current page size, then pagination for that level is
automatically displayed in the third column of the Instances view page.
This column displays the current page of instances at a hierarchy level
and the total number of pages for the instances at that level. Use the
forward and backward arrow buttons to view the instances listed in
other pages of that hierarchy level.
Searching Instances
To search for an instance in the Instances view page, select the item to
be searched (module or instance) from the Find pull-down list, enter a

search string, and click the search icon ( for forward search or for
backward search). The first module/instance whose name contains the
search string, is highlighted in the Instances view page. Continue
clicking the search buttons to find more module/instances names
containing the search string.
You can qualify your search to include regular expression in your
search, case insensitive search, and searching hierarchical path by
selecting the corresponding check-box(es) in the instances view page.
NOTE: When the Hier. Path option is selected, the RegEx and Case
Insensitive options are disabled.
Viewing Instances
Double-click an instance name in the Instances view page and the
source file containing the instance is displayed in The Source Window
with the first line of the instance description highlighted (initial
commented lines are skipped). Similarly, the corresponding gate is also
highlighted in The Modular Schematic Window.
Copying Instance Names/Paths

You can copy (to the clipboard) an instance name or complete instance
path of the instances displayed in the Instances view page. To do so,
right-click the instance and from the context menu, select the Copy >
Instance Name (or <Ctrl>+<C> key combination) or Copy > Instance Path
(or <Ctrl>+<P> key combination) options, respectively. The copied
instance name or instance path can then be pasted (using the <Ctrl>+<V>
key combination) at a different location or application.
Viewing Instance Properties

In the Instances view page, the instances are listed along with the full
hierarchical path of the instance. You can view the properties of the

instances listed here by right-clicking the instance and selecting

Properties... from the context menu. The Instance List : Properties
location.

SpyGlass enables you to view specific information about blackbox
modules from the Instances View page. To view this information, right-
click any blackbox module displayed in the Design view page
(indicated by black file icon ) and select
Show BlackBox Info... context menu option. See the Viewing Blackbox
Information section for details.
The Source Window

The SpyGlass Design Environment Source window is used to display
the selected source file, and to select a given pathway or gate in the
schematic windows.

The Source Window
Loading Source Files

A source file can be loaded in the Source window by any of the
following methods:
• Double-clicking a file in the File view page
• Double-clicking a module in the File view page or Design view page
• Double-clicking a pathway or gate in the schematic windows
• Double-clicking a message from the Message window
The associated source file will be displayed in the Source window.
Viewing Color Coding

The RTL source code in the Source window is displayed with a color
coding scheme. For example, the keywords are displayed in maroon
color. You can disable the color scheme in the Source window by
deselecting the Show Color Coded option from the HDL Navigator Page
page in the Preferences window.
NOTE: The color coding is visible only after the design is run. The coding of
keywords differentiates between the Verilog and VHDL files and also the
modes (v2k, no_v2k, and so on) defined for VHDL files.
Inactive Code Display

SpyGlass Design Environment can distinguish between the active and
inactive portions of a design unit’s description in the Source window. A
design unit’s RTL description can have the following inactive sections:
• ifdef...endif directives in a Verilog module
These directives make specific sections of the module inactive if the
corresponding condition is evaluated to false.
• translate_off/translate_on directives in a design unit

These directives turn off sections of design on which SpyGlass

analysis will either happen partially or not at all.
• Comments in the source input files
Such inactive sections are now highlighted in green color in the Source
window.
NOTE: The inactive code display feature is not available for the pre-compiled
VHDL library files.
Setting Source View Options

Utilizing the Waivers (See Tools > Waiver Editor) and Viewing
Preferences (See Tools > Preferences), you can select the manner in
which messages are highlighted in the Source window.
Selecting Text
You can select a given portion of text by holding down the left mouse
button and dragging the highlight over the desired area.
When you invoke a search dialog with a string selected in the Source
window, the selected string is automatically displayed in the search
dialog. Alternatively, you can select any string from the source
description and paste it in any search dialog using <Ctrl>+<C> and
<Ctrl>+<V> key combinations.
Searching in Source Window

Use the Edit > Find menu option to search any name in the RTL
source.
To search the master module of an instance, select the instance name
and press the <Ctrl> key on the keyboard and click the left mouse

The Source Window
button. The file containing selected instance’s parent module is

displayed and the first line of the parent module is highlighted. To
return to the instance, press the <Ctrl> key on the keyboard and click the
right mouse button.
Using the Navigation Bar

A navigation bar has been added to the Source window that can be used
to navigate between loads and drivers declared for a signal.
To navigate between the loads and drivers declared for a signal, you
need to double-click a signal to select it. Next, you can select from any
of the following options:
• Jump to next load
Use the ( ) button to navigate to the next load declared for a signal.
• Jump to previous load
Use the ( ) button to navigate to the previous load declared for a
signal.
• Jump to next driver
Use the ( ) button to navigate to the next driver declared for a
signal.
• Jump to previous driver
Use the ( ) button to navigate to the previous driver declared for a
signal.
NOTE: The above mentioned options are hidden by default. To display these
options, right-click on the navigation bar and select the Loads/Drivers check
box.
Interaction with Other Windows

You can probe an object in the currently displayed source design file by

double-clicking the object name. Then, the object is highlighted in

other windows that are open, as follows:
Object Type Window Actions Highlight Details

Nets Modular Schematic window is Net is highlighted.
redrawn to show the design unit
containing the probed net.
Net and all connected Net is highlighted across the
components are added to the hierarchical boundaries.
Incremental Schematic window.
Net is added to the Legend -
window list.
Ports Modular Schematic window is The Port and its connected
redrawn to show the module net are highlighted.
containing the probed port.
Port and all components Port and its connected net
connected to the port’s are highlighted across the
connected net are added to the hierarchical boundaries.
Port is added to the Legend -
window list.
Instances Modular Schematic window is Instance is highlighted.
redrawn to show the parent
module containing the probed
instance.
Instance icon is added to the Instance is highlighted
Instance is added to the Legend -
window list.
Probing Nets
The net and all its end connections in the current module are
highlighted in the Modular Schematic window.

The Source Window
The net and all its end connections up to ports or leaf-level instances
are highlighted.
The Modular Schematic window is designed to provide highlighting,
both from the source to the schematic, and back-annotation from the
schematic back to the source. See The Modular Schematic Window for
more information on the Modular Schematic window.
To view the schematic pathway(s) or gate(s) associated with a given
object, open the Modular Schematic window and double-click the
object in the Source window. Similarly, double-click an object in the
Modular Schematic window and the corresponding file is opened in the
Source window, if not already open and the name is highlighted.
NOTE: You can also select more than one objects for probing or remove an
object from a set of probed objects in the schematic windows by clicking the
relevant object while holding down the <Ctrl> key on the keyboard.
SGDC to Schematic Cross-probing

You can cross-probe objects from the Source window to the schematic
windows by double-clicking the SGDC file in the Constraints page. The
corresponding source of the SGDC file is displayed in the Source
window. The objects in the source file appear as hyperlinks. Now, when
you select an object in the Source window and click the Modular
Schematic or Incremental Schematic icons on the SDE toolbar, the
corresponding object is highlighted in the schematic window.
Cross-probing from SGDC is limited to a maximum of 30 matches for
a single object in the SGDC file. Out of these, only 10 matches are
shown by default. If you select an object that has more than 10
corresponding objects, then the Select Limit... dialog appears that
prompts you to enter the number of objects that need to be cross-
probed:

Select the Display objects option and enter the number of objects that
you want to cross-probe in the text field. Select the Display All objects
option to consider all objects for cross-probing.
You can also enter the number of objects that need to be cross-probed
by selecting the Select maximum number of objects that can be cross-probed
from SGDC file option from the Misc Page of the Tools > Preferences
window.
NOTE: Selecting a large number of objects for cross-probing may require more
memory.
NOTE: You can use the -disable_sgdc2sch command-line option to
disable SGDC to schematic cross-probing.
NOTE:
You can also view the SGDC constraints set on an object. Refer to the
Viewing SDC/SGDC Constraints Set on an Object section for details.
Viewing Cross-probing History

In SpyGlass, cross-probing can be performed from various sections,
such as the Source window, the File/Design/Constraints/Instances
window, the HDL Navigator window, the Modular/Incremental
schematic windows, spreadsheet viewer, waveform/FSM viewers, and
various SpyGlass reports.
Until now, the highlighted lines were updated without any notification
and therefore, the flow of debugging was lost. SpyGlass provides the

The Source Window
following buttons in the Source window that enable you to keep a track
of the highlighted lines for better debugging:
• Previous button ( ): This button is enabled if the highlighting
information is available in the history. On clicking the Previous
button, the previously highlighted file and line is fetched from the
history and highlighted in the Source window. You can also view the
complete history by right-clicking the Previous button and selecting
the All History... option from the context menu. Then, the Cross-
probing History window appears that provides a list of all
highlighted lines.
NOTE: If you click the back button several times and then cross-probe from
different sections, then the new highlighted information is inserted in the
current position of the history (instead of at the end). Therefore, some of the
highlighted history might be lost.
• Next button ( ): This button is enabled when a previously
highlighted line is fetched from the history using the Previous
button. You can also view the complete history by right-clicking the
Next button and selecting the All History... option from the context

menu. Then, the Cross-probing History window appears that

provides a list of all highlighted lines.
NOTE: The Previous and Next buttons are hidden by default. To display these
buttons, right-click on the navigation bar and select the Next/Previous Probed
Line check box.
Right-click Options
Right-click a signal in the Source window to get the context menu that
contains the following options:
• Help
NOTE: This option is visible only when a violation is selected in the
message window.
Use this option to view the html help for the selected violation in the
message window. When you select this option, a browser window
appears that displays information about the rule.
• Jump To > Signal
Displays the name of the signal/instance.
• Jump To > Declaration
Use this option to navigate to the location where the signal is
declared. When you click the blue link located below the Jump To >
Declaration option, the location where the signal is declared is
highlighted in the Source window.
In case an instance is selected, then the Jump To > Declaration option
would appear as Jump To > Definition.
• Jump To > Drivers
Use this option to navigate to the location where the driver is
declared for the selected signal. When you click the blue link(s)
located below the Jump To > Drivers option, the location where the
driver is declared for a signal is highlighted in the Source window.

The Source Window
• Jump To > Loads

Use this option to navigate to the location where the load is declared
for the selected signal. When you click the blue link(s) located
below the Jump To > Loads option, the location where the load is
declared for a signal is highlighted in the Source window.
• Copy Object Name
Use this option to copy the current name of the module.
• Properties
Use this option to view the signal properties. When you click the
Properties option, the Properties window is displayed that lists the
signal name, the signal type, and the full hierarchical name of the
signal.
Click the OK button to close the Properties window.

• Set SGDC Constraints
Use this option to set the SGDC constraints on a signal. For more
information on setting SGDC constraints, refer to the Setting SGDC
Constraints section.
• Module > Show Instance List
Use this option to view the list of instances in the module. When you
select the Show Instance List option the Instances window is
displayed. Refer to the Viewing List of Instances section for more
details.

• Module > Set as Top Module

Use this option to set a module as a top module for the next run.
When you select this option the specified module is prefixed with a
( ) in the Design View page. Refer to Setting Top Modules for
details.
• Module > Remove Top Module
Use this option to remove a module as a top module for the next run.
• Module > Stop Module
Use this option to stop the module from being synthesized in the
next run. When you select this option the specified module is
prefixed with a ( ) in the Design View page. Refer to Setting Stop
Modules for details.
• Module > Remove Stop Module
Use this option so that a stopped module is synthesized in the next
run.
• Waive > Waive Messages of Line
Use this option to waive the messages of the selected line.
• Waive > Waive Rules By Module
Use this option to waive all messages corresponding to the module.
NOTE: The options for which a hierarchical path is required depends on the
scope set in the Scope field.
The HDL Navigator Window

The SpyGlass HDL Navigator window is used to display information
about the loads and drivers declared for a signal.
When you double-click a signal in The Source Window, the HDL
Navigator window displays information about the drivers and loads
declared for the signal. The HDL Navigator window displays the
following information:

• Scope
A signal may span across the design hierarchy and therefore, may
have different loads and drivers declared at different levels. You can
set the scope of a signal in the Scope field. However, SpyGlass, by
default, selects the most relevant scope for you. You can edit this
scope based on your requirements. If the signal has only one scope
then the Scope field is updated automatically. If the signal has more
than one scope, then you can select the relevant scope from the
Scope pull-down menu.
You can set the scope from the Instance window or by selecting a
violation message.
• Signal
This section contains a list of the signals selected in the Source
window. You can select a signal from the pull-down list to view the
drivers and loads declared for that signal.
• Declaration
This section contains the file name and line number of the RTL
source code where the signal is declared. By default, the Declaration
option is not visible in the HDL Navigator window. To display this
option in the HDL Navigator window, select the Display > Signal
Declaration option from the HDL Navigator Page of the Preferences
window.
You can also invoke the Preferences window by selecting the
Preferences option from the Options pull-down list.
• Drivers
This section contains the drivers declared for the signal selected in
the Signal section. When you click a driver in this section, the line
where the driver is declared is highlighted in the Source window.
You can also find the file and line number of the RTL source code
where the driver is declared by placing the mouse cursor over the
driver. Then, the file name and line number of the RTL source is
displayed in a balloon window.

Click the Next button to view the next driver location in the Source
window.
To view all the drivers declared for the signal, click All. When you
click All, the SpyGlass Drivers window opens that displays the list of
all drivers declared for the signal. You can click on a driver in the
SpyGlass Drivers window to view the location where the driver is
declared in the Source window.
You can also view the driver information in a tabular format by

selecting the Show Detailed View option from the HDL Navigator
Page page of the Preferences window.
You can show or hide the Drivers section in the HDL Navigator
window by selecting the Display > Drivers option from the HDL
Navigator Page of the Preferences window.
• Loads
This section contains the loads declared for the signal selected in the
Signal section. When you click a load in this section, the line where
the load is declared is highlighted in the Source window. You can
also find the file and line number of the RTL source code where the

load is declared by placing the mouse pointer over the load. Then,
the file name and line number of the RTL source is displayed in a
balloon window.
Click the Next button to view the next load location in the Source
window.
To view all the loads declared for the signal click All. When you click
All, the SpyGlass Loads window opens that displays the list of all
loads declared for the signal. You can click on a load in the SpyGlass
Loads window to view the location where the load is declared in the
Source window.
You can also view the load information in a tabular format by

selecting the Show Detailed View option from the HDL Navigator
Page of the Preferences window.
You can show or hide the Loads section in the HDL Navigator
window by selecting the Display > Loads option from the HDL
• Properties
This section contains information about the signal, such as the signal

name, signal type, and the full hierarchical name of the signal.
You can show or hide the Properties section in the HDL Navigator
window by selecting the Display > Properties option from the HDL
Viewing Declarations of Signals as Loads/Drivers

By default, the search for drivers and loads stops at the module
boundary. If the Stop At Module Boundary option is selected from the
Options pull-down list, then the loads and drivers will stop at the
location where the signal is declared at the start of the module.
However, if you deselect the Stop At Module Boundary option, then the
loads and drivers will also show the usage of the signal outside/inside
the module boundary.
The following may occur when the Stop at Module Boundary option is
selected:
• Clicking the signals in instantiations will display the loads or drivers
inside the module being instantiated if the signal is an input or
output signal respective to that module (declaration line of the
signals/ports).
• Clicking the input port/signal declarations in a module will display
the drivers outside the module (location where that module is being
instantiated).
• Clicking the output port/signal declarations in a module will display
the loads outside the module.
• Clicking any signal that is an input to its module will display the
drivers as the port declaration of that signal.
• Clicking any signal that is an output of its module will display the
loads as the port declaration of that signal.
The following may occur when the Stop at Module Boundary option is not
selected:

• Clicking the signals in instantiations will display the loads or drivers

inside the module being instantiated if the signal is an input or
output signal respective to that module (usage of the signal within
the module being instantiated).
• Clicking the input port/signal declarations in a module will display
the drivers outside the module (location where that module is being
instantiated).
• Clicking the output port/signal declarations in a module will display
the loads outside the module.
• Clicking any signal that is an input of its module will display the
drivers outside the module (location where that module is being
instantiated).
• Clicking any signal that is an output of its module will display the
loads outside the module.
NOTE: Clicking the input/output port/signal declarations in a module will
always display the loads/drivers outside the module irrespective of whether the
Stop at Module Boundary option is selected or deselected.
Docking/Undocking the HDL Navigator Window

By default, the HDL Navigator window is docked on the right of the
SpyGlass Design Environment. However, you can also dock the HDL
Navigator window to the left or bottom of the SpyGlass Design
Environment by using the Options pull-down list located at the top-right
corner of the HDL Navigator window. The following options are
available:
• Undock
When you select this option, the HDL Navigator window becomes a
floating window. You need to close the window to dock it to the
location from where it was undocked. In addition, you can select any
of the Left, Right, or Bottom options to dock the Navigator to the left,
right or bottom of the SpyGlass Design Environment.

• Left
Use this option to dock the HDL Navigator window to the left of the
SpyGlass Design Environment. When you select the Left option,
then the HDL Navigator window is docked on top of the File/
Design/Constraints/Instances window and a new tab Navigator is
added next to the Instances tab in the File/Design/Constraints/
Instances window.
• Right (Default)
Use this option to dock the HDL Navigator window to the right of
the SpyGlass Design Environment.
• Bottom
Use this option to dock the HDL Navigator window to the bottom of
the SpyGlass Design Environment. When you select the Bottom
option, then the HDL Navigator window is docked on top of the
Message window and a new page Navigator is added in the Message
window.
The Message Window

The SpyGlass Design Environment Message window is used to display
the message information generated by the SpyGlass analysis in useful
formats.
The Message window has the following pages:

The Message Window
Page Shows... Displayed

Session Log Page Log information while the SpyGlass Always
analysis is running
Messages Page The Messages page displays the Always
violation messages found during a
SpyGlass analysis run. You can view
view an interactive summary of the
reported messages in the Msg
Summary page or view a hierarchical
list of all the messages found in the
SpyGlass analysis, sorted either by
Policy or by Severity in the Msg Tree
page.
File Page List of messages found in a selected Always
source file
Module Page List of messages found in a selected Always
design unit
Line Page List of the messages associated with If selected from the Tabs Page of
the selected line of code in the Source Tools > Preferences menu option
window
Serious Page List of messages of FATAL and If selected from the Tabs Page of
ERROR severity classes Tools > Preferences menu option
Warning Page List of messages of WARNING severity If selected from the Tabs Page of
class Tools > Preferences menu option
Info Page List of messages of INFO severity If selected from the Tabs Page of
class Tools > Preferences menu option
Summary Page List of messages for the selected If selected from the Tabs Page of
policies with those messages Tools > Preferences menu option
highlighted that are applicable to the
selected source file or design unit in
the design
Waived Page Messages waived based on user- Always
specified waive constraints

NOTE: All pages in the Message window (except the Session Log page) are
enabled only when SpyGlass is run or a .vdb file is loaded.
Waiving Messages
You can waive the messages shown in all pages of the Message
window (except the Session Log page).
To waive the messages, select the Tools > Waiver Editor menu option
or click the The Waiver Button in the toolbar.

You can probe a message in most pages of the Message window by
double-clicking the message. Then, the related objects are highlighted
in other windows that are open, as follows:

The Message Window

Message The source file containing the The source code line is
message is loaded in the highlighted.
Source window and the related
source code line is highlighted.
Modular Schematic window is Components involved in the
redrawn to show the design unit message are highlighted.
containing the message.
Components involved in the Components involved in the
message are added to the message are highlighted
Incremental Schematic window. across the hierarchical
boundaries.
One or more entries are added -
to the Legend window list
depending on the number of
colors associated with the
message (as set in the policy).
Session Log Page

The Session Log page of the Message window displays log information
while the SpyGlass analysis is running. This log reports when SpyGlass
enters and completes the different phases of its analysis.
The Session Log page also displays error messages that result when
SpyGlass aborts its run.

FIGURE 34. The Message Window - Session Log Page
There are no navigational or annotation controls available in the

Session Log page.
After the SpyGlass analysis is completed, the log information is saved
as the <vdb-name>.out file in the current directory where
<vdb-name> is the name of the Violation Database file (default is
spyglass). When you open a Violation Database file in the SpyGlass
Design Environment, the contents of the corresponding
<vdb-name>.out file (if found) are displayed on the Session Log
page. If the corresponding <vdb-name>.out file is not found, the
SpyGlass version and the policies run are listed in the Session Log
page.
Messages: Msg Summary Page

The Msg Summary page (shown below) contains an interactive
summary of the reported violation messages. You can select the Msg
Summary page by selecting the Msg Summary option from the View
drop-down list in the Messages page.

The Message Window
FIGURE 35. The Message Window - Msg Summary Page
The Msg Summary page has three sections. At the top of the Msg
Summary page is the Msg Summary Toolbar. The lower-left section
contains an interactive Summary Matrix Window with the number of
messages categorized in a tabular form. The lower-right section
contains an interactive Message List Window with the individual
violation messages arranged in a tabular form.
Msg Summary Toolbar

The Msg Summary toolbar allows you to configure the display of the
Msg Summary page according to your preferences. Additionally, this
toolbar allows you to browse through the Msg Summary page and
search for specific messages in the Msg Summary page.
You can use the Summarize By pull-down list to configure the Summary
Matrix window. By default, the Summary Matrix window contains the
number of messages, either summarized by files or by templates if any
templates are selected. You can also summarize the message count by
File, Module/DU, Tag, Policy, or RuleGroup by selecting the
appropriate option from the Summarize By pull-down list.
The Options pull-down menu ( ) on the Msg Summary

toolbar allows you to configure the following:

• The font style and size
Select the Font... option for setting the font of the displayed text from
a list of available fonts and font sizes. When you select this option,
the Preferences dialog appears. You can change the font options
from the Message Page of the Preferences dialog.
• The columns displayed in the Message List window
Select the Configure Message Pane Columns... option to add/remove/
rearrange the displayed columns in the Message List window. When
you select this option, the Configure Columns dialog appears, as
shown below:
You can select the columns to be displayed or hidden by moving the

column names between the Visible Columns section and the Hidden
Columns section by using the corresponding move arrow buttons.
You can also rearrange the column order in the Visible Columns
section by using the corresponding move-up or move-down arrow.
• The page size of the Message List window
Select the Configure Message Pane Page Size... option to increase/
decrease the number of violations displayed per page of the Message
List window. When you select this option, the Configure Page Size
dialog appears, which enables you to set the number of violations
displayed per page of the Message List window.

The Message Window
• The row height of the message in the Message List window

Select the Set Row Height... option to increase the height of the rows
in the Message List window. This option is useful to view the
complete message that has been wrapped using the ( ) button on
the Msg Summary toolbar. When you select this option the Set Row
Height dialog appears, as shown below:
You can change the row height by clicking the ( ) drop-down

button and selecting the required value from the list of available
values. Next, click Ok to apply the setting.
• Show severity class or severity labels
Select the Show Severity Class or Show Severity Labels option to
display the number of violations arranged by severity class or
severity labels in the Summary Matrix window.
• Show/hide waived messages
Use the Exclude Waived Messages check-box to show or hide the
waived messages in the Msg Summary page.
• Show only new messages
Select the Show only new Messages (Incremental Mode) option to
display only the new violation messages generated during the
incremental run.
• Search only in message column
Select the Search only in ''Message'' column option to limit the search
to the Message column only.
• Set preferences
Select the Preferences... option to set the SpyGlass Design
Environment preferences. See Tools > Preferences section for more

details.
NOTE: The Options pull-down menu is hidden by default. To display the
Options pull-down menu, right-click on the Msg Summary toolbar and select
the Option(s) check box from the context menu.
Tagging Messages in the Msg Summary Page

You can tag rule messages either with certain predefined identifiers
such as Investigate, Fixed, ToFix, and VerifiedFixed or with your own tags.
Tagging of messages with identifiers helps you keep track of the rule
violations in your design that are flagged as a result of SpyGlass design
analysis.
Adding a Tag
To add a tag to a rule message, click and drag the mouse cursor on a
row(s) in the Message List window and click the Add Tag icon on the
Msg Summary toolbar OR right-click the message and from the Tag >
context menu options select a tag from the set of predefined visual tags.
See the Tagging Messages section in Msg Tree Page for more details.
Modifying a Tag
To modify a tag to a rule message, click and drag the mouse cursor on a
row(s) in the Message List window and click the Modify Tag icon on
the Msg Summary toolbar OR right-click the message and select the
Tag > Modify... option from the context menu. See the Tagging Messages
section in Msg Tree Page for more details.
NOTE: The Tag > Modify context menu option is enabled only if you have
added a tag to a rule message.
Deleting a Tag
To delete a tag to a rule message, click and drag the mouse cursor on a
row(s) in the Message List window and click the Delete Tag icon on the

The Message Window
Msg Summary toolbar OR right-click the message and select the Tag >
Delete option from the context menu. The tag that was applied to the
message is deleted.
NOTE: The Tag > Delete context menu option is enabled only if you have
Wrapping Message Text

If the text for some of the reported rule messages is long and does
not fit within the current width of the message column in the
Message List window, then you can click the Wrap Message(s)
button ( ) to wrap the lengthy rule message text across multiple
lines to fit within the current window size of the Message List
window.
Searching within the Msg Summary Page

You can also search for a specific text string within the messages
displayed in the Message List window. To do so, enter the search string
in the search text field in the Msg Summary Toolbar and use the find
buttons ( ) to progressively search and highlight all the occurrences
of the search string within the messages displayed in the Message List
window.
Viewing Message Summary Help

To view the help of message summary window, click the button.
This displays the Message Summary Help window.
Summary Matrix Window

The lower-left section of the Msg Summary page displays the
Summary Matrix window, as shown in the following figure:

Here, the number of messages are summarized in a tabular form as

follows:
• The rows of the table contain the number of messages summarized
by Template (default), File, Module/DU, Tag, Policy, or RuleGroup
(as selected in the Summarize By field in the Msg Summary Toolbar).
By default, the number of messages in the rows are summarized by
templates.
• The columns of the table contain the number of message
summarized either by the severity class (default) or by the severity
labels (as selected in the Options pull-down menu of the Msg
Summary Toolbar).
Therefore, each cell in the Summary Matrix window displays the
number of messages of a particular severity class/label reported for a
particular Template/File/Module/DU/Tag/Policy/RuleGroup (as the
case may be). The total number of messages for each row and column
are also displayed. Placing the mouse-pointer above each cell displays
a balloon window with the information about the messages contained
in the cell.
NOTE: Each row and column of the Summary Matrix window is resizable by
dragging the edges of the row/column.
Clicking on any cell of the Summary Matrix window that has a
non-zero entry updates the Message List window (discussed below)
with the details of the individual messages.
SpyGlass provides a right-click menu for the Summary Matrix window.

The Message Window
This menu provides various options using which you can perform
different functions.
Message List Window

Whenever a cell in the Summary Matrix window (discussed above) is
selected by clicking the cell, the Message List window is displayed/
updated at the lower-right section of the Msg Summary page, as shown
below:
Here, the details of all the messages represented by the currently

selected cell of the Summary Matrix window are displayed in a tabular
form.
NOTE: The information about the currently selected cell of the Summary Matrix
window is also displayed in the Msg Summary Toolbar.
The information in the Message List window is organized as follows:
• The rows of the table represent the list of violation messages (one
row for each message).
• The columns of the table contain information about the individual
violation messages.
You can also view the ID associated with each violation message. To do
this, right-click a message and select Preferences... from the context
menu. Next, select the Show Message ID in Msg Tree, Msg Summary, etc.
option from the Misc tab of the Preferences window that appears. When
you select this option, the message ID is displayed as the second
column in the Message List window.

The rule violations in the Message List window are sorted based on
severity. If a rule has multiple severities, the related rule messages are
displayed separately with the severity. For example, if a rule (say
Ac_cdc04b) has two severities: Error and Warning, then the messages
for the Error and Warning severity labels will be displayed separately in
the Message list window.
More columns (other than the above default columns) can also be
added to the Message List window by using the Options pull-down
menu located on the Msg Summary toolbar or by right-clicking a
message and selecting the Configure Columns... context menu option.
Refer to the The columns displayed in the Message List window
If the mouse pointer is placed over a message row in the Message List
window, a small balloon window is displayed with the following
information about the message:
• The tag applied to the message
• The template that contains the rule corresponding to the displayed
message
• The severity of the message
• The policy that contains the rule corresponding to the displayed
message
• The rule name corresponding to the displayed message
By default, the page size of the Message List window is set to 10, that
is, 10 message rows are displayed per page. If the number of message
rows are more than the current page size, then the message rows are
spread across multiple pages in the Message List window. In such
cases, you can use the pagination buttons ( ) provided in the
Message List window to move across the pages of the Message List
window.
NOTE: If the number of messages is less than or equal to the current page
size, then the pagination buttons are not displayed.

The Message Window
SpyGlass provides a right-click menu for the Message List window.

This menu provides various options using which you can perform
different functions.
Cross-probing from the Msg Summary Page

The Message List window allows you to cross-probe the messages to
other SDE windows. When a message row is clicked, the content of the
message row is highlighted in bold. Clicking a message row in the
Message List window creates the following cross-probes:
• The related message in the Msg Tree page is highlighted.
• The design file in which the message has been reported is
highlighted in the File View Page of The File/Design/Constraints/
Instances Window Window.
• The source file containing the message is loaded in The Source
Window and the related source code line is highlighted in the same
color as that of the severity of the message.
• The corresponding message is highlighted in the Messages: Msg
Tree Page, File Page, and Module Page of the The Message
Window.
• The schematic for the design in which the message has been
reported is displayed in The Modular Schematic Window.
• The Incremental Schematic Window is updated if schematic data is
available for the message (indicated by the schematic icon ).
NOTE: SpyGlass does not allow you to cross-probe to the RTL files of incepted
design units. If you try to cross-probe to the RTL of such design units,
SpyGlass displays a message in the RTL viewer specifying that the file is
encrypted.
You can customize the Msg Summary toolbar based on your
requirements. For example, you can show or hide the Group By, Tag,
Find, and Options buttons from the Msg Summary toolbar. To do this,
right-click on the Msg Summary toolbar and select the button that you

want to show/hide from the context menu options.
NOTE: When you show or hide a button in the Msg Summary toolbar, then the
same button will also be hidden in the Msg Tree, File Tree, Waived Tree, and
Module toolbars.
Messages: Msg Tree Page

The Msg Tree page of the Message window displays the hierarchical
message tree sorted by the message severity (default) or by the policy.
In addition, the Msg Tree page displays the count of the total number of
messages (waived + non-waived) and the total number of waived
messages.
You can collapse the expanded message tree appearing in the Msg Tree
page by using the shortcut key, Ctrl -.
Additional message handling features have been provided in the form
of a toolbar in the Msg Tree. See the Msg Tree Toolbar section for
details.
In a hierarchical list by policy of all the messages found in the
SpyGlass analysis, the messages are sorted by policy, rule (arranged
alphabetically), and then placement in the source files. However, you
can also view the messages based on their severity under the policy
node. To do this, select the Custom... option from the Group-By drop-
down menu. Next, select Severity from the Level 6: RuleGroup/Severity
drop-down menu and click OK.

The Message Window
FIGURE 36. The Message Window - Msg Tree Page
The message tree displayed in the Msg Tree page shows messages
found in the design for all policies run.
The hierarchical list displays the fatal messages at the top of the
hierarchy.
When the messages in the Msg Tree page are sorted based on severity,
the violation messages of rules having multiple severities are grouped
under different severity labels. For example, in the above figure, the
violation messages for the Ac_cdc04b rule are displayed under the
Error and Info categories.
When the messages, are not grouped by severity, then the severity of
the violation messages can be identified based on the following
severity icons:
Message Severity Severity Icon

FATAL
ERROR
WARNING
INFO

NOTE: The messages in the Msg Tree page are displayed according to the
following default color scheme:
Message Severity Display Color

FATAL Dark Red
ERROR Red
WARNING Amber
INFO Green
You can customize the above color scheme according to your preference using
the Message Page of the Tools > Preferences menu option.
The messages displayed in the Msg Tree page are displayed sorted by
policy or by severity.
If the mouse pointer is placed over a message in the Msg Tree page, a
small balloon window is displayed with the following information
about the message:
• The tag applied to the message
• The template that contains the rule corresponding to the displayed
message
• The severity of the message
• The policy that contains the rule corresponding to the displayed
message
• The rule name corresponding to the displayed message
The total number of messages displayed is controlled by the Max No. of
Messages/Max No. of Messages per rule settings of the Misc Page of the
Tools > Preferences menu option.
When only the first set of messages of a rule are displayed, the rule
description is modified as in the following example:

The Message Window
The rule is prefixed by a red icon and the serial numbers and total
number of messages are shown.
If the message text is long and does not fit in the Msg Tree page, then
you can view the full message text by right-clicking the rule message
and selecting the Display Message option from the context menu. Then,
a balloon window opens up to display the full message text.
To view an in-depth description of a particular rule message, right-click
the message and select Help from the context menu. A browser window
appears that displays information about the selected rule.
If a message is an AnalyzeBBox violation, detailed information about
the cause and remedy of that blackbox can be viewed. To view this
information, right-click any AnalyzeBBox violation in the Message
Tree and select the Show BlackBox Info... context menu option. See the
Viewing Blackbox Information section for details.
All rule messages and rule descriptions that have associated schematic
data are shown prefixed with the schematic icon ( ).
When you double-click a specific message under such rule messages,
the corresponding design unit is displayed in the Source window and
the complete message path is highlighted in the Modular Schematic
window.
For other rule messages, only the containing design unit is displayed.
All rule messages and rule descriptions that have associated text data or
are multi-line messages are shown prefixed with the Text icon ( ).
All rule messages and rule descriptions that have associated waveform
are shown prefixed with the Waveform icon ( ).
All rule messages and rule descriptions that have associated FSM are
shown prefixed with the FSM icon ( ).

If you have run the Clock_sync04 Rule of SpyGlass Clock-Reset

Policy on your design, a corresponding message is added to the
Message Tree prefixed with R. When you click a specific message
under the Clock_sync04 Rule Message, the corresponding design unit
is displayed in the Source window and all clock signals of the selected
message are highlighted.
Copying Message Text

You can also copy the message text (full text or partial text) displayed
in the Msg Tree page.
To copy full text of a message, select the message and press <Ctrl>+<C>,
or press <Ctrl>+<Insert>, or right-click the message and select Copy >
MsgText context menu option. The message text is copied on the
clipboard and you can paste it in any other application that supports
pasting of text.
To copy partial text of a message, right-click the message and select
Copy > Custom context menu option. The entire message text is
displayed in a new Message Text window. Here, you can select partial
text of the message and using the right-click context menu options, you
can copy/paste the text, search for multiple occurrences of a selected
word/character, jump to a particular line within the Message Text
window, and wrap the text (word wrap or character wrap) within the
Message Text window.
NOTE: You can also select multiple messages (using <Ctrl>+Click) and
perform the above functions, such as copying the text of all the selected
messages.
Saving the Msg Tree Page Contents

To save the contents of the Msg Tree page, right-click on an item in the
Message Tree window and select Save Message List option from the
context menu. This displays the Save Report As dialog in which you can
specify the name, type, and path of the file in which you want to save

The Message Window
the message.
Viewing/Modifying Rule Parameters for a Message

To view or modify the rule parameters applicable for a particular rule
message, right-click the Message Tree item and select Setup... Then, the
Set parameters dialog appears listing the applicable rule parameters as
in the following example:
You can view or modify the current settings for the applicable rule
parameters.
Sanity checks have been added in the SpyGlass Design Environment to
identify the valid values for a rule parameter. For more information on
parameter sanity checking refer to the Performing Sanity Checks for
Parameters section.

Waiving Messages
To waive messages, select the messages using <Ctrl>+<Click> and then
right-click on the message and select Waive > Selected Message(s) or
press <Ctrl>+<D>. All the selected messages will be added as rows in the
Waivers dialog.
To waive a specific message, right-click on the message and select
Waive > This Exact Message. The specific message (irrespective of
whether the message was selected or not) will be added in a new row in
the Waivers dialog. (See Tools > Waiver Editor menu option
description for more details.)
To waive all messages of a particular rule, right-click the rule and select
the Waive >Waive All Messages Of Selected Rule(s) context menu option.
To waive all messages of a specific file, module, rule, or severity,
right-click on any message of that file/module/rule/severity and select
any of the following options from the context menu:
• All Messages Of This File: Select this option to waive all messages of
the selected file. Alternatively, press the <Ctrl>+<I> key on your
keyboard to waive the selected file.
• All Messages Of This Module: Select this option to waive all messages
of the selected module.
• All Messages Of This Rule: Select this option to waive all messages of
the selected rule. Alternatively, press the <Ctrl>+<E> key on your
keyboard to waive the selected rule.
• All Messages Of This Severity: Select this option to waive all messages
of the selected severity.
Then, all the corresponding messages will be waived and a row will be
added in the Waivers window indicating the specified file/module/rule/
severity for which all the messages have been waived. Moreover, other
related fields in the Waivers window are also updated accordingly. For
example, if all the messages of a file are waived, then the name of that
file appears in the File field of the Waivers window.

The Message Window
NOTE: The Msg Tree in the Message window remains persistent even after
applying or modifying waivers. That is, whenever waivers are applied or
modified, the Msg Tree retains its expanded state and refreshes only to reflect
the modifications in waivers.
To customize a waiver definition from a message, right-click on the
message and select Waive > Custom... The Customize Waiver dialog
appears:
FIGURE 37. The Customize Waiver Dialog
The dialog shows the current message.

Modify the settings as required and click Ok to save. The Waivers
dialog appears with a new row corresponding to the new waiver group
already added. (See Tools > Waiver Editor menu option description for
more details)
You can also press the <Ctrl>+<M> key on the keyboard to invoke the

Customize Waiver dialog.

SpyGlass enables you to view specific information about blackbox
modules from the Msg Tree page. If a blackbox module is present in
the currently loaded design, then such modules are reported under the
InfoAnalyzeBBox INFO rule in the Msg Tree page. You can view
detailed information about the blackbox modules in the currently
loaded design by right-clicking the corresponding message and
selecting Show BlackBox Info... context menu option. See the Viewing
Blackbox Information section for details.
Msg Tree Toolbar

The Msg Tree page contains a useful toolbar at the top that you can use
to perform useful message handling tasks, as discussed below:
Grouping Messages
Using the Group By pull-down list, you can group the rule messages by
the grouping orders listed therein. The Group By text-box displays the
first level of the currently selected grouping order. You can view all the
levels of the currently selected grouping order by placing the mouse
pointer over the Group By text-box. A small balloon window is
displayed indicating all levels of the grouping order. Similarly, you can
view all the levels of the grouping orders listed in the Group By
pull-down list by placing the mouse pointer over the grouping orders
listed therein.
NOTE: By default, messages are grouped according to Severity > Rule >
Message(s).
You can define the default grouping order for the rule messages in the
.spyglass.grouping_order file which is automatically created and stored in
the $HOME/.atrenta directory when you select the grouping order in

The Message Window
SDE.
You can also store the .spyglass.grouping_order file at the following
locations:
• SpyGlass installation directory ($SPYGLASS_HOME). Storing the
.spyglass.grouping_order file in the SpyGlass installation directory
($SPYGLASS_HOME) is useful when multiple SpyGlass users are
working on the same project/design and consistent usage of message
grouping order is required. However, the settings specified in the
$HOME/.atrenta directory override the settings specified in the
SpyGlass installation directory ($SPYGLASS_HOME). Therefore, if
you require consistent usage of message grouping, ensure that you
do not change the grouping order in SDE.
• Any directory other than $SPYGLASS_HOME and $HOME/.atrenta:
You can save the the .spyglass.grouping_order file in any directory of
your choice, and set the SPYGLASS_CONFIG_PATH environment
variable to point to that directory. Then, the settings specified in the
directory override the settings in the SpyGlass installation directory
($SPYGLASS_HOME). However, the settings specified in the $HOME/
.atrenta directory override the settings specified in the directory that
is specified using the SPYGLASS_CONFIG_PATH environment
variable.
The .spyglass.grouping_order file is automatically read whenever
SpyGlass starts and the message grouping order specified in this file is
automatically loaded.
NOTE: Since the .spyglass.grouping_order file is automatically read and
loaded whenever SpyGlass starts, there is no need to use the -f command-
line option to specify this file.
Sample .spyglass.grouping_order file
Severity#Severity->Rule->Message(s)
Template#Template->Severity->Rule->Message(s)
Tag#UserTag->Severity->Rule->Message(s)
All#Built-In->UserTag->Template->Policy
->RuleGroup->Rule->Message(s)

In case no default message grouping order is specified (that is, the

.spyglass.grouping_order file is neither present in the $HOME/.atrenta
directory nor in the $SPYGLASS_HOME directory), then the following
SpyGlass default message grouping orders are loaded:
• Severity
Severity->Rule->Message(s)
• Policy
Policy->Rule->Message(s)
• Template
Template->Severity->Rule->Message(s)
• Tag
User Tag->Severity->Rule->Message(s)
• All
Built-In->User Tag->Template->Policy->RuleGroup-> Rule->
Message(s)
• File
File->Severity->Rule->Message(s)
• Module
Module->Severity->Rule->Message(s)
In addition, you can also set the message grouping order according to
your preference. To do so, select the Custom... option from the Group By
pull-down list in the Msg Tree toolbar. Then, the Set Message Group
Order window is displayed, as shown below:

The Message Window
This window has the following sections:

• Grouping Order
Use this pull-down list to load any of the predefined or previously
saved grouping order of the messages. The resultant message tree
preview (on the right side of the window) and other related options
are also updated accordingly.
You can manage the grouping order by clicking the Manage
Grouping Order icon ( ). The Manage Grouping Order dialog
is displayed as follows:

Here, you can change the grouping order by selecting a group level
and moving (up or down) or deleting the selected group level by
using the corresponding icons listed at the right-hand side of the
window.
• Grouping Levels
Use this section to set additional levels for grouping rule messages,
first by these additional levels and then by Policy, Severity-Label,
Severity-Class, Severity-Preference, or RuleGroup (as the case may
be). You can set the following additional levels:
Level Description
Level1: File/Module Groups messages by File or module
Level 2: Built-in/ Groups rule messages by SpyGlass built-in rules and
Non-Builtin other policies.
If this level is selected and grouping by Policy is also
selected at the sub-level, then the rule messages within
the Built-in group of this level are still grouped by
RuleGroup > Severity-Class, or RuleGroup > Severity-
Label, or RuleGroup > Severity-Preference, because
SpyGlass built-in rules do not belong to any sub-level
policy.

The Message Window
Level Description
Level 3: User Tag Groups rule messages by the tags assigned to them
(discussed later in this section)
Level 4: Template Groups rule messages by the templates selected for
SpyGlass design analysis
NOTE: A rule message belonging to more than one
template is displayed under a separate template group.
For example, a rule message belonging to Block-
Design|Creation and Block-Design|Reuse templates will
appear separately under each of these templates.
These levels specified in the above table are applied with a higher
priority (over policies, severity-label, severity-class, severity
preference, or rule group) for grouping rule messages. Moreover, if
more than one additional level is selected, then these levels are
applied for grouping rule messages in the order of the level (Level 1
has highest priority, then Level 2, and so on).
SpyGlass provides you with the following sub-levels which you can

use to group the messages further:
Level Description
Level 5 Groups rule messages by policy, rule group, severity-class,
severity label, or severity preference.
NOTE: Selecting Policy or RuleGroup at Level 5 will group
only the Non-Builtin rule messages by policy or rule group.
At this level, when you select the Rule-Group option,
SpyGlass displays the Depth drop-down menu from which
you can select the required value. This value specifies the
number of subgroups to be displayed in the Message Tree
Level 6 Groups rule messages by rule group, severity class, severity
label, or severity preference. At this level, when you select
the Rule-Group option, SpyGlass displays the Depth
drop-down menu from which you can select the required
value. This value specifies the number of subgroups to be
displayed in the Message Tree.
NOTE: Level 6 appears only if you select Policy,
Severity-Class, Severity-Label, or Severity-Preference at
Level 5.
• Resultant Message Tree Indicator

This section indicates the resultant Message Tree that will be
displayed based on the settings (specified as above) for grouping the
rule messages in the Message Tree. Everytime you change a setting
for grouping rule messages, this section is updated to indicate the
resultant Message Tree that will be displayed in the Message Tree
page.
• Save Grouping As
You can also save the current settings (specified as above) for the
grouping order of the rule messages in the Msg Tree page for later
use. The Save Grouping As check-box automatically gets selected as
soon as you modify any of the grouping order settings. If a
previously saved custom grouping order is modified, then the name

The Message Window
of that grouping order is displayed in the Save Grouping As text box.

You cannot modify the SpyGlass predefined default grouping
orders, namely Severity > Rule > Message(s) AND Policy > Rule >
Message(s). However, if you create a custom grouping order by
modifying the initial settings of one of these SpyGlass predefined
default grouping orders, then a new unique name is displayed in the
Save Grouping As text box. You can either save the current grouping
order with this new unique name or enter a different name in the text
box to save the grouping order. All the saved grouping orders are
also available for future SpyGlass Design Environment sessions.
When the settings for message grouping order are according to your
preference, click Ok to save the settings. The Msg Tree page is updated
according to the new settings.
Tagging Messages
You can tag rule messages either with certain predefined identifiers
such as Investigate, Fixed, ToFix, and VerifiedFixed or with your own
tags. Tagging of messages with identifiers helps you keep track of the
rule violations in your design that are flagged as a result of SpyGlass
design analysis. For example, in a single SpyGlass analysis run, you
can analyze a number of rule violations and assign appropriate tags
based on the actions that you have performed (such as Fixed or
VerifiedFixed) or intend to perform later (such as Investigate or ToFix).
This way, you need not repeatedly run SpyGlass analysis to update the
status of rule violations after performing a set of corrective actions in
your design to address those rule violations.
Adding a Tag
To add a tag to a rule message, select the message in the Msg Tree page
and click the Add Tag icon ( ) OR right click the message and from
the Tag > context menu options, select a tag from the set of predefined
visual tags OR press the <Ctrl> <T> key combination on your keyboard.
A set of visual tags (identified by corresponding graphical icons) are
available through the Tag > context menu option. When any of these

visual tags is applied to a message, the corresponding graphical icon is

prefixed to the message.
You can also specify your own tag by selecting the Tag > Add Custom...
option from the context menu. Then, the Set Message Tag window is
displayed, as shown below:
Here, you can either select a predefined tag from the Tag pull-down list
or specify your own tag by typing a tag name in the Tag field. Click the
Ok button and the message will be tagged with the specified tag
(indicated by the tagged icon ( ).
NOTE: New tags that are specified by you here are added to the list of already
available tags.
Deleting a Tag
To delete a tag from a rule message, select the message in the Msg Tree
page and click the Delete Tag icon ( ) or right-click the message and
select the Tag > Delete option from the context menu. The tag that was
applied to the message will be deleted.
NOTE: The Tag > Delete context menu option is enabled only if you have
Modifying a Tag
To modify the tag for a rule message, select the message in the Msg
Tree page and click the Modify Tag icon ( ) in the Msg Tree toolbar or
right-click the message and select the Tag > Modify option from the
context menu. The Modify Message Tag window is displayed with the
selected rule message and its tag, as shown below:

The Message Window
To modify the tag for the message, click the tag name in the Tag field.
A pull-down list of all the available tags is displayed. Once again, you
can either select a tag from the pull-down list of available tags or
specify your own tag by typing a name in the Tag field. Click Ok to
apply the modified tag to the selected message.
NOTE: The Tag > Modify context menu option is enabled only if you have
NOTE: You can also add/delete/modify the tags for more than one message at
a time by selecting multiple messages (either by dragging the mouse pointer
across the messages or by individually clicking the messages while holding
down the <Ctrl> key on the keyboard) and applying the tag settings as
described above.
Wrapping Message Text

If the text for some of the reported rule messages is long and does not
fit in the current window size of the Msg Tree page, then you can click
the Wrap Message(s) icon ( ) to wrap the lengthy rule message text
across multiple lines to fit within the current window size of the Msg
Tree page.
NOTE: The Wrap Message(s) icon is hidden by default. To display the icon
right-click on the Msg Tree toolbar and select the Wrap context menu option.
Moving Across Pages

Use the pagination buttons ( ) to move across pages in the

Msg Tree page.
Finding Text in Rule Messages

To search a text string in the Msg Tree page, enter the text string in the
search text-field and click the icon for forward search ( ) or backward
search ( ). The rule message containing the specified search string is
highlighted. Continue to click the search icons to find further
occurrences of the search string in the rule messages displayed in the
Msg Tree page.
If the Incremental Mode option is selected, then you can further refine
your search by searching a text string in new or pre-existing messages
or by searching a text string in fixed or missing messages. To search a
text string in any new or pre-existing messages, select the Find in New
and Pre-existing Message option (default). To search a text string in the
fixed and missing messages, select the Find in Fixed/Missing Message
option.
Advanced Search in Message Tree

Click the Open Advance Search Dialog icon ( ) to view the Advance
find in Message Tree window, as shown below:

The Message Window
The upper section of the advance search window is where the search
criteria can be specified. The lower section displays the resultant
messages that match the search criteria.
To specify the search criteria, click the Search Criteria pull-down list and
select the relevant criteria from the list of available items, such as Tag,
Template, Policy, Severity, RuleGroup, Rule, Weight, Message Text (Contains
or Does Not Contain), or Message ID (hex). Based on the selected search
criteria, the Value pull-down list is populated with all the available
values for the selected search criteria. Select the value of the search
criteria from this list. You can specify more than one search criteria or
delete a search criteria by using the or icons, respectively. You can
also specify whether to match any of the specified search criteria
(similar to the OR operation) or all of the search criteria (similar to the
AND operation) while performing the search (use the corresponding
check-boxes at the top of the search criteria section). In addition, you
can use the options available below the search criteria to specify
whether to highlight (in the Msg Tree) the first found message or all the
messages that match the specified search criteria.

To perform the search (based on the specified search criteria), click the
search icon ( ). Then, the messages that match the search criteria are
listed in the results section of the advance search window, as shown
below:
Using the pagination support, you can specify the maximum number of
messages displayed per page of the results section (by selecting a
number from the corresponding pull-down list) and move between the
pages by using the previous page and next page icons ( ).
In the results section of the advance search window, each row
represents the information about the found messages. This information
includes the individual message text, the file name and the line number
of the file where the message is reported, and the unique hexadecimal
violation id associated with each message (see the Show Message ID in
Msg Tree, Msg Summary, etc. section for details).
Tags can be applied/modified to the messages listed in the results
section of the advance search window by selecting the check-box for
the messages and using the corresponding tagging icons ( ). See the

The Message Window
Tagging Messages section for details about tagging messages.

Cross-probing from the Advance Search Window
The messages listed in the results section of the advance search
window can be cross-probed to other SDE windows. To do so, click a
message row in the results section and the following cross-probes are
created:
• The source file in which the message is reported is highlighted in the
File View Page of the The File/Design/Constraints/Instances
Window.
• The source code of the file in which the message is reported is
highlighted in the The Source Window.
• The message is highlighted in the Messages: Msg Tree Page, the
File Page, and the Module Page in The Message Window.
• The corresponding schematic information (if available, indicated by
the schematic icon) is highlighted in The Modular Schematic
Window and The Incremental Schematic Window.
NOTE: SpyGlass does not allow you to cross-probe to the RTL of encrypted
design units. If you try to cross-probe to the RTL of such design units,
SpyGlass displays a message in the RTL viewer specifying that the file is
encrypted.
You can customize the Msg Tree toolbar based on your requirements.
For example, you can show or hide the Group By, Tag, Find, and
Options buttons from the Msg Tree toolbar. To do this, right-click on
the Msg Tree toolbar and select the button that you want to show/hide
from the context menu options.

Messages: Module Hierarchy Page

The Module Hierarchy page of the Message window displays the
violation messages based on the module hierarchy. This enables you to
identify where problems may exist through the hierarchy. Viewing
messages by module hierarchy is particularly useful when the sub-
blocks are owned by different RTL designers.
The module hierarchy page displays a tree view of the module
hierarchy (just like the Design View Page) and the messages for each
module are displayed (grouped by severity) directly under the module.
If a module contains child modules, they are displayed under the

module.
NOTE: If a module is instantiated at different levels, then the messages related
to the module are displayed at all the places where the module is instantiated.
Therefore, the count of the total number of violations added through the
hierarchy will be higher than the count of individual, flat display of messages.
This difference could be very large if there are messages for low-level cells that
are re-used through the design, for example, messages from instantiated
technology library cells.

The Message Window
If you place the mouse over a module then a balloon window appears
that displays the total number of messages in a module, the total
number of messages in the module hierarchy, and the total number if
instances of that module.
You can save the message present in a module in a text format or html
format. To save the message in an html format, right-click on the
module name, and select the Save Message List->Html Format context
menu option. This displays the Save Report As dialog in which you can
specify the name, type, and path of the file in which you want to save
the message. Similarly, to save a module in a text format select the Save
Message List->Text Format context menu option.
You can also view the list of instances of a module. To do so, right click
the module in the Module Hierarchy page and select the Show Instance
List... context menu option. Refer to the Viewing List of Instances
File Page
The File page is optional and appears only if you have selected to
display the File page from the Tabs Page of Tools > Preferences... menu
option.
The File page of the Message window displays the count of the total
number of messages, the total number of messages in the source file,
and the total number of waived messages. In addition, the File page
also displays the list of messages found in a selected source file.

FIGURE 38. The Message Window - File Page
To view the messages found in a source file, double-click the file in the
File view page and the File page in the Message window displays the
messages found in the selected source file.
For the selected source file, the File page displays the name of the
source file and the messages found in the source file grouped either by
Severity (default) or by Policy.
When the messages in the File page are sorted based on severity, the
violation messages of rules having multiple severities are grouped
violation messages for the Ac_cdc04b rule are displayed under the
severity icons:

FATAL
ERROR
WARNING
INFO
A toolbar similar to the Msg Tree Toolbar is also available in the File
page which can be used for grouping messages, tagging messages,

The Message Window
wrapping message text, and searching messages.
Module Page
The Module page of the Message window displays list of messages
found in a selected design unit. In addition, the Module page displays
the count of the total number of the messages, the number of messages
in the selected design unit, and the total number of waived messages.
FIGURE 39. The Message Window - Module Page
To view the messages found in a design unit, double-click the design

unit either in the File view page or the Design view page and the
Module page in the Message window displays the messages found in
the selected design unit.
For the selected design unit, the Module page displays the name of the
design unit, name of the source file where the selected design unit is
defined, and the messages found in the design unit grouped either by
Severity (default) or by Policy.
When the messages in the Module page are sorted based on severity,
the violation messages of rules having multiple severities are grouped

violation messages for the Ac_cdc04a rule are displayed under the
severity icons:

FATAL
ERROR
WARNING
INFO
A toolbar similar to the Msg Tree Toolbar is also available in the

Module page which can be used for grouping messages, tagging
messages, wrapping message text, and searching messages.
Line Page
The Line page is optional and appears only if you have selected to
display the Line page from the Tabs Page of Tools > Preferences...
menu option.
The Line page of the Message window displays a list of the messages
associated with the selected line of code in the Source window.

The Message Window
FIGURE 40. The Message Window - Line Page
If there are no messages found in the design, then the Line page is
grayed out.
To view the messages associated with a source code line, click the
source code line in the Source window. The messages, if any associated
with the selected source code line are displayed in the Line page.
For example, selecting a given source code line could produce the
following messages in the Line page:
(W123) Warning: Variable ’thing’ declared but never set
(149)
(W120) Warning: Variable ’thing’ declared but not used
(149)
Each message shown in the Line page has the rule name, the severity of
the message, the number of times a message is generated for the
particular source code line, and the source code line number where the
message occurred.
To view an in-depth description of a particular rule message, right-click
the message. A browser window appears that contains the rule
description.
Serious Page
NOTE: The Serious page is optional and appears only if you have selected to

display the Serious page from the Tabs Page of Tools > Preferences menu
option.
The Serious page of the Message window shows the details of serious
messages that is, the messages of FATAL and ERROR severity class.
FIGURE 41. The Message Window - Serious Page
The Serious page label shows the total number of serious messages
found in the design for all policies run. If there are no serious messages
found in the design, then the Serious page is grayed out.
The Serious page shows the total number of serious messages by
policy. Then, individual serious messages are listed sorted by their rule
severity.
Warning Page
NOTE: The Warning page is optional and appears only if you have selected to
display the Warning page from the Tabs Page of Tools > Preferences menu
option.
The Warning page of the Message window shows the details of
warning messages, that is, the messages of WARNING severity class.

The Message Window
FIGURE 42. The Message Window - Warning Page
The Warning page label shows the total number of warning messages
found in the design for all policies run. If there are no warning
messages found in the design, then the Warning page is grayed out.
The Warning page shows the total number of warning messages by
policy. Then, individual warning messages are listed sorted by their
rule severity.
Info Page
NOTE: The Info page is optional and appears only if you have selected to
display the Info page from the Tabs Page of Tools > Preferences menu option.
The Info page of the Message window shows the details of
informational messages that is, the INFO severity class messages.
FIGURE 43. The Message Window - Info Page

The Info page label shows the total number of informational messages
found in the design for all policies run. If there are no informational
messages found in the design, then the Info page is grayed out.
The Info page shows the total number of informational messages by
policy. Then, individual informational messages are sorted by their rule
severity.
Summary Page
NOTE: The Summary page is optional and appears only if you have selected to
display the Summary page from the Tabs Page of Tools > Preferences menu
option.
The Summary page of the Message window shows the list of all the
rule messages for the policies selected in the current analysis.
FIGURE 44. The Message Window - Summary Page
The messages displayed in the Summary page are sorted by severity in

the following order:
• FATAL
• ERROR
• WARNING
• INFO

The Message Window
The messages for these severity classes are highlighted in red if you
have selected to highlight the messages for that category from the Tabs
Page of the Tools > Preferences menu option.
The Summary page also displays the rule parameters with their values
and the unselected rules of all selected policies if you have set the
corresponding options from the Tabs Page of the Tools > Preferences
menu option.
You can save the message summary to a file. To save the message
summary, right-click anywhere on the Summary page and from the
context menu, select the Save As... context menu option to save the
message summary.
Waived Page
The Waived page of the Message window displays the Waiver Tree
containing the rule messages waived based on the user-specified
waive constraints. SpyGlass also displays the comment applied to
each of these messages.
FIGURE 45. The Message Window - Waived Page
The Waived page displays the count of the total number of messages
waived. The waived messages in the Waiver Tree are grouped either
according to the waiver expressions specified by you or by the
Severity/Policy of the rule messages. You can set the order in which the
waived messages are grouped in the Waiver Tree by specifying your
preference using the Options pull-down list on the Waived Tree toolbar.

Using the Options pull-down list, you can select/clear the option for
grouping the Waiver Tree by waiver expression first and/or set
miscellaneous preferences by selecting Preferences... option from the
Options pull-down list, which displays the Misc Page (same as
displayed by the Tools > Preferences menu option).
The toolbar at the top of the Waived page also allows you to group/tag
messages, wrap text, and search within the Waived page. See the Msg
Tree Toolbar for details about using the toolbar.
Saving the Waiver Tree

To save the text of the entire Waiver Tree on a disk file, right-click the
Waiver Tree and select Save As.... Specify a file name and location in
the resultant Save Waiver Tree As... window and click Save.
Modifying the Waiver Settings

You can modify the waiver settings for the waivers displayed in the
Waiver Tree. To disable a waiver, right-click the waiver text and select
Disable from the context menu. The specified waiver is removed from
the Waiver Tree.
NOTE: Disabling a waiver as described above also updates the Waivers
spreadsheet in the Waivers window (as displayed by the Tools > Waiver Editor
menu option). The specified waiver is deselected in the Waivers spreadsheet in
the Waivers window (although the waiver entry still remains).
To edit the settings of a waiver, right-click the waiver text in the Waiver
Tree and select Edit from the context menu. The Waivers window is
displayed. Here, you can edit the waiver settings as required (see Tools >
Waiver Editor section for details).
Viewing Full Message Text

If the message text is long and does not fit in the Waived page, you can
right-click the rule message and select Display Message from the context

The Message Window
menu. A balloon window is displayed with the full text of the rule
message.
Finding Text in Waiver Tree

You can search the Waiver Tree to find a text string by right-clicking on
a waived rule or rule message and selecting Find Text from the context
menu. In the resultant Find text in Waiver tree dialog, enter the search
string and click Search. The first line in the Waiver Tree that contains
the searched string is highlighted. Continue to click the Search button to
find more occurrences of the string in the Waiver tree.
Copying Message Text

To copy the text of any rule message displayed in the Waived page,
click the message and press <Ctrl>+<C>, press <Ctrl>+<Insert>, or right-
click on the message and select Copy Text. The message text is now
available in the clipboard and you can paste it in any other application
that supports pasting of text.
You can also select multiple messages (using <Ctrl>+Click) and copy
the text of these messages together.
Sorting and Filtering Results in Message Windows
Sorting Results
You can sort the displayed results on the basis of the columns and the
sorting order of the column values (that is, ascending or descending
order).
To sort the CSV results, click a column header. For example, to sort the
results on the basis of the ID column, click on the header of the ID
column. The down arrow on the column header (indicated by )
means that the column is sorted in the Ascending order. Clicking again

on the column header, sorts the column in the descending order.

SpyGlass also provides the following sorting options in the right-click
menu of the column header of the Spreadsheet Viewer:
• Sort Ascending: Use this option to sort the column in the ascending
order
• Sort Descending: Use this option to sort the column in the descending
order
• Set Sorting Order: Use this option to set the sorting order on the basis
of multiple columns. This menu option displays the Set Sort Order
dialog.
Filtering Results
To apply filters on the results, right-click a column header of the
window. This displays the values of the column. Selecting a particular
value will display the rows having that column value.
To set multiple filters, right-click the required column header and select
Custom context menu option. This displays the Custom Filter dialog, as
In the Custom Filter window, you can select the Filter Criteria and set the

The Modular Schematic Window
corresponding filter Value. To apply more than one filter, click the More
button on the top-right corner of the window. This inserts another row
to specify a new filter criteria and value.
You may choose to set the filter to match all or any of the specified
filter criteria by selecting Match all of the following or Match any of the
following options on the top of the window.
Setting filters enables you to view only those rows that match the
criteria specified in the Custom Filter window.
SpyGlass also provides the following filtering options in the right-click
• (All): Use this menu option to display all the results of the particular
column and clears any filter criteria specified for that column.
• Custom: Use this menu option to set filter criteria on the results
displayed in the Spreadsheet Viewer. This menu option opens the
Custom Filter window.
• <column-values>: The column values <column-value1, column-
value2,...> are displayed in the context menu to filter the column on
the basis of the displayed value. You can select a particular column
value to filter the results based on that value. Note that only some of
the column values will be displayed on the context menu. To set
filter on the basis of other values of the column, select the (Other...)
menu option.
• Other: Use this menu option to set the filter on the basis of a
specified filter criteria and a corresponding value. This menu option
displays the Custom Filter window.

The SpyGlass Design Environment Modular Schematic window is
used to display a hierarchical schematic layout of the modules analyzed
by SpyGlass. The module can be selected through the module tree
window or by selecting a message that has schematic data associated

with it as shown by an icon in the message tree or message summary.

The Modular Schematic window can be displayed by clicking the
Modular Schematic button on the SpyGlass Design Environment
toolbar.
FIGURE 46. The Modular Schematic Window
The Modular Schematic window has the following parts:

• The Modular Schematic window itself where the schematic is

displayed
• The Modular Schematic window menus that give you access to
Modular Schematic-related functions
• The Modular Schematic toolbar that contains icons for common
operations, such as print, find, redo, undo, zoom in, zoom out, zoom
fit, and preferences
• The Schematic Log window where the details of an object are
printed when you select that object
• The Schematic Legend window that displays the meaning of
highlighted colors and the text attributes applied on the objects in
that schematic window
The Modular Schematic window allows for back-annotation between
the schematic and the source code. For example, selecting a particular
gate in a given design unit will allow you to view the RTL code that
generated that gate.
The Modular Schematic window displays sources of messages in the
schematic. Selecting a message from different pages of the Message
window causes the Modular Schematic window to show the node, net,
or gateway that is related to that message. For example, if a given net
exceeds the “maximum fanout threshold”, clicking the particular
message in the Msg Tree page of the Message window causes the
Modular Schematic window to display the design unit that contains the
net, and highlights that particular net.
If an object takes a long time to be loaded on the schematic window,
you can stop the loading of the object by clicking the Stop button
( ) located at the task bar of the schematic window.
Blackboxes are displayed in a different color so that they can be easily
identified in the Modular Schematic window and the The Incremental
Schematic Window.

RTL Grouping Capabilities

In addition to showing the contents of the design, the Modular
Schematic window has advanced RTL grouping capabilities to improve
navigation and make it easier to trace logic. This is particularly useful
when viewing a module that would normally have many leaf-level
instances.
To enable the RTL grouping capability of the Modular Schematic
window, click the ( ) button on the Modular Schematic toolbar.
You can use the ( ) button to expand all the groups and their
subgroups in the current module. Other modules remain unaffected.
You can use the ( ) button to collapse all the expanded subgroups and
the objects in the current module to view the consolidated groups.
Other modules remain unaffected.
The filtered schematic view (Incremental Schematic or IS), which is commonly
used for debugging rule violation messages, does not currently utilize the
grouping capabilities in order that information does not get hidden while
debugging specific schedule instances. Moreover, gate-level (structural)
schematics also do not utilize the grouping capabilities
Always/Process Blocks in the RTL Code

The following RTL blocks in a module definition are grouped in the
Modular Schematic view:
• Process blocks (used in VHDL)
• Always blocks (used in Verilog)
These blocks are further distinguished as Sequential and Combo blocks
in the schematic view as shown below.

Each of these blocks is shown in the schematic display as a rectangle

with dashed boundary. (the boundaries of the divable instances are
shown in a dash-dot pattern). The sequential blocks and the combo
blocks are named as Sequential Block and Combo Blocks respectively
in the view. The schematic display shows these blocks as single
entities, which can be expanded for viewing the objects and sub-groups
contained in the group, by simply double clicking them.
Vectored Instances in the RTL Code

The Modular Schematic window displays the vectored or arrayed
instances in the RTL source code as single components with
appropriate bus pins. Vectors share the same master module for all the
instances in the code, and therefore, the names of the vector groups are
derived from the master modules of the instances and the number of
instances in that group.
For example, RTL_MUX x32 means that the group contains 32
instances of RTL_MUX.
The vector groups are generally shown in the schematic display as a
rectangle with a thicker dotted boundary than normal groups or

instances (analogous to netBundles being thicker than single nets). If a

vector group has the same input/output mapping as that of the
constituent instances, the vector group is shown with the same symbol
as that of the instances in the schematic view.
For example, a vector group containing a buffer with a bus input and a
bus output is shown by a buffer symbol having the same bus as input/
output.
The following illustration shows a vector group representation in the
Modular Schematic window. Note that the vector group has the same
mapping as that of the constituent instances and therefore it is
represented using the same symbol as that of the instances.
FIGURE 47. Vector Group Representation

FIGURE 48. Vector Group Representation (Expanded)
Grouping Registers and Combinational Logic
The figure displays the group having purely combinational logic as

Combo Block in the design. (You can easily distinguish the
combinational logic blocks from the sequential blocks that are shown
as Sequential Block).


You can probe an object in the currently displayed design unit in the
Modular Schematic window by clicking the object. Then, the related
objects are highlighted in other windows that are open, as follows:

Nets Source window has the source The line where the net is
file containing the net displayed. created or inferred is
grooved. If the net name is
present in the RTL line, the
net name is also highlighted.
Net and all connected Net is highlighted across the
components are added to the hierarchical boundaries.
Net is added to the Legend -
window list.
Ports Source window has the source The line where the port is
file containing the port created is grooved and the
displayed. port name is highlighted.
Port and all components Port and its connected net
connected to the port’s are highlighted across the
The net connected to the port is -
added to the Legend window
list.


Instances Source window has the source The line where the instance
file containing the instance is created or inferred is
displayed. grooved. If the instance
name is present in the RTL
line, the instance name is
also highlighted.
Instance icon is added to the Instance is highlighted.
Instance is added to the Legend -
window list.
Pins Source window has the source The line where the pin is
file containing the pin displayed. created or inferred is
grooved. If the name of the
net connected to the pin is
present in the RTL line, the
net name is also highlighted.
Pin and all components Pin and its connected net are
connected to the pin’s highlighted across the
The net connected to the pin is -
added to the Legend window
list.
NOTE: When you probe an element of a pre-compiled VHDL library cell in the
Modular Schematic window or the Incremental Schematic window, SpyGlass
performs a textual search for the element in the corresponding VHDL library
cell source file and displays it.
Using the Mouse

The Modular Schematic window makes use of “mousing” techniques
in several different ways:

Single-Clicking
Single-clicking any un-probed schematic component in the Modular
Schematic window removes all other probes and starts the probing of
that component. See Interaction with Other Windows for more details.
Repeatedly single-clicking the object in the Modular Schematic
window cycles through all occurrences of the object name in the design
using simple text search of the object name.
Control+single-clicking any unprobed object probes the object and
Control+single-clicking any probed object deselects its probe without
affecting the other probes.
If an object is already selected and you Control+single click another
object, then both objects are selected.
Using Control+single click, you can select only upto 32 objects in the
Modular Schematic window. If you select more than 32 objects, then a
warning popup dialog is displayed prompting you to deselect some of
the selected objects.
Double-Clicking
When you double-click a schematic component in the Modular
Schematic window, the module, gate, or net opens (drills-down) to the
schematic of that component (if available). Additionally, the section of
code describing the component in the source file is highlighted in the
Source window. If the component is a module that has its own
description file, then the source file is opened in the Source window,
and highlighted in the File/Design/Constraints/Instances window.

Click-Drag Combinations
Holding down the left mouse button and dragging the mouse pointer
causes viewing changes in the Modular Schematic window. When the
mouse button is released, the viewing changes as per the direction of
the mouse course. If you consider the Modular Schematic window as a
navigational map (with north being the top of the window, south being
the bottom, East being the right-hand side of the window, and West
being the left-hand side), then the following click-drag combinations
produce results:
Northwest-to-Southeast
Dragging the mouse with the left button depressed in this direction
causes a “zoom in” area to form. When the mouse button is released,
the Modular Schematic window will zoom until the area selected fills
the window.
Northeast-to-Southwest
instructs the Modular Schematic window to increase or reduce
magnification of the schematic as determined by the current settings.
As a result, when the mouse button is released, the current module of
the schematic will be completely visible in the Modular Schematic
window. This is called “zoom to fit.”
Southeast-to-Northwest
instructs the Modular Schematic window to “go up” the hierarchical
tree and displays the parent module’s schematic. When the mouse
button is released, the parent module’s schematic will be displayed in
Modular Schematic window. If the parent module had already been
displayed in the past, it will inherit the zoom settings of the prior visit.

If the parent module had not been previously viewed, it will open in
“zoom to fit” mode.
Southwest-to-Northeast
instructs the Modular Schematic window to decrease magnification of
the schematic. The length of the dragging determines how far the
Modular Schematic window will “zoom out.” A short drag in this
direction will cause the viewing area to zoom out by a small multiplier,
while dragging from one corner of the screen to the other will cause the
viewing area to zoom out by a large multiplier. When the mouse button
is released, the Modular Schematic window will zoom out with the
selected modifier.
Right-Clicking
Right-click a component in the Modular Schematic window to get the
context menu that contains the following options:
Component Name
The type and name of the selected component is shown in the first line
of the context menu.
Searching the Modular Schematic Window

Select the Find option to display the Find Dialog, as shown in the
following figure:

FIGURE 49. Modular Schematic Window - Find Dialog
In the above dialog, you can select the object type to be searched from
the object type drop-down list (Net/NetBundle selected by default). For
example, to find a port or port bus, select the Port/Portbus option from
the drop-down list.
Depending upon the object type selected from the drop-down list, the
object list is redrawn to show only nets in the schematic. Now, you can
specify the starting characters of the net name. As you start specifying
the starting characters in the search text field, the object list is
progressively filtered to show only those nets whose names start with
those characters. You can disable this auto-filtering feature by selecting
the Disable Auto Filtering option.
NOTE: The name search is case-insensitive. Thus, typing foo will find and
show foo, fOo1, FOO, Foo23, etc.

When the required net is easily accessible in the object list, click the net
name and click the find icon ( ). The corresponding net is highlighted
in the Modular Schematic window.
You can also change the highlight color for the searched net by clicking
the color indicator icon ( ) that shows the currently selected highlight
color.
You can also view the sinks and sources for the searched net using the
Next Source, Previous Source, Next Sink, and Previous Sink options
available from NSS Options button.
A searched net is also highlighted in the Source window and added to
the Legend window, if open.
Similarly, you can find and view the following objects:
• A port or port bus by selecting the Port/Portbus field from the object
type pull-down list
• A pin or pin bus by selecting the Pin/Pinbus field from the object type
pull-down list
• An instance by selecting the Instance field from the object type
pull-down list
You can also search the objects by hierarchical names, as discussed
below:
Searching Objects by Hierarchical Name
The Find dialog of the Modular Schematic Window enables you to
search the objects (instances, nets, and ports) by hierarchical name. To
implement such hierarchical search, select the Hierarchical Search option
from the drop-down list. When you select this option, additional search
options are displayed in the Find dialog, as shown in the following
figure:

Here, the names of the top design units are displayed in the result list
box. As you start specifying the starting letters of a valid hierarchical
name (using the dot hierarchy separator), the results are updated
accordingly in the result list box. You can also dive down the hierarchy
of a displayed object by double-clicking the object name in the result
listbox. The type of the objects (such as, Net, NetBundle, Port, PortBus
etc.) is also displayed along with the object names in the result listbox
(module name is displayed for instances).
You can also filter the displayed objects in the result listbox to
selectively view Instances, Ports, or Nets (or a combination of these).
To do so, select the appropriate check-box(es) and the objects displayed
in the result listbox are updated accordingly.
You can also perform case-insensitive search for finding objects by
hierarchical name in the VHDL and mixed-language modes. For this
purpose, the Use Case-Insensitive search for VHDL field has been added,
which gets enabled (only in VHDL and mixed-language modes) when
you select the Hierarchical Instance search option.
You can qualify your search to include regular expression in your
search. To do this, select the Use Advanced Search option.

NOTE: The Use Case-Insensitive search for VHDL field is selected by default
in the VHDL/mixed-language modes. Case insensitive search is performed
only inside the VHDL modules. For Verilog modules in the mixed-language
mode, this feature is switched off.
Setting Colors
Select Colors to set the color for the selected instance. The Color dialog
box appears. Choose a color and click OK. The color of the selected
instance is updated in all windows.
Viewing Object Properties

To view the basic properties of an object displayed in the schematic,
right-click the object and select Properties... The Schematic Properties
window appears (as shown below):
FIGURE 50. The Schematic Properties Window
Here, the object properties are listed, such as the object name, object

type, the full hierarchical name of the object, and text attributes
attached to the object (if any).
NOTE: Text attributes set by auxi violations or case-analysis are also shown. In
case of netbus, portbus, or pinbus, the text attributes are shown in a tabular
form, listing only those bits which have some text attributes attached.
You can also copy the text of the object properties, and paste it to
another application. To copy the text, right-click the text and select the
Copy Text option (to copy the full text) or Copy Custom option (to copy
only partial text). When you select the Copy Custom option, SpyGlass
displays the entire message text in a separate Schematic Properties
window, as shown in the following figure:
Loading or Appending to the Incremental Schematic Window

You have the additional feature of loading or appending a port or
instance component in the Modular Schematic window to the
Incremental Schematic window. Select Load to IS to clear the
Incremental Schematic window and load the selected component only
or select Append to IS to add the selected component to the Incremental
Schematic window (existing components will remain as they are.)
When a component is added to the Incremental Schematic window by
selecting it in the Modular Schematic window, only a component icon
is shown without connections (for ports) and without pins (for
instances). Double-click the port component to add the connected net
and all its end connections (ports or instances). Double-click an
instance component to add the instance pins.

NOTE: When more than one instance of different hierarchies is added or

cross-probed to the Incremental Schematic, then the parent hierarchies of the
instances (upto their common ancestor) also get added to the Incremental
Schematic. By default, this feature is turned on and can be turned off by
clearing the check-box for the Maintain Relative Hierarchies for Instances in IS
option from the Schematic Page of the Tools > Preferences menu option.
Viewing the RTL Source Code of an Object

To view the RTL source code corresponding to an object displayed in
the Modular Schematic Window, right-click the object and select Cross-
Reference to RTL option from the context menu. The source code
corresponding to the object is highlighted in The Source Window.
NOTE: When you right-click on a signal in the Modular Schematic window, this
option may appear as Cross-Reference to RTL/Waveform Viewer (instead of
Cross-Reference to RTL). This occurs if the selected violation message has a
Waveform Viewer associated with it and that signal is also present in that
Waveform Viewer.
Viewing the Subgroups

To expand all the subgroups contained within the selected group, right-
click a group and select the Expand All Sub Groups context menu option.
Then, the subgroups contained within the selected group are displayed
in the schematic window.
NOTE: To view/hide the subgroups within the selected group, you need to click
the Enable Groups button ( ) located on the toolbar.
Hiding the Subgroups

To hide all the displayed subgroups contained within the selected
group, right-click a group and select the Collapse All Sub Groups context
menu option. Then, the subgroups contained within the selected group
are hidden in the schematic window..

To view/hide the subgroups within the selected group, you need to click the
Enable Groups button ( ) located on the toolbar.
Viewing the Case Analysis Settings on an Object

In case, there are case analysis settings specified for an object (using
the set_case_analysis/test_mode constraints in SGDC/SDC
files), the object is tagged with the forced value in the Modular
Schematic Window. To view the source(s) of these settings, right-click
on the object and select Cross-Reference Case Analysis...menu option
from the context menu. The SGDC/SDC file containing the first found
case analysis setting is displayed in the Source Window and the line
containing the constraint is highlighted.
Viewing SDC/SGDC Constraints Set on an Object

You can view the SDC/SGDC constraints set on an object (port, net,
instance, or terminal). To do so, right-click on the object and select
Cross-Reference to Constraints ... menu option from the context menu.
When you select this option, the constraints (SDC/SGDC) set on the
object are displayed in the Constraints List window, as shown below.
NOTE: If the constraints of a particular type, say SGDC are not set for an
object then they will not be displayed in the Constraints List window.
NOTE: If no constraints are set on an object, the Cross-Reference to
Constraints... context menu option of that object would be disabled.

NOTE: When you right-click a net and select the Cross-Reference to

Constraints... option from the context menu, you can also see the constraints
set on ports of connected nets in addition to the constraints set on the net.
Here, the name of the object is displayed on the top and the SDC/
SGDC constraints set on the object are listed in a tree format in the
section below. The Constraint column contains the name of the
constraint, the File column contains the name of the corresponding
SDC/SGDC file, the Line No. column contains the line number of the
constraints file where the constraint is defined, and the BitRange column
contains the bit range of the selected constraint.
To view the object (on which the constraints are set) in the Modular
Schematic window, click the name of the object on the Constraint List
window. This will highlight the object in the Modular Schematic
window.
You can also view the definition of each of the listed constraints in the
corresponding constraints file. To do so, click the row for a constraint
listed in the Constraints List dialog. The corresponding line in the
constraints file where the selected constraint is defined is highlighted in
The Source Window.
Viewing Connected Nets

To view the nets connected to each bit of a pinbus/portbus/netbundle,
select List connected nets... (for pinbus and portbus) or List Nets... (for
netbundle). A window appears listing all nets connected to the pinbus/
portbus/netbundle along with their logic values, if available. For
unconnected bits, it is indicated that the bit is hanging.
Viewing Library Cell Instance Information

For instances of SpyGlass-compiled gate library cells, you can view the
interface and functionality as inferred by the SpyGlass Library
Compiler while compiling the gates library.
Right-click on such an instance and select Cell Information... A text box

appears that lists the cell name, cell type, cell source library (.sglib file),
inferred pin interface, and inferred functionality. You can print the
displayed information by clicking the Print button.
Viewing SpyGlass-Generated Cell Macro Definitions

During synthesis, SpyGlass adds cells from its internal library for
inferred objects like MUXes, SelectBoxes, etc. You can view the
corresponding macro definition by right-clicking the macro instance in
the Modular Schematic window and then selecting Show Macro
Definition... from the context menu. A window appears displaying the
corresponding macro definition (from the <your-inst-dir>/
SPYGLASS_HOME/auxi/target_libs/generic/macro_lib.v* directory), if
available.
Viewing Debug Data

To view the debug data, right-click the object and select any of the
following options depending upon your requirement:
• Show Debug Data-> DFT option to view DFT debug data. For more
details, refer to the DFT Back Annotation Feature section.
• Show Debug Data-> Power Est option to view power data.
• Show Debug Data-> Clock-reset option to view CDC data.
Generating Constraints
You can generate the following constraints on an object (port, net, and
terminal only):
• test_mode
• set_case_analysis
• reset
• clock

• cdc_false_path
To generate a constraint, perform the following steps:
1. Right-click on the object and select the Set SGDC Constraints... option
from the context menu. When you select this option the SGDC
Constraints Editor window is displayed as shown below.
Here, the name of the object is displayed in the object name text field.
The Preview Constraint section displays the options selected for the
option.
2. Select the type of constraint from the Select Constraint Type: pull-
down list.
When you select a constraint, the Constraints Argument section of
the SGDC Constraint Editor window is populated with the
arguments that apply on the selected constraint.
The test_mode constraint contains the following arguments:

• name (mandatory): Specifies the testmode port/pin’s full

hierarchical name.
• value (mandatory): Specifies the value of the testmode pin as 0 or
1. The default value is 1.
• scanshift: Specifies whether the testmode pin is required only
during scanshift operations.
• invertInCapture: Indicates that the value specified in the value field
argument should be simulated in the shift mode as is whereas the
inverse of this value (complement of the value for single-bit
values or last-bit complement of pattern values) should be
simulated in the capture mode.
• capture: Specifies whether the testmode pin is required only
during capture operations.
• captureATSpeed: Specifies the capture condition during at-speed
testing.
• captureStatic: Specifies the capture condition during static testing.
• noFaultComb: Specifies that faults that are becoming undetectable
because of the testmode should be treated as detectable in
combinational elements.
• noFaultSeq: Specifies that faults that are becoming undetectable
because of the testmode should be treated as detectable in
sequential elements.
The set_case_analysis constraint contains the following
arguments:
• name (mandatory): Specifies the name of the
set_case_analysis constraint.
• value (mandatory): Specifies the value of the
set_case_analysis constraint.
The reset constraint contains the following arguments:
• name (mandatory): Specifies the name of the reset port/pin.
• value: Specifies the reset value as 0 or 1. The default value is 1.

• soft: Specifies that the reset is to be used for both initial state
search as well as during functional analysis.
• sync: Specifies that the reset type is synchronous.
The clock constraint contains the following arguments:
• name (mandatory): Specifies the clock port/pin name.
• value: Specifies the value of the clock port/pin.
• fflimit: Specifies the maximum number of flip-flops that can be
driven by the clock.
• period: Specifies the clock period that needs to used in clock
domain crossing checks.
• edge: Specifies the clock edge value. By default, the clock edges
are assumed to be 0, 50, 100 and so on.
• domain: Specifies the clock domain name.
• polarity: Specifies the polarity of the clock.
• testclock: Specifies that the clock used is a testclock.
The cdc_false_path constraint contains the following
arguments:
• from (mandatory): Specifies The name of a clock, a master design
unit, a flip-flop output net, or a pin (of a master design unit)
• through: Specifies the name of a internal net, master design unit,
or a pin (of a master design unit).
• to (mandatory): Specifies the name of a clock, a master design
unit, a flip-flop output net, or a pin (of a master design unit)
NOTE: You can enter the name of the objects in the from, through, or to
fields or right click any field and select the last selected object from the
Select Object from MS/Select Object from IS context menu options.
You can also add the cdc_false_path constrains for the
clock_sync01 rule through the spreadsheet viewer. See Creating
cdc_false_path Constraints for more details.

3. Click the Generate button to generate the constraints for the selected
object. When you select this option, the generated constraint(s) is
displayed at the bottom of the Constraint Editor window, as shown
below:
NOTE: If the number of constraints added exceeds the page size (specified
using the Pg.Size button), then you can click the ( ) buttons to go to the
previous or next pages.
4. Type the name of the constraint file to which you want to add the
constraints. You can also click to select a constraint file. If the
constraint file does not exist in the list then you can click the Select
SGDC File button and browse to the directory that contains the
required SGDC file.

5. Click the Append button to add the new generated constraints to the
specified SGDC file.
6. Click the Append & Run button to apply your settings and run
SpyGlass analysis with the new commands.
NOTE: You need not specify the current design in the SGDC Constraint
Editor window. SpyGlass automatically inserts the appropriate current
design whenever required.
7. Click Close to close the SGDC Constraint Editor window.
The Constraints Editor window also contains the following buttons:
• Bit Select: Enables you to select multiple bits for a constraint.
Consider an example in which you want to specify the bit range for a
four dimensional vector net. In this case, when you click the Bit
Select button, the Select Vector Bits for MultiDim Object dialog is
displayed, as shown in the following figure:
In this dialog, you can specify the bit range by selecting an

appropriate bit in each dimension, except the last dimension. Hence,

in this case, you can select one bit in each field, Dimension 1,
Dimension 2, and Dimension 3. The last dimension (Dimension 4 in this
case) enables you to specify the part select for the vector signal. You
can specify the part select by selecting multiple bits in the last
dimension. All the selected bits are simultaneously displayed in the
Selected field.
Once you select the bit range, click the Ok button. The specified bit
range gets appended to the constraint name in the name field. You
can also specify the bit range by entering the values in the From and
To fields and clicking the Go button. When you click the Go button,
the options for the specified bit range are automatically selected.
You need to click the Ok button to append the bit range to the
constraint name.
• Clear: Clears the values entered/selected by you.
• Edit: Enables you to edit the values specified by you for the selected
constraint
• Update: Updates the values entered/selected by you. When you click
the Update button the updated values can be seen in the generated
constraint at the bottom of the SGDC Constraint Editor window.
NOTE: When you update the values of a constraint(s), you need to append
the constraint(s) to the SGDC file again.
• : Enables you to move the selected constraint up in the list.
• : Enables you to move the selected constraint down the list.
• : Deletes the selected constraint. To delete a constraint, select the

constraint, and click .

Modular Schematic Window Menu Bar

The Modular Schematic window menu bar has the following options:
File > Print

Use this menu option to print the schematic or save it as a Postscript
file.
When you select this menu option, the Schematic Print dialog appears:
FIGURE 51. Modular Schematic Window - Schematic Print Dialog
Select or enter as follows:

• Destination
Select Printer to print the schematic or select Postscript File to save the
schematic as a Postscript file.
• Path
If you have selected to save the schematic as a Postscript file, enter
the full path name of the destination file. Alternatively, click
Browse... and navigate through the directory structure to set the
destination file name. Click Save in the Save As dialog to set the file

name.
NOTE: Clicking Save in Save As dialog does not save the schematic to a
postscript file; it only sets the file name. You still need to click OK in the Print
Dialog to save the schematic to a postscript file.
• Orientation
Select Landscape to print or save the schematic in a landscape
orientation, select Portrait to print or save the schematic in a portrait
orientation, or select Auto to let SpyGlass decide the best-fit
orientation.
• Color Mode
Select Inverted Color to print or save the schematic in a reverse color
mode, select Mono to print or save the schematic in monochrome
mode, or select Color to print or save the schematic in a color mode.
• View
Select full to print or save the full schematic or select current to print
or save the currently displayed view of the schematic.
• Size
Select the target paper size from the supported paper sizes.
• Highlight Info
If you have selected to print or save the schematic in Color mode,
you can set this option to print the highlighted objects with their
respective colors.
You can also invoke the Schematic Print dialog by using the <Ctrl>+P
key combination on your keyboard or by clicking the ( ) button on
the Modular Schematic toolbar located below the menu bar.
File > Save As

Use this menu option to save the schematic view as an image. When
you select this menu option, the Save Schematic As dialog appears as

shown below.

• Fullfit
Select this option to save the complete schematic view as an image.
• Visible
Select this option to save only the visible portion of the schematic as
an image.
• Visible with Highlight
Select this option to save the visible portion of the schematic along
with the highlighted information as an image.
• Image Size
Enter the size in which you want save the image in the provided text
fields.
• Image Type
Click the Image Type drop-down list and select the format in which
you want to save the image. The available formats are bmp, gif, jpeg,
and png.
• Save As
Enter the location where you want to save the image in the Save As
text field. Alternatively, click ( ) and browse to the location where
you want to save the image.

Click Save to save the image.

You can also open the Save Schematic As dialog by clicking ( ) on
the Schematic toolbar.
File > Close

Use this menu option to close the Modular Schematic window.
You can also close the Modular Schematic window by pressing the
<Ctrl>+C key combination on your keyboard.
Edit > Undo

Use this menu option to undo a probe action in the Modular Schematic
window.
You can also undo a probe action by pressing the <Ctrl>+<Z> key
combination on the keyboard or by clicking the ( ) button on the
Modular Schematic toolbar. Clicking the ( ) button repeatedly leads
to the object from where the probe was initiated.
Edit > Redo

Use this menu option to redo a probe action that was previously undone
in the Modular Schematic window.
You can also redo a probe action by pressing the <Ctrl>+<Y> key
Modular Schematic toolbar.
NOTE: The Redo option is enabled only when you have undone a probe action
once.

Edit > Clear All Items

Use this menu option to clear all selections in the Modular Schematic
window.
You can also clear all selections by pressing the <Shift>+C key
Edit > Find...

Use this menu option to find a net, port, or instance in the schematic.
See Searching the Modular Schematic Window for more details.
You can also invoke the Find Dialog by pressing the <Ctrl>+<F> key
combination on the keyboard or by right-clicking anywhere in the
Modular Schematic Window and selecting Find... You can also invoke
the Find dialog by clicking the ( ) button on the Modular Schematic
toolbar.
Edit > Set Display Mode

Use this menu option to set the Auxiliary Message display mode
(Selective Display or Complete Display).
This setting is normally made from the Auxiliary Message Display Mode
setting in the Misc Page of the Tools > Preferences menu option.
Edit > Show Case Analysis

Use this menu option to annotate the related show case analysis
message (if any) as an auxiliary message over the currently displayed
message. In case, there are multiple related show case analysis
messages, you can select the message(s) to be annotated in the Show
Case Analysis dialog that appears when you select this menu option.

NOTE: Before selecting a case analysis option, it is recommended to set the

Display mode to Selective before performing case analysis.
NOTE: You cannot select the SHIFT, CAPTURE, CAPTURE_ATSPEED mode
options together. For example, if you have selected the SHIFT mode options
and you try to select the CAPTURE options also, then the Conflicting Case
Analysis dialog appears prompting you to clear the previously selected options
(SHIFT mode options) to enable the selection of CAPTURE mode options.
You can also press the <Ctrl>+A key combination on the keyboard to
invoke the Show Case Analysis dialog.
Edit > Clear All Case Analysis

Use this menu option to clear all case analysis annotations in the
current view.
You can also press the <Shift>+A key combination on the keyboard to

clear all case analysis annotations.
Edit > Preferences

Use this option to invoke the Preferences dialog. See Tools >
Preferences for more details.
You can also invoke the Preferences dialog by pressing the <Ctrl>+<R>
key combination on the keyboard or by clicking the ( ) button on the
View > Show Schematic Legend

Use this option to invoke the Schematic Legend window. This window
displays the meaning of highlighted colors in schematic and the text
attributes applied on the objects in that schematic window.
Once the Schematic Legend window is displayed, this menu option
changes to Hide Schematic Legend. You can select this option to hide the
Schematic Legend window.
View > Show Classic Legend Window

Use this menu option to invoke The Legend Window.
NOTE: This menu option is visible only if the Enable Classic Legend option is
selected in the Preferences dialog. For details on the Preferences dialog, refer
to the section, Tools > Preferences.
View > Zoom > In

Use this menu option to zoom in the current schematic view.
You can also zoom in by pressing the <Z> key on the keyboard or by
clicking the ( ) button on the Modular Schematic window.

View > Zoom > Out

Use this menu option to zoom out from the current schematic view.
You can also zoom out by pressing the <O> key on the keyboard or by
clicking the ( ) button on the Modular Schematic toolbar.
View > Zoom > Fit

Use this menu option to display the complete schematic of the current
design unit in the Modular Schematic window.
You can also zoom fit by pressing the <F> key on the keyboard or by
clicking the ( ) button on the Modular Schematic toolbar.
View > Pan > Left

Use this menu option to pan left in the current schematic view.
You can also pan left by pressing the left arrow key on the keyboard.
View > Pan > Right

Use this menu option to pan right in the current schematic view.
You can also pan right by pressing the right arrow key on the keyboard.
View > Pan > Up

Use this menu option to pan up in the current schematic view.
You can also pan up by pressing the up arrow key on the keyboard.
View > Pan > Down

Use this menu option to pan down in the current schematic view.

You can also pan down by pressing the down arrow key on the
keyboard.
View > Go To Parent Hierarchy

Use this menu option to view the parent hierarchy of the design unit
currently displayed in the Modular Schematic window.
You can also view the parent hierarchy by pressing the <U> key on the
keyboard.
Help
Use this menu to view SpyGlass Help options. See Help Menu for more
detail on SpyGlass Help options.
The Incremental Schematic Window

The SpyGlass Design Environment Incremental Schematic window is
used to display selected portions of the (flattened) design schematic
across hierarchical boundaries.
The Incremental Schematic window can be displayed by clicking the
Incremental Schematic button on the SpyGlass Design Environment
toolbar.

FIGURE 52. The Incremental Schematic Window
The Incremental Schematic window has the following parts:

• The Incremental Schematic window itself where the schematic
portion is displayed.
• The Incremental Schematic window menus that give you access to
incremental schematic-related functions
• The Incremental Schematic toolbar that contains icons for common
operations, such as print, find, redo, undo, zoom in, zoom out, zoom
fit, and preferences

• The Log Schematic window where the details of an object are

printed when you select that object.
• The Schematic Legend window that displays the meaning of
highlighted colors in schematic and the text attributes applied on the
objects in that schematic window
The Incremental Schematic window displays all components (across
hierarchical boundaries) involved in a selected message or a probed
component. You can select more than one message at a time and view
all components involved in the selected messages.
If an object takes a long time to be loaded on the schematic window,
you can stop the loading of the object by clicking the Stop button
( ) located at the task bar of the schematic window.
If the Incremental Schematic window contains an encrypted instance,
you cannot dive in that instance.

The interaction of the Incremental Schematic window with other
windows is same as that of the Modular Schematic window except that
the Source window and the Modular Schematic window are updated
when a schematic component of another module is selected.
IS Probes
The Incremental Schematic window uses a different type of probe
called IS Probes that are different from the normal probes.
An IS Probe is created when:
• A component is loaded from the Modular Schematic window to the
Incremental Schematic window. See Loading or Appending to the
Incremental Schematic Window for details.

• A component in the Incremental Schematic window is explored

further by double-clicking (see Double-Clicking) or by tracing input
or output cones (see Tracing Cones).
The IS Probes can be cleared by right-clicking anywhere in the
Incremental Schematic window and selecting Clear All IS Probes from
the context menu or by clicking Clear IS Probes in The Legend Window.
NOTE: When an instance is cross-probed into the Incremental Schematic from
any other window (such as from RTL, Instance Browser, Power Browser,
Design Tree etc.), then the parent hierarchies of the instances also get added
to the Incremental Schematic. By default, this feature is turned on and can be
turned off by clearing the check-box for the Maintain Relative Hierarchies for
Instances in IS option from the Schematic Page of the Tools > Preferences
menu option.
NOTE: SpyGlass does not allow you to cross-probe to the RTL files of
encrypted design units. If you try to cross-probe to the RTL of such design
units, SpyGlass displays a message in the RTL viewer specifying that the file is
encrypted.
Using the Mouse

The Incremental Schematic window makes use of “mousing”
techniques in several different ways:
Single-Clicking
Single-clicking any un-probed schematic component removes all other
probes and starts the probing of that component. See Interaction with
Other Windows for more details.
Repeatedly single-clicking the object in the Incremental Schematic
window cycles through all occurrences of the object name in the design
using simple text search of the object name.
Control+single-clicking any unprobed object probes the object and

Control+single-clicking any probed object deselects its probe without

affecting the other probes.
If an object is already selected and you Control+single click another
object, then both objects are selected.
Using Control+single click, you can select only upto 32 objects in the
Incremental Schematic window. If you select more than 32 objects,
then a warning popup dialog is displayed prompting you to deselect
some of the selected objects.
Double-Clicking
When you double-click a port or pin schematic component in the
Incremental Schematic window, the schematic is expanded to show the
connected net and all its end connections (instances or ports).
When only one component is connected to the IS Probed port or pin,
the connected component is displayed with a solid line connection.
However, if there are multiple components connected to the IS Probed
port or pin, the first found component is displayed with a dotted line
connection. Double-click the dotted line connection and the next found
component connected to the IS Probed port or pin is displayed. If it is
the only other component connected to the IS Probed port or pin, then
the component is displayed with a solid line connection. Otherwise, the
component is displayed with a dotted line connection. Continue
double-clicking the dotted line connection till all connected
components are added with solid line connections.
When you double-click an instance schematic component in the
pins of that instance.

When you double-click a pinbus schematic component in the

probed signals and objects connected to these probed signals. Set the
Expand all signals of the Pinbus on Double Clicking option in the Schematic
Page of the Tools > Preferences menu option to have the schematic
expanded to show all connected nets and the objects connected to these
connected nets whenever you double-click a pinbus.
NOTE: Double-clicking works as a toggle. For example, when you double-click
an instance that is currently showing only the pins involved in the probe, the
schematic is expanded to show the pins of that instance. Now, double-clicking
again will bring back the original view. Corresponding messages are displayed
in the Log section of the Incremental Schematic window.
NOTE: When one or more pins of an instance have case analysis settings and
you have selected the View > Show Case Analysis menu option, double-
clicking on the instance for the first time expands the schematic to show the
currently showing pins and those pins with case analysis settings. Double-
clicking again expands the schematic to display all pins of the instance and
their case analysis settings, if any. Double-clicking the third time returns the
schematic to the original display. Corresponding messages are displayed in the
Log section of the Incremental Schematic window.
Click-Drag Combinations
Holding down the left mouse button and dragging the mouse pointer
causes viewing changes in the Incremental Schematic window. When
the mouse button is released, the viewing changes as per the direction
of the mouse pointer. If you consider the Incremental Schematic
window as a navigational map (with north being the top of the window,
south being the bottom, East being the right-hand side of the window,
and West being the left-hand side), then the following click-drag
combinations produce results:

Northwest-to-Southeast
causes a “zoom in” area to form. When the mouse button is released,
the Incremental Schematic window will zoom until the area selected
fills the window.
Northeast-to-Southwest
instructs the Incremental Schematic window to increase or reduce
magnification of the schematic as determined by the current settings.
As a result, when the mouse button is released, the current module of
the schematic will be completely visible in the Modular Schematic
window. This is called “zoom to fit.”
Southwest-to-Northeast
instructs the Incremental Schematic window to decrease magnification
of the schematic. The length of the dragging determines how far the
Incremental Schematic window will “zoom out.” A short drag in this
direction will cause the viewing area to zoom out by a small multiplier,
while dragging from one corner of the screen to the other will cause the
viewing area to zoom out by a large multiplier. When the mouse button
is released, the Incremental Schematic window will zoom out with the
selected modifier.
NOTE: The Southeast-to-northwest click-and-drag combination available in the
Modular Schematic window (for going up the module hierarchy) is not
applicable for the Incremental Schematic window.
Southeast-to-Northwest
instructs the Incremental Schematic window to “go up” the hierarchical

tree of the object under the starting point of the dragging action and to
display the parent module’s boundary.
Right-Clicking
Right-click a component in the Incremental Schematic window to get
the context menu:
Component Name
The name of the selected component is shown in the first line of the
context menu.
Convert to RTL probe

Clicking an object in the Incremental Schematic window cross-probes
the object in other SDE windows (such as the Source window, the
Design View page, etc.) and the corresponding entry is also added to
The Legend Window. This type of probe (by clicking an object in the
Incremental Schematic window) is called “RTL probe” or normal
probe. However, in some cases, you may need to first locate an object
in the Incremental Schematic window before creating “RTL probe” for
that object. In such cases, you can first create IS Probes for pins (by
double-clicking the pins) to add the objects connected to the pins in the
Incremental Schematic window (IS probes do not update other SDE
windows). When the desired object is found in the Incremental
Schematic window (after multiple “IS probes”), you can convert the
“IS probe” into an “RTL probe” by right-clicking the desired object and
selecting the Convert to RTL probe menu option from the context menu.
Then, the object will be cross-probed across other SDE windows and
the corresponding entry will also be added to the Legend window. You
can also clear all “IS probes” in the Incremental Schematic window by
again right-clicking the object and selecting the Clear All IS Probes menu
option from the context menu. Then, all the previous “IS probes” will
be removed and only “RTL probes” will remain in the Incremental

Schematic window.
NOTE: When you right-click on a signal in the Incremental Schematic window,
this option may appear as Convert to RTL probe/Waveform Viewer (instead of
Convert to RTL probe). This occurs if the selected violation message has a
Waveform Viewer associated with it and that signal is also present in that
Waveform Viewer.
NOTE: SpyGlass does not allow you to cross-probe to the RTL of encrypted
design units. If you try to cross-probe to RTL of such design units, SpyGlass
displays a message in the RTL viewer specifying that the file is encrypted.
Viewing the RTL Source Code of an Object

To view the RTL source code corresponding to an object displayed in
the Incremental Schematic Window, right-click the object and select
Cross-Reference to RTL option from the context menu. The source code
corresponding to the object is highlighted in The Source Window.
NOTE: When you right-click on a signal in the Incremental Schematic window,
this option may appear as Cross-Reference to RTL/Waveform Viewer (instead
of Cross-Reference to RTL). This occurs if the selected violation message has
a Waveform Viewer associated with it and that signal is also present in that
Waveform Viewer.
Viewing the Case Analysis Settings on an Object

In case, there are case analysis settings specified for an object (using
the set_case_analysis/test_mode constraints in SGDC/SDC
files), the object is tagged with the forced value in the Incremental
Schematic Window. To view the source(s) of these settings, right-click
on the object and select Cross-Reference Case Analysis from the context
menu. The SGDC/SDC file containing the first found case analysis
setting is displayed in the Source Window and the line containing the
constraint is highlighted.
Viewing SDC/SGDC Constraints Set on an Object

You can view the SDC/SGDC constraints set on an object (port, net,
instance, or terminal). To do so, right-click on the object and select
Cross-Reference to Constraints ... menu option from the context menu.
When you select this option, the constraints (SDC/SGDC) set on the
object are displayed in the Constraints List window, as shown below.
NOTE: If the constraints of a particular type, say SGDC are not set for an
object then they will not be displayed in the Constraints List window.
NOTE: If no constraints are set on an object, the Cross-Reference to
Constraints... context menu option of that object would be disabled.
NOTE: When you right-click a net and select the Cross-Reference to
Constraints... option from the context menu, you can also see the constraints
set on ports of connected nets in addition to the constraints set on the net.
Here, the name of the object is displayed on the top and the SDC/
SGDC constraints set on the object are listed in a tree format in the
section below. The Constraint column contains the name of the
constraint, the File column contains the name of the corresponding
SDC/SGDC file, the Line No. column contains the line number of the
constraints file where the constraint is defined, and the BitRange column
contains the bit range of the selected constraint.
To view the object (on which the constraints are set) in the Modular
Schematic window, click the name of the object on the Constraint List
window. This will highlight the object in the Modular Schematic
window.
You can also view the definition of each of the listed constraints in the

corresponding constraints file. To do so, click the row for a constraint

listed in the Constraints List dialog. The corresponding line in the
constraints file where the selected constraint is defined is highlighted in
The Source Window.
Viewing Debug Data

To view the debug data, right-click the object and select any of the
following options depending upon your requirement:
• Show Debug Data-> DFT option to view DFT debug data. For more
details, refer to the DFT Back Annotation Feature section.
• Show Debug Data-> Power Est option to view power data.
• Show Debug Data-> Clock-reset option to view CDC data.
Viewing Object Properties

To view the basic properties of an object displayed in the schematic,
right-click the object and select Properties... The Incremental Schematic
Properties window appears (as shown below):

FIGURE 53. The Incremental Schematic Properties Window
Here, the object properties are listed, such as the object name, object
type, the full hierarchical name of the object, and text attributes
attached to the object.
NOTE: Text attributes set by auxi violations or case-analysis are also shown. In
case of netbus, portbus, or pinbus, the text attributes are shown in a tabular
form, listing only those bits which have some text attributes attached.
You can also copy the text of the object properties (using the <Ctrl>+<C>
key combination or the context menu) and paste it to another
application.
Viewing/Tracing Connected Nets

To view/trace the nets connected to each bit of a pinbus/netbundle/
portbus, select List/Trace Connected Nets. A dialog appears listing all
nets connected to the bits of the pinbus/netbundle/portbus. For
unconnected bits, it is indicated that the bit is hanging.
The List/Trace Connected Nets dialog automatically appears if there are

no probed signals and you double-click a pinbus/netbundle/portbus.

You can also set the Show List/Trace Connected Nets Dialog on Double
Clicking option in the Schematic Page of the Tools > Preferences menu
option to have the List/Trace Connected Nets dialog appear whenever you
double-click a pinbus/netbundle/portbus.
Tracing Cones
You can also trace the input cone (for input or inout pins) or output
cone (for output or inout pins) of any pin in the schematic portion
displayed in the Incremental Schematic window.
Right-click a pin to get the component context menu.
For an input or inout pin:
• Select Show Input Cone > To Primary Inputs to view all components in
the fanin cone of the selected pin up to primary inputs.
• Select Show Input Cone > To Flops to view all components in the fanin
cone of the selected pin up to flip-flops.
• Select Show Input Cone > To Flops/Latches to view all components in
the fanin cone of the selected pin up to flip-flops and latches.
• Select Show Input Cone > To Flops/Latches/BlackBoxes to view all
components in the fanin cone of the selected pin up to flip-flops.
latches, and blackboxes.
• Select Show Input Cone > Define End Point... to set the end points
(instances) up to which you want to view the fanin components.
Then, the Define End Point dialog appears listing all the master
modules instantiated in the design:

FIGURE 54. Define Endpoint Dialog
Select the master module(s) and then click Show Cone. The
Incremental Schematic window is updated to show all components
in the fanin of the selected pin up the instances of the selected master
module(s). You can search for an instance by entering its name in the
Find Text field and clicking Search. As you type the starting letters of
a valid module name, the results are updated accordingly.
• Select Show Input Cone > To Module Boundary to display the input cone
till the boundary of the current design unit in which the cone is being
seen.
The procedure for tracing output cones for output or inout pins is same
using the Show Output Cone option in the context menu.
Setting SGDC Constraints

You can set the following constraints for an object (port, net, and
terminal only):
• test_mode
• reset
• clock
• cdc_false_path

For more details on setting constraints, refer to the Generating

Constraints section.
Searching the Incremental Schematic Window

Select the Find option to display the Find Dialog. This dialog is same as
what is displayed for the Modular Schematic window. For details on this
dialog, refer to the section, Searching the Modular Schematic Window.
Viewing Library Cell Instance Information

For instances of SpyGlass-compiled gate library cells, you can view the
interface and functionality as inferred by the SpyGlass Library
Compiler while compiling the gates library.
Right-click on such an instance and select Cell Information... A text box
appears that lists the cell name, cell type, cell source library (.sglib file),
inferred pin interface, and inferred functionality. You can print the
displayed information by clicking the Print button.
Incremental Schematic Window Menu Bar

The Incremental Schematic window menu bar has the following
options:
File > Print

Use this menu option to print the schematic or save it as a Postscript
file.
When you select this menu option, the Schematic Print dialog appears:

FIGURE 55. Incremental Schematic Window - Schematic Print Dialog

• Destination
Select Printer to print the schematic or select Postscript File to save the
schematic as a Postscript file.
• Path
If you have selected to save the schematic as a Postscript file, enter
the full path name of the destination file. Alternatively, click
Browse... and navigate through the directory structure to set the
destination file name. Click Save in the Save As dialog to set the file
name.
NOTE: Clicking Save in the Save As dialog does not save the schematic to
a postscript file; it only sets the file name. You still need to click Ok in the
Print Dialog to save the schematic to a postscript file.
• Orientation
Select Landscape to print or save the schematic in a landscape
orientation, select Portrait to print or save the schematic in a portrait
orientation, or select Auto to let SpyGlass decide the best-fit
orientation.

• Color Mode
Select Inverted Color to print or save the schematic in a reverse color
mode, select Mono to print or save the schematic in monochrome
mode, or select Color to print or save the schematic in a color mode.
• View
Select full to print or save the full schematic or select current to print
or save the currently displayed view of the schematic.
• Size
Select the target paper size from the supported paper sizes.
• Highlight Info
If you have selected to print or save the schematic in Color mode,
you can set this option to print the highlighted objects with their
respective colors.
You can also invoke the Schematic Print dialog by using the <Ctrl>+P
key combination on your keyboard or by clicking the ( ) button on
the Incremental Schematic toolbar located below the menu bar.
File > Close

Use this menu option to close the Incremental Schematic window.
You can also close the Incremental Schematic window by pressing the
<Ctrl>+<C> key combination on the keyboard.
Edit > Undo

Use this menu option to undo a probe action (single-clicking, double-
clicking, as well as tracing of input/output cones) in the Incremental
Schematic window.
You can also undo a probe action by pressing the <Ctrl>+<Z> key

Incremental Schematic toolbar. Clicking the ( ) button repeatedly

leads to the object from where the probe was initiated.
Edit > Redo

Use this menu option to redo a probe action that was previously undone
in the Incremental Schematic window.
You can also redo a probe action by pressing the <Ctrl>+<Y> key
Incremental Schematic toolbar.
NOTE: The Redo option is enabled only when you have undone a probe action
once.
Edit > Clear All Items

Use this menu option to clear the Incremental Schematic window.
You can also clear the Incremental Schematic window by pressing the
<Shift+<C> key combination on the keyboard or by right-clicking
anywhere in the window to get the context menu and select Clear
Window to remove all displayed components.
Edit > Find...

Use this menu option to find a net, port, or instance in the schematic.
See Searching the Incremental Schematic Window for more details.
You can also invoke the Find Dialog by pressing the <Ctrl>+<F> key
combination on the keyboard or by right-clicking anywhere in the
Incremental Schematic Window and selecting Find... You can also
invoke the Find dialog by clicking the ( ) button on the Modular
Schematic toolbar.

Edit > Set Display Mode

Use this menu option to set the Auxiliary Message display mode
(Selective display or Complete display).
This setting is normally made from the Auxiliary Message Display Mode
setting in the Misc Page of the Tools > Preferences menu option.
Edit > Show Case Analysis

Use this menu option to annotate the related show case analysis
message (if any) as an auxiliary message over the currently displayed
message. In case, there are multiple related show case analysis
messages, you can select the message(s) to be annotated in the Show
Case Analysis dialog that appears when you select this menu option.
NOTE: Before selecting a case analysis option, set the Display mode to
Selective before performing case analysis.

NOTE: You cannot select the SHIFT, CAPTURE, and CAPTURE_ATSPEED

mode options together. For example, if you have selected the SHIFT mode
options and you try to select the CAPTURE options also, then the Conflicting
Case Analysis dialog appears prompting you to clear the previously selected
options (SHIFT mode options) to enable the selection of CAPTURE mode
options.
You can also press the <Ctrl>+A key combination on the keyboard to
invoke the dialog.
Edit > Clear All Case Analysis

Use this menu option to clear all case analysis annotations in the
current view.
You can also press the <Shift>+A key combination on the keyboard to
clear all case analysis annotations.
Edit > Preferences

Use this option to invoke the Preferences dialog. See Tools >
Preferences for more details.
You can also invoke the Preferences dialog by pressing the <Ctrl>+<R>
key combination on the keyboard or by clicking the ( ) button on the
View > Show Schematic Legend

Use this option to invoke the Schematic Legend window. This window
displays the meaning of highlighted colors in schematic and the text
attributes applied on the objects in that schematic window.
Once the Schematic Legend window is displayed, this menu option
changes to Hide Schematic Legend. You can select this option to hide the
Schematic Legend window.

View > Show Classic Legend Window

Use this menu option to invoke The Legend Window.
NOTE: This menu option is visible only if the Enable Classig Legend option is
selected in the Preferences dialog. For details on the Preferences dialog, refer
to the section, Tools > Preferences.
View > Zoom > In

Use this menu option to zoom in the current schematic view.
You can also zoom in by pressing the <Z> key on the keyboard or by
clicking the ( ) button on the Incremental Schematic window
View > Zoom > Out

Use this menu option to zoom out from the current schematic view.
You can also zoom out by pressing the <O> key on the keyboard or by
clicking the () button on the Incremental Schematic toolbar.
View > Zoom > Fit

Use this menu option to display the complete schematic of the current
design unit in the Incremental Schematic window.
You can also zoom fit by pressing the <F> key on the keyboard or by
clicking the ( ) button on the Incremental Schematic toolbar.
View > Pan Left

Use this menu option to pan left in the current schematic view.
You can also pan left by pressing the left arrow key on the keyboard.

The Legend Window
View > Pan > Right

Use this menu option to pan right in the current schematic view.
You can also pan right by pressing the right arrow key on the keyboard.
View > Pan > Up

Use this menu option to pan up in the current schematic view.
You can also pan up by pressing the up arrow key on the keyboard.
View > Pan > Down

Use this menu option to pan down in the current schematic view.
You can also pan down by pressing the down arrow key on the
keyboard.
The Legend Window

The Legend window has a consolidated list of all current highlights
from all sources — probes, finds, clock domains, back annotation of
schematic, Source window messages etc.
You can invoke the Legend window from Tools > Text Viewer menu
option in the SpyGlass Design Environment window or from View >
Show Classic Legend Window menu option from the schematic
windows.
The Legend window appears as in the following example:

FIGURE 56. Legend Window
Initially, the Legend window does not show any display annotations.
When you select any probe or message in the Source window,
schematic windows, or Message window, the corresponding details are
added to the Legend window.
Probing Modes
The Legend window has the following probing modes that can be
selected from the Probing modes button:
1. Normal (Single Color)
Selected probes or messages are highlighted with only one color (the
highlight color set in the Schematic Page of the Tools > Preferences
menu option).
All un-probed instances are shown in blue color and all un-probed
nets are shown in yellow color in both schematic windows.
2. Grey (Single Color)
Selected probes or messages are highlighted with only one color (the
highlight color set in the Schematic Page of the Tools > Preferences
menu option).
All un-probed instances and nets are shown with grey mode color
(set in the Schematic Page of the Tools > Preferences menu option).
3. Grey (Multiple Colors)
Selected probes or messages are highlighted with different colors
automatically selected from the color palette.

The Legend Window
All un-probed instances and nets are shown with grey mode color
(set in the Schematic Page of the Tools > Preferences menu option).
Probe or Message Details

For each selected probe or message, the following details are shown in
the Legend window:
• Focus
This option sets the selected probe or message in focus.
Use Jump To Focus button to view the selected probe or message.
Use Next Source, Previous Source, Next Sink, or Previous Sink to
traverse the probe or message group.
• Type
This indicator shows the annotation type as Message, Message-Add,
Probe/Net, Probe/Inst, or Clock Domain for main message, additional
messages, nets or ports, instances, and clock domains respectively.
• Name
This indicator shows the net, port, instance, clock domain name for
probes and clock domains and the rule name for messages.
For bus probes, an additional selector is available that lists each
individual bus bit and the whole bus. For example, for a 4-bit bus,
the selector has [0], [1], [2], [3], and all. You can then work with any
bus bit (by selecting one of the bits) or work with the whole bus (by
selecting all).
For messages, move the cursor over the rule name to view the rule’s
short description.
• Color
This indicator shows the current color set for the message or probe.
To change the color, click the color indicator and select the new

color for the probe or message.

• In Use
Use this option to permanently clear the annotation for a probe or
message. Then, the probe or message is not highlighted in various
windows and is also removed from the Legend window.
To permanently remove the annotation of a probe or message, clear
this check box and then click Apply or OK.
If you close and reopen the Legend window during the current
session, the probes or messages with the In Use check box clear are
not displayed.
• MS On/Off
Use this option to temporarily clear the annotation for a probe or
message in the Modular Schematic window and Source window.
Then, the probe or message is not highlighted but is still shown in
the Legend window.
To temporarily remove the message or probe, clear this check box
and then click Apply or OK.
session, the probes or messages with the MS On/Off check box clear
are still displayed for you to highlight them again in the Modular
Schematic window and Source window.
• IS On/Off
Use this option to temporarily clear the annotation for a probe or
message (and related components) in the Incremental Schematic
window. Then, the probe or message is not highlighted in the
Incremental Schematic window but is still shown in the Legend
window.
To temporarily remove the message or probe, clear this check box
and then click Apply or OK.
session, the probes or messages with the IS On/Off check box clear

The Spreadsheet Viewer Window
are still displayed for you to highlight them again in the Incremental
Schematic window.
• In Current?
This indicator shows y if the probe or message is in the hierarchy
currently shown in the schematic windows. Otherwise, this indicator
shows n.
• Top
This indicator shows the name of the top module containing the
selected probe.
• Details
This description shows the sinks and sources of the net and ports,
gate type for instances, clock signals for clock domains, and rule
details for messages.
To see the complete details, bring the cursor over the details entry.
Viewing Sinks and Sources

The Legend window also allows you to view the sinks and sources of
any net or port probe.
Select the net or port and then click Next Sink to view the first sink of
the net or port. Use the Next Sink and Previous Sink to view next or
previous sink of the net or port if the net has multiple sinks. Similarly,
click Next Source to view the first source of a net or a port. Use the Next
Source and Previous Source to view next or previous source of the net or
port if the net or port has multiple sources.

The Spreadsheet Viewer window displays the CSV file generated for a
rule in a tabular format. You can use this data to debug the results
within SpyGlass Design Environment. You may also cross-probe from

the Spreadsheet Viewer window to other SDE windows, such as the

Schematic Window, Source Window, and File/Design Constraints/Instance
window.
To display the Spreadsheet Viewer window, right-click a rule message
that has the spreadsheet icon ( ) in the MsgTree view, and select the
Open Spreadsheet option from the right-click menu. A sample
Spreadsheet Viewer window is shown in the following figure:
FIGURE 57. Spreadsheet Viewer Window
To enable cross-probing from the Spreadsheet Viewer window, SpyGlass

provides hexadecimal violation IDs, which corresponds to the
hexadecimal violation IDs generated for individual violation messages.
Formula Support in the Spreadsheet Viewer

NOTE: Currently, the formula support has been provided only for the

SDC_GenerateIncr rule of the Constraints policy.

The Spreadsheet viewer has been enhanced to support formulae.
Earlier, the policies used to dump data in the Spreadsheet viewer in
the.csv format. However, now, the policies can dump the formulae for
different cells in the .csv format.
The data that starts with “=” (equal to) in the .csv format file is treated
as a formula by the Spreadsheet viewer. The data in the remaining cells
is treated as a text string.
Distinguishing Between Normal Data and Formulae

When you select a cell that has a formula associated with it, the formula
is shown in the formula bar. The cell id is also displayed in the name
box next to the formula bar.
In the example, above the formula is displayed as A1+B1 for the cell C3.
Adding/Modifying/Deleting Formula
To add/modify a formula in a cell, you need to type “=” followed by the
formula. For example, if you want to display the sum of the values of

cell A1 and cell A2 in cell A3, then you need to enter the following
formula in cell A3:
=A1+A2
If you replace the data of a cell that has a formula associated with it, the
formula is deleted.
Updating Cell Data

The Spreadsheet viewer enables you to update cell data on the fly. For
example, if cell A3 displays the sum of values of cell A1 and A2 and
you modify the value of cell A1, then the value in cell A3 is
automatically updated.
Checking Cyclic Dependency

At times, the formulae inserted in different cells may introduce cyclic
dependency that may cause the Spreadsheet viewer to produce wrong
results or can cause the program to fall in an infinite loop. Consider the
data shown in the table below:
A B C
1 =B3+A2
2
3 =A1+C3
In the above table, the value in cell A1 depends on the value in cell B3.
However, the value in cell B3 also depends on the value in cell A1. In
such a scenario, the program may fall into an infinite loop while
evaluating the result of cell A1.
SpyGlass generates an error message when it encounters any cyclic
dependency.

Spreadsheet Viewer Menu Bar

The Spreadsheet Viewer has the following menu options:.
File > Reload CSV File

Use this menu option to reload the CSV format files in the Spreadsheet
Viewer window.
File > Generate SDC...

Use this menu option to create a SDC file from within the Spreadsheet
viewer. When you select this menu option, the Please enter the SDC file
name dialog appears as shown below.
Enter the name of the SDC file in the text box provided and click OK.
NOTE: The Generate SDC.... option is enabled only when you select a
violation message corresponding to the SDC_GenerateIncr rule of the
Constraints policy.
File > Save CSV File

Use this menu option to save the CSV file at its current location.
File > Save CSV File As...

Saves the CSV file to a different location. When you select this option,
then the Save As dialog appears as shown below.

Type the file name in the File name: text field and select the directory
where you want to save the file. Next, click Save to save the file.
File > Save Data Snapshot

Saves the information displayed in the Spreadsheet Viewer window in a
file.
When you select this option, SpyGlass displays the Save As dialog in
which you can specify the name of the file in which the spreadsheet
information should be saved.
File > Print

Prints the currently loaded CSV file. This opens the Print Command
window where you can specify the print command that should be used
to print the file.
File > Close

Closes the Spreadsheet Viewer window.

Options > Sort...

Sorts the CSV format results displayed in the spreadsheet viewer. See
the Sorting Results section for more details.
Options > Configure Column Alignment...

Use this menu option to align the columns in the spreadsheet viewer
window to left, center, or right. When you select this menu option, the
Configure Column Alignment window appears as shown below.
Options > Clear All Filters

Clears any filters set in the Spreadsheet Viewer. See the Filtering Results
section on how to set filters in the Spreadsheet Viewer.

Options > Set Row Height

Sets the row height in the Spreadsheet Viewer. This menu option opens
the Set Row Height window, where you can specify the required row
height for the rows.
Options > Set Spreadsheet Font...

Changes the font style and font size of the data in the Spreadsheet
Viewer window. When you select this menu option, the Set Spreadsheet
Font dialog appears, as shown in the following figure.
In the above dialog, select the required font and font size from the
Source Font and Font Size drop-down list, respectively, and click the OK
button.
Options > Add Row

Adds a single row (default) or multiple rows in the Spreadsheet Viewer
window. To add a single row, select the Add Row > Single option from
the menu bar and click the ( ) button on the toolbar.
To add multiple rows, select the Add Row > Multiple option from the
menu bar and click the ( ) on the toolbar. When you select the
Multiple option, the Enter No of Rows dialog appears as shown below.

Enter the number of rows in the Enter Rows combo box and click OK to
add the specified number of rows.
Options > Open External Viewer

Displays the external viewer (specified in the Set External Viewer Path
option) to view the CSV format results.
Options > Set External Viewer Path

Sets the path of the external viewer that you want to use to view the
CSV format results. This menu option opens the Set External Viewer
path window. Browse to the directory location of the external viewer
using the Browse icon (indicated by ) and specify the filename to set
the external viewer.
Spreadsheet Viewer Toolbar

The Spreadsheet Viewer has the following toolbar buttons:
Toolbar Icon Purpose

Reloads the CSV file.
Saves the CSV file.
Saves the CSV file in a different location.
Prints the current CSV file.
Sets the sorting order of the displayed results. This

opens the Set Sort Order window.
Clears all the filters applied on the displayed results.
Opens the set external viewer to view the CSV format

result.

Toolbar Icon Purpose

Adds single/multiple rows.
Opens the SGDC Constraint Editor window (for the

clock_sync01 rule only).
Selects all the rows of the current CSV file (for the
clock_sync01 rule only).
Opens the About Atrenta Spreadsheet Viewer window.
Wraps text in each cell to fit the data in the available
width
Creating cdc_false_path Constraints

You can create cdc_false_path constraints for the clock_sync01
rule from the Spreadsheet Viewer. To create a cdc_false_path
constraint(s), select the violation(s) for which you want to create the
constraint(s) and click ( ) on the Spreadsheet Viewer toolbar.
Alternatively, select a row, right-click, and select the Create
cdc_false_path constraints option from the context menu. When you
select this option, the Select Flop/Clock dialog appears, as shown
below.
Select the Source Clk, Dest Clk option if you want to create the
cdc_false_path constraint using this options and click the Ok
button. The SGDC Constraint Editor window is displayed where you
can edit the selected constraint. See Setting SGDC Constraints for more
details.

Select the Don’t show this dialog again option if you do not want to
display the Select Flop/Clock dialog the next time when you create the
cdc_false_path constraint. When you select this option, the Don’t
Show cdc_false_path setup dialog again option is automatically selected in
the Misc Page of the Preferences window. To display this dialog again,
deselect the Don’t Show cdc_false_path setup dialog again option in the
Preferences window.
You can also create constraints for all violations by clicking the ( )
toolbar button to select all the rows in the spreadsheet.
Cross-probing from the Spreadsheet Viewer

The Spreadsheet Viewer allows you to cross-probe the messages to
other SDE windows. When a violation id is clicked in the Spreadsheet
Viewer, the corresponding message is highlighted in bold in the Msg
Tree Page. Clicking the message row in the Msg Tree page creates the
following cross-probes:
• The design file in which the message has been reported is
highlighted in the File View Page of The File/Design/Constraints/
Instances Window.
• The source file containing the message is loaded in The Source
Window and the related source code line is highlighted in the same
color as that of the severity of the message.
• The corresponding message is highlighted in the Messages: Msg
Tree Page of the The Message Window.
• The schematic for the design in which the message has been
reported is displayed in The Modular Schematic Window.

Sorting and Filtering Results
Sorting Results
The Spreadsheet Viewer allows you to sort the displayed results on the
basis of the columns and the sorting order of the column values (that is,
ascending or descending order).
To sort the CSV results, click a column header of the Spreadsheet
Viewer. For example, to sort the results on the basis of the ID column,
click on the header of the ID column. The down arrow on the column
header (indicated by ) means that the column is sorted in the
Ascending order. Clicking again on the column header, sorts the
column in the descending order.
Alternatively, you can also sort the CSV results by performing the
following steps:
1. Select the Options > Sort... menu option in the Spreadsheet Viewer.
This displays the Set Sort Order window as shown in the following
figure:

The Set Sort Order window contains two columns, Column and Order.
2. Select a column then select Ascending or Descending in the Order
column to set the order of the selected column values. Click the OK
button. This sorts the results in the Spreadsheet Viewer on the basis
of the selected column.
To sort the results on the basis of more than one column, perform the
following steps:
1. Select Option > Sort... menu option in the Spreadsheet Viewer. Select
the required first column in the Set Sort Order window and then set
the sort order (ascending or descending).
2. Move the selected column up the column hierarchy by pressing the
Move Entry Up button (indicated by ).
3. Select the second column by which you want to sort the results.
Click the OK button. This sorts the results by column one and then
by column two.
SpyGlass also provides the following sorting options in the right-click
• Sort Ascending: Use this option to sort the column in the ascending
order
• Sort Descending: Use this option to sort the column in the descending
order
• Set Sorting Order: Use this option to set the sorting order on the basis
of multiple columns. This menu option displays the Set Sort Order
dialog.
Filtering Results
To apply filters on the results, right-click a column header in the
Spreadsheet window. This displays the values of the column. Selecting
a particular value will display the rows having that column value.
To set multiple filters, right-click the required column header and select

Custom... context menu option. This displays the Custom Filter

(<column-name>) window as shown below:
In the Custom Filter window, you can select the Filter Criteria and set the
corresponding filter Value. To apply more than one filter, click the More
button on the top-right corner of the window. This inserts another row
to specify a new filter criteria and value.
You may choose to set the filter to match all or any of the specified
filter criteria by selecting Match all of the following or Match any of the
following options on the top of the window.
Setting filters enables you to view only those rows that match the
criteria specified in the Custom Filter window.
SpyGlass also provides the following filtering options in the right-click
• (All): Use this menu option to display all the results of the particular
column and clears any filter criteria specified for that column.

The FSM Viewer Window
• Custom: Use this menu option to set filter criteria on the results
displayed in the Spreadsheet Viewer. This menu option opens the
Custom Filter window.
• <column-values>: The column values <column-value1, column-
value2,...> are displayed in the context menu to filter the column on
the basis of the displayed value. You can select a particular column
value to filter the results based on that value. Note that only some of
the column values will be displayed on the context menu. To set
filter on the basis of other values of the column, select the (Other...)
menu option.
• Other: Use this menu option to set the filter on the basis of a
specified filter criteria and a corresponding value. This menu option
displays the Custom Filter window.

The FSM (Finite State Machine) Viewer displays the graphical view of
the FSM description associated with a rule message. It displays the
different states and their transition paths.
To view the FSM Viewer, double-click a rule message in the Msg Tree/
Msg Summary page having the FSM icon (indicated by ). This
displays the FSM Viewer window as shown below:

FIGURE 58. The FSM Viewer Window
FSM Viewer Context Menu

To display the context menu window in the FSM Viewer, right-click
and hold-down the mouse button in the viewer. This displays the
following menu options.
NOTE: You will be able to select the menu options in the context menu only if
the Caps Lock and Num Lock keys are OFF in the keyboard.

save graph as
Use this menu option to save the FSM graph in the PDF format. You
can use any PDF file viewer to view the saved FSM graph.
Selecting this menu option displays the selFile dialog as shown below:
Select the required directory and specify a filename in the filename field
to save the current FSM graph. Click the OK button.

zoom in
Use this menu option to zoom in the current FSM view.
You can also zoom in by pressing the <z> key on the keyboard.
zoom out
Use this menu option to zoom out from the current FSM view.
You can also zoom out by pressing the <Z> key on the keyboard.
zoom fit
Use this menu option to display the complete FSM graph of the current
design unit in the FSM Viewer window.
You can also zoom fit by pressing the <Ctrl>+<Z> key combination on
the keyboard.
quit
Use this menu option to close the FSM Viewer.
all labels on
Use this menu option to display the RTL description (labels) for all the
transition paths.
all labels off

Use this menu option to hide the RTL description (labels) for all the
transition paths.

Waveform Viewer Window
find node
Use this menu option to search for a node or label in the FSM Viewer.
Selecting this menu option displays the popup dialog as shown below:
Specify the node name or label that you want to find and click the OK
button. This displays the specified node or label in the FSM Viewer.

For complex bugs in your design, viewing the message, RTL,
schematic, and FSM may not be sufficient to find the exact cause of
those bugs. For such cases, SpyGlass provides the Waveform Viewer
tool.
Waveform Viewer is an analysis tool that enables you to find the root
cause of a functional bug in the design. This tool illustrates a sequence
of events leading to the functional problem. These events are illustrated
from an initial state of a design/sub-design to the time when the bug
appears. These events can be generated as a set of simulation vectors in
the VCD format. Each event or time frame in VCD corresponds to an
edge of a clock relevant to the violation. The waveform viewer
launched for a failure contains this VCD content.
The presence of a waveform is indicated by the waveform icon, , in
front of the violation message. To view the waveform for the violation,
click the button in the toolbar. This displays the Waveform Viewer

window, as shown in the following figure:
Initially, SpyGlass loads a small set of signals in the waveform viewer.

These signals are believed to be a good start for the debugging process.
As the debugging progresses, you can gradually load more signals in
any of the following ways:
• By using cross-probing capabilities
By looking into loaded signals, RTL code, and/or schematic, if you
can identify relevant signals, the values of which may unveil the
cause of a bug, then click on the signals under RTL/schematic to
load the waveform of the signal and analyze the transitions.
For details, refer to the Cross-Probing in Waveform Viewer topic.
• By selecting the fanin option from the right-click menu displayed for
the selected signal in the waveform viewer
This action loads signals in the fanin cone of the selected signal for
which a waveform is available. This is limited to one signal in any
path in the fanin cone (the first signal visited in the path for which a
waveform is available). By default, a waveform is only generated for
registers and primary inputs in the cone of influence of a violation.

You can use the watchpoint constraint to generate waveform for

intermediate signals.
• By selecting the fanin cone option from the right-click menu
displayed for the selected signal in the waveform viewer
This action reports total number of signals in the cone headed by
selected signal as well as all the signals names. Signals for which
waveforms are available are highlighted; by clicking on these
signals, you can load the corresponding waveform.
Following are main features and capabilities provided by SpyGlass for
easy debugging of a functional violation:
• Signal hiding capability
While loading signals during debug process, there may be too many
signals loaded which can make the search and tracing difficult. You
can elect signals such signals that are not required, and hide them.
You can later unhide them as and when required.
For details, refer to the Signal Hiding Capability in Waveform
Viewer topic.
• Signals ordering
The signals appear in topological ordering by default. You can
re-order signals in alphabetical order and revert back using provided
buttons added for this purpose.
• Moving signals around
You can select a signal(s) and move it to a different location in the
waveform viewer. To do this, select the signal(s) that you want to
move and place the mouse pointer at the signal boundary. Next, drag
the signal(s) to the required position. The automatic ordering feature
can be used to restore the original ordering or alphabetical ordering.
• Saving and loading context
A filter file can be saved which will include all signals visualized at
the time of saving. This filter can be loaded at any time during the
same debug session or in a ulterior debug session.

• An internal signal, autoverify_state[0:31], is always generated that

changes value each time the design transitions from one state to
another state (at least one register changes value). When large
numbers of signals are loaded into the waveform viewer, this signal
can be used to track any changes caused by a previous transition by
adding a vertical marker on the next autoverify_state transition and
scrolling through all signals in the waveform viewer.
• By default, single selection mode is used in waveform viewer.
However, you can select/deselect multiple signals by using
Ctrl+click.
Given all the above capabilities and user knowledge of the design, the
root cause of a bug can be identified. However, if more analysis is
required, the generated VCD file can be analyzed under your preferred
simulation environment and more simulation can be performed to
further analyze the context of the failure. Alternatively, you may add
new assertions and analyze them to further understand the cause of a
given failure.
While techniques to identify the cause of a violation are the same, no
matter if that violation is due to a RTL bug, erroneous assertion, or
missing constraints, you may focus on identifying the category of the
violation so as to find a quick answer to this question. For this purpose,
instead of analyzing the failure through tracing signals in an intelligent
way (selecting signals believed relevant from RTL/ schematic) or in
topological order, you may focus on some set of signals that are prune
to cause constraint-related violations:
• Reset: A reset not recognized in a design will participate in
falsifying an assertion. By a quick look at the reset signal waveform
you may determine that a reset is making an assertion fail. To fix this
problem provide the reset as a constraint in the Auto-Verify Design
Constraints file.
• Clock: A wrong clock waveform can cause a violation; furthermore,
wrong relative clocks frequencies in multi-clock system can cause a
violation. By examining the clocks waveforms you may be able to

find such problems. To fix clock definition related problem you can
provide the correct definition of the clock in the constraint file.
• Other special ports: Ports such as test mode should be properly
constrained. By looking into the waveform signals, the failure may
be attributed to such signals.
• Initial state: A wrong initial state may cause a false violation.
Specifically, if registers are left free (not assigned to neither a “0”
nor “1”), then Auto-Verify will assign them to appropriate values to
make assertions fail. By looking into registers file report “.reg” file
and/or the waveform one can quickly determine if a violation is
caused by such un-initialized registers.
Cross-Probing in Waveform Viewer

SpyGlass provides the following cross-probing capabilities for
Waveform Viewer:
• RTL to waveform probing
Clicking on a signal in the RTL code results in loading (if it is not
already loaded) and highlight of the corresponding waveform, if a
waveform for the signal is available. The waveform for the given
signal is placed in its position according to a predefined ordering
(alphabetical or topological). This action is performed if a waveform
window is already open. Note that the same action (right-click on
RTL signal) also highlights the corresponding schematic wire if a
schematic window is already open.
• Schematic to waveform probing
Similar to RTL to waveform probing, a left-click on a signal under
schematic window results in loading and highlight of corresponding
waveform under waveform viewer.
• Waveform to RTL and schematic probing
Clicking on a signal in the waveform viewer results in

corresponding signals highlight in the RTL code and schematic

viewer.
Signal Hiding Capability in Waveform Viewer

SpyGlass enables you to determine the signals that you want to hide/
unhide. To do so, select the Show and Hide Signals option from the View
menu of the Waveform Viewer window. This displays the Show or Hide
Signals dialog, as shown in the following figure:
The above dialog is divided into two sections, Hidden Signals and Visible
Signals. To hide a signal, select that signal from the Visible Signals
section, and click the button. Similarly, to unhide a signal, click that
signal from the Hidden Signal section and click the button.
From the available list of signals, you can search for the required signal
to be hidden/unhidden. To do so, specify the search criteria in the Find
textbox and click the Next or All button. If you click the Next button,
SpyGlass highlights the first found signal that matches the search
criteria. You can again click the Next button to highlight the next

matching signal. However, if you click the All button, SpyGlass

highlights all the signals matching the search criteria.
Right-Click Menu Options of the Waveform Viewer Window

When you right-click on any signal in the Waveform Viewer window,
SpyGlass displays a context menu. Various options of this context
menu are described in the following table:
Option Description
Hide Selected Signal(s) Hides the selected signal(s)
Show Only These Displays only the selected signals in the Waveform
Signals(s) Viewer window and hides all the other signals
Expand Bus <-> Expands all the collapsed busses to its individual
Collapse Bus signals. Similarly, collapses all the signals into a bus.
Change Signal Color Changes the color of the selected signal. When you
select this menu option, SpyGlass displays the Color
dialog from which you can select the required color.
Change Signal Line Changes the appearance of the line (normal, dashed,
Type dotted, etc.) of the selected signal. When you select this
menu option, SpyGlass displays a sub-menu from
which you can select the desired line type (such as
Normal, Dash, Dot, Dash-Dot, etc.)
Change Signal Radix Changes the radix of the selected signal. When you
select this menu option, SpyGlass displays a sub-menu
from which you can select the required value (such as
hex, bin, dec, signed, real, etc.)
Fanin Loads the selected signal in the fanin cone of the
selected signal for which a waveform is available.
The fanin signals for the selected signal are highlighted
in the Schematic Viewerv/RTL viewer.
Fanin Cone Displays a complete set of signals in the fanin cone

Option Description
Fanout Loads the selected signal in the fanout cone of the
selected signal for which a waveform is available.
The fanout signals for the selected signal are
highlighted in the Schematic Viewerv/RTL viewer.
Fanout Cone Displays a complete set of signals in the fanout cone
Save Saves the current set of signals as the current filter
Save As Saves the current set of signals as a new filter
Hierarchy Traversal Across the SpyGlass Design

Environment Windows
SpyGlass 3.4.2 and later versions have improvements in the schematic
hierarchy display and traversal on clicking a message.
For the purpose of hierarchy traversal, the following types of design
units are assumed:
1. RTL Module: The module containing the line number dumped by
the message
2. Schematic Top Module: Top hierarchy for which the schematic
back-annotation data is dumped by the message
3. Schematic Module: Any module for which the schematic back-
annotation data is dumped by the message
When a message is selected, the RTL Module will always be shown in
Source window. However, the Modular Schematic window and
Incremental Schematic window can show a Schematic Module
depending on the schematic highlight data dumped by the message.
There can be the following three cases where the ‘Instance hierarchies’
can differ:
1. RTL Module and Schematic Top Module are same.

Multi-Line Highlighting Support
Schematic Top Module is shown in the schematic windows and

Schematic Top Module is picked as the ‘Instance hierarchy’ for
schematic windows.
Highlighting is visible in both Modular Schematic window and
2. RTL Module is different from Schematic Top Module but there is a
Schematic Module same as RTL Module.
Schematic Module is shown in Modular Schematic window and
hierarchy of Schematic Module is picked for Modular Schematic
window. For example, if Schematic Top Module is A.b.c and the
RTL module is D, then an instance of D is searched in the schematic
data and shown. A.b.c.d will be considered as ‘Instance hierarchy’
for Modular Schematic window. Both Modular Schematic window
and Incremental Schematic window show the schematic
highlighting. The case when no instance of D is found, is covered in
Case 3 below.
3. No Schematic module for RTL Module
RTL Module is shown in Modular Schematic window and any
‘Instance hierarchy’ is picked for that RTL Module from the Design
view page. This behavior is also valid for the non-schematic
messages also. There is no highlighting in the Modular Schematic
window. However, if the top module of the picked ‘Instance
hierarchy’ is same as that of the Schematic Top module, the
Incremental Schematic window shows the back-annotation data.

The SpyGlass Design Environment now supports multi-line
highlighting feature. If the selected message is related to more than one
source line and these source lines are in more than one source file, one
tab for each source file is opened in the Source Window. Each tab
indicates the name of the source file and the number of affected lines in
that source file.

Multiple lines affected in the same source file

The tab title shows source file name and the number of affected lines in
the source file. For example, test.v (3). Initially, the first affected line is
displayed. Use the <Shift>+<N> (next line) and <Shif>+<P> (previous
line) key combinations to move among the affected source lines.
Multiple lines affected in the different source files

One tab is opened for each affected source file. The tab title shows
source file name and the number of affected lines in the source file.
Initially, the first affected line is displayed. Use the <Shift>+<N> (next
line) and <Shif>+<P> (previous line) key combinations to move among
the affected source lines in the same source file.
Use the F6 and F7 keys to move between the tabs.
Multiple Messages selected

When any main message that highlights only a single source line is
selected, then no new page is opened. However, if you select an
auxiliary message (<Ctrl>+Double-click), a new page is opened for the
main message and another page is opened for the auxiliary message
even if both messages are in the same source file.
Use the F6 and F7 keys to move between the tabs.
When you select many messages, the corresponding number of
auxiliary Source Window tabs are opened. You can view the source file
of a selected message (out of multiple selected messages) in the Main
Source Window tab using the Jump To Focus button in the Legend
Window. You can also go to the related auxiliary Source Window tab
for that message by pressing <Ctrl>+<G>.


Analyzing VHDL Designs
Overview
The SpyGlass Design Environment processes VHDL Only designs and
VHDL part of a Mixed-Language design using the VHDL-specific
settings.
This chapter describes how to:
• Specify a VHDL design to the SpyGlass Design Environment.
• Tell the SpyGlass Design Environment which version of VHDL you
are using.
• Use VHDL libraries.
• Tell the SpyGlass Design Environment the order in which the design
needs to be processed.
Specifying VHDL Design Files

The SpyGlass Design Environment needs to know which HDL

Using the IEEE-1076 VHDL-87 standard
language you are using to develop your source code so it can run its
built-in tests properly.
To tell the SpyGlass Design Environment that you are running a VHDL
design:
1. Set the language to VHDL from the Language Tab of the Setup >
Run Options... menu option, if not already set.
2. Select the source files from the Setup > Source... menu option.
3. If you specify more than one source file, you need to select them in
the correct compilation sequence. Alternatively, you can let the
SpyGlass Design Environment sort the source files automatically by
setting the Automatically sort VHDL files (-sort) field in the VHDL Tab of
the Setup > Run Options... menu option.
See Determining and Setting Design Dependencies for more details.
Using the IEEE-1076 VHDL-87 standard

The SpyGlass Design Environment assumes you are using the IEEE-
1076 VHDL-93 standard syntax in your VHDL design. If you are
creating a design using the VHDL-87 standard, you need to pass this
information to the SpyGlass Design Environment so it can analyze
your syntax correctly and report any problems it detects as syntax error
messages along with all other SpyGlass messages.
To tell the SpyGlass Design Environment you are using the VHDL-87
standard, set the Run in VHDL87 compatibility mode (-87) field in the
VHDL Tab of the Setup > Run Options... menu option.
Performing syntax check on your design

You can also perform a syntax check of your design (without running
any SpyGlass policies) as follows:
1. Add your source files as usual.

2. Select the Setup > Policies/Rules/Parameters... menu option and

click Clear if there are any policies selected by default or due to any
previous run.
The spyglass policy remains selected as this is the SpyGlass
built-in policy for design check including syntax check.
3. Specify -policies=none in the Other command line options field
in the Other Tab of the Setup > Run Options... menu option.
4. Run SpyGlass analysis.
Such run will generate syntax errors and warnings, if any.
NOTE: As all built-in rules are run, you would also get other standard built-in
messages.
Working with VHDL libraries
Working with Atrenta-Supplied VHDL Libraries

The SpyGlass VHDL environment comes with the following pre-
compiled libraries of both 32-bit and 64-bit versions:
• IEEE
• STD
• Synopsys
These libraries are visible to SpyGlass by default.
NOTE: The VHDL libraries supplied with one version of SpyGlass may not be
compatible with another version of SpyGlass.
Working with User-Compiled VHDL Libraries

Besides the Atrenta-supplied VHDL libraries, you can compile and use
your own VHDL libraries with SpyGlass.

Before they can be used in a SpyGlass analysis, your VHDL libraries

must be compiled into a SpyGlass format.
You need to compile one or both of the following versions of your
library:
• 32-bit version to work on all 32-bit architecture platforms supported
by SpyGlass
by SpyGlass
Each version should be compiled on a supported platform of
corresponding architecture and then can be used on all supported
platforms of the same architecture. For example, you can compile your
VHDL libraries on 32-bit Solaris platform and use them on 32-bit
Solaris or Linux platforms.
You can create the 64-bit version of the pre-compiled HDL sources on
a 32-bit architecture machine by using the -dump64bit command-line
option.
NOTE: You cannot use the 32-bit version of the pre-compiled VHDL library on
64-bit platforms and vice-versa.
To compile and use your own VHDL libraries with SpyGlass, use the
following steps:
Step1: Compile your VHDL library files to the SpyGlass format.

To compile a VHDL library in the SpyGlass Design Environment,
follow these steps:
1. Set the name of the working directory into which the library is to be
compiled (the Working Directory (logical name) (-work) field in the
VHDL Tab of the Setup > Run Options... menu option).
The 32-bit version of user-compiled libraries are created in a sub-
directory named 32 under the specified working directory. The 64-
bit version of user-compiled libraries are created in a sub-directory
named 64 under the specified working directory.

2. Set the physical location of the library (using the Library Mapping
tab of the Setup > Library... menu option to set the logical to
physical mapping).
3. Specify the VHDL library files to be compiled using the Setup >
Source... menu option.
4. If your VHDL library files are fully debugged, there should be no
need to run SpyGlass rule-checks on them and you should un-select
all rules from the Setup > Policies/Rules/Parameters... menu option.
5. Click the Run button to compile.
Once compiled, the library can then be used in a normal SpyGlass
Analysis run.
NOTE: The VHDL library compiled with one version of SpyGlass may not be
compatible with another version of SpyGlass and may required to be
recompiled with the other version.
Step 2: Use the pre-compiled libraries for analysis

To tell the SpyGlass Design Environment where to find your VHDL
library, map the library’s logical name (the name used in your HDL
design) to its actual physical location (the directory where the compiled
library is stored) using the Library Mapping tab of the Setup >
Library... menu option.
In case of incorrect library path specifications, SpyGlass behavior is as
follows:
1. If a library path is not specified and the library is used only in the
use clause and not used in any design unit, then SpyGlass generates
a warning message and continues. If the library is being used in a
design unit, then SpyGlass generates additional error message and
may abort depending on the criticality of library usage.
2. If the library path does not exist, then SpyGlass generates an error
message and aborts before analysis. This is irrespective of whether
the specified library is used or not.

NOTE: SpyGlass enables you to compile multiple HDL libraries in a single

SpyGlass run by using the -libhdlfiles or -libhdlf option. See
Precompiling Multiple Libraries in a Single SpyGlass Run for details.
NOTE: Also refer to the Handling BuiltIn Messages While Using Precompiled
Dump topic.
Enabling RTL Rule-checking of VHDL Libraries

By default, SpyGlass synthesizes and performs connectivity checks
(depending on the rules selected) on user-compiled VHDL design units
that are directly or indirectly instantiated in the design being processed.
However, SpyGlass does not perform rule-checking on the RTL itself
by default.
Supply the -hdllibdu option from the Other command line options
field in the Other Tab of the Setup > Run Options... menu option to
enable RTL rule-checking on these user-compiled VHDL design units
also.
By default, no rule-checking is performed on pre-compiled HDL
design units. When you specify the -hdllibdu command-line option, all
rule-checking (including lexical rule-checking) is performed on the
pre-compiled HDL design units.
NOTE: The existing -vhdllibdu command-line option is now deprecated.
Using Intermediate Logical Library Name Support in VHDL

As discussed in the Working with User-Compiled VHDL Libraries
topic, to use a user-defined VHDL library, you need to provide a logical
to physical mapping by using the -lib command-line option, as
shown below:
-lib <logical_name> <physical_path>
However, the above use model has a limitation in cases where two
different blocks of a hierarchical design are using the same package

name from a library and they are brought together to top-level. In such
cases, only one library with that logical name can be used in the
top-level.
For example, consider two hierarchical blocks, IP1 and IP2, that use
the same package, PKG, as shown below:
IP1: IP2:
library L1; library L1;
use L1.PKG.all; use L1.PKG.all;
For IP1, the PKG package For IP2, the PKG package that has
totally different contents than the
is compiled into the physical location,
PKG package of IP1 is compiled
dir1, by using logical to physical into the physical location, dir2,
mapping, as shown below: by using logical to physical
-lib L1 ./dir1 mapping, as shown below:
-lib L1 ./dir2
The top-level design, TOP, has instances of IP1 and IP2. Now if you
want to specify logical to physical mapping for the L1 library, you can
specify only one mapping (that is, either L1 to dir1 or L1 to dir2),
as shown below:
-lib L1 ./dir1
In the above case, SpyGlass picks up only one package, that is, PKG
from IP1. However, the second PKG package is not available for IP2
in this case.
NOTE: As the contents of both the packages are different, the design is
incomplete.
Using Intermediate Library Support

You can solve the above problem (without modifying library or
package names) by using intermediate library support.
Intermediate library support enables you to map multiple logical
libraries to a single intermediate library by using the -libmap

command. This intermediate library is then mapped to a physical

location by using the -lib command.
-libmap <logical-name> <intermediate-logical-name>
-lib <intermediate-logical-name> <physical-name>
By using the -libmap command, both the IP1 and IP2 can refer to
their own packages, as shown below:
IP1: IP2:
Library L1; Library L1;
Use L1.PKG.all; Use L1.PKG.all;
-libmap L1 IP1 -libmap L1 IP2

-lib IP1 ./dir1 -lib IP2 ./dir2
Now in the TOP design, IP1 and IP2 are picked from the T1 and T2
libraries, as shown below:
Library T1;
Use T1.all;
Library T2;
Use T2.all;
In the above case, there is no reference to L1. Therefore, correct
packages are picked from IP1 and IP2 intermediate libraries, as
shown below:
-libmap T1 IP1
-lib IP1 ../dir1
-libmap T2 IP2
-lib IP2 ../dir2
NOTE: Please note the following points for the intermediate library support:
• Do NOT specify intermediate library name in the -libhdlfiles/
-libhdlf command, as shown in the following example:
-libmap L1 IP1
-lib IP1 ./P1
-libhdlfiles IP1 "case1.vhd case2.v"

In the above example, an intermediate library name, IP1, is

specified in the libhdlfiles option. As a result, SpyGlass
reports a FATAL violation.
• Do NOT specify logical library name in the -lib command, as
shown in the following example:
-libmap L1 IP1
-lib L1 ./P1
In the above example, logical library name, L1, is specified in the
lib option. As a result, SpyGlass reports a FATAL violation.
• Do NOT specify logical library name in the -work command, as
shown in the following example:
-libmap L1 IP1
-lib IP1 ./P1
-work L1
In the above example, logical library name, L1, is specified in the
work option. As a result, SpyGlass reports a FATAL violation.
Encrypting Compiled VHDL Design Units

While creating the compiled VHDL design units, supply the -
enable_hdl_encryption command-line option from the Other command
line options field in the Other Tab of the Setup > Run Options... menu
option to precompile and encrypt the design units in to a binary format.
When you use the encrypted pre-compiled VHDL design units with
SpyGlass, all rule-checking on these VHDL design units is enabled by
default. Any highlighting information within such modules is shown on
the library module boundary only. You can disable RTL rule-checking
on such VHDL design units by specifying the -
disable_encrypted_hdl_checks command-line option. If you specify
this command-line option, SpyGlass internally removes any messages
that point inside encrypted IP.
NOTE: The -hdllibdu command-line option does not have any effect on the

Determining and Setting Design Dependencies
above rule-checking behavior for encrypted modules.

NOTE: All the design units instantiated in an encrypted design unit are treated
as encrypted even if they are not encrypted.
CAUTION: Encryption using any robust encryption algorithm is outside
the scope of SpyGlass.
Determining and Setting Design Dependencies

For a VHDL design to compile correctly, it must be analyzed in the
correct order (that is, lower-level dependent design units and libraries
must be analyzed before the top-level or primary units).
You can tell SpyGlass to sort your design files, or explicitly specify
their order yourself. You can also define the specific configuration to be
used for design.
NOTE: You should let the SpyGlass Design Environment sort the source files
only if you do not know the correct design order. However, there are design
configurations in which the automatic sort feature cannot reliably infer the
correct order, no matter how good the sort algorithm is.
Determining design dependencies automatically

To have SpyGlass sort your design units automatically, set the
Automatically sort VHDL files (-sort) field in the VHDL Tab of the Setup >
Run Options... menu option before you begin your analysis. The
dependency order determined by SpyGlass for the design is printed in
the log file.
NOTE: If an automatic sort operation becomes confused as to which files need
to be updated, SpyGlass issues an error message saying one or more files
need to be recompiled. To resolve the issue, delete your work directory and any
library directories and rebuild them.
The required VHDL libraries are checked for existence before
SpyGlass attempts to determine the dependency. If any such libraries

do not exist, a suitable error is generated and SpyGlass exits.

If you are not going to use the automatic sort feature, you need to
define the order of the source files by selecting them in required order.
NOTE: The standard SpyGlass sort algorithm does not support designs
containing configurations. Then, you should supply the -sort option from the
Other command line options field in the Other Tab of the Setup > Run
Options... menu option.
Defining Design Dependencies

The SpyGlass Design Environment creates, maintains, and displays a
dependency tree of your design units. Unless you specify otherwise, it
infers which are the top unit(s) from the VHDL structure. It checks
through all the units and implicitly sets top-level status for those units
not instantiated anywhere else.
Alternatively, you can define the VHDL hierarchy or sub-hierarchy
yourself by selecting one or more design units as top-level (described
in Managing the Design Hierarchy).
Skipping Specific Design Units

Some design units may be placeholders for information to be added
later or for pre-designed code or Intellectual Property yet to be
provided. Since no information is available yet to do detailed internal
checking with SpyGlass, you need to stop SpyGlass from processing
these design units. The recommended way is to manually stop
SpyGlass processing a hierarchy or sub-hierarchy (described in
Managing the Design Hierarchy).

Working With Record Structures
Record-Mapping to Flattened Bus

When you specify VHDL records, SpyGlass internally flattens the
corresponding record elements into bus.
Consider the following VHDL record:
type rec1 is
record
field1 : std_logic_vector(2 downto 0);
field2 : std_logic;
field3 : std_logic;
field4 : std_logic_vector(0 to 2);
end record;
signal sig1 : rec1; --Flattened bus: sig1[7:0]
For each record element, the following table displays the flattened bus
and its mapping details:
Record Flattened
Element Bus Mapping
field1 sig1[2:0] sig1[2] <=> sig1.field1(2), sig1[0] <=> sig1.field1(0)
field2 sig1[3] sig1[3] <=> sig1.field2
field3 sig1[4] sig1[4] <=> sig1.field3
field4 sig1[7:5] sig1[7] <=> sig1.field4(0), sig1[5] <=> sig1.field4(2)
NOTE: Arrays with range defined as (n downto 0) or (0 to n) in
RTL maps to (0 to n) or (n downto 0) order at the flattened level.
Handling VHDL Records

SpyGlass supports VHDL records including complex VHDL records,

such as a record within another record or an array of records.

After generating a netlist of the design containing VHDL record(s), you
can apply constraints on record elements.
Specifying Constrains on Record Bits

Consider the following VHDL code snippet containing a complex
record:
type simple_record is
record
data4 : std_logic;
data5 : std_logic_vector(7 downto 0);
end record;
type record_data_type is
record
data1 : std_logic;
data3 : simple_record;
end record;
Also consider that you specify the following internal signal:

signal sig1:record_data_type;
The naming convention for record bits is

<record-instance>_<field-name>.
If the record field is an array, refer the field name through its indices.
The following example applies constraints on record sig1 bits:
// applying set_case_analysis constraint on record bit
// sig1.data1
set_case_analysis -name sig1_data1 -value 0

// sig1.data3.data4
set_case_analysis -name sig1_data3_data4 -value 1

// sig1.data3.data5(0)
set_case_analysis -name sig1_data3_data5[0] -value 1
Specifying Constrains on Array of Records

Consider the following VHDL code snippet containing an array of
records:
type simple_record is
record
data1 : std_logic;
end record;
type array_data_type is array (1 downto 0) of

simple_record ;
signal sig1:array_data_type
The naming convention for an array records is

<record-instance>[<index>].
SpyGlass refers an array of records as a one-dimensional net-bundle, as
given below:
sig1(0).data1 sig1[0]
sig1(0).data2[0] sig1[1]
sig1(1).data1 sig1[3]
All record elements in the net-bundle are accessed using indices while

applying constraints.
The following example applies constraint on an array of record sig1
bits:
// Applying the set_case_analysis constraint on the
// record array sig1(0).data1
set_case_analysis -name sig1[0] -value 1
// Applying the set_case_analysis constraint on the

// record array sig1(1).data2[0]
set_case_analysis -name sig1[4] -value 0
Specifying Constraints Through GUI

To apply constraints on record bits through GUI, perform the following
steps:
1. Select the required net by following the net-naming convention in
the schematic.
1. Right-click on the required net.
2. Select the Set SGDC Constraints option from the shortcut menu.
This displays the Constraints Editor window.
3. In the Constraints Editor window, specify the required constraints.
This is the recommended way to specify constraints for records bits as
you can view the naming convention of nets directly in the schematic,
and apply constraints accordingly.
To view the naming convention of a net in the schematic, move the
cursor over that net. A tool-tip appears displaying the net name, as


Analyzing Verilog Designs
Overview
The SpyGlass Design Environment processes Verilog Only designs and
Verilog part of a Mixed-Language design using the Verilog-specific
settings.
This chapter covers the following topics:
• Specifying Verilog Design Files
• Defining the Verilog Version
• Working with Verilog Libraries
• Precompiled Verilog Library Support
• Specifying Verilog Libraries Using the 'uselib Statement
• Including Defined Macros
• Including Common and Global Code
• Specifying Compressed Verilog Designs
• Defining the top of a Dependency Tree

Specifying Verilog Design Files
• Skipping Specific Modules

• Rules analyzed before a Stopped Design Unit is detected
• Working with the 'celldefine Modules
• Working with Memories
• Inferring Blackboxes
Specifying Verilog Design Files

To tell the SpyGlass Design Environment that you are running a
Verilog design, set the language to Verilog from Language Tab of Setup
> Run Options... menu option, if not already set.
Defining the Verilog Version
Using Verilog 2001 Constructs

By default, SpyGlass assumes that you are using the Verilog 1364-2001
constructs.
NOTE: If you are using Verilog 1364-1995 constructs, you may specify the
-disablev2k command-line option or set the Disable Verilog 2000/2001
processing (-disablev2k) field of Verilog Tab of Setup > Run Options... menu
option of the SpyGlass Design Environment.
SpyGlass can now parse most of the Verilog 2001 constructs and
synthesis support for the following Verilog 2001 constructs is also
available:
• Combined port and data type declarations

• ANSI C style module declaration

• Module port parameter list
• ANSI C style UDP declarations
• Variable initial value at declaration (Initial value is ignored)
• ANSI C style task/function declaration
• Constant functions
• Comma separated sensitivity list
• Combinational logic sensitivity lists
• Implicit nets for continuous assignments
• Disabling implicit net declarations
• Variable vector part selects
• Multidimensional arrays
• Arrays of net and real data types
• Array bit and part selects
• Signed-up, net and port declarations
• Signed based integer numbers
• Signed functions
• Sign conversion system functions
• Arithmetic shift operators
• Assignment width extension past 32 bits
• Power operators
• Sized parameter constants
• Explicit in-line parameter definition
• Fixed local parameters
• Enhanced conditional compilation
• Source file and line compiler directive

Defining the Verilog Version
• Generate blocks
Using SystemVerilog Constructs

NOTE: The SystemVerilog support is a licensed feature and requires the
license feature named system_verilog.
If you are analyzing a design containing SystemVerilog language
constructs, you need to specify the -enableSV option from the Other
command line options field of Other Tab of Setup > Run Options... menu
option of the SpyGlass Design Environment or on the command-line
while working in the batch mode.
NOTE: You can find the details of supported SV constructs in the xls sheet,
SpyGlass SystemVerilog Support, present in the $SPYGLASS_HOME/doc
directory.
The configuration setting named SYSTEMVERILOG_SUPPORT is
available for enabling/disabling SystemVerilog support in the SpyGlass
Configuration files. The command-line option named -disableSV
disables the SystemVerilog support overriding the -enableSV
command-line option and the SYSTEMVERILOG_SUPPORT
configuration setting.
NOTE: In addition, all rules included in the Essential template of the Lint
methodology have also been enhanced to support applicable SystemVerilog
constructs. A list of these rules can be found in the spyglass_<release-
name>_rules.xls file located in the $SPYGLASS_HOME/doc directory.



previous run.
messages.
Working with User-Defined Primitives

By default, SpyGlass supports Verilog designs containing
User-Defined Primitives (UDPs).
SpyGlass internally translates the UDP definition to equivalent Verilog
module description for further processing. The UDP definitions that
could not be translated by SpyGlass as treated as blackboxes.
Working with Verilog Libraries

The SpyGlass Design Environment offers several options for naming
and mapping Verilog libraries, supplying your own library file name
extensions, and ignoring messages in third-party libraries.
Naming and Mapping Libraries

Modules or User-Defined Primitives (UDPs) missing from your
Verilog source code are normally found either in a single library file or

Precompiled Verilog Library Support
in files stored in a library directory. You need to tell the SpyGlass

Design Environment where to find the library (using the Library Files/
Dirs(-v/-y) field in the Verilog Specific Options tab of Setup > Library...
menu option) or directory (using the Library Files/Dirs(-v/-y) field in the
Verilog Specific Options tab of Setup > Library... menu option) so it
can compile your Verilog design correctly. The SpyGlass Design
Environment checks the current directory for such libraries first, then,
if it cannot find them, searches the path you specify with these options.
Like all standard Verilog EDA tools, SpyGlass requires you to specify
the file extension for files located in library directories specified by
using the Library Files/Dirs(-v/-y) field in the Verilog Specific Options tab
of Setup > Library... menu option. Use the Library file extension(+libext)
field in the Verilog Specific Options tab of Setup > Library... menu
option to specify one or more file extensions of library files.

CAUTION: Since the precompilation is not a required feature in Verilog
(unlike VHDL), you need to specify the
-enable_precompile_vlog command-line option whenever you
are compiling Verilog libraries.
Working with Pre-compiled Verilog Libraries

You can compile your Verilog modules and use them in a VHDL-like
library mechanism with SpyGlass.
You need to compile one or both of the following versions of your
Verilog modules:
by SpyGlass
by SpyGlass

Each version should be compiled on a supported platform of

corresponding architecture and then can be used on all supported
platforms of the same architecture. For example, you can compile your
Verilog modules on 32-bit Solaris platform and use them on 32-bit
Solaris or Linux platforms.
a 32-bit architecture machine by using the -dump64bit command-line
option.
NOTE: When you pre-compile a Verilog module that contains gates instances,
these gate instances are not compiled. You need to separately compile the
gates library in to a SpyGlass-format gates library (.sglib file) using the
SpyGlass Library Compiler and supply it to SpyGlass using the -sglib
NOTE: The modules in the library files specified with the -v/-y command-line
options are compiled along with the design modules.
NOTE: You cannot use the 32-bit version of the pre-compiled Verilog modules
on 64-bit platforms and vice-versa.
NOTE: The Verilog modules compiled with one version of SpyGlass may not
be compatible with another version of SpyGlass and may required to be
Structure of Pre-compiled Verilog Libraries

SpyGlass creates sub-directories named <module-name>.mod for each pre-
compiled Verilog module. Each of these sub-directories has the
corresponding <module-name>.dmp file, which is a binary dump of
the module. The module sub-directory also has the
<module-name>.dep file, which has dependency information. In
case, you choose to encrypt the Verilog modules, an additional file
named .encrypt is also created in the module’s sub-directory.
NOTE: The UDPs are also pre-compiled and used by SpyGlass.
NOTE: It is recommended that you do not mix encrypted and un-encrypted

modules in the same library.
Library Searching Mechanism

This section describes pre-compiled library search mechanism for
SpyGlass and other standard tools.
SpyGlass performs a case-sensitive search in the following order:
1. Library defined by the 'uselib directives
2. All Verilog libraries specified with the –v/-y command-line options
3. Work library
4. Libraries listed with the -lib command-line option in the order
specified at the command line.
Working with Pre-compiled Verilog Libraries in SpyGlass design

Environment
To pre-compile and use your own Verilog library files with the
SpyGlass Design Environment, use the following steps:
Step1: Precompile your Verilog Library files to the SpyGlass

format.
To precompile Verilog library files in the SpyGlass Design
Environment, follow these steps:
1. Specify -enable_precompile_vlog option in the Other
command line options field in the Other Tab of the Setup > Run
Options... menu option.
2. Set the name of the working directory into which the library is to be
compiled (the Working Directory (logical name) (-work) field in the
Verilog Tab of the Setup > Run Options... menu option).

The 32-bit version of user-compiled libraries are created in a sub-

directory named 32 under the specified working directory. The 64-
bit version of user-compiled libraries are created in a sub-directory
named 64 under the specified working directory.
3. Set the physical location of the library using the Library Mapping
tab of the Setup > Library... menu option to set the logical to
physical mapping).
4. Now specify the Verilog library files to be pre-compiled using the
Setup > Source... menu option.
5. If your Verilog library files are fully debugged, there should be no
need to run SpyGlass rule-checks on them and you should un-select
all rules from the Setup > Policies/Rules/Parameters... menu option.
6. Click the Run button to compile.
Analysis run.
NOTE: The Verilog library pre-compiled with one version of SpyGlass may not
be compatible with another version of SpyGlass and may required to be
Step 2: Use the Pre-compiled Libraries for Analysis

To tell the SpyGlass Design Environment where to find your Verilog
library, map the library’s logical name (the name used in your HDL
design) to its actual physical location (the directory where the compiled
library is stored) using the Library Mapping tab of the Setup >
Library... menu option.
NOTE: SpyGlass enables you to compile multiple HDL libraries in a single
SpyGlass run by using the -libhdlfiles or -libhdlf option. See
Precompiling Multiple Libraries in a Single SpyGlass Run for details.

Enabling RTL Rule-checking of Pre-compiled Verilog Libraries

(depending on the rules selected) on user-compiled Verilog design units
by default.
Supply the -hdllibdu option from the Other command line options
field in the Other Tab of the Setup > Run Options... menu option to
enable RTL rule-checking on these user-compiled Verilog design units
also.
By default, no rule-checking is performed on pre-compiled HDL
design units. When you specify the -hdllibdu command-line option, all
rule-checking (including lexical rule-checking) is performed on
pre-compiled HDL design units.
Encrypting Pre-compiled Verilog Design Units

While creating the pre-compiled Verilog modules, supply the -
enable_hdl_encryption command-line option from the Other command
line options field in the Other Tab of the Setup > Run Options... menu
option to precompile and encrypt the design in to a binary format.
When you use the encrypted pre-compiled Verilog modules with
SpyGlass, all rule-checking on these Verilog modules is enabled by
default. Any highlighting information within such modules is shown on
on such Verilog modules specifying the -disable_encrypted_hdl_checks
command-line option. If you specify this command-line option,
SpyGlass internally removes any messages that point inside an
encrypted IP.


Working with Pre-compiled Verilog Libraries in the Batch Mode
Compiling Verilog Modules to a Verilog Library

To compile a set of Verilog modules, you must tell SpyGlass the name
of the working directory into which the library is to be compiled (using
the -work option), the physical location of this library (using -lib to
set the logical to physical mapping), and the names of the Verilog files
to be compiled. If the libraries are fully debugged, there should be no
need to run SpyGlass rule checks on them and the -norules option
should also be used.
For example, to compile Verilog files named mylib1.v and mylib2.v into a
library called MYLIB and located in the directory ../lib/MYLIB, enter:
spyglass -batch -verilog -enable_precompile_vlog \
-lib MYLIB ../lib/MYLIB -work MYLIB \
-norules mylib1.v mylib2.v
Once compiled, the library can then be used in a normal SpyGlass run.
For example, if the MYLIB library compiled above is used in design.v,
enter:
-lib MYLIB ../lib/MYLIB -policy=lint design.v
NOTE: Comment lines are processed while analyzing the source Verilog library
files but are not stored in the pre-compiled Verilog libraries.
Mapping Pre-compiled Verilog libraries

To tell SpyGlass where to find a pre-compiled Verilog library, you must

map the library’s logical name (the name used in your HDL design) to
its actual physical location (the directory where the compile library is
stored). You can do so using the -lib option.
Enabling RTL Rule-checking of Precompiled Verilog Libraries

(depending on the rules selected) on user-compiled Verilog design units
by default.
Supply the -hdllibdu option to enable RTL rule-checking on these user-
compiled Verilog design units also.
Encrypting Precompiled Verilog Design Units

While creating the pre-compiled Verilog modules, use the -
enable_hdl_encryption command-line option to pre-compile and
encrypt the design in to a binary format.
When you use the encrypted pre-compiled Verilog modules with
SpyGlass, all rule-checking on these Verilog modules is enabled by
default. Any highlighting information inside such modules is shown on
on such Verilog modules specifying the -disable_encrypted_hdl_checks
command-line option. If you specify this command-line option,
SpyGlass internally removes any messages that point inside an
encrypted IP.

Working with Precompiled Verilog Libraries in the Mixed-

Language Mode
Consider the following mixed-language design example:
//top.v
module top;
middle m1();
endmodule
--middle.vhd
entity middle is
end middle;
architecture mid of middle is

begin
M1: entity work.bottom(module);
end mid;
//bottom.v
module bottom;
endmodule
In this example, Verilog module top instantiates VHDL DU middle
that in turn instantiates Verilog module bottom.
To perform a multiple step compilation, follow these steps:
1. Compile the bottom.v file as follows:
bottom.v -work mylib1 -lib mylib1 ./MYLIB1
2. Compile the middle.vhd file as follows:
spyglass -batch -vhdl \
middle.vhd -work mylib1 -lib mylib1 ./MYLIB1

3. Invoke SpyGlass on the top.v file as follows:

spyglass -batch -mixed -enable_precompile_vlog \
top.v -work mylib1 -lib mylib1 ./MYLIB1
The different instantiations in the example are resolved as follows:
• Search the design unit named middle in the source file top.v.
• As the design unit named middle does not exist in the source file
top.v, search in the WORK library (and any other libraries specified
with the -lib option) among Verilog DUs.
• As the design unit named middle does not exist in Verilog DUs in
the specified libraries, search the VHDL DUs in the WORK library.
• The design unit named middle is found in the VHDL DUs and is
resolved.
• As the VHDL design unit middle contains an instantiation of DU
named bottom, search among VHDL source files. If not found,
search VHDL DUs in the WORK library (and any other libraries
specified with the -lib command-line option).
• As the design unit named bottom does not exist in VHDL DUs in
the specified libraries, search the Verilog source files. If not found,
search the Verilog DUs in the WORK library (and any other libraries
specified with the -lib command-line option).
The design unit named bottom is found in the Verilog DUs and is
resolved.
Please note the following:
• You need not compile the bottom.v file (Step 1 above); just supply it
using the -v command-line option as follows:
top.v -work mylib1 -lib mylib1 ./MYLIB1 \
-v bottom.v
Then, the bottom.v file is also searched in addition to the Verilog DUs
in the WORK library (and any other libraries specified with the -
lib command-line option). Thus, the DU named bottom is found

and resolved. Once the bottom.v file is analyzed, the DUs in the file
are also compiled and stored in the WORK library for future use.
• You can also compile and store all the DUs of the above example in
a single command as follows:
top.v middle.vhd -v bottom.v \
-work mylib1 -lib mylib1 ./mylib1
Then, all DUs are compiled and stored in the mylib1 directory.
Now, suppose you have used the pre-compiled module named top in
another design file named mytop.v. You can compile the complete
hierarchy as follows:
mytop.v -work mylib2 -lib mylib1 ./mylib1 \
-lib mylib2 ./mylib2
The above command would use the -lib mylib1 ./mylib1
part to find and bind the instantiation of the DU named top.
• It is not required to specify the -lib command-line option for
various parts of the sub-hierarchy. Instantiation information is
picked from the .dep file for each compiled DU.
NOTE: Also refer to the Handling BuiltIn Messages While Using Precompiled
Dump topic.
Support for Foreign Attributes

SpyGlass supports foreign attributes in the following syntax:
ATTRIBUTE FOREIGN OF <architecture-name> :
ARCHITECTURE IS "VERILOG : <module-name>
-lib <library-name>";
The architecture containing the foreign attribute will not be part of the
design hierarchy and hence will not be elaborated and synthesized in
case search for Verilog master is successful.

Specifying Verilog Libraries Using the 'uselib Statement
If you have not specified any Verilog library name, then SpyGlass
searches for Verilog master in current Verilog source files only.
Specifying Verilog Libraries Using the 'uselib

Statement
The 'uselib statement is used to specify the Verilog source library
file or directory in which SpyGlass should search for the definitions of
modules or UDPs instantiated in a design.
You can use the 'uselib statement in the following ways:
1. Specify the source library file directly using the following syntax:
'uselib file=<file-name>
Where <file-name> is the name of the source file containing the
module/UDP description.
2. Specify the directory containing the source library file (and the file
extension) using the following syntax:
'uselib dir=<dir-name> libext=<ext-list>
Where <dir-name> is the name of the directory containing the
source library files and <ext-list> is the plus character-
separated list of file extensions (including the dot[.] character).
'uselib dir=/usr/john/myvlibs libext=.v+.vlog+.vlg
3. Specify a pre-compiled library using the following syntax:
'uselib lib=<lib-name>
Where <lib-name> is the logical name of the pre-compiled
Verilog library containing the module/UDP description.
NOTE: In this case, you also need to specify the pre-compiled Verilog
library to SpyGlass as described in Working with Pre-compiled Verilog
Libraries in SpyGlass design Environment or Working with Pre-compiled
Verilog Libraries in the Batch Mode.

Including Defined Macros

In your Verilog design, you can have source code that should be
compiled if certain conditions are met. An example would be as
follows:
‘ifdef MacroName
...
‘else
...
‘endif
Alternatively, you can have created text macros (using 'define
directive) that must be substituted with actual values at compile time.
In such cases, you need to tell the SpyGlass Design Environment what
values to use. You can do so using the Macro definitions (+define) field in
the Verilog Tab of Setup > Run Options... menu option.
NOTE: The 'define directives can be included in Verilog source files - however,
these files must then be analyzed first by the SpyGlass Design Environment
before the remainder of the design files.
Including Common and Global Code

Your design can contain code that defines some frequently performed
action and is used in a number of modules in identical manner. Then,
Verilog allows you to separate out this common code in to a separate
source file and include this source file at required locations in the
design using the 'include compiler directive.
When using 'include files in Verilog, it is recommended to use
relative path names instead of absolute pathnames to ensure portability
of the include files.
To support this feature, the SpyGlass Design Environment requires you
to specify the 'include file with relative pathnames and use the Include
Dirs(+incdir) field in the Verilog Specific Options tab of Setup >

Specifying Compressed Verilog Designs
Library... menu option to name the directories that contain these files.
The SpyGlass Design Environment first searches the current directory
for the 'include files. It then searches the directories specified by
the Include Dirs(+incdir) field in the Verilog Specific Options tab of Setup
> Library... menu option in the sequence in which you list them.
SpyGlass returns an error message and terminates if it cannot find all
the required 'include files in your directory structure.
When using this feature with relative pathnames, you cannot have
duplicate file names in the directory list. The file corresponding to the
second instance of the duplicate file name will never be read because
the SpyGlass Design Environment searches the directory structure until
it finds the first instance of the file and then stops.
Specifying Compressed Verilog Designs

You can directly specify compressed Verilog netlist/RTL file(s) (.gz
files) to SpyGlass. This avoids the task of uncompressing the netlist/
RTL files that are usually huge in size, thereby occupying large disk
space.
To use a compressed netlist/RTL file directly in SpyGlass, specify the
name of the file on command-line while invoking SpyGlass, as shown
%> spyglass netlistDesgn.gz
Defining the top of a Dependency Tree

SpyGlass creates and maintains a dependency tree of your design
modules. In Verilog, the hierarchy is implicit from the top-level
module. The recommended way is to manually define the top of the
hierarchy or sub-hierarchy that you wish SpyGlass to analyze
(described in Managing the Design Hierarchy).

Skipping Specific Modules

Some design modules can be placeholders for information to be added
later or for pre-designed code or Intellectual Property yet to be
provided. Since no information is available yet to do detailed internal
checking with SpyGlass, you need to stop SpyGlass from processing
these modules. The recommended way is to manually stop SpyGlass
processing a module or sub-hierarchy (described in Managing the
Design Hierarchy).
Rules analyzed before a Stopped Design Unit is

detected
The SpyGlass Design Environment currently analyzes certain rules
before it detects a stopped design unit. This limitation will be addressed
in future releases. The affected rules are:
• Lexical checks (Line length, Use of tabs, Indents)
• Name checks (both unique and reserved names)
• Checks disallowing use of specified synthesis pragmas
• Checks on the use of sufficient numbers of parentheses in
expressions
• Checks on the use of hard constants
• Checks that should not disable out of a loop
• Checks on the use of multi-line comments
Working with the 'celldefine Modules

By default, SpyGlass processes Verilog modules enclosed in the
'celldefine and 'endcelldefine compiler directives as
normal source modules if the 'celldefine modules are described in a

Working with the 'celldefine Modules
source file and processes them as normal library modules if the

'celldefine modules are described in a library file (as described in
Working with Verilog Libraries).
SpyGlass expects that the instances of these 'celldefine modules are
given instance names. However, if the instance names are not provided,
SpyGlass flags a warning and automatically names such unnamed
instances as _SpyInst_0, _SpyInst_1, and so on.
SpyGlass provides the following ways to control processing and rule-
checking of 'celldefine modules that you can specify from the Other
option of the SpyGlass Design Environment or on the command-line
while working in the batch mode:
1. The -check_celldefine command-line option to perform
rule-checking on the 'celldefine modules.
The following table describes the effect of the absence of the
-check_celldefine command-line option for different type of
rules:
Rule Type Without -check_celldefine option

HDL File Parsing Language syntax errors checking and reporting
Rules
HDL Semantics Rules No checking or reporting.
RTL description Rules No checking or reporting.
Hierarchical netlist- No checking or reporting.
level Rules No messages are reported on `celldefine modules.
However, the functional model of these cells are
read and used by SpyGlass.

Rule Type Without -check_celldefine option

FLAT netlist-level rules In full-design FLAT netlist view, no messages are
reported on `celldefine modules. However, the
functional model of these cells are read and used
by SpyGlass.
Lexical Text source No checking or reporting.
rules
2. The -no_synth_celldefine command-line option to ignore the
'celldefine modules after RTL description-level processing and rule-
checking
SpyGlass provides the -no_synth_celldefine command-line
option to disable synthesis on all 'celldefine modules. All such
Verilog modules become SpyGlass Graybox modules in post-
synthesis representation only.
3. The -no_celldefine_messages command-line option to
ignore ALL messages for the 'celldefine modules.
The -no_celldefine_messages command-line option
disables synthesis and rule-checking of 'celldefine modules and also
suppresses all other messages (for example, the
ReportUnsynthesizedDU rule messages) for these modules.
4. The -no_rcheck_celldefine command-line option to
suppress pre-synthesis and post-synthesis hierarchical netlist rule-
checking but enable FLAT netlist rule-checking on 'celldefine
modules
NOTE: The order of priority of these switches is as follows:
1. -no_celldefine_messages
2. -no_synth_celldefine
4. -no_rcheck_celldefine
If only -no_synth_celldefine is specified, all post-synthesis
checks are disabled on the `celldefine modules (they become graybox in
synthesis with no body).
If both -no_rcheck_celldefine and

Working with Memories
-no_synth_celldefine are defined, all checks (including

synthesis) are skipped for the 'celldefine modules.
Rule-checking of Hierarchy in 'celldefine Modules

By default, a top that is inside a 'celldefine module is ignored for rule-
checking. However, you can use the -allow_celldefine_as_top
command-line option to perform rule-checking on 'celldefine
module top's hierarchy.
Working with Memories

Synthesizing memories (2-dimensional arrays) in RTL designs has
always been a resource- and time-consuming task; some designs even
run out of system memory. When the memory is synthesized, each bit
location of the synthesized memory is represented by a flip-flop or
latch in the synthesized netlist. This can easily consume an appreciable
amount of system memory, resulting in design capacity problems.
To control compilation of memories in a Verilog module, SpyGlass
does not compile modules where the total bit-count (post-elaboration)
of the memories in a module exceed 4K bits.
Use the -mthresh command-line option from the Other command line
options field of Other Tab of Setup > Run Options... menu option of the
SpyGlass Design Environment or on the command-line while working
in the batch mode to set a different threshold.
Inferring Blackboxes
When SpyGlass analyzes a design containing ASIC cell instances or
instances of modules not defined in the source files, SpyGlass looks for
the corresponding cell or module definition in the associated Synopsys
Library (.lib file). For the instances where the corresponding cell or
module definition is found, SpyGlass inserts the correct port interface.

For all other instances, SpyGlass assumes them to be blackboxes with a

port interface containing all input/inout ports. However, this
assumption may result in problems like feedback loops around the
inout ports after synthesis.
To address this problem, SpyGlass has the feature of blackbox
inference. Then, SpyGlass tries to heuristically determine the blackbox
module wrappers (port names, port sizes, port directions, port order,
and the module parameters) for each blackbox type by analyzing the
blackbox instances.
Using the blackbox inference feature improves the SpyGlass
performance for designs with instances of real blackboxes (i.e.,
modules whose definition is not available at that time). Ideally, the
designs should not have any blackboxes.
For Verilog blackbox instances in the Mixed-Language mode,
SpyGlass infers similar information as in the Verilog Only mode.
However, SpyGlass skips processing of the blackbox instances that
appear in both Verilog and VHDL design units.
NOTE: SpyGlass understands module interface definition in Synopsys
LibertyTM files (.lib files), and hence, the blackbox inference feature is required
for real blackboxes only.
NOTE: The blackbox inference feature is restricted to Verilog design flows only
as VHDL designs strictly require component declarations before use and
hence do not require such preparatory steps.
How the Blackbox Inference Feature Works

The blackbox inference feature of SpyGlass works at the following two
levels:
1. After RTL analysis
SpyGlass heuristically determines the port information as follows:

Port Attribute Inferring Method

Number of ports From instance port map
Port names For named port connections in the blackbox instance,
the port names are same as those specified in the
design.
For positional port mapping, SpyGlass uses an
internally defined naming method.
Port directions All ports are assumed to be of type input
Port sizes Same as the width of the widest (vector) signal
connected to the port when checked across all
instances of the same blackbox. Then, the right hand
bit of the port width range is always 0 and the left hand
bit is one less than size of the widest connected vector.
When SpyGlass Verilog Analyzer encounters the first instance of a
blackbox, it creates a master module for it, with port/parameter
interface matching the current instantiation. As it encounters more
instants of the same blackbox, the port/parameter interface of the
master module is enhanced as required.
2. After synthesis and flattening
SpyGlass heuristically determines the port directions after flattening
based on the connectivity of the net connected to the blackbox port:
Port Direction
Net connected to the port is... is inferred as...
A hanging net or is also connected to an inout inout
port of a synthesizable module
Set at least once and may or may not be read input
Never set and is read at least once output

Using the Blackbox Inference Feature

Run the SpyGlass Design Environment with the -inferblackbox
option supplied from the Other command line options field of Other Tab
of Setup > Run Options... menu option along with all available Verilog
source files and the .lib files and other required options.
You must specify all available Verilog source files and the .lib files.
Only the modules that are not defined in any of these files will be
processed for blackbox inference.
SpyGlass creates inferred blackbox wrapper modules in a file named
sgBlackbox.v (created in the spyglass_sch directory in the current
working directory) that has the port directions inferred at flattened
netlist-level and uses it for rule-checking.
In this case, the RTL description-level rules may flag false messages or
may not flag messages around the blackbox instances as all blackbox
ports are assumed to be input type ports.
Inferring Port Directions at RTL Description-Level

You can also force SpyGlass to additionally infer port directions at the
RTL description-level using the -inferblackbox_rtl option
(instead of the -inferblackbox option) for better RTL
Description-level rule-checking. Then, port directions are inferred both
after analysis and after synthesis and flattening.
Then, SpyGlass creates another file named sgBlackboxrtl.v in the
spyglass_sch directory in the current working directory (besides the
sgBlackbox.v file) that has the inferred blackbox wrapper modules with
port directions inferred at the RTL Description-level.
CAUTION: Inferring port directions at the RTL Description-level is time-
and memory-consuming process. Use it with caution!

Checking the Inferred Information

In case, the port/parameter information inferred by the SpyGlass
Blackbox Inference feature appears to be different from what you
expected, please review the sgBlackbox.v file or the sgBlackbox.v file
(created in the spyglass_sch directory in the current working directory)
that has the inferred blackbox wrapper module descriptions.
NOTE: Please copy the sgBlackbox.v file from the spyglass_sch directory to
another directory (say to the current working directory)) as the spyglass_sch
directory is overwritten after each SpyGlass run.
Check the sgBlackbox.v file for the following:
• Number of blackbox wrappers modules
If this number is very large, it indicates that a significant fraction of
design is based on structural instances for which no information is
supplied. Hence, the result of SpyGlass Analysis is potentially
incomplete or inaccurate since large number of such modules
increases the macro-level uncertainty about interaction of these
blackbox instances with other parts of the design. One possibility is
that you have not supplied all the design files. In any case, you
should satisfy yourself that all blackbox module wrappers are only
those for which no information is actually available at time of
running SpyGlass.
• Blackbox wrapper module port interface
For each (actual) blackbox wrapper module, you should inspect all
port information — port names, port sizes, port directions, and order
of ports. The inferred definition lists all instances based on which
the wrapper was inferred. However, since all instances together may
still not have certain information that you know otherwise, you
should modify the inferred module wrapper for any of the port
attributes. You can also add any ports that are never used in
instances within that design.
• Blackbox wrapper module parameter interface

For each (actual) blackbox wrapper module, you should also inspect
parameter inferred because at least those many parameters have
been used for parameter value override at time of instantiation.
However, almost all existing SpyGlass Design Environment
functionality does not depend on use of these blackbox instance
parameter overrides. Hence, you can specifically look at the
parameter interface only if the parameters actually affect the port
size of some of the blackbox module ports.
Using the Corrected Inferred Information

You can also use the corrected inferred information for a SpyGlass
Analysis run by running the SpyGlass Design Environment with all
available Verilog source files, .lib files, the corrected sgBlackbox.v file
and other required options.


Analyzing Mixed-
Language Designs
Overview
The SpyGlass Design Environment provides the capability for handling
mixed-language designs which contain HDL description in both
Verilog and VHDL syntax. Such mixed-language description is read
and processed by the SpyGlass Design Environment in exactly the same
method that a Verilog Only design or a VHDL Only design is read and
processed by the SpyGlass Design Environment, subject to the changes
described in this chapter.
Mixed-Language Design Semantics

The SpyGlass Design Environment can process Mixed-Language
designs that follow the commonly accepted Mixed-Language design
semantics. See Mixed-Language Design Syntax and Semantics
Requirements for details.

Using Atrenta Standard Policies
Using Atrenta Standard Policies

All Atrenta standard policies can work with Mixed-Language designs.
If a rule is registered to work with Verilog only, then that rule is applied
to the Verilog part of the Mixed-Language design. Similarly, if a rule is
registered to work with VHDL only, then that rule is applied to the
VHDL part of the Mixed-Language design. Rules that are registered to
work with both HDLs are applied to the entire Mixed-Language design.
Refer the respective Policy Release Notes and the Rules Reference
documents for details.
Specifying a Mixed-Language Design

To run its built-in tests properly, SpyGlass needs to know whether you
are using VHDL only, Verilog only, or both to develop your design.
To tell the SpyGlass Design Environment that you are running Mixed-
Language design, set the language to Mixed from Language Tab of
Setup > Run Options... menu option, if not already set.
NOTE: You can use the Mixed setting to process Verilog Only designs, VHDL
Only designs, or Mixed-Language designs.
Using Language-Specific Settings

While processing a Mixed-Language design, you can set all language-
specific fields. Then, the VHDL-specific settings will work only on the
VHDL part of the Mixed-Language design and the Verilog-specific
settings will work only on the Verilog part of the Mixed-Language
design.
The language-independent settings work on the complete Mixed-
Language design.

Analyzing Mixed-Language Designs
Rule Registration and Execution
RTL Description-Level Rules

The SpyGlass Design Environment registers and executes RTL
Description-level rules as follows:
TABLE 4. Rule Registration Language is Verilog
Analysis with Analysis with Analysis with

Verilog Language VHDL Language Mixed Language
Input Design setting setting setting
Verilog Only design Executed on full Error Executed on full
design. design.
VHDL Only design Error Not executed. Not executed.
Mixed-Language design Error Error Executed on the
Verilog portion only
TABLE 5. Rule Registration Language is VHDL

Verilog Only design Not executed Error Not executed.
VHDL Only design Error Executed on full Executed on full
design. design.
Mixed-Language design Error Error Executed on the
VHDL portion only

Rule Registration and Execution
TABLE 6. Rule Registration Language is Verilog+VHDL

design. design.
design. design.
Mixed-Language design Error Error Executed on full
design.
Flat Netlist-Level Rules

The SpyGlass Design Environment registers and executes netlist-level
rules as follows:
TABLE 7. Rule Registration Language is Verilog

design. design.
VHDL Only design Error Not executed. Not executed.
(Verilog top module) design.
Mixed-Language design Error Error Error (due to
(VHDL top module) incorrect flattened
netlist)

TABLE 8. Rule Registration Language is VHDL

Verilog Only design Not executed Error Not executed.
design. design.
Mixed-Language design Error Error Error (due to
(Verilog top module) incorrect flattened
netlist)
(VHDL top module) design.
TABLE 9. Rule Registration Language is Verilog+VHDL

design. design.
design. design.

Working with Mixed-Language Designs
Working with Mixed-Language Designs
Designs with VHDL Library Design Units Instantiated in Verilog

Modules
To analyze Mixed-Language designs with VHDL Design Units
instantiated in Verilog modules:
1. Pre-compile the VHDL design units into a library as described in
Working with VHDL libraries.
This step pre-compiles the VHDL design units available in VHDL
source files and dumps them in specified WORK directory.
2. Run the SpyGlass Design Environment with Verilog source files
(specified through the Setup > Source... menu option), VHDL
library compiled earlier (specified from the Setup > Library... menu
option) under Mixed-Language setting.
Designs with Verilog Library Modules Instantiated in VHDL

Design Units
To analyze Mixed-Language designs with Verilog Library Modules
Instantiated in VHDL Design Units:
1. Pre-compile the Verilog libraries as described in Working with
Verilog Libraries.
2. run the SpyGlass Design Environment with VHDL source files
(specified through the Setup > Source... menu option), Verilog
library (specified from the Setup > Library... menu option) under
Mixed-Language setting.

Handling BuiltIn Messages While Using

Precompiled Dump
While parsing RTL files to generate a precompiled RTL dump,
SpyGlass reports a set of parsing-related builtin messages (such as
INFO, WRN, and SYNTH). However, these messages are not
displayed when you use the already created precompiled dump by
specifying the -lib option.
If you want to view these messages during the usage of the
precompiled dump, perform the following steps:
1. Specify the -dump_precompile_builtin option while creating the
precompile dump.
SpyGlass then saves the parsing-related builtin messages in separate
files under the precompiled dump directory.
2. Specify the -hdllibdu option while using the already created
precompiled dump.
SpyGlass then picks and reports builtin messages from the files
created in the first step.
Example
Consider the following VHDL code (mixed.vhd) that results in the
WRN_405 violations:
-- pragma synthesis_off
-- synopsys translate_off
-- some VHDL code
-- synopsys translate_on
-- pragma synthesis_on
The following scenarios explain the usage of the

-dump_precompile_builtin and -hdllibdu options:

Handling BuiltIn Messages While Using Precompiled Dump
Scenario 1 Creating a precompiled dump:

The WRN_405 violations are not reported spyglass -mixed test.vhd -noelab
during the usage of the precompiled dump -lib L1 P1 -work L1
as the
-dump_precomile_builtin
option is not specified during the creation Using the precompiled dump:
of that precompiled dump.
spyglass -mixed -top top -lib L1 P1
Scenario 2 Creating a precompiled dump:
The WRN_405 violations are reported spyglass -mixed test.vhd

during the usage of the precompiled -dump_precomile_builtin -noelab
dump as the -lib L1 P1 -work L1
-dump_precomile_builtin option
is specified during the creation of the
precompiled dump, and the -hdllibdu Using the precompiled dump:
option is specified during the usage of spyglass -mixed -top top -hdllibdu
the precompiled dump. -lib L1 P1
Notes
Please note the following points:
• As builtin messages may change across releases, you must
precompile your libraries for each release in which you want to use
the precompiled dump. This is because SpyGlass restores the builtin
messages of only those precompiled units that have been compiled
in the current version.
• If you want some policy-specific builtin checks to be reported on the
usage of precompiled design units, then during the RTL
precompilation step, you must set the value of the
AUTOENABLE_BUILTIN_CHECKS_FOR_POLICY configuration
key to an appropriate policy name in the spyglass.setup file.

• SpyGlass restores the builtin messages for only those precompiled

design units that are being checked in the current run. For example,
if a precompiled design unit was stopped, the corresponding builtin
messages are not restored.
• By default, SpyGlass performs rule-checking on encrypted
precompiled design units (design units picked from a precompile
dump created with -enable_hdl_encryption option) even if you do
not specify the -hdllibdu option. To disable rule-checking on such
design units, specify the -disable_encrypted_hdl_checks option.
This option works independent of whether the -hdllibdu option
is specified or not. In conformance with this behavior, in case a
design is precompiled with -dump_precompile_builtin
option, builtin messages on design units picked from such an
encrypted precompiled dump would be reported by default unless
the -disable_encrypted_hdl_checks option is specified.
Impact of the -addrules Option While Using Precompiled Dump

While using precompiled RTL dump, if you enable a builtin rule by
using the -addrules option, but that rule was disabled while
generating that precompiled dump, the corresponding builtin message
is not displayed during the precompiled dump usage even if the -
hdllibdu option is specified. In such cases, you need to precompile that
RTL again with -addrules <rule-name> option. Only then that
builtin message would appear during the precompiled RTL usage.
Impact of the -ignorerules Option While Using Precompiled

Dump
While using precompiled RTL dump, if you disable a builtin rule by
using the -ignorerules option, but that rule was enabled while
generating that precompiled dump, the corresponding builtin messages

Current Limitations
for the rule are not reported during the precompiled dump usage if you
specify the -hdllibdu option.
Current Limitations
1. VHDL design units instantiated in a Verilog module cannot have
unconnected terminals in the port mapping.
2. Port mapping across language boundaries is case-sensitive.
3. In some designs, there can be multiple reporting of same SYNTH
and Elaboration errors.
4. Syntax errors are suppressed during synthesis of a Mixed-Language
design with 'define macro declaration of the following type:
'define macro(A,B,C) A|B|C

Analyzing DEF Designs
Overview
The SpyGlass Design Environment processes DEF designs using the
DEF-specific settings.
This chapter describes how to specify a DEF design to the SpyGlass
Design Environment.
Specifying DEF Design Files

To tell the SpyGlass Design Environment that you are running a DEF
design, set the language to DEF from Language Tab of Setup > Run
Options... menu option, if not already set.
Select the source files from the Setup > Source... menu option. Each
DEF file is considered as a single gate level design unit.

In case of hierarchical DEF design, you can specify multiple DEF

designs, but each DEF file would contain a single design unit.
If you specify more than one source file, you need to select them in the
correct compilation sequence. It is also recommended that you specify
the top-level of the design hierarchy using the -top command-line
option when specifying multiple DEF files.
NOTE: When analyzing the DEF designs, SpyGlass does not accept any form
of RTL (VHDL/Verilog) as input from the user. All design files in the input will be
treated as DEF files. An appropriate message will be displayed if any Verilog/
VHDL files is given as input.
NOTE: When analyzing the DEF designs, SpyGlass allows you to run only the
rules given in the Low Power policy.
Specifying Library Files

A DEF design file contains the design-specific information of a circuit.
This information includes instantiated gates that need to be interpreted
for connectivity analysis. SpyGlass normally treats gates as blackboxes
during analysis and does not attempt to analyze their internals if the
content has not been defined. You can, however, describe their content
in the Synopsys Liberty™ format library files (normally .lib files) that
are un-compiled (plain text format).
You can specify the name of these using the Synopsys Gates Library (-
gateslib) or SpyGlass Library file(s) (-sglib) fields of Other Tab of Setup >
Run Options... menu option of the SpyGlass Design Environment.
SpyGlass interprets the structure and parametric data of the instantiated
gates using the library information.
Specifying LEF Files

When analyzing a DEF design, it is essential to specify the LEF files.
The LEF files provide additional information about the power and
ground pins of the cells present in the library files.

Analyzing DEF Designs
You can specify the LEF files by using the -lef command line option
from the Other command line options field of Other Tab of Setup > Run
Options... menu option of the SpyGlass Design Environment.
NOTE: If you are analyzing a design containing DEF language constructs, you
also need to specify the -enable_pgnetlist option from the Other
option of the SpyGlass Design Environment or on the command-line while
working in the batch mode. This option enables processing of post-layout
netlist files.
When working in the batch mode, to tell SpyGlass to analyze a design
saved in mydesign.def file using the gates libraries mygates1.lib and
mygates2.lib, enter:
spyglass -batch -def mydesign.def -lef mylef1.lef
-gateslib mygates1.lib -gateslib mygates2.lib
-policy=lowpower -enable_pgnetlist
You can also specify compressed LEF files and DEF that have been
generated by using the gzip utility, as shown in the following example:
spyglass -batch -def mydesign.def.gz -lef
mylef1.lef.gz

previous run.


messages.

Controlling the RTL
Synthesis Engine
Role of SpyGlass RTL Synthesis Engine

As explained earlier, once SpyGlass completes its pre-processing, it
analyzes your RTL design in one, two or three steps, depending on the
rule checks you request.
1. SpyGlass checks standard style and Lint rules and then logs
messages in the Violation Database. If you request no other checks,
SpyGlass Analysis ends at this point.
2. If you request rule checks that require inferred logic, SpyGlass
accesses its internal RTL synthesis engine. The engine creates a
design using generic gates. It then uses this design to detect inferred
elements such as latches, flip-flops, and counters. Each element
contains references back to your RTL HDL description, letting
SpyGlass relate message reports directly to your source code. The
design coming out of the synthesis engine in this second step is
hierarchical.
Definitions of the generic gates used by the SpyGlass synthesis
engine are available in the <your-inst-dir>/

Limiting Analysis of Memories
SpyGlass-x.y.z/SPYGLASS_HOME/auxi/target_libs/generic/
rtlc.prim.v and <your-inst-dir>/SpyGlass-x.y.z/
SPYGLASS_HOME/auxi/target_libs/generic/rtlc.prim.vhdl for Verilog and
VHDL cells respectively.
NOTE: If SpyGlass detects HDL syntax messages in your RTL design, it will
not synthesize your code and will not proceed to the second and third steps.
3. Synthesis converts your high-level circuit description into a
hierarchical netlist of generic gates. If you still need to do rule
checks that are best performed on a flat netlist (such as
synchronization logic, combinational loops, and reset rules),
SpyGlass runs a flattener on the hierarchical netlist. Checks in this
final step can include any form of netlist checking.
During the flat netlist rule-checking, empty top-level design units
are ignored as it serves no purpose to perform netlist-level rules on
empty design unit.
Limiting Analysis of Memories

If you include memories (two-dimensional register arrays) in your
Verilog/VHDL design, you can have SpyGlass analyze them for
connectivity messages after the synthesis step. SpyGlass can generate a
register and associated connections for each bit of memory it compiles.
As the size of memory arrays increases, however, the real memory and
runtime requirements for the analysis increase dramatically. At some
point, you are better off compiling small arrays into registers and
treating larger arrays as black boxes. You can use the Upper threshold for
compiling memories (-mthresh) field in Synthesis Tab of Setup > Run
Options... menu option to set an upper limit on the size of the memory
arrays compiled into registers. The SpyGlass default size for compiling
memories is 4K bits. Setting the threshold to a very large number is not
advised due to the hardware memory requirements and runtime
degradation.

Controlling the RTL Synthesis Engine
NOTE: SpyGlass reports how many bits of memory it finds in each module as
part of its standard runtime dialog. You can decide on a reasonable memory
limit after running one pass without using this feature.
We recommend that you define large memories in a separate module.
This allows SpyGlass to continue checking your design in greatest
detail, since if it encounters a large memory it black boxes that module
and has no impact on any other part of the design. This also makes it
easier to replace the RTL definition of a memory with an explicit array
if you’re using one for a particular ASIC.
Preserving all instances and nets in a design

The SpyGlass RTL synthesis engine normally retains hanging nets
(open ended interconnections among logic gates) and hanging/
unconnected instances. If you want to remove these instances and nets
in your design in order that the result matches that of your main
synthesis engine, you can do so by supplying the -nopreserve option
from the Other command line options field of Other Tab of Setup > Run
Options... menu option. Preserving all instances and nets makes it
easier for you to relate inferred logic back to your source code.
Interpreting Synthesis Pragmas

SpyGlass reads most synthesis pragmas that affect RTL description and
some synthesis pragmas that effect the generation of netlist.
Built-in VHDL Synthesis Pragmas

SpyGlass interprets all Built-in VHDL synthesis pragmas except
SYN_INTEGER_TO_BIT_VECTOR and SYN_X_EQL pragmas.

Optimization-Related Synthesis Pragmas

The optimization-related synthesis pragmas are ignored.
Analysis-Related Synthesis Pragmas

SpyGlass reads and interprets the following analysis-related synthesis
pragmas:
Applicable for...
Whether
Synthesis Pragma Verilog VHDL interpreted?
translate_off/translate_on Yes Yes Yes
synthesis_off/synthesis_on No Yes Yes
analysis_off/analysis_on No Yes No
force_off/force_on No Yes No
dc_script_begin/dc_script_end Yes Yes No
full_case, parallel_case Yes NA Yes
state_vector Yes No No
enum Yes No Yes
template Yes No No
map_to_module Yes No No
return_port_name Yes No No
resource Yes No No
Interpreting Synopsys translate_off/on Pragmas

By default, SpyGlass ignores the VHDL design code block between
Synopsys translate_off/translate_on pragmas for synthesis

Controlling the RTL Synthesis Engine
but not for analysis. Thus, SpyGlass will run syntax checking and RTL
Description-level rules on the design code block. However, if you
supply the -hdlin_translate_off_skip_text command-line option from
the Other command line options field of Other Tab of Setup > Run
Options... menu option, the design code block lines are assumed to be
comment lines and even syntax checking and RTL Description-level
rules will not be performed.
The -hdlin_translate_off_skip_text option has no effect
on the interpretation of Synopsys synthesis_off/
synthesis_on pragmas.
For Verilog designs, SpyGlass ignores the design code between
Synopsys translate_off/translate_on pragmas for synthesis
as well as analysis.
Interpreting Synopsys synthesis_off/on Pragmas

By default, SpyGlass ignores the VHDL design code block between
Synopsys synthesis_off/synthesis_on pragmas for synthesis
but not for analysis. Thus, SpyGlass will run syntax checking and RTL
Description-level rules on the design code block. However, if you
supply the -hdlin_synthesis_off_skip_text command-line option from
the Other command line options field of Other Tab of Setup > Run
Options... menu option, the design code block lines are assumed to be
comment lines and even syntax checking and RTL Description-level
rules will not be performed.
The -hdlin_synthesis_off_skip_text option has no effect
on the interpretation of Synopsys translate_off/
translate_on pragmas.


Working with SpyGlass
Messages
Working with Multiple Messages

When you select a message in the SpyGlass Design Environment, all
existing selections and probes are removed. However, you may want to
see the combined effect of two or more messages.
The SpyGlass Design Environment allows you to select multiple
messages and view their combined effect in the Modular Schematic
window or the Incremental Schematic window.
The SpyGlass Design Environment considers the first selected message
as the Main Message. The Main Message is selected by double-clicking
the message in the Msg Tree page of the Message window.
All subsequently selected messages are termed as Auxiliary Messages.
You can select the auxiliary messages by double-clicking with the
<Ctrl> key on the keyboard pressed and the Main Message already
selected.
There are two modes in which the effect of multiple selection of
messages in the Msg Tree page of the Message window is reflected in

Working with Multiple Messages
the other SpyGlass Design Environment windows. These modes are

selected from the Auxiliary Message Display Mode field in the Misc Page
of the Tools > Preferences menu option.
1. With the Selective-Display option selected (Default Behavior)
Under this mode, the SpyGlass Design Environment adds the effect
(text and/or highlighting) of the Auxiliary Messages for the
components already displayed in the Modular Schematic window
and the Incremental Schematic window (due to the Main Message or
other probes). There is no visual change if the Auxiliary Messages
have no effect on the components already displayed.
Also, the Legend window entries are created only if the Auxiliary
Messages have effect on the components already displayed in the
Modular Schematic window and the Incremental Schematic
window.
Any future probe (simple probe, or logic cone probe) on an object
that is affected by the Auxiliary Messages but is not displayed in the
window, will result in display of the object.
The effect of Auxiliary Messages on the objects involved in the
probe is not removed when you deselect a probe (from either the
schematic windows or the Legend window).
When you switch off the display of a probe, the Main Message, or an
Auxiliary Message (from On/Off or IS On/Off buttons of the Legend
window) and then select another Auxiliary Message, the common
components between the Auxiliary Message and the deselected
probe/Main Message/Auxiliary Message are displayed in the
window.
2. With the Complete-Display option selected
Under this mode, all components affected by the Auxiliary
Messages are shown in the Modular Schematic window and the

Working with SpyGlass Messages
This mode is the multiple message selection and display mode that
was existing up to SpyGlass 3.4.0.
NOTE: When you change the selection of the Auxiliary Message Display Mode
field in the Misc Page of the Tools > Preferences menu option, the all selected
probes/messages are removed.
NOTE: These modes are not applicable for RTL-type messages as they have
no associated schematic data.
Selecting Auxiliary Messages Without a Main Message

You can select one or more auxiliary messages (by double-clicking
with the <Ctrl> key on the keyboard pressed) without first selecting a
Main message (by double-clicking).
You can select only upto 32 auxiliary messages. If you select more than
32 messages, then a warning popup dialog is displayed prompting you
to deselect some of the selected messages.
All other operating features remain as earlier.
Limiting the Messages

You may wish to limit the messages generated during the SpyGlass
analysis run for the following reasons:
• Limiting the number of rule messages generated
By default, the number of messages that can be recorded in the
Violation Database is infinite. That means if you are testing old
design data, for example, you may generate vast numbers of

Limiting the Messages
messages if the source was not written according to new design

conventions. For that reason, you may want to limit the number of
messages generated. See Limiting the Number of Rule Messages for
more details.
• Waiving messages that are not real issues
If a particular SpyGlass built-in check or a rule does not represent a
serious problem, you may want to mask the corresponding
messages. See Waiving Messages for details.
The messages exceeding the limit specified for one or more rules and
for the waived rules are not added to the message counts in the
SpyGlass results summary report. Instead, the number of such
messages are indicated by the following type of message:
Suppressed 20 messages (5 waived)
In the above example, a total of 20 messages were suppressed due to
waiver or rule overlimit settings. Out of these suppressed messages, 5
messages were suppressed due to waiver.
Limiting the Number of Rule Messages

SpyGlass lets you limit the number of rule messages that are saved in
the Violation Database for each rule. This feature is helpful when errors
are difficult to identify because one or more rules are producing many
of the same error messages (for example, a name that is used frequently
in a design that violates the defined naming convention). The Maximum
violations by rule name (-lvpr) field in Other Tab of Setup > Run Options...
menu option lets you limit the number of repetitions of an individual
rule message, which makes it easier to see the other errors. You can
also specify the maximum number of messages you want to have
recorded for all rules using the Maximum violations per rule (default) (-lvpr)
field in Other Tab of Setup > Run Options... menu option.
You can use both the Maximum violations by rule name (-lvpr) field and the
Maximum violations per rule (default) (-lvpr) field together to define rule-

wise as well as default limit. The individual rule limit supersedes the
default limit, if specified.
Waiving Messages
If a particular message does not represent a serious problem, you may
want to mask the corresponding message.
To waive messages, you can use one or both of the following features:
• Use the waive keywords in a design constraints file to waive
messages for source files, design units etc. See Waiving Messages
Using the SpyGlass waive Constraint for more details.
• Use the embedded SpyGlass waiver pragmas to waive messages for
design code blocks. See Waiving Messages using SpyGlass Pragmas
for more details.
Using the waive constraint is the preferred method as this approach
does not affect the source files. The waivers are written in a separate
file and can be used with modified source files as long as the
modifications do not invalidate the design constraints. However, you
have to use the embedded SpyGlass waiver pragmas if you need to
waive messages at any level below the design unit level in the source
file.
Effects of Waiving Messages

The effect of waiving messages is as follows:
• SpyGlass results summary (generated at the end of a SpyGlass
Analysis run)
The waived messages are not added to the message counts in the
SpyGlass results summary. Instead, the number of such messages
are indicated by the following type of message:
Suppressed 20 messages (5 waived)

Waiving Messages
In the above example, a total of 20 messages were suppressed due to

message waiver or rule message overlimit settings. Out of these
suppressed messages, 5 messages were suppressed due to message
waiver.
• Violation Database
The rule severity of the waived messages is modified to
waiver[original-severity] in the Violation Database. For
example, the message for Lint policy rule W127 is normally as
follows:
W127@@@@Warning@@rules_w127_1.v@@31@@1@@5@@Delay value
should not contain X or Z
If you waive the W127 message and a corresponding rule message is
found in the design, then the message written to the Violation
Database will be as follows:
W127@@@@Waiver[Warning]@@rules_w127_1.v@@31@@1@@5@@Delay
value should not contain X or Z
Similarly, the SpyGlass Design Environment will also show the rule
severity for waived messages as
waiver[original-severity].
• The Waiver Report
A report named waiver is generated whenever one or more
messages are waived during a SpyGlass analysis run. This report
lists all waived messages. You can view the waiver report from
the Report Menu of the SpyGlass Design Environment.
Waiving Messages Using the SpyGlass waive Constraint
Using the SpyGlass waive Constraint

SpyGlass supports the waive constraint that allows you to waive
message by many categories like by source files, by design units, by

rules, etc. The waive constraint specifications are supplied in a file

with the same format as a SpyGlass Design Constraints file. For more
details of designing and using a SpyGlass Design Constraints file, see
the Using SpyGlass Design Constraints chapter. Then, you can supply
the file containing waive constraint specifications using the -waiver
The syntax for specifying the waive design constraint is as follows:
waive [ -ignore ] [ -regexp ] [ -disable ]
[ -file <file-list> ]
[ -file_line <file-line> ]
[ -file_lineblock <file-sline-eline> ]
[ -du <du-list> | <logical-lib-name> ]
[ -ip <ip-list> | <logical-lib-name> ]
[ -rule | -rules <rule-list> | <keyword> ]
[ -except <rule-list> | <keyword> ]
[ -msg <message> ]
[ -severity <label> ]
[ -weight <weight> ]
[ -weight_range <weight-value> <weight-value> ]
-import <block_name> <block-waive-file>
[ -comment <comment> ]
<keyword> ::=
ALL | ALL_INFO | ALL_WRN | ALL_ELAB
| ALL_SYNTHERR | ALL_SYNTHWRN
Where:
<file-list> is a space-separated list of source file names.
<file-line> is a space-separated pair of source file name and line
number in the following format:
<file-name> <line-num>
<file-sline-eline> is a space-separated tuple of source file name,
start line number, and end line number in the following format:

Waiving Messages
<file-name> <line-num> <line-num>

<du-list> and <ip-list> are space-separated lists of design unit
names (module names <module-name> for Verilog or entity names
in the format <entity-name> [for the entity and all its
architectures], <entity-name>.<arch-name> [for the entity and
the specified architecture], package names <pkg-name>, or
configuration names <config-name> for VHDL) or the logical
library name <logical-lib-name> of a pre-compiled Verilog/
VHDL library.
<rule-list> is a space-separated list of rule names, rule group
names, or policy mnemonics.
<message> is an actual rule message.
<label> is an actual severity-label or a SpyGlass severity class.
<weight> is the actual rule weight value.
<weight-value> is any positive integer number.
<block_name> is the name of the block in the top-level chip.
<block-waive-file> is the name of the waiver file applied to the
specified block <block_name>.
<comment> is any valid string.
Explanation of Arguments
Use the -file argument to waive all messages for the specified files.
Use the -file_line argument to waive the rule messages for a
particular line of a source file.
Use the -file_lineblock argument to waive the rule messages for
a block of lines in a source file.
Use the -du argument to waive the rule messages for the specified
design units or all design units in the specified library.
Use the -ip argument to waive the rule messages for the specified

design units (IP blocks) including the ones which are below its
hierarchy or all design units in the specified IP library.
When you specify a design unit name in the -du or -ip fields, the
comments specified above a module/entity definition are also included
in the span of the module/entity, and violations reported on these lines
are waived. This holds true for use clauses in VHDL. In addition,
violations reported on packages used by entity specified in -du or -ip
fields also get waived.
NOTE: To determine whether a violation belongs to the IP block, SpyGlass
uses the following two criteria:
• If violation highlights schematic, violation is assumed to belong to the IP
block if the whole highlighted data lies completely inside the IP block.
• If violation does not highlight schematic, violation is assumed to belong to
the IP block if the file and line on which the violation is reported belongs to
the IP block.
Use the -rule/-rules argument to waive messages of the specified
rules, rule groups, or policies or by rule type keywords.
Use the -except argument to exclude the specified rules, rule groups,
or policies or by rule type keywords from the scope of the waive
constraint.
Use the -msg argument to waive a message.
NOTE: The message waived in the last release may change in the current
release because of which the waiver file of the last release becomes
incompatible for use in the current release. To make it compatible in the current
release, use the -gen_compat_waiver command-line switch. For more
details on this switch, see the Application Note, Generating Compatible
Waivers.
NOTE: It is higly recommended to use the -rule option in all waive
commands as it improves the runtime of applying that waive command. Also,
the -gen_compat_waiver utility gives better results when -rule
option is specified.

Waiving Messages
Use the -severity argument to waive the messages of the specified

severity class or severity label.
Use the -weight argument to waive the messages of the rules with
the specified weight.
Use the -weight_range argument to waive the messages of the
rules with the weight within the specified range (both range values
inclusive).
Use the -comment argument to add waive constraint comment as a
single line text string enclosed in double quotes. This comment is
printed in the Waiver report and the sign_off report.
The optional -ignore argument causes SpyGlass to list only the
waived message count in the Adjustments Waiver Report section of the
Waiver report and not the actual waived message(s). Use the
-report_adjustment_waiver command-line option to override the
-ignore argument so that the actual waived messages are also
printed.
By default, only the waived message count is reported in the IP/Legacy
Waiver Report section of the Waiver report when the -ip argument of
the waive constraint has been specified. Use the -report_ip_waiver
command-line option to have the actual waived messages also printed.
The optional -regexp argument allows use of regular expressions in
many arguments. For more details, see Regular Expression and
Wildcard Support in SpyGlass waive Constraint.
The optional -disable argument disables the waive constraint.
The -import argument enables importing the waiver file (.swl)
specified at the block-level to be used at the chip-level. For more
details, see Support for Hierarchical Waivers.
Notes
Please note the following while using the SpyGlass waive Constraints:

1. You do not need to specify the current_design keyword with

the waive constraint.
2. The files specified with the -file/-file_line/
-file_lineblock argument are searched using both the
specified file basename and the specified path.
NOTE: Until now, the files were searched by the specified file basename
only. The new behavior will result in same or lesser number of files found
and waived
3. While using the waive constraint, you must supply at least one of
the arguments from one of the following argument groups:
Group 1: -file/-file_line/-file_lineblock, -du, -ip
Group 2: -rule/-rules, -msg, -severity, -except
4. When you supply more than one argument from Group 1, a message
is waived if any one of the argument conditions is met. When you
supply more than one argument from Group 2, a message is waived
only if all argument conditions are met. If you supply arguments
from both Group 1 and Group 2, a message is waived only if any one
of the Group 1 argument conditions is met and all Group 2 argument
conditions are met.
5. If you specify a design unit name with the -du argument, the scope
of the waive constraint is the specified design unit and does not
include the design units instantiated in the specified design unit.
6. If you specify a design unit name with the -ip argument, the scope
of the waive constraint is the specified design unit and its complete
hierarchy.
7. If you specify the -except argument but do not specify the
-rule/-rules argument, it is assumed that the -rule/-rules
argument has been specified with the ALL keyword.
8. Specify the SpyGlass severity classes as uppercase names and the
severity labels as mixed-case or lowercase names with the
-severity argument.

Waiving Messages
9. To waive SpyGlass built-in error, warning, and info messages, use

the following keywords:
Use To waive
ALL_INFO All the analyzer (language) info messages
ALL_WRN All the analyzer (language) warning messages
ALL_ELAB All elaboration messages
ALL_SYNTHERR All synthesis error messages
ALL_SYNTHWRN All synthesis warning messages
ALL All of the above plus all rule messages
NOTE: You can waive all types of built-in rules except the built-in STX error
rules as these rules are mandatory checks.
NOTE: If you specify the ALL keyword, then all (built-in and rule)
messages will be waived for files and/or design units for which it is
specified.
NOTE: You cannot waive policy rules of severity class FATAL.
Please note that all keywords are case-sensitive. You can also
provide a combination of these keywords to waive messages of more
than one type.
10.For waive constraint, all the occurrences of multiple consecutive
spaces (spaces or tabs) between message words are reduced to just
one space. Hence, you are advised not to adopt such messaging.
Also, messages that extend to two or more lines cannot be waived.
11.While using the waive constraint to waive messages, you must
enclose the exact message in double quotes, q/.../, or m/.../
depending on whether you want the string to be interpreted as a
wildcard, literally, or as a regular expression respectively.
12.To get the exact message string for the -msg argument of the
waive constraint, run a SpyGlass Analysis that will generate that
message. Then, open the Violation Database file in any ASCII text
editor and copy the exact message string. Enclose the whole

message string including leading and trailing spaces in double

quotes. Also, escape any double quote (“) character in the message
string using the backslash character (\).
13.The waive constraint is not applied if any of the source files (HDL
files, SpyGlass Design Constraints files, Library files) is found to
have syntax errors during parsing.
Examples of Using the SpyGlass waive Constraint

The following waive constraint directive waives the rule messages of
W146 and W336 for the test.vhd file:
waive -file test.vhd -rules W146 W336
The following waive constraint directive waives all messages for the
test.v file:
waive -file test.v -rules ALL
The following waive constraint directive waives all analyzer (language)
warning messages for the test.vhd file:
waive -file test.vhd -rules ALL_WRN
The following waive constraint directive waives the rule messages of
W154 and W146 for the module named upper:
waive -du upper -rules W154 W146
The following waive constraint directive waives all messages for the
architectures named rtl1 and rtl2 of entity flop:
waive -du flop.rtl1 flop.rtl2 -rules ALL
The following waive constraint directive waives all synthesis warning
messages for the module named upper:
waive -du upper -rules ALL_SYNTHWRN
The following waive constraint directive waives the specified message
for the test1.v and test2.v files:
waive -file test1.v test2.v -msg “Blocking \

Waiving Messages
assignment used inside a sequential block”

The following waive constraint directive waives the specified message
the design unit named upper:
waive -du upper -msg “Explicit named association \
is recommended in instance references”
The following waive constraint directive waives messages of all rules
with severity label Warning for the test.vhd file:
waive -file test.vhd -severity Warning
with severity label Info for the architecture named rtl for entity
named a123:
waive -du a123.rtl -severity Info
with severity label Warning for the test.v file and design unit named
upper:
waive -file test.v -du upper -severity Warning
Regular Expression and Wildcard Support in SpyGlass waive Constraint

The waive constraint also supports regular expressions and wildcards
to waive rule messages, easing the waiving of multiple look-alike
messages.
NOTE: It is recommended to use wildcards more than regular expressions as
wildcards are easy to use and operate. Star (*) and question mark (?) are two
supported wild cards. * matches any string and ? matches any one character.
A regular expression or a wildcard can occur in the values of all
arguments of the waive constraint except the rules names specified
with the -rule/-rules argument and -except argument, severity
labels specified with the -severity argument, the line numbers
specified in the -file_line and the -file_lineblock
arguments and the strings specified with the -comment argument.

By default, the waive constraint assumes wildcard expressions (no

regular expression). You can invoke regular expression feature through
the -regexp argument in the waive constraint.
NOTE: All waiver commands that are not specified with the -regexp argument
and are enclosed in quotes are subjected to expansion in the Wildcard mode.
For further information, please refer to Wildcard Mode.
While using regular expression or wildcard in the -msg field, it is
highly recommended to use complete message string with regular
expressions or wildcards for the part that is changing across messages.
Consider an example in which you want to waive the following
violations:
Incompatible width for port 'srout'(width 9 in module
'sr') on instance 'd8'(terminal width 1),
[Hierarchy:srtop]
'sr') on instance 'd16_1'(terminal width 1),
[Hierarchy:srtop]
'sr') on instance 'd16_2'(terminal width 1),
[Hierarchy:srtop]
You can waive the above violations by specifying the following
command:
waive –msg “Incompatible width for port 'srout'(width 9
in module 'sr') on instance '.*’” –regexp
However, the recommended way is to specify the complete message
string with regular expressions and wildcards in the -msg field, as
given in the following command:
waive –msg “Incompatible width for port 'srout'(width 9
in module 'sr') on instance '.*’(terminal width 1),
\[Hierarchy:srtop\]” –regexp
SpyGlass uses the regcomp and regexec commands (C/C++) of
your operating system to process the regular expressions. A regular

Waiving Messages
expression is first compiled as an extended regular expression. If not

matched, the regular expression is compiled as a basic regular
expression. Please refer the regexec man page for details of regular
expression support. You can also refer the regrep man page for more
details.
The following metacharacters have special meaning in regular
expressions and hence need to be escaped using backslash character
when used as literals:
{ } [ ] \ / $ ? * ^ | - “ .
See the Application Note “Using Regular Expressions in SpyGlass

Waiver Constraints” for basics of regular expressions, use of the
Waiver report, and examples.
Selective Use of Regular Expressions

When you specify the -regexp argument with the waive constraint,
SpyGlass processes the values specified with all applicable arguments
as regular expressions.
You can also specify the values of only a selected set of arguments are
to be processed as regular expressions using the m/.../ (process as
regular expression) format and q/.../ (process as string) format.
Then, you do not need to specify the -regexp argument.
The following table summarizes the effect of using the m/.../ and
q/.../ formats with or without the -regexp argument:
-regexp both m/.../ and q/.../

option m/.../ specified q/.../ specified not specified
Specified Redundant Process as string Process all
(Process all applicable as
applicable as regular expression
regular expression)
Not Process as regular Process as string Wildcard
specified expression


waive -file m/test/ -severity Info
The above specification will waive all messages of severity Info in all
files whose names contain string test (test.v, test.vhd, mytest.v, etc.).
However, please note the following points:
• If you are only using wildcard characters, you should NOT specify
the -regexp argument as it will unnecessarily search for match in
all the mentioned fields as a part of the waiver.
• If you want to apply regular expression on a specific field, such as
-msg), use m/.../ instead of the -regexp argument (due to the
same reason mentioned in above point).
Handling Special Names

You cannot use the m/.../ and q/.../ formats with values that
contain a forward slash (/) as it is used as a delimiter by these formats.
Then, you can use one of the other supported delimiters listed below:
! @ % ^ & * ; ~ ? < > + = |
For example, you can use m@...@ format or q>...> formats

provided the same delimiter is used as the starting delimiter and the
ending delimiter (that is, m<...> is not allowed.) and the delimiter is
not present in the value being enclosed (that is, q@name@top@ is not
allowed). The m format and q format can use different delimiters.
Waiving Messages in waiver/sgdc files using SpyGlass Pragmas

You can waive rule messages in the waiver/sgdc files by embedding
SpyGlass waiver pragma directives at appropriate places.
Then, the specified rules or rules of the specified rule group, which
have been waived, are not reported in the SpyGlass Message Reports
and the corresponding rule messages are not written to the Violation

Waiving Messages
Database.
You can use the disable_block and enable_block pragmas to
disable and enable rules, as given below:
//spyglass disable_block R1
...
...<cmd>
...
//spyglass enable_block R1
Here, SpyGlass disables rule checking for the rule, R1, in the lines after
//spyglass disable_block R1. However, SpyGlass resumes
rule checking for the rule, R1, in the lines after
//spyglass enable_block R1 is specified. Here, <cmd> will
continue to work, if specified correctly, irrespective of the pragmas.
You can also use # instead of // while specifying the
disable_block and enable_block pragmas. For example:
#spyglass disable_block R1
...
...
#spyglass enable_block R1
The disable_block and enable_block pragmas can be nested.
However, the scope of the pragmas depends upon the way they have
been specified. For example:
...
rule1 active
//spyglass disable_block rule1
... rule1 waived
... rule1 still waived
//spyglass enable_block rule1
rule1 active
...

You can also specify a comma-separated list of rule names or the name
of the rule group, as shown in the following examples:
• //spyglass disable_block R1,R2
Where, R1 and R2 are the rules to be waived
• //spyglass disable_block R1,G1
Where, G1 is the rule group name. In this case, all the rules
belonging to this group will get waived.
You can use the ALL keyword to waive messages of all the rules. After
specifying ALL keyword in the disable_block pragma, you cannot
explicitly turn on a particular rule by specifying that rule name in the
enable_block pragma. For example:
//spyglass disable_block ALL
...
//spyglass enable_block R1
...
Here, rule checking for R1 will still remain off. In this case, you need
to use //spyglass enable_block ALL to enable rule checking
of all the rules.
Support for Hierarchical Waivers

SpyGlass provides the capability to chip-level designers to use all the
waivers specified by a block-level designer on the block, during chip-
level analysis, using SpyGlass. To support this feature, you can now
use the waive -import command, which enables you to import the
waivers specified in the block-level design into the chip-level design.
You may specify waivers to individual blocks separately in the
top-level chip. The general syntax of the waive constraint for
importing the waiver file for the specified block is as follows:
waive –import <block_name> <block-waive-file1>
waive –import <block_name> <block-waive-file2>

Waiving Messages
The <block_name> can be module name or entity name. It is not

recommended to prepend/append library name or architecture name,
module or entity name.
The block waiver file will be applied to the design units matching any
of the above specification.
The path of the waiver file <block-waive-file> can be specified as
relative or absolute. If the path specification is relative, it should be
accessible from the current run directory.
Consider the following example, where B1 and B2 are two blocks
inside the top-level chip, and B1.swl and B2.swl are the waiver files
applied to these two blocks, respectively:
waive –import B1 B1.swl
waive –import B2 B2.swl
You can specify multiple waiver files for a given block by specifying
multiple waive -import constraints. You may also specify the same
waiver file to two different blocks. In such a case, the block waivers
will be applied independently to the respective blocks.
NOTE: The commands specified in the waiver file to be imported are
applicable only to the hierarchy of the module specified with the waive
-import constraint.
The generated output file contains two sections. Section I displays the
successfully migrated waive commands. Section II is generated only
if there are non/incompletely migrated commands. This section
displays the non/incompletely migrated commands, with inline reason
of the migration failure.
If you specified two files for the same block, two new waiver files will
be generated corresponding to each (specified file). If one waiver file is
specified for two different blocks, then two files will be generated (one
file for each block).

Handling Waivers - New Use Model

Prior to SpyGlass 3.9.0 release, if a design block was not being used in
a design, the waive commands for that block were still applied to the
current SpyGlass run. This was resulting in flagging of unwanted
messages (warning messages for unapplied waivers).
The new use model enables you to ignore waivers for the design blocks
that are not being used in the current SpyGlass run. Based on the new
use model, you can create block-level waiver files for different design
blocks and import the block-level waiver files in the top-level waiver
file. SpyGlass will then process only those block-waiver files for which
the block specified in the import command is instantiated in the design
hierarchy of the current run. In this way, you can ignore the waivers
corresponding to design blocks that are not being used in that run.
Consider an example where you have three blocks: designblkA,
designblkB and designblkC. The import waiver commands for the three
blocks may be given as follows:
waive -import designblkA waive_designblkA.swl
waive -import designblkB waive_designblkB.swl
waive -import designblkC waive_designblkC.swl
You can create a top-level waiver file, say, top.swl that contains the
above mentioned waive commands. Creating the top.swl file serves the
following purposes.
• You have to specify just one waiver file on command line instead of
multiple waiver files (waive_designblkA.swl,
waive_designblkB.swl and so on)
• SpyGlass will process the waive commands of the file
waive_designblkA.swl only if i designblkA is instantiated in
the design hierarchy of the current run. SpyGlass processes the other
import commands in a similar manner.

Waiving Messages
Additional Information
Please note the following about the waive -import constraint:
• SpyGlass also supports nested imports of waiver files, that is, one
import command can be specified inside another import
command, as shown below:
top.swl: waive -import b1 b1.swl
b1.swl: waive -import b2 b2.swl
b2.swl: waive -file test.v
NOTE: All the waiver files to be imported (b1.swl and b2.swl in the above
example) should be accessible from the current working directory.
• The -disable argument is also supported with the waive
-import constraint, as shown below:
waive -import b1 b1.swl -disable
The above specification will disable the waive -import
command.
NOTE: Only the -disable and -comment arguments are supported
with waive -import constraint. No other argument is supported with
waive -import constraint.
• File names in the imported waive -file/file_line/
file_lineblock command are converted to file names
matching under the hierarchy of the block being imported. This is to
ensure that the migration is done for and according to the block
being imported.
• If the -ip/-du fields are regular expressions in the waive
command to be imported, then the regular expressions are converted
to names matching under the block hierarchy only. This is to ensure
that the regular expressions do not match any name outside the block
hierarchy.
• It may happen that a block-level waiver file is written in an older
version of SpyGlass release, and the top-level designer importing

this block-level waiver file is working in a later version of SpyGlass

release in which few rule messages have been changed w.r.t. the
previous release. In this case, SpyGlass automatically upgrades the
old message in the block level waiver files to the new rule message.
However, this does not work if the old message in the waive
command is a substring of its complete message of that release.
Waiving Messages using SpyGlass Pragmas

To waive rule messages using the SpyGlass Waiver pragmas, you need
to embed the SpyGlass Waiver pragma directives at appropriate places
in your design source code.
Then, the specified rules or rules of the specified rule groups are still
checked for the source code block related to the SpyGlass Waiver
pragmas and the corresponding rule messages are written to the
Violation Database. However, these rule messages are not reported in
the SpyGlass Message Reports.
Waiving Rule Messages for a Block of Code

To waive messages of one or more rules for a block of source code, use
the disable_block and enable_block pragmas as follows:
for Verilog:
...
//spyglass disable_block <rule-list> | ALL | $VAR
...
//spyglass enable_block <rule-list> | ALL | $VAR
...
(See Verilog Example of Using Waiver Pragmas for a Block of Code)
for VHDL:
...
--spyglass disable_block <rule-list> | ALL | $VAR

Waiving Messages
...
--spyglass enable_block <rule-list> | ALL | $VAR
...
(See VHDL Example of Using Waiver Pragmas for a Block of Code)
where <rule-list> is a space-separated list of rule names or rule
group names for which the messages are to be waived. Using the ALL
keyword waives all messages of all rules for the block of source code.
Using the $VAR variable name waives messages for the rules defined in
a variable using the -waiver command-line option.
Verilog Example of Using Waiver Pragmas for a Block of Code

Consider the following example containing the usage of the
disable_block and enable_block pragmas:
module test10 (q,clk, d,reset);
input clk,d,reset;
output q;
reg q;
reg [3:0] a;
reg [7:0] b;
reg [2:0]data;
//spyglass disable_block W362
always @(posedge clk)
begin
if (data <= (a[1] + b[2]) ) //violation will be
//waived off
a <=17;
else
//spyglass enable_block W362
b = 8'hbb;
end
endmodule

VHDL Example of Using Waiver Pragmas for a Block of Code

Consider the following example containing the usage of the
disable_block and enable_block pragmas:
library IEEE;
use ieee.std_logic_1164.all;
entity top is
end top;
architecture rtl of top is
signal s1 : bit_vector( 2 downto 0);
signal s3 : boolean;
signal t1, t2 : integer;
begin
--spyglass disable_block W116
process
begin
case s1 <= s2 is -- violation will be waived off
when TRUE => s3 <= (s2 = s1); -- violation will be
-- waived off
when others => null;
end case;
end process;
--spyglass enable_block W116
t1 <= t2 when s1 >= s2; -- violation will not be
-- waived off
end rtl;
Waiving Rule Messages for a Single Line of Code

To waive messages of one or more rules for a single line of source
code, use the disable pragma as follows:
for Verilog:
<design-line> //spyglass disable <rule-list> | ALL
(See Verilog Example of Using Waiver Pragmas for Single Line of

Waiving Messages
Code)
for VHDL:
<design-line> --spyglass disable <rule-list> | ALL
(See VHDL Example of Using Waiver Pragmas for Single Line of
Code)
Where <rule-list> is a space-separated list of rule names or rule
group names for which the messages are to be waived for the single
line of source code. Using the ALL keyword waives all messages of all
rules for the single line of source code.
Specifying SpyGlass Waiver Pragmas

Please note the following while using the SpyGlass Waiver pragmas:
1. All keywords (spyglass, disable, disable_block,
enable_block, and ALL) are case-sensitive and must be
specified as indicated.
2. Only spaces are allowed between keywords. You cannot use other
white space characters like the tab character.
3. There may or may not be any spaces between // (in case of
Verilog) or --(in case of VHDL) and the keyword spyglass.
4. You can also insert comments in the pragma line as follows:
for Verilog:
//waiver pragma --comment
for VHDL:
--waiver pragma //comment
(See Inserting Comments in Pragma Lines)
5. You can also write multiple pragmas with comments on a single line
as follows:
//waiver pragma1--comment //waiver pragma --comment

The above specification will be considered as two different pragmas.

However, if the starting directive is a comment or a non-waiver
pragma, then the whole line is treated as a comment. For example,
the following line in the design file will not result in any valid
waiver pragma:
//non-waiver pragma //spyglass disable rulename
6. If there is no corresponding enable_block pragma for a
disable_block pragma, then the scope of the
disable_block pragma extends till the end the source file in
which it is specified.
7. Scope of SpyGlass Waiver pragmas is limited to the source file in
which they are specified. Writing a pragma in one source file and
including this source file in another source file will not imply that
the pragma is effective in the second file.
NOTE: The SpyGlass Waiver pragmas do not work on design units in VHDL
libraries.
Nested SpyGlass Waiver Pragmas

The disable_block and enable_block pragmas can be nested.
However, the scope of the pragmas depends on the way they have been
specified.
For example, consider the following specification:
...
rule1 active
... rule1 waived
rule1 active
...

Waiving Messages
Thus, in case of complete pairs of nested waiver pragmas of the same

rule(s), the scope is the source code block between the outermost
disable_block and enable_block pragma pair.
Now consider the following specification:
... rule1 active

... rule1 waived
... rule1 active
... rule1 still active
Thus, in case of incomplete pairs of nested waiver pragmas of the same

rule(s) with missing disable_block pragmas, the scope is the
source code block between the innermost disable_block and
enable_block pragma pair.
In case of incomplete pairs of nested waiver pragmas of the same
rule(s) with missing enable_block pragmas, the scope is the source
code block between the outermost disable_block and
enable_block pragma pair as in the following example
specification:
... rule1 active

... rule1 waived
... rule1 waived
... rule1 active
Switching off waiver for selective rules of a group

You can also selectively waive or activate a rule from a set of rules as

shown in the following example specification:
... rule1, rule2, rule3 active

//spyglass disable_block rule1 rule2 rule3
... rule1, rule2, rule3 waived
//spyglass enable_block rule1 rule1 active;
... rule2, rule3 waived
//spyglass enable_block rule2 rule3
rule1, rule2, rule3 active
...
Similarly, if you have waived for a rule group, you can selectively
activate the rules in the rule group in the same manner.
NOTE: You can not selectively activate a rule for a source code block that has
been waived using the ALL keyword.
Verilog Example of Using Waiver Pragmas for Single Line of

Code
The following example contains the usage of waiver pragma for single
line of code:
module test10 (q,clk, d,reset);
input clk,d,reset;
output q;
reg q;
reg [3:0] a;
reg [7:0] b;
reg [2:0]data;
always @(posedge clk)
begin
if (data <= (a[1] + b[2]) ) //spyglass disable W362
a <=17;
else
b = 8'hbb;
end
endmodule

Waiving Messages
VHDL Example of Using Waiver Pragmas for Single Line of

Code
The following example contains the usage of waiver pragma for single
line of code:
library IEEE;
use ieee.std_logic_1164.all;
entity top is
end top;
architecture rtl of top is
signal s3 : boolean;
begin
process
begin
case s1 <= s2 is --spyglass disable W116
when TRUE => s3 <= (s2 = s1);
when others => null;
end case;
end process;
end rtl;
Inserting Comments in Pragma Lines

You can insert comments in pragma lines for Verilog and VHDL code,
as shown below:
For VHDL
Use // to insert a comment in pragma line for VHDL code, as shown
case s1 <= s2 is --spyglass disable W116 //This is a comment

For Verilog
Use - to insert a comment in pragma line for Verilog code, as shown in
the following example:
if (data <= (a[1] + b[2]) ) //spyglass disable W362 -This is comment
Ignoring the SpyGlass Waiver Pragmas

By default, pragma-based waivers (inside design source files) are
always effective. You can turn them off by supplying the -
ignorewaivers command-line option from the Other command line options
field in Other Tab of Setup > Run Options... menu option.
Existing Waiver Support in SpyGlass

Currently, SpyGlass supports spyok and verilint (for Lint policy)
waivers. Support of spyok waivers will continue in SpyGlass for
backward compatibility.
Handling SpyGlass Built-In Messages

Handling Syntax Error Messages
If you encounter a syntax error message after design analysis, you must
fix that error before SpyGlass can process the design any further. Most
rule checks will not be run if the design contains syntax errors.
Handling Language Warning Messages

If you encounter a language warning message, you should check that
the potential problem indicated is expected and not a concern.
SpyGlass will continue processing if language warnings are reported,
although the nature of the analysis may be affected. For example, if you

see a warning that the size of an expression does not match the size of
the object to which it is assigned, you may decide that this is known but
not important. On the other hand, you may realize that due to this
problem, a value may be truncated or extended where no such
modification was expected.
NOTE: You can limit the number of WRN messages logged in the Violation
Database as described in Waiving Messages.
Handling Synthesis Warning Messages

If you encounter a synthesis warning message, either the specified
construct is not synthesizable and therefore the design unit containing
that construct cannot be synthesized, or (in a few cases) the construct
will be ignored during synthesis. This condition is immediately
interesting if you want to check a design for synthesizability, but it is
also important to understand that SpyGlass runs most complex
connectivity and functionality checks on a design by (automatically)
synthesizing the design internally. Design units which cannot be
synthesized are skipped in this process and therefore will be ignored in
analysis of those connectivity and functionality rules. SpyGlass will let
you know which design units have been skipped for this reason, but
you should be aware that analysis of those design units will necessarily
be incomplete.
Handling Synthesis Error Messages

If you encounter a synthesis error message, it indicates that a design
unit could not be synthesized due to an un-synthesizable construct.
Also, the design unit will be replaced by a blackbox in the resulting
netlist. Presence of such design units affects the flattening stage also
and the resulting rule-checking will be inaccurate.

Handling Internal Messages

If a rule reports an internal message, SpyGlass displays the name of
such rules as SpyGlassInternalFatal, SpyGlassInternalError, or
SpyGlassInternalWarning, depending upon the rule severity.
You are recommended to report such messages to Atrenta Support.


Working with Large
Designs
Overview
The Atrenta® SpyGlass® Predictive Analyzer supports large, multi-
million gate designs by automatically choosing the optimal level of
system sources to use as well as providing manual control of the run
flow to control peak resource usage.
Rule Categorization
SpyGlass categorizes rules in the following categories:
1. Rules that works on RTL description only and thus, require only the
RTL view of the design
2. Rules that works on Netlists only and thus, require only the Netlist
view of the design
3. Rules that works on both RTL description and netlist and thus,
require both RTL view and the Netlist view of the design
Rules designed for earlier versions of SpyGlass are assumed to work on

Enabling Large Design Processing Mode
both RTL description and netlist and thus, require both RTL view and
the Netlist view of the design.
Enabling Large Design Processing Mode

By default, SpyGlass works in the Large Design Processing mode.
Under this mode, SpyGlass retains only the required Design Views in
the memory. SpyGlass executes the rules in the following order:
Rule Type View in Memory

Rules designed for SpyGlass version RTL view
3.2.0 or later that require RTL view only
Rules designed for versions earlier than RTL view and/or Netlist view as
SpyGlass version 3.2.0 required
Rules designed for SpyGlass version Netlist view (and RTL view if there are
3.2.0 or later that require Netlist view rules that require both RTL view and
only Netlist view still to be executed)
Rules designed for SpyGlass version RTL view and Netlist view
3.2.0 or later that require both RTL view
and Netlist view
Depending on the type of rules you are running, SpyGlass controls the
Views in the memory.
Controlling the Large Design Processing Mode

SpyGlass versions 3.2.0 and later support the options to control the
Large Design Processing mode.
Supply the -higher_capacity option from the Other command line
options field of Other Tab of Setup > Run Options... menu option to
disable rules designed for SpyGlass version 3.2.0 or later that require
both RTL view and Netlist view, if any. In addition, SpyGlass deletes
the RTL view from memory before executing rules designed for

Working with Large Designs
SpyGlass version 3.2.0 or later that require Netlist view only.

Supply the -disallow_view_delete option from the Other
option to disable the Large Design Processing Mode. Then, all rules run
as in versions before SpyGlass version 3.2.0. Also, both RTL view and
Netlist view remain in the memory for all types of rules.
NOTE: You cannot use the settings together as they are mutually exclusive.

Controlling the Large Design Processing Mode

Managing the Design
Hierarchy
Defining the Hierarchy

While the mechanism for defining hierarchy within a design is
obviously different for VHDL compared to Verilog, the SpyGlass
options for managing the hierarchy within SpyGlass are the same.
In this chapter, you will learn how to define whether design files should
be analyzed individually or as a complete hierarchy, where the top of
the hierarchy to be analyzed should start, where each branch of the
hierarchy to be analyzed should end and how to define values for
parameters.
This allows you to do bottom-up debug by defining a lower hierarchy,
analyzing it, then moving to a higher point in the design hierarchy and
running analysis from that point down. You can blackbox lower level
blocks (for example, it is being worked on by another member of the
project or it is a hard macro) or if the block has previously been
analyzed.

Design Unit Selection Features

The SpyGlass Design Environment has following features for user-
specification of design units to include into (or exclude from) the scope
of SpyGlass analysis.
Specifying the Top-level Design Units

You can specify one or more top-level design units for the purpose of
SpyGlass analysis. This setting is interpreted on design hierarchy, and
hence all design units that are instantiated directly or indirectly in the
specified top-level designs are included in scope of SpyGlass analysis.
All remaining designs units that are present in the input design source
files, but are not instantiated in specified top-level design units are
excluded from the scope of SpyGlass analysis.
This feature is typically used for restricting the SpyGlass analysis to the
HDL design hierarchy starting at specified design unit(s). Hence, this
feature is quite useful to select part of design hierarchy that is under
test, and SpyGlass can safely ignore the design units that are not
relevant for current analysis. This improves the software CPU time and
memory requirements to a significant extent. Therefore, it is highly
recommended that you specify the -top command line option or
analyze single top designs with SpyGlass, especially when you are
running advanced policies.
See Language-specific Behavior in use of the Top-Level Feature for
detailed implications.
Stopping Design Units

You can specify one or more design units whose implementation (or
body) is to be ignored by SpyGlass. Hence, for such cases, the design
unit is considered a black-box for which only the interface information

Managing the Design Hierarchy
is available. Use of this feature either by itself, or in association with

other hierarchy-related features, has following implications:
1. Since the implementation or body of specified design units is
ignored by SpyGlass, none of the SpyGlass rules are checked within
the design units’ implementation. However, for successful parsing of
whole design, it is necessary that such design unit source does not
have any syntax error. Presence of syntax error in the design unit
being stopped may interfere in identifying the boundary of such
design unit itself, and hence, in parsing of remaining design units
that may exist later in the design source file(s).
2. By ignoring the implementation of specific design unit, all other
design units instantiated in such stopped design unit are not seen in
hierarchy where the stopped module was instantiated. Hence, if
SpyGlass analysis was restricted to specific top design unit(s), the
underlying design units are not rule-checked by SpyGlass. However,
if SpyGlass analysis was for the whole design, the underlying
hierarchy below such stopped design units can be treated as
independent top modules, and rule-checked by SpyGlass as such. In
either of above scenarios, the generic or parameter value expected to
be passed from top design hierarchy cannot be passed to design
hierarchy below the stopped design unit.

FIGURE 1. An illustration of design hierarchy for use of Top-Level and Stop Features
A*
In above figure, the following design hierarchy is illustrated:

• A denotes the higher-level design hierarchy described by shaded
area A*, in which the design unit A is the top design unit.
• B denotes the design unit to be excluded by use of -stop
• C denotes the all design units that were instantiated in the design
unit B. Hence, all these design units were part of design hierarchy
under A if the design unit B was not stopped. However, since
implementation inside B is now not seen by SpyGlass analysis, the
design units under C may or may not be rule-checked by SpyGlass
depending on use of other related options. See Table: Using Top-
Level and Stop Features Together for examples that illustrate control
of design hierarchy for rule-checking by use of various options.
• D denotes another design hierarchy independent from A, B, or C.
The following table describes use of above two options, when
applied to the design hierarchy illustrated in Figure 1:

TABLE 1. Using Top-Level and Stop Features Together
Options used Design units rule-checked

Default (no features used) A, B, C and D
Stop B A, C and D
Top A and Stop B A
Top A A, B and C
Top D D
Top D and Stop B D (B is not in hierarchy of D and hence, the
Stop feature has no effect)
The above table seeks to communicate the correct understanding and

use of the Top-Level and Stop features.
As seen from the above option usage examples, whenever you use
the Stop feature, you must also supply the Top-Level feature to
correctly and unambiguously declare the scope.
SpyGlass does not report non-error parsing messages for design units
in C when you specify A as top and B as stopped.
Analyzing Selective Design Hierarchy

You can perform selective synthesis and rule-checking on your design
by specifying:
• Design units on which the rule-checking should be done.
Use the -checkip option in this case.
• Design hierarchy (level) for which synthesis and rule-checking
should be done.
Use the -checkdu option in this case.

Language-specific Behavior in use of the Top-Level Feature

Use of SpyGlass Top-Level feature affects the use-model and flow of
SpyGlass at various stages of design reading, analysis, synthesis and
rule checking. Due to the difference in semantics of Verilog and VHDL
design descriptions, there are certain unavoidable difference in working
of the Top-Level Feature that a SpyGlass user should be aware of.
SpyGlass
Processing Verilog design VHDL design
Design Input All design files should be specified at command-line as before. The whole
design should not contain any Syntax Errors. Although SpyGlass may try to
skip syntax error in design units outside the specified top-level design unit
hierarchy, such behavior cannot be guaranteed and is discouraged.
Design Analysis Syntax errors and warnings are Analysis of all VHDL design units is
reported in design hierarchy within performed, and hence VHDL Syntax
the specified top design unit(s) only. errors are reported for all design
Such semantics is compatible with units.
use of the +topmodule option The reasoning for such behavior is
in other Verilog tools. that Top-Level feature in VHDL
design is processed during
elaboration stage and hence
requires analysis of full VHDL
design.
Design Elaboration - VHDL design elaboration is done
starting at design unit specified with
the Top-Level feature.
This step determines the exact
design hierarchy under the specified
‘top’ design unit, and takes care of
binding as per the VHDL language
requirements.

SpyGlass
Processing Verilog design VHDL design
Design Unit list of RTL This list is computed based on This list is computed from VHDL
rule-checking Verilog Object Model created after elaboration of specified design unit.
use of Top-Level feature at Verilog All SpyGlass rules are checked on
analysis time. this list, excluding VHDL language
All SpyGlass rule (excluding Verilog syntax error and semantic error or
language syntax error) are checked warnings.
on this list.
Design units for The design synthesis is performed for design units under specified (Top-
hierarchical and flat Level) design units only. Hence, the netlist rules are checked on such
netlist rule checks design units only.
Lexical Rules Lexical rules are checked on input Verilog or VHDL design source. The list
of RTL modules falling within specified design hierarchy is passed to lexical
rules. Hence, rule-check within design unit (or module) boundary is
restricted to specified design units only. However, for HDL code not within
any design unit, the rule-checking shall depend on the nature of lexical rule.
Also, note that working of the Stop feature is closely linked with the
Top-Level feature, and hence VHDL language syntax error and
semantic error or warning would be reported on the design units
specified with the Stop feature as well.
Summary
The following main points are expected to be clearly conveyed
regarding use of any of above features:
• The options for hierarchical inclusion/exclusion of design units are
the Top-Level and Stop features. These options cannot be used
simultaneously with the equivalent Design Unit feature, which is for
immediate analysis of specified design units.
• Syntax error in design source may not be fully controlled by use of
these options. The design is expected to be free from syntax and

Defining the top and bottom of the design hierarchy
elaboration errors. Judicious use of the Top-Level and Stop features

can help avoid design units which have known elaboration errors.
• The argument value specified with these options should carefully
follow the syntax for representing design unit names in Verilog and
VHDL.
Defining the top and bottom of the design hierarchy

You can run SpyGlass Analysis on any part of a design hierarchy, but
to do this, you must tell SpyGlass where the top of the hierarchy is
using the Top-Level feature and where the hierarchy should stop in
each branch using the Stop feature.
To define the top of a hierarchy or sub-hierarchy, right-click the design
unit name in the The File/Design/Constraints/Instances Window and
select Set Top Module... Alternatively, you can enter the design unit
names through the Treat these modules as top-level (-top) field in Verilog
Tab of Setup > Run Options... menu option or the Treat these entities as
top-level (-top) in VHDL Tab of Setup > Run Options... menu option for
Verilog and VHDL respectively.
NOTE: For VHDL designs, SpyGlass can automatically determine the top of a
hierarchy if the Automatically sort VHDL files (-sort) field of VHDL Tab of Setup
> Run Options... menu option. Use of this option is described in Analyzing
VHDL Designs.
You can define more than one sub-hierarchy. SpyGlass analyzes only
the design units you specify, including their dependent design units. If
you specify more than one design unit, separate their names by a space
and enclose them in quotes.
NOTE: If you wish to define many sub-hierarchies in a design, and you are
likely to be running SpyGlass a number of times, it is recommended that you
define the hierarchies as a number of individual -top command-line options
(one per line) in a text file, and then use the -f command-line option to include
these options in a SpyGlass run. By doing this, you can include or exclude an

individual sub-hierarchy from a SpyGlass run by commenting out the

corresponding -top command-line option line in the text file. See Chapter ,
“Using SpyGlass in the Batch Mode” for more details on using the -top and
-f command-line options.
To remove the Top-Level Feature specification, right-click the design
unit name in the The File/Design/Constraints/Instances Window and
select Remove Top Module... or remove the name of the design unit from
the Treat these modules as top-level (-top) field in Verilog Tab of Setup >
Run Options... menu option or the Treat these entities as top-level (-top) in
VHDL Tab of Setup > Run Options... menu option for Verilog and
VHDL respectively.
Skipping specific design units

later, for blocks being worked on by another member of the project, or
for pre-designed code or Intellectual Property yet to be provided. Since
no information is available yet to do detailed internal checking with
SpyGlass, you need to stop SpyGlass from processing these design
units. You can do so using the Stop feature and listing the unit(s) you
want SpyGlass to skip.
To specify a design unit you want SpyGlass to skip, right-click the
design unit name in the The File/Design/Constraints/Instances Window
and select Set Stop Module...
To remove the Stop Feature specification, right-click the design unit
name in the The File/Design/Constraints/Instances Window and select
Remove Stop Module...
Using Generics and Parameters

In a normal design hierarchy, it is possible to define parameterizable
design units, where the value of the parameter (in Verilog) or generic

Using Generics and Parameters
(in VHDL) is defined when the design unit is instantiated in the

hierarchy. If you then choose to run SpyGlass from the top of the
parameterizable design unit, this value is obviously not visible to
SpyGlass. To be able to define a value for each parameter or generic,
you can use the Verilog Parameters (-param) field in Verilog Tab of Setup
> Run Options... menu option or the VHDL Generics (-param) in VHDL
Tab of Setup > Run Options... menu option. This feature can also be
used to override a value defined at the point of instantiation in order to
try ‘what-if’ analyses.

Using SpyGlass Design
Constraints
Overview
The Atrenta® SpyGlass® Predictive Analyzer supports design
constraints concept to supply additional design information which is not
apparent in the RTL description. For example, the SpyGlass Clock-
Reset policy requires you to specify the names of the clock nets to be
checked. While SpyGlass can infer clocks in the design, you may want
to restrict the analysis to only a handful of clocks or add other clocks
that could not be inferred. In DFT policy, most of the rules work in
testmode where a testmode signal needs to be set for the design to be in
testmode.
Currently, the following Atrenta standard policies use SpyGlass Design
Constraints:
Clock-Reset Constraints DFT ERC LogicVision Latch
LowPower STARC STARC2002 STARC2005
All such information that is not evident from the RTL description can
be supplied using the SpyGlass Design Constraint directives that are

Creating the Design Constraints File
written in a file and specified using the Setup > Source... menu option
of the SpyGlass Design Environment or using the -sgdc command-line
option.
NOTE: The earlier method of supplying design constraints using embedded
design pragmas is still supported for backward compatibility. However, you are
strongly recommended to use the Design Constraints file method that is
superior. If both the design constraints file and embedded design pragmas are
specified, SpyGlass uses the design constraints file only and ignores the
embedded design pragmas. Similarly, if you have not specified a design
constraints file but have embedded design pragmas in the source code,
SpyGlass reads these pragmas and creates a design constraints file named
pragma2constraints.sgdc (in the <vdbname>_spysch/constraints directory
where <vdbname> is the name of the Violation Database file [default name
is spyglass) containing equivalent constraints.
Design Constraints File Structure

The design constraints file is an ASCII text file that has design
constraints specified for one or more design units or specified for the
whole design.
NOTE: The design constraints files can have any extension. However, it is
recommended to use the .sgdc extension to facilitate better recognition and
handling.
1. You can add comments in a design constraints file using the
following format:
# comment
or
//comment

Using SpyGlass Design Constraints
The # comment identifier must be the first character in a code line or

must have only whitespace before it. All text after the comment
identifier till the end of the line is assumed to be a comment.
The // comment identifier can be anywhere in a code line. All text
after the comment identifier till the end of the line is assumed to be a
comment.
2. You can add SpyGlass Design Constraints files recursively by using
the include constraint in the following format:
include <file-name>
SpyGlass Design Constraint Types

SpyGlass design constraints are of the following two types:
• Constraints that are applicable for a design unit
Such constraints are specified in the following format:
current_design <module-name>
| <entity-name>.<arch-name>
| <entity-name>
| <config-name>
| <lib-name>.<config-name>
<keyword> <argument> <value> ...
For example, the clock constraint is specified under a design unit
as in the following example:
current_design top
clock -name clk1, clk2
• Constraints that are applicable for the whole design
Such constraints are specified in the following format:
<keyword> <argument> <value> ...
For example, the waive constraint is specified for the whole design
as in the following example:

waive -regexp -file “.*” -rules ALL

For set_case_analysis constraint, the following format is
used:
current_design <du-name>
set_case_analysis -name <name> -value <value>
You can specify a single port/pin’s full hierarchical name or a
space-separated list of full hierarchical port/pin names. The
following example shows that the set_case_analysis
constraint has been defined on internal net top.U1.U13.tm1 and
top.U3.tm3 with value 0:
current_design top
set_case_analysis
-name top.U1.U13.tm1 top.U3.tm3 -value 0
For primary ports, you can also specify the simple port name as in
the following example:
current_design top
set_case_analysis -name in15 -value 1
Here, the value set on the signal specified with the

set_case_analysis keyword is automatically propagated
through the design.
The constraints where an argument accepts a list of names can be
specified either as one constraint specification with the argument
values as a list or separate constraint specifications for each argument
values. For example, the -isosig argument of the
voltage_domain constraint of SpyGlass LowPower policy can
accept a list of names which can be specified as in the following
examples:
voltage_domain
...
-isosig top.isig1 top.isig2
...

Or
voltage_domain
...
-isosig top.isig1 -isosig top.isig2
...
Further, when two arguments of the same constraint has inter-
dependency, you must specify the exact matching number of values
with each argument. For example, the -isosig argument and the
-isoval argument of the voltage_domain constraint of
SpyGlass LowPower policy are inter-dependent which can be specified
as in the following examples:
voltage_domain
...
-isosig top.isig1 top.isig2
-isoval 0 1
...
Or
voltage_domain
...
-isoval 0 -isoval 1
...
Or
voltage_domain
...
-isoval 0 1
...
As seen from the last example, the style used in one argument can be
different from the style used in the other (inter-dependent) argument.
NOTE: Purpose and function of each design constraint keyword is policy-
specific and is described in the policy rules reference document of the
respective policy where the design constraint can be used. For example, the

SpyGlass Clock-Reset policy uses the clock and reset design constraint
keywords (besides many other design constraint keywords) and the SpyGlass
Clock-Reset Rules Reference describes how these design constraints are
used for the policy. In addition, a policy can have its own policy-specific design
constraint keywords.
NOTE: Application of a design constraint keyword may be different in different
policies. For example, the -domain argument of the clock design
constraint keyword is important when used with the SpyGlass Clock-Reset
policy but is ignored when used with SpyGlass DFT policy. Similar, the
-testclock argument is important in SpyGlass DFT policy but is ignored
by the SpyGlass Clock-Reset policy.
Defining the Current Design

In the SpyGlass Design Constraints file, the current_design
keyword is used to specify that from the line containing the keyword
onwards, all constraints are related to the specified design unit
(module-name in Verilog or entity-name/
entity-name.architecture-name/configuration-name/
library-name.configuration-name) till another current_design
keyword is encountered or end-of-the-file is reached. Thus, the
current_design keyword defines the scope of any constraint that
is applicable for design units.
NOTE: SpyGlass checks the design unit name in case-insensitive manner.
Thus, if your Verilog design has two modules named FOO and foo,
specifying a current_design keyword line with FOO or any of its case
variants as its argument will result in the same set of constraints on both FOO
and foo modules.
Please note that some policies like the DFT policy, work only on
flattened netlists. Thus, the current_design keyword must specify
only top-level design units for these policies. However, if there are
more than one top-level design units in a design, then the
current_design keyword must be specified for each top-level

design unit and all the constraints related to that top-level design unit
must follow the corresponding current_design line.
You can specify more than one current_design line for each
design unit.
Thus, when the design has two top-level design units, then there must
be corresponding entries for each design unit in the design constraints
file as in the following example:
current_design B1
clock -testclock -name tclk1 -value rtz
test_mode -name tm1 -value 1
current_design B2
clock -testclock -name tclk2 -value rto
test_mode -name tm2 -value 0
current_design B1
clock -testclock -name tclk3 -value rto
Here, there are two current_design lines for design unit B1 that
specify two clocks (tclk1 and tclk3) and one testmode (tm1).
You can specify more than one current_design blocks for one
design unit.
When you are specifying a configuration name with the
current_design keyword, you should ensure that the specified
configuration is not present in multiple precompiled libraries. In such a
case, avoid using the configuration name; instead use
<entity-name>.<arch-name> for which the intended
configuration is defined.
NOTE: For multi-architecture VHDL designs, use the
<entity-name>.<arch-name> format only to specify the
current_design when analyzing with the -hdllibdu command-line
option specified.
If the design unit specified in current_design is not a top-level

module, the SGDC commands related to this current_design

specification are automatically migrated to the top. Consider following
example:
current_design block
set_case_analysis –name i.in –value 0
Here, the module, block, is instantiated in top-level module, mytop.
Consider that there are two instances, mytop.bi1 and mytop.bi2,
of block under the hierarchy of mytop. Then, the above mentioned
command will be automatically translated to following commands:
current_design mytop
set_case_analysis mytop.bi1.i.in –value 0
set_case_analysis mytop.bi2.i.in –value 0
To view the translated commands, you can generate a report that

decompiles the SGDC commands by using the -enable_sgdc_debug
Specifying Signal Names
Signal Name Specification for Signal Types

A signal name specification by signal type can be a scalar signal (for
example, clk1), a bit-select of a vector signal (for example, CLK[2]),
or part-select of a vector signal (for example, CLK2[0:2]).
The following features are available:
• You can directly specify a multi-dimensional array bit-select and
part-select with the SpyGlass Design Constraints. Until now, you
needed to find and specify the flattened single-dimensional index of
the signal (not supported any more). Also, some of the sanity
checking is now performed after synthesis.

• You can also specify array of instances (Verilog) in escaped format

with the SpyGlass Design Constraints. Thus, you can specify the
instances for the following as '\U1[0] ', '\U1[1] ', or '\U1[2] '
(quotes not required):
M1 U1[0:2](a,b);
However, the range specification is not supported. Hence,
'\U1[0:2] ' is not supported.
Signal Name Specification for Design Hierarchy

A signal name specification is correlated to design hierarchy per
following method:
1. Simple signal
For example, the signal specification clk1 means this signal is in
the design unit identified by the current_design specification.
2. Module signal name
For example, signal specification top.CK1 where the prefix
specified before the dot (.) hierarchy separator is same as the name
of the design unit in the current_design specification. In this
case, the description is equivalent to simple name specification as
above.
3. Hierarchical signal name
For example, the signal specification top.U1.U2.CK1 where the
multiple values specified with the dot (.) hierarchy separator identify
the design hierarchy within the current_design specification.
This detailed specification may begin with either the name of the
design unit in the current_design specification or the instance
name within the design unit in the current_design
specification.
NOTE: It is not mandatory to specify the top-level design unit name (which
is specified with current_design) in a hierarchical name. Thus, both
top.U1.U2.CK1 and U1.U2.CK1 are acceptable (and are same)

under current_design top.

In all of above cases, the reported signal is first searched as PORT
signal, and then as NET signal.
• It is recommended to use q// for escape names over double quotes
as there are more things to take care of while using double quotes.
• You can specify escaped names by enclosing them in q//. For
example, you can specify q/\myvlogsig"23" / or q/
\myvhdlsig"5"\/. You need to escape the '$' character if it is a
part of the name. Alternatively, you can also enclose the escape
names in double quotes. For example, you can specify
"\myvlogsig1 " or "\myvhdlsig#11\\". While specifying
VHDL escape name in double quotes (for example,
"\myvhdlsig#11\\"), you need to escape the ending backslash.
You also need to escape the double quote character and '$' character
in such escaped names which are specified by using double quotes
(for example, "\myvlogsig\"23\" " or
"\myvhdlsig\"5\"\\"). To specify hierarchical names having
escaped identifiers, you must keep in mind the convention for
escaped names in Verilog and VHDL.
For information on specifying wildcards with escaped identifiers, see
Pattern Matching Across Features.
NOTE: You can also use Synopsys-style escaped names by specifying the
-support_sdc_style_escaped_name command-line option.
By default, SpyGlass supports the dot (.) character (main; always
supported) and the forward slash (/) character (additional; set in the
default SpyGlass Configuration file) as the hierarchy separator. Use the
command named set_hsep to specify your own additional
hierarchy character. Thus, you can use any Synopsys-style hierarchy
separator in SpyGlass Design Constraints files.
The following example specifies the at (@) character as the additional
hierarchy character:

...
set_hsep @
current_design top
clock -name top@clk1 ...
...
Using Variables in SpyGlass Design Constraints

Files
You can define and use local variables in the SpyGlass Design
Constraints files.
Defining Variables
To define a variable in a SpyGlass Design Constraints file, use the
following syntax:
setvar <var-name> <var-value>
Where <var-name> is the name of the variable and <var-value>
is the value of the variable.
• Only one variable can be defined per line.
• A variable definition can be spanned over multiple lines using the
backslash continuation character.
• There is no = or := between variable name and its value, to keep it
consistent with Tcl format.
• Variable names must start with an alphabet and can contain
alphabets, numerals, and underscore characters.
• Variable names are case-sensitive. Thus, xyz and XYZ are different
variables.
• The variable value can be any string consisting of one or more
words. Multi-word values must be enclosed within double quotes.

Using Variables in SpyGlass Design Constraints Files
• Double quotes used in variable names are assumed to be part of the

variable name itself.
• A variable remains visible within the scope of its containing
SpyGlass Constraints file. Thus, it is also visible in the included
SpyGlass Constraints files, if any.
• A variable becomes visible immediately from the very next line after
its definition and remains visible till the end of file.
• A variable can be defined multiple times in a file. Then, every
definition overrides the previous definition and the current definition
is applicable for subsequent commands.
• You can refer a variable in its definition also. This allows you to
redefine the variable with additional values in the same SpyGlass
Constraints file.
For example, the following definitions are allowed
...
setvar var1 b/c
...
setvar var1 $var1/d
...
Starting with the first definition, the value of variable var1 is b/c
till it is redefined again. Then, the value of the variable var1
becomes b/c/d.
• A variable definition can refer other variables that are already
defined as in the following example:
...
setvar var1 a/b/c
...
setvar var2 $var1/d
...
• You can also use the operating system-level environment variables
in the SpyGlass Design Constraints files. Hence, the name of a local

variable should not be same as that of an existing operating system-

level environment variable.
Using Variables in SpyGlass Constraints Specifications

A variable that has been defined using the setvar command can be
used in value fields of any SpyGlass Constraint specification as
$<var-name> or ${<var-name>}. For example, you can use the
variable named myvar1 as $myvar1 or ${myvar1}.
NOTE: Non-variable strings that start with $ should be escaped with backslash
to avoid confusion.
Conditionally specifying SGDC constraints

You can use the same SGDC file for different functional and testing
analysis modes. This can be achieved by compiling different
commands from the same SGDC file based on different conditions.
These conditions are represented by expressions made up using SGDC
variables and a given set of common logical operators. The if-else
statement is used to implement conditional compilation of SGDC
commands. The syntax of the if-else statement is given below:
if {<condition>} [then] {
sgdc commands)
...
...
} elseif {<condition>} [then] {
(sgdc commands)
...
...
} else {
(sgdc commands)
...
...
}

Conditionally specifying SGDC constraints
The following operators are supported in the conditional expression:

&&, ||, !, ==, !=, >, >=, <, <=, in, ni
The following is the order of precedence (from highest to lowest) of
these operators:
!, >=, <=, ==, !=, in, ni, &&, ||
Some examples are given below:
setvar a 2
if {$a == 1} {
constraint xyz
} elseif {$a == 2} {
constraint abc
}
setvar a abcd
if {$a == "abcd"} {
constraint xyz
} else {
constraint abc
}
SpyGlass enables you to set the value of the special variable

SG_OPERATING_MODE from the command-line as well through the
-operating_mode switch. Please note that other SGDC
variables can be set from within an SGDC file (using setvar) or from
the environment only.
The order of precedence (from highest to lowest) for resolving multiple
definitions of the SG_OPERATING_MODE variable is given below:
1. SG_OPERATING_MODE variable set through the
-operating_mode switch
2. SG_OPERATING_MODE variable set through a local variable inside
an SGDC file
3. SG_OPERATING_MODE variable set through environment variable

• If the condition given in the if statement is an invalid expression

then neither the then part nor the else part is interpreted.
• After providing the condition following the if keyword, you may or
may not give the then keyword. However, you must begin the
then block with a { on the same line.
• Both then and else blocks must always be enclosed within curly
braces ({}).
• It is mandatory to give the else keyword before the beginning of
an else block.
• The list operators (in and ni) can be used only when the RHS is a
list variable. A list variable is constructed automatically when its
value is a list of space-separated values. In this case the entire list
needs to be given in quotes to the setvar command. For example:
setvar b "x y z x1 x2"
if {"y" in $b} then {
constraint abc
} else {
constraint xyz
}
The SpyGlass Design Constraints Files Processing

During an analysis run, SpyGlass parses the design constraints files
first, that is, before processing the source files etc.
In case, any problems are encountered in the design constraints files,
SpyGlass generates appropriate messages that are written to the
Violation Database file. Depending on the severity of the messages,
SpyGlass aborts further processing (if any syntax errors are found) or
continues with source file processing (if only warning or informational
messages are found).
The design constraints file parsing messages are named
SGDCSTX_<number>, SGDCWRN_<number>, and

Processing SpyGlass Design and Waiver Pragmas
SGDCINFO_<number> for error, warning, and informational

messages respectively.
For more details about these error and warning messages, see the
SpyGlass Built-in Rules Reference.
In addition, there are SpyGlass Design Constraints file checking rules
named SGDC_<command_name><number> that check the
semantics of SGDC command specifications. For example, the
SGDC_clock01, SGDC_clock02, and SGDC_clock03 rules check the
semantic of values specified for -name, -value, and -freq fields
respectively of clock command.
Processing SpyGlass Design and Waiver Pragmas

Similarly, if you have not specified a design constraints file but have
SpyGlass design and/or waiver pragmas embedded in the source code,
SpyGlass reads these pragmas and creates a design constraints file
containing equivalent constraints. While creating the design constraints
file, SpyGlass generates the messages if there are problems in the
SpyGlass pragma specifications.
The embedded pragma parsing messages are also named
SGDCSTX_<number>, SGDCWRN_<number>, and
SGDCINFO_<number> for error, warning, and informational
messages respectively. For more details about these error and warning
messages, see the SpyGlass Built-in Rules Reference.
Then, the generated design constraints file is parsed as described in The
SpyGlass Design Constraints Files Processing and messages are
generated for problems.

Importing Block-Level SGDC Commands to Chip-

Level
SpyGlass provides the capability to automatically use the SGDC files
specified for blocks when integrated at the chip-level.
Currently, the migration of block-level SGDC commands to chip-level
is a two-step process as given below:
• In the first step, the block-level SGDC files are imported with
respect to the chip-level. This step is called Creating Hierarchical
SGDC File.
• In the second step, the SGDC file created in the first step is
validated. This step is called Validating Hierarchical SGDC File.
Constraints Migrated From Block-Level to Chip-Level

While migrating block-level SGDC files to chip level, the following
constraints are migrated:
activity always_on_buffer always_on_cell
always_on_pin aon_buffered_signals antenna_cell
assertion_signal cell_hookup cell_pin_info
cell_tie_class cdc_false_path clock
domain_outputs domain_inputs domain_signal
ignore_crossing input_isocell levelshifter
multivt_lib non_pd_inputcells pg_pins_naming
pin_voltage power_down power_down_sequence
power_state power_switch ram_instance
ram_switch retention_cell retention_instance
special_cell supply switchoff_wrapper_instance
qualifier voltage_domain

Importing Block-Level SGDC Commands to Chip-Level
Creating Hierarchical SGDC File

This step can be invoked using the -gen_hiersgdc command-line
option. You need to specify the complete design information, policies
that you intend to run (using the -policies | -policy option), and the
SGDC file for the chip-level. This chip-level SGDC file should contain
the sgdc -import command(s) for block-level SGDC file(s) that
need to be imported. For example, a chip-level SGDC file may contain
the following specification:
current_design <module-name>
sgdc -import <block-name> <block-level-SGDC-file>
The <block-name> can be specified in any of the following formats:
• module
• entity
• entity.architecture
NOTE: You should choose the same specification that is used in
current_design command in the block-level SGDC file.
The block-level SGDC file is applied to the design units matching any
of the above specifications.
The path of the SGDC file <block-level-SGDC-file> can be
specified as relative or absolute. If the path specification is relative, it
should be accessible from the current run directory.
The above command imports the <block-level-SGDC-file>
with respect to the <module-name>. This command generates the
SGDC output file(s) that will contain the imported SGDC commands
corresponding to the commands specified in the <block-level-
SGDC-file>. This file will be generated in the gen_hiersgdc/
spyglass_reports/imported_sgdc directory. The name of the output file
will be <module-name>_<block-name>_<block-level-SGDC-file>.
The generated output file contains two sections. The first section
displays successfully imported commands. The second section contains

commands that need user input or review. Generally, port names

specified in the block command require user input.
The above specification can be given multiple times for different
blocks in the same chip-level SGDC file.
In addition, a top level SGDC file is generated that includes all the
migrated block level SGDC files. This file also contains those migrated
clock commands which are common in two or more block level SGDC
output files. These commands are commented in the corresponding
block level SGDC output files. The name of the output file will be
<module-name>. sgdc.
In subsequent chip-level analysis, you should specify the generated top
level SGDC file instead of migrated block level SGDC files.
NOTE: Any other SGDC command in the chip-level SGDC file is ignored in this
generation step. However, the set_case_analysis and
assume_path SGDC commands, if specified at the chip level, are not
ignored and are used during migration of block-level SGDC commands.
Validating Hierarchical SGDC File

This step can be invoked using -validate_hiersgdc command-line
option. You need to specify the complete design, policies that you
intend to run (using the -policies | -policy option), along with chip-level
SGDC file(s), and the output SGDC file(s) generated in Creating
Hierarchical SGDC File step.
When you use the -validate_hiersgdc command-line option,
SpyGlass first looks for the migrated SGDC files of the Creating
Hierarchical SGDC file step in the gen_hiersgdc/spyglass_reports/
imported_sgdc directory and validates these migrated SGDC files with
respect to the input block-level SGDC files. You do not have to specify
the migrated SGDC files generated in the Creating Hierarchical SGDC
file step separately in the -validate_hiersgdc command.
Currently, SpyGlass performs the following checks in the validation

Implementing Scoping in SGDC Commands
mode:
• clock validation: checks whether the top-level clocks reach the
block clock ports
• clock domain validation: checks whether the top-level clocks
connected to the block clock ports comply with the block-level
domain specifications
If any discrepancy is found in the above mentioned checks, then
SpyGlass will report violations appropriately. You then need to correct
the chip-level specifications for clock.
After correcting the chip-level specification, you need to re-run the
validation step with the new specifications, and if there are no
violations reported, you can use the final SGDC file in the subsequent
chip-level analysis.
NOTE: The sgdc -import command should be used only in the -
gen_hiersgdc and -validate_hiersgdc flow. It should not be used in the normal
SpyGlass run.

SpyGlass allows scoping mechanism in SGDC commands by default.
The scoping mechanism is implemented by using the :: operator.
my_command -name M::i1.i2.net -value 0
In the above example, M:: specifies the scoping mechanism, which
means to find all instances of module M in:
• All instances of design unit, <du-name>, if that design unit is not a
top-level design unit
• Design unit, <du-name>, if it is a top-level design unit
Then, the value 0 is applied on net i1.i2.net in all these instances.

In the above example, scoping within M:: notation is known as local

scoping, and scoping in the non top current_design is called
global scoping.
• M can be in m, e, and e.a format, where m, e, and a refers to
module, entity, and architecture name, respectively.
• Path followed by :: should be relative to M and should not have M
prepended to it.
• The resultant value after translation should be a valid value for the
concerned field. For example, M::port specification will get
changed to hierarchical terminal. A fatal violation is reported if the
concerned field does not take hierarchical terminal as a valid value.
• Scoping specifications is not supported in -noenv constraints. A
fatal violation is reported for such specifications.
Scoping When Design is at Top-Level

Consider the following command:
my_command -name M::i1.i2.net -value 0
When the design is a top-level design unit, all the instances of M are
searched in that design unit and replaced with M::i1.i2.net
specification. For example, consider a case in which there are two
instances of M, namely top.mi1 and top.I1.mi2. Then,
M::i1.i2.net will be replaced by top.mi1.i1.i2.net and
top.I1.mi2.i1.i2.net.
However, if any of the resultant design objects does not exist in the
design, SpyGlass flags a fatal violation. This fatal violation is flagged
after synthesis as these checks will run on NOM.
Depending upon the type of the -name field, following two cases may
arise:

• If the -name field is a key/scalar field.

In this case, the command is split into two commands, as given
below:
current_design top
my_command -name top.mi1.i1.i2.net -value 0
my_command -name top.I1.mi2.i1.i2.net -value 0
Here, if any one of the two paths does not exist, the corresponding
SGDC command is deleted. In this case, if the port, M::in1, of M is
referred, it will get converted to hierarchical terminal i.e.,
top.mi1.in1 and top.I1.mi2.in1.
• If the -name field is a list type of field
In this case, the two paths are added to the same command, as shown
below:
my_command -name top.mi1.i1.i2.net
top.I1.mi2.i1.i2.net -value 0
However, there will also be an option to have multiple commands
created one for each instance in case of list type field as well.
Wildcard support at top-level

Consider the wildcard specification, as given below:
my_command -name "M*::i1.net" -value 0
In this case, M* is first matched with all modules in the hierarchy under
<du-name>. Let's say it matches with two module names, M1 (verilog
module) and m2 (VHDL module). Then, -name "M*::i1.net"
specification will get changed to -name "M1::i1.net
m2::i1.net" specification. Now, further processing continues on
the basis of the cases discussed above (depending upon whether the
-name is key/scalar field or list type of field).
Consider another wildcard specification, as given below:
my_command -name "M::*.net" -value 0

In the above specification, let's say there are two instances of M, namely
top.mi1 and top.I1.mi2. Then, the wildcard specification will
first expand to -name "top.mi1.*.net
top.I1.mi2.*.net". Now, the following cases may arise:
• If -name is registered with --wildcard or
--wildcard_inline_expand, then '*' will match to one level
of hierarchy. For example, it will match to top.mi1.L3I1.net
and top.I1.mi2.L4I1.net and NOT to
top.mi1.L3I1.L4I1.net.
• If -name is registered with --wildcard_support or
--wildcard_support_full, the wildcard expression will be
left as it is for the policy to handle it.
NOTE: The options, --wildcard_support and
--wildcard_support_full mean that '*' is expected to match
multiple levels of hierarchy i.e., it should also match
top.mi1.L3I1.L4I1.net. Kernel does not provides this support
and therefore, such specifications are currently handled by policies
themselves.
Conflict resolution at top-level

If a value generated due to scoping conflicts with an explicit value
specified by the user, the value generated by scoping is deleted. This
provides you the flexibility to override one or more specifications
generated through scoping. Consider the following example:
current_design top
set_case_analysis M::in -value 0
set_case_analysis top.mi1.in -value 1
Here, let's say module, M, is instantiated ten times in top, i.e.,

top.mi1, top.mi2, …, top.mi10. In this case, the
set_case_analysis constraint will not allow duplicate
specifications in the -name field. Hence, one of the ten generated

commands (one for top.mi1.in) will be deleted. However, if two

values, each generated by scoping, are duplicate then SpyGlass flags a
fatal violation.
However, SpyGlass will report the following two specifications as
duplicate specifications:
current_design top
set_case_analysis -name M::in -value 0
Scoping When Design is at a Block-Level

Scoping specifications at the block-level undergo through hierarchical
translations. The difference between scoping specifications at top-level
and scoping specifications at block-level is that only those instances of
scoped module are considered that are instantiated in the instances of
the block module. For example:
In the above example, let's say that the block is instantiated twice in
top, i.e., top.bi1 and top.bi2. Also consider that module, M, is
instantiated thrice in the block, i.e., block.mi1, block.mi2, and
block.mi3. Then, the above specification will generate six
commands (2*3) at the top-level, as shown below:
current_design top
set_case_analysis -name top.bi1.mi1.in -value 0
However, if M is instantiated in the top module (i.e., outside the block),
that instance will not be considered. Further, if any of the design

objects in these generated commands does not exist, SpyGlass flags a

fatal violation.
Wildcard support at block-level

Consider the wildcard specification, as given below:
set_case_analysis -name M*::in -value 0
Here, M* is first replaced by its respective matches from within the
module, block. These scoping specifications then undergo through
hierarchical translations.
Conflict resolution at block-level

Conflict resolution at block-level is implemented depending upon the
following cases:
• Consider the following example:
set_case_analysis -name block.mi1.in -value 1
Here, the second command will take precedence over the command
generated through scoping.
current_design top
Here, the top-level specification will take precedence, and no error
will be reported for duplicate specification.

Handling SystemVerilog Objects in SGDC

current_design top
set_case_analysis -name block::mi1.in -value 1
Here, all the block-level commands are ignored. For example, mi1
of M inside block is ignored.

Following are the ways in which SpyGlass handles various
SystemVerilog objects:
• Handling SystemVerilog interface port/terminal
Consider the SystemVerilog interface port/terminal, as shown in the
following example:
interface intf (output z_intf, input a_intf);
endinterface
module topper(output z,input a);
intf i1(z,a);
top T1(i1);
endmodule
module top(intf inst);
mid M2(inst.z_intf,inst.a_intf);
endmodule
In the above example, if port z_intf or a_intf of module, top,

is to be referred in SGDC, it should be as follows:
current_design topper
test_mode -name "topper.T1.\inst.z_intf " -value 1
test_mode -name "topper.T1.\inst.a_intf " -value 0
Here, the interface port is named as

"\<interface-instance-name>.<interface-port-na

me> "
• The interface port is named as escape name, and therefore, it
should end with a space.
• The naming convention for interface port will be changed in
Spyglass 4.4 release to SDC compatible name, that is,
"<interface-instance-name>_<interface-port-
name>".
• Handling SystemVerilog interface containing a modport
Consider the following example in which a SystemVerilog interface
referred in SGDC contains a modport:
interface intf;
wire z_intf,a_intf;
modport M1 (output z_intf, input a_intf);
modport M2 (output a_intf, input z_intf);
endinterface
module top;
intf i1();
intf i2();
top_low T1(i1.M1,i2.M2);
endmodule
module top_low(intf.M1 inst1, intf.M2 inst2);
wire inst1_z_intf, inst2_a_intf;
assign inst1_z_intf = inst2_a_intf;
mid M1(inst1.z_intf,inst1.a_intf);
mid M2(inst2.a_intf,inst2.z_intf);
endmodule
module mid(output z, input a);
assign z = ~a;
endmodule
In the above example, if module top_low, ports z_intf (of

modport M1) and a_intf (of modport M2) are to be referred in
SGDC, it should be as follows:

current_design top
test_mode -name "top.T1.\inst1.z_intf " -value 1
test_mode -name "top.T1.\inst2.a_intf " -value 0
Here, the modport interface port is named as
"\<interface-instance-name>.<interface-port-na
me> ".
NOTE: The naming convention for modport interface port would be
changed in Spyglass release 4.4 to SDC compatible name, that is,
"<interface_instance_name>_<interface_port_name>".
• Handling SV structure or union
For SV structure or union or for the cases in which a net is declared
with these complex types, you should specify the SGDC constraints
on the flattened bus (with size equal to structure or union size) as
follows:
typedef struct packed {
logic [1:0] data_sel;
logic [1:0] ctl_sel;
} selects_t;
//above structure size = data_sel size + ctl_sel
size=2
// + 2 = 4
module index_test
(input selects_t selects,
input logic [3:0][15:0] data_in,
output logic [3:0][15:0] data_out);
always_comb begin
data_out[0] = data_in[ selects.data_sel[1] ];
data_out[1] = data_in[ selects.data_sel[0] ];
data_out[2] = data_in[ selects.ctl_sel[1] ];
data_out[3] = data_in[ selects.ctl_sel[0] ]; end
endmodule : index_test
In the above example, flattened size of the port, selects, is equal

to 4. Therefore, the you should refer it as selects[3:0] in the

SGDC file and apply constraints, as given below:

current_design index_test test_mode -name
index_test.selects[3:0] -value 1100
• Handling for-generate constructs
Consider the following example in which there is a wire, w1, inside
the for-generate construct on which constraint cannot be specified:
module test(output z,input a);
parameter p1 = 3 ,p2 = 4;
generate
genvar c,i;
for(c =0 ;c <2;c++)
begin
wire w1;
for(i = 0;i<2;i++)
begin
mid m1(z,a,w1);
end
end
endgenerate
endmodule
module mid(output z, input a,input w1);
assign z = ~a;
endmodule
For the above example, you can specify SGDC constraints for the
instance, m1, and wire, w1, inside for-generate, as given below:
current_design test
test_mode -name "\genblk1[0].genblk1[0].m1 .a"
-value 1
-value 1
-value 1

SGDC Information in SpyGlass Policy Documents
-value 1
test_mode -name "\genblk1[0].w1 " -value 1

The following tables list the various SpyGlass Design Constraints
described across SpyGlass Policy documents. Refer to the listed section
name in the respective policy document to get more details on each
design constraint:
Auto-VerifyPolicy
clock reset define_tag
set_case_analysis special_module breakpoint
watchpoint
Clock-Reset Policy
assume_path breakpoint cdc_false_path
cdc_filter_path clock deltacheck_stop_instance
define_tag deltacheck_ignore_instance deltacheck_ignore_module
deltacheck_start deltacheck_stop_module deltacheck_stop_signal
fifo input ip_block
network_allowed_cells noclockcell_start noclockcell_stop_instance
noclockcell_stop_module noclockcell_stop_signal noclockcell_stop_instance
noclockcell_stop_module noclockcell_stop_signal num_flops
output output_not_used port_time_delay
reset set_case_analysis signal_in_domain
watchpoint quasi_static define_reset_order
allow_combo_logic
Constraints Policy

assume_path clock domain

mapped_pin_map sdc_data block
breakpoint
DFT Policy
balanced_clock bypass clock
clock_gating_cell clock_pin force_ta
initialize_for_bist initialize_for_bist
memory_read_pin memory_type memory_force
memory_write_pin module_bypass memory_write_disable
nofault no_scan module_pin
pullup require_path pulldown
reset -async reset_pin require_value
scan_chain scan_ratio scan
scan_wrap seq_atpg set_pin
shadow_ratio test_mode test_point
gating_cell tie_x dbist
tristate_cell
DFT-DSM Policy
clock clockgating clock_root
false_path pll reset
test_mode testclock_frequency clock_shaper
gating_cell expect_frequency complex_cell
ERC Policy
set_case_analysis clock reset
set
Latch Policy
assume_path set_case_analysis

LowPower Policy
always_on_cell always_on_pin always_on_buffer
aon_buffered_signals antenna_cell cell_hookup
clock ignore_crossing input_isocell
isolation_cell levelshifter assertion_signal
multivt_lib non_pd_inputcells power_down_sequence
domain_signal pg_cell pg_pins_naming
pin_voltage power_down domain_inputs
domain_outputs power_switch power_state
ram_instance ram_switch retention_instance
retention_cell set_case_analysis cell_pin_info
cell_tie_class special_cell supply
switchoff_wrapper_instance voltage_domain power_data
OpenMore Policy
set_case_analysis
Power Estimation Policy

activity activity_data clock
clock_buffer define_library_group gating_cell
pg_cell input_drive_strength power_rail_mapping
design_map_info sdc_data select_wireload_model
power_state set_clock_gating_style set_case_analysis
set_dont_use instance_trace spef_data
supply blackbox_power voltage_domain
vt_mix_percentage wireload_selection use_library_group
assume_path
STARC Policy
set_case_analysis test_mode

STARC2002 Policy
test_mode
STARC2005 Policy
test_mode
STARCAD21 Policy
test_mode
Txv Policy
initstate quasi_static reset
simulation_data


Special Features
Viewing High-Level Results of a SpyGlass Run

SpyGlass enables you to view the high-level design and policy results
after a SpyGlass run is completed. You can view the results of the
following policies:
• Clock-reset
• Constraints
• DFT
• Txv
• Lowpower
To view the results, click the Dashboard link on the Status bar. A list
containing the design and the policies is displayed.
You can view the result information in the following formats:
• Balloon View - provides the complete design related information in a
balloon window

• Detailed View - provides a detailed explanation of the information

displayed in the balloon view.
Viewing Design Results
Balloon View
When you point the mouse on the Design option, the balloon window
displays the following:
• Total number of blackboxes in the design
• Total number of latches in the design
• Total number of flip-flops in the design
Detailed View
When you click the Design option, the Design Information dialog
appears as shown below.

Special Features
Click the Registers tab to view the information about the modules,
latches and flip-flops present in the design. Double-click a module to
highlight the module in the Design View Page.
To view the blackbox information click the blackbox tab. See Viewing
Blackbox Informationfor more details.
Viewing Clock Results
Balloon View
When you point the mouse on the Clock-Reset option, the balloon
window displays the total number of unsynchronized clocks, resets,
and clock domains.
Detailed View
When you click the Clock-Reset option, the Clock Information dialog

The Clock Information dialog contains the following tabs:

• ClockReset: displays the clock domains and reset domains in the
form of a tree structure.
• Unsync Crossings: displays the Spreadsheet viewer that contains the
unsynchronized clock domain crossings reported by the
Clock_Sync01 rule. Click the ID column in the spreadsheet to
highlight the corresponding code in the Source window.
Viewing Constraints Results
Balloon View
When you point the mouse on the Constraints option, the balloon
window displays the total number SDC and SGDC files.

Special Features
Detailed View
When you click the Constraints option, the constraints files are
displayed on the Constraints View Page of The File/Design/
Constraints/Instances Window.
Viewing Txv Results
Balloon View
When you point the mouse on the TXV option, the balloon window
displays the following in a tabular format:
• False paths and multi-cycle paths declared as passed
• False paths and multi-cycle paths declared as failed
• False paths and multi-cycle paths declared as incomplete
• False paths and multi-cycle paths declared as inconclusive
Detailed View
When you click the TXV option, then the false paths and multi-cycle
paths are displayed in the tree format having two parent nodes; one for
the false paths and the other for the multi-cycle paths as shown below:

The False Path and Multi-cycle Path nodes are further categorized into
Passed, Failed, Incomplete, and Inconclusive sub-nodes that contain
the violation messages.
Viewing DFT Results
Balloon View
When you point the mouse on the DFT option, the balloon window
displays the test coverage and fault coverage for the top modules
Detailed View
When you click the DFT option, the DFT Information dialog is
displayed as follows:
The information in the DFT Information dialog is categorized into the

following columns:

Special Features
• Instances - Displays the Instances from the Instances View Page.

• Module - Displays the modules present in the design.
• Fault Coverage - Displays the fault-coverage data
• Test Coverage - Displays the test coverage data
Viewing Power Results
Balloon View
When you point the mouse on the Power option, the balloon window
displays the estimated power consumption and power savings.
Detailed View
When you click the Power option, then the Power Information window
The Power Information window displays the power estimation results.

Pattern Matching Across Features
Refer to the Viewing Power Estimation Results section of SpyGlass

Power Estimation Rules Reference User Guide for more details

In SpyGlass, you can use different methods to specify objects including
files, design objects, rules, policies, and templates. These methods vary
across features and products. In addition, the methods vary depending
upon the data type of the information specified.
The pattern matching feature enables SpyGlass users to match one or
more objects by the text name.
NOTE: Currently, the pattern matching feature is applied to some specific
command-line options, waivers, and search dialogs.
The pattern matching feature is available in the following two modes:
1. Using wildcards
2. Using simple regular expressions
Wildcard Mode
The wildcard mode is the default mode. A string is treated as a wildcard
if it includes an * (asterisk) or ? (question mark). However, if the
characters * and ? are escaped (prefixed with \ (backslash)), then they
are treated as literals. For example, \?, \*, and \\ are treated as ?, *, and
\ respectively.
All other characters are treated as normal strings.
NOTE: Earlier, [] (square brackets) were treated as wildcards. However, now,
square brackets are treated as literals.
NOTE: Interpretation of * and ? is similar for escaped design names as well.
For example, if you want to specify a design object, '\abc* ', then you must
specify it as '\abc\* '. On the other hand, if you want to specify all design

Special Features
objects whose names start with '\abc' then you need to write '\abc* '
(Verilog only) or '\abc*\' (VHDL only).
A few parameters (examples taken from clock-reset policy) which
support wildcards:
• synchronize_cells
• synchronize_data_cells
• clock_gate_cell
• glitch_protect_cell
• reset_synchronize_cell
Wildcard mode in SGDC commands

A few SGDC commands which support wildcards are as follows:
Constraint Policy
memory_ype DFT
require_path DFT
test_mode DFT
clock_gating_cell DFT
power_down_sequence lowpower
domain_outputs lowpower
Some SGDC commands do not support wildcards in escaped
identifiers, e.g., 'fifo' and 'input' SGDC commands of Clock-Reset
policy. Out of such commands, some accept '*' or '?' only at the end of
the identifier, e.g., 'powerdomainoutputs' SGDC command of
LowPower policy.
For a complete list of constraints and parameters supporting wildcards,
please refer to the respective policy documentation.

Wildcard mode in SDE

Currently, wildcard support in SDE has been provided for the following
options:
• Options used/expanded by SDE: -f, -gateslib, -sgdc, -stopdir, -
stopfile, and -waiver
• Options not expanded by SDE: -sglib, -plib, -lef, -v, and -y
The SpyGlass Design Environment provides regular expression
support for all these options.
Regular Expression Mode

A string that is prefixed with m/ and terminated with / (forward slash)
is treated as a regular expression. The following delimiters can also be
used in place of the delimiter /:
% ! @ ^ & * ; / ~ ? < > + = |

NOTE: The earlier method of specifying the regular expression in some SGDC
commands using the -regexp command-line option is still supported.
Normal Mode
A string that is prefixed with q/ and terminated with / is treated literally,
that is, if a string contains *, ?, or \, it will be treated literally. The
delimiters explained in the Regular Expression Mode can also be used
in place of /.
If a string does not contain a escaped *, ?, or \ , it is treated as a
wildcard string. To make a string containing * or ? or a \ to be treated as
a normal string, you need to escape the *, ?, or \ characters or prefix the
string with q/ and terminate it with /.

Special Features
Hierarchy Separator
All character except the following are treated as hierarchy separators in
a hierarchy string:
• Any alpha numeric character
• $ (dollar)
• _ (underscore)
• [ (opening square bracket)
• ] (closing square bracket)
• : (colon)
• \ (backslash)
The hierarchy string contains only one hierarchy separator, that is, the
first character that is not from the above set is taken as the hierarchy
separator and the rest of the string is treated by using this character as
hierarchy separator.
NOTE: For files and directory type objects, / is the only hierarchy separator.
NOTE: Pattern matching when used in a hierarchy, matches only a single
hierarchy. This holds true for all objects, such as design objects (net, port,
instance, terminals and so on), files, and directories that use pattern matching.
DFT Back Annotation Feature

The DFT Back Annotation feature of the DFT policy enables you to
view the DFT debugging information in the schematics (Modular
Schematic and Incremental Schematic) at the following two levels:
• Terminal level
• Instance level.
To view DFT debugging information, you need to do the following:

DFT Back Annotation Feature
1. Select the DFT policy and set the value of the

dftBackAnnotation rule parameter to “on”.
2. Start SpyGlass analysis.
3. Double-click the violation message for which the data can be viewed
in the schematic.
4. Click the Schematic view or the Incremental Schematic view icon to
open the schematic.
5. To view the DFT debug data for a terminal, right-click the terminal
and select the Show Debug Data-> DFT context-menu option. This
displays the DFT Debug Data window, as shown in the following
figure:
The DFT debug data for a terminal includes information, such as the
simulation value in the shift and capture modes, controllability,
blocked path due to the terminal in shift mode (BPShift), and
blocked path due to the terminal in the capture mode (BPCapture).
6. To view the DFT debug data for an instance, right-click the instance
and select the Show Debug Data-> DFT menu option from the context
menu. This displays the DFT Debug Data window, as shown in the
following figure:

Special Features
The DFT debug data for an instance includes information, such as

the scannability information of a flip-flop, modulebyPass
information which is applied through the SGDC commands on a
blackbox, retiming information on a latch in the shift mode or
capture mode, transparency information for the latch in the shift
mode or capture mode, and scanwrap information applied on a
blackbox instance.
Comparing the Results of Multiple SpyGlass Runs

You can compare the results (messages) of different SpyGlass runs by
using the Incremental Mode option. Under this feature, SpyGlass can
compare the messages of the current SpyGlass run against a set of
messages (in the Violation Database file) of an earlier SpyGlass run.
The messages that exist in both Violation Database files are reported as
“PreExisting Messages” while the messages that exist in the current
run’s Violation Database file only are reported as “New Messages”.
The messages that exist in the previous run’s Violation Database file
only are assumed to have been fixed and are reported as “Fixed/
Missing Messages”.

Comparing the Results of Multiple SpyGlass Runs
The comparison is reported in the Batch Mode as follows:

1. The Message Summary at the end of the current SpyGlass run has
the number of “PreExisting” and “New” messages, as in the
following example:
Summary of original run (without Incremental mode):
Total Number of Generated Messages : 5
(1 error, 2 warnings, 2 Infos)
Number of Reported Messages : 5
Number of Overlimit Messages : 25
(2 errors, 11 warnings, 12 Infos)
Summary for second run (with Incremental mode set and

comparison being made with the above run):
Total Number of Generated Messages : 5
Number of Reported Messages (New) : 0
(0 error, 0 warning, 0 Info)
Number of Reported Messages (PreExisting) : 5
Number of Reported Messages (Fixed) : 0
Enabling the Results Comparison Feature
Enabling the Results Comparison Feature in the SpyGlass

Design Environment
To enable the Results Comparison feature in the SpyGlass Design
Environment, you need to do the following:

Special Features
1. Enable the Incremental Mode by clicking the Incremental Mode

Button in the SpyGlass Design Environment toolbar.
2. (Optional) Specify the reference Violation Database file by clicking
the Specify reference vdb file for incremental mode icon in the SpyGlass
Design Environment toolbar.
If you do not specify the reference Violation Database file, SpyGlass
compares with an existing Violation Database file with the same
name as the Violation Database file to be created for the current run,
if available in the current working directory.
If no Violation Database file of the same name is available in the
current working directory, SpyGlass exits without performing any
rule-checking.
Enabling the Results Comparison Feature in the Batch Mode

To enable the Results Comparison feature in the Batch Mode, you need
to do the following:
1. Supply the -report_incr_messages command-line option for
the current SpyGlass run.
2. (Optional) Specify the reference Violation Database file using the
-old_vdbfile command-line option.
If you do not specify the -old_vdbfile command-line option,
SpyGlass compares with an existing Violation Database file with the
same name as the Violation Database file to be created for the
current run, if available in the current working directory.
If no Violation Database file of the same name is available in the
current working directory, SpyGlass exits without performing any
rule-checking.
NOTE: The message comparison is lexical comparison only. The scope
(source files and rule selection) of the previous and current SpyGlass run can
be different.

Saving and Restoring Designs

SpyGlass provides the feature of Design Save-Restore that allows you
to analyze a design without synthesizing the same (unaltered) design
for each analysis run. Thus, the feature may significantly improve
runtime on repeated SpyGlass analysis runs when the HDL source is
unchanged.
You can enable the Design Save-Restore feature in any of the following
ways:
1. From the Setup Menu of the SpyGlass Design Environment
2. By specifying the -enable_save_restore command-line
option in addition to the usual SpyGlass options in the Batch Mode
3. By specifying the -enable_save_restore command-line
option indirectly in the SpyGlass Configuration file
In most cases, the Design Save-Restore feature works without any
further user-intervention once it has been enabled.
Understanding the Design Save-Restore Feature

With the Design Save-Restore feature enabled, SpyGlass saves the
synthesized view of the design during the first analysis run. All
subsequent analysis runs skip the design parsing step and/or design
synthesis step provided the source design has not changed and the
analysis options are same or are a subset of those specified during
design save.
Under Design Save-Restore feature, you specify the required policies
during the design save and run any sub-set of these policies during
design restore. Optionally, you can also specify additional policies to be
saved during the design save so that while these policies are not run
during the design save but can be run during the design restore.
All base policies are always saved together when you specify to save

Special Features
one or more base policies.

If you are running a template-based SpyGlass analysis and are saving
the design, then design information for all policies used in this and all
other templates of the parent methodology is saved.
Depending on the selected rules’ characteristics, SpyGlass may either
be able to restore the saved design view completely or may not be able
to work with saved design view and hence unchanged design’s re-
parsing and/or re-synthesis may be required. In the later case, you can
either continue with design’s re-parsing and/or re-synthesis or you can
skip such rules that require re-parsing/re-synthesis. The following table
summarizes the rule types and their design re-parsing and/or re-
synthesis requirements during design restore:
Design Design
Rule Type Reparsing Re-synthesis Runtime Improvement
Rule Type 1: Rules that work on the No No Maximum
synthesized netlist view or the
flattened netlist view (most of the
rules in the Advanced Policies and
the Clock-Reset Policy)
Rule Type 2: Rules that work only on Yes No Not applicable as
the RTL view (most of the rules in the synthesized design view
Base Policies except the Clock- is not used by rules of this
Reset Policy) type.
Rule Type 3: Rules that work on the Yes Yes No change as the
synthesized netlist view or the behavior is as if the
flattened netlist view but require RTL Design Save-Restore is
information (some rules in base not enabled.
policies and advanced policies)
During a SpyGlass run in the design restore mode, SpyGlass runs the
rules of Rule Type 1 on the restored design view. However, SpyGlass
flags the WARNING [238] message listing the rules of Rule Type 3, if
selected to run and disables the design restore mode (since the design

restore is not possible for such rules.) Similarly, SpyGlass flags the
WARNING [237] message listing the rules of Rule Type 2, if selected
to run and disables these rules.
NOTE: SpyGlass only reports rules of Rule Type 3, if present and does not
additionally reports the rules of Rule Type 2 since design restore is disabled
and the limitation of Rule Type 2 is no longer applicable.
By default, the design view is saved under directory named
spyglass.db under the current working directory. You can specify a
different directory/location.
You can also force a design save during an analysis run. For example,
you would want to re-save the design view when you want to run
another set of policies and/or a different set of analysis options. Also,
you are required to re-save the design view when it was created with an
earlier version of SpyGlass. Design restore does not work in such
cases.
You can use the saved design view even when you have changed the
source files. However, the message back-annotation may not be correct
in this case.
Licensing Requirements
During design save, SpyGlass requires the licenses for all policies
being run and for policies that are additionally specified using the
-savepolicy command-line option.
During design restore, SpyGlass requires the licenses for only those
policies being run.
Handling Built-in Messages during Save-Restore Flow

During the save run, SpyGlass reports various builtin messages, such as
parsing, elaboration, and synthesis. These messages are saved as a part
of the saved design database.

Special Features
However, during the restore run, SpyGlass does not display these
messages. To view these messages, specify the -
enable_save_restore_builtin option along with the
-enable_save_restore option during the restore run.
To see parsing messages on design units picked from the precompiled
dump during design save, you should specify the -hdllibdu option (if
precompiled dump is not encrypted in which case, the -
disable_encrypted_hdl_checks option, if present, should be removed).
Messages on precompiled dump are restored if the dump was created
with the -dump_precompile_builtin option.
If you do not specify the -enable_save_restore_builtin
option, SpyGlass reports a message to indicate that builtin messages are
not restored as the corresponding option is not specified.
Handling Builtin Messages Based on the Type of Current Run

Based on whether the current run is full restore or partial restore, builtin
messages are handled in the following ways:
Full restore In this case, no parsing, elaboration, or synthesis occurs.
Therefore, all the messages reported by each of these stages
are restored if you specify the -enable_save_restore_builtin
option.
Partial restore In this case, parsing and elaboration occurs but no synthesis
occurs. Therefore, only the messages reported during synthesis
(during save run) are restored if you specify the
-enable_save_restore_builtin option.
The parsing and elaboration messages are reported by the
respective engines.
Impact of -addrules/-ignorerules Options

If you enable a builtin message during the restore run by using the -
addrules option, but that message was disabled during the save run,

SpyGlass will not display that message during the restore run even if
you have specified the -enable_save_restore_builtin option.
In such cases, you need to forcefully save the database again by using
the -addrules option to make that message available in the restore
run. If you do not save the database forcefully, SpyGlass reports a
message in the restore run to indicate that the specified builtin message
has actually not run in the restore run and the user needs to save the
database again by using -force_save option with this builtin enabled.
If you disable a builtin rule during the restore run by using the -
ignorerules option, but that rule was enabled during the save run,
messages of such rules are not displayed during the restore run if you
specify the -enable_save_restore_builtin option.
The following table describes the impact of -addrules/
-ignorerules options on builtin messages during save-restore
runs:
Builin Rule Builin Message Reported Builin Message Reported

Type During Save run? During Restore run?
Off by default No no
Off by default Yes (-addrules is specified) yes (-addrules specified)
Off by default No (-addrules not specified) no (even if -addrules is specified)
On by default Yes yes
On by default Yes no (-ignorerules specified)
On by default No (-ignorerules specified) no (even if -ignorerules is not
specified)
Using the Design Save-Restore Feature in the SpyGlass Design

Environment
Use the Setup > Save/Restore DB... menu option to enable and use the
Design Save/Restore feature in the SpyGlass Design Environment.

Special Features
Using the Design Save-Restore Feature in the Batch Mode

The steps to use the Design Save-Restore feature are as follows:
1. To save the design, specify the -enable_save_restore
command-line option in addition to the usual SpyGlass options:
spyglass -batch <options> -enable_save_restore ...
This step saves the design view under a directory named
spyglass.db under the current working directory.
You can specify a different directory/location using the -dbdir
command-line option:
spyglass -batch <options>
-enable_save_restore -dbdir <my-save-dir> ...
By default, the design view related to the policies being used
(specified directly using the -policy/-policies command-line
option or indirectly through templates) is saved. Optionally, you can
use the -savepolicy/-savepolicies command-line option
to save for more policies:
spyglass -batch <options> -enable_save_restore
-savepolicies <policy-name-list> ...
2. To restore the design, specify the -enable_save_restore
command-line option in addition to the usual SpyGlass options:
spyglass -batch <options> -enable_save_restore ...
This step restores the design view from the default directory
(spyglass.db under the current working directory). In case, you
had specified your own design save directory specified using the
-dbdir command-line option during the design save, indicate this
directory using the -dbdir command-line option:
spyglass -batch <options>
-enable_save_restore -dbdir <my-save-dir> ...
Depending on the selected rules’ characteristics, SpyGlass may not be
able to work with saved design view and hence unchanged design’s re-

Pre-compiling and Using Gate Libraries
parsing and/or re-synthesis may be required. You can skip such rules by
specifying the -skip_rules_for_fast_restore command-
line option along with the -enable_save_restore command-line
option.
NOTE: Please refer the Known Problems and Solutions document for the
current issues and limitations of the Design Save/Restore feature.
NOTE: The Auto_Verify policy does not support for the Design Save/Restore
feature.

SpyGlass provides the feature of pre-compiling the Synopsys Liberty™
files (.lib files) to a SpyGlass-compatible format library file (.sglib files)
that can be used as an input for main-line SpyGlass rule-checking.
Pre-compiling your gate libraries has the following advantages:
• You can check for and fix errors in the libraries before using them
with SpyGlass.
Till now, you would know such errors only after a SpyGlass
Analysis run.
• You can create the SpyGlass-compatible format files (.sglib files)
that contain cell information including the functional view for
library cells.
Pre-compiling Gate Libraries

To pre-compile your gate libraries, follow these steps:
1. Run the SpyGlass Library Compiler on your gates libraries as
follows:
spyglass_lc -gateslib <libfile-name>
Every such run creates the following:

Special Features
• A SpyGlass-compatible format library file named as

<libfile-name>.sglib
For example, library file named R123.lib is processed in to
R123.sglib. Similarly, library file named a45.slflib is processed in to
a45.sglib.
• Standard SpyGlass output files but with different names.
The log file is created with the name spyglass_lc_<libfile>.log and
the Violation Database file with the name spyglass_lc_<libfile>.vdb.
• Standard SpyGlass automatic report (moresimple report)
2. Check the automatic report.
In case, there are error messages, you need to fix the corresponding
problems. Refer the log file for other details.
3. If the library has compiled without errors, use the generated
SpyGlass-compatible format library file for SpyGlass analysis as
follows:
spyglass -sglib <sglib1-name> <other-options>
Where <other-options> are the usual SpyGlass options you
need for analysis.
NOTE: By default, the spyglass_lc command runs in 64-bit mode on
64-bit architectures and 32-bit mode on 32-bit architectures. To enforce 32-
bit execution on 64-bit architectures, use the -32bit command-line
option.
NOTE: You do not need to use the -gateslib command-line option
after pre-compiling your gate libraries.
NOTE: If you wish to use the .sglib file for TAO flow in the Power Estimation
policy, then use the -include_tao_data option with the
spyglass_lc command. This ensures that the generated .sglib
contains the necessary TAO data. For example:
-include_tao_data

When you invoke the TAO flow by using the -include_tao_data

option, a log file, impl_run.log, and a log directory, lplog (containing
other log files of TAO flow), gets created in the current working
directory. If the impl_run.log file and lplog directory already exists,
SpyGlass overwrites the existing file and directory.
While specifying .lib files through the -gateslib option, you can
also specify plib and/or lef files through -plib and/or -lef options.
For example:
spyglass_lc -gateslib <lib-file> -plib <plib-file>
spyglass_lc -gateslib <lib-file> -lef <lef-file>
spyglass_lc -gateslib <lib-file> -plib <plib-file> -lef
<lef>
NOTE: If the power ground pin information of your library cell is not provided as
pg_pin but simply as pin, specify the corresponding power ground pin
information, if available, by using the -lef and/or -plib command-line options in
the library compiler run itself.
To view or verify the generated functional view, use the
-decompile_lib_models command-line option as follows while
pre-compiling the gates library:
-decompile_lib_models
The generated functional view is saved in a file named
<libfile-name>_spyglass_lc.v in the current working directory.
NOTE: The generated Verilog file is for information only and must not be used
for SpyGlass analysis in any manner.
To control the style of library models dumped through the
-decompile_lib_models option, use the
-lib_models_dump_style option.
The -lib_models_dump_style option accepts hide_ipin as
value. To avoid creation of additional inout ports (corresponding to the
internal pins), specify the following at the command line:
-lib_models_dump_style=hide_ipin

Special Features
NOTE: The -lib_models_dump_style option works only when

specified with the -decompile_lib_models option at the command
line.
You can also specify and compile multiple gates library files in one run.
Multiple libraries, for example, mylib1.lib and mylib2.lib, can be specified
using any of the following command-line methods:
Method 1 (using multiple -gateslib options)
spyglass_lc -gateslib mylib1.lib \
-gateslib mylib2.lib
Method 2 (using a single –gateslib option with a space-separated
list of library names within double quotes)
spyglass_lc -gateslib “mylib1.lib mylib2.lib” \
You can also combine the above two methods and specify them as a
single command-line option. For example, you can specify the libraries
mylib1.lib, mylib2.lib, and mylib3.lib as follows:
spyglass_lc -gateslib “mylib1.lib mylib2.lib” \
–gateslib mylib3.lib
Then, the SpyGlass Library Compiler creates one consolidated
SpyGlass-compatible format library file named as aggregate_lib.sglib.
You can also specify a different name for the consolidated SpyGlass-
compatible format library file using the -outsglib command-line
option as in the following example:
spyglass_lc -gateslib mylib1.lib -gateslib mylib2.lib
-outsglib myMergedLib
Overwriting/Adding Functional View of Library Cells

You can add functional view for the cells where the functional view
could not be generated by the SpyGlass Library Compiler. You need to
re-compile the gate library by additionally providing the corresponding
synthesizable RTL description.

• Verilog
Re-run the SpyGlass Library Compiler specifying the Verilog RTL
description files directly, using the -v/-y/+libext command-line
option, or using the -lib command-line option as follows:
<vlog-file-name>
or
-v <vlog-file-name>
or
-lib <logical-lib-name> <physical-lib-name>
You can also specify any combination of the above options.
• VHDL
Re-run the SpyGlass Library Compiler specifying the VHDL RTL
description files directly or using the -lib command-line option as
follows:
spyglass_lc -gateslib <libfile-name> <rtl-file-name>
or
-lib <logical-lib-name> <physical-lib-name>
You can also specify any combination of the above options.
• Mixed-Language
Re-run the SpyGlass Library Compiler specifying the Verilog and
VHDL RTL description files directly (for both Verilog and VHDL),
using the -v/-y/+libext command-line option (for Verilog), or
using the -lib command-line option (for both Verilog and VHDL).
In this case, the SpyGlass Library Compiler searches for cell
descriptions first in the Verilog domain, then in the VHDL domain,
and lastly in the gates library files.

Special Features
This step generates the functional view from the RTL description in to
the SpyGlass-compatible format library file for the corresponding cells.
You can overwrite the functional view of any gate cell using the
procedure described above.
In case, the functional description for a cell is available both in the
library and in a user-specified HDL source file, SpyGlass stores the
functional view as follows:
Library HDL Functional View

Available and can be Not specified Library description is stored
translated
Available and cannot Not specified Only port interface from the library
be translated is stored
Available and can be Specified HDL description is stored
translated
Available and cannot Specified HDL description is stored
be translated
Available and can be Specified but is not Library description is stored
translated synthesizable
Available and cannot Specified but is not Only port interface from the HDL is
be translated synthesizable stored
As you can see in the above table, SpyGlass Library Compiler gives
preference to user-specified definition over cell definition. To give
preference to cell definition over user-specified definition, specify the
-use_lib_models command-line option. Consider an example in
which a cell is defined in test.lib as well as in test.v. Now,
consider that you specify the following command:
spyglass_lc -gateslib test.lib -v test.v
-use_lib_models
In the above case, SpyGlass would give priority to cell definition in
test.lib. However, if the functional view of the cell is not present
in test.lib, SpyGlass considers the cell definition from test.v.

Using Pre-Compiled Libraries

You can use the SpyGlass-compatible format library files (.sglib files) in
your analysis run as follows:
• Specify them in SpyGlass Library file(s) (-sglib) field in the Other Tab
of the Setup > Run Options... menu option in the SpyGlass Design
Environment
• Specify them using the -sglib command-line option in the batch
mode.
While working in the Mixed-Language mode with pre-compiled gate
libraries, SpyGlass searches for the master of an instance in the
following order:
1. First searches in the parent domain.
For example, if the instance is in the Verilog source file, SpyGlass
searches for the master in the Verilog domain (source files and pre-
complied Verilog libraries, if any).
2. If not found, searches in the domain of the other language.
In the above example, SpyGlass then searches in the VHDL domain.
3. If not found, searches in the SpyGlass-compatible format library
files
If the master is still not found, the instance is blackboxed.
However, if the cell definition is present in both in sglib and HDL,
SpyGlass ignores the cell definition present in sglib. In addition,
SpyGlass reports the IgnoredLibCells warning message that points to a
report containing the source sglib name and HDL backref information
of all the ignored library cells.
Based on your requirement, specify the cell definition, as discussed
below:
• If you intend to use the cell definition present in sglib, ensure that
you do not pass the HDL description of that cell to SpyGlass.

Special Features
• If you intend to overwrite/provide functional view of the cell from

HDL and use the other properties of that cell from sglib, ensure that
you pass the HDL descriptions of that cell during library
compilation stage, that is, during sglib creation.
An example is given below:
spyglass_lc -gateslib <.lib files> [-lef/-plib
<power_libs>] [-v/-y/-lib <hdl_libraries>]
For more details on the above use model, refer to the Overwriting/
Adding Functional View of Library Cells topic.
You can also create a report named debug_sglib containing the inferred
functionality for each gate that was successfully synthesized by the
SpyGlass Library Compiler. In addition, the report also has details of
cells that could not be synthesized along with the reason of failure. To
generate the report, specify the -enable_sglib_debug command-line
option.
If you are using library files that are compiled with a Library Compiler
version, which is older than the version of SpyGlass that you are using,
then SpyGlass generates an additional report named
sglib_version_summary.rpt that lists the enhancements made in
subsequent SpyGlass library compiler releases starting from the oldest
version of the library files used in the current SpyGlass run.
The report is generated only if the -enable_sglib_debug command-line
option is specified. Further, if you are using library files that are
compiled with a Library Compiler version, which is higher than the
version of SpyGlass that you are using, then SpyGlass reports a FATAL
message along with sglib_version_summary.rpt report. This message is
generated irrespective of the command-line option -enable_sglib_debug.
To fix this problem you must recompile the library with the version of
Library Compiler that you are using and then use that library file.
• The debug_sglib report is only available in the batch mode; it cannot
be generated from the SpyGlass Design Environment. However, in

SDE you can add this option in the Other Tab of the Options
window and invoke the SpyGlass run. On completion of the run, you
can view the generated report by double-clicking the message of the
rule ReportSglibSummary.
• If your sglib files are generated using any release prior to SpyGlass
3.8.2, you must recompile your gates library files with SpyGlass
3.8.2 or a later release to generate the debug_sglib report.
• If you specify multiple technology libraries of the same name,
SpyGlass considers the first occurrence of the library and ignores the
rest.
In such a scenario, if you are compiling technology libraries with
SpyGlass library compiler, SpyGlass reports the LIBINFO_703
violation. However, if you are using such libraries during SpyGlass
run, SpyGlass reports the ReportDuplicateLibrary violation.
Compressed Library File Support

The SpyGlass Library Compiler supports compressed library files (.lib
files) specified with the -gateslib command-line option or specified
from the Synopsys Gates Library field of the Library Compiler dialog box
(invoked from the Run > Library Compiler... menu option.) Till now,
only un-compressed library files (text files) were supported.
NOTE: Currently, only those compressed library files that have been generated
using the gzip utility and have .lib.gz extension are supported.
The following example generates a SpyGlass format library file named
CORE1234.sglib:
%> spyglass_lc -gateslib CORE1234.lib.gz
• You can specify both un-compressed and compressed library files
together.

Special Features
• You cannot specify a concatenated compressed library file (that is,

concatenation of compressed files are not supported.)
• The SpyGlass Library Compiler exits with a FATAL message if
there are problems with the specified compressed library file.
• The SpyGlass format library files (.sglib files) generated from
compressed library files are also compressed files. Thus, you need
not compress them again. Also, compressed .sglib files are not
supported by SpyGlass.
• Any messages related to the library files contained in the
compressed library file are reported with the compressed library file
name and the un-compressed library file’s line number. The
SpyGlass Design Environment un-compresses and shows the un-
compressed library files contained in the specified compressed
library file. Thus, you can check the reported problems easily.
• File-based waivers should be specified with the name of the
compressed library file only.
• Just like gate cells in un-compressed library files, you cannot cross-
probe from the instances of compressed library gate cells in the RTL
to the schematic windows.
Supported Library Cells
Combinational Cell Support

All types of Combinational cells (those described using the boolean
equation representation by the Liberty function or xfunction
attributes) are supported.
Combinational Cells not Compiled

Combinational cells without at least one output Liberty function or
xfunction attribute, are not compiled.

Sequential Cell Support

Only a limited types of sequential cells are supported as described
below:
Cell Type Support Description

Flip-flops (cells Only single-clock flip-flops are processed for translation.
described using There can be different clocks for master and slave latches as
Liberty ff determined by the clocked_on_also attribute in cell
method) library. Such cells are discarded.
If any output function does not involve next_state
functional node (inverting or non-inverting internal node), then
the cell is discarded.
Latches (cells Only single enable latches are processed. Dual-enable latch
described using cells are designated by the enable_also attribute and
Liberty latch are discarded.
method) If any cell output function does not involve the data_in
functional node, then the cell is discarded.
Flopbanks and A flopbank/latchbank describes a cell that is a collection of
Latchbanks (cells parallel, single-bit sequential parts. The sequential elements
described using are described by means of buses or/and bundles.
Liberty Cells with only buses or only bundles are processed. Cells
ff_bank and with a combination of both buses and bundles are discarded.
latch_bank
methods)
Memory Cells Currently, memory cells are ignored for compilation.
NOTE: The three_state and x_function attributes are supported

for sequential cells.
You are expected to supply the synthesizable RTL description from
other sources (including manual creation) for these problem cells while
analyzing the design with SpyGlass.

Special Features
Sequential Cells not Compiled

The following types of sequential cells are not compiled:
• Sequential memory cells
• Sequential blackbox cells
• Sequential cells with the clocked_on_also attribute
• Sequential cells with the enable_also attribute
• Flop or FlopBank cells without clocked_on and next_state
attributes
• Sequential cells with bus/bundle attribute on control signals
• Sequential cells with both bus and bundle attribute on a pin
• Latch or LatchBank cells where data and enable pins are not
specified together
• Sequential cells without at least one of clear, preset, or data pins
• Sequential cells without at least one primary output
Statetable Cells not Compiled

• Cells with multiple clocks are not compiled. However, statetable
cells representing multiple flip-flops, multiple latches, or a
combination of flip-flops and latches driven by independent clocks
are compiled.
• Cells with input_map attributes on multiple pins are not
translated. However, if the input_map attribute is present only on
a single pin and its values matches completely with the names of the
internal nodes of the statetable than such cells are compiled.
• The input names of the columns of the statetable should match with
at least one input pin. Also the internal node names of the
next_state output column of the statetable should match with at
least one output or internal pin. If either of the two conditions is not
met, then the cell is not compiled.

Automatically Compiling Gate Libraries
• If there is not even a single output pin in the cell with the
function, state_function, or internal_node attribute,
then the cell is not compiled.
• Cells where functionality represented by the state table cannot be
inferred, are not compiled.
Automatically Compiling Gate Libraries

SpyGlass provides the feature to automatically compile the Synopsys
Liberty™ files (.lib files) to a SpyGlass-compatible format library file
(.sglib files) by using the -enable_gateslib_autocompile
command-line option in the SpyGlass run. Here, all the compiled
library files (.sglib files) are internally used for SpyGlass analysis.
A sample of using the -enable_gateslib_autocompile
command is given below:
-gateslib <libfile-name> -enable_gateslib_autocompile
-cachedir <cache-dir> -f <OtherOptions>
The -cachedir option enables you to specify the cache directory
(<cache-dir>) where the library compilation occurs. The cache
directory allows you to reuse the results of any previous .lib
compilation done in the same SpyGlass run. It holds only single .sglib
file corresponding to the .lib files used in the last SpyGlass run.
If the cache directory specified through -cachedir does not exist
then SpyGlass creates that directory (only the leaf most directory). If
you do not use the -cachedir option to specify the cache directory
then, by default, SpyGlass creates a cache directory by the name
spyglass_cache under the current working directory.
You can also compile the gate libraries automatically through any of
the following ways:
• Use the -force_gateslib_autocompile command.
This command automatically implies the use of the

Special Features
-enable_gateslib_autocompile command. If you use the

-force_gateslib_autocompile command to auto compile
the gate libraries then any criteria for re-compilation of gate libraries
(discussed later in this section) will not be evaluated.
• Set the value of the AUTOENABLE_GATESLIB_AUTOCOMPILE
configuration key to yes or yes_forced.
Setting its value to yes is equivalent to specifying the
-enable_gateslib_autocompile command. If you specify
its value as yes_forced then this will be equivalent to using the
-force_gateslib_autocompile command.
It may happen that in the subsequent SpyGlass runs, the gate libraries
that have been compiled earlier by using the
-enable_gateslib_autocompile command are again
specified for compilation through the -gateslib command. In this
case, the auto-compilation of such gate libraries will occur only if any
of the following condition(s) hold true:
• md5sum of any of the specified .lib file has changed.
• Order of .lib file specification on command-line has changed.
This check will be performed only when the specified libraries
contain duplicate cells across different libraries.
NOTE: Duplicate cells are ignored within the same library. However, such
cells are retained across different libraries and the checkDupCells
rule flags a violation for such cases.
• SpyGlass version has changed
If all the above conditions are false then the already compiled .sglib
files are up-to-date in the cache directory. Hence, a re-compilation does
not occur in this case and the existing .sglib libraries are picked from
cache directory.
The specified conditions will not be evaluated if the
-force_gateslib_autocompile option is specified. In this case,
the .lib files will always get compiled immaterial of what is present in the cache

Precompiling Multiple Libraries in a Single SpyGlass Run
directory.
Precompiling Multiple Libraries in a Single

SpyGlass Run
To compile multiple HDL libraries in a single SpyGlass run, you can
use the -libhdlfiles or -libhdlf option. The
-libhdlfiles option enables you to specify a mapping between the
logical library and its HDL files. The -libhdlf option enables you to
specify a mapping between the logical library and HDL files that are
specified through a source list file (.f). These options should be
specified in the order of dependency of the libraries being compiled.
In Single Step Precompilation, elaboration is turned off by default. To
enable elaboration, you need to specify the -elab_precompile
switch.
spyglass -batch -mixed policy=none -libhdlfiles L1
"rtl_1.v rtl_2.v" -libhdlfiles L2 "rtl_3.vhd rtl_4.v" -
libhdlfiles L3 "rtl_dir/*" -lib L1 lib1 -lib L2 lib2 -
lib L3 lib3 -elab_precompile
The above command is equivalent to the following SpyGlass
commands, each of which needs to be run to achieve precompilation of
L1, L2, and L3:
1. Precompile L1:
spyglass –batch –mixed –policy=none rtl_1.v rtl_2.v
–enable_precompile_vlog –lib L1 lib1 –work L1
2. Precompile L2:
spyglass –batch –mixed –policy=none rtl_3.vhd
rtl_4.v –enable_precompile_vlog –lib L1 lib2 –work
L2
3. Precompile L3:

Special Features
spyglass –batch –mixed –policy=none rtl_dir/*

–enable_precompile_vlog –lib L3 lib3 –work L3
The above set of commands are now executed in a single SpyGlass run
by using the single step precompilation feature.
Using the -libhdlf option

If there are large number of HDL files to be precompiled, specifying
each file in the -libhdlfiles option can be time-consuming and
error-prone. Further, if there are large number of design files and/or
design files with long absolute paths, SpyGlass command-line might
exceed the command-line limit set on the UNIX systems. In such cases,
you can use the -libhdlf option in which you can specify the libray
name and the name of the source list file (.f) that contain the references
of all the HDL files corresponding to that library.
Following are some of the examples of using the -libhdlf option:
-libhdlf L1 file1.f
In the above example, the RTL files corresponding to the L1 library
can be found in file1.f.
-libhdlf L1 'file1.f file2.f'
In the above example, design files are picked from file1.f and
file2.f.
libhdlf L1 'file1*.f file2.f'
In the above example, SpyGlass expands file1*.f to find matching
entries (say file11.f and file12.f), and pick the design files
from file11.f, file12.f and file2.f.
Features of Single Step Precompilation

Single step precompilation provides the following features:

Precompiling Multiple Libraries in a Single SpyGlass Run
1. The use of -libhdlfiles option automatically enables the

-enable_precompile_vlog option for the user.
2. You can specify multiple HDL files for a given logical library as a
wildcard or a regular expression (same as it is supported for design
files).
3. Single step precompilation by using the -libhdlfiles option
provides you with a fast way to precompile your libraries as
compared to precompiling multiple libraries in separate SpyGlass
runs. In addition, the overall script/makefile required for
precompiling multiple libraries is also simplified.
4. The various options used to parse the design like +define, -pragma,
etc. are uniformly applied to all the libraries compiled in the current
run. If the value for design options are different for different libraries
(e.g. +define+USB for one library and +define+DSP for another
library), then such library compilations should be split in separate
-libhdlfiles runs, with each library set having the same value
for all the design options.
Makefile Based Support in Step Precompilation

When you compile the RTL libraries by using single step
precompilation, SpyGlass incrementally compiles these libraries.
However, it may happen that the libraries, which have already been
compiled earlier are again specified for compilation through the
-libhdlfiles option. In such cases, the makefile based support in
SpyGlass would enable a re-compilation of the library only if any of
the following conditions hold true:
• If any of the dependent libraries have changed
The list of dependent libraries are recorded at the time of library
compilation.
• If the file set in current compilation is different from the one
contained inside the existing precompile dump

Special Features
Recompilation occurs if you add a file from the current set.

• If the checksum of the current file is different from its corresponding
file precompiled earlier
NOTE: Makefile based support works for precompilation runs that are
performed by using the -libhdlfile switch only and not for
precompilation runs performed by using the -work switch.
If you have compiled certain design files at a particular physical
location by using the -work switch then you should not compile the
design files at the same physical path by using the -libhdlfile
switch. This is required to ensure that precompile runs performed with
the -work switch are separate from precompile runs performed with
the -libhdlfile switch. This would make -work compilation free
from the criteria of deciding whether a recompilation should be
performed. However, if you mix these two modes of precompilation
then SpyGlass might generate an error (Out of date error) in the
libhdlfile run. To avoid this error, you can switch off the makefile
support by specifying the -force_compile switch.
NOTE: Makefile support does not work if you specify the
-elab_precompile switch.
Combining Single-step Precompilation and Top-level Run

SpyGlass can compile HDL libraries and also use the precompiled
libraries in a single run. This means that the following two commands:
%> spyglass -batch -mixed -libhdlfiles L1 "a.v b.v"
-policy=none -lib L1 Lib1
%> spyglass -batch -mixed -hdllibdu -top mymod -lib L1
Lib1
can now be combined into the following single command:
%> spyglass -batch -mixed -libhdlfiles L1 "a.v b.v"
-top mymod -hdllibdu -lib L1 Lib1

The Memory Reduction Feature
Violations flagged in such a combined run will be mostly same as a run

with the same command-line options but source files specified. Some
extra messages will appear in the combined (compile+use) run, which
will be analyzer violations from the design units that are not part of the
design hierarchy. In the combined run, parsing messages are reported
on all design units being compiled. This is contrary to the normal run
where built-in messages too are reported on the design units that are
part of the analyzed top-level hierarchies.
For example, consider that there are four design files, namely f1.v,
f2.vhd, f3.v and top.vhd that are being analyzed as follows:
%> spyglass -mixed f1.v f2.vhd f3.v top.vhd <rule-
checking options>
Further assume that f1.v has design units mid1 and mid2, where mid2 is
not part of the top-level hierarchy. In this case, any parsing-related
message will also not be reported on mid2.
Now, in single-step precompilation and use flow, if we precompile
these files in two libraries L1 and L2 as follows, then the parsing
messages would be reported on mid2 also, even if it is not part of the
top-level hierarchy.
%> spyglass -libhdlfiles L1 "f1.v f2.vhd" -libhdlfiles
L2 "f3.v top.vhd" -top top <rule-checking options>
NOTE: Parsing messages are reported on complete input RTL files being
precompiled, because that is the behavior when you precompile it through
separate SpyGlass precompilation run for each library, that is, not using the
single-step precompilation feature.
Overview
Synthesizing memories (2-dimensional arrays) in RTL designs has

Special Features
always been resource- and time-consuming task; some designs even

run out of system memory. When the memory is synthesized, each bit
location of the synthesized memory is represented by a flip-flop or
latch in the synthesized netlist. This can easily consume an appreciable
amount of system memory, resulting in design capacity problems.
To perform rule-checking of larger memory modules within limited
system resources, SpyGlass provides the optional memory reduction
feature for both Verilog and VHDL designs. SpyGlass can analyze
designs containing large 2-dimensional arrays and still fully analyze
around and through those arrays.
Use the -handlememory command-line option to enable the memory
reduction feature.
Use the Memory Reduction feature when you are not able to read in the
design because of large memories.
Impact of Memory Reduction Feature on Rule-checking

With the memory reduction feature enabled, some Atrenta Standard
Policy rules which earlier used to see the complete memory array
would see only a portion of the memory array. Hence, there will be a
difference in the message reporting as follows:
1. Some rules will not report rule messages as earlier.
The following rules will not report messages in some cases:
• Lint::W111 rule (Not all elements of a memory are read)
• Lint::W456 rule (A variable is specified in the sensitivity list but
some or not all bits are read in the contained block)
• Lint::W488 rule (A bus variable appears in the sensitivity list but
not all bits of the bus are read in the contained block)
• OpenMORE::NotReqSens rule (A signal is included in the
sensitivity list of a combinational always block but is not read in
that block)

• Lint::W122 and OpenMORERule::NotInSens (Signals, which are

read in always block and being set in blocking assignment but not
present in sensitivity list):
2. Some rules will report a message when the designs were earlier
passing the rule-check.
The following rule will report messages in some cases:
• Lint::W175 (A parameter has been defined but not used)
• Lint:W415 (Non-tristate nets that have multiple simultaneous
drivers)
3. Messages of some rules will change.
The rule message of the following rule will change in some cases:
• VCS::BitPartInLHS rule (Check if LHS of procedural assignment
use bit or part select)
4. Some rules will report a message when the designs were earlier
passing the rule-check and vice versa.
• The Miscellaneous::DeadCode rule may start flagging or not flag
designs depending on the actual memory model.
5. Some rules are not flagged to suppress unwanted noise.
SYNTH_5243: Error messages (including valid messages) for
multiple driven nets on which handlememory is applied, are
suppressed.
Apart from the above rules being affected, there are cases where rule
messages will be generated only when the memory reduction feature is
enabled as the memory modules are now being synthesized. In some
other cases, number of rule messages will decrease.
NOTE: It is recommended to run the Lint Ruledeck with -fast command-line
option and without the memory reduction feature enabled and run the other
rules, which require synthesis with the memory reduction feature enabled.
Then, there is no difference in the message reporting for any type of rules. This
requirement will be removed in a future release of SpyGlass.

Special Features
Other Effects of Memory Reduction

• For asynchronous memory processing in the Clock-Reset Policy, the
Memory Reduction feature has no impact because it is not supposed
to get either reset or clock. For synchronous memory also, the
Memory Reduction feature has no impact because both clock and
reset would reach the reduced number of flops.
• For Clock-Reset Policy, if there were clock-crossings/
synchronization etc. actually happening on the memory, the number
of messages would get reduced significantly.
• In the Timing::LogicDepth rule, the timing paths terminating in the
memory through one of the address ports will not be considered by
the Memory Reduction feature.
• In the Area::Gatecount rule, the reported gate count will be different
under the Memory Reduction feature.
Limitations of Memory Reduction in VHDL

SpyGlass Memory Reduction feature has the following limitations for
VHDL designs:
1. Only 2-D arrays declared explicitly through TYPE declarations can
be processed. The memory handling for the design will abort if:
• Any identifier (signal/variable/constant) of 3-D or higher array
type is encountered.
• If 2-D array TYPE declaration of any identifier in a design unit is
in pre-compiled library because pre-compiled library is left
untouched for memory handling.
2. 2-D records are not supported.
3. 2-D ports are not supported.
4. Functions of pre-compiled libraries having 2-D argument/return
type are not supported.

Reporting Messages at Module Boundary
Reporting Messages at Module Boundary
Overview
SpyGlass allows you to report flat-level rule messages up to the
instance boundaries of specified module types (Verilog 'celldefine
modules, Library modules, and user-specified modules).
Flat-level rule-checking in SpyGlass assumes only leaf-level instances
in the flat netlist. These instances can be SpyGlass synthesis tool
primitives/macros instances, .lib instances, or blackbox instances. But at
times, you may want to treat specified module definition, as single unit
for flat-level rule-checking, which basically means that rule-checking
engine should work as if there are only instances of these modules in
the flattened netlist.
A typical case in which you would prefer this behavior, is for ILM
(Interface Logic Model) models of blackboxes. Here, you provide the
basic interface details of blackbox modules that are sufficient for rule-
checking and want SpyGlass to use whatever it needs from inside the
module definition (in terms of connectivity of input to output etc.) but
should not report any messages for nodes inside it.
NOTE: This feature works does not work for built-in messages; it only works for
messages of those policy rules that have been enhanced for this feature.
SpyGlass refers to such module definitions as BBOX_MODEL type
modules since these are effectively blackboxes from point-of-view of
SpyGlass reporting and nothing would be reported inside these
modules.
Identifying Modules
The current implementation understands the following type of modules
as BBOX_MODEL type modules:

Special Features
1. Blackbox ILM model

SpyGlass identifies a design unit (Verilog/VHDL) as a
BBOX_MODEL type module if its definition contains the following
SpyGlass bbox_model pragma:
// spyglass bbox_model (For Verilog)
-- spyglass bbox_model (For VHDL)
The BBOX_MODEL type module definition contains basic interface-
level details with some logic around the interface so that the details
are sufficient for SpyGlass rule-checking.
2. Verilog 'celldefine Modules
The Verilog 'celldefine modules can be identified as possible
BBOX_MODEL type modules as SpyGlass can uniquely recognize
them based on the corresponding 'celldefine directive.
3. SpyGlass-compiled Gates Library Modules
All gates in a SpyGlass-compiled gate library are identified as
BBOX_MODEL type modules.
Enabling the Feature

The configuration key named DEFAULT_BBOX_MODEL has been
added to the SpyGlass Configuration file (the .spyglass.setup
file) that allows you to define the BBOX_MODEL type(s) to be
recognized for SpyGlass rule-checking.
See The SpyGlass Configuration File for more details of designing and
using the SpyGlass Configuration file (the .spyglass.setup file).
NOTE: The override order for the DEFAULT_BBOX_MODEL configuration
key values is $CWD (highest) > $HOME > $SPYGLASS_HOME (lowest).

Working with Designs using DesignWare Components
Impact of the Feature

When you enable the BBOX_MODEL type module recognition feature
and provide the required valid details, the impact on the SpyGlass rule-
message reporting is as follows:
1. The design units identified as BBOX_MODEL type modules are
ignored for RTL description-level rules and hierarchical netlist-level
rules.
2. If the rule-violation involves “internal” nodes of the BBOX_MODEL
type modules, then the rule message reports at the boundary of the
BBOX_MODEL type module instantiation.
3. The schematic windows of the SpyGlass Design Environment shows
the BBOX_MODEL type module instants as blackboxes. You cannot
traverse inside these modules.
4. The rule-violation highlighting is always at the boundary of the
BBOX_MODEL type module instantiation when a rule message
involving the “internal” nodes is viewed.
Working with Designs using DesignWare

Components
In case your design has instances of Synopsys® DesignWare®
components and these components are not yet mapped in terms of the
technological gates, you may specify the -dw command-line option.
Using the -dw command-line causes the following:
• SpyGlass looks at the design description to identify instances of DW
components and the parameter/generic values used with these
instantiations.

Special Features
• SpyGlass invokes Synopsys® DesignCompiler to generate the

netlists (in terms of GTECH cells) corresponding to these instances
of DW components.
• SpyGlass uses this DesignCompiler-generated netlists (of
DesignWare components) for analysis of the design. This causes
SpyGlass to perform a more accurate analysis on the design.
NOTE: SpyGlass uses YOUR license and installation of the DesignWare
toolset (DesignCompiler, DesignWare-Basic, and DesignWare-Foundation) in
order to generate the GTECH mapped netlists. The required wrapper files,
scripts, etc. are all generated internally by SpyGlass itself.
For SpyGlass to know the path of the DesignCompiler installation in
your work environment, you need to set an environment variable
named SPYGLASS_DC_PATH to a valid DesignCompiler installation
as in the following examples:
setenv SPYGLASS_DC_PATH /net/DC2003/linux
setenv SPYGLASS_DC_PATH /net/DC2003
The environment variable SPYGLASS_DC_PATH can be set to either
of the above directory settings.
Alternatively, you can specify the above path in the .spyglass.setup file.
In this file, you need to define the setup key, SPYGLASS_DC_PATH,
and set its value to the DesignCompiler installation area path.
NOTE: Please note the following points:
• If you have set the SPYGLASS_DC_PATH environment variable
and also defined the SPYGLASS_DC_PATH setup key, then
SpyGlass gives preference to the setting specified in the
environment variable.
• The previous DC_PATH environment variable has been replaced by
the SPYGLASS_DC_PATH environment variable.
• If you choose to set SPYGLASS_DC_PATH to some dc_shell
script (and not the installation area) so that the DesignWare files
(packages/dware) and library path (dw/) from dw01 to dw06 are not

Working with Designs using DesignWare Components
deducible from SPYGLASS_DC_PATH, set the

SPYGLASS_DC_DWARE_FILES_PATH and
SPYGLASS_DC_DW_FILES_PATH variables, as shown below, so
that SpyGlass gets the required files:
setenv SPYGLASS_DC_DWARE_FILES_PATH
<dc-installation>/packages/dware/
setenv SPYGLASS_DC_DW_FILES_PATH <dc-installation>/
dw/
Your license setups should also include your DesignCompiler licenses.
To ensure that DesignCompiler is not run again during subsequent runs,
the netlists generated once are stored by SpyGlass. During subsequent
runs, SpyGlass checks whether the netlists already exist for the
instantiated DesignWare components before invoking DesignCompiler.
If these netlists already exist (generated during earlier runs),
DesignCompiler is not invoked for those DesignWare components.
However, DesignCompiler is invoked for any instance of DesignWare
component that does not have the netlist already visible to SpyGlass.
This allows you to change the instantiation of a DesignWare
component (if required) without any loss of analysis and not causing
unnecessary run of DesignCompiler (unless actually required).
The location of the netlists generated by DesignCompiler is stored
along with other files and directories created by SpyGlass.
In case, you want these netlists to be located in an area of your choice,
specify the -lib command-line option as follows:
-lib SPY_DW_WORK <dir-name>
The above specification causes the generated netlists to be stored and
picked from the <dir-name> directory.
Changing the netlist location may be useful if the netlists generated
during the run on one design are desired to be reused during the
subsequent runs on other design(s). During subsequent runs of
SpyGlass, if a desired netlist is found here, it would be picked up.
Otherwise, netlist would be generated by DesignCompiler and stored

Special Features
here for subsequent usage.

Please contact Atrenta Support for a detailed application note on the
DesignWare Support feature that describes how to customize the
feature for your specific design/site requirements.
Specifying Blackbox Internal Connections

SpyGlass uses the timing arc data (from the associated library) for
design traversal at the flat netlist level. In case, the timing arc data is
not available for a particular cell, SpyGlass performs functionality-
based traversal for the gate-level cells.
The SpyGlass Design constraint named assume_path has been
provided that lets you specify the internal connections for the blackbox
design units.
When you specify the assume_path constraints for the blackbox
design units, SpyGlass traversal for instances of such blackbox design
units is as follows:
• If an explicit assume_path constraint is not specified, the design
traversal continues even beyond the blackbox instance assuming that
the fanout list of all input terminals contained all output terminals
and the fanin list of all output terminals contained all input
terminals. This is the existing behavior.
• If the assume_path constraint is specified completely for every
input and output terminal, then the information is used for inferring
input-to-output path and vice-versa.
• If the assume_path constraint is specified partially, then the
partial information is used for inferring the input-to-output path and
vice-versa for those input and output terminals where the path
information has been specified. For all other terminals, the design
traversal stops at the blackbox instance.
The syntax to specify the assume_path constraint in a SpyGlass
Design Constraints file is as follows:

Specifying Blackbox Internal Connections
assume_path
-name <bbdu-name>
-input <input-pin-name>
-output <output-pin-name-list>
Where <bbdu-name> is the blackbox module name (for Verilog

designs) or the blackbox design unit name in <entity-name> format
(for VHDL designs), <input-pin-name> is the name of an input
terminal of the blackbox design unit <bbdu-name> and <output-
pin-name> is the list of output pin names of the blackbox design unit
<bbdu-name>.
• The design unit specified with the -name argument must be an
actual blackbox design unit in the design.
• The pin name specified with the -input argument must be an
actual input pin (as inferred by the SpyGlass built-in Inferblackbox
rule) of the design unit specified with the -name argument.
• The pin name specified with the -output argument must be an
actual output pin (as inferred by the SpyGlass built-in Inferblackbox
rule) of the design unit specified with the -name argument.
• You cannot specify bit-selects or part-selects as values of the
-input or -output arguments.
• Object names are searched in the design in a case-insensitive
manner.
You should specify an assume_path constraint for each input of the
blackbox design unit.
assume_path -name BBOX -input d -output q qbar
The above specification indicates that paths exist between input pin d
and output pins q and qbar of blackbox design unit BBOX.

Special Features
SDC to SGDC Translation

Various design attributes, such as clock definitions and input-output
constraints, are defined in an SDC file, which is typically used for
timing analysis of designs. However, these attributes are also vital for
other engines, such as DFT and Clock policies. SpyGlass requires you
to specify these attributes as SpyGlass Design Constraints files. The
SDC-to-SGDC feature of SpyGlass allows you to automatically
translate SDC format design attributes to infer corresponding SpyGlass
Design Constraints commands.
NOTE: To perform SDC to SGDC translation, use the -policy=none
command-line option. Otherwise, the selected policies ruleset is run with these
additional translated SGDC constraints.
Specifying the SDC File

Before enabling this feature, you need to specify the relevant SDC file
in a SpyGlass Design Constraints file, which can then be specified for
design analysis by using the -sgdc command-line option (along with
the option for enabling the feature). Use the following commands to
specify the SDC file in the SpyGlass Design Constraints file:
current_design <design-name>
sdc_data –file <sdc_file-name>
NOTE: You can also specify compressed SDC file that has been generated by
using the gzip utility.
Enabling the Feature

The SDC-to-SGDC feature is enabled by using the -sdc2sgdc
command-line switch, which translates the SDC commands and
generate the corresponding SpyGlass Design Constraints commands,
which are then used by SpyGlass in the same run.

NOTE: In SpyGlass Design Environment, you can enable this feature by

selecting Enable SDC-to-SGDC Translation check box under the Other tab of
the Options dialog.
The following SDC commands are translated to SpyGlass Design
Constraints commands:
• create_clock
• create_generated_clock (commented out)
• set_input_delay
• set_output_delay
• By default, the set_input_delay and set_output_delay
commands are not translated to SpyGlass Design Constraints
commands. To convert these commands to SGDC, specify
-translateIODelay=yes at the command line.
• While translating the create_clock constraint to clock
constraint, you can extract domain information by setting the value
of the -extractDomainInfo parameter to yes on
command-line. When you set the value of
-extractDomainInfo parameter to yes, the domain
information is extracted on the basis of set_false_path,
set_clock_uncertainty, and set_clock_group
constraints specified in the SDC file. The domain, thus inferred, is
then specified in the -domain field of the clock constraint.
• The generated SGDC commands are available only after the design
has been synthesized.
Support for Virtual Clocks in sdc2sgdc Flow

This functionality affects the following commands:
• create_clock

Special Features
• set_input_delay
• set_output_delay
create_clock If the clock is virtual, that is, no ports/pins/nets are mentioned to serve
as sources of the clock, it is to be dumped in a commented form in the
SGDC file.
The clock constraint dumped in the SGDC file has the -name option
that whose value is the name of the object serving as clock source.
However, in case of virtual clock where the source object is empty, this
field is filled in the following manner:
• A real clock is found in the design which matches the virtual clock.
• If a real clock-mapping to virtual clock is not found, the clock's
actual name itself (that is, the field specified with the -name option
in the SDC file) is used in the generated sgdc file.
set_input_delay If set_input_delay has a virtual clock as its clock source, it is to

be dumped in the SGDC file in un-commented form.
If this virtual clock is mapped to some real clock, the input constraint
uses the corresponding real clock, otherwise it refers to the virtual
clock name only.
set_output_delay If set_output_delay has a virtual clock as its clock source, it will

be dumped in the SGDC file in following manner:
• If this virtual clock is mapped to some real clock, the output
constraint uses the corresponding real clock and it is dumped in an
uncommented form in the SGDC file.
• Otherwise, virtual clock name itself is used and the output
constraint is dumped in a commented form in the SGDC file.

Virtual to Real Clock Mapping

The virtual to real clock mapping is done by any of the following ways:
• By traversal and matching characteristics and then the name
• By name-matching alone
You need to decide the manner by using the -mapVirtualClkByName
and -mapSuffixList command-line options.
Saving the SGDC Commands

By default, the generated SGDC commands are saved in the file named
sdc2sgdc_<mode>.sgdc.<pid> in the $CWD/<vdb-name>_reports/
sdc2sgdc directory. Alternatively, you can save the generated SGDC
commands in a different file by using the -sdc2sgdcfile command-line
option as follows:
-sdc2sgdc
[ -sdc2sgdcfile <file-name> ]
If the file specified by the -sdc2sgdcfile command-line option
already exists, then SpyGlass overwrites the existing file.
Specifying the Mode of SDC File

You can also specify the mode of the SDC file to be translated to SGDC
by using the -sdc2sgdc_mode command-line option as follows:
-sdc2sgdc
[ -sdc2sgdc_mode <mode-name> ]
Limitations
The SDC-to-SGDC functionality has the following limitations:

Special Features
• The clocks generated from the create_generated_clock

command are commented-out in the generated SGDC file.
• If more than one -corner option is specified for a single mode,
then the SDC files corresponding only to the first -corner is
translated.
For example, consider the following case:
sdc_data –file file1.sdc –mode func –corner Best
sdc_data –file file2.sdc –mode func –corner Worst
sdc_data –file file3.sdc –mode func –corner Best
Here, more than one -corner option is specified for the same
mode func. Therefore, the SDC files (file1.sdc and file3.sdc)
corresponding to the first -corner option (Best) are translated by
the -sdc2sgdc command-line option.
• If multiple clocks are defined on the same source object in the SDC
file using the -add option, then SpyGlass flags an error message.
However, if the -add option is not specified, only the last clock
definition is translated and a Warning message is generated.
You can change the severity from Error to Fatal by using the
-overloadrules option at the command line. The syntax is as
follows:
-overloadrules=SDC2SGDC_STX01+severity=FATAL
• If multiple set_input_delay commands are specified on the
same object for different clocks by using the -add_delay option,
then the translation for the delays happen in the order as defined in
the SDC file.
• If the clock and set_case_analysis commands are defined
on the same object in the SDC file, the SpyGlass DFT policy flags a
FATAL severity message to indicate the conflict.
• All commands specified on the port/pin objects are translated on the
connected net in the SGDC file.

SpyGlass Results Analyzer

The sgra_report generates an encapsulated file containing the HDL
source files, SpyGlass Design Constraints files, and the generated
messages that can be opened in the new utility called the SpyGlass
Results Analyzer.
Generating the sgra_report Report

To generate the sgra_report report, select Report > Default > sgra_report in
the SpyGlass Design Environment after the SpyGlass Analysis or
specify -report=sgra_report at the command-line in the batch
mode while starting a SpyGlass Analysis run.
The sgra_report report file is named results.sgra and is generated in the
$CWD/<vdb-name>_reports/sgra_report directory.
Viewing the sgra_report Report

To view the sgra_report reports, invoke the SpyGlass Results Analyzer
using the command-line spyglass_ra utility.
In the SpyGlass Results Analyzer Main Window, you can open a
generated results file using the File > Open Report... menu option. The
selected report is displayed as in the following example:

Special Features
Navigate the report using the following controls:
Menu Option Action

File > Open Report... Opens a results file (closing the currently open results file,
if any)
File > Print Prints the current report view
File > Close Report Closes the currently open results file
File > Exit Exits the SpyGlass Results Analyzer
Edit > Find Text... Search a string in the current view
Edit > Preferences... Sets the display font and link color

Menu Option Action

Go > Back, Navigate the pages like a web browser
Go > Forward,
Go > Home
Help > Overview The Help page for the SpyGlass Results Analyzer
Help > About... The SpyGlass Results Analyzer information
Help > What’s This? Tool-tip for menu options
• The SpyGlass Results Analyzer shows a results file only when all
licenses used in the SpyGlass analysis run that generated the
particular report file are available.
• The images in the Rule Help files are not shown.
Other Usage Concepts
Invoking SpyGlass Results Analyzer from within a web

browser
In some organizations, the results of a SpyGlass run are accessible from
a central web page that is opened in a web browser. To ensure that the
SpyGlass Results Analyzer is invoked with the selected results file
when you click on a link to the results file, make the following settings,
if not already done.
While working on the UNIX platform, add the following line to the
.mime.types file in your home directory:
type=application/spyglass_ra desc="SpyGlass Results
Analyzer Report" exts="sgra"
Restart the web browser to have the new setting take effect.
Now, when you click on a link to a results file in a web page for the first
time, a dialog appears asking you to save or open the selected file.

Special Features
Select to open and specify the SpyGlass Results Analyzer utility

(<your-inst-dir>/SpyGlass-x.y.z/SPYGLASS_HOME/bin/spyglass_ra)
as the invoking program. Also, check the Always perform this action
setting (or its equivalent).
This point onwards, the SpyGlass Results Analyzer is automatically
invoked with the selected results file displayed when you click on a
link to a results file in a web page.
Creating and Using Encrypted Precompiled

Libraries
This section covers the following topics:
• Creating Encrypted Library Dump
• Using Encrypted Library Dump
Creating Encrypted Library Dump

SpyGlass allows you to create encrypted precompiled libraries by using
the -enable_hdl_encryption command-line option. The dump so
created is in traditional SpyGlass precompiled dump format with some
additional information embedded into it that specifies that the dump is
encrypted.
Please note the following points while creating encrypted library dump:
• Library compiled with one version of SpyGlass may not be
compatible with another version of SpyGlass. Therefore, you should
create encrypted dump with appropriate SpyGlass release so that it
can be used with the SpyGlass version used by the IP user.
• While compiling VHDL files, you should specify the files in a
proper order to take care of any dependencies. Else, use the -sort
command-option.

Creating and Using Encrypted Precompiled Libraries
By default, the -dump_all_modes command-line option is turn on with

the -enable_hdl_encryption command-line option. Therefore, when
you create encrypted library dump, SpyGlass creates a precompile
dump on both 32-bit and 64-bit platforms, irrespective of the platform
on which you run SpyGlass.
For details on how to create precompile libraries by using SpyGlass,
refer to following topics:
• Working with User-Compiled VHDL Libraries
• Precompiled Verilog Library Support
Using Encrypted Library Dump

Encrypted precompiled dump should be used in the same way as the
normal precompile dump. The normal precompile dump is used by
specifying a logical library to the physical path mapping of dump by
using the -lib command-line option.
Please note the following points while using encrypted libraries:
• It is recommended to keep the encrypted IPs in their respective
logical libraries and not merge them in a single precompiled library.
• Encrypted libraries and their design units should be referred in an
encrypted IP user's design like any other normal precompiled library
with appropriate VHDL/Verilog constructs, as shown in the
following example:
--VHDL
library L1;
use L1.all;
//Verilog
uselib lib=L1
To know more about using precompiled libraries in a design, refer to
the following topics:

Special Features
• Working with Precompiled Verilog Libraries in the Mixed-

Language Mode
• Specifying Verilog Libraries Using the 'uselib Statement
• If two or more encrypted libraries have the same design unit, use the
fully qualified name or appropriate VHDL/Verilog constructs (as
mentioned above) in the instantiation to pick the design unit from a
specific library. Else, software would pick it based on the order of
the -lib specification. Please note that usage of encrypted design
units follow the same paradigm as for a normal precompiled library
• Rule-checking behavior for encrypted libraries
When you use the encrypted pre-compiled Verilog/VHDL modules
with SpyGlass, all rule-checking on these modules is enabled by
default. Any highlighting information inside such modules are
shown on the module boundary only. Please note that all the
messages are reported on the original file and line of encrypted IP.
You can disable RTL rule-checking on these modules by using the -
disable_encrypted_hdl_checks command-line option. If you specify
this option, SpyGlass disables RTL rule-checking on encrypted
modules. In addition, SpyGlass internally removes any messages
from that point inside an encrypted IP.
• SpyGlass behavior on specifying the waive -ip command on
encrypted IPs
When you specify the waive -ip <IP-name> command,
SpyGlass waives any violation coming on the file and line of an
encrypted IP or any design unit instantiated inside encrypted IP.
above rule-checking behavior for encrypted modules. In addition, SpyGlass
treats all the design units instantiated under an encrypted design unit as
encrypted even if they are not encrypted.
NOTE: The LEXICAL type rules do not run on encrypted RTL files.

On-the-Fly Migration of Violation Messages
On-the-Fly Migration of Violation Messages
Overview
A violation message waived in the last release may change in the
current release. This makes the waiver file of the last release
incompatible for use in the current release. To make it compatible in the
current release, use the -gen_compat_waiver command-line
option. When you specify this option, spyGlass migrates old waiver
commands to new waiver commands.
NOTE: For details on the -gen_compat_waiver option, refer to the
Generating Compatible Waivers application note.
On-the-Fly Migration
During the migration of waiver commands, some waiver commands
might remain un-migrated due to some reasons. In such cases,
SpyGlass adds the --on_the_fly_compat_check field to such
waiver commands to invoke the feature of on-the-fly migration of
violation messages.
When the feature of on-the-fly migration is on, SpyGlass first tries to
waive/match the violation message with the waiver message specified
in the waiver file. If it does not match, it tries a match of old violation
message with the waiver message. The old violation message is
internally formed by SpyGlass if the message of that rule (which is
reported in that violation message) has been changed across SpyGlass
releases. If a match is found, that violation message is waived. Else, it
is reported.
Therefore, SpyGlass is able to use waiver file of the current release as
well as the old releases.
Decision to invoke this flow can only be taken by SpyGlass as this flow

Special Features
is invoked only if the --on_the_fly_compat_check field is

specified in the waiver command(s). This is an internal field and cannot
be added by the user). You should not remove this field as it is used for
internal processing.
Deriving Existing GuideWare Goals in a Template

File
Within a template file, you can derive existing GuideWare goals in the
following ways:
• By including existing template file in the parent template file
Including a template means copying all the options specified in
included template to the parent template. To include a goal in your
parent template, specify the following command in the template file:
-include_goal <goal-path>
• By inheriting existing template file in the parent template file
In SDE and batch, inheriting a template is similar to including a
template file.However, if more than one inherit_goal
specifications are specified, they are ignored, which is not done in
case of including goals. To inherit a template in your parent
template, specify the following command in the template file:
-inherit_goal <goal-path>
The <goal-path> argument refers to the path of the template file to
be included or inherited in the parent template. You can refer to
$SPYGLASS_HOME to specify this path.
If you specify a relative path, SpyGlass resolves that path with respect
to the current working directory. Any other environment variable, if
defined, can also be referred to while specifying the goal path. If that
environment variable is not found, SpyGlass reports an appropriate
error message. SpyGlass reads the included or inherited templates in
the same order as they are specified in parent templates.

Deriving Existing GuideWare Goals in a Template File
Specifications Provided in the Included/Inherited Template

SpyGlass performs different actions based on the specifications
provided in the included/inherited template file.
Following are various specifications that can be provided in an
included/inherited file:
• -rule/-addrule/-ignorerule(s) Specification
• Parameter Specification
• define_severity Specification
• overloadrule Specification
-rule/-addrule/-ignorerule(s) Specification
SpyGlass ignores the -ignorerule specification for a particular rule
in the included/inherited template file if the -rule/-addrule
specification for the same rule is provided in the parent, included, and/
or inherited template file. In addition, SpyGlass reports an appropriate
warning message in such cases.
Consider a parent template file that contains the following
specifications:
-policies=lint
...
-include_goal included-mixed.spq
-addrule W18
...
In addition, consider the included-mixed.spq template file

(given in the parent template) that contains the following
specifications:
-policies=clock-reset,lint
-addrule W391
-ignorerule W18

Special Features
-ignorerule W391
....
Now when the parent template is executed, SpyGlass ignores the W18
and W391 rules and reports the following warning for these rules:
WARNING [342] Rule/Group 'W18' specified at File:
parent-mixed.spq, Line: 6 has been ignored due to the
following -ignorerule(s) specifications -
-ignorerule W18(File: included-mixed.spq, Line: 6)
Parameter Specification
If a rule parameter is specified more than once in an included/inherited
template or the parent template, SpyGlass considers the last parameter
specification.
specifications:
...
-use_inferred_clocks=no
...
In addition, consider the included-mixed.spq included template
file (given in parent template) that contains the following specification:
...
-use_inferred_clocks=yes
...
In this example, SpyGlass considers the
-use_inferred_clocks=yes specification and reports the
following warning:
WARNING [341] Parameter 'use_inferred_clocks' specified
multiple times at following locations -
-use_inferred_clocks=no (File: parent-mixed.spq, Line:
22)

-use_inferred_clocks=yes (File: included-mixed.spq,Line:

6)
All specifications except the last would be ignored.
define_severity Specification
If the define_severity specification for a rule in the parent,
included, and/or inherited template is specified more than once,
SpyGlass decides the define_severity specification to be
considered in the following manner:
• The first define_severity specification, if present in the parent
template, is considered.
• Else, the first define_severity specification present in the
included/inherited templates is considered.
specifications:
...
...
-define_severity Audits+Audit3run+Warning
...
In addition, consider the included-mixed.spq included template
file (given in the parent template) that contains the following
specifications:
...
-define_severity Audits+Audit3run+ERROR
...
In this example, SpyGlass reports the following warnings:
WARNING [345] Severity for 'Audit3run' defined
multiple times for policy 'Audits' in included/inherited
template and parent template ( parent-mixed.spq ) at
following places -

Special Features
ERROR (File: included-mixed.spq,Line: 5)

Warning (File: parent-mixed.spq,Line: 50)
First definition in parent template (severity class
'Warning') would be honored and rest would be ignored.
Consider another example in which no define_severity
specification is present in the parent template file, but the following
define_severity specifications are present in the included
template file:
...
-define_severity Audits+Audit_Info+Warning
...
-define_severity Audits+Audit_Info+INFO
...
In this example, SpyGlass reports the following warning:
WARNING [346] Severity for 'Audit_Info' defined
multiple times for policy 'Audits' in included/inherited
template (inside parent template parent-mixed.spq ) at
following places -
Warning (File: included-mixed.spq,Line: 3)
INFO (File: included-mixed.spq,Line: 6)
All except the very first specification would be ignored.
overloadrule Specification
If multiple overloadrule specifications are present for a particular rule
in the template file, the specified overload specifications are overridden
and merged with subsequent specifications.
If different severity labels are specified in these specification, SpyGlass
considers the last severity label and reports a warning message.
specifications:
...

-overloadrules=Ac_sanity05+severity=Warning
-overloadrules=W226+severity=Info+verilog
...
Also consider the included-mixed.spq included template file
(given in the parent template) that contains the following
specifications:
...
-overloadrules=Ac_sanity05+severity=Error+verilog+vhdl
-overloadrules=W226+severity=Error+vhdl
...
The W226 rule of the lint policy is registered in both Verilog and
VHDL. Therefore, in the above example, SpyGlass applies severity
label for both Verilog and VHDL versions of the W226 rule and does
not report any warning. However, SpyGlass reports the following
warning for the Ac_sanity05 rule:
WARNING [347] Multiple severity overload
specifications found for rule 'Ac_sanity05' (registered
in language 'Verilog+VHDL') in included/inherited
template and parent template (parent-mixed.spq) at
following places -
Warning (Language: Undefined) (File: parent-mixed.spq,
Line:4)
Error (Language: Verilog+VHDL) (File: included-mixed.spq,
Line:7)
Only last severity class would be used.
Checks Performed on the Template File

SpyGlass performs various checks in the template file and reports an
error/warning message in the following cases:
• If the language of the inherited or included goal is not same as the
current language mode

Special Features
• If the include_goal and/or inherit_goal command is

encountered within an already included or inherited template.
• If the parent template inherits more than one goal. In such cases,
SpyGlass considers the first inherited goal, and ignores the rest of
the inherited templates.
• If recursive/duplicate include/inherit template specifications are
present in the same parent template.
NOTE: To suppress warning messages reported on include_goal/
inherit_goal template specification inside parent template, specify the
-suppress_nested_template_msgs option in the parent template
file.


Using SpyGlass in the
Batch Mode
SpyGlass Batch Mode Operation

Besides the SpyGlass Design Environment, you can also run the
SpyGlass Analysis in the batch mode using the SpyGlass command-line
options. In addition, you can use the spyexplain utility to search the
SpyGlass rule infrastructure for rules that meet your specific
requirements.
Using SpyGlass Command-line Options

SpyGlass expects you to enter commands, options, option arguments
and file names using the following syntax rules:
• The command line begins with a command name, such as
spyglass, spyexplain. There is no punctuation before a
command name.
• Normally, option names are preceded by a dash (-report). The
exceptions are Verilog-specific commands preceded by a + sign to
conform to industry custom (+libext).

Using SpyGlass Command-line Options
• Command line options can appear in any order, as long as they are
followed immediately by any argument(s) that apply to them.
• As a rule, option names are separated from an argument by a space
(-report simple) or equal sign (-report=simple). Where
you specify an argument list, arguments are separated by a space and
enclosed in quotes (-du ‘unit1 unit2 unit3’ or
-du =‘unit1 unit2 unit3’). One category of exceptions are
those Verilog-specific options preceded by a + sign. In these cases,
arguments are separated from the options name and from other
arguments by + signs. For Example:
(+block1+block2).
Another category of exceptions are policy-specific options which
have (-option=value) characteristics. These options contain no
spaces. For example:
-policies=lint,openmore or -clocks=clk1,clk2,clk
• If the value of an option has an environment variable that needs to
recognized (expanded), you should enclose the value in double
quotes. For example:
-wdir=”$MYPROJECTAREA/p1”
• In the UNIX environment, the continuation character (\) is used to
signify that a command line continues on another line.
• You can use both the singular version and the plural version for all
applicable command-line options that can accept either one value or
a list of values. Till now, this facility was available for the -
policy/-policies command-line option only.
Following is the list of all the command-line options that are an alias
and can be used interchangeably:

Using SpyGlass in the Batch Mode
Command-line Option to Command-line Option to

Accept One Value Accept Multiple Values
-rule -rules
-addrule -addrules
-ignorerule -ignorerules
-overloadpolicy -overloadpolicies
-template -templates
-sortrule -sortrules
-printgroup -printgroups
-policy -policies
-printrule -printrules
-ignorelib -ignorelibs
-compilelib -compilelibs
-ignorewaiver -ignorewaivers
-ignore_undefined_rule -ignore_undefined_rules
-decompile_lib_model -decompile_lib_models
-use_lib_model -use_lib_models
-enable_pass_exit_code -enable_pass_exit_codes
-no_celldefine_message -no_celldefine_messages
-printreportformat -printreportformats
-overloadrule -overloadrules
-use_scan_flop -use_scan_flops
-nosavepolicy -nosavepolicies
-dump_all_mode -dump_all_modes
-waiver -waivers
-norule -norules
-savepolicy -savepolicies
-enable_inactive_rtl_check -enable_inactive_rtl_checks

SpyGlass Command-line Options
Command-line Option to Command-line Option to

Accept One Value Accept Multiple Values
-libhdlfile -libhdlfiles
-gen_compat_waiver -gen_compat_waivers
• The following command-line options support wildcard patterns:
-f, -filter, -gateslib, -I, -lef, -plib, -sgdc, -sglib, -stopdir, -stopfile, -v,
-waiver, and -y.
Verilog and VHDL files also support wildcard characters.
The options also support regular expression patterns. For further
information, please refer to Pattern Matching Across Features.

SpyGlass provides the following types of command-line options:
• SpyGlass Platform-related Options
• SpyGlass Informational Options
• SpyGlass Mode Selection Options
• SpyGlass Policy Informational Options
• SpyGlass RTL Analysis Options
• Other Command-line Options
SpyGlass Platform-related Options

SpyGlass can run on Solaris and Linux platforms for both 32-bit and
64-bit architectures.
On the Solaris platform (64-bit) and the Linux platform (64-bit), the
64-bit SpyGlass binaries (SunOS7 and Linux4 binaries respectively)
are executed by default. To enforce 32-bit binary execution (SunOS5

and Linux2 binaries respectively), use the -32bit command-line

option.
SpyGlass Informational Options

The SpyGlass informational command-line options provide
information about the SpyGlass software environment and do not
require you to specify a design file.
NOTE: The Violation Database file and the log file are not created when you
invoke SpyGlass with any of the informational options.
spyglass
[ -h | -help ]
| [ -quickstart ]
| [ -usage ]
| [ -version [ -policies|-policy={<policy-name>,} ] ]
NOTE: You do not need to specify the -batch command-line option with the
above-mentioned informational command-line options as it is implicit.
The purpose of the informational command-line options is as follows:
-h (Optional) Prints the site-specific SpyGlass help (that is, information in

<your-inst-dir>/SPYGLASS_HOME/doc/site-help.txt) to the stdout and exits.
You can access site-specific help from SpyGlass by entering the -h or
-help option as in the following example:
spyglass -h
spyglass -help
The information you see depends on what customer-specific SpyGlass
help information has been set up for your company. If no such help has
been set up, a message appears saying site-specific help does not exist.
-help Same as the -h option.

-quickstart (Optional) Prints the SpyGlass Quick Start help (that is, information in
<your-inst-dir>/SPYGLASS_HOME/doc/quickstart.txt) to the stdout and
exits.
-usage (Optional) Prints the help of various options based on the mode
(Console or batch) in which you want to run SpyGlass.
• If -usage is specified alone, Console help is shown and a reference
of getting batch help is shown.
• If -usage is specified with any Console-related option, Console
help is shown.
• If -usage is specified with any Console related options as well as a
batch-related option, a message is displayed indicating that the
options specified are not compatible, and only Console-related help
is shown.
• If -usage is specified with any batch-related option then
batch-related help is displayed.
-version (Optional) Prints the SpyGlass version to the stdout and exits.
If several versions of SpyGlass are available on your company’s
network, it is important to know which version of SpyGlass you are
using. You may also be asked for this information should you contact
Atrenta Customer Support.
To print the release number of the SpyGlass version you are using,
enter the -version option in a SpyGlass command line:
spyglass -version
When the optional argument -policies (or -policy) is also
specified with one or more registered policy names, SpyGlass prints the
version and the minimum required SpyGlass version for each specified
policy to stdout and exits.

SpyGlass Mode Selection Options

The SpyGlass mode selection command-line options decide the
SpyGlass operating mode (the SpyGlass Design Environment or the
batch mode) and the SpyGlass operating language.
spyglass
-64bit | -32bit
-batch | -def | -gui
-verilog | -vhdl | -mixed
<other-options>
Where <other-options> can be either the SpyGlass Policy

Informational Options or the SpyGlass RTL Analysis Options.
The purpose of the mode selection command-line options is as follows:
-64bit (Optional) Specifies SpyGlass to run in 64-bit mode

By default, 64-bit SpyGlass binaries are executed on 64-bit
architectures.
-32bit (Optional) Specifies SpyGlass to run in 32-bit mode.
-batch (Optional) Specifies to run SpyGlass in batch mode.

By default, SpyGlass starts in interactive mode (the SpyGlass Design
Environment).
-def Specifies the language mode of SpyGlass (which can be Verilog,

VHDL, Mixed, or Def).
NOTE: The -def command-line option is used by the Low Power policy only.
The -def command-line option requires the -lef option to be specified along
with it.

-gui Specifies the GUI mode of SpyGlass.

The -gui command-line option takes sde and console as
arguments. The behavior of the -gui command-line option is as
follows:
• If only the -gui command-line option is given (without sde or
console arguments) then the Atrenta Console GUI will be
invoked.
• If the -gui command-line option is given as -gui=sde (along
with -verilog, vhdl, or mixed language options), then the
SpyGlass Design Environment will be invoked.
• If the -gui command-line option is given as -gui=console,
then the Atrenta Console GUI will be invoked.
-vhdl Specifies that the operating language is VHDL. Thus, you can process
VHDL Only design files or generate information about VHDL policies
and reports.
To tell SpyGlass that you are running a VHDL design, enter the -vhdl
option and the name(s) of your design file(s).
For example, to specify that your design file mydesign.vhd is a VHDL
file, enter:
spyglass -batch -vhdl -policy=lint mydesign.vhd
NOTE: If you specify more than one file name, you need to list them in the
correct compilation sequence.
-verilog Specifies that the operating language is Verilog. Thus, you can process
Verilog Only design files or generate information about Verilog
policies and reports.
To tell SpyGlass that you are running a Verilog design, enter the
-verilog option and the name of your design file.
For example, to specify that your design file mydesign.v is a Verilog file,

enter:
spyglass -batch -verilog mydesign.v
-mixed Specifies that the operating language is Mixed-Language. Thus, you

can process Mixed-Language design files or generate information
about Mixed-Language policies and reports.
To tell SpyGlass that you are running a Mixed-Language design, use
the -mixed option and the name of your design file.
For example, to specify that your design is a Mixed-Language design,
enter:
spyglass -batch -mixed mydesign1.v mydesign2.vhd ...
NOTE: You can use the -mixed command-line option to process Verilog
Only designs, VHDL Only designs, or Mixed-Language designs.
SpyGlass Policy Informational Options

The SpyGlass policy informational command-line options provide
information about the Atrenta standard policies and do not require you
to specify a design file.
NOTE: The Violation Database file is created with no contents when you
invoke SpyGlass with any of the informational options.
spyglass
-verilog | -vhdl | -mixed | -def
-printgroups | -printrules
[ -policies | -policy=<policy-name-list> ]
[ -f <file-name> ]
| -printreportformats
[ -printrules ]
The purpose of the policy informational command-line options is as

follows:

-printgroups (Optional) Prints the list of all rule groups and their rules in the
specified policies to the stdout and exits. If you do not specify any
policy, the rule groups and their rules in the policies included in the
default template under the specified language mode are printed to the
stdout.
To print the registered rule groups in the policies of the default

template
To print a list of all the registered rule groups in all policies included in
the default template, use the following command-line:
spyglass -batch -vhdl -printgroups
Since Block-Design/Creation template is the default template, the list
contains all the rule groups registered in the policies included in this
template.
To print the registered rule groups in specified policies

To print lists of the registered rule groups in the specified policies, enter
the policy name and language.
For example, to list the rule groups that are registered in the Verilog
OpenMORE policy, enter:
spyglass -batch -verilog
-printgroups -policy=openmore
SpyGlass prints a list of the group names and the names of all the rules
(and groups if applicable) registered in each group. SpyGlass lists the
rules within a group in the order in which they are defined in the policy.
NOTE: The -printgroups command-line option does not apply these rules to
your design files.
To print the rule groups in a session file

To print lists of the registered rule groups in all policies included in a

session file (for example, a template file), use the following command-
line:
spyglass -batch -vhdl
-printgroups
-f /usr/john/projects/mytemplate-vhdl.spq
Then, SpyGlass prints the list of registered rule groups in policies
included in the mytemplate-vhdl.spq file.
-printreportformats (Optional) Prints the list of all registered VDB-based reports in all
registered policies including the SpyGlass standard reports.
-printrules (Optional) Prints the list of all rules available in the specified policies
to the stdout and exits. If you do not specify any policy, the rules in the
default template under the specified language mode is printed to the
stdout.
All the rules in a SpyGlass policy are referred to as registered rules.
Registered rules can be enabled (switched on) or disabled (switched
off). When SpyGlass runs with a specified policy, only those rules that
are enabled are checked. However, it is useful to see the complete set of
registered rules in case there are some available that would be useful to
switch on. To print a list of all the registered rules, you use the
-printrules command-line option.
To print the registered rules in the policies of the default

template
To print a list of all the registered rules in all policies included in the
default template, use the following command-line:
spyglass -batch -vhdl -printrules
Since Block-Design/Creation template is the default template, the list
contains all the rules registered in the policies included in this template.

To print the registered rules in the specified policies

To print the registered rules in a specific policy, enter the policy name
and language.
For example, to print the registered rules in the Verilog OpenMORE
policy, use the following command-line:
spyglass -batch -verilog -printrules -policy=openmore
SpyGlass prints a list that includes the rules, other names by which the
rules are known (their aliases) and whether each rule is turned on or off.
NOTE: The -printrules command-line option does not apply these rules to
your design files.
To print the rules in a session file

To print lists of the registered rules in all policies included in a session
file (for example, a template file), use the following command-line:
spyglass -batch -vhdl
-printrules
-f /usr/john/projects/mytemplate-vhdl.spq
Then, SpyGlass prints the list of registered rules in policies included in
the mytemplate-mixed.spq file.
SpyGlass RTL Analysis Options

The SpyGlass RTL Analysis command-line options are as follows:
spyglass
-batch | -gui
[ <RulesOptions> ]
[ <GeneralOptions> ]
[ <PERLOptions> ]
[ <HDLCommonOptions ]
[ <VHDLOnlyOptions> ]

[ <VerilogOnlyOptions> ]
[ <OtherOptions> ]
[ <RuleParameters> ]
<SourceFileOptions>
Rules Options
RulesOptions::=
[ { -addrules <rule-list> } ]
[ { -define_severity <severity-expression> } ]
[ -disallow_view_delete ]
[ -fullpolicy ]
[ -higher_capacity ]
[ -ignore_undefined_rules ]
[ -ignorewaivers ]
[ -norules
| [ -policies | -policy={<policy-name>,} ]
[ { -rules {<rule-name>} } ]
[ { -ignorerules {<rule-name>} } ] ]
[ -overload {<named-overload>,} | none ]
[ -overloadpolicy {<policy-name>,} | all | none ]
[ { -overloadrules <overloadrule-expression> } ]
[ -run ]
[ -sortrule ]
[ { -template {<template-name>,} | none} ]
[ -templatedir <dir-name> ]
[ -checkTopDu ]
[ -check_celldefine ]
-addrules (Optional) Selectively adds a rule in the following situations:

• Enable a switched-off built-in rule
For example, the SYNTH_5116 Built-in rule is switched off by
default. You can activate this run using the following command:

-addrules SYNTH_5116
• Add a rule to an existing rules specification
For example, you are running a template named myTempl and want
to run an additional rule myRule23. You can then use the following
command:
-template myTempl -addrules myRule23
-define_severity (Optional) Defines a user-specified severity label for the current

SpyGlass run.
The -define_severity command-line option is normally used in
conjunction with the -overloadrules command-line option.
The format of specifying the -define_severity command-line
option is as follows:
-define_severity
<policy-name>+<severity-label>+<severity-class>
Where <policy-name> is the policy mnemonic for the policy for
which you are specifying the new severity label, <severity-label>
is the new severity label being defined, and <severity-class> is
one of the Predefined Rule Severity-Classes.
You cannot use spaces in the new severity label.
NOTE: All values and the intervening + characters must be specified without
any spaces.
The following example defines a new severity label named myFATAL
under the pre-defined severity class FATAL for the SpyGlass Lint
policy (policy mnemonic is lint):
-define_severity lint+myFATAL+FATAL
-disallow_view_delete
(Optional) Disables the Large Design Processing Mode. Then, all rules
run as in versions before SpyGlass version 3.2.0. Also, both the RTL

view and the Netlist view remain in the memory for all types of rules.
NOTE: You cannot use the -higher_capacity and
-disallow_view_delete command-line options together as they are
complementary.
-fullpolicy (Optional) Specifies to run all rules (except those rules that are
controlled by parameters, which run based on the parameter values) of
all selected policies.
All Atrenta standard policies have been reorganized to run only a
selected set of rules when you select to run the complete policy (by
specifying the policy name using the -policy/-policies
command-line option and not specifying one or more rules of that
policy using the -rules command-line option). The selected set of
rules have been chosen to quickly highlight the value of the particular
policy.
Earlier, such specification used to run all rules of the specified policy.
You can still run all rules (except those rules that are controlled by
parameters, which run based on the parameter values) of a policy by
specifying the -fullpolicy command-line option.
NOTE: There is no change in SpyGlass behavior when you use the -rules
command-line option to specify rules to be run or when you run a template.
-higher_capacity (Optional) Disables rules designed for SpyGlass version 3.2.0 that
require both the RTL view and the Netlist view, if any. In addition,
SpyGlass deletes the RTL view from memory before executing rules
designed for SpyGlass version 3.2.0 that require the Netlist view only.
-ignore_undefined_rules
(Optional) Allows SpyGlass to continue after issuing a warning
message if an undefined rule is specified at the command-line.
By default, SpyGlass exits with an error if you specify a rule that does
not exist in any of the specified policies.

-ignorerules (Optional) Specifies the rule names or rule group names to be ignored
in rule checking. You can specify multiple rule names, rule group
names, or a combination of both.
If the value of the RULE_SELECTION_ON_CL_POSITION option is
set to yes in the spyglass.setup file, then the priority of the rules is
decided based on their position. For example, if the -ignorerules
command-line option is given before the -rules command-line option
for a particular rule, then the -rules command-line option will have a
higher priority than the -ignorerules command-line option and the
rule will not be ignored. However, if the
RULE_SELECTION_ON_CL_POSITION option is set to no
(default), then the -ignorerules command-line option has higher
priority than the -rules command-line option.
NOTE: There are certain rules in SpyGlass that cannot be ignored. If you
specify such rules with the -ignorerules option, SpyGlass flags
WARNING [38]. For example, most of the rules of the following categories
cannot be ignored:
BuiltIn rules Prerequisite rules
NOTE: The semantic checks on SpyGlass command-line options and SGDC

commands are now ignorable, even though these are mandatory checks.
Some examples of these checks are CMD_define_severity03,
checkCMD_wildcardMatch03 etc. for command-line options, and
SGDC_clock01, checkSGDC_existence etc. for SGDC commands. Please
note that it is recommended not to ignore these rules unless you encounter any
problems with these checks.
You may want to run all rules in a policy except for one or two. To do
this, you use the -ignorerules command-line option. SpyGlass
then checks all rules except those that you specify using the
-ignorerules command-line option.
When you exclude rules, they are only turned off for the duration of the
current SpyGlass run.

To exclude one or more rules in a policy

Sometimes, particular rules are not relevant for the design file you are
checking. Then, you can turn off those rules during the current
SpyGlass run.
To exclude a specific rule in a policy, use the -ignorerules
command-line option as follows:
spyglass -batch -ignorerules <rule-name> ...
Where <rule-name> is the name (as specified in the corresponding
policy file) of the rule to be excluded.
NOTE: The rule names are case sensitive; make sure you enter them correctly.
To check the correct spelling of rule names or to see what rules are in a policy,
use the -printrules command-line option.
For example, to exclude the rule SigName of the OpenMORE policy
when checking a Verilog design file, use the following command-line:
spyglass -batch -verilog -policy=openmore \
-ignorerules SigName ...
If you want to exclude more than one rule, use a separate
-ignorerules option for each rule or use a single
-ignorerules option with a space-separated list of the names of the
rules enclosed in single quotes.
For example, to exclude the rules W323 and W415 from the Lint
policy, enter:
spyglass -batch -verilog -policy=lint \
-ignorerules W323 -ignorerules W415 ...
or
spyglass -batch -verilog -policy=lint \
-ignorerules 'W323 W415' ...

To exclude one or more rules in a rules group

To run the rules of a rule group but exclude one or more specific rules,
use the -rules command-line option (to specify a rule group) and the
-ignorerules command-line option (to exclude one or two rules
from the specified rule group) as follows:
spyglass -batch -rules=<rule-group-name>
-ignorerules=<rule-name-list> ...
Where <rule-group-name> is the name (as specified in the
corresponding policy file) of the rule group to be run and <rule-
name-list> is the names (as specified in the corresponding policy
file) of the rules of the specified rule group to be excluded.
NOTE: The rule names and rule group names are case sensitive; make sure
you enter them correctly. To check the correct spelling of rule names or to see
what rules are in a policy, use the -printrules command-line option. To
check the correct spelling of pre-defined rule group names or to see what rule
groups are in a policy, use the -printrulegroups command-line
option.
For example, to check only the OpenMORE rules group called
General_Naming_Conventions and exclude the rule SigName
from this group when checking your VHDL design file, enter:
spyglass -vhdl -policy=openmore \
-rules General_Naming_Conventions \
-ignorerules SigName ...
To exclude all rules of a policy

Sometimes, you may want to ignore all rules of a policy while running
templates. Then, you can specify the -ignorerules command-line
option with the policy mnemonics as follows:
spyglass -batch -template ...
-ignorerules=<policy-mnemonic-list> ...
For example, to exclude all Lint rules when running a template

mytemplate1 (that has some Lint rules besides rules of other

policies), specify the -ignorerules command-line option as
follows:
spyglass -batch -template mytemplate1 -I...
-ignorerules=lint ...
-ignorewaivers (Optional) Causes SpyGlass to ignore waivers supplied as embedded

SpyGlass Waiver pragmas.
The following command uses the pragma-based waivers described
inside the source file test.v:
spyglass -batch -verilog -ignorewaivers test.v
-norules (Optional) Suppresses rule checking; the design is analyzed for syntax
errors or warnings only.
You can run SpyGlass on your design without rule-checking to check
the design for HDL syntax and structure integrity.
It is often useful to check that the design environment (files, libraries,
include files, macro definition files) are all present and correctly
defined before any rules are checked. Also, VHDL libraries must be
pre-compiled and checked for HDL syntax errors before you do a rules
check. To keep SpyGlass from checking any rules, use the -norules
option.
To exclude all rules from a rules check in a design file, use the
following command-line depending on the language type:
spyglass -batch -norules -verilog <source-file>
spyglass -batch -norules -vhdl <source-file>
spyglass -batch -norules -mixed <source-file>
Then, SpyGlass generates only RTL description-level built-in messages

if a corresponding problem is encountered.
NOTE: Also, see the -policies | -policy command-line option that has a similar

function.
-overload (Optional) Runs the specified named overloads for all specified
policies.
To learn about using named overloads, see the SpyGlass Policy
Customization Guide.
-overloadpolicy (Optional) Runs the specified policies with the overloaded components,
if any.
NOTE: The rule-checking results with overloaded policies may be different
from results from normal policies.
If you do not specify this option, overloaded policy components, if any
are ignored and normal policies are run.
SpyGlass provides the feature to overload a policy to meet local
preferences of user base. This feature is typically required when you
want to use Atrenta-standard policy but with certain customization
such as different severity-labels, pod-cut description, alias name, etc.
Under this feature, you need to create another file named <policy-name>-
policy-overload.pl where <policy-name> is the name of the original
policy you want to overload. Thus, to overload the Lint policy, you
need to create a file named lint-policy-overload.pl file.
To learn about creating policy overload files, see the SpyGlass Policy
Customization Guide.
The policy overload files are searched using the same -I command-line
option mechanism as used for custom policies.
Use of policy overload feature is controlled by the

-overloadpolicy command-line option as follows:
Command-line
Specification Effect
-overloadpolicy Apply Policy overload on all policy being selected to
run. This is subject to policy overload file being found
in the specified search path.
-overloadpolicy=none Disables search and loading of overload files.
or not specified
-overloadpolicy=a,b Apply policy overload to policy named ‘a’ and ‘b’ only
(assuming one or more of these policy are selected to
run.
-overloadpolicy=all Apply policy overload on all policy selected to run. If
policy overload file is not found for any policy, it is
considered as an error condition, and (frequently) may
be because of incorrect or no ‘-I’ specification.
-overloadrules (Optional) Overloads the severity or weight of a rule for the current
SpyGlass run.
The formats of using the -overloadrules command-line option
are as follows:
-overloadrules
<rule-name>+<lang>+severity=<severity-label>+weight=<value>
Where:
<rule-name> is the name of the rule being overloaded.
<lang> is the language for which you want to overload the rule. The
allowed values are VHDL, Verilog, Verilog+VHDL
(case-insensitive). Language of the -overloadrules specification
should be same as used in the corresponding rule registration. For
example, if a rule is registered with Verilog + VHDL language, its
-overloadrules specification should also be Verilog + VHDL.
NOTE: The -overloadrules specification is used in conjunction with

spyOverload specification. However, the -overloadrules specification

takes precedence over the spyOverload specification.
NOTE: If a rule is registered in a single language (Verilog or VHDL), and there
is no overloadrule specification in the same language (through -
overloadrules or through spyOverload) then overloadrules
specification with Verilog+VHDL is still applied for backward
compatibility purposes. However, this is not a recommended use-model
and should not be used.
The +<lang> setting is optional. Thus, when it is not specified, the
overload values are applicable to all language variations of the rule.
Therefore, if you are not sure about the language specification of rule
registration, you can omit the language option from overloadrule
specification.
<severity-label> is the overloaded severity label. The severity
label can be one of the SpyGlass predefined severity labels (Fatal,
Error, Warning, Info, and Data), one of the severity labels
defined in the corresponding policy, or a user-specified severity label
defined using the -define_severity command-line option. If the
specified severity label is not any of these labels, SpyGlass auto-
registers the severity label under the severity class ERROR.
NOTE: As you overload a rule’s severity label, the SpyGlass processing of the
rule will be governed by the severity class of the overloaded severity label. For
example, when you overload a rule with a severity label of severity class
FATAL, SpyGlass aborts when a rule-violation of this rule is encountered.
<value> is the overloaded rule weight value.
You can specify the <rule-name> followed by any combination of the
other settings.
NOTE: All settings and the intervening + characters must be specified without
any spaces.
The following example indicates that the severity label for the Verilog
version of the W402b rule (of SpyGlass Lint policy) should be
Warning (one of the SpyGlass predefined severity labels) for the

current SpyGlass run:

-overloadrules W402b+Verilog+severity=Warning
The following example indicates that the severity label for all language
versions of the Clk_Gen03a rule (of SpyGlass Constraints policy)
should be Error (one of the SpyGlass predefined severity labels) for
the current SpyGlass run:
-overloadrules Clk_Gen03a+severity=Error
The following example indicates that the rule weight for the Verilog
version of the InstNameLength rule (of SpyGlass OpenMORE policy)
should be 10 (the default weight is 5) for the current SpyGlass run:
-overloadrules InstNameLength+Verilog+weight=10
The following example indicates that the severity label for the VHDL
version of the W116 rule (of SpyGlass Lint policy) should be
myERROR1 (defined using the -define_severity command-line option)
under the severity class ERROR for the current SpyGlass run:
-define_severity lint+myERROR1+ERROR
-overloadrules W116+VHDL+severity=myERROR1
The following example indicates that the severity label for the TA_01
rule (of SpyGlass DFT policy) should be Info (one of the SpyGlass
predefined severity labels) and the rule weight should be 10 (the default
weight is 1) for the current SpyGlass run:
-overloadrules TA_01+severity=Info+weight=10
NOTE: The -overloadrules command-line option is not applicable for
rule aliases.
Specifying -overloadrules Specification for a Particular Label

You can also specify overloadrule specification for a particular label.
For example, consider a multi message rule, dummyRule, with the
following assumptions:
• The rule that has two labels, Label1 and Label2.

• Severity for Label1 is Warning and severity for Label2 is

Info.
Now if you want to change the severities of both the labels to Error,
use the following overloadrule specification:
-overloadrules=dummyRule+severity=Error
To change the severity of a specific label (say Label1), use the
following overloadrule specification:
-overloadrules=dummyRule+severity=Error+msgLabel=LABEL1
-policies | -policy (Optional) Specifies the comma-separated list of policies to be loaded.

SpyGlass comes with a number of standard policies. Each policy file is
named as <policy-name>-policy.pl. where <policy-name> is
the policy name and is located in its own directory <your-inst-dir>/
SPYGLASS_HOME/policy/<policy-name>. For example, the policy file for
Atrenta Standard Lint checking policy is lint-policy.pl. and is located in
the <your-inst-dir>/SPYGLASS_HOME/policy/lint directory.
NOTE: If you specify a policy.pl file at the command-line that has an error, then
a fatal error message is displayed and the SpyGlass GUI is not invoked.
NOTE: Use of rule parameters at the command-line may affect the functional
behavior of some rules and may also determine if those rules should be run or
not run. Refer to the corresponding Policy documentation for details on the rule
parameters and the effect of the parameters on some rules.
More information is available in the respective Rule Reference
document for each policy which can be accessed using The
spydocviewer utility or The spyhelpviewer utility.
In addition, you can create your own customized policies and use them
just like Atrenta Standard policies.
You can tell SpyGlass to use multiple policies at one time.
When you apply a policy, you are telling SpyGlass to check your
design source files against the rules that are in this policy.

To apply one policy

To apply a single policy on your design files, use the -policy
command-line option or -policies command-line option as
follows:
spyglass -batch -policy=<policy-name> ...
spyglass -batch -policies=<policy-name> ...
For example, to apply the OpenMORE policy, use the following

command-line:
spyglass -batch -policy=openmore ...
To apply the STARC policy, use the following command-line:
spyglass -batch -policies=starc ...
To apply more than one policy

You can apply multiple policies to a design file during a single run.
To apply multiple policies on your design files, use the -policy
command-line option or -policies command-line option as
follows:
spyglass -batch -policy=<policy-name-list> ...
spyglass -batch -policy=<policy1-name>
-policy=<policy2-name> ...
spyglass -batch -policies=<policy-name-list> ...
Where <policy-name-list> is a comma-delimited list of policy
names (with no spaces).
For example, to apply the Lint and OpenMORE policies, use any of the
following command-lines:
spyglass -batch -policy=lint,openmore ...
spyglass -batch -policy=lint -policy=openmore ...
spyglass -batch -policies=lint,openmore ...

NOTE: You can run SpyGlass without any policies by specifying the none
value (for example, -policies=none). Then, only the SpyGlass built-in
rules are run on your design files (HDL files, SpyGlass Design Constraints files,
Library files, etc.), that is, your design files are effectively syntax-checked.
NOTE: Also, see the -norules command-line option that has a similar function.
-rules (Optional) Specifies the space-separated list of rules or rule group

names to be performed on the design files.
If you do not specify this option, all smart rules of the policies specified
by the -policies option will be run on the design files.
If you have also specified to ignore some rules using the
-ignorerules option, then these rules will be ignored even if they
have been specified by the –rules option.
At times, you may want to run checks using particular rules, rather than
applying every rule that is in a policy. A quick way to include only
certain rules is to use the -rules command-line option.
Alternatively, you can use both the -rules command-line option (to
specify a rule group) and the -ignorerules command-line option
(to exclude one or two rules from the specified rule group) in a single
command-line to exclude one or two rules from a particular rule group
in a policy.
The -rules command-line option overrides all policy rule parameter
that enable or disable specific rules. For example, the W546 rule of the
Lint policy is controlled by the verilint_compat rule parameter.
However, the W546 rule will run when it is specified with the -rules
command-line option (directly or indirectly) irrespective of the
verilint_compat rule parameter (whether specified or not). Such
rule parameters are effective only when you run a complete policy
without using the -rules command-line option.
NOTE: Use of rule parameters at the command-line may affect the functional
behavior of some rules and may also determine if those rules should be run or
not run. Refer to the corresponding Policy documentation for details on the rule

parameters and the effect of the parameters on some rules.
To include only a particular rule

To include only a particular rule, use -rules option as follows:
spyglass -batch -rules <rule-name> ...
Where <rule-name> is the name (as specified in the corresponding
policy file) of the rule to be included.
NOTE: The rule names are case sensitive; make sure you enter them correctly.
To check the correct spelling of rule names or to see what rules are in a policy,
use the -printrules command-line option.
For example, to run only the rule named SigName in the OpenMORE
policy when checking your VHDL file, enter:
spyglass -batch -vhdl -policy=openmore \
-rules SigName ...
If you try to specify a rule that is not included in the policy you
specified, SpyGlass issues a ‘rule not registered’ error at runtime.
To include a number of rules

To include more than one rule, either use a separate -rules option for
each rule or use a single -rules option with a space-separated list of
the names of the rules enclosed in quotes.
For example, to include the SigName and InstName rules of
OpenMORE policy when checking your VHDL file, use the following
command-line:
-rules SigName -rules InstName ...
Alternatively, for the same example, to use a list of rules, enter:
-rules 'SigName InstName' ...

Alternatively, you can use the SpyGlass option -f to supply a session

file describing multiple options.
To include a rule group

To include all rules of a rule group, use a -rules option for the rule
group name. To specify multiple rule groups either use a separate
-rules option for each rule group or use a single -rules option
with a space-separated list of the names of the rule groups enclosed in
quotes.
When you specify to run a rule group, all rules of that group are run
irrespective of their operating conditions.
-run (Optional) Specifies to analyze the design with the specified settings
after invoking the SpyGlass Design Environment.
Use the -run command-line option when you want to work in the
SpyGlass Design Environment and want the design to be immediately
analyzed after invoking the SpyGlass Design Environment.
You must provide all essential SpyGlass command-line options with
the -run command-line option. Otherwise, the design will not be
analyzed.
-sortrule (Optional) Specifies the sort order for messages in SpyGlass reports.
See Sorting Messages in SpyGlass Reports for more details.
-template (Optional) Runs the specified templates.

You can specify the -template command-line option as follows:
-template <method-name>/<template-name> ...
Where <method-name> is the name of the methodology and the
<template-name> is the name of a template under the <method-
name> methodology.

Methodology names are the names of the directories containing

template files. The template names are the first part of a template file
located in the methodology directories.
For example, the Clock-reset/Clocks methodology (that is, the <your-inst-
dir>/SPYGLASS_HOME/Methodology directory) has the Clock_Setup
templates comprising three files named Clock_Setup-mixed.spq,
Clock_Setup-verilog.spq, and Clock_Setup-vhdl.spq for three language
modes. To run the Clock_Setup template, specify as follows:
spyglass -batch -vhdl -template Clock-reset/Clocks/
Clock_Setup ...
spyglass -batch -verilog -template Clock-reset/Clocks/
Clock_Setup ...
spyglass -batch -mixed -template Clock-reset/Clocks/
Clock_Setup ...
Depending on the language specification, SpyGlass selects and runs the

corresponding template file.
You can also select to run multiple templates using any of the following
format:
-template <method1-name>/<template1-name>
-template <method2-name>/<template2-name> ...
-template “<method1-name>/<template1-name>
<method2-name>/<template2-name> ...” ...
SpyGlass searches for the specified templates in the following order:

1. The directory specified using the -templatedir command-line
option (overrides the DEFAULT_TEMPLATE_DIRECTORY
configuration file setting, if any)
2. The paths specified using the -I command-line option
3. In the <your-inst-dir>/SPYGLASS_HOME/Methodology directory
NOTE: If the templates specified are not found in any of the above paths,

SpyGlass prints the best possible matches for the templates, which are present
in the above mentioned paths.
Before running the specified templates, SpyGlass generates the
following informational message on the stdout:
INFO: SpyGlass will run command-line specified
template(s) ‘<method1-name>/<template1-name>’,
‘<method2-name>/<template2-name>’.
You can specify the -template=none command-line option to
indicate that no templates should be used during the SpyGlass analysis
run. All the templates specified after specifying the -
template=none option are ignored. However, the templates
specified before specifying the -template=none option are
processed as before.
Also refer to the Customizing a Template File topic.
-templatedir (Optional) Specifies the directory where the templates specified using
the -template command-line option are to be searched.
If the -templatedir command-line option is specified, SpyGlass
searches for the specified templates in the following order:
1. The directory specified using the -templatedir command-line
option
2. The paths specified using the -I command-line option
3. In the <your-inst-dir>/SPYGLASS_HOME/Methodology directory
If the -templatedir command-line option is not specified,
SpyGlass searches for the specified templates first in the directory
specified using the DEFAULT_TEMPLATE_DIRECTORY
configuration file setting and then in the other directories mentioned
above.
NOTE: The template directory structure may contain one or more methodology
directories within which the templates are present. In such cases, you should
set the -templatedir option one level up than the methodology directory

to see templates below each methodology. For example, if a template, T, is

present under the methodology directory, M, which is further present under the
directory, D1/D2, you should set the value of the -templatedir option as
D1/D2 and the value of the -template option as M/T.
-checkTopDu (Optional) This is a kernel parameter that causes the specified rules to
be checked at the top-level only. Use the -checkTopDu parameter to
specify a comma-separated list of rule names. For example:
-checkTopDu="UndrivenOutPort-ML,UndrivenNet-ML"
In the above example, the UndrivenOutPort-ML and UndrivenNet-ML
rules will check top-level design unit only.
You can also set the value of the -checkTopDu parameter to yes and
all the rules will check at the top level.
NOTE: The behavior of post flattening rules is not affected by the
-checkTopDu parameter. For such rules, you need to create waive
commands to waive the hierarchical violations.
-check_celldefine (Optional) Turns on the rule-checking on all the 'celldefine

modules.
By default, the Verilog 'celldefine modules are not checked by
SpyGlass as they are leaf-level library cells, and any independent
checks (such as style checks like indentation) on these cells are not
desired by most of the users. However, if you still want to check for
such modules, specify the -check_celldefine command-line
option.
If you do not specify this command-line option, SpyGlass flags a
warning specifying that rule-checking for 'celldefine modules is
off.
NOTE: Please also see the -allow_celldefine_as_top command-line option.

General Options
GeneralOptions::=
[ -classic_mode ]
[ -configfile <config-file-name> ]
[ -est_mode [ -use_scan_flops ]]
[ -preserve_mux ]
[ -esynth_mode ]
[ -enable_pass_exit_codes ]
[ { -f <session-file-list> } ]
[ -LICENSEDEBUG ]
[ -logfile <file-name> ]
[ -lvpr (<number> | <rulename>=<number>) ]
[ -noispy ]
[ -noreport
| [ { -report { <format-name>, } } ]
[ -reportfile <file-name> | stdout ]
[ -report_per_policy ]
[ -report_adjustment_waiver ]
[ -report_ip_waiver ]
[ -report_max_size=<value> ]
[ --report_style=<list-values> ]
[ -rulegroup_display_depth=<number> ]
[ -nosch ]
[ --perflog ]
[{ -pragma <string> } | -pragma nopragma ]
[{ -pragma_varfile <file-list> }]
[ -vdbfile <file-name> ]
[ -w ]
[ -wdir <dir-name> ]
[ --write_vdb_reports_in_wdir ]
[ -enable_sgdc_debug ]
[ -cell_library ]
[ -enable_const_prop_thru_seq ]
[ -use_goal_rule_sort ]
[ -enable_save_restore_builtin ]
[ -dump_precompile_builtin ]
[ -show_sdc_progress ]

-classic_mode (Optional) Executes the CLASSIC mode rules only (which run on non-
optimized netlist) and disables rules of EST and ESYNTH mode.
-configfile (Optional) Specifies the SpyGlass Configuration file with the highest
priority.
See the Overview section of The SpyGlass Configuration File chapter.
-est_mode (Optional) Executes the EST mode rules only (which run on optimized
and techmapped netlist) and disables rules of CLASSIC and ESYNTH
mode.
-use_scan_flops (Optional) Enables SpyGlass to pick scan flops from the technology
library for mapping flops in the design.
When this switch is specified, SpyGlass gives priority to the scan flops
rather than normal flops in the technology library for mapping. If scan
cells are not present in the technology library, SpyGlass selects the
normal flops for mapping in the design.
The -use_scan_flops switch can be specified only when the -
est_mode switch is used or EST mode compatible rules are specified.
-preserve_mux (Optional) Enables SpyGlass to pick mux cells from the technology
library for mapping muxes in a user design.
When this switch is specified, SpyGlass gives priority to the mux cells
present in the technology library rather than a mux implementation in
terms of more basic cells from the technology library. If mux cells are
not present in the technology library, SpyGlass selects the mux
implementation in terms of more basic cells from the technology
library.
The -preserve_mux switch can be specified only when the -

est_mode switch is used or EST mode compatible rules are specified.
-esynth_mode (Optional) Executes the ESYNTH mode rules only (which run on
optimized netlist) and disables rules of CLASSIC and EST mode.
NOTE: SpyGlass displays an error message if you specify a combination of
-est_mode, -esynth_mode, or -classic_mode options.
NOTE: While running SpyGlass in -enable_save_restore mode along with any
of the -est_mode/-esynth_mode/-classic_mode option, it is recommended that
you specify different precomplile work directory (using the -lib WORK <WORK-
DIR> option) for each mode. If you do not specify a different precompile work
directory for each mode, SpyGlass may synthesize the design everytime you
run SpyGlass in a different synthesis mode and re-save the database for each
synthesis mode.
-enable_pass_exit_codes
(Optional) Causes SpyGlass to print more detailed exit status codes and
messages.
See SpyGlass Exit Status for more details.
-f (Optional) Specifies the session file(s) containing the command-line

options to be used for invoking SpyGlass.
A session file must be an ASCII file in which each option must be
specified in a separate line.
You can also add comments in any of the following formats:
• // format
• # format
• /* */ format
You can specify nested session files.
NOTE: If your filename includes wildcard characters (*, or ?), the name should
be enclosed in single quotes, and the wildcard characters should be preceded

by a backslash (\) to be treated as literal. For example, if your file name is

'abc*d', you need to refer to it as 'abc\*d'.
However, if you want to refer to two files, for example 'abc1d' and 'abc2d',
you can specify them using SpyGlass pattern matching support, that is, you
can specify "abc*d" in this case. For details on pattern matching support,
refer to the section, Pattern Matching Across Features.
You can continue a command-line to the next line using the backslash
(\) continuation character as in the following example:
...
-y \
./libdir
+libext+.v
...
The above specification is equivalent to the following:
...
-y ./libdir
+libext+.v
...
In some cases, you may need to specify numerous options, or name
many design files, in the same SpyGlass run. You may also want to run
SpyGlass repeatedly using the same information. To avoid re-entering
this information each time, which is tedious and time consuming, you
can create a text file that has multiple options and file names, with only
one option or file name per line. Then, when you run SpyGlass, use the
-f option to call this file.
You can also enter more than one -f option or specify multiple session
files with each -f option. This lets you set up more than one session
file to check different downstream environments in the same SpyGlass
pass. You can also use this option in the same command line with other
options.

To specify a session file at runtime

NOTE: SpyGlass expands file names specified with wildcards in a session file.
For example, file name such as *.vhd is interpreted at runtime.
To run a session file at runtime, enter the -f option. Any other options
required will depend on the contents of the -f file (it can contain all
command-line options required for a SpyGlass run if so desired).
For example, to run the session file myoptions from the directory
MYFILES, enter:
spyglass -batch -f MYFILES/myoptions -verilog design.v
where myoptions has the format shown below.
-LICENSEDEBUG (Optional) Prints the following license debug information on the screen
and in the SpyGlass log file, spyglass.log, in the given order:
• Values of ATRENTA_LICENSE_FILE and LM_LICENSE_FILE
The host IP(s) set in these variables are used to search for licenses.
NOTE: ATRENTA_LICENSE_FILE is given preference over
LM_LICENSE_FILE.

• License checkout start message followed by end message for each

license checked out
Here, the time elapsed during the checkout process is also printed.
This information is useful if the license checkout time needs to be
benchmarked.
In addition, the checkout server name (and server host id) is also
printed. This information helps in identifying the servers from where
various features have been checked out. On reviewing this data, you
may want to rearrange the settings in the
ATRENTA_LICENSE_FILE/LM_LICENSE_FILE variable to get
the features checkout from the nearest server(s), if the license
servers are geographically distributed, for quick turnaround time.
• Summary for the licenses that are checked out when policies are
being loaded in the initial stages of SpyGlass run. This information
is printed in the following order:
Total number of features successfully checked out
Total number of denied licensing calls
Total time between first and last licensing call
Total time elapsed in successful licensing calls
Total time elapsed in failed licensing calls
Total time elapsed in licensing calls
Here, some rules also checkout few licenses when they run. The
summary for such license checkouts will not be printed. However,
license checkout start and end messages are printed for these
licenses.
All the license debug information starts with ##LICENSEDEBUG:
to aid in quick scanning of license related debugging information.
-logfile (Optional) Sets the name and location of the SpyGlass log file.
By default, the log file name is spyglass.log and it is created in the

current working directory as specified with the -wdir command-line

option (default is the current directory).
When you specify the -logfile command-line, the SpyGlass log file
name and location are determined as follows:
• If the specified log file name is a simple file name (for example
mylog.txt), the log file will be created as mylog.txt in the current
working directory as specified with the -wdir command-line option
(default is the current directory).
• If the specified log file name is an absolute file path name (for
example /usr/john/logs/mylog.txt), the log file will be created as
mylog.txt in the /usr/john/logs directory irrespective of the -wdir
command-line option specification.
NOTE: The specified directory (the /usr/john/logs directory in the example)
must exist.
• If the specified log file name is a relative file path name (for
example myprojects/mylog.txt), the log file will be created as mylog.txt
in the myprojects directory under the current directory irrespective of
the -wdir command-line option specification.
NOTE: The specified directory (the myprojects directory in the example)
must exist under the current directory.
-lvpr (Optional) Specifies the maximum number of messages per rule for all
rules in the ruledeck or the maximum number of messages for the
specified rule.
SpyGlass lets you limit the number of messages that are saved in the
Violation Database for each rule using the -lvpr (limit messages per
rule) command-line option. This feature is helpful when errors are
difficult to identify because one or more rules are producing many of
the same error messages (for example, a name that is used frequently in
a design that violates the defined naming convention). The -lvpr
command-line option lets you limit the number of repetitions of an
individual rule message, which makes it easier to see the other errors.

You can also specify the maximum number of messages you want to
have recorded for any rule.
To limit recorded messages for a rule

To limit the number of messages recorded in the database for a specific
rule, use the following command-line:
spyglass -batch ... -lvpr <rule-name>=<num> ...
Where <rule-name> is the name of the rule for which you want to
limit the number of messages and <num> is the maximum number of
messages to be recorded.
For example, to limit the number of messages recorded for the
SigName rule of OpenMORE policy to 20, but keep an infinite limit
for all other rules checked in your Verilog design file, use the following
command-line:
spyglass -batch -verilog -policy=openmore
-lvpr SigName=20 ...
To limit recorded messages for all rules

To limit the number of messages recorded for all rules, enter the policy,
the -lvpr option followed by the limit on the number of messages
recorded, the language and the name of your design file.
For example, to limit the number of messages reported for any Lint
policy rule to 30 in your VHDL design file, use the following
command-line:
spyglass -batch -vhdl -policy=lint -lvpr 30 ...
NOTE: In this case, the equal (=) sign is not required.
To define more than one limit at a time

You can enter more than one instance of the -lvpr option to combine
rule limits.

For example, to set the maximum number of messages reported on any

OpenMORE rule to 20 and limit the messages recorded on the
SigName rule of OpenMORE policy to 10 in a VHDL design file, use
the following command-line:
spyglass -batch -vhdl -policy=openmore
-lvpr 20 -lvpr SigName=30 ...
NOTE: The maximum limit per rule (-lvpr SigName=30) overrides the
overall limit set (using -lvpr 20).
-noispy (Optional) .This option is same as the -nosch option except that the
module schematic is also not available in SpyGlass GUI with the
-noispy option.
Refer to the -nosch command-line option description for more details
-noreport (Optional) Suppresses report generation.

Use this option if you want to analyze the results separately (for
example in the SpyGlass Design Environment).
If you do not specify a report format, SpyGlass uses The moresimple
report, which is the default SpyGlass report. At times you might not
need any extensive report. For example, you might want only a quick
status check of your design to make sure no errors remain, or you might
prefer to analyze the errors using the SpyGlass Design Environment. In
such a case, you can tell SpyGlass to turn off all reporting.
To turn off reporting

To turn off all reporting, enter the -noreport option in the SpyGlass
command line followed by the language and name of your design file.
For example, to disable the report for your Verilog file test1.v, use the
following command-line:
spyglass -batch -noreport -verilog \
-policy=openmore test1.v

-nosch (Optional) Suppresses the generation of schematic data by rules, so

there is no schematic highlighting available in the SpyGlass GUI.
Please note that module schematic is still available, and only schematic
highlighting by rules is turned off by this option.
The SpyGlass GUI requires certain information to support the debug
environment. This information is automatically generated in the
<vdbfilename>_spysch directory during SpyGlass run. If you do not
want the rules to generate the schematic highlighting data, you can use
the -nosch option
Following are some cases where specifying the -nosch option can be
useful:
• When the schematic data is larger than the available disk space
• When the generation of schematic data is consuming a lot of time
• When you do not want to use the SpyGlass GUI for debugging
In general, schematic highlighting is a strong aid in debugging
messages, and with some improvements done in 4.2.0, it takes less disk
space and runtime. Therefore, it is not recommended to use this option,
unless schematic generation is becoming a bottleneck in your run.
You can use the schematic to debug combinational loops, clock domain
synchronization issues and so on, which typically cross module
boundaries.
--perflog (Optional) Specifies to generate the SpyGlass performance log.

You can generate a performance log when you specify the
--perflog command-line option (note the double ticks!). This
performance log is written to a file named spyglass.perflog in the current
working directory and has the memory/runtime details of each rule run.
In addition, the performance log also reports benchmark data for
various stages of SpyGlass run, like analysis, synthesis, flattening, etc.
-report (Optional) Specifies the report format type to be generated.

Then, the specified report type is generated and is written to a file

named <report-format-name>.rpt (default name) in the current working
directory (specified by the -wdir command-line option) or the current
directory.
You can save the report under a different file name using the -reportfile
NOTE: If you generate the same report again with the same settings, the
existing report file is overwritten by the new information.
NOTE: Use the -printreportformats option to list the standard
report formats available in your SpyGlass installation.
To specify a single report format at run time, use the -report
command-line option as in the following example:
spyglass -batch -vhdl -report summary -policy=lint \
mydesign.vhd
The above command requests SpyGlass to generate and save the
summary report on a VHDL file named mydesign.vhd as summary.rpt
file.
If you want reports in more than one format, use the -report
command-line option for each report format as in the following
example:
spyglass -batch -vhdl -report summary -report inline \
-policy=lint mydesign.vhd
The above command requests both the summary report and the inline
report on a VHDL file named mydesign.vhd.
-report_per_policy (Optional) Generates separate reports containing the messages for a

policy for each policy selected to run.
Following SpyGlass reports support report-per-policy feature:
1. simple
2. moresimple

3. inline
4. waiver
5. count
6. summary
Other reports (score, browse, more, emacs, vim, and tags reports)
remain unchanged as report-by-policy does not make much sense.
When you supply the -report_per_policy command-line option,
SpyGlass splits the specified report by policy and generates report files
named <report-name>_<policy-name>.rpt files (one per policy) where
each file contains the specified report <report-name> for the policy
<policy-name>.
For example, when you specify the following:
spyglass -report simple -report_per_policy
-policy=lint,starc,custom ...
Then, the following set of files are generated:
1. simple_lint.rpt
2. simple_starc.rpt
3. simple_custom.rpt
4. simple_spyglass.rpt
First three files contain the Lint policy, STARC policy, and custom
policy rule messages respectively and the last file has the built-in rule
messages.
You can also specify the -reportfile command-line option to change the
name of the generated report files. For example, when you specify the
following:
spyglass -report simple -report_per_policy
-policy=lint,starc,custom -reportfile mysimple ...
Then, the following set of files are generated:
1. mysimple_lint.rpt

2. mysimple_starc.rpt
3. mysimple_custom.rpt
4. mysimple_spyglass.rpt
If you specify the stdout argument with the -reportfile
command-line option, the generated reports are printed to the stdout as
if the following command is given:
%>cat simple_lint.rpt; cat simple_starc.rpt;
cat simple_custom.rpt; cat simple_spyglass.rpt
NOTE: The printing order of files can be different.
NOTE: The -report_per_policy command-line option has no impact
on policy-specific reports.
Special Case: Inline Report

By default, the inline report generates the following in the current
working directory:
1. An inline.rpt file that is concatenation of all design files with
messages embedded between HDL lines.
2. Directory named inline that contains individual inline reports (.rpt
files) for each design file.
For example, if you have specified two source design files — test1.v
and test2.v, then the inline directory will contain the test1.v.rpt file (has
test1.v contents with embedded messages) and the test2.v.rpt file (has
test2.v contents with embedded messages).
If you use the -report_per_policy command-line option with
the inline report as in the following example:
spyglass -report inline -report_per_policy
-policy=lint,starc ...
Then, the following are generated in the current working directory:

1. inline_lint.rpt (contains the concatenation of all design files with Lint

policy rule messages embedded between HDL lines
2. Directory named inline_lint that contains individual inline reports (.rpt
files) for each design file with only Lint Policy rule messages
embedded.
1. inline_starc.rpt (contains the concatenation of all design files with
STARC policy rule messages embedded between HDL lines
2. Directory named inline_starc that contains individual inline reports
(.rpt files) for each design file with only STARC Policy rule
messages embedded.
3. inline_spyglass.rpt (contains the concatenation of all design files with
SpyGlass Built-in rule messages embedded between HDL lines
4. Directory named inline_spyglass that contains individual inline
reports (.rpt files) for each design file with only SpyGlass Built-in
rule messages embedded.
-report_adjustment_waiver
(Optional) Causes the actual waived messages to be printed in the
Waiver report even when the -ignore argument of the waive
constraint has been specified.
By default, only the waived message count is reported in the Waiver
report when the -ignore argument of the waive constraint has been
specified.
These waived messages are printed in the Adjustments Waiver Report
section of the Waiver report.
-report_ip_waiver (Optional) Causes the actual waived messages to be printed in the

Waiver report when the -ip argument of the waive constraint has
been specified.
By default, only the waived message count is reported in the Waiver
report when the -ip argument of the waive constraint has been

specified.
These waived messages are printed in the IP/Legacy Waiver Report
section of the Waiver report.
-report_max_size (Optional) Specifies the maximum number of messages for sorted

reports (simple, moresimple, and waiver reports).
By default, the sorted report files may contain an unlimited number of
messages. SpyGlass reads the messages from the Violation Database
file and creates the selected sorted report.
To change the maximum number of messages sorted in a sorted report
(say to 60,000 message), specify the -report_max_size
command-line option as follows:
%> spyglass ... -report_max_size=60000 ...
--report_style (Optional) Enables you to customize the report format according to

your requirements. The <list-values> can take the following
values:
[flat | grouped] | [display_msgid | hide_msgid]
| [display_rulegroup | hide_rulegroup]
NOTE: You can specify only one option from each set of options (mentioned
above) in a given run.
The flat option displays the report in an ungrouped format.
The grouped option groups the content of the report (for example, by
templates).
The display_msgid option enables the display of the message
index column in the reports.
The hide_msgid option hides the message index column in the
reports.
The display_rulegroup option allows grouping of rule messages
in the reports by rule group.

The hide_rulegroup option disallows grouping of rule messages

by rule group in the report.
The default values of the --report_style option are grouped,
display_msgid, and hide_rulegroup.
If conflicting options are specified at the command-line,
--report_style=hide_msgid,display_msgid
then the last specified option is considered effective (in this example,
display_msgid is the last specified option).
Consider the following example that sets the --report_style
option as hide_msgid:
spyglass -batch -verilog --report_style=hide_msgid
test.v
-rulegroup_display_depth
(Optional) Enables you to specify the number of the subgroups to be
displayed in reports and message tree.
By default, the value of the -rulegroup_display_depth option
is set to 2. You can change this value to specify different number of
subgroups to be displayed.
If you specify the value of this option as 0 then all the subgroups are
displayed.
NOTE: The -rulegroup_display_depth option can be specified
only if the display_rulegroup option is used.
-reportfile (Optional) Sets the name and location of the SpyGlass report file
generated by the -report command-line option.
By default, SpyGlass generates a report file named
<report-name>.rpt in the current working directory. For example, if
you have specified the moresimple report using the -report
command-line option, the tags report will be saved as moresimple.rpt file
in the current working directory.

If you specify the -reportfile command-line option, the report file name
and location are determined as with the -logfile command-line option
To print the generated report to the stdout, use the stdout argument.
The argument is accepted in case-insensitive manner.
NOTE: If you generate the same report again with same settings, the existing
report file is overwritten by the new information.
To save message reports in a user-specified file

To save the SpyGlass reports in your own file, use the -reportfile
For example, to send results from the SpyGlass review of your file
design.vhd to the file myoutput, which you intend to edit later in vi, use
the following command-line:
spyglass -batch -reportfile myoutput -report simple \
-policy=openmore -vhdl design.vhd
-pragma (Optional) Specifies a prefix-string for synthesis directives.

For Verilog, the default pragma is set to synopsys, $s, and $S. For
VHDL, the default pragma is set to synopsys, $s, and $S, and
pragma.
It is likely that your design contains pragmas, which are runtime
commands for specific EDA tools embedded as comments in your
source code. For example, some pragmas SpyGlass recognizes during
the design synthesis step include translate_on/translate_off, full_case,
and parallel_case. SpyGlass also assumes by default that you are using
pragmas from Synopsys, rather than those of another vendor.
Here is an example of a Synopsys pragma that SpyGlass automatically
recognizes and interprets:
//synopsys full_case
The -pragma option lets you use the pragmas of other vendors. Note,

however, that if you use this option to define one or more pragma
families, the default pragma support no longer applies. You must
therefore include -pragma synopsys, -pragma $s, and
-pragma $S in your list of pragma families if you plan to use these
default pragmas along with the newly defined pragma sources.
If you do not plan to use pragmas in your design, you can use the
-pragma option with nopragma argument to turn off all pragmas
including the Synopsys default.
To use a single pragma family

To tell SpyGlass that you want it to recognize the pragma family of a
specific vendor, enter the -pragma option followed by the first word
of the specific pragma family and the language and name of your
design file.
For example, to have SpyGlass recognize the Quickturn pragma family
in all the files in directory PIC, enter:
spyglass -batch -pragma quickturn -verilog PIC/*.v
SpyGlass will then recognize the Quickturn pragmas:
//quickturn translate_off
//quickturn translate_on
To use more than one pragma family

You can enable more than one pragma family by entering additional
-pragma options on the command line. Follow each option with the
first word of a pragma family.
For example, to enable the Quickturn pragma family and the Synopsys
pragma family, enter:
spyglass -batch -pragma quickturn -pragma synopsys \
-policy=lint -verilog PIC/*.v

Here you need to re-enable the Synopsys pragma family because it is

no longer recognized by default once you define a new pragma family
(the Quickturn family in this case).
To ignore all pragmas

You can tell SpyGlass not to recognize any pragma families, including
the Synopsys default by entering the -pragma option followed by
nopragma.
For example, to turn off pragma recognition for all files in directory
PIC, enter:
spyglass -batch -pragma nopragma -verilog PIC/*.v
-pragma_varfile This switch will be deprecated in a future SpyGlass release.

SpyGlass reports a warning message if you specify this switch on
command-line.
Use the -waiver command-line option instead of pragma_varfile
switch to specify the file list containing the definitions of variables
specified in the SpyGlass pragmas.
-vdbfile (Optional) When specified with the -batch command-line option,

sets the name and location of the generated Violation Database file. By
default, the file name is spyglass.vdb and it is created in the current
working directory as set by the -wdir command-line option.
You cannot specify -vdbfile and -wdir command-line options
together. If you are specifying the -vdbfile name and also want to
set the current working directory, please specify the Violation Database
file path name (absolute or relative) that will be used to infer the
current working directory. For example, the following command-line
sets the Violation Database file name to errors.vdb and the current
working directory to the /usr/john/myprojects/atrenta directory:
spyglass -batch -vhdl \

-vdbfile /usr/john/myprojects/atrenta/errors.vdb \
-policy=openmore design.vhd ...
The /usr/john/myprojects directory path must exist. SpyGlass would
create the atrenta directory under it if it does not exist.
When the -batch command-line option is not specified, specifies the
Violation Database file to be opened in the SpyGlass Design
Environment. All other command-line options are then ignored.
As SpyGlass checks your design, it records messages in a file named
spyglass.vdb. The report generators use this file to produce the message
report.
You may want to store messages in a different file or location. Use the
-vdbfile command-line option to specify a different file or location
for the Violation Database. Once you redefine the Violation Database,
the report generators will work with this database rather than the
default.
For example, to have SpyGlass log messages detected in the file
design.vhd in the database file errors.vdb, use the following command-
line:
spyglass -batch -vhdl -vdbfile errors.vdb \
-policy=openmore design.vhd
NOTE: When you invoke SpyGlass with only the -vdbfile option
(assuming that the .vdb file exists), this means that you are invoking SpyGlass
for debugging the violations or generating reports. Therefore, the SpyGlass
Design Environment will open without any error message. However, if you
specify the -vdbfile option along with any other option, for example,
-reportfile, this means that SpyGlass is being invoked for a another re-
run. In such cases, the Violation Database file is not loaded and a message
appears at the command-line prompting you to specify the language.
-w (Optional) Turns on generation of warnings for PERL-level

compilation and the SpyGlass checker's activities.
If you find problems when running SpyGlass, such as a rule failing,

you can get more information about these problems by specifying the
-w (warning) option and running SpyGlass again. The warning option
allows SpyGlass to display more details while running, identifying
each rule as it is checked. With this feature, you can easily identify the
failing rule, since it will be the last rule listed before the error message.
Once you have identified the rule causing the problem, you can exclude
it using the -ignorerules option. This lets you continue analyzing
your design while the specific rule problem is being fixed.
NOTE: If for some reason, there is a problem in the SpyGlass environment, it is
sometimes difficult to reproduce the problem outside of your company without
the design files. These may however be so confidential that it is impossible to
make them available, even with a non-disclosure agreement. In order to
provide as much debug information as possible without the design files,
SpyGlass supports a -DEBUG option. This saves information about what
processes SpyGlass was running at the time of the problem, allowing Atrenta
development to gain additional insight into the problem. This information is
stored by default in a spyglass.log file in the working directory, although this
can be changed using the -logfile option. You should send this file to
Atrenta Customer support when reporting the problem.
To increase runtime warnings

To see more details during a SpyGlass run and identify problems,
specify the -w option, together with all the normal options you may be
using.
For example, enter:
spyglass -batch -w -verilog -policy=lint design.v
-wdir (Optional) Specifies the output directory for SpyGlass if you would
like SpyGlass output to be generated at a location different from the
Then, the SpyGlass output (SpyGlass schematics, Violation Database
file, Log file, and Reports files) will be written to this new path.

You cannot specify -wdir and -vdbfile command-line options

together. If you are specifying the -wdir command-line option, the
SpyGlass Violation Database file will be named spyglass.vdb and will
be created in the directory specified with the -wdir command-line
option.
Another application of the -wdir command-line option is to run
SpyGlass from a read-only area and create the output files in another
location.
If you do not specify this option, SpyGlass uses the current directory as
the output directory.
NOTE: The Verilog/VHDL pre-compiled libraries are always controlled by the
-lib specification only.
SpyGlass produces a number of different output files when it runs,
including the Violation Database file, the log file and files for creating
the schematics of the synthesized design for use in the SpyGlass
Design Environment (these are stored in a hidden directory
<vdbfilename>.spysch). By default, all of these files are stored in the
current directory from where SpyGlass was invoked.
It is possible to change the storage location of these output files using
the -wdir option.
To change the current working directory

To have all SpyGlass output files stored in a different location from the
current context, enter the -wdir option followed by the path to the
new working directory, followed by the language, policy to be checked,
name of the design and any other desired options.
For example, to direct SpyGlass to store output files in directory mydir,
enter:
spyglass -batch -wdir ../mydir -vhdl design.vhd
--write_vdb_reports_in_wdir

(Optional) Causes the SpyGlass reports including policy reports to be

created in the current working directory.
All SpyGlass reports (including policy reports) that were earlier created
in the current working directory are now created in the
<vdb-name>_reports directory under the current working directory.
Use the --write_vdb_reports_in_wdir command-line option
to revert to original behavior.
-enable_sgdc_debug
(Optional) Causes SpyGlass to generate the debug_sgdc report under
the directory, spyglass_reports/SpyGlass.
The debug_sgdc report contains decompiled SGDC commands with
back reference information. You can generate this report by specifying
the -enable_sgdc_debug option on command-line.
NOTE: The debug_sgdc report is available only in the batch mode. It cannot be
generated from the SpyGlass Design Environment.
-cell_library (Optional) Causes SpyGlass to skip rule-checking on design units

(Verilog/VHDL) that are loaded from the precompiled libraries
specified by this command-line option. However, such units are
synthesized by SpyGlass.
For example, consider that you have four precompiled libraries, L1,
L2, L3, and L4, and suppose that you want to skip rule-checking on
design units loaded from the libraries, L2 and L4. To do so, specify the
following command:
-cell_library L2,L4
-enable_const_prop_thru_seq
(Optional) Allows constant propagation beyond sequential elements
during logic simulation.
By default, constant propagation stops at sequential elements.

NOTE: The enable_case_anal_seq_prop option has been

renamed to enable_const_prop_thru_seq.
-use_goal_rule_sort
(Optional) Sorts violation messages in the moresimple report based on
the order of rules specified in the goal file.
-enable_save_restore_builtin
(Optional) Displays builtin messages (parsing, elaboration, and
synthesis) during restore run that were reported during the save run.
SpyGlass saves builtin messages (parsing, elaboration, and synthesis)
reported during save run as a part of the saved design database. To view
these messages during the restore run, specify the
enable_save_restore_builtin option.
For details, refer to the Handling Built-in Messages during Save-
Restore Flow topic.
-dump_precompile_builtin
(Optional) Enables SpyGlass to save parsing-related builtin messages
while creating a precompiled RTL dump. These messages are stored as
a part of that RTL dump and can be restored while using precompiled
dump by using the -hdllibdu option (messages are restored by default
for encrypted design units unless option -
disable_encrypted_hdl_checks option is specified).
For details, refer to the Handling BuiltIn Messages While Using
Precompiled Dump topic.
-show_sdc_progress
(Optional) Shows the SDC parsing progress bar on standard output
during SDC parsing.

PERL-related Options
PERLOptions::=
[ -I<dir-name> ]
-I (Optional) Specifies the directories that may contain additional files

like customized ruledeck files, customized SpyGlass-compatible
library files (.spyso files) etc.
SpyGlass first attempts to locate the additional files in the directories
specified by the –I option, before searching in default locations (for
example, <your-inst-dir>/SPYGLASS_HOME/lib and <your-inst-dir>/
SPYGLASS_HOME/auxi).
You can specify multiple directories, which are searched in the same
order as they are specified.
This option also adds the specified directories to
LD_LIBRARY_PATH/SHLIB_PATH environment variables that
define the location from where the shared objects are loaded.
NOTE: If your directory name includes wildcard characters (*, or ?), the name
should be enclosed in single quotes, and the wildcard characters should be
preceded by a backslash (\) to be treated as literal. For example, if your
directory name is 'abc*d', you need to refer to it as 'abc\*d'.
However, if you want to refer to two directories, for example 'abc1d' and
'abc2d', you can specify them using SpyGlass pattern matching support, that
is, you can specify "abc*d" in this case. For details on pattern matching
support, refer to the section, Pattern Matching Across Features.
NOTE: You can use white space between -I and the directory name.
When you start SpyGlass, it searches the default directory (<your-inst-
dir>/SPYGLASS_HOME/auxi) for its boot file, spyboot.pl. The sole
purpose of this Perl script is to provide a starting point to search for the
actual startup script, the SpyGlass default control file spyglass.pl.
SpyGlass also looks in another default directory (<your-inst-dir>/
SPYGLASS_HOME/policy) to find the available policies (all files with the

filename *-policy.pl).
Using the -I option, however, you can redefine the path to the Perl
script directory and the policy directory, and have SpyGlass start
looking for its files in your custom path first. Whatever is defined using
the -I option is prefixed to the already defined default search path.
SpyGlass also looks in your directory first to find any subsequently
referenced files not qualified by full paths. Similarly, it uses your
directory as a starting point for relative path references.
To change the default file-search path

To change the path to the directory where SpyGlass begins file
searches, enter the -I option followed by the path to your directory,
followed by the language and name of your design.
For example, to tell SpyGlass to start the search in the directory
myperlfiles for its startup files, subsequent file references and also a
custom policy called mypolicy, enter:
spyglass -batch -I/mypath/myperlfiles -vhdl \
-policy=mypolicy design.vhd
Multiple directories can be specified with multiple -I arguments. Each
argument is prefixed to the existing search path.
For example, to tell SpyGlass to search mydir1 followed by mydir2
before searching the default search path, enter:
spyglass -batch -I/mydir2 -I/mydir1 -vhdl \
-policy=lint design.vhd
HDL Common Options

HDLCommonOptions::=
[ -dump64bit ]
[ -dw ]
[ -enable_hdl_encryption ]
[ -enable_save_restore

[ -dbdir <dir> ]
[ -force_save ]
[ -savepolicies <policy-name-list>
| -savepolicy <policy-name> ]
[ -nosavepolicies <policy-name-list>
| -nosavepolicy <policy-name> ]
[ -skip_rules_for_fast_restore ] ]
[ { -gateslib <lib-file> } ]
[ -enable_sglib_debug ]
[ -gen_hiersgdc ]
[ -handlememory ]
[ -hdllibdu ]
[ -lef <file-name>]
[{ -lib <logical-lib-name> <physical-lib-name> } ]
[{ -plib <plib-filepath-list> } ]
[ -define_incr_dirmap <value1> <value2> ]
[ -mthresh <number> ]
[ -nobb ]
[ -nopreserve ]
[ { -param {<key=value>} } ]
[ -remove_work ]
[ -sdc2sgdc ]
[ -sdc2sgdcfile <file-name> ]
[ -sdc2sgdc_mode <mode-name> ]
[ -mapVirtualClkByName = <yes | no> ]
[ -mapSuffixList <suffix-names> ]
[ { -sgdc <file-name> } ]
[ { -sglib <sglib-name> } ]
[ --sgsyn_loop_limit <value> ]
[ --sgsyn_enable_latch_removal ]
[ -stop <du-name> ]
[ -stopdir <dir-name> ]
[ -stopfile <file-name> ]
[ -support_sdc_style_escaped_name ]
[ -testsynth ]
[ -top <name-list> ]
[ -validate_hiersgdc ]
[ { -waiver <file-name> } ]

[ { -filter <file-name> } ]
[ -work <dir-name> ]
[ -noelab ]
[ -checkip ]
[ -checkdu ]
[ -disable_encrypted_hdl_checks ]
[ -macro_synthesis_off ]
[ -write_sdc ]
[ -debug_proc ]
[ -net_osc_count_limit <limit> ]
[ -nodefparam ]
[ -sgsyn_clock_gating ]
[ -sgsyn_clock_gating_threshold <num> ]
[ -target <lib-name-list> ]
-add_hdllibdu_lexical_checks
This command-line option has been deprecated. You can enable lexical
rule-checking on precompiled design units by specifying the -hdllibdu
-dbdir (Optional) Specifies the design save directory when working in the
Design Save/Restore mode.
By default, the design is saved in (and later restored from) a directory
named spyglass.db under the current working directory. You can
specify a different location using the -dbdir command-line option.
You can specify an absolute path name or a relative path name.
If you have used the -dbdir command-line option during design
save, you MUST specify the -dbdir command line option during
design restore also with the correct design save directory name.
NOTE: The -dbdir command-line option works only when the
-enable_save_restore command-line option is also specified.

-dump64bit (Optional) Causes SpyGlass to create the 64-bit version of the pre-
compiled HDL sources also while creating the 32-bit version on a 32-
bit architecture machine.
a 32-bit architecture machine by using the -dump64bit command-
line option.
NOTE: The -dump64bit command-line option has been deprecated. Use
the -dump_all_modes command-line option instead.
-dump_all_modes (Optional) Causes SpyGlass to create both 32-bit and 64-bit versions of
the pre-compiled HDL sources irrespective of the architecture.
-dw (Optional) Enables DesignWare component support.

See Working with Designs using DesignWare Components for more
details.
-enable_hdl_encryption
(Optional) Enables encryption of VHDL/Verilog libraries during
compilation.
See Encrypting Compiled VHDL Design Units and Encrypting
Precompiled Verilog Design Units for details.
By default, the encryption feature is disabled.
NOTE: When you specify the -enable_hdl_encryption
command-line option, a precompile dump is created on both 32-bit and 64-bit
platforms irrespective of the platform on which SpyGlass is run. By default, the
-dump_all_modes command-line option is turn on with the
-enable_hdl_encryption command-line option.
-enable_save_restore
(Optional) Enables the Design Save/Restore feature. See Saving and
Restoring Designs for more details.

-enable_sglib_debug
(Optional) Causes SpyGlass to generate the debug_sglib and
sglib_version_summary reports.
NOTE: The -enable_sglib_debug option can only be used with the -
sglib option.
The debug_sglib report contains the inferred functionality for each gate
that was successfully synthesized by the SpyGlass Library Compiler.
The sglib_version_summary report lists the enhancements made in the
subsequent SpyGlass library compiler releases starting from the oldest
version of the library files used in the current SpyGlass run. If all the
used library files were compiled using the current version, then this
report will not be generated.
To generate the report, specify the -enable_sglib_debug
NOTE: The debug_sglib report is only available in the batch mode; it cannot be
generated from the SpyGlass Design Environment. However, in SDE you can
add this option in the Other Tab of the Options window and invoke the
SpyGlass run. On completion of the run, you can view the generated report by
double-clicking the message of the rule ReportSglibSummary.
NOTE: You must recompile your gates library files with SpyGlass 3.8.2 or
higher to generate the debug_sglib report.
-force_save NOTE: This option will be deprecated in SpyGlass 4.3 release.

Now, in the event of design restore fails, SpyGlass does not ask the user
to force save the design. Instead, it automatically force saves the design
on its own.
If you specify the -force_save option in command-line, SpyGlass
flags an Info message specifying that this switch will be deprecated in
SpyGlass 4.3 release.
-gateslib NOTE: The -gateslib command-line option has been superseded by the -

sglib command-line option.

(Optional) Specifies the gates library files to be loaded.
If your design has instantiated gates (cells), you need to tell SpyGlass
how to interpret them for connectivity analysis. Most of your design
may be at the RTL level, but at the same time it may have directly
instantiated gates from the technology library you are targeting.
Alternatively, you may wish to run checks on a gate-level netlist.
SpyGlass normally treats gates as blackboxes during analysis and does
not attempt to analyze their internals if the content has not been
defined. You can, however, describe their content in the Synopsys
Liberty™ format library files (normally .lib files) that are un-compiled
(plain text format). Then, when you run SpyGlass, specify the name of
the library or libraries to SpyGlass using the -gateslib option.
SpyGlass interprets the structure and parametric data of the instantiated
gates using the library information.
NOTE: The actual interpretation may be limited or incorrect for complex cells.
Also, the SpyGlass Logic Evaluator engine (mainly used by the SpyGlass DFT
policy) does not work for libraries specified with the -gateslib command-
line option.
To specify a library of instantiated gates to SpyGlass, enter the
-gateslib option followed by the path to your library, plus the
language and name of your design file.
For example, to tell SpyGlass to analyze the gates library mygates.lib
(where mygates.lib is a Synopsys Liberty-format file), enter:

spyglass -batch -gateslib mygates.lib

-verilog -policy=erc mydesign.v
SpyGlass also supports multiple Synopsys Liberty Format (SLF)
libraries. Multiple libraries, for example, mygates1.lib and mygates2.lib,
can be specified using any of the following command-line methods:
Method 1 (using multiple -gateslib options)
spyglass -batch -gateslib mygates1.lib \
-gateslib mygates2.lib -verilog
-policy=erc mydesign.v
Method 2 (using a single –gateslib option with a space-separated
list of library names within double quotes)
spyglass -batch -gateslib “mygates1.lib mygates2.lib” \
-verilog -policy=erc mydesign.v
You can also combine the above two methods and specify them as a
single command-line option. For example, you can specify the libraries
a.lib, b.lib and c.lib as follows:
spyglass -batch -gateslib “a.lib b.lib” \
-verilog -policy=erc mydesign.v –gateslib c.lib
NOTE: If you are using the Library Translation feature (lib2RTL) to translate
gate libraries, you must remember to specify these libraries for analysis also
using the -gateslib command-line option.
-gen_hiersgdc (Optional) Enables the hierarchical migration of block-level SGDC

commands to the chip-level. See Creating Hierarchical SGDC File
section for more details.
-handlememory (Optional) Specified to process memories in an optimized manner.

See The Memory Reduction Feature for more details.
NOTE: The handlememory option is ignored (for individual memories only), if
the memory size is less than the specified mthresh value.
NOTE: You can also use the AUTOENABLE_MEMORY_HANDLING

configuration setting to enable this feature.
-hdllibdu (Optional) Causes SpyGlass to perform RTL and lexical rule-checking

on pre-compiled Verilog/VHDL design units that are directly or
indirectly instantiated in the design being processed.
By default, this command-line option is turned off, and SpyGlass does
not perform RTL and lexical rule-checking on pre-compiled Verilog/
VHDL design units.
NOTE: You can disable lexical rule-checking on pre-compiled Verilog/VHDL
design units by specifying the -disable_hdllibdu_lexical_checks command-line
option.
-lef (Optional) Specifies the LEF files as input to SpyGlass to provide

additional information about the power and ground pins of the cells
present in the library files specified by the -gateslib command-line
option.
NOTE: The -lef command-line option is used by the Low Power and Power
Estimation policies only.
The -lef command-line option requires either of -gateslib or -sglib
command-line options specified along with it.
For Low Power policy, it is mandatory to use the -lef option with the
-enable_pgnetlist command-line option to enable the
processing of the specified LEF files. However, for Power Estimation
policy, the -lef option should NOT be used with the

-enable_pgnetlist command-line option.
-lib Defines the logical to physical mapping for referenced libraries.

NOTE: The physical location must be an existing directory.
Precompiled VHDL Libraries

The SpyGlass VHDL environment comes with the following pre-
compiled libraries:
• IEEE
• STD
• SYNOPSYS
By default, these libraries are visible SpyGlass.
VHDL also requires a working library into which the design units need
to be compiled. SpyGlass assumes by default it will find this working
library in the WORK directory in the current context.
If you create your own library directory so you can use other libraries
in your HDL design, or if you define a different name for the working
library, you need to tell SpyGlass how to locate them. You do this with
the -lib option.
NOTE: Before they can be used in a SpyGlass analysis, VHDL libraries must
be compiled into a SpyGlass format (which is architecture-specific — 32-bit or
64-bit).
To compile a VHDL library in the SpyGlass environment, you must tell
SpyGlass the name of the working directory into which the library is to be
compiled (using the -work option), the physical location of this library (using
-lib to set the logical to physical mapping), and the names of the VHDL files
to be compiled. If the libraries are fully debugged, there should be no need to
run SpyGlass rule checks on them and the -norules option should also be
used.
For example, to compile the math package (consisting of math_pkg.vhd and
math_pkb.vhd) into a library called MATH and located in the directory ../lib/

MATH, enter:
spyglass -batch -vhdl -sort -lib MATH ../lib/MATH \
-work MATH -norules math_pkg.vhd math_pkb.vhd
run. For example, if the MATH library compiled above is used in
design.vhd, enter:
spyglass -batch -vhdl -lib MATH ../lib/MATH \
-policy=lint design.vhd
Mapping VHDL libraries
To tell SpyGlass where to find a VHDL library, you must map the
library’s logical name (the name used in your HDL design) to its actual
physical location (the directory where the compile library is stored).
You can do so using the -lib option.
In case of incorrect library path specifications, SpyGlass behavior is as
follows:
1. If a library path is not specified and the library is used only in the
use clause and not used in any design unit, then SpyGlass generates
a warning message and continues. If the library is being used in a
design unit, then SpyGlass generates additional error message and
may abort depending on the criticality of library usage.
2. If the library path does not exist, then SpyGlass generates an error
message and aborts before analysis. This is irrespective of whether
the specified library is used or not.
NOTE: The 32-bit version of user-compiled libraries are created in a
sub-directory named 32 under the specified working directory. The 64-bit
version of user-compiled libraries are created in a sub-directory named 64
under the specified working directory.
To map a single logical name to a single physical location
To map a single logical library name to its physical location, enter the
-lib option followed by the logical name, the path to its physical
location, -vhdl, the policy, and your design file.

For example, to map the VHDL library named alu to the physical
directory mylibs, enter:
spyglass -batch -lib alu ~libs/mylibs \
-vhdl -policy=openmore mydesign.vhd
To map multiple logical names to multiple physical locations
You can map multiple VHDL libraries to their physical locations by
entering more than one -lib option in a single SpyGlass command
line.
For example, to map the NEW and MATH libraries to their physical
VHDL files, enter:
spyglass -batch -policy=lint -lib NEW ~libs/new \
-lib MATH ~/libs/math -vhdl design.vhd
To map multiple libraries located in one location
You can map multiple VHDL libraries located in a single location using
the others argument of the -lib command-line option. Thus, you
do not need to provide individual -lib specifications for each library.
Consider an example where you need to map one project-specific
library (say PROJLIB located in the ~lib/projectlibs directory) and
multiple company-specific libraries (say MAINLIB1, MAINLIB2 and
so on located in the ~lib/mainlibs directory). You can map all libraries as
follows:
spyglass -batch -vhdl -lib PROJLIB ~lib/projlibs
-lib others ~lib/mainlibs
NOTE: If you map a single logical library to multiple physical locations, the last
specified location is used.
Precompiled Verilog Libraries

To tell SpyGlass where to find a pre-compiled Verilog library, you must
map the library’s logical name (the name used in your HDL design) to
its actual physical location (the directory where the compile library is

stored). You can do so using the -lib option.

To map a single logical name to a single physical location
To map a single logical library name to its physical location, enter the
-lib option followed by the logical name, the path to its physical
location, language option (-verilog or -mixed), the policy, and
your design file.
For example, to map the Verilog library named alu to the physical
directory mylibs, enter:
spyglass -batch -verilog \
-lib alu ~libs/mylibs -policy=openmore mydesign.v
spyglass -batch -mixed \
-lib alu ~libs/mylibs -policy=starc mydesign.v
To map multiple logical names to multiple physical locations
You can map multiple Verilog libraries to their physical locations by
entering more than one -lib option in a single SpyGlass command
line.
For example, to map the NEW and MYLIB libraries to their physical
Verilog files, enter:
-policy=lint -lib NEW ~libs/new \
-lib MYLIB ~/libs/MYLIB design.v
To map multiple libraries located in one location
You can map multiple Verilog libraries located in a single location
using the others argument of the -lib command-line option. Thus,
you do not need to provide individual -lib specifications for each
library.
Consider an example where you need to map one project-specific
library (say PROJLIB located in the ~lib/projectlibs directory) and
multiple company-specific libraries (say MAINLIB1, MAINLIB2 and
so on located in the ~lib/mainlibs directory). You can map all libraries as
follows:


-lib PROJLIB ~lib/projlibs -lib others ~lib/mainlibs
NOTE: If you map a single logical library to multiple physical locations, the last
specified location is used.
-plib (Optional) Specifies the plib format files.

When you specify the plib format files using the -plib command-line
option, you must also specify .lib files and .sglib files using the -gateslib
or -sglib command-line options.
The -plib command-line option requires either -gateslib or -sglib
command-line options to be specified with it. To enable the processing
of the specified plib files, the -enable_pgnetlist command-line
option should be specified.
NOTE: The -plib command-line option is used by the Low Power policy
only.
-define_incr_dirmap
(Optional) Provides mapping for different locations of RTL files. It is
used by the incremental algorithm to find if the RTL files in the current
run are the same as the RTL files in old SpyGlass run with respect to
the incremental analysis that is being performed.
The -define_incr_dirmap option takes two input values.

-mthresh (Optional) Specifies the bit-count threshold for the compilation of net/
variables in a design unit.
If the individual net/variable size (bit-count) is more than the specified
threshold, the module is not compiled and is treated as a blackbox and
the SYNTH_ERROR[5273] is flagged. To solve the problem, specify
the threshold value greater than or equal to the value displayed in the
error message. However, please note that this higher value may not be
feasible due to system memory size limitations.
NOTE: If handlememory option is specified the individual memory size is
reduced memory size.
The default setting is 4K bits.
-nobb (Optional) Forces SpyGlass to exit without processing if any blackbox

is found in the design.
By default, SpyGlass allows blackboxes to be passed in the design.
-nopreserve (Optional) Forces SpyGlass to remove hanging/unconnected instances

and nets.
The SpyGlass RTL synthesis engine normally retains hanging nets
(open ended interconnections among logic gates) and hanging/
unconnected instances. If you want to remove these instances and nets
in your design in order that the result matches that of your main
synthesis engine, you can do so by supplying the -nopreserve
option. Preserving all instances and nets makes it easier for you to
relate inferred logic back to your source code.
-param (Optional) Sets the new user-specified values of the VHDL generics
and Verilog parameters.
If there are more than one generic or parameter with the specified
name, the values of all such generics or parameters are set to the
specified value.

You can specify the key name in entity-name.generic-name

format for VHDL or in module-name.parameter-name format
for Verilog. The names are case-insensitive for VHDL generics and
case-sensitive for Verilog parameters.
In a normal design hierarchy, it is possible to define parameterizable
design units, where the value of the parameter (in Verilog) or generic
(in VHDL) is defined when the design unit is instantiated in the
hierarchy. If you then choose to run SpyGlass from the top of the
parameterizable design unit, this value is obviously not visible to
SpyGlass. In order to be able to define a value for each parameter or
generic, you can use the -param command-line option.
However, it may happen that the generic/parameter has been re-defined
at module instantiation. In this case, the value specified during module
instantiation is given preference over the -param switch. For
example, consider the following code (line numbers are also
highlighted):
module sr(srin, clk, srout);
1. parameter SIZE1 = 8;
2. input srin, clk;
3. output srout;
4. reg [SIZE1:0] sr, srout;
5. integer i;
6. always @(posedge clk)
7. for ( i = 0 ; i < SIZE1 ; i=i+1 )
8. if ( i==0 ) sr[i] <= srin;
9. else if ( i < SIZE1-1 ) sr[i] <= sr[i-1];
10. else
11. srout <= sr[i-1];
12. endmodule
13. module srtop(in, clk, out);
14. input in, clk;
15. output out;
16. sr #(32)__sr1(.srin(in),.clk(clk),.srout(out));
17. sr __sr2(.srin(in),.clk(clk),.srout(out));
18. endmodule

In line 16 of the above example, the value, 8, of the parameter, SIZE1,

is overridden with the value 32. However, for the functionality
specified in line17, following cases may arise:
• If the -param command-line option is specified, SpyGlass
overrides the value, 8, of the parameter, SIZE1, with the specified
value.
• If the -param command-line option is not specified, SpyGlass
retains the value, 8, of the parameter, SIZE1.
To define a value for a generic/parameter

To set a value for a parameter, you must specify the instance of the
parameter you wish to define together with the value you wish to set. In
VHDL, this means the entity_name.generic_name, while in
Verilog it means the module_name.parameter_name.
For example, to set the VHDL generic width in entity control to 8,
enter the following as part of the SpyGlass invocation:
-param control.width=8
To set the Verilog parameter limit in module block1 to 4, enter the
following as part of the SpyGlass invocation:
-param block1.limit=4
-remove_work (Optional) Causes SpyGlass to delete the contents of the WORK

directory (based on the -work command-line option) and recompiles all
design units in the design.
By default, SpyGlass creates the WORK directory if it does not exist. If
the specified directory already exists, SpyGlass recompiles the required
design units (all or some) in this directory.
When you specify the -remove_work command-line option,
SpyGlass removes all contents of the WORK directory and recompiles

all design units even if some of the existing precompiled design units
did not need recompilation.
When working in the 32-bit mode, the -remove_work command-
line option causes SpyGlass to remove/recompile only the 32-bit
version of the precompiled design units. Similarly, SpyGlass removes/
recompiles only the 64-bit version of the precompiled design units
when working in the 64-bit mode. However, if you specify the -
dump64bit command-line option while working in the 32-bit mode,
SpyGlass also removes/recompiles the 64-bit version of the
precompiled design units, if present.
When you save a design view using the -enable_save_restore
command-line option and also specify the -remove_work
command-line option, you would need to specify the -remove_work
command-line option during design restore also. However, the
-remove_work command-line option is ignored during the full
restore mode (all rules are of Rule Type 1 as described in Saving and
Restoring Designs).
-savepolicy/-savepolicies
(Optional) Specifies the policy (-savepolicy) or a list of policies
(-savepolicies) that are not run during design save but can be run
during design restore.
during the design save and then run any subset of these policies during
design restore. All the base polices and the four advanced policies, that
is, constraints, DFT, LowPower, and Txv, are saved by default. In
addition, the design view related to the policies being used, which are
specified directly by using the -policy/-policies command-line
option or indirectly through templates, is also saved. You can further
specify additional policies to be saved during the design save by using
the -savepolicy/-savepolicies command-line option so that
these policies are not run during design save but can be run during
design restore.

For more details on Design Save-Restore feature, refer to the section,

Saving and Restoring Designs.
NOTE: To save all the base policies, specify the value of this option as
basepolicy.
NOTE: The -savepolicies command-line option works only when the
-enable_save_restore command-line option is also specified.
NOTE: The -savepolicies command-line option is ignored during the
design restore mode.
-nosavepolicy/-nosavepolicies
(Optional) Specifies the policy (-nosavepolicy) or a list of policies
(-nosavepolicies) that should not be saved during design save.
during design save and run any subset of these policies during design
restore. All the base polices and the four advanced policies, that is,
constraints, DFT, LowPower, and Txv, are saved by default. In
addition, the design view related to the policies being used, which are
specified directly by using the -policy/-policies command-line
option or indirectly through templates, is also saved. If you do not want
to save certain policies, specify those policies by using the
-nosavepolicy/-nosavepolicies command-line option.
NOTE: The -nosavepolicies command-line option works only when
the -enable_save_restore command-line option is also specified.
NOTE: The -nosavepolicies command-line option is ignored during
the design restore mode.
-sdc2sgdc (Optional) Enables the SDC-to-SGDC translation feature of SpyGlass.

See SDC to SGDC Translation for details of SDC-to-SGDC translation.
If the -sdc2sgdc command-line option is specified, then SpyGlass
translates the design attributes from SDC format to SGDC format,
which are then used during SpyGlass analysis.

By default, the output of SDC-to-SGDC translation is saved in the file

named sdc2sgdc_<mode>.sgdc.<pid> in the $CWD/<vdb-
name>_reports/sdc2sgdc directory.
-sdc2sgdcfile (Optional) Specifies the file to save the output of SDC-to-SGDC

translation. See SDC to SGDC Translation for details of SDC-to-SGDC
translation.
If the file specified by the -sdc2sgdcfile command-line option
already exists, then SpyGlass overwrites the existing file.
-sdc2sgdc_mode (Optional) Specifies the mode of the SDC file to be translated to

SGDC.
Consider an example in which you specify two different modes in the
input sgdc constraints file, as shown below:
sdc_data -file one.sdc -mode one
sdc_data -file two.sdc -mode two
Now, if you specify the command, sdc2sgdc_mode=one, then only
the sdc data given under mode=one would get translated. As a result,
only the one.sdc file would get converted into sgdc.
Refer to the SDC to SGDC Translation topic for details on
SDC-to-SGDC translation.
-mapVirtualClkByName
(Optional) Specifies the manner in which virtual-to-real clock mapping
should be done.
Set the value of this option to no for finding clocks in the fanin/fanout
of output/input delays by matching the clock characteristics, that is,
period, waveform, followed by name-mapping.
Set this option to yes for name mapping only.
By default, SpyGlass considers the value as no.

-mapSuffixList (Optional) Specifies parameter to give the list of suffix strings.

You can specify the value of this command-line option as a list of
strings that are used for name-mapping. For example, if you specify
-mapSuffixList ="virtual" then CLKA_virtual maps to
CLKA.
If this option is not specified or if none of the real clocks satisfies the
matching criteria for the concerned virtual clock name, no mapping is
done, but still virtual clocks are dumped though with their actual names
only.
-sgdc (Optional) Specifies the design constraints file for policies that support
design constraints. See Using SpyGlass Design Constraints for details
of SpyGlass Design Constraints.
Also, see the -waiver command-line option.
-sglib (Optional) Specifies the SpyGlass-compatible format files (.sglib

files).
Refer to the section, Pre-compiling and Using Gate Libraries, for more
details.

--sgsyn_loop_limit (Optional) Specifies the loop rolling limit during design synthesis.
By default, the loop unrolling limit is set to 2048. When a loop is not
completely rolled in the specified number of iterations, SpyGlass marks
the module as un-synthesizable.
--sgsyn_enable_latch_removal
(Optional) Enables better latch detection and removes redundant
latches.
When you specify this command-line option, SpyGlass checks if the
enable pin of the latch is driven by VCC. If yes, then SpyGlass replaces
such a latch with a buffer.
NOTE: This optimization results in an increased runtime for synthesis.
-skip_rules_for_fast_restore
(Optional) Causes the rules that require design’s re-parsing and/or re-
synthesis to be skipped during design restore. See Saving and Restoring
Designs for more details.
Depending on the selected rules’ characteristics, SpyGlass may not be
able to work with saved design view and hence unchanged design’s re-
parsing and/or re-synthesis may be required. You can skip such rules by
specifying the -skip_rules_for_fast_restore command-
line option.
Consider an example in which you run the template, Initial_RTL/
Ensure_RTL_Block_is_simulation_ready/Connectivity, and save the
design by specifying the -enable_save_restore switch.
In the second SpyGlass run, if you specify the same command-line
options as in the first run, you would see the following message:

WARNING [237] Following rules can not run on

restored design database. Hence, HDL being re-read:
W110
STARC05-2.1.3.1
Here, SpyGlass re-reads the design, runs the W110 and
STARC-2.1.3.1 rules, and restores the netlist from the disk.
In the third SpyGlass run, if you specify the same command-line
options as in the previous run and also specify the
-skip_rules_for_fast_restore switch additionally, the
following message appears:
WARNING [236] Following rules not being run (design
database restored & -skip_rules_for_fast_restore is
set):
W110 (need HDL re-read)
STARC05-2.1.3.1 (need HDL re-read)
Here, SpyGlass disables the W110 and STARC-2.1.3.1 rules, skips
the design parsing, and loads the netlist straight from the disk.
NOTE: The -skip_rules_for_fast_restore command-line
option works only when the -enable_save_restore command-line option is also
specified.
-stop (Optional) Skips rule-checking on the specified VHDL design unit or

Verilog Module.
The design unit names can be specified in any of the following formats:

<entity-name> Skip rule-checking on specified entity

and all its architectures (in all logical
libraries)
<entity-name>.<arch-name> Skip rule-checking on the specified
architecture of the specified entity (in
all logical libraries)
<lib-name>.<ent-name> Skip rule-checking on specified entity
and all its architectures (for the
specified logical library)
<lib-name>.<ent-name>.<arch.name> Skip rule-checking on the specified
architecture of the specified entity in
the specified logical library
<lib-name> Skip rule-checking on all design units
in the specified logical library
ALL Skip rule-checking for all design units
in all logical libraries
ALL.<arch-name> Skip rule-checking on all
architectures with name <arch-
VHDL name> in all logical libraries
<module-udp-name> Skip rule-checking of the specified
module or UDP
<lib-name>.<module-udp-name> Skip rule-checking of the specified
module or UDP from the specified
Verilog logical library

later, for blocks being worked on by another member of the project, or
for pre-designed code or Intellectual Property yet to be provided. Since
no information is available yet to do detailed internal checking with
SpyGlass, you need to stop SpyGlass from processing these design
units. You can do so using the -stop command-line option and listing
the unit(s) you want SpyGlass to skip.
The design units specified with the -stop command-line option are

assumed to be blackboxes for the purpose of SpyGlass analysis.

NOTE: SpyGlass also supports the +stopmodule command-line option in
order to re-use of scripts created for running other Verilog tools. Unless script
compatibility is an issue, it is recommended that -stop command-line option
is used.
To skip analysis of a single design unit

To specify the name of a single design unit you want SpyGlass to skip,
enter the -stop command-line option followed by the unit name, the
language option, the policy, your design file name and any other
SpyGlass options you require.
For example, to skip the VHDL module alu, enter:
spyglass -batch -stop alu -vhdl -policy=lint design.vhd
To skip the Verilog module block1, enter:
spyglass -batch -stop block1 -verilog -policy=lint
mydesign.v
To skip analysis of more than one module

To specify the names of two or more design units you want to skip,
enter the -stop command-line option followed by the list of design
unit names in quotes and separated by spaces, followed by the unit
name, the language option, the policy, your design file name and any
other SpyGlass options you require.
For example, to skip the Verilog modules alu and control, enter:
spyglass -batch -stop 'alu control' -verilog \
-policy=lint mydesign.v
To skip the Verilog modules block1 and block2, enter:
spyglass -batch -stop 'block1 block2' -verilog \
-policy=lint mydesign.v
NOTE: You can specify the -stop command-line option with the -stopdir and

the -stopfile command-line options.
Wildcard and Regular Expression Support

You can specify the design unit names with the -stop command-line
option using SpyGlass Pattern Matching Support. For example:
-stop “lib1.*” Stop all the design units picked from logical library lib1
-stop “e.*” Stop all architectures of entity e
-stop “*.e” Stop all entities named e from any library
For further information, please refer to Pattern Matching Across

Features.
NOTE: It is mandatory to escape the wildcard characters when present in an
escaped name. For example, \a123* should be specified as
-stop="\a123\*". Otherwise, unexpected matches may occur. Also,
the following examples have different meanings (first example matches a11,
a12, and a13 while the second example matches \a1* with literal meaning.
-stop= "a1*"
-stop="\a1\*"
-stopdir (Optional) Skips rule-checking on all design units described in all

source files located in a specified directory.
The design units described in all source files located in the directory
specified with the -stopdir command-line option are assumed to be
blackboxes for the purpose of SpyGlass analysis.
For example, to skip all modules described in all source files located in
the myaddldir directory, enter:
spyglass -batch -stopdir myaddldir -verilog \
-policy=lint -f sources.f
Where the sources.f file lists a number of source files including source
files located in the myaddldir directory.


NOTE: You can specify the -stopdir command-line option with the -stop
and the -stopfile command-line options.
NOTE: The -stopdir command-line option works recursively in the
specified directory. Thus, the following example stops all design units in all
source files in the directory, mydir, and all files in all sub-directories (all
levels) under the mydir directory:
-stopdir=mydir

You can specify the directory/file names with the -stopdir
command-line option by using SpyGlass Pattern Matching Support.
For example:
-stopdir “dir1/*” Stop all files in directory dir1 and all files in sub-
directories (all levels) under directory dir1
recursively (as in UNIX Shell expansion)
-stopdir “dir1/*/” Stop all files in sub-directories (all levels) under
directory dir1 recursively (as in UNIX Shell
expansion)

Features.
-stopfile (Optional) Skips rule-checking on all design units described in a

specified file.
The design units described in the source files specified with the

-stopfile command-line option are assumed to be blackboxes for

the purpose of SpyGlass analysis.
For example, to skip all modules described in myaddlfile.v, enter:
spyglass -batch -stopfile myaddlfile.v -verilog \
-policy=lint -f sources.f
Where the sources.f file lists a number of source files including the
myaddlfile.v file.
NOTE: You can specify the -stopfile command-line option with the -stop
and the -stopdir command-line options.

You can specify the design unit names with the -stopfile
command-line option using SpyGlass Pattern Matching Support. For
example:
-stopfile “a*” Stop all files in the current directory whose names
match the wildcard expression a* (for example, a1,
aa1, abc, etc.)
-stopfile “dir1/*” Stop all files in directory dir1
-stopfile “dir?/*” Stop all files in directories which matches the
wildcard expression dir? (for example, dir1, dir2
etc.)

Features.

-support_sdc_style_escaped_name
(Optional) Causes SpyGlass to recognize Synopsys-style escaped
names in SpyGlass Design Constraints files.
By default, SpyGlass recognizes names that start with a backslash
character and end with a space (Verilog) or a backslash character
(VHDL) as escaped names as per respective HDL conventions. Thus,
you need to specify such escaped names in the set format in SpyGlass
Design Constraints files also.
When you set the -support_sdc_style_escaped_name
command-line option, you can specify object names without the
escaped delimiters in the SpyGlass Design Constraints files. Thus, you
can specify 'ab%c' instead of '\ab%c ' or '\ab%c\'.
You can specify Synopsys-style escaped names at all levels in a
hierarchical name. For example, you can specify 'top.e.&f%g'
instead of '\top .\e.&f%g ' or '\top\.\e.&f%g\'.
You can use both the default format escaped names and the Synopsys-
style escaped names in the same SpyGlass Design Constraints file.
-testsynth (Optional) Causes SpyGlass to elaborate and synthesize the design and
report elaboration and synthesis messages.
Use the -testsynth command-line option to check the design for
elaboration/synthesis issues without running any rules.
Thus, you must specify the -norules command-line option along with
the -testsynth command-line option.
-top (Optional) Causes SpyGlass to analyze and synthesize only the

specified design units and their descendants.
By default, all top-level design units and their hierarchies are
processed.

NOTE: Multiple top names are allowed only if they are hierarchically
independent.
NOTE: For rest of the design, only syntax checking and lexical rule checking
are performed.
You can run SpyGlass on any part of a design hierarchy, but to do this,
you must tell SpyGlass where the top of the hierarchy is using the
-top command-line option, and where the hierarchy should stop in
each branch using the -stop command-line option.
The design units that are outside the hierarchy specified with the -top
command-line option are assumed to be blackboxes for the purpose of
SpyGlass analysis.
NOTE: SpyGlass also supports the +topmodule command-line option for
Verilog designs to re-use of scripts created for running other Verilog tools.
Unless script compatibility is an issue, it is recommended that -top
command-line option is used.
To define the top of a single hierarchy

To define the top of a hierarchy or sub-hierarchy, enter the -top
command-line option followed by the name of the top-level unit.
NOTE: For VHDL designs, SpyGlass automatically determines the top of a
hierarchy if the -sort command-line option is used.
For example, to specify the VHDL design unit alu as the top-level of
the hierarchy to be analyzed in the file mydesign.vhd, enter:
spyglass -batch -top alu -vhdl mydesign.vhd
For Verilog, to specify the module block1 as the top or root of a sub-
hierarchy to be analyzed in design.v, enter:
spyglass -batch -top block1 -verilog design.v
To define the tops of multiple hierarchies

The -top command-line option also lets you define more than one

sub-hierarchy in a single command. SpyGlass analyzes only the

modules you specify, including their dependent units. If you specify
more than one unit, separate their names by a space and enclose them in
quotes.
For example, to specify the VHDL design units alu and jtag as the
top-level of hierarchies to be analyzed in the file mydesign.vhd, enter:
spyglass -batch -top 'alu jtag' -vhdl mydesign.vhd
For Verilog, to specify the modules block1and block2 as the top or root
of two separate sub-hierarchies to be analyzed in design.v, enter:
spyglass -batch -top 'block1 block2' -verilog design.v
To define many hierarchies

If you wish to define many sub-hierarchies in a design, and you are
likely to be running SpyGlass a number of times, it is recommended
that you define the hierarchies as a number of individual -top
command-line options (one per line) in a text file, and then use the -f
command-line option to include these options in a SpyGlass run. By
doing this, you can include or exclude an individual sub-hierarchy from
a SpyGlass run by commenting out the corresponding -top command-
line option line in the text file.
To define pre-compiled library design units as tops

You can also define a pre-compiled Verilog/VHDL library design unit
as a top design unit.
Then, SpyGlass interprets the top-level design unit as follows:
1. If no design files have been specified, SpyGlass bypasses the
analysis stage and moves to the elaboration stage and then to all the
subsequent stages.
2. If some design files are specified and the pre-compiled dump of
these design units already exist, SpyGlass ignores the pre-compiled

definitions and recompiles the design files again at the newly

specified work library or at the same work library.
NOTE: SpyGlass gives preference to design files than their pre-compiled
definitions. This is because of issues like out of date error messages, when
picking outdated definitions from the disk. Also, in some cases, definition
given in command line are more recent and contains some new code and
designer's intention is to override the previous definition.
3. If some source files are specified together with pre-compiled
libraries and design unit named A has been specified as top design
unit, SpyGlass searches for definition of A in the source files. The
search order is VHDL DU list and then Verilog DU list. If some
definition of A exist in the source files, that definition is used to
elaborate.
4. If some source file are given together with pre-compiled libraries
and design unit named A has been specified as top design unit and
no definition of A exists in the source files, SpyGlass searches for
the A definition in the pre-compiled libraries as follows:
• If the format is <lib>.<ent>.<arch> then search in the given library
name with the given entity name and architecture name.
• If the format is <x>.<y> , then assuming <x> as a library name, first
search module <y> in verilog domain and if not found, then search
entity <y> or configuration <y> in the VHDL domain.
• If the format is <x> , then traverse all the pre-compiled library list
and first search for module <x> in verilog domain and if not found,
then search entity <x> or configuration <x> in vhdl domain.
-validate_hiersgdc • (Optional) Enables the validation of hierarchically migrated block-

level SGDC commands to the chip-level. See Validating
Hierarchical SGDC File section for more details.
-waiver (Optional) Specifies the file having waive constraints.

You can specify the SpyGlass Design Constraints file containing

waive constraints using the -waiver command-line option.

It is now recommended that you create two separate files containing
waive constraints and containing all other constraints respectively.
Then, specify the first file (containing waive constraints) using the
-waiver command-line option and second file (containing all other
constraints) using the -sgdc command-line option.
The SpyGlass Design Constraints processing is as follows:
Specified with -waiver Specified with -sgdc

File contains... option option
Constraints other than Other constraints are Other constraints are
waive constraint ignored with an ERROR processed normally
message
Only waive constraints waive constraints are waive constraints are
processed normally processed with a
WARNING message
Both waive constraints Other constraints are waive constraints are
and other constraints ignored with an ERROR processed with a
message. WARNING message.
waive constraints are Other constraints are
processed normally processed normally.
See Using SpyGlass Design Constraints for details of SpyGlass Design

Constraints files.
The files specified in the -waiver command-line switch may contain
setvar commands. If you specify more than one waiver file containing

setvar commands in the -waive command-line option, and the setvar

command in both the waiver files is for the same variable, SpyGlass
considers the latter specified waiver file to be used by the RTL pragma
(i.e. pragma2constraint.sgdc file).
NOTE: You can specify the setvar commands to be used in RTL pragmas in
waiver files only and not in sgdc files. The setvar commands in sgdc file
(specified through -sgdc switch) will be considered only for the sgdc files and
not for RTL pragmas.
SpyGlass reports a warning message if the setvar commands specified
in a waiver file are not used in that waiver file or RTL pragmas.
-filter (Optional) Specifies the filter files that have a .sfl extension. The filter
files are considered as waiver files.
-work (Optional) Specifies the logical library directory for compilation of

Verilog/VHDL libraries.
The default work directory is the WORK directory under the current
output directory. If the WORK directory does not exist in the current
output directory, SpyGlass creates this directory.
SpyGlass expects to find the working library in the WORK directory. If
you want to use a different working library in your own library
directory, you can specify its name using the -work option.
To use the -work option, you need to map the library name to its
physical location using the -lib option, as described above.

NOTE: Libraries are platform-specific. For example, you cannot compile on

Sun platform, then use a library on Linux platform. If you switch platforms, you
need to delete the working library and other user-defined VHDL libraries and
rebuild them. Atrenta supplies versions of all four default libraries for all
supported platforms. These should not need to be rebuilt.
To specify and map a working library

You can name a working library by entering the -work option and
name of your working library followed by the -lib option and map to
the library’s physical location, then -vhdl (or -verilog) and your
design file.
For example, to use the working library work2, located in the
directory my_work_lib, enter:
spyglass -batch -work work2 -lib work2 ~/my_work_lib
-vhdl mydesign.vhd
-noelab (Optional) Causes SpyGlass to exit after design analysis and without
elaborating the design.
Then, only built-in rules are checked on the design.
Use the -noelab command-line option when you only need to
compile the Verilog/VHDL files without rule-checking.
NOTE: Do not specify the -noelab and -top options together while
running SpyGlass. If you specify these options together, SpyGlass exits and
flags an error message.
-checkip (Optional) Specifies the design units on which the rule-checking should
be done.
When you specify this command-line option, SpyGlass not only
considers the design unit specified by this option for rule-checking, but
also considers all those design units starting from the top in the
hierarchy till the design unit specified by this option.

Consider an example, as shown in the following figure:

TOP
moduleA moduleB moduleC
subMod1 subMod2
Now, if you specify the value of the -checkip command-line option

as ModuleA, SpyGlass would synthesize the modules, TOP,
ModuleA, subMod1, and subMod2, and consider only these
modules for rule-checking.
-checkdu (Optional) Specifies the design hierarchy (level) for which synthesis
and rule-checking should be done.
All the design units instantiated under the design unit specified by this
command-line option are treated as greyboxes. For the rest of the
design units, rule-checking will be bypassed. In addition, rule-checking
will also be bypassed for greyboxes.
When you specify this command-line option, SpyGlass not only
considers the design unit specified by this option for rule-checking, but
also considers all those design units starting from the top in the
hierarchy till the design unit specified by this option.

Consider an example, as shown in the following figure:

TOP
subMod1 subMod2 subMod2
Now, if you specify the value of the -checkdu command-line option

as moduleA, SpyGlass would synthesize the modules, TOP and
ModuleA, and considers only these modules for rule-checking.
Consider another example, as shown in the following figure:
TOP
subMod1 subMod2
subMod3
For the above case, consider that you specify the following command:
-checkdu="moduleA" -checkip="subModule1
In this case, SpyGlass would synthesize the modules, TOP, moduleA,
subModule1, and subModule3, and would consider only these
modules for rule-checking.
NOTE: The -checkdu option is given preference over the -checkip

option, if these options are specified for the same design unit.
Please note the following points for the -checkdu and -checkip
options:
• The command-line options, -stop, -stopfile, and -stopdir,
are given preference over the -checkdu and -checkip options.
For example, SpyGlass ignores the -checkdu and/or -checkip
options on those design units for which -stop option has been
specified.
• If the design unit specified with the -checkdu and -checkip
options have overlapping spanning tree (hiearchical tree rooted at
that design unit), the option with design unit at a higher hierarchical
level (in the tree) will be given higher priority.
• The -checkip and -checkdu options cannot be used to skip
synthesis and rule-checking on library cells (from -gateslib or -
sglib command-line options). All the library cells used inside the
design units specified with the -checkip and -checkdu options
are also considered a part of the reduced design and are considered
for rule-checking.
-disable_encrypted_hdl_checks
(Optional) Disables RTL rule-checking on the encrypted design units.
If you specify this command-line option, SpyGlass internally removes
any messages that point inside an encrypted IP.
-macro_synthesis_off
(Optional) Sets off the SYNTHESIS macro.
SpyGlass includes the SYNTHESIS macro by default. Use this option
turn off the macro.
-write_sdc (Optional) Enables SpyGlass to dump error free constraints in a file

named, TCwritesdcInfo. This file is created in the <wdir>/spyglass_spysch/
spyglass_sdc/ directory. To implement this feature, you must set the

value of this command-line option to yes.

By default, the value of this command-line option is set to no, and the
TCwritesdcInfo file is not created.
SpyGlass dumps the constraints in the TCwritesdcInfo file in the
following format:
Input sdc command :
set_ideal_network {A1/in1 in2}
Output sdc command:
#ideal.sdc@@28@@
set_ideal_network [list [get_pins {A1/in1}] [get_ports
in2]]
The constraints are dumped in the following manner:
• All the SDC commands are dumped un-commented and all the
non-SDC commands are dumped with a prefix, sg_, and are
commented.
• Erroneous commands are not translated.
• Basic Tcl commands such as puts, if, else, etc., are not
translated.
• For all the objects which are a part of commands, the corresponding
object_access commands are used with them such as
get_ports {p1}.
Following are the limitations/exceptions of this feature:
• Although the aim is to draft a legal SDC file which runs error-free in
all the tools, SpyGlass is currently not able to stop the translation of
some erroneous commands such as SDC_209, SDC_288, etc.
• The set bus_naming_style/sdc_version and setenv are
the only basic Tcl commands that are translated.
• SpyGlass is not able to insert object_access commands,
get_clocks, get_libs, get_lib_pins, and
get_lib_cells. They are decompiled as names only.

-debug_proc (Optional) Dumps procedure call trace information for errors inside the
procedure definition.
By default, the value of this command-line option is set to no, and
SpyGlass does not dump any procedure call trace information.
To dump the procedure call trace information, specify
-debug_proc=yes or -debug_proc on command-line.
Consider the following example (with line numbers highlighted):
1 # file1.sdc
2 proc proc2 { period_arg2 } {
3 create_clock -name CLK1 in1 $period_arg2
4 create_clock -name CLK2 in1
5 }
1 # file2.sdc
3 proc2 $period_arg1
4 }
6 # First proc
7 proc1 $period_arg0
8 }
9 proc0 10
For the above example, SpyGlass flags the following SDC errors for
the create_clock command in the moresimple report:
SDC_106 Error file1.sdc 3 10 Incorrect
argument "10" for "create_clock" (too many arguments?)
SDC_145 Error file1.sdc 4 10 -period value
missing
However, if you want more information about the procedure call-trace,
use the -debug_proc option. When you specify this option,
SpyGlass generates the debugProcInfo file in the <wdir>/spyglass_spysch/
spyglass_sdc/ directory and dumps the procedure call-trace information

in this file in the following format:

SDC_106 File/Line : file1.sdc/3 (Procedure Trace :
proc0 (file2.sdc,9) --> proc1 (file2.sdc,7) --> proc2
(file2.sdc,3) )
SDC_145 File/Line : file1.sdc/4 (Procedure Trace :
proc0 (file2.sdc,9) --> proc1 (file2.sdc,7) --> proc2
(file2.sdc,3) )
-net_osc_count_limit
(Optional) Specifies the number of oscillations allowed to get a stable
value on a particular net within SpyGlass logic evaluator.
By default, the limit for the oscillation count for any net is 100. You can
override this default value by using the -net_osc_count_limit
command, as shown in the following example:
spyglass -policy='dft' -fullpolicy -verilog -sgdc
test.sgdc test.v -32bit -dftShowWaveForm='on'
-net_osc_count_limit 10
-nodefparam (Optional) Ignores explicit parameter re-definition given by a

defparam Verilog construct.
Verilog parameters can be redefined within a module instance by using
defparam statements, as shown in the following example:
module ram (...);
parameter WIDTH = 8;
parameter SIZE = 256;
...
endmodule
module my_chip (...);
...
//Explicit parameter redefinition by name
RAM ram1 (...);
defparam ram1.SIZE = 1023;
...

endmodule
If you want to disable these parameter re-definitions and want to use

original parameter values, use the -nodefparam command-line
option.
-sgsyn_clock_gating
(Optional) Causes SpyGlass to create a simple clock-gating logic
instead of creating a MUX-based enable logic when 16 or more
flip-flops with the same clock signal and the same enable signal are
found.
NOTE: You can use this option only when the -est_mode option is set or EST
mode compatible rules are specified.
-sgsyn_clock_gating_threshold
(Optional) Specifies the number (default 16) of flip-flops beyond
which SpyGlass create a simple clock gating logic for flip-flops with
the same clock signal and the same enable signal.
NOTE: You can use this option only when the -est_mode option is set or EST
mode compatible rules are specified.
-target (Optional) Specifies libraries to be used for technology-mapping out of

the specified .sglib libraries.
By default, all the specified .sglib libraries are used for
technology-mapping.
VHDL-specific Options
VHDLOnlyOptions::=
[ -87 ]
[ -hdlin_synthesis_off_skip_text ]
[ -hdlin_translate_off_skip_text ]
[ -relax_hdl_parsing ]

[ -sort [-print] ]
-87 (Optional) Checks the design for IEEE standard 1076-1987

compliance. By default, SpyGlass checks for IEEE standard 1076-1993
compliance.
SpyGlass assumes you are using the IEEE-1076 VHDL-93 standard
syntax in your design. If you are creating a design using the VHDL-87
standard, you need to pass this information to SpyGlass so it can
analyze your syntax correctly. It reports any message it detects as
syntax errors along with all other SpyGlass errors.
To specify IEEE-1076 VHDL-87 usage

To tell SpyGlass you are using the VHDL-87 standard, enter the -87
option followed by -vhdl and your design file.
For example, if your design file mydesign.vhd uses the IEEE-1076
VHDL-87 standard, enter:
spyglass -batch -87 -vhdl mydesign.vhd
-hdlin_synthesis_off_skip_text
(Optional) Causes SpyGlass to interpret the VHDL design code
between Synopsys synthesis_off/synthesis_on pragma pair
as comments.
-hdlin_translate_off_skip_text
(Optional) Causes SpyGlass to interpret the VHDL design code
between Synopsys translate_off/translate_on pragma pair
as comments.
-print (Optional) prints the list of sorted VHDL files.

NOTE: The –print option is used only with the -sort option.

-relax_hdl_parsing (Optional) Performs relaxed VHDL semantic checking in the following

manner:
1. By automatically inferring missing 'library' clauses for user-defined
libraries, provided correct library mapping is specified at the
command-line.
Consider the following example given in two steps:
Step 1:
Compile the following code into a user-library, userlib1:
entity an2 is
port (
A : in bit;
B : in bit;
Y : out bit);
end an2;
architecture behav of an2 is

begin
Y <= A and B;
end behav;
To compile the above code into a user-defined library, userlib1,
specify the following at command-line:
$SPYGLASS_HOME/bin/spyglass -vhdl -batch
-policy=none -work userlib1 -lib userlib1 ./userlib1
an2.vhd -wdir x;
Step 2:
Compile the following code using the the user-defined library,
userlib1:
--library userlib1; -- if -relax_hdl_parsing switch
--is used this declaration of library is not needed.
entity top is
port (

topA : in bit;
topB : in bit;
topZ : out bit);
end top;
architecture struct of top is

component an2
port (
A : in bit;
B : in bit;
Y : out bit);
end component;
for I1 : an2 use entity userlib1.an2(behav);

begin
I1 : an2
port map (topA,
topB,
topZ);
end struct;
To compile the above code using the the user-defined library,
userlib1, specify the following at command-line:
$SPYGLASS_HOME/bin/spyglass -vhdl -batch -
policy=none -lib userlib1 ./userlib1 top.vhd -wdir x
-relax_hdl_parsing
If you do not specify the -relax_hdl_parsing option in the
above command, SpyGlass flags STX_VH_11 error.
2. Relaxes STX_VH_455 (OTHERS must be the only choice in
aggregate of non-locally static size)
For example:
entity E is
end;
architecture A of E is
function ff(a: bit_vector) return integer is
type mytype is array(a'range) of bit;

variable j: mytype;
begin
j := (4=>'1', 5=>'0', others=>'1');
return a'length;
end;
begin
end A;
-sort (Optional) Sorts the design files before analyzing and prints the sorted
file order to the log file.
For a VHDL design to compile correctly, it must be analyzed in the
correct order (that is, lower-level dependent design units and libraries
must be analyzed before the top-level or primary units). You can tell
SpyGlass to sort your design files, or explicitly specify their order
yourself. You can also define the specific configuration to be used for
design.
NOTE: You should use the -sort command-line option only if you do not
know the correct design order. However, there are design configurations in
which the -sort command-line option cannot reliably infer the correct order,
no matter how good the sort algorithm is.
To have SpyGlass sort your design units automatically, use the -sort
option before you begin your analysis. This is particularly useful if you
are analyzing all your VHDL files. If you use the *.vhd wild card
without the -sort option, SpyGlass compiles the files in the order
they are returned from the shell (that is, alphabetically). The
dependency order determined by SpyGlass for the design is printed in
the log file.
NOTE: If a sort operation becomes confused as to which files need to be
updated, SpyGlass issues an error message saying one or more files need to
be recompiled. To resolve the issue, delete your work directory and any library
directories and rebuild them.
The required VHDL libraries (as specified as command-line
arguments) are checked for existence before SpyGlass attempts to

determine the dependency. If any such libraries do not exist, a suitable

error is generated and SpyGlass exits.
To have SpyGlass order your design units automatically

To have SpyGlass automatically order the design units, use the -sort
option.
For example, to sort all design units within your design, enter:
spyglass -batch -sort -policy=lint -vhdl *.vhd
To display your sorted VHDL files

To see the results of the sort, enter the -print option following the
-sort option in the command line. Note that SpyGlass now prints the
order automatically in the log file if the -sort option is used. The
-print option is retained for backwards compatibility.
NOTE: The -print option works only in conjunction with the -sort
option.
For example, to display a listing of the sorted design units from *.vhd,
enter:
spyglass -batch -sort -print -policy=lint -vhdl *.vhd
Not using the Automatic VHDL Sorting

If you do not use this option, you will have to specify the source files in
correct order for VHDL compilation.
If you are not going to use the -sort option, you will have to specify
the source files in correct order in a command line (or in a multi-
command -f file). The order must have design unit definitions
preceding any VHDL files that use the design units, which is standard
VHDL ordering. An example of an explicitly defined order would be:
spyglass -batch -vhdl bottom-ent.vhd \
bottom_arch.vhd upper-ent.vhd upper_arch.vhd

where the upper design unit contains instances of the bottom design
unit.
Verilog-specific Options
VerilogOnlyOptions::=
[ -allow_celldefine_as_top ]
[ -allow_module_override ]
[ -disable_hdllibdu_lexical_checks ]
[ +define{+<macro-name>} ]
[ -enable_precompile_vlog ]
[ -enableSV ]
[ -sfcu ]
[ -ignorelibs ]
[ +incdir{+<path-name>} ]
[ -inferblackbox | -inferblackbox_rtl ]
[ -no_celldefine_messages ]
[ -no_rcheck_celldefine ]
[ -no_synth_celldefine ]
[ [{-v <lib-name> }]
[{-y <lib-dir-name> }]
[+libext{+<ext-name> }] ]
[ +resetall ]
[ -show_lib ]
-allow_celldefine_as_top
(Optional) Specifies to perform rule-checking on 'celldefine module
top's hierarchy.
By default, a top that is inside a 'celldefine module is ignored for rule-
checking.
-allow_module_override
(Optional) Allows duplicate module/UDP definitions. Only the last-
found module/UDP definition is processed; earlier definitions with the

same name are ignored.

By default, duplicate module definitions result in STX_589 syntax
error. When the -allow_module_override option is specified,
SpyGlass generates the INFO_1007 message.
-disable_hdllibdu_lexical_checks
(Optional) Disallows lexical rule checking on precompiled libraries.
+define (Optional) Adds the specified macro definitions.

In your Verilog design, you can have source code that should be
compiled if certain conditions are met. An example would be as
follows:
'ifdef MacroName ...
'else ...
'endif
Alternatively, you may have created text macros (using 'define) that
must be substituted with actual values at compile time. In such cases,
you need to tell SpyGlass what values to use. You can do so using the
+define option.
To define a macro value

To set the value of a ‘define macro, enter the +define option
followed by the macro name and a value (separated by a + sign), the
-verilog option and the design file name.
For example, to set the macro State0 equal to 3, enter:
spyglass -batch +define+State0=3 -verilog mydesign.v
To define more than one macro value

To set values for more than one ‘define macros, specify the following on
command-line:

• +define option followed by a + separated list of macro names and

their values
• -verilog option
• Design file name
For example, to set the value of macros, State0 and State1, to 3
and 5, respectively, specify the following command:
spyglass -batch +define+State0=3+State1=5 -verilog
<file-name>
The ‘define macros can also be included in the *.v files. However, these
files must be analyzed by SpyGlass first before analyzing the
remainder design files. Hence, such files must be listed first on the
command-line. For example, consider a define.v file that has the
following format:
// comment
‘define State0 3
‘define State1 5
etc.
In this case, define.v file must be listed first on the SpyGlass
command-line, as shown below:
spyglass -batch -verilog define.v design.v
-enable_precompile_vlog
(Optional) Enables the Precompiled Verilog library feature.
See Working with Pre-compiled Verilog Libraries for more details.
By default, the Precompiled Verilog library feature is not enabled.
-enableSV (Optional) Enables parsing of SystemVerilog constructs.

See Using SystemVerilog Constructs for more details.
By default, SpyGlass flags SystemVerilog constructs as syntax errors.

-sfcu (Optional) Enables each file to be compiled as a separate compilation

unit. By default, SpyGlass compiles all the files specified on the
command-line in a single compilation unit. Specify the -sfcu switch
to have each file, specified on command-line, as a separate compilation
unit.
NOTE: The -sfcu option can be used only when the -enableSV
command-line option is specified.
-ignore_celldefine This command-line option has been deprecated. By default, SpyGlass

automatically skips rule-checking on the modules defined with the
'celldefine directive. However, if you want to check for such
modules, specify the -check_celldefine command-line option.
NOTE: Please also see the -allow_celldefine_as_top command-line option.
-ignorelibs (Optional) Causes SpyGlass to skip the rule-checking for modules in

the library files (specified through -v command-line option or -y
command-line option). Hence, no violations (except for ELAB/
SYNTH errors) would be flagged on these modules. However, the
functional model of these modules would be synthesized/flattened and
would be available during any checks performed on other modules.
+incdir (Optional) Searches the specified path for include files.

Your design may contain code that defines some frequently performed
action and is used in a number of modules in identical manner. Then,
Verilog allows you to separate out this common code in to a separate
source file and include this source file at required locations in the
design using the 'include compiler directive.
When using 'include files in Verilog, it is recommended to use
relative pathnames instead of absolute pathnames to ensure portability
of the include files.
To support this feature, SpyGlass requires you to specify the include
file with relative pathnames and use the +incdir command-line

option to name the directories that contain these files.

To map the paths to one or more ‘include files

To tell SpyGlass where to find the directories containing your
'include files, enter the +incdir option followed by the paths to
the directories separated by + signs, the -verilog option and your
design file name.
For example, to direct SpyGlass to a source file in the globals directory,
enter:
spyglass -batch +incdir+~/globals -verilog mydesign.v
SpyGlass first searches the current directory for the 'include files. It
then searches the directories specified by the +incdir option in the
sequence in which you list them. SpyGlass returns an error message
and terminates if it cannot find all the required 'include files in your
directory structure.
When using the +incdir command-line option and relative
pathnames, you cannot have duplicate file names in the directory list.
The file corresponding to the second instance of the duplicate file name
will never be read because SpyGlass searches the directory structure
until it finds the first instance of the file and then stops.
Specifying directories containing + character in their names

If the 'include directory name contains a + character, you should

specify that directory by using the -incdir command-line option

instead of using the +incdir command-line option. For example, you
should specify the directory, abc+bcd, in the following manner:
-incdir abc+bcd
To specify multiple directories in the -incdir option, specify a
space-separated list of those directories, as shown in the following
example:
-incdir "abc+bcd xyz"
SpyGlass also allows you to use the +incdir and -incdir options
together, as shown in the following example:
-incdir abc+bcd +incdir+xyz+
-inferblackbox (Optional) Causes SpyGlass to infer blackbox module interface based

on the blackbox instances in the synthesized netlist and write to file
named sgBlackbox.v in the current output directory.
See Inferring Blackboxes for more details.
-inferblackbox_rtl (Optional) Causes SpyGlass to infer blackbox module interface based

on the blackbox instances in the RTL description in addition to the
synthesized netlist and write to file named sgBlackbox.v in the current
output directory.
See Inferring Blackboxes for more details.
NOTE: The -inferblackbox_rtl command-line option contains the
functionality of the -inferblackbox command-line option and also overrides it.
+libext (Optional) Specifies library file extensions.

NOTE: You must supply this option when you are using the -y command-line
option to specify the library file directory.
-no_celldefine_messages

(Optional) Suppresses all messages for the 'celldefine modules.

This command-line option disables synthesis and rule-checking of the
'celldefine modules and also suppresses all other messages (for
example, the ReportUnsynthesizedDU rule messages, the NotChecked
severity messages) for these modules.
NOTE: The -no_celldefine_messages switch will be deprecated in
a future SpyGlass release. If you specify this switch on command-line,
SpyGlass will give a warning message.
-no_rcheck_celldefine
(Optional) Suppresses pre-synthesis rule-checking but enables post-
synthesis rule-checking.
NOTE: The -no_rcheck_celldefine switch will be deprecated in a
future SpyGlass release. If you specify this switch on command-line, SpyGlass
will give a warning message.
-no_synth_celldefine
(Optional) Causes SpyGlass to suppress synthesis and subsequent rule-
checking of modules defined with 'celldefine directive. Only
RTL level rule-checking will be performed on such modules.
NOTE: The -no_synth_celldefine switch will be deprecated in a
future SpyGlass release. If you specify this switch on command-line, SpyGlass
will give a warning message.
-v (Optional) Specifies the library file used in the source design.

SpyGlass offers several options for naming and mapping Verilog
libraries, supplying your own library file name extensions, and
ignoring messages in third-party libraries.


in files stored in a library directory. You need to tell SpyGlass where to
find the library (using the -v option) or directory (using the -y option)
so it can compile your Verilog design correctly. SpyGlass checks the
current directory for such libraries first, then, if it cannot find them,
searches the path you specify with these options.
NOTE: By default, SpyGlass performs lexical rule-checking on all the cells
specified by the -v command-line option. To disable rule-checking on such
cells, specify the -ignorelibs command-line option.
To name and map a single library file

To specify the name of a Verilog library, enter the -v option followed
by the path to the library, the -verilog option and the design file
name.
For example, to specify the library libfile.v, enter:
spyglass -batch -v ~/libfile.v -verilog mydesign.v
-y (Optional) Specifies the library directory containing libraries used in

the source design.
NOTE: You must also specify the library file extensions using the +libext
command-line option for SpyGlass to read the library files.
in files stored in a library directory. You need to tell SpyGlass where to
find the library (using the -v option) or directory (using the -y option)

so it can compile your Verilog design correctly. SpyGlass checks the

current directory for such libraries first, then, if it cannot find them,
searches the path you specify with these options.
Like all standard Verilog EDA tools, SpyGlass requires you to specify
the file extension for files located in library directories specified by the
-y option. Use the +libext option to specify one or more file
extensions of library files.
NOTE: By default, SpyGlass performs lexical rule-checking on all the cells
specified by the -y command-line option. To disable rule-checking on such
cells, specify the -ignorelibs command-line option.
To name and map a library directory

To specify the name of a directory of library files, enter the -y option
followed by the path to the directory, the -verilog option and the
design file name.
For example, to specify the library directory libdir, enter:
spyglass -batch -verilog mydesign.v -y ~/libdir ...
To specify a single file name extension

To specify a single file name extension to SpyGlass, enter the
+libext option followed by a + sign and the extension name, the
-verilog option and your design file name.
For example, to specify the file name extension .v to SpyGlass, enter:

spyglass -batch -verilog mydesign.v -y ~/mylib

+libext+.v
To specify more than one file name extension

To specify more than one extension, simply list all the extensions
following the +libext option. Precede each extension name with a +
sign.
For example, to specify the extensions .v and .vlib, enter:
spyglass -batch -verilog mydesign.v \
-y ~/mylib +libext+.v+.vlib
+resetall NOTE: This option is used in Verilog and Mixed mode and is ignored when
used in VHDL mode.
(Optional) Resets the Verilog compiler directive default_nettype
to language default which is wire.
Currently, other Verilog compiler directives are not reset by this option.
It is useful while analyzing multiple design files where the user does
not want to specify this default in each of these files.
-show_lib (Optional) Enables generation of messages for each library module

(from libraries specified using the -v and -y command-line options)
as it is loaded.
By default, these messages are not generated.
Other Command-line Options

SpyGlass provides the following other command-line options:
OtherOptions::=
-lang=<lang>
--valgrind

--gdb
-lang (Optional) Specify the display language for messages and waivers.
NOTE: All other items are always in the English language.
NOTE: You must always specify the -lang command-line option while
invoking the SpyGlass Design Environment when intending to select a
language other than English; it cannot be specified from inside the SpyGlass
Design Environment. This is true for all types of invocations including loading
the Violation Database file of a previous SpyGlass run.
By default, display of messages and waivers is in the English language.
Use the -lang command-line option to specify a different display
language. For example, the following specification sets Japanese as the
SpyGlass display language:
-lang=ja
The valid values of the -lang command-line option are en (for
English) and ja (for Japanese).
The related Configuration file key is the
SPYGLASS_DISPLAY_LANGUAGE key.
NOTE: If you specify the language as japanese while invoking SpyGlass, then
the HTML rule help will not display the static HTML pages. The rule help will
display the dynamic help pages generated on the fly by SpyGlass. The
dynamic help pages are displayed only for the policies for which the Japanese
help files exist. If the help files do not exist for the Japanese language, then the
related static html pages will be displayed.
--valgrind (Optional) Invokes the Valgrind tool suite during the SpyGlass run.
Use the --valgrind option to review the memory issues in your
custom rules. Ensure that you specify this option on the command-line
itself and the standard environment variable VALGRIND_OPTS is
suitably set. Alternatively, you can also provide the required options to

valgrind through .valgrindrc.

You must have the Valgrind tool suite (upto version 3.2.3 ) installed in
your filesystem to be able to run valgrind.
The Valgrind tool suite is searched in the following order:
1. Path to the Valgrind executable set using the
SPYGLASS_VALGRIND_PATH environment variable
2. The /usr/local/bin directory
3. The /usr/bin directory
4. Path set in your PATH environment variable
--gdb (Optional) Invokes GDB (GNU Project Debugger) during the SpyGlass
run.
Use the --gdb option to debug your custom rules.
You must have the GDB tool suite installed in your filesystem.
The GDB tool suite is searched in the following order:
1. Path to the GDB executable set using the SPYGLASS_GDB_PATH
environment variable
2. The /usr/local/bin directory
3. The /usr/bin directory
4. Path set in your PATH environment variable
SpyGlass Configuration File Setting Override Options

SpyGlass has the Configuration File feature using which you can
specify configuration settings like default startup mode (the SpyGlass
Design Environment or batch), default policy to be run, default
language setting, default report format etc.
The Configuration File settings can be overridden by specifying certain
command-line options directly on the command-line or indirectly in a

command file as follows:
Overriding Command-line
Configuration File Setting Value Option
DEFAULT_STARTUP_MODE gui -batch
batch -gui
USE_32_BIT_EXECUTABLE_ONLY no
yes -32bit
DEFAULT_LANGUAGE_MODE VHDL -verilog, -def, or
-mixed
Verilog -vhdl, -def, or -mixed
Mixed -verilog, -vhdl, or
-def
DEF -verilog, -vhdl, or
-mixed
none -verilog, -vhdl, -def,
or -mixed
DEFAULT_TEMPLATE Any -template
DEFAULT_POLICY_FOR_SPYEXPLAIN Any -policies | -policy
DEFAULT_REPORT_FORMAT default, -report, -noreport
<report-
name>
none -report
DEFAULT_PRAGMA default, -pragma=<pragma-name-
<pragma- list>,
name-list> -pragma=nopragma
none -pragma=<pragma-name-
list>
VHDL_LIB_MAP Any -lib
COMMAND_OPTION_FILENAME Additive effect hence not possible
COMMAND_FILE_ARGS Additive effect hence not possible

Overriding Command-line
Configuration File Setting Value Option
SYSTEMVERILOG_SUPPORT no -enableSV
yes -disableSV
AUTOENABLE_INFERBLACKBOX no -inferblackbox,
-inferblackbox_rtl
yes -inferblackbox_rtl,
-disable_inferblackbox
yes_netlis -disable_inferblackbox
t
yes_rtl -inferblackbox,
-disable_inferblackbox
AUTOENABLE_VHDL_SORT no -sort,
-sort=lexical
yes -disable_sort
DEFAULT_VHDL_SORT_METHOD lexical -sort
no argument -sort=lexical
Click a command-line option name to know more about the option.

NOTE: The command-line options that do not have an associated description
(and hence, no hotlink) have been provided only to override the Configuration
File settings.
Source File Options

SourceFileOptions::=
{<file-name>}
<file-name> HDL source file(s).

You can provide the file name with or without the path (actual or
relative).
If you provide only file name, the file is searched in the current

directory.
You can also use wildcards to specify file names. For example,
specifying *.vhd will result in processing all files with extension .vhd in
the current directory.
Rule Parameters
RuleParameters ::=
[ {-<name>=<value-list>} ]
(Optional) Specifies the values of rule parameters.
<name> is the name of the rule parameter. The names are available in
the ruledeck file and in the policy documentation.
<value-list> is the delimiter-separated value list of the rule
parameter. The value list must not have white spaces. For example, the
following definition is illegal:
-clocks=a, b
The legal definition is as follows:
-clocks=a,b
If you must use white spaces between items in the value list, use the
double-quotes around the value list as follows:
-clocks=”a, b”
Some rules have been written to be parameterizable. These rule
parameters are used just like a standard SpyGlass command-line option
while starting SpyGlass.
For example, in the Timing policy, the depth at which the LogicDepth
rule will generate a message has a default setting (10 levels). This can
be changed at runtime by changing the -delaymax rule parameter.
Use of these rule parameters is described in each policy’s Rules
Reference document.

SpyGlass Command-Line Utilities
To define the value of a rule parameter

If SpyGlass encounters a command-line option that it does not
recognize, it creates a parameter of that name. If the option also has a
value, it assigns this value to the parameter created. Thus by using an
option with the same name as the rule parameter with a value assigned
to it, the rule parameter default will be overridden.
To change the delaymax value in the timing policy to 15, enter:
spyglass -batch -policy=timing -delaymax=15 \
-verilog design.v
The spyexplain Utility

SpyGlass provides the spyexplain utility that displays information
about specified rules or rule parameters. Sometimes, you will need to
find which policy contains which rules, for instance. Moreover, you
may not know exactly what rules are available for checking clocks in a
particular policy. Then, you can use the spyexplain utility to
display a report that shows where rules are defined and gives a brief
description of their function.
NOTE: spyexplain is a separate utility with its own options and it is NOT
an option to the spyglass application.
Searching Rules
The spyexplain utility has a number of options, allowing you to
define the HDL language, the policy (or policies you wish to search)
and a keyword for which you wish spyexplain to search in the rule
description and name.
The syntax of using the spyexplain command to search rules is as

follows:
spyexplain
[ -policies | -policy = {<policy-name>,} ]
[ { <rule-name> } ]
| [ -k <search-string> [ -searchlonghelp ] ]
[ -I <path> ]
[ -include_builtins ]
Where the -policy, -policies, and -I command-line options

work same as the corresponding SpyGlass command-line options,
<rule-name> is a rule name or rule alias name (case-insensitive), and
<search-string> is a valid string.
If you do not specify a policy in the command-line, the spyexplain
utility searches the installed policies.
Use the -include_builtins argument to search the SpyGlass
Built-in rules (HDL Parsing rules, SpyGlass Design Constraints file
Parsing rules, and Library (.lib) Files Parsing rules).
NOTE: To see what rules are in a policy, use the -printrules command-
line option.
The spyexplain utility searches both the rule name and short help
message fields for matches but does not search extended help message
fields unless the -searchlonghelp command-line option is
supplied. The search mechanism is not case-sensitive, but partial words
are also located during the search.
The spyexplain utility reports the following information for each
rule that matches the specified search criteria:
• The rule name
• The language to which that rule applies
• The policy in which the rule is described
• A short description of the rule

• An extended description of the rule
Examples of Searching Rules

For example, to see the rules in the VHDL OpenMORE policy, use the
spyexplain -vhdl -policies=openmore
To see the rules in the Verilog Lint policy, use the following command-
line:
spyexplain -verilog -policies=lint
To find out about a particular rule

For example, to see information about the W703 rule in a Verilog Lint
spyexplain -verilog -policies=lint W703
To locate a particular rule in a policy

To locate a rule in a policy or to search for all rules in a policy that
relate to a required check (for example, all clock-related rules), you
need to search for a word that is contained in the rule name or the short
help message.
To search for a specific word in a policy, enter the -k (keyword)
command-line option of the spyexplain utility.
For example, to search for the keyword Reset in the Verilog Lint
spyexplain -k Reset -verilog -policies=lint
To search for the keyword Clock in the VHDL Lint policy, use the
spyexplain -k Clock -vhdl -policies=lint

Searching Rule Parameters

The spyexplain utility has a number of options, allowing you to
search a rule parameter in a specified policy (or policies).
The syntax of using the spyexplain command to search rule
parameters is as follows:
spyexplain
[ -policies|-policy={<policy-name>,} ]
[ -I <path> ]
[ -param <param-name-list> ]

work same as the corresponding SpyGlass command-line options and
<param-name-list> is a space-separated list of valid strings.
If you do not specify a policy using the -policies/-policy
option, the spyexplain utility searches all policies. If you specify a
policy name using the -policies/-policy option and specify the
-param option without any string, the spyexplain utility reports
all rule parameters in the specified policy.
NOTE: You must specify at least one of the -policies/-policy and
-param options.
The spyexplain utility searches both the rule parameter name and
short help message fields for matches. The search mechanism is not
case-sensitive, but partial words are also located during the search.
The spyexplain utility reports the following information for each
rule parameter that matches the specified search criteria:
• The rule parameter name
• The language to which that rule parameter applies
• The policy in which the rule parameter is described
• The description of the rule parameter

Searching Templates
You can also list the description of all rules in a specified template
using the -template option of the spyexplain utility.
The syntax of using the spyexplain command to list description of
rules in a template is as follows:
spyexplain
[ -I <path> ]
[ -template <methodology-name>/<template-name> ]
Where the -I command-line option works same as the corresponding

SpyGlass command-line option, <methodology-name> is the name
of the methodology and <template-name> is the name of the
template.
For example, if you want the description of all rules in the Atrenta
standard Block-Design/Creation template then specify as follows (for
different languages):
spyexplain -template Block-Design/Creation -verilog
spyexplain -template Block-Design/Creation -vhdl
spyexplain -template Block-Design/Creation -mixed
The spyexplain utility searches for the specified template in the

user-specified -I paths.
Searching SpyGlass Design Constraints

You can search the description of standard SpyGlass Design
Constraints using the spyexplain utility.
The syntax of using the spyexplain command to search standard
SpyGlass Design Constraints is as follows:
spyexplain
[ -policies|-policy={<policy-name>,} ]

[ -I <path> ]
[ -sgdc <constraint-name-list> ]

work same as the corresponding SpyGlass command-line options and
<constraint-name-list> is a space-separated list of valid strings.
If you do not specify a policy using the -policies/-policy
option, the spyexplain utility searches all policies. If you specify a
policy name using the -policies/-policy option and specify the
-sgdc option without any string, the spyexplain utility reports all
SpyGlass design constraints in the specified policy.
NOTE: You must specify at least one of the -policies/-policy and
-sgdc options.
The spyexplain utility first searches for the exact match by the
design constraint name. If not found, the utility searches in the
registration and long help of all design constraints in the specified
policies for matches. The search mechanism is not case-sensitive, but
partial words are also located during the search.
The spydocviewer utility

The spydocviewer utility displays the SpyGlass documentation in a tree
format for easy access. In addition, the Atrenta Standard Rule-Primitive
documentation (in text format) is also accessible.
By default, the spydocviewer utility searches for the acroread or
xpdf executables in your machine’s path for displaying the PDF files.
Set the SG_PDF_VIEWER environment variable to set your PDF
viewer.
The spyhelpviewer utility

The spyhelpviewer utility displays the SpyGlass documentation in

in HTML format arranged in a tree format for easy access.

By default, the spyhelpviewer utility searches for the netscape
executable in your machine’s path for displaying the HTML files. Use
the SG_HTML_BROWSER environment variable to set your HTML
Browser.
FIGURE 1. SpyGlass HTML-based On-line Help System
The HTML-based Online Help system has the following:

1. The Contents tab that shows all topics arranged in a hierarchical tree
2. The Index tab that has the index entries for the complete
documentation set
3. The Search tab for search across the complete documentation set
4. The Favorites tab for collecting a set of related topics for viewing

5. The Topic display page
System Requirements
The HTML-based On-line Help system works on a UNIX computer
running version 4 or later of Internet Explorer or Netscape or a current
version of Mozilla, or Safari. The underlaying engine has also been
tested with Mozilla. JavaScript must be enabled in the user's browser.
To view the Java implementation of the Help system, Java must be
enabled in the user's browser.
Known Limitations
1. Netscape 6.0 is not supported on any platform; Netscape 6.1 and
later are supported.
2. The underlaying engine may also work with Opera and other
browsers, but it has been tested only with Internet Explorer,
Netscape, Mozilla, and Safari.


The SpyGlass
Configuration File
Overview
The Atrenta® SpyGlass® Predictive Analyzer has a Configuration File
feature using which you can specify configuration settings like default
startup mode (the SpyGlass Design Environment, Atrenta Console, or
batch), default policy to be run, default language setting, default report
format etc.
The setup information in a SpyGlass Configuration file is transparently
and automatically read by SpyGlass. Thus, it differs from a command
file that must be always specified using the -f command-line option.
SpyGlass Configuration file defines working defaults that are lower
priority and can be overridden by settings in a command file or directly
through command-line.
The SpyGlass Configuration File is an ASCII text file named
.spyglass.setup that can be located in four different locations so that you
set four levels of configuration settings:

Structure of SpyGlass Configuration File
1. A SpyGlass Configuration File specified using the -configfile

2. A SpyGlass Configuration File located in the Current Working
Directory (as set in the SpyGlass Design Environment).
3. A SpyGlass Configuration File located in your Home directory
($HOME)
4. A SpyGlass Configuration File located in SpyGlass Installation
Directory (<your-inst-dir>/SPYGLASS_HOME)
You can have a separate SpyGlass Configuration File in each of the
four locations or a combination of these locations.
The configuration settings in a SpyGlass Configuration File specified
using the -configfile command-line option has the highest priority
followed by those in a SpyGlass Configuration File located in the
Current Working Directory, and then those in a SpyGlass
Configuration File located in the User’s Home directory and then those
in a SpyGlass Configuration File located in the SpyGlass installation
Directory.

The SpyGlass Configuration File (the .spyglass.setup file) contains the
different configuration settings in following format:
[ DEFAULT_STARTUP_MODE = gui | batch ]
[ USE_32_BIT_EXECUTABLE_ONLY = no | yes ]
[ DEFAULT_LANGUAGE_MODE = VHDL | Verilog | mixed | def | none ]

[ DEFAULT_TEMPLATE = <template-name> | none ]
[ DEFAULT_TEMPLATE_DIRECTORY = GUIDEWARE_NEW_RTL
| GUIDEWARE_IP_RTL
| GUIDEWARE_IP_NETLIST
| GUIDEWARE_SOC
[ DEFAULT_POLICY = <policy-list> ]
[ DEFAULT_POLICY_FOR_SPYEXPLAIN = <policy-list> | none | all ]

The SpyGlass Configuration File
[ DEFAULT_REPORT_FORMAT = moresimple | none | <report-name> ]

[ DEFAULT_REPORT_FORMAT_FOR_SLC = <report-name> ]
[ DEFAULT_PRAGMA = default | none | <pragma-name-list> ]
[ DEFAULT_BBOX_MODEL = BBOX_ILM | BBOX_CELLDEFINE |
BBOX_LIBCELL | BBOX_ENCRYPTED_LIB
<any combination> | NONE ]
[ AUTOENABLE_RULEGROUP_PARAMETER_CONTROL = no | yes ]
[ AUTOENABLE_MEMORY_HANDLING = no | yes ]
[ AUTOENABLE_HUGE_SCHEMATIC_DISPLAY = no | yes ]
[ VHDL_LIB_MAP = SYNOPSYS
$SPYGLASS_HOME/vhdl_libs/$SPYGLASS_PLATFORM/SYNOPSYS |
{ VHDL_LIB_MAP = <logical-lib-name> <physical-path> }]
[ AUTOENABLE_VHDL_SORT = no | yes ]
[ DEFAULT_VHDL_SORT_METHOD = lexical | jaguar ]
[ AUTOENABLE_INFERBLACKBOX = no | yes | yes_netlist | yes_rtl ]

[ AUTOENABLE_PRECOMPILED_VLOG = no | yes ]
[{ COMMAND_OPTION_FILENAME = <file-name> }]
[{ COMMAND_FILE_ARGS = <arg-list> }]
[ SGDC_INCLUDE_FILE_PATH = <dir-name> ]
[ OVERLOAD = <named-overload-list> ]
[ DEFAULT_SLF_CONFIG_FILE = <file-name> ]
[ SDE_CONFIG_OPTIONS = COLLAPSE_POLICY_WINDOW |
COLLAPSE_RULE_WINDOW = yes | no ]
[ AUTOENABLE_BUILTIN_CHECKS_FOR_POLICY = <policy-list> ]
NOTE: The default value of each configuration setting is shown underlined.

The default value is applicable if the corresponding configuration setting is not
found in the SpyGlass Configuration File(s).
1. The SpyGlass Configuration file can have comments of -- format
(VHDL-like comments), // format (Verilog-like comments), or
# format (SpyGlass common format).

2. The SPYGLASS_HOME environment variable is supported in a

Configuration File and is appropriately set to the SpyGlass Home
directory when SpyGlass is run. All user-defined environment
variables are supported in a Configuration File just like in a
command file.
3. The Configuration File support replaces the currently available
.spyrc feature from SpyGlass version 3.3.0 onwards. Thus, it is
recommended that you move to the SpyGlass Configuration File
method as the .spyrc feature may be removed in a future release.
General Configuration Settings
DEFAULT_STARTUP_MODE
The DEFAULT_STARTUP_MODE key sets the SpyGlass startup mode
as the SpyGlass Design Environment mode, Atrenta Console mode or
batch mode.
You can change the startup mode to batch mode, Atrenta Console
mode, or SpyGlass Design Environment mode by changing the value of
the DEFAULT_STARTUP_MODE key as follows:
• gui sde: Sets SpyGlass Design Environment as the startup mode
• gui: Sets Atrenta Console as the startup mode
• gui console: Sets Atrenta Console as the startup mode
• batch: Sets batch as the startup mode
NOTE: By default, the startup mode is the Atrenta Console mode (key value
gui).
The DEFAULT_STARTUP_MODE key can be overridden by the -gui
or -batch command-line options for values batch and gui
respectively.

DEFAULT_EXE_TYPE_ON_64BIT
The DEFAULT_EXE_TYPE_ON_64BIT key sets the default
executable binaries (64-bit or 32-bit) to be executed for SpyGlass and
spyglass_lc on 64-bit architectures.
By default, 64-bit SpyGlass binaries are executed on 64-bit
architectures. To specify 32-bit binaries to be executed on 64-bit
architectures, set the value of the DEFAULT_EXE_TYPE_ON_64BIT
key to 32.
The DEFAULT_EXE_TYPE_ON_64BIT key can be overridden by the
-32bit or -64bit command-line options for values 64 and 32
respectively.
USE_32_BIT_EXECUTABLE_ONLY
The USE_32_BIT_EXECUTABLE_ONLY key has been deprecated as
this key was used only for 64-bit HP platform which is no longer
supported.
Policy and Rules Configuration Settings
DEFAULT_LANGUAGE_MODE
The DEFAULT_LANGUAGE_MODE key sets the language for the HDL
sources for SpyGlass analysis if no language command-line option
(-vhdl, -verilog, -mixed, or -def) is specified either directly
or through -f file(s) on the command-line.
If this setting is not available, you must specify the language at
command-line or a command file.
The DEFAULT_LANGUAGE_MODE key can be overridden by any of
the language command-line options (-vhdl, -verilog, -mixed, or
-def).

DEFAULT_TEMPLATE
The DEFAULT_TEMPLATE key sets the template to be run if neither
the -template nor the -policy/-policies command-line
option is specified either directly or through -f file(s) on the
command-line.
By default, SpyGlass does not pick any template.
You can set the value to a desired template in the
<methodology-name>/<template-name> format. For
example, the following setting sets the default template to be the
Coverage template of the DFT methodology:
DEFAULT_TEMPLATE = DFT/Coverage
You can also set a custom template as the default template. Just ensure
that the full path to the methodology directory is specified using the -I
command-line option while invoking SpyGlass. For example, you have
template named myTemplate1 located in /usr/john/myTemplates
directory. Then, set the DEFAULT_TEMPLATE key as follows:
DEFAULT_TEMPLATE = myTemplates/myTemplate1
Also, invoke SpyGlass with the following command-line option
(besides other standard options):
spyglass ... -I /usr/john ...
The DEFAULT_TEMPLATE key can be overridden by the
-template command-line option.
NOTE: When no template or policy is running, SpyGlass runs
-policy=none.
DEFAULT_TEMPLATE_DIRECTORY
The DEFAULT_TEMPLATE_DIRECTORY key sets the template
directory.
You can set the DEFAULT_TEMPLATE_DIRECTORY key to the

following values:
Value Indicates
GUIDEWARE_NEW_RTL (Default) The GuideWare templates forthe
New_RTL methodology (installed at <your-inst-
dir>/SPYGLASS_HOME/GuideWare/New_RTL
directory)
GUIDEWARE_IP_RTL The GuideWare templates forthe IP_RTL
SPYGLASS_HOME/GuideWare/IP_RTL
directory)
GUIDEWARE_IP_NETLIST The GuideWare templates forthe IP_RTL
SPYGLASS_HOME/GuideWare/IP_netlist
directory)
GUIDEWARE_SOC The GuideWare templates forthe SoC
SPYGLASS_HOME/GuideWare/SoC directory)
The DEFAULT_TEMPLATE_DIRECTORY key can be overridden by

the -templatedir command-line option.
DEFAULT_POLICY
The DEFAULT_POLICY key locks the licence of the policy/policies to
be run while invoking the SpyGlass Design Environment if none of the
-policy/-policies and -template/-templates
command-line options is specified directly at the command line.
While invoking SpyGlass Design Environment, if you do not use the
DEFAULT_POLICY key and try to run a policy, it might be possible
that the license for the same policy is checked out by some other user.
To avoid such a situation, you can lock the license for that policy/
policies to be run by specifying them using the DEFAULT_POLICY
key.
You should specify the policy names separated by a space.

The DEFAULT_POLICY key can be overridden by the -policy/

-policies or -template/-templates command-line options.
DEFAULT_POLICY_FOR_SPYEXPLAIN
The DEFAULT_POLICY_FOR_SPYEXPLAIN key sets the default
policy to search with the spyexplain utility if the -policy/
-policies command-line option is not specified directly on the
command-line.
SpyGlass searches all installed policies by default if you have not
specified any policy on the command-line.
To search a specified policy by default, set the policy mnemonic as the
value. You can also specify multiple policy mnemonics as a space- or
comma-separated single-line list.
You can set the value to none to disable searching any policy
including the SpyGlass Built-in policies.
The DEFAULT_POLICY_FOR_SPYEXPLAIN key can be overridden
by the -policy/-policies command-line option.
DEFAULT_REPORT_FORMAT
The DEFAULT_REPORT_FORMAT key sets the default report format
in which messages will be reported at end of SpyGlass run if the
-report command-line option is not specified either directly or
through -f file(s) on the command-line.
By default, the SpyGlass run generates The moresimple report.
You can set the value to none to disable this setting and not print any
report at the end of SpyGlass run (that is, same behavior as
-noreport command-line option).
The DEFAULT_REPORT_FORMAT key can be overridden by the
-report command-line option.

DEFAULT_REPORT_FORMAT_FOR_SLC
The DEFAULT_REPORT_FORMAT_FOR_SLC key sets the default
report format in which messages will be reported at end of a SpyGlass
Library Compiler run if the -report command-line option is not
specified either directly or through -f file(s) on the command-line.
DEFAULT_PRAGMA
The DEFAULT_PRAGMA key sets the pragma keywords.
By default, SpyGlass assumes synopsys as pragma keyword for
Verilog designs and synopsys and pragma as pragma keywords for
VHDL designs.
Set the name of the default pragma keyword as the value. You can also
specify multiple pragma keywords as a space- or comma-separated
single-line list.
You can set the value to none to disable this setting (that is, same
behavior as -pragma=nopragma command-line behavior).
DEFAULT_BBOX_MODEL
The DEFAULT_BBOX_MODEL key allows you to define the
BBOX_MODEL type(s) to be recognized for SpyGlass rule-checking.
By default, the DEFAULT_BBOX_MODEL configuration key is set to
BBOX_LIBCELL so that only the SpyGlass Library Compiler-
generated cells are considered as the BBOX_MODEL type.
You can set the DEFAULT_BBOX_MODEL configuration key to
BBOX_ILM for user-defined BBOX_MODEL types,
BBOX_CELLDEFINE for Verilog 'celldefine modules,
BBOX_LIBCELL for the SpyGlass Library Compiler-generated cells,
BBOX_ENCRYPTED_LIB for the Precompiled and encrypted library
cells, or any combination of these values as a space- or comma-
separated list.

You can also set the DEFAULT_BBOX_MODEL configuration key to

NONE to disable the feature.
See Reporting Messages at Module Boundary for more details.
AUTOENABLE_RULEGROUP_PARAMETER_CONTROL
The AUTOENABLE_RULEGROUP_PARAMETER_CONTROL key
allows you to specify whether the rules of a rule group specified with
the -rules command-line option are always run or are run according
to their rule-running condition.
By default, the
AUTOENABLE_RULEGROUP_PARAMETER_CONTROL configuration
key is set to no so that the rules of a rule group specified with the
-rules command-line option are run irrespective of their rule-
running conditions. Also, rules that are enabled/disabled by a boolean-
type rule parameter (for example, the -fast rule parameter in the Lint
policy disables some rules) are run irrespective of the rule parameter
status.
You can set the
AUTOENABLE_RULEGROUP_PARAMETER_CONTROL configuration
key to yes so that the rules of a rule group specified with the -rules
command-line option are run according to their rule-running condition.
A rule that is switched off by default will not be run. Also, rules that are
enabled/disabled by a boolean-type rule parameter are run based on the
rule parameter status only.
AUTOENABLE_MEMORY_HANDLING
The AUTOENABLE_MEMORY_HANDLING key enables The Memory
Reduction Feature.
By default, the AUTOENABLE_MEMORY_HANDLING key is set to no
and the Memory Reduction feature is not enabled.

AUTOENABLE_HUGE_SCHEMATIC_DISPLAY
The AUTOENABLE_HUGE_SCHEMATIC_DISPLAY key allows you
to load huge schematics in the Modular Schematic window of the
By default, such schematics are not loaded.
SDE_CONFIG_OPTIONS
The SDE_CONFIG_OPTIONS key allows you to expand/collapse the
Policies or Rules sections in the Policies/Rules/Parameters window.
The SDE_CONFIG_OPTIONS key accepts the
COLLAPSE_POLICY_WINDOW and COLLAPSE_RULE_WINDOW as
arguments. If the value of either/both arguments is set to yes, then that
section (Policies/Rules) is collapsed. For example,
SDE_CONFIG_OPTIONS=COLLAPSE_POLICY_WINDOW=yes
If you expand/collapse a section once, then that state of the window is
preserved for later sessions.
NOTE: The SDE_CONFIG_OPTIONS key is not available in SpyGlass by
default. You need to make this entry manually in the .spylgass.setup file.
AUTOENABLE_BUILTIN_CHECKS_FOR_POLICY
The AUTOENABLE_BUILTIN_CHECKS_FOR_POLICY key allows
you to run built-in rules of policies specified in its value list,
irrespective of rule set selected from command-line or templates.
Policies specified in this list are loaded and built-in rules are run in
following situations:
• While precompiling your design (command line option -noelab
has been specified):
• The -norules command line option has been specified
• No policy has been specified on the command-line.

In case some policies are specified on command-line, built-in rules

are enabled irrespective of the rule set selected from command-line
or templates for the policies that are common in the list specified by
the -policy option and that specified in the config key.
• Rules are run without the -noelab command line option. For
policies that are common in the list specified by the -policy
option and that specified in the config key, built-in rules are enabled
irrespective of the rule set selected from the command-line or
templates.
Configuration Settings for VHDL Designs
VHDL_LIB_MAP
The VHDL_LIB_MAP key sets the default VHDL Library mappings.
This configuration setting is equivalent to the -lib <logical-
lib-name> <physical-path> command-line behavior.
By default, the VHDL_LIB_MAP key is set to the following value:
SYNOPSYS $SPYGLASS_HOME/vhdl_libs/$SPYGLASS_PLATFORM/SYNOPSYS
VHDL_LIB_MAP Configuration Setting can be repeated for
specification of multiple logical library maps. However, for any one
logical library name, only one setting is taken as per order of
precedence defined earlier. The value specified for a logical library
map in a command file or command-line have higher precedence than
this specification. When SpyGlass is run, library map of all logical
libraries as defined in either configuration file or command-file is
taken. For example, if library L1 and L2 are mapped in the
Configuration File and library L3 and L4 are mapped in a specified
command file, then SpyGlass is run with all four library map
arguments.
The VHDL_LIB_MAP Configuration Setting also has an additive
effect. Thus, a VHDL library mapping specified using the

VHDL_LIB_MAP Configuration Setting that is not specified either

directly on command-line or through a command file, is added to
SpyGlass command-line in addition to other VHDL library mappings
specified either directly on command-line or through a command file.
The VHDL_LIB_MAP Configuration Setting has an additive effect for
multiple-level Configuration Files. Thus, different VHDL library
mappings specified using the VHDL_LIB_MAP Configuration Setting
at different Configuration File levels, are all added to SpyGlass
command-line options.
AUTOENABLE_VHDL_SORT
The AUTOENABLE_VHDL_SORT key sets automatic sorting of VHDL
source files.
By default, the AUTOENABLE_VHDL_SORT key is set to no and the
automatic sorting feature is disabled.
You can set the value of the AUTOENABLE_VHDL_SORT key to yes
to enable the automatic sorting feature and specify the sorting
algorithm using the DEFAULT_VHDL_SORT_METHOD key.
The AUTOENABLE_VHDL_SORT key can be overridden by the
-sort or -disable_sort command-line options.
DEFAULT_VHDL_SORT_METHOD
The DEFAULT_VHDL_SORT_METHOD key sets the algorithm type for
SpyGlass automatic VHDL file sorting feature.
By default, the DEFAULT_VHDL_SORT_METHOD key is set to
jaguar and the special automatic sorting algorithm is enabled.
You can set the following values to the

DEFAULT_VHDL_SORT_METHOD key:
Value Effect
lexical Equivalent to specifying the -sort=lexical command-line option
jaguar Equivalent to specifying the -sort=jaguar command-line option
The DEFAULT_VHDL_SORT_METHOD key can be overridden by the

-sort=lexical or -sort=jaguar command-line options.
In case you are okay with the default sorting technique specified in the
configuration file(s) (the last one takes the priority), then simply
specify the -sort option on the command-line to enable sorting of
VHDL files based on this default sorting technique.
Configuration Settings for Verilog Designs
AUTOENABLE_INFERBLACKBOX
The AUTOENABLE_INFERBLACKBOX key sets whether the SpyGlass
Inferblackbox feature is enabled for all design phases, is enabled for a
particular design phase, or is disabled.
By default, the AUTOENABLE_INFERBLACKBOX key is set to yes
and the feature is enabled for both RTL and Netlist phases.
You can set the following values to the
AUTOENABLE_INFERBLACKBOX key:
Value Effect
yes or Equivalent to specifying the -inferblackbox command-line
yes_netlist option
yes_rtl Equivalent to specifying the -inferblackbox_rtl
command-line option
no Do nothing
The AUTOENABLE_INFERBLACKBOX key can be overridden by the

-inferblackbox, -inferblackbox_rtl, or
-disable_inferblackbox command-line options.
AUTOENABLE_PRECOMPILED_VLOG
The AUTOENABLE_PRECOMPILED_VLOG key enables the SpyGlass
support of pre-compiled Verilog libraries.
To enable pre-compiled Verilog library support, you need to supply the
-enable_precompile_vlog command-line option.
Setting the AUTOENABLE_PRECOMPILED_VLOG key to yes is
equivalent to supplying the -enable_precompile_vlog
Other Configuration Settings

The following configuration settings have no default values and require
you to set the values:
COMMAND_OPTION_FILENAME
The COMMAND_OPTION_FILENAME key specifies the default
command file.
This configuration setting is equivalent to the -f <file-name>
command-line behavior. The file specified with the
COMMAND_OPTION_FILENAME key is always read before any actual
command-line options.
You can supply this configuration setting multiple times in one
Configuration File.
The COMMAND_OPTION_FILENAME configuration setting also has
an additive effect. Thus, command files specified at any level
(Configuration File(s), command-line, or in a command file) are all
supplied to SpyGlass.

COMMAND_FILE_ARGS
The COMMAND_FILE_ARGS key lets you specify the contents of a -f
command file inline inside the Configuration File.
A COMMAND_FILE_ARGS configuration setting must have its value in
the same line where the key is specified and it cannot span multiple
lines. However, you can have multiple specifications of the
COMMAND_FILE_ARGS key in the same configuration file and the
result of adding all these specifications will be used during the
SpyGlass run. Also, the contents of this key in various configuration
files are added (and not replaced as true for most of the other keys) and
used for the SpyGlass run. This key is more convenient to use when
you have concise -f listing for the configuration file and this option
saves the overhead of creating a separate -f file and then using it
inside the configuration file.
SGDC_INCLUDE_FILE_PATH
The SGDC_INCLUDE_FILE_PATH key allows you to specify the
path from where included SpyGlass Design Constraints files can be
picked up.
By default, the SGDC_INCLUDE_FILE_PATH key is not set and the
included SGDC files (specified using the INCLUDE directive in an
SGDC file) are searched and included as follows:
1. If included SGDC file name is an absolute file name, then the
specified file at the specified location is included.
2. If included SGDC file name is a relative file name, then the included
SGDC file is searched in the relative directory location with respect
to the location of the parent SGDC file.
3. If the included SGDC file name is any other type of file name (that is
the file name does not start with / (first case above) or . (second case
above), then the included SGDC file is searched with respect to the
location of the parent SGDC file.

Use the SGDC_INCLUDE_FILE_PATH key to specify a different

location for the last case above. Then, you can include company-,
project-, or user-specific SGDC files without needing to specify exact
path in each INCLUDE specification.
You can specify a space-separated list of directory names with the
SGDC_INCLUDE_FILE_PATH key as in the following example:
SGDC_INCLUDE_FILE_PATH = /usr/corporate/sgdc
/usr/projectfiles/sgdc /usr/john/mySGDC
You can also specify comma-separated or colon-separated lists of
directory names.
The included SGDC files are searched in the specified directories in the
same order in which they are specified with the
SGDC_INCLUDE_FILE_PATH key.
NOTE: In the last case, the included SGDC files are first searched with respect
to the location of the parent SGDC file. Only if they are not found in these
locations, the directories specified with the
SGDC_INCLUDE_FILE_PATH key are searched.
OVERLOAD
The OVERLOAD key lets you specify the default named overloads.
By default, SpyGlass assumes no named overload. You can specify the
named overloads as a space-separated list as in the following example:
OVERLOAD = CAD BOB METEOR
To disable named overloads, specify the OVERLOAD key with none
value (that is, same behavior as -policies=none command-line
behavior).
To set an additive behavior of the OVERLOAD key, use the
OVERLOAD value. Consider the following example configuration

files:
Configuration File OVERLOAD Key Setting

$SPYGLASS_HOME/.spyglass.setup OVERLOAD = CAD2
$HOME/.spyglass.setup OVERLOAD = OVERLOAD METEOR
$CWD/.spyglass.setup OVERLOAD = BOB OVERLOAD
The OVERLOAD value (shown in green color) in the $HOME/

.spyglass.setup file indicates that SpyGlass should include the
OVERLOAD key setting from the lower-precedence configuration file
(that is, $SPYGLASS_HOME/.spyglass.setup file). Similarly, the
OVERLOAD value (shown in red color) in the $CWD/.spyglass.setup file
indicates that SpyGlass should include the OVERLOAD key setting
from the lower-precedence configuration file (that is, $HOME/
.spyglass.setup file). Therefore, the effective value of the OVERLOAD
key is as follows:
OVERLOAD = BOB CAD2 METEOR
SPYGLASS_DISPLAY_LANGUAGE
The SPYGLASS_DISPLAY_LANGUAGE key lets you specify the
SpyGlass display language for messages and waivers.
NOTE: All other items are always in the English language.
The valid values of the SPYGLASS_DISPLAY_LANGUAGE key are
en (for English) and ja (for Japanese).
By default, the SPYGLASS_DISPLAY_LANGUAGE key is not set and
all display is in the English language. Use the
SPYGLASS_DISPLAY_LANGUAGE key to specify a different display
language. For example, the following specification sets Japanese as the
SpyGlass display language:
SPYGLASS_DISPLAY_LANGUAGE = ja
The SPYGLASS_DISPLAY_LANGUAGE key can be overridden by the
-lang command-line option.

DEFAULT_SLF_CONFIG_FILE
The DEFAULT_SLF_CONFIG_FILE key specifies the name of a text
file that contains the names of the library attributes not to be reported as
un-supported by the SpyGlass Library Compiler.
The format of the text file contents is as follows:
IGNORE_LIB_CONSTRUCT =
{
[<attr-group>::]<attr-name>
...
}
Here, <attr-group> is the name of a library attribute group and
<attr-name> is the name of a library attribute that belongs to the
library attribute group <attr-group>. Thus, the following example
suppresses the warnings for all instances of time_unit library
attribute under the pin library group:
{
...
pin::time_unit
...
}
Specifying <attr-group> is optional. Thus, you can just specify the
library attribute name to ignore it under all applicable library attribute
groups. Thus, the following example causes library attribute direction
to be ignored under all its applicable library attribute groups:
{
...
direction
...
}

You can add comments in the text file using the #-type comment
format.
AUTOENABLE_GATESLIB_AUTOCOMPILE
The AUTOENABLE_GATESLIB_AUTOCOMPILE key allows you to
automatically compile the gate libraries (.lib) to SpyGlass-compatible
format library files (.sglib).
By default, the value of this key is set to no and the auto compilation of
gate libraries does not occur. You can set the value to yes or
yes_forced to enable auto compilation of the gate libraries.
If set to yes, then given .lib files are compiled to .sglib file unless there
is an up-to-date copy in the cache directory. However, if set to
yes_forced then any criteria for re-compilation of gate libraries will
not be evaluated. In such case, the specified .lib files will always get
compiled and overwrite the existing .sglib file present in the cache
directory.
The AUTOENABLE_GATESLIB_AUTOCOMPILE key value set to
yes or yes_forced can be overridden by the
-disable_gateslib_autocompile command-line option. In
this case, the auto-compilation is triggered by specifying the
-enable_gateslib_autocompile and/or
-force_gateslib_autocompile command-line option.
Similarly, if value of this key is no then you can enable auto-
compilation by specifying the -
enable_gateslib_autocompile command-line option.

SpyGlass Functional
Signal Processing
Recognizing Clocks
Different Atrenta Standard Policies process clock information based on
their specific rule-checking requirements. See the respective Policy
Rules Reference document for details.
The following table summarizes how different Atrenta Standard
Policies process clock information:
Task Lint STARC Clock-Reset DFT

Clocks Used For Automatic User-specified User-specified User-specified
Analysis Detection (for only two clocks and their
rules) domains
Identification of Stops at Stops at Goes beyond Stops at
Clocksa combinational combinational combinational combinational
gates gates gates gates

Recognizing Clocks
Task Lint STARC Clock-Reset DFT

Specification of Not possible Allowed (for only Allowed including Allowed but only
Clocks two rules) internal nodes as external pins/
clocks ports can be
specified
Clock Domain Same as clock Same as clock User-specified Same as clock
source source domain for each source
clock
Simple Divider Divided clock Divided clock Divided clock Divided clock
treated as a treated as a treated as a treated as a
different domain different domain different but different source
from the Master from the Master related domain and thus domain
clock clock from the Master from the Master
clock clock
Design Not supported Not supported Supported from Always supported
Constraints 3.2.0
a. Clocks are identified by traversing backwards from each flip-flop's clock pin. The identified clocks might
be used for all clock-related rules (as in Lint Policy), or may just be Informative for the users (as in Clock-
Reset Policy).

Mixed-Language Design
Syntax and Semantics
Requirements
Overview
This chapter describes the commonly accepted Mixed-Language design
syntax and semantics requirements.
NOTE: SpyGlass will be implementing these requirements in phases over
releases. See Current Limitations for requirements not yet implemented in the
current version.
Mixed-Language Design Syntax and Semantics

Requirements
A Mixed-Language design contains both Verilog and VHDL design
units. Design units described in one HDL can contain instantiations of
design units described in the other HDL. This section provides details
of Verilog and VHDL language syntax and semantics that impact the
use model of SpyGlass for a mixed-language design.

Mixed-Language Design Syntax and Semantics Requirements
Instantiation of Verilog Modules in VHDL Architectures

A Verilog module can be instantiated inside a VHDL architecture as
either an entity instance or as a component instance.
For component instances, you need to first create a component
declaration. For default binding, (i.e., when binding is not done through
component configuration), the component name, port names, and
generic names should be same as the corresponding Verilog identifiers
for module name, port names, and parameter names. Number of ports
or generics and their bit-width in VHDL component declaration must
be same as those of ports or parameters in Verilog module definition.
An example of instantiating a Verilog Module in a VHDL design unit
as a component instance using default binding is as follows:
//test.v
module comp (a, b);
input a;
output b;
...
endmodule
--test.vhd
entity ent is
port (entIn : in std_logic;
entOut : out std_logic);
end ent;
architecture Behave of ent is

component comp
port (a : in std_logic; b : out std_logic );
end component ;
begin
Inst1 : comp port map ( a => entIn, b => entOut );
...
end Behave;

For configuration specification based binding, the component name,

port names, and generic names can be same or different from the
corresponding Verilog identifiers for module name, port names, and
parameter names. However, the number of ports or generics and their
bit-width in VHDL component declaration must be same as those of
ports or parameters in Verilog module definition.
as a component instance using configuration specification based
binding is as follows:
//test.v
module comp (A1, B1);

input A1;
output B1;
...
endmodule
-- test.vhd
entity top is
port (in1 : in std_logic; out1 : out std_logic);
end top;
architecture arch_top of top is

component my_comp1
port (C1 : in std_logic; D1 : out std_logic);
end component;
for inst1 : my_comp1 use entity work.comp

port map (A1 => C1, B1 => D1);
begin
inst1 : my_comp1 port map (C1 => in1, D1 => out1);
...
end arch_top;
For entity instances, no additional declaration is required. You can

directly instantiate a Verilog module using the VHDL syntax for

instantiation of an entity.
as an entity instance is as follows:
//test.v
module comp (a,b);
input a;
output b;
...
endmodule
--test.vhd
entity ent is
end ent;

begin
Inst1 : entity comp port map
( a => entIn, b => entOut );
...
end Behave;
A configuration declaration can reference Verilog modules wherever
an entity reference was intended. However, it must not extend beyond
the module interface and the instantiations within Verilog module
description will not be accessible to the configuration.
as a configuration declaration is as follows:
//test.v
module comp (a,b);
input a;
output b;
...
endmodule

--test.vhd
entity ent is
end ent;

component mod
port (a : in std_logic; b : out std_logic );
end component ;
begin
Inst1 : mod port map ( a => entIn, b => entOut );
...
end Behave;
configuration config of ent is

for Behave
for Inst1 : mod
use entity work.comp(<identifier>);
end for;
end for;
end configuration;
NOTE: The <identifier> is tool-specific. For SpyGlass, the
<identifier> is verilog or module.
In a given design, SpyGlass searches for master of an instance in
VHDL architecture as per following order:
• VHDL source files
• Precompiled VHDL libraries
• Verilog source files
• Verilog libraries specified using the -v/-y options
• Precompiled Verilog libraries

• SpyGlass compatible Synopsys Liberty™ file specified using the -

sglib command-line option.
Restrictions
Mixed-Language semantics impose the following restrictions on use of
any of the above instantiations:
1. The design unit being instantiated should be a Verilog module. The
Verilog built-in gate or UDP cannot be instantiated.
2. All ports in Verilog module should be named port. Unnamed ports
are not supported.
Instantiation of VHDL Design Units In Verilog Modules

A VHDL design unit can be instantiated in Verilog modules just like
any Verilog module instantiation. Since Verilog does not have the
concept of architecture or libraries, the escaped identifier is used to
describe the instantiation from a specific library. The following table
describes the allowed format and their interpretations:
Format Means...
\myLibrary.myEntity(myArch) Architecture myArch of entity myEntity from
logical library myLibrary
\myEntity(myArch) Architecture myArch of entity myEntity from
logical library work
\myLibrary.myEntity MRA Architecture of entity myEntity from logical
library myLibrary
\myLibrary.myConfigDecl Configuration declaration myConfigDecl from
logical library myLibrary
myName Either configuration declaration or entity myName
from logical library work

In a given design, SpyGlass searches for master of an instance in a

Verilog module as per following order:
• Verilog source files
• Verilog libraries specified using the -v/-y options
• Precompiled Verilog libraries
• VHDL source files
• Precompiled VHDL libraries
• SpyGlass compatible Synopsys Liberty™ file specified using the -
sglib command-line option
Examples of Instantiating VHDL Design Units in Verilog Modules
Instantiating Architecture myArch of entity myEntity from

logical library myLibrary (\myLibrary.myEntity(myArch))
--test.vhd
entity ent is
entOut : out std_logic );
end ent;

begin
...
end Behave;
//test.v
module mod (a,b);
input a;
output b;
\mylib.ent(Behave) inst1(a,b);
...

endmodule
Instantiating Configuration Declaration myConfigDecl from

logical library myLibrary (\myLibrary.myConfigDecl)
--test.vhd
entity ent is
entOut : out std_logic );
end ent;

begin
...
end Behave;
configuration config of ent is

for Behave
end for;
end configuration;
//test.v
module mod (a,b);
input a;
output b;
\mylib.config inst1(a,b);
...
endmodule
Referencing VHDL Records across Language Boundaries

The following example shows how to reference VHDL Records across
language boundaries:
//test.v
module e1 (in1, in2, out1);

input in1, in2;

output out1;
...
endmodule
--test.vhd
entity top is
...
end top;
architecture top of top is

type X is record
f1 : bit;
f2 : bit;
f3 : bit;
end record;
signal sig : X ;
component e1
port (in1, in2 : bit; out1 : out bit);
end component;
begin
inst : e1 port map(
in1 => sig.f1,
in2 => sig.f2,
out1 => sig.f3);
...
end top;
Mapping Data Types

Instantiation of a design unit described in one HDL inside another
design unit implemented in the other HDL requires certain adaptations
and data type conversions at port and generic/parameter interface. For

example, VHDL instantiation of a Verilog module can associate VHDL

signals and values with Verilog ports and parameters. Likewise, Verilog
instantiation of a VHDL design unit can associate Verilog nets and
value with VHDL ports and generics.
Mapping between VHDL Generics and Verilog Parameters

An instance of VHDL design unit in a Verilog module can override
default generic values through appropriate parameter mapping.
Similarly, an instance of a Verilog module inside a VHDL design unit
can override default parameter values through appropriate generic
mapping. Mixed-Language support in SpyGlass supports the following
data-mapping:
VHDL Generic Type Verilog Parameter Type

VHDL integer Verilog integer
VHDL real Verilog real
VHDL time Verilog integer or real (multiplied with appropriate timescale
directive)
VHDL string Verilog string
VHDL enumeration Verilog integer based on ‘VAL() attribute in VHDL
VHDL Port Mapping to Verilog Ports

Verilog ports are based on language-defined data type that supports
both logic simulation at logic 0/1/X/Z level as well as signal strength
modeling for transistor circuit simulation. For the Mixed-Language
support in SpyGlass, only Verilog logic level based on 0/1/X/Z logic is
supported and is mapped to following data type in VHDL:
1. bit or std_logic
2. bit_vector or std_logic_vector

Index
Index Edit policy 163

Find rule 157
Hierarchical Schematic view 222
Symbols
Incremental Schematic view 222
125
.vdb file Jump To Focus 386
naming 161 Next Sink 386
opening 161 Next Source 386
NSS Options 341
A Parameters 154
About SpyGlass 213 Previous Sink 386
viewing 213 Previous Source 386
analysis 163, 219 Probing Modes 385
analyze all 163 Run/Stop 219
area policy 58 WAIVER 223
arrays 476 Waveform Viewer 222
Atrenta standard policies 58 buttons
area 58 toolbar 216
clock-reset 58
constraints 59 C
dft 58 case sensitive search 115
erc 58 clear policies 150
latch 58 clear working directory
list 58 Verilog options 121
LowPower 59 VHDL options 123
miscellaneous 58 clock-reset policy 58
openmore 58 command line options 127
starc 58 connectivity checks 43, 476
timing 58 constraints policy 59
automatic report 71 count report 77
available reports 71 viewing 209
create source file 135
B
backward search 115 D
black-box modules 125 deactivate all policies 150
button deactivate all rules 150
Clear 150 DEF
Convert Found Files 135 language selection 132, 639
Create 135 def 639

Index
default policies 150 VHDL 136

defining top-level units 427 name VDB file 161
dependency tree 450 openVDB 161
design files conversion 135 file view 227
design view 239 File/Design/Constraints window 225
dft policy 58 files
directories library
include Verilog 142
Verilog 143 find 113
library finding rules 157
Verilog 142 focus 386
work 121, 122, 123
G
E gates library
Edit menu 113 Synopsis 125
Find in source 113 generic 527
edit policies 163 graphical user interface (GUI) 30
editing parameters 154
EDITOR environment variable 114, 232, 257 H
electronic design automation 42 Help menu 213
entities About SpyGlass 213
top level 122 Hierarchical Schematic view 222
erc policy 58 Hierarchical Schematic window 328
exit 113 mousing techniques 336
exiting SDE 113
extensions I
library file 143 include directories
Verilog 143
F Incremental Schematic view 222
-f option 526 Incremental Schematic window 363
file mousing techniques 366
library file extensions 143 inferred logic checks 43, 475
file conversion 135 inline report 78
file extensions viewing 210
library interpretting pragmas 123
Verilog 143
File menu 106 L
Exit 113 language
library 136 DEF 132

Index
mixed 131 M
options 131 macro definitions 119
Verilog 131 macros
VHDL 131 Verilog options 119
latch policy 58 mapping
Legend window library 136
buttons maximum violations by rule name 125
Jump To Focus 386 maximum violations per rule 125
Next Sink 386 memory
Next Source 386 upper threshold 124
Previous Sink 386
Previous Source 386 memory arrays 476
Probing Modes 385 menu
focus selected message 386 Edit 113
focus selected probe 386 File 106
library Help 213
file selection 136 Report 209
VHDL 136 Window 167
mapping 136 menu bar 105
SpyGlass library 125 Edit menu 113
Synopsis Gates Library 125 File menu 106
VHDL libraries 136 Help menu 213
library compiler 164 Report menu 209
library directories Window menu 167
Verilog 142 Message window 279
library file extensions miscellaneous policy 58
Verilog 143 mixed
library files language selection 131
selection 136 modules
Verilog 142 black-box 125
library selection top level 120
VHDL 136 moresimple report 71, 78
library translation 164 viewing 210
line numbers moresimple_rulesort report 80
viewing 168 viewing 211
lint policy 58 mousing techniques
LowPower policy 59 Hierarchical Schematic window 336
Incremental Schematic window 366

Index
N P
name parameter 527
.vbd file 161 parameter selection
naming a .vdb file 161 policies 154
net list checks 43 parameter setting 154
-nopreserve option 477, 702 Perl
NSS Options 341 interface 31
interpreter 31
O policies 147
open area 58
Hierarchical Schematic window 222 Atrenta standard policies 58
Incremental Schematic window 222 Clear button 150
opening clearing 150
.vbd file 161 clock-reset 58
Hierarchical Schematic window 167 constraints 59
Incremental Schematic window 168 Default button 150
OpenMORE Policy 29 dft 58
openmore policy 58 Edit button 163
OpenVDB 161 editing parameters 154
options editing rule selection 163
language 131 erc 58
other 124 latch 58
synthesis 123 lint 58
Verilog 118 lv 59
-verilog 118 miscellaneous 58
VHDL 121 openmore 58
-vhdl 121 parameter selection 154
other options 124 Parameters button 154
black-box modules 125 restore default settings 150
command line 127 rule selection 163
maximum violations by rule name 125 selecting 147
maximum violations per rule 125 starc 58
SpyGlass library files 125 timing 58
SpyGlass output file directory 126 pragma 42
Synopsis Gates Library 125 pragmas 123
output file directory 126 pre-compile
library to RTL 164
Synopsys Liberty files 164

Index
precompiler directives 42 reports available 71

preferences Rule
setting 182 HTML Help 152
preserving instances and nets 702 rule
preserving nets 477 maximum violations 125
probing modes 385 rule primitives 50
rule searching 157
Q rule selection
quitting SDE 113 policies 163
rules
R policies 163
register arrays 476 run analysis 219
Register Transfer Language (RTL) Run Button 219
synthesis engine 43, 475 Run menu
report formats 71 Analysis 163
specifying 72 Lib2RTL 164
standard 72 Library Compiler 164
report generator 70 Policies 147
Report menu 209 Run/Stop Toggle Button 219
count 209
inline 210 S
moresimple 210 schematic
moresimple_rulesort 211 Hierarchical 167, 328
score 211 Incremental 168, 363
simple 212 schematic windows
summary 212 Hierarchical Schematic 222
waiver 213 Incremental Schematic 222
-report option 72 score report 81
reports viewing 211
automatic 71 SDE 30
count 77, 209 exiting 113
inline 78, 210 menu bar 105
moresimple 78, 210 preferences 182
moresimple_rulesort 80, 211 quitting 113
score 81, 211 run analysis 219
simple 84, 212 search 113
summary 85, 212 backwards 115
waiver 86, 213 case sensitive 115

Index
search net simple 84

view sinks 341 summary 85
view source 341 waiver 86
searching rules 157 starc policy 58
searching rules with a string 152 summary report 85
selecting viewing 212
language 131 Synopsis Gates Library 125
DEF 132 synthesis
mixed 131 options 123
Verilog 131 synthesis engine 475
VHDL 131
library files 136
T
policies 147
text files
source file languages 131
viewing 181
VHDL library files 136
threshold 124
selecting source files 263
timing policy 58
setting preferences 182
toolbar
simple report 84
buttons 216
viewing 212
Hierarchical Schematic view button 222
source file 263
Incremental Schematic view button 222
create 135
options 216
source files
Run/Stop toggle button 219
searching 113
top-level entities
selecting 263
VHDL options 122
Source window 263
top-level modules
specifying report format 72
Verilog options 120
SpyGlass
translation
features 30
library to RTL 164
SpyGlass Design Environment (SDE) 30
Synopsys Liberty files 164
SpyGlass library files 125
SpyGlass output file directory 126 U
standard report formats 72 upper threshold 124
standard reports User-Defined Primitives (UDP) 437
count 77
inline 78 V
moresimple 78 VDB file
moresimple_rulesort 80 naming 161
score 81 opening 161

Index
Verilog 29, 30 simple report 212

clear working directory 121 source files 263
include directories 143 summary report 212
language selection 131 text files 181
library directories 142 waiver report 213
library file extensions 143 views
library files 142 design 239
macro definitions 119 file 227
options 118 violation database 70
top-level modules 120 violations
Verilog files conversion 135 maximum by rule name 125
VHDL 29, 30 maximum per rule 125
clear working directory 123
language selection 131 W
library file selection 136 waiver report 86
options 121 viewing 213
selecting library files 136 Window menu 167
top-level entities 122 Line Numbers 168
VHDL87 compatibility mode 122 Preferences 182
working directory 122 View Incremental Schematic 168
VHDL87 compatibility mode View Schematic 167
VHDL options 122 View Text File 181
VHDL87 compatibility mode, compatability mode windows
VHDL87 122 File/Design/Constraints 225
view Hierarchical Schematic 328
Hierarchical Schematic window 222 Incremental Schematic 363
Incremental Schematic window 222 Messages 279
viewing Source 263
About SpyGlass 213 working directory
count report 209 Verilog options 120
Hierarchical Schematic 167 VHDL options 122
Incremental Schematic 168
inline report 210
line numbers 168
moresimple report 210
moresimple_rulesort report 211
preferences 182
score report 211

Index

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SpyGlass® Predictive

Analyzer User Guide

©Copyright 2001-2010 Atrenta, Inc. All rights reserved.

This document is protected by copyright and distributed under licenses

DOCUMENTATION IS PROVIDED “AS IS” AND ALL EXPRESS OR

Atrenta, SpyGlass, and Predictive Analysis are registered trademarks of

Printed in the United States of America.

Introducing the SpyGlass Predictive Analyzer.......................................................... 29

The SpyGlass Predictive Analyzer Concepts ............................................................ 41

Version 4.4.1 October 2010 iii

Processing VHDL Designs ........................................................................................................47

The SpyGlass Rule Environment .......................................................................................... 49

iv October 2010 Version 4.4.1

The moresimple_sevclass report ..............................................................................................80

SpyGlass Useful Files ............................................................................................................95

Using the SpyGlass Design Environment.................................................................. 99

Version 4.4.1 October 2010 v

Messages in the Source Window ............................................................................................103

The SpyGlass Design Environment Menus and Toolbar.........................................105

vi October 2010 Version 4.4.1

Setup > Property Manager......................................................................................................159

The Toolbar ...........................................................................................................................216

Version 4.4.1 October 2010 vii

VDB File Button.......................................................................................................................218

The Status Bar ...................................................................................................................... 223

The SpyGlass Design Environment Windows..........................................................225

viii October 2010 Version 4.4.1

Viewing Blackbox Information .................................................................................................242

The Source Window .............................................................................................................263

Version 4.4.1 October 2010 ix

Docking/Undocking the HDL Navigator Window ............................................................. 278

x October 2010 Version 4.4.1

Modular Schematic Window Menu Bar ............................................................................355

The Incremental Schematic Window ..................................................................................363

Version 4.4.1 October 2010 xi

Edit > Clear All Items...............................................................................................................380

The Legend Window ............................................................................................................ 384

xii October 2010 Version 4.4.1

Options > Clear All Filters .......................................................................................................394

Waveform Viewer Window ...................................................................................................406

Analyzing VHDL Designs........................................................................................... 417

Version 4.4.1 October 2010 xiii

Using the IEEE-1076 VHDL-87 standard ............................................................................ 418

Working with VHDL libraries ............................................................................................... 419

Determining and Setting Design Dependencies ............................................................... 426

Analyzing Verilog Designs .........................................................................................433

xiv October 2010 Version 4.4.1

Working with Pre-compiled Verilog Libraries ....................................................................438

Analyzing Mixed-Language Designs ........................................................................ 461

Version 4.4.1 October 2010 xv

Mixed-Language Design Semantics ................................................................................... 461

Analyzing DEF Designs ..............................................................................................471

Controlling the RTL Synthesis Engine......................................................................475

xvi October 2010 Version 4.4.1

Interpreting Synthesis Pragmas .........................................................................................477

Working with SpyGlass Messages ........................................................................... 481

Handling SpyGlass Built-In Messages ............................................................................... 511

Version 4.4.1 October 2010 xvii