Application Note 52

January 1993

Linear Technology Magazine Circuit Collection, Volume 1

Richard Markell, Editor

Introduction
Over the past several years Linear Technology, the maga-
zine, has come of age. From nothing, the publication has
come into its own, as has its subscriber list. Many innova-
tive circuits have seen the light of day in the pages of our
now hallowed publication.
This Application Note is meant to consolidate the circuits
from the first few years of the magazine in one place.
Circuits herein range from laser diode driver circuits to
data acquisition systems to a 50W high efficiency switcher
circuit. Enough said. I’ll stand aside and let the authors
explain their circuits.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.

CIRCUIT INDEX
A-to-D Converters ..................................................................................................................2
LTC1292: 12-BIT DATA ACQUISITION CIRCUITS .....................................................................................................2
Temperature-Measurement System .....................................................................................................................2
Floating, 12-Bit Data Acquisition System .............................................................................................................2
Differential Temperature Measurement System ...................................................................................................2
MICROPOWER SO8 PACKAGED ADC CIRCUITS .....................................................................................................4
Floating 8-Bit Data Acquisition System ................................................................................................................4
0°C – 70°C Thermometer ....................................................................................................................................5
Interface .............................................................................................................................6
LOW DROPOUT REGULATOR SIMPLIFIES ACTIVE SCSI TERMINATORS ...............................................................6
Power ................................................................................................................................7
LT1110 SUPPLIES 6 VOLTS AT 550mA FROM 2 AA NiCad CELLS ...........................................................................7
50 WATT HIGH EFFICIENCY SWITCHER ..................................................................................................................9
Filters .............................................................................................................................. 10
CASCADED 8TH-ORDER BUTTERWORTH FILTERS PROVIDE STEEP ROLL-OFF LOWPASS FILTER......................10
DC-ACCURATE, PROGRAMMABLE-CUTOFF, FIFTH-ORDER BUTTERWORTH LOWPASS FILTER
REQUIRES NO ON-BOARD CLOCK ........................................................................................................................11
Miscellaneous Circuits.......................................................................................................... 12
A SINGLE CELL LASER DIODE DRIVER USING THE LT1110 .................................................................................12
LT1109 GENERATES VPP FOR FLASH MEMORY ...................................................................................................13
RF LEVELING LOOP ...............................................................................................................................................13
HIGH ACCURACY INSTRUMENTATION AMPLIFIER...............................................................................................14
A FAST, LINEAR, HIGH CURRENT LINE DRIVER ....................................................................................................15

an52f

AN52-1
Application Note 52

A-to-D Converters
LTC1292: 12-BIT DATA ACQUISITION CIRCUITS
by Sammy Lum
Temperature-Measurement System
The circuit in Figure 1 shows how a transducer output,
such as a platinum RTD bridge, can be digitized with one
op amp. This circuit is a modification of that found in
Application Note 43.1 The differential input of the LTC1292
removes the common mode voltage. The LT1006 is used
for amplification. The resistor tied between the + input of
the LT1006 and the +IN input of the LTC1292 is to com-
pensate for the loading of the bridge by resistor RS. Full
scale can be adjusted by the 500kΩ trim pot and offset
can be adjusted by the 100Ω trim pot in series with RS.
A lower RPLAT value than that in AN43 is used here to
improve dynamic range. The signal voltage on the +IN
pin must not exceed VREF. The differential voltage range is
VREF minus approximately 100mV. This is enough range to
measure 0°C to 400°C with 0.1°C resolution.
Floating, 12-Bit Data Acquisition System
The circuit in Figure 2 demonstrates how to float the
LTC1292 to make a differential measurement. This circuit
will digitize a 5V range from 10V to 15V with 12 bits of
1 Williams, Jim, “Bridge Circuits, Marrying Gain and Balance,” Application
Note 43, Linear Technology Corp.
resolution. The digital I/O has been level translated. The
LT1019-5 is used in shunt mode to create the floating
analog ground for the LTC1292. The digital I/O lines make
use of 4.3V Zeners to clamp the single-transistor inverters.
Opto-isolators can also be used. The floating analog ground
should be laid out as a ground plane for the LTC1292. The
47μF bypass capacitor should be tied from the VCC pin to
the floating ground plane with minimum lead length and
placed as close to the device as possible. Likewise, keep
the lead length from the GND pin to the floating ground
plane at a minimum (a low-profile socket is acceptable).
Differential Temperature Measurement System
The circuit in Figure 3 digitizes the difference in tempera-
ture between two locations. The two LM134s are used as
temperature sensors. These are ideally suited for remote
applications because they are current output devices.
This allows long wires to run from the sensor back to
the LTC1292 without any degradation to the signal from
the sensor. Resistor RSET sets the current to 1μA/°K.
The current is converted to a voltage by the resistor R1
connected from V– to ground. The reference voltage and
resistor were selected to give a change of 0.05°C/LSB.
The resolution is given by °C/LSB = VREF / ((4096) (1mA)
(R1)). The maximum temperature at each input is 125°C.

+5V
+15V LT1027
100pF
4.7μF
1μF
TANTALUM
1MΩ**
D0

500kΩ 1N4148
12kΩ* 12.5kΩ*
400°C
TRIM MPU
100Ω
(e.g., 68HC11)
0°C TRIM
– 0.1μF CS VCC
RS
13kΩ** LT1006 +IN CLK SCK
LTC1292
+ –IN DOUT MISO
RPLAT
100Ω* 100Ω RTD GND VREF
1MΩ**
AT 0°C

22μF†
* TRW-IRC MAR -6 RESISTOR -0.1% TANTALUM
** 1% METLA FILM RESISTOR
R = ROSEMOUNT 118MFRTD "/
t
'
† PLAT
CERAMICS CAN ALSO BE USED
Figure 1. 0° to 400°C Temperature-Measurement System
an52f

AN52-2

Note that if the temperature on the +IN pin is less than
the temperature on the –IN pin, the output will be
zero. Because the LTC1292 is being driven from a high
source impedance, you should limit the CLK frequency
to 100kHz or less.
Application Note 52
The software code for interfacing the LTC1292 to the
Motorola MC68HC11 or the Intel 8051 is found in the
LTC1292 data sheet. The code needs to be modified for the
circuit in Figure 2 to account for the inversion introduced
by the digital level translators.

+15V

OUT
1N5229 1kΩ 1N5229 1kΩ + 1μF
LT1019-5
TANTALUM
CS VCC GND

+INPUT +IN CLK

10V TO 15V LTC1292
–INPUT –IN DOUT + 47μF
1N4148 TANTALUM
GND VREF
DIODES
+5V

1.5kΩ 1kΩ 1.5kΩ 1kΩ

1kΩ
P1.4 2N2222 2N3906

MPU
(e.g., 8051)
1kΩ
P1.3 2N2222

1N4148 1.5kΩ
"/
t
'
P1.1

1kΩ

Figure 2. Floating, 12-Bit Data Acquisition System

+5V
LT1027 +15V

4.7μF** 1μF
LM134 TANTALUM
V+

P1.4

V– 228Ω*
MPU
R1 (e.g., 8051)
10kΩ* CS VCC

+IN CLK P1.3

LM134 LTC1292
V+ –IN DOUT P1.1
14.7kΩ*
GND VREF

22μF** 10.2kΩ* 22μF**

TANTALUM TANTALUM
V– 228Ω*
R1 "/
t
'
10kΩ*

*1% METAL FILM RESISTOR

**CERAMICS CAN ALSO BE USED

Figure 3. Differential Temperature-Measurement System

an52f

AN52-3
Application Note 52
MICROPOWER SO8 PACKAGED ADC CIRCUITS
by William Rempfer

Floating 8-Bit Data Acquisition System

Figure 4 shows a floating system that sends data to a
grounded host system. The floating circuitry is isolated
by two opto-isolators and powered by a simple capacitor-
diode charge pump. The system has very low power
requirements because the LTC1096 shuts down between
conversions and the opto-isolators draw power only when
data is being transferred. The system consumes only
50μA at a sample rate of 10Hz (1ms on-time and 99ms
off-time). This is easily within the current supplied by the
charge pump running at 5MHz. If a truly isolated system
is required, the system’s low power simplifies generating
an isolated supply or powering the system from a battery.

FLOATING SYSTEM

1N5817

47μF 0.1μF
1N5817
0.001μF 75k
2N3904
2kV
VCC
VREF

0.022 100k 20k

LT1004-2.5
LTC1096
CS
5MHz +IN ANALOG
1N5817 INPUT
4N28 –IN
300Ω
CLK DOUT
100k GND
CLK
1k

10k

DATA
500k

"/
t
'

Figure 4. Power for this Floating ADC System Is Provided by a Simple Capacitor-Diode
Charge Pump. The Two Opto-Isolators Draw No Current Between Samples, Turning on
Only to Send the Clock and Receive Data

an52f

AN52-4

0°C – 70°C Thermometer
Figure 5 shows a temperature-measurement system.
The LTC1096 is connected directly to the low cost silicon
temperature sensor. The voltage applied to the VREF pin
adjusts the full scale of the ADC to the output range of
the sensor. The zero point of the converter is matched to
the zero output voltage of the sensor by the voltage on
the LTC1096’s negative input.
Operating the ADC directly off batteries can eliminate the
space taken by a voltage regulator. Connecting the ADC
directly to sensors can eliminate op amps and gain stages.
The LTC1096/LTC1098 can operate with small, 0.1μF or
0.01μF chip bypass capacitors.
Application Note 52
Figure 6 shows the operating sequence of the LTC1096.
The converter draws power when the CS pin is low and
shuts itself down when that pin is high. In systems that
convert continuously, the LTC1096/LTC1098 will draw
its normal operating power continuously. A 10μs wake
up time must be provided to the LTC1096 after each
falling CS.
In systems that have significant time between conversions,
lowest power drain will occur with the minimum CS low
time. Bringing CS low, waiting 10μs for the wake up time,
transferring data as quickly as possible, and then bringing
it back high will result in the lowest current drain.

+3V

0.1μF

LM134 75k VCC

678Ω

+IN CS
LTC1096
13.5kΩ –IN CLK TO μP
182k
VREF DOUT
GND
LT1004-1.2
63.4k
0.01μF 0.01μF
"/
t
'

Figure 5. The LTC1096’s High-Impedance Input Connects Directly to This Temperature Sensor,
Eliminating Signal Conditioning Circuitry in This 0°C–70°C Thermometer

LTC1096 POWER DOWN AND WAKE UP

CS
tWAKE UP tCONVERSION
POWER DOWN (10μSEC MIN)

CLK

DOUT
B7 B6 B5 B4 B3 B2 B1 B0
"/
t
'

Figure 6. The ADC’s Power Consumption Drops to Zero When CS Goes High. 10μs After CS Goes Low,
the ADC Is Ready to Convert. For Minimum Power Consumption Keep CS High for as Much Time as
Possible Between Conversions

an52f

AN52-5
Application Note 52

Interface
LOW DROPOUT REGULATOR SIMPLIFIES ACTIVE SCSI
TERMINATORS
by Sean Gold
The circuit shown in Figure 7 uses an LT1117 low dropout
three terminal regulator to control the terminator’s local
logic supply. The LT1117’s line regulation makes the
output immune to variations in TERMPWR. After account-
ing for resistor tolerances and variations in the LT1117’s
reference voltage, the absolute variation in the 2.85V
output is only 4% over temperature. When the regula-
tor drops out at TERMPWR-2.85, or 1.25V, the output
linearly tracks the input with a 1V/V slope. The regulator
provides effective signal termination because the 110Ω
series resistor closely matches the transmission line’s
characteristic impedance, and the regulator provides a good
AC ground.
In contrast to a passive terminator, two LT1117s require
half as many termination resistors, and operate at 1/15
the quiescent current or 20mA. At these power levels,
PC traces provide adequate heat sinking for the
LT1117’s SOT-223 package. Beyond solving basic signal
conditioning problems, this LT1117 terminator handles
fault conditions with short circuit current limiting, thermal
shutdown, and on-chip ESD protection.

CONNECTOR
TERMPWR

1N5817 110Ω
5V LT1117 2%
LOGIC 2.85V
SUPPLY SOT-223 110Ω
0.1μF SCSI BUS
CERAMIC 18 TO 27 LINES

110Ω
10μF 22μF 2%
TANTALUM TANTALUM
110Ω

"/
t
'

Figure 7. SCSI Active Termination

an52f

AN52-6
 Application Note 52

Power
LT1110 SUPPLIES 6 VOLTS AT 550mA FROM 2 AA
NiCad CELLS
by Steve Pietkiewicz
The LT1110 micropower DC-DC converter can provide 5V
at 150mA when operating from two AA alkaline cells. The
internal switch VCE(SAT) sets this power limit. Even with an
external low drop switch, more power is not realistically
possible. The internal impedance (typically 200mΩ fresh
and 500mΩ at end-of-life) of alkaline AA cells limits peak
obtainable battery power. Conversely, nickel-cadmium cells
have a constant internal impedance (35mΩ to 50mΩ) for
AA size) that increases only when the cell is completely
discharged. This allows power to be drawn from the cell at
a far greater rate. The circuit in Figure 8 uses two AA NiCad
cells to supply 6 volts at 550mA. The circuit, developed for
pagers with transmit capability, runs at full output current
for 15 minutes with two Gates Millennium AA NiCad cells.
With a 250mA load, the circuit runs for 36 minutes (see
Figure 9). Less heat is generated with a reduced load,
resulting in the watt-hour difference observable above.

L1
5μH
10T # 18GA
MAGNETICS INC. D1
55-041-A2 CORE 1N5820
6VOUT
R5 550mA
220
1k
Q1
1 2 2N4403
220
ILIM VIN
Q3 6 3 10Ω
AO SW1
2N3906 Q2
ZETEX
LT1110 ZTX-849
2 w AA 10k 300pF
7 8
NiCAD SET FB
R4 C2
100μF GND SW2
10V 16Ω 394k + 220μF
5 4 1% 10V
SANYO Q4 Q5
2N3904 2N3904 SANYO
OS-CON
0S-CON
R3
+ C1 R2
15k R1
1μF 1% 50mΩ
1k

"/
t
5"
ZETEX (516) 543-7100
SANYO (619) 661-6322
MAGNETICS INC. (412) 282-8282

Figure 8. Schematic Diagram, 2 AA NiCad to +6 Volt Converter

an52f

AN52-7
Application Note 52
7.0
6.5
6.0

BATTERY/OUTPUT VOLTAGE (V)

5.5
5.0
ILOAD = 550mA ILOAD = 250mA
4.5
4.0
3.5
3.0
2.5
2.0
ILOAD = 550mA ILOAD = 250mA
1.5
1.0
OUTPUT
0.5
BATTERY
0
0 5 10 15 20 25 30 35 40

TIME (MINUTES)
"/
t
'

Figure 9. Operating Time at ILOAD = 550mA and 250mA

The circuit uses a micropower LT1110 switching-regulator
IC as a controller. The internal switch of the LT1110
furnishes base drive to Q1 through the 220Ω resistors.
Q1, in turn, supplies base drive to the power switch Q2.
The Zetex ZTX849 NPN device is rated at 5A current and
comes in a TO-92 package. For surface-mount fans, the
FZT-849, also from Zetex, provides the same performance
in an SOT-223 package. The 16Ω resistor provides a turn
off path for Q2’s stored charge. When Q2 is on, current
builds in L1. As Q2 turns off, its collector flies positive until
D1 turns on. L1’s built-up current discharges through D1
into C2 and the load. The voltage at VOUT is divided by R4
and R3 and fed back into the FB pin of the LT1110, which
controls Q2’s cycling action. Switch current limit, which
is necessary to ensure saturation over supply variations,
is implemented by Q3–Q5. Q3, C1, R2, and the auxiliary
gain block inside the LT1110, form a 220mV reference
point at the LT1110’s SET pin. Transistors Q4 and Q5
form a common-base differential amplifier. Q5’s emitter
monitors the voltage across 50mΩ resistor R1. When
the voltage across R1 exceeds 220mV, Q4 turns on hard,
pulling current through R5. When the voltage at the ILIM
pin of the LT1110 reaches a diode drop below the VIN pin,
the internal switch turns off. Thus, maximum switch cur-
rent is maintained at 220mV/50mΩ, or 4.4A, over input
variations and manufacturing spread in the LT1110’s on
time and frequency.
The circuit’s output ripple measures 200mVP-P, and
efficiency is 78% at full load with a 2.4V input. Output power
can be scaled down for less demanding requirements. To
reduce peak current, increase the value of R1. A 100mΩ
resistor will limit current to 2.2A. L1 should be increased
in value linearly as current is reduced. For a current limit
of 2.2A, L1 should be 10μH. Base drive for Q2 can also be
reduced by increasing the value of the 10Ω resistor. These
lower peak currents are much easier on alkaline cells and
will dramatically increase alkaline battery life.

an52f

AN52-8

50 WATT HIGH EFFICIENCY SWITCHER
by Milton Wilcox
The high efficiency 10A step-down (buck) switching regu-
lator shown in Figure 10 illustrates how different sized
MOSFETs can be driven by the LT1158 without having to
worry about shoot-through currents. Since 24V is being
dropped down to 5V, the duty cycle for the switch (top
MOSFET) is only 5/24 or 21%. This means that the bot-
tom MOSFET will dominate the RDS(ON) efficiency losses,
because it is turned on nearly four times as long as the
top. Therefore a smaller MOSFET is used on the top, and
the bottom MOSFET is doubled up, all without having to
worry about dead time.
The LT1158 uses an adaptive system that maintains dead
Application Note 52
Switching regulator applications can take advantage of
an important protection feature of the LT1158: remote
fault sensing. By sensing the current on the output side
of the inductor and returning the LT1158 FAULT pin to the
PWM soft-start pin, a true current-mode loop is formed.
The Figure 10 circuit regulates maximum current in the
inductor to 15A with no output voltage overshoot upon
recovery from a short circuit.
95
90

EFFICIENCY (%)
time independent of the type, the size, and even the number
of MOSFETs being driven. It does this by monitoring the 85

gate turn-off to see that it has fully discharged before al-

lowing the opposite MOSFET to turn on. During turn-on, 80
the hold-off capability of the opposing driver is boosted
to prevent transient shoot-through. In this way, cross-
75
conduction is completely eliminated as a design constraint. 0 2 4 6 8 10

OUTPUT CURRENT (A)

The non-critical Schottky diode across the bottom "/
t
5"

MOSFETs reduces reverse-recovery losses. Figure 11 Figure 11. Operating Efficiency for Figure 10 Circuit.
shows the operating efficiency for the Figure 10 circuit. Current Limit is Set at 15A

24V IN
0.1μF
1N4148 0.1μF
4.7kΩ +
4.7kΩ 10μF
+ (2) 500μF
NI VIN INV 1N4148 BST BST
IRFZ34 LOW ESR
DR
VREF A
V+ T DR
1N4148 T FB L1*
VC B 70μH 7mΩ
LT3525 5V/10A
+ LT1158
SRC OUT
1μF 10kΩ SEN+ +
BIAS +
SEN– (2) 1000μF
COMP GND 0.01μF –
+ LOW ESR
0.01μF (2) IRFZ44
DISCHG SOFT-ST FAULT B DR
CT RT + MBR340
100Ω 5μF B FB
GND
UPDATE
30kΩ 30kΩ 2.4kΩ For reference only
2.2nF
*1 1/4" MP CORE 14GA WIRE
"/
t
5"

fOSC = 25kHz

Figure 10. 50W High Efficiency Switching Regulator Illustrates the Design Ease Afforded by Adaptive Dead Time Generation

an52f

AN52-9
Application Note 52

Filters
CASCADED 8TH-ORDER BUTTERWORTH FILTERS is a low power (4 milliamperes with ±5 volt supplies),
PROVIDE STEEP ROLL-OFF LOWPASS FILTER clock-tunable, 8th-order filter, which can be configured
by Philip Karantzalis and Richard Markell for a Butterworth or Bessel response by strapping a pin.
Figure 12 shows the schematic diagram of the two-filter
Sometimes a design requires a filter that exceeds the
system. The frequency response is shown in Figure 13,
specifications of the standard “dash-number” filter. In
where it can be seen that the filter’s attenuation is 80dB at
this case, the requirement was a low-distortion (–70dB)
2.3 times the cutoff frequency. The distortion, as shown
filter with roll-off faster than that of an 8th-order Butter-
in Figure 14, is nothing less than spectacular. From 100Hz
worth. An elliptic filter was ruled out because its distortion
to 1kHz, the two filters have less than –74dB distortion
specifications are too high. Two low power LTC1164-5s
specifications. At the standard measurement frequency
were wired in cascade to investigate the specifications that
of 1kHz, the specification is –78dB.
could be achieved with this architecture. The LTC1164-5
LĀ
fCLK

   
INV (C) OUT (C) INV (C) OUT (C)
2  2 
VIN R3 SHUNT VIN R3 SHUNT
˜' ˜'
3  3 
GND V– o7 GND V– o7
-5$ -5$
   
7 V+ fCLK 7 V+ fCLK

5  5 
˜' GND  V+ ˜' GND  V+

 9  9
LP (A) VOUT LP (A) VOUT
7 8 7 8
RIN (A) NC RIN (A) NC

L L

"/
t
'

V– V–

Figure 12. Schematic Diagram: Low Power, 16th-Order Lowpass Filter (Two 8th-Order Butterworths Cascaded)

10 –40
0 –45
±5V SUPPLY
–50
–10
–55
–20
–60
–30
GAIN (dB)

–65
THD (%)

1.4VRMS IN
–40 –70
–50 –75
–80
–60
–85
–70
–90
–80 –95
–90 –100
100 1k 5k 100 1k

FREQUENCY (Hz) FREQUENCY (Hz)

"/
t
' "/
t
'

Figure 13. Frequency Response for fCLK = 20kHz Figure 14. Distortion Performance: Two LTC1164-5s,
fCLK = 60kHz (57:1) Pin 10 Connected to V+
an52f

AN52-10
 Application Note 52
DC-ACCURATE, PROGRAMMABLE-CUTOFF, Most users choose to tune the filter with an on-board
FIFTH-ORDER BUTTERWORTH LOWPASS FILTER microprocessor and/or timer. This is quite convenient if
REQUIRES NO ON-BOARD CLOCK these components are available. If a clock is not available,
by Richard Markell the LTC1063 can be tuned with an external resistor and
The new LTC1063 is a clock-tunable, monolithic filter with capacitor. The scheme shown here allows the filter’s cutoff
low-DC output offset (1mV typical with ±5V supplies). The frequency to be programmed using an external micropro-
frequency response of the filter closely approximates a cessor or the parallel port of a personal computer. This
fifth-order Butterworth polynomial. allows the cutoff frequency of the filter to be set before
the product is shipped.
20k

+7.5V
1 8
INPUT VIN VOS ADJ
20k 2
2 7 7
GND VOUT –
LTC1063 6
3 – 6 LT1007 VOUT
7.5V V V+ +7.5V
3
4 CLK CLK 5 + 4
.1μF OUT IN 0.1μF

–7.5V

HUGHES
HC2021
6 1
C1 SER CLK
15k 10 2
C2 SER IN
1% 3
SER OUT
8 16 +7.5
GND VDD
15
PROG
25 PIN 14
PARALLEL PORT READ
CONNECTOR
FOR IBM PCs 7.5 7.5
AND COMPATIBLES
74LS14 74LS05
1k 1k
2 11 10 3 4
SCLK

5 13 12 1 2
SD IN

3 5 6 9 8
PROG

4 1 2 11 18
READ
+5V

74LS14 1k 74LS05
11 51Ω 8 9 6 5 270Ω
SD OUT
25
GND
0.01μF
+5V VDD

GND GND
0.1μF 0.1μF

GND GND

PROGRAMMER FOR NON-VOLATILE CAPACITOR, HC2021

NOTES:
1. THE HC2021 SHOULD BE LOCATED CLOSE TO THE LTC1063 FOR BEST RESULTS.
2. +3.5 ≤ VDD ≤ +18.8.
3. POSITIVE POWER SUPPLY FOR DEVICES 74LS05 AND 74LS14 IS +5V.
"/
t
5"
4. HUGHES TELEPHONE NUMBER (714) 759-2665.

Figure 15. Schematic Diagram of LTC1063 with Programmable Cutoff Frequency

an52f

AN52-11
Application Note 52
The tuning scheme makes use of non-volatile, tunable 10.000

capacitors available from Hughes Semiconductor. These 0.0

–10.00
capacitors allow approximately a decade of tuning range. –20.00
More range could be obtained by using dual devices.

AMPLITUDE
–30.00
Figure 15 shows the schematic diagram of the applica- –40.00

tion. Be sure to place the variable capacitor as close as –50.00

possible to the LTC1063 to minimize parasitic elements. o

Figure 16 shows the frequency response of the filter when –70.00

–80.00
the capacitor is varied from minimum to half-value, and –90.00
then to maximum capacitance. The programming part of 1k 10k 100k 200k

the circuit may be disconnected once the variable capaci- CAPACITOR AT CAPACITOR AT CAPACITOR AT
MAX VALUE 1/2 MAX VALUE MIN VALUE
tor is set. The capacitor will remember its value until it is FREQUENCY
reprogrammed. "/
t
5"

Figure 16. LTC1063 Frequency Response

Miscellaneous Circuits
A SINGLE CELL LASER DIODE DRIVER
USING THE LT1110
by Steve Pietkiewicz
Recently available visible lasers can be operated from 1.5V
supplies, given appropriate drive circuits. Because these
lasers are exceptionally sensitive to overdrive, power to the
laser must be carefully controlled lest it be damaged. Over-
currents as brief as 2 microseconds can cause damage.
In the circuit of Figure 17, an LT1110 switching regulator
serves as the controller within the single cell powered laser
diode driver. The LT1110 regulator is a high speed LT1073.
The LT1110 is used here as an FM controller, driving a
PNP power switch Q2, with a typical “ON” time of 1.5
microseconds. Current in L1 reaches a peak value of about
1.0A. The output capacitor C2 has been specified for low
ESR, and should not be substituted (damage to the laser
diode may result).
The Gain Block output of the LT1110 functions with Q1
as an error amplifier. The differential inputs compare the
photodiode current developed as a voltage across R2
to the 212mV reference. The amplifier drives Q1, which
modulates current into the ILIM pin. This varies oscillator
frequency to control average current.
Overall frequency compensation is provided by R1 and C1,
values carefully chosen to eliminate power-up overshoot.
The value of current sense resistor R2 determines the laser
diode power, as shown the 1000 ohms results in about a
0.8 milliwatt output.
LZ1

R1 C1 R3
L O' 220Ω ˜'
Q1 Q2
2N3906 MJE210
+ C2
D1 R4 ˜'
1N4148 I LIM V IN 10Ω
AO SW1 D2 R5
1N5818 2Ω
1.5V LT1110

'# SET
GND SW2
R1 L1
L 2.2μH

-

50,0
-:'

,
$

4"/:0
04$0/
-;

504)*#"
50-% "/
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Figure 17. LT1110 Laser Diode Driver Operating from a Single Cell
an52f

AN52-12
 Application Note 52
LT1109 GENERATES VPP FOR FLASH MEMORY
by Steve Pietkiewicz
Flash memory chips such as the Intel 28F020 2Megabit devices. The SHUTDOWN input turns off the converter,
device require a VPP program supply of 12 volts at 30mA. reducing quiescent current to 300μA when pulled to a
A DC-DC converter may be used to generate 12 volts from logic 0. VPP rises in a controlled fashion, reaching 12 volts
the 5 volt logic supply. The converter must be physically ±5% in under 4ms. Output voltage goes to VCC minus a
small, available in surface-mount packaging, and have diode drop when the converter is in shutdown mode. This
logic-controlled shutdown. Additionally, the converter is an acceptable condition for Intel flash memories and
must have carefully controlled rise time and zero over- does not harm the memory.
shoot. VPP excursions beyond 14 volts for 20ns or longer
will destroy the ETOX-process based device. RF LEVELING LOOP
L1†
by Jim Williams
MBRS120T3
33μH
Leveling loops are often a requirement for RF transmission
systems. More often than not, low cost is more important
SW VOUT
+VIN
5V
VIN SENSE 12V than absolute accuracy. Figure 19 shows such a circuit.
N"
˜' -5$4
+
The RF input is applied to A1, an LT1228 operational
SHUTDOWN* ˜' transconductance amplifier. A1’s output feeds A2, the
GND
LT1228’s current feedback amplifier. A2’s output, the
SHUTDOWN PROGRAM output of the circuit, is sampled by the A3-based gain


1*/
1"$,"(&
0/-:
†
control configuration. This arrangement closes a gain


-

$0*-530/*$4
$59

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$0*-530/*$4


 control loop back at A1. The 4pF capacitor compensates




46.*%"


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rectifier diode capacitance, enhancing output flatness

Figure 18. All Surface Mount Flash Memory VPP Generator vs frequency. A1’s ISET input current controls its gain,
Figure 18’s circuit is well suited for providing VPP power allowing overall output level control. This approach to
for single or multiple flash memory chips. All associated RF leveling is simple and inexpensive, and provides low
components, including the inductor, are surface mount output drift and distortion.

+15V
RF INPUT 10k
0.6VRMS-1.3VRMS + A1
25MHz OTA
100Ω
1/2 LT1228
+
A2
CFA OUTPUT
– 300Ω
1/2 LT1228 2Vp-p
ISET
–
470Ω 0.01
–15V 10k
10k
4pF
10Ω

0.01
10k

+15V
100k
10k 4.7k
– –15V
A3 AMPLITUDE
LT1006 ADJUST 1N4148’s
LT1004
+ COUPLE THERMALLY
1.2V

–15V "/
t
5"

Figure 19. Simple RF Leveling Loop

an52f

AN52-13
Application Note 52
HIGH ACCURACY INSTRUMENTATION AMPLIFIER
by Dave Dwelley
The LTC1043 and the LTC1047 combine to make a high
performance low frequency instrumentation amplifier as
shown in Figure 20. The LTC1043 switched capacitor block
is configured as a sampling front end, providing excep-
tional CMRR and rail-to-rail input operation. It works by
attaching a 1μF capacitor across the two inputs, letting it
charge to the input voltage. Once charged, the capacitor
is disconnected from the input terminals and reconnected
to the output terminals, where it transfers its charge to the
1μF capacitor at the LTC1047’s input. Any common mode
voltage present at the inputs is subjected to a capacitive
divider between the 1μF flying cap and the IC’s parasitic
capacitance. With the LTC1043’s parasitics typically be-
low 1pF, this gives AC CMRR above 120dB. The analog
switches in the LTC1043 are purely resistive, so they add
no DC offset to the signal.
The output signal (with the common mode stripped off) is
then amplified by the LTC1047, a precision, micropower
zero-drift op amp. The LTC1047 amplifies the signal by
the desired amount, adding less than 10μV offset and
0.05μV/°C drift. The sampling frequency of the LTC1043
with single 5V supply is about 400Hz, allowing differential
signals below 200Hz to be amplified with no aliasing. Note
that common mode signals are not sampled; thus they
will not alias regardless of frequency until the common
mode/differential mode signal ratio approaches 120dB!
The entire system draws 60μA with a single 5V supply
and provides two independent channels.

+5V

 +5V

-5$
+IN  8 +
1/2
-5$ VOUT
11
C) –
CS

˜'
˜'
12
GAIN = 1 + R2
–IN   ˜' R1
VOS

˜7
DVOS

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  IS

˜"4*%&
$.33

E#
"5
)[
˜' 4*/(-&
7
4611-:
R1 R2 */165
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Figure 20. High Accuracy Instrumentation Amplifier

an52f

AN52-14

A FAST, LINEAR, HIGH CURRENT LINE DRIVER
by Walt Jung and Rich Markell
Among linear applications not usually seen are those
which require high speed combined with either very low
DC error, or high load current. Such applications can be
solved by combining the best attributes of two ICs, either
one of which may not be capable by itself of the entire
requirement.
A case in point is the line driver of Figure 21, which uses
an LT1122 JFET input op amp as the gain element com-
bined with an LT1010 buffer. This provides the output
current of the LT1010 (typically 150mA) but with the
basic DC and low level AC characteristics of the LT1122.
The circuit is capable of driving loads as low as 100Ω
with very low distortion. The input referred DC error is
the low DC offset of the LT1122, typically 0.5mV or less.
Large signal characteristics are also very good, due to the
80V/μs symmetrical SR of the LT1122.
Application Note 52
The circuit as shown is configured as a precise gain of 5
non-inverting amplifier by gain set resistors R2 and R1,
with the LT1010 unity gain voltage follower inside the
overall feedback loop. This provides current buffering to
the op amp, allowing it to operate most linearly. Small
signal bandwidth is set by the time constant of R2 and
C1, and is 1MHz as shown, with a corresponding risetime
of about 400ns.
Performance with ±18V supplies is shown in Figures 22a
and 22b, with output generally 5VRMS or equivalent, driv-
ing 100Ω directly. THD is shown in Figure 22a, with input
level swept up to output clipping level, at a fixed 10kHz
frequency. The distortion is generally well below 0.01%,
and improves substantially for lower frequencies.

V+

R BOOST
1μF 1μF 30
1%
R4
R3 49.9Ω
INPUT + 100Ω 1%
U1 1% U2 (OPTIONAL)
R IN
LT1122 LT1010 VOUT
10k
–

1μF 1μF
C1
39pF

R2
V– 4k
1%
"/
t
5"
R1
1k

Figure 21. Line Driver

an52f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. AN52-15
Application Note 52
CCIF IM distortion performance of the circuit for similar as rising even order distortion for methods such as this
loading is shown in Figure 22b, driving a load of 100Ω CCIF test. For this example, the distortion is more than an
at a swept level, again up to output clipping. The LT1122 order of magnitude higher than that of the faster, symmetric
amplifier is represented by the lower of the two curves, slewing LT1122 for the same conditions.
with distortion around the 0.0001% level. Also shown for Applications of this circuit include low offset linear buffers
comparison in this plot is the distortion of a type 156 JFET such as for A/D inputs, line drivers for instrumentation
op amp (also driving the LT1010 buffer with other condi-
use, and audio frequency range buffers such as very high
tions the same). The 156 op amp uses a design topology
quality headphone use.
with an intrinsically asymmetric SR. This manifests itself

1 1
TOTAL HARMONIC DISTORTION (%)

CCIF 1M DISTORTION (%)

0.1
0.1

0.010

0.010
0.001

0.001 0.0001
0.1 1 10 0.1 1 5

INPUT LEVEL (V) INPUT LEVEL (V)

"/
t
'B "/
t
'C

Figure 22a. THD vs Input Level Figure 22b. CCIF IM Distortion vs Input Level

Linear Technology, the magazine, is published 3 times a year.

The magazine features articles, circuits and new product
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800-637-5545.

an52f

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