ECE 485

Fall 2010

HW #4
1. You are asked to build a 600µm square, 25µm thick diaphragm in an oxidized
(100) silicon wafer. The wafer thickness is 300µm. You use an anisotropic etch
solution of KOH/H2O that has an etch rate of 10µm/hr for (100) silicon, and
attacks (111) silicon at a rate of 100x slower.

a) Find the etching time

b) Determine the mask undercut distance u. (Eqn 10.1 in the Liu book is helpful)
c) Find the dimensions d of the mask opening you would use

2. You are asked to make V-grooves 50µm deep in an 0.5µm SiO2 coated (100)
silicon wafer. First, use a wet etch (like HF acid) to make an opening in the SiO2.
Then, use an anisotropic etch like KOH/H2O to etch the V-groove.

a) Derive the relationship that connects the width of an etched cavity mask opening
to the V-groove depth.
b) What are the dimensions of the mask opening that you would use? You don’t
have to consider undercut of the SiO2 mask.

3. Surface Micromachining
Using K.R. Williams Paper (J MEMS, Vol. 12, No.6, p761, 2003) Etch rates for
Micromachining Processing Part II, select a sacrificial layer material and a
selective etche that can be used for release of the structure, if the structural
material is

1) polysilicon (LPCVD)
2) silicon oxide (annealed LPCVD oxide)
3) gold (evaporated)
4) aluminum (evaporated)

For each etch, what is the etch rate ratio between the structural and sacrificial
material?
For the second part of this problem, select just one of the sacrificial/structural
systems above. Assume all layer thicknesses are 1µm and that the sacrificial etch
will need to extend in the horizontal direction for at least 100µm for release of
microfluidic channels, to make a two-level system of microfluidic “tunnels” with
the cross section shown above.

Describe a process (just the sequence of process steps to build the structure (i.e.
deposit/etch/photolithography…) It is not necessary to sketch the
photolithography masks). Be sure that each underlying layer is compatible with
all layers deposited on top of it. You might need to find information on melting
point of some materials.
4. You wish to create a system for sorting cells in a microfluidic channel. The cells
must be visible inside the channel, and you need inlet/outlet holes. Sketch a mask
layout and process flow diagram for making a flow channel chip using the
dissolved wafer process with SOI wafer.

Your process should include masks for:

a. electrode pattern
b. flow channel
c. inlet hole & Si etching