Name of the Candidate: ……………………………. Reg. No: ….

………………

St. Thomas College of Engineering &

Technology Kozhuvalloor, Chengannur
Department of Electronics and Communication Engineering (2019-2020)
(3rd Semester) Series Test 1, September 2019
EC 207 LOGIC CIRCUIT DESIGN
Time: 2 hrs Max. Marks: 60

Part A
(Answer all questions)
1.
Briefly explain XS-3 code. (3) [CO1]

2.
Explain 1’s complement and 2’s complement arithmetic (3) [CO1]

3.
Summarize the laws of Boolean Algebra (3) [CO2]

4.
Determine the complement of F= AB’C+A’BD (3) [CO2]

Part B
(Answer any 3 questions)
Explain Hamming code? How is the Hamming code word generated? The
5. message *1001001- is coded in the 7-bit even parity Hamming code, which is
(8) [CO2]
transmitted through a noisy channel. Decode the message, assuming that at most a
single error occurred in e4ch code word.
Perform the following binary arithmetic
6. (a) 1101.01+111.011
(b) 111.111-1010.01 (8) [CO2]
(c) 1101 x 110
(d) 110101.11/101
(a). Perform the following operations [showing intermediate steps]
(i) 110002 – 101112 using 1’s and 2’s complement method
7. (ii) 74618 + 71578 (4) [CO2]
(iii) DC5A16 – 9B3C16
(iv) 11001001101.10110112 into Decimal, Octal, Hexadecimal
(b) Prepare a table for the first 12 Binary, Grey, Excess 3, and ASCII (4) [CO2]
9. In a computer system, numbers are represented using words with a length of 4 (8) [CO2]
Bits.
(i) What is the range of positive numbers that can be represented using unsigned
Binary numbers?
1
 (ii) Explain how the 1's and 2's complement representation can be used to describe
Signed binary numbers.
(iii) Prepare a table showing all the positive and negative numbers which can be
represented using 4 bit words in "sign magnitude", "l's complement" and "2's
Complement" representation and mark the maximum and minimum in each case.

Part C
(Answer any 3 questions)
10.
Prove the universal property of NAND and NOR gate (8) [CO2]

11. Obtain the minimal expression in SOP for the Boolean expression
S= Σm (0,1,2,5,7,9,10) and draw the diagram using NAND gates only. (8) [CO2]

12. Design a circuit that compares two 2-bit numbers P and Q and produce output
(8) [CO2]
bits that indicate whether P=Q or P>Q
13. Draw the gate level circuit diagram and logic equations for a 1 to 4 de-
multiplexer. For the Boolean function F = (A + B). (A + C). (B + C). Show how it (8) [CO2]
can be implemented using a 1: 8 de-multiplexer and one or more gates

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