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An Efficient Single-Sourced Asymmetrical Cascaded Multilevel Inverter With Reduced Leakage Current Suitable For Single-Stage PV Systems
An Efficient Single-Sourced Asymmetrical Cascaded Multilevel Inverter With Reduced Leakage Current Suitable For Single-Stage PV Systems
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2018.2874076, IEEE
Transactions on Energy Conversion
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Abstract—An isolated single sourced multi-output dc/dc
converter with a high-frequency link was proposed before to feed
different cells of the Asymmetrical Cascaded H-bridge (ACHB)
Vaux2-dc
inverter. One of the fundamental advantages of the ACHB is that
the main H-bridge is commutated with fundamental frequency,
passing the majority of the inverter power. However, the isolated
DC/DC converter needs to be connected to the main voltage source Auxiliary 2 HB
with high-voltage/high-frequency switches, which limits the power
capability and the efficiency of the converter. In this paper, a Grid
Vsux1-dc
switching pattern based on nearest level modulation (NLM) High voltage/ High
frequency switches
method is proposed to command all the power to be transferred
through the main H-bridge. Therefore, the power circulates Auxiliary 1 HB
between the auxiliary H-bridges with no need for high voltage
switches. As a result, a single-input single-output auxiliary
Vmain-dc
converter is needed with only 5% of the power rating. This VS
PV
solution reduces cost and size while it improves the efficiency of Source
the converter. Furthermore, the architecture makes the inverter
more suitable for high power and high voltage applications. The Main HB
inverter switching strategy is based on programmable firing Fig.1.Circuit diagram of the single-sourced ACHB using High-Frequency
angles. The main dc-link of the grid connected inverter is Link (HFL), the eliminated high-voltage/high-frequency switches are
controlled to achieve maximum power point tracking (MPPT), highlighted by dashed lines.
while the DC/DC isolated converter is controlled to regulate the
auxiliary DC-links. The proposed topology is verified by The main H-bridges is sourced by the highest DC voltage value,
simulation and experimental results using a 1.5kW hardware and as a result majority of the power passes through it. As the
prototype. main H-bridge switches at the fundamental frequency, the
Index Terms—ACHB inverter, programmable firing angles,
High-frequency link converter, THD minimization. switching losses are noticeably reduced, which significantly
improves the system efficiency. Furthermore, H-bridges in the
I. INTRODUCTION ACHB are regulated with low frequency, so the inverter is
suitable for high power/high voltage applications. The main
drawback of ACHB inverters is the necessity for a number of
M ulti-level inverters are desirable in many applications
because of the high output-power capacity with small
output filters [1-2]. Asymmetrical Cascaded H-Bridge (ACHB)
isolated power sources [4-10].
Normally, multiple-output power transformers are used to
connect the single source to the multi-level inverter cells [11].
multi-level inverters as shown in Fig. 1, among all, have been
However, bulky transformers and complex peripheral reset
acknowledged as one of the promising solutions, because high
circuits make the solution not practical for many applications
number of levels can be produced with small number of H-bride
such as electric vehicles. A potential solution is to use a high-
cells compared to symmetrical Cascaded H-bridge (CHB)
frequency link with single-input/multi-outputs to feed the
inverters [3]. In these kinds of inverters, every H-bridge
auxiliary H-bridge cells simultaneously [12-15]. Figure 1
inverter needs to be sourced through an isolated DC-DC
shows the circuit diagram for this topology. Normally, nearly
converter with a different value from the other H-bridge cells.
20 % of the total power should flow through the auxiliary cells,
which makes cost and size of the power circuit considerably
This research was supported by the KIAT(Korea Institute for Advancement high. An improved solution was proposed to reduce the size
of Technology grant funded by the Korea Government(MOTIE : Ministry of
Trade Industry and Energy). (No. P0002397, HRD program for Industrial and cost of the circuit using a modulation strategy where nearly
Convergence of Wearable Smart Devices. This work is submitted ONLY BY 2 % of the power passes through the auxiliary H-bridge cells
INVITATION-Special Issue: Power Conversion & Control in Photovoltaic [13]. The drawback of this topology is the high-frequency/
Power Plants. 1 Joung-Hu Park is a corresponding author. He is with the
Department of Electrical Engineering, Soongsil University, Seoul, Korea (e- high-voltage switches which connect the high-frequency-link
mail: wait4u@ssu.ac.kr). Ashraf Ahmed and Mohammad and Mohana Sundar converter to the main power supply, increasing cost, size and
are also with the same Department. (e-mail: ashraf_rshwan@yahoo.com, and losses. Therefore, connecting the high-frequency-link
mohanfeb1190@gmail.com).
converter to the main power supply limits the benefits of the
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topology. Other solutions proposed with floating capacitors as subscripts aux1, aux2 represent variables for the auxiliary H-
sources [16,17]. In both cases, a floating capacitor was used for bridge cells 1 and 2 respectively. The subscript (p) represents
auxiliary 1 or 2. However, the other auxiliary cell is still power- the peak value of the waveform while (1) represents the
supplied from the main high-voltage rail. In reference [18], the fundamental value. Subscript (inv) represents the inverter AC
floating capacitor was proposed for one cell but with 9-levels, output. Consequently, Fig. 2 shows a generalized inverter
which is no improvement from [16, 17]. Following subsections output voltage waveform for a single-phase ACHB inverter.
summarize objectives, research challenges and contributions. Considering that there is no jump for any level in the output,
the maximum output voltage of the inverter can be calculated
A. Objectives and challenges
by summing the fundamental harmonics of each voltage step
The main objectives and challenges of the paper are: 1) To using Fourier series analysis [15-16].
eliminate the connection between the main power supply and Vinv−1p = V1−1p + V2−1p + ⋯ + Vn−1p (1)
the high-frequency link converter, eliminating the need for high
4
voltage/ high frequency switching semiconductor devices in the Vinv−1p = ∑Lj=1 Vj cos αj (2)
π
circuit, which reduces the size and the cost of the transformer.
Cj
2) To switch the main H-bridge with the fundamental frequency αj = sin−1 ( ) (3)
M
assuring more applicable topology for high power/high voltage
applications. 3) To guarantee maximum number of levels with where M is the modulation index, α j is the firing angle of level
minimum THD. 4) To assure standard leakage current value. j, L is the total positive or negative number of levels, Vj is the
DC voltage level and Cj is a constant compared to the control
B. Contributions signal Msin(ωt) to decide the level j of the switching pattern
The main contributions of this paper can be summarized as [19].
follows: 1) A switching strategy based on nearest level
modulation (NLM) is proposed [19-23]. It is based on LVdc
optimizing programmable firing angles for various modulation (L-1)Vdc
indexes to achieve; zero power flows from the main H-bridge
to the auxiliary H-bridges, and the power in the two auxiliary
H-bridges are equal in magnitude. 2) The switching strategy is
optimized to achieve minimum THD in the output of the
Vinv (V)
II. OPERATING PRINCIPLES The fundamental voltage peak for every H-bridge cell
The ACHB inverter topology is based on multiple number (𝑉𝑎𝑢𝑥1−1𝑝 , 𝑉𝑎𝑢𝑥2−1𝑝 ) could be calculated as in Eq. (7) and (8),
of H-bridge inverter cells (N) which are cascaded with different provided that the fundamental voltages of the different H-
source voltage values. And, each inverter cell can provide 3 bridge cells are in phase.
N=2 N=1
voltage levels. Nearest level modulation (NLM) technique is Vaux1−1p = Vinv−1p | − Vinv−1p | (7)
applied to control the ACHB inverter in this paper. The control
N=3 N=2
technique is based on choosing the voltage level nearest to the Vaux2−1p = Vinv−1p | − Vinv−1p | (8)
reference voltage. In the analysis through this paper, subscript
(main) represents a variable for the main H-bridge cell which As the H-bridge cells are in series, the current is the same in
is the highest DC voltage cell as shown in Fig.1. Furthermore, all the H-bridges. Taking that into account, the per-unit power
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modulation index values. The power flow between the auxiliary 0.8 P
Out
H-bridges at these two points is zero. Therefore, the inverter
does not need the auxiliary converters to be connected to the
Power (p.u.)
0.6
source. Only a low voltage isolated dc/dc converter is needed
to connect between the two low-voltage auxiliary H-bridges. In 0.4
this case, the power circulating between the two auxiliary H- P =-P =4.5% P
Aux2 Mux1 Out
bridges is less than 5% of the total inverter power. The number 0.2
shows that the THD is nearly 3.9 %, at the 21 level. The inverter
-0.2
output power (Pout) equals to the main H-bridge power (Pmain) 0 0.2 0.4 0.6 0.8 1
in this case, and so the peak of the main voltage is; Modulation index (M)
The angle α5 which is the main H-bridge cell firing angle (see 25
Fig. 2), then, can be found from,
𝐶
α5 = 𝑠𝑖𝑛−1 𝑚𝑎𝑖𝑛 (11) 20
THD (%)
𝑀
Therefore;
2
√𝑀2 −𝐶𝑚𝑎𝑖𝑛 15
cos α5 = (12)
𝑀
10 At 21 levels, THD=3.9%
and from Eq.(10), (12),
4𝑉 2
𝑉𝑚𝑎𝑖𝑛−1𝑝 = 𝑚𝑎𝑖𝑛−𝑑𝑐 √𝑀2 − 𝐶𝑚𝑎𝑖𝑛 = 𝑀𝑉𝑜−1𝑝 (13) 5
𝑀𝜋
The final result of the derivation,
4𝐾𝑚𝑎𝑖𝑛 0
𝑀2 = 2
√𝑀2 − 𝐶𝑚𝑎𝑖𝑛 ` (14) 0 2 4 6 8 10 12 14
𝜋 Positive number of levels
𝑉𝑚𝑎𝑖𝑛−𝑑𝑐
where 𝐾𝑚𝑎𝑖𝑛 = . (b)
𝑉𝑜1 Fig. 3. Output quality of the 27-level inverter (a) Power output in per unit for
Solving equation (14) for M, we can get a generalized each cell (b) THDs of the output voltage.
equation for the required modulation indexes 𝑀𝑐 as in Eq. (15).
2
The programmable firing angles method is proposed to
𝐾𝑚𝑎𝑖𝑛 4𝜋2 𝐶𝑚𝑎𝑖𝑛
𝑀𝑐 = √8 ± 2√16 − 2 (15) enable the variable modulation indexes. The method is based
𝜋 𝐾𝑚𝑎𝑖𝑛
upon finding an optimal firing-angle-set pattern according to
For 1:3:9 inverter with the per-unit power sketched in Fig. the various modulation indexes by minimization of the output
𝐾 2∙3𝑁−1 inverter voltage THDs. Figure 4 shows the inverter output
3(a), 𝐶𝑚𝑎𝑖𝑛 = 𝑚𝑎𝑖𝑛
2
, 𝐾𝑚𝑎𝑖𝑛 = 𝑁
3 −1
, and N=3. The required
voltage (Vinv), the main H-bridge output (Vmain), auxiliary 1 H-
modulation index Mc is 0.793. Ratio of the power circulating bridge output (Vaux1) and auxiliary 2 H-bridge output (Vaux2).
between the two auxiliary H-bridges to the total power, could The inverter output voltage THD is minimized to find the firing
be calculated from; angles α1 to α13. The THD function is given by,
𝑁=2
𝑉𝑎𝑢𝑥1−1𝑝 𝑉𝑜−1𝑝 | 2 2
= −1 (16) √𝑉𝑜−𝑟𝑚𝑠 −𝑉𝑜−1𝑟𝑚𝑠
𝑉𝑚𝑎𝑖𝑛−1𝑝 2
𝑉𝑚𝑎𝑖𝑛−𝑑𝑐 √𝑀2 −𝐶𝑚𝑎𝑖𝑛 𝑇𝐻𝐷 = (17)
𝑉𝑜−1𝑟𝑚𝑠
The power is negative in this case, which means that the first where Vo-rms is the rms value of the output voltage waveform.
auxiliary H-bridge is in regenerative mode. One problem with Vo-1rms is the rms value of the fundamental component of the
this topology is the need for a fixed modulation index. However, output voltage which is given by,
1
the fixed switching patterns with fixed modulation index are Vo−1rms = (Vmain−1p + Vaux1−1p + Vaux2−1p ) (18)
√2
not suitable for power electronics applications corresponding to
variation of the main DC-link voltage level and load conditions. Using Fourier series, the expressions of Vmain-1p, Vaux1-1p, and
Vaux2-1p could be calculated from Eq. (19), (20) and (21).
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4Vmain−dc shown in Fig. 5(b). The results show that with the proposed
Vmain−1p = cos α5 (19)
π
4V cos α2 − 2cos α5 + method the THD increases significantly when the modulation
Vaux1−1p = aux1−dc [ ] (20) indexes are higher than 0.35 and less than 0.85. Therefore, the
π cos α8 + cos α11
cos α1 − 2cos α2 + cos α3 + operating region is chosen between 0.35 and 0.85. It can be
cos α4 − 2cos α5 + cos α6 + noticed in the figure that the two lines intersect in 2 points. In
4V
Vaux2−1p = aux2−dc cos α7 − 2cos α8 + cos α9 + (21) the working region, the THD is worst between 0.4 and 0.6 while
π
cos α10 − 2cos α11 + cos α12 + the THD is better elsewhere in the operating region.
[ cos α13 ]
TABLE I. FIRING ANGLE SETS FOR THE PROPOSED METHOD ACCORDING
TO THE MODULATION INDEX VARIATION
Firing angle
M=0.35 M=0.5 M=0.7 M=0.85
in radians
α1 0.16110075 0.073752 0.052911 0.045803
Vinv
V
aux1-dc α11 1.570796327 1.570796 1.570796 1.293899
α12 1.570796327 1.570796 1.570796 1.570796
α13 1.570796327 1.570796 1.570796 1.570796
Vaux2
30
V
aux2-dc
0.3
In this paper, a Matlab® minimization algorithm is used to P =-P
Aux1 Aux2
0.2
find the firing angles for different modulation indexes taking
the above constraints into account. A sample of the results of 0.1
the minimization process is given in Table I. The Table shows 0
the firing angle set for some modulation indexes. Figure 5(a) -0.1
shows the THDs in percentage versus modulation indexes for 0.4 0.5 0.6 0.7 0.8 0.9 1
Modulation index
the adaptive firing angle method (solid line). The dashed line
(b)
shows the THDs for the traditional NLM method the same as Fig. 5. Optimization results for the proposed firing angles showing (a) THD
in Fig. 3(b). The results of the power distribution analysis are versus modulation index (b) Power in per unit for the 3 inverter cells.
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0
DC-link neglecting the DHB high frequency capacitors. A PI
controller is designed to regulate Vaux2-dc as in Eq. (30).
-100
𝑉𝑎𝑢𝑥2−𝑑𝑐 𝑅𝑎𝑢𝑥
𝐺𝑎𝑢𝑥 = = 𝐾𝑎𝑢𝑥 (29)
∅𝑎𝑢𝑥 1+𝑅𝑎𝑢𝑥 𝐶𝑎𝑢𝑥2 𝑆
-200 1+𝑆
𝐾𝑝
𝐾𝑖
𝐺𝑐−𝑎𝑢𝑥 = 𝐾𝑖 (30)
𝑆
-300
0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1 Then the open loop gain will be,
Time (s) 𝐾𝑝
1+𝑆
Fig. 6. Simulation results for the inverter output voltage with different 𝐾𝑖
𝐺𝑐−𝑎𝑢𝑥 𝐺𝑎𝑢𝑥 = 𝐾𝑖 𝐾𝑎𝑢𝑥 𝑅𝑎𝑢𝑥 (31)
modulation indexes using the proposed programmable firing angles. 𝑆(1+𝑅𝑎𝑢𝑥 𝐶𝑎𝑢𝑥2 𝑆)
𝐾𝑝
The waveforms represent the time-domain results of Table I. Taking: = 𝑅𝑎𝑢𝑥 𝐶𝑎𝑢𝑥2 , the pole and zero would cancel
𝐾𝑖
The gate signal generation in this case is developed using a
each other and the system will be reduced to a first order system.
scheme shown in Fig. 7. Eighteen firing angles look-up table
By choosing the required time constant τaux of the closed-loop
are produced as a function of the modulation index. The other 1
look-up table produces the switching pattern as a function of system, Ki can be calculated from 𝐾𝑖 = , then
𝜏𝑎𝑢𝑥 𝐾𝑎𝑢𝑥 𝑅𝑎𝑢𝑥
the firing angles. The control strategy is explained in the 𝐾𝑝 = 𝐾𝑖 𝑅𝑎𝑢𝑥 𝐶𝑎𝑢𝑥2 .
following section.
The control loop is designed to be faster than the main DC-
α1
link control loop, and that to assure Vaux2-dc is able to track the
reference which is Vmain-dc/9. In this case, τaux is chosen to be
M Switching
Firing angles
Pattern Driver around 1 ms. The inverter is used to regulate the main DC-link
Lookup table
Lookup table voltage which is the PV source voltage. The MPPT Perturb-
α13 and-observe control algorithm provides the voltage reference
To (Vmain-dcr) for the control loop [26-27].
Sin(ωt) switches A PLL maintains the inverter synchronized to the utility grid.
As the DHB DC/DC voltage controller is quite robust the
Fig. 7. Switching strategy block diagram with programmable firing angles. inverter model could be presented as in Fig. 8(b). Using Fig.
8(b), the non-linear state space representation can be as in Eqs.
III. INVERTER CONTROL (32) and (33). Both equations are linearized and the MATLAB
The system shown in Fig.1 is controlled to maximize the is used to design the current and voltage PI controllers.
power of the PV source using voltage feedback loop. A Dual 𝑑𝑖𝑔
𝐿𝑔 = 𝑚𝑉𝑃𝑉 − 𝑉𝑔 (32)
Half Bride (DHB) topology, shown in Fig. 8(a), is applied to 𝑑𝑡
𝑑𝑉𝑃𝑉 1 1
link between the two auxiliary H-bridges. The auxiliary DC/DC 𝐶𝑚𝑎𝑖𝑛 = −𝑚𝑖𝑔 − 𝑉 + 𝑉 (33)
𝑑𝑡 𝑅𝑠 𝑃𝑉 𝑅𝑠 𝑠
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Paux Iaux2-dc
n:1
Vaux1-dc Caux2 Raux VAux2-dc
φ aux
(a)
Lg
IPV Ig
Rs
PV source
model
m
(a)
(b)
Fig. 8. Equivalent circuits for (a) the auxiliary DHB converter (b) the ACHB
inverter.
The open loop bode design plots are shown in Fig. 9. Figure
9(a) shows the inner current loop bode plot design. The loop
was designed with cross-over frequency of around 3 k rad/s,
and with around 31-degrees phase margin.
The outer voltage loop bode design plot is shown in Fig. 9(b).
The loop was designed with around 25 rad/s cross-over
frequency and 88.7 degrees phase margin. Both DHB control
loop and inverter control loop are shown in Fig. 10. The MPPT
algorithm produces the reference for the main-dc link voltage
(Vmain-dcr) control loop. The auxiliary DHB converter voltage
loop reference (Vaux2_dcr) is calculated online using the sensed
main dc-link feedback voltage.
(b)
Fig. 9. Inverter open-loop Bode plot (a) inner current & (b) outer voltage loops.
Inverter
controller Voltage
Loop Kw
Delay Current
Vmain-dcr Loop Msin(ωt+ɵ)
MPPT M
IPV
Controller
PI × PI ÷
Switching To
Vgrid
Vmain-dc
Vmain-dc strategy inverter
VPLL PLL switches
PLL Vgrid
Vgrid Feed
forward
DC/DC converter
controller Kw
1/9
Delay
Vaux2-dc_r φ
PI To DC/DC
D PWM converter
0.5
Vaux2-dc
Fig. 10. Inverter and auxiliary DC/DC converter control loops for the proposed topology.
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IV. HARDWARE IMPLEMENTATION The results show the same theoretical number of levels
The ACHB circuit shown in Fig. 1 was implemented in matching the theoretical results in Fig. 6. For M=0.5, the
hardware to verify the proposed circuit topology. The circuit number of levels is 13 with nearly 10% THD, and with M=0.75,
was controlled using TMS320F28335 Texas Instruments the number of levels is 21 with THD=4.6%. The Fluke 434
digital signal controller with the XDS100v1 development board. power quality analyzer is used to measure the THD values. The
The part numbers are IRFP4868 and IRFP4668PbF for the test results show that Vaux2-dc is regulated successfully to be kept
main and the auxiliary H-bridge switches respectively. The fixed with the step change in the modulation index. Vaux1-dc
hardware results were executed with V main-dc = 225 V, Vaux1-dc = follows Vaux2-dc for power balance without voltage regulation.
75 V, and Vaux2-dc = 25 V. First, the switching strategy is Figure 12 shows the DC/DC converter output voltage (Vaux2-
verified compared to the theoretical results in Fig. 6. The dc) and output current (Iaux2-dc) with the inverter output voltage
efficiency of the proposed topology is also verified for different (Vinv) and output current (Iinv). As shown in the figure, the total
load values, and the leakage current is tested after that. Finally, inverter power is around 16.6 kW, and the DC/DC auxiliary
the inverter grid connection control scheme combined with the converter power is around 70 W. The modulation index in this
MPPT and the DC/DC converter auxiliary voltage controllers case is around 0.8. The percentage of power between them is
are verified. The proposed programmable firing angle method around 4.7 % which is similar to the theoretical results in Fig.
was tested and verified using the experimental results shown in 5. The proposed switching strategy could be easily used in
Fig. 11. Figures 11(b) and 11(c) show, individually, the voltage regenerative mode with the same control strategy. That makes
results of the modulation indexes (M=0.5, 0.75 respsectively). the topology favorable for Electric vehicle applications. The
efficiency versus power is shown in Fig. 13. The test was
Vinv at M=0.75 applied under the same conditions as the experimental results
Vinv at M=0.5 in Fig. 11. The maximum efficiency 98.5% was achieved at
1560 W. This efficiency includes the DC/DC half bridge
bidirectional converter. It is expected the efficiency will be
improved for high voltage high power circuits.
Vaux2-dc=25V
Iaux2-dc =2.8 A
Iinv=8.9 A
(a)
Vinv at M=0.5
Vinv = 184 V
Vaux1-dc=75 V
Fig. 12. Experimental Results shows the DC/DC DHB converter and inverter
Vaux2-dc=25 V
output voltages and currents. The power output of the inverter around 1.66 kW
and the DHB power is around 70 W, with modulation index around 0.8.
(b)
Vinv at M=0.75
100
80
Efficiency (%)
efficiency=98.5%
60
40
Vaux1-dc=75 V
20
Vaux2-dc=25 V
(c) 0
200 400 600 800 1000 1200 1400 1600
Fig. 11. Experimental Results with programmable firing angles (a) A step Power (W )
change from M=0.5 to 0.75 (b) Results with M=0.5 (c) Results with M=0.75.
Fig. 13. Experimental efficiency results for different power values.
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A very low leakage current is expected as the main H-bridge control system will be proposed with improved control strategy.
has 60 Hz switching. The PV array source parasitic stray Furthermore, the topology will be tested with a higher voltage
capacitance is emulated with a capacitor of 100 nF connected source to demonstrate the advantage of removing the high-
to the main H-bridge [28]. Figure 14 shows the results with voltage / high frequency semiconductor devices.
around 1.6 kW output power. The measured root mean square
value leakage current is around 27 mA which is less than
standard 30 mA value in some countries [24]. See reference [28] Vmain-dc =225 V
for comparison with very similar test conditions.
The system was connected to the grid to perform MPPT test. IPV =6.8 A
The PV source is simulated by voltage source and a resistance
as in Fig. 8(b). In this case the, the voltage source was around Vaux1-dc =76 V
450 V while the resistance is around 33 Ω. A Perturb-and-
observe MPPT algorithm was implemented with a voltage step Vaux2-dc = 24.5 V
of 10 V and time step of 2 seconds. The maximum power in
this case is around 1.5 kW. The results for test are shown in Fig.
15. Figure 15(a) shows the MPPT voltage (Vmain-dc=Vpv). The
controller was able to track the maximum power point. V aux2-dc
follows Vmain-dc/9 reference. Vaux1-dc follows Vaux2-dc to keep the (a)
power balance. The input current (Ipv) is also shown with
average value around 6.8 A. A zoom in in the results with Vmain=230 V
inverter output voltage is shown in Fig. 15(b). Vaux1-dc = 79 V
Vaux2-dc =24.5 V
Vinv=182 V
Iinv=8.9 A
Vinv =180 V
Vinv =180 V
(b)
Fig. 15. MPPT experimental Results show (a) the three DC-Link voltages and
Leakage current=27 mA
input current (b) the inverter output voltage.
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0885-8969 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TEC.2018.2874076, IEEE
Transactions on Energy Conversion
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[15] Ashraf Ahmed, M.S. Irfan, Joung-Hu Park, "A single-sourced
transformer-less asymmetric multi-level inverter," in Control and Ashraf Ahmed (M’09) received the B.Sc. and
Modeling for Power Electronics (COMPEL), 2015 IEEE 16th Workshop M.Sc. degrees in electrical engineering from Assiut
on , vol., no., pp.1-6, 12-15 July 2015. University-Egypt, Cairo University-Egypt in 1999
[16] M. Rotella , G. Penailillo , J. Pereda and J. Dixon "PWM method to and 2005 respectively. He received the Ph.D. degree
eliminate power sources in a non-redundant 27-level inverter for machine from University of Durham - UK in 2011, in the field
drive applications", IEEE Transactions on Industrial Electronics, vol. of renewable energy control and power electronics.
56, no. 1, pp.194 -201 2009. He is currently an Assistant Professor at Soongsil
[17] S. Vazquez , J. I. Leon , L. G. Franquelo , J. J. Padilla and J. M. University, Seoul, Korea. His research interests
Carrasco "DC-voltage-ratio control strategy for multilevel cascaded include the analysis and design of switching power
converters fed with a single DC source", IEEE Trans. Ind. Electron., vol. converters for renewable energy applications.
56, no. 7, pp.2513 -2521 2009.
[18] J. Pereda, J. Dixon "Cascaded Multilevel Converters: Optimal Mohana Sundar Manoharan received his B.S. from
Asymmetries and Floating Capacitor Control", IEEE Transactions on the Department of Electrical Engineering of
Industrial Electronics, pp. 4784 - 4793 Vol. 60, no. 11, Nov. 2013. Kalasalingam University, India, in 2011. He received
[19] M. Perez, J. Rodriguez, J. Pontt and S. Kouro "Power distribution in his M.S degree in 2013 and is currently working
hybrid multi-cell converter with nearest level modulation", Proc. IEEE towards his Ph.D. degree at Soongsil University,
ISIE, pp.736 -741 2007. Seoul, Korea. His current research interests include the
[20] Dixon, J.; Breton, A.A.; Rios, F.E.; Rodriguez, J.; Pontt, J.; Perez, M.A., analysis and design of Power Conditioning Systems
"High-Power Machine Drive, Using Nonredundant 27-Level Inverters using Multi-level Inverter.
and Active Front End Rectifiers," Power Electronics, IEEE Transactions
on , vol.22, no.6, pp.2527-2533, Nov. 2007.
[21] Espinosa, E.; Espinoza, J.; Villarroel, F.; Munoz, J.; Melin, P.; Ramirez,
R., "A novel modulation technique for asymmetric multi-cell inverters of Joung-Hu Park (S’02 - M’06 – SM’13) received
27-level without regeneration," in IECON 2012 - 38th Annual his B.S., M.S., and Ph.D. from the Department of
Conference on IEEE Industrial Electronics Society , vol., no., pp.123-128, Electrical Engineering and Computer Science of
25-28 Oct. 2012. Seoul National University, Seoul, Korea, in 1999,
[22] Espinosa, E.; Espinoza, J.; Ramirez, R.; Rohten, J.; Villarroel, F.; Melin, 2001 and 2006, respectively. He is currently an
P.; Guzman, J., "A new modulation technique for 15-level asymmetric Associate Professor at Soongsil University, Seoul,
inverter operating with minimum THD," in Industrial Electronics Society, Korea. From August 2004 to August 2005, he was a
IECON 2013 - 39th Annual Conference of the IEEE , vol., no., pp.6164- visiting scholar at Virginia Tech. Blacksburg, VA,
6169, 10-13 Nov. 2013. USA, and from July 2015 to June 2016, he was a
[23] Espinosa, E.E.; Espinoza, J.R.; Melin, P.E.; Ramirez, R.O.; Villarroel, F.; visiting scholar at University of British Columbia, Vancouver, Canada. His
Munoz, J.A.; Moran, L., "A New Modulation Method for a 13-Level current research interests include the analysis of high-frequency switching
Asymmetric Inverter Toward Minimum THD," IEEE Transactions on converters and renewable energy applications.
Industry Applications, vol.50, no.3, pp.1924-1933, May-June 2014.
0885-8969 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.